blob: a175b1deb4741825541565c13eb6f70c1c603a56 [file] [log] [blame]
Jim Stichnoth5bc2b1d2014-05-22 13:38:48 -07001target triple = "i686-pc-linux-gnu"
2
Matt Walace0ca8f2014-07-24 12:34:20 -07003; This file is extracted from fp.pnacl.ll and vector-fcmp.ll in the lit
4; tests, with the "internal" attribute removed from the functions.
Jim Stichnoth5bc2b1d2014-05-22 13:38:48 -07005
6define i32 @fcmpFalseFloat(float %a, float %b) {
7entry:
8 %cmp = fcmp false float %a, %b
9 %cmp.ret_ext = zext i1 %cmp to i32
10 ret i32 %cmp.ret_ext
11}
12; CHECK: fcmpFalseFloat:
13; CHECK: mov {{.*}}, 0
14
15define i32 @fcmpFalseDouble(double %a, double %b) {
16entry:
17 %cmp = fcmp false double %a, %b
18 %cmp.ret_ext = zext i1 %cmp to i32
19 ret i32 %cmp.ret_ext
20}
21; CHECK: fcmpFalseDouble:
22; CHECK: mov {{.*}}, 0
23
24define i32 @fcmpOeqFloat(float %a, float %b) {
25entry:
26 %cmp = fcmp oeq float %a, %b
27 %cmp.ret_ext = zext i1 %cmp to i32
28 ret i32 %cmp.ret_ext
29}
30; CHECK: fcmpOeqFloat:
31; CHECK: ucomiss
32; CHECK: jne .
33; CHECK: jp .
34
35define i32 @fcmpOeqDouble(double %a, double %b) {
36entry:
37 %cmp = fcmp oeq double %a, %b
38 %cmp.ret_ext = zext i1 %cmp to i32
39 ret i32 %cmp.ret_ext
40}
41; CHECK: fcmpOeqDouble:
42; CHECK: ucomisd
43; CHECK: jne .
44; CHECK: jp .
45
46define i32 @fcmpOgtFloat(float %a, float %b) {
47entry:
48 %cmp = fcmp ogt float %a, %b
49 %cmp.ret_ext = zext i1 %cmp to i32
50 ret i32 %cmp.ret_ext
51}
52; CHECK: fcmpOgtFloat:
53; CHECK: ucomiss
54; CHECK: ja .
55
56define i32 @fcmpOgtDouble(double %a, double %b) {
57entry:
58 %cmp = fcmp ogt double %a, %b
59 %cmp.ret_ext = zext i1 %cmp to i32
60 ret i32 %cmp.ret_ext
61}
62; CHECK: fcmpOgtDouble:
63; CHECK: ucomisd
64; CHECK: ja .
65
66define i32 @fcmpOgeFloat(float %a, float %b) {
67entry:
68 %cmp = fcmp oge float %a, %b
69 %cmp.ret_ext = zext i1 %cmp to i32
70 ret i32 %cmp.ret_ext
71}
72; CHECK: fcmpOgeFloat:
73; CHECK: ucomiss
74; CHECK: jae .
75
76define i32 @fcmpOgeDouble(double %a, double %b) {
77entry:
78 %cmp = fcmp oge double %a, %b
79 %cmp.ret_ext = zext i1 %cmp to i32
80 ret i32 %cmp.ret_ext
81}
82; CHECK: fcmpOgeDouble:
83; CHECK: ucomisd
84; CHECK: jae .
85
86define i32 @fcmpOltFloat(float %a, float %b) {
87entry:
88 %cmp = fcmp olt float %a, %b
89 %cmp.ret_ext = zext i1 %cmp to i32
90 ret i32 %cmp.ret_ext
91}
92; CHECK: fcmpOltFloat:
93; CHECK: ucomiss
94; CHECK: ja .
95
96define i32 @fcmpOltDouble(double %a, double %b) {
97entry:
98 %cmp = fcmp olt double %a, %b
99 %cmp.ret_ext = zext i1 %cmp to i32
100 ret i32 %cmp.ret_ext
101}
102; CHECK: fcmpOltDouble:
103; CHECK: ucomisd
104; CHECK: ja .
105
106define i32 @fcmpOleFloat(float %a, float %b) {
107entry:
108 %cmp = fcmp ole float %a, %b
109 %cmp.ret_ext = zext i1 %cmp to i32
110 ret i32 %cmp.ret_ext
111}
112; CHECK: fcmpOleFloat:
113; CHECK: ucomiss
114; CHECK: jae .
115
116define i32 @fcmpOleDouble(double %a, double %b) {
117entry:
118 %cmp = fcmp ole double %a, %b
119 %cmp.ret_ext = zext i1 %cmp to i32
120 ret i32 %cmp.ret_ext
121}
122; CHECK: fcmpOleDouble:
123; CHECK: ucomisd
124; CHECK: jae .
125
126define i32 @fcmpOneFloat(float %a, float %b) {
127entry:
128 %cmp = fcmp one float %a, %b
129 %cmp.ret_ext = zext i1 %cmp to i32
130 ret i32 %cmp.ret_ext
131}
132; CHECK: fcmpOneFloat:
133; CHECK: ucomiss
134; CHECK: jne .
135
136define i32 @fcmpOneDouble(double %a, double %b) {
137entry:
138 %cmp = fcmp one double %a, %b
139 %cmp.ret_ext = zext i1 %cmp to i32
140 ret i32 %cmp.ret_ext
141}
142; CHECK: fcmpOneDouble:
143; CHECK: ucomisd
144; CHECK: jne .
145
146define i32 @fcmpOrdFloat(float %a, float %b) {
147entry:
148 %cmp = fcmp ord float %a, %b
149 %cmp.ret_ext = zext i1 %cmp to i32
150 ret i32 %cmp.ret_ext
151}
152; CHECK: fcmpOrdFloat:
153; CHECK: ucomiss
154; CHECK: jnp .
155
156define i32 @fcmpOrdDouble(double %a, double %b) {
157entry:
158 %cmp = fcmp ord double %a, %b
159 %cmp.ret_ext = zext i1 %cmp to i32
160 ret i32 %cmp.ret_ext
161}
162; CHECK: fcmpOrdDouble:
163; CHECK: ucomisd
164; CHECK: jnp .
165
166define i32 @fcmpUeqFloat(float %a, float %b) {
167entry:
168 %cmp = fcmp ueq float %a, %b
169 %cmp.ret_ext = zext i1 %cmp to i32
170 ret i32 %cmp.ret_ext
171}
172; CHECK: fcmpUeqFloat:
173; CHECK: ucomiss
174; CHECK: je .
175
176define i32 @fcmpUeqDouble(double %a, double %b) {
177entry:
178 %cmp = fcmp ueq double %a, %b
179 %cmp.ret_ext = zext i1 %cmp to i32
180 ret i32 %cmp.ret_ext
181}
182; CHECK: fcmpUeqDouble:
183; CHECK: ucomisd
184; CHECK: je .
185
186define i32 @fcmpUgtFloat(float %a, float %b) {
187entry:
188 %cmp = fcmp ugt float %a, %b
189 %cmp.ret_ext = zext i1 %cmp to i32
190 ret i32 %cmp.ret_ext
191}
192; CHECK: fcmpUgtFloat:
193; CHECK: ucomiss
194; CHECK: jb .
195
196define i32 @fcmpUgtDouble(double %a, double %b) {
197entry:
198 %cmp = fcmp ugt double %a, %b
199 %cmp.ret_ext = zext i1 %cmp to i32
200 ret i32 %cmp.ret_ext
201}
202; CHECK: fcmpUgtDouble:
203; CHECK: ucomisd
204; CHECK: jb .
205
206define i32 @fcmpUgeFloat(float %a, float %b) {
207entry:
208 %cmp = fcmp uge float %a, %b
209 %cmp.ret_ext = zext i1 %cmp to i32
210 ret i32 %cmp.ret_ext
211}
212; CHECK: fcmpUgeFloat:
213; CHECK: ucomiss
214; CHECK: jbe .
215
216define i32 @fcmpUgeDouble(double %a, double %b) {
217entry:
218 %cmp = fcmp uge double %a, %b
219 %cmp.ret_ext = zext i1 %cmp to i32
220 ret i32 %cmp.ret_ext
221}
222; CHECK: fcmpUgeDouble:
223; CHECK: ucomisd
224; CHECK: jbe .
225
226define i32 @fcmpUltFloat(float %a, float %b) {
227entry:
228 %cmp = fcmp ult float %a, %b
229 %cmp.ret_ext = zext i1 %cmp to i32
230 ret i32 %cmp.ret_ext
231}
232; CHECK: fcmpUltFloat:
233; CHECK: ucomiss
234; CHECK: jb .
235
236define i32 @fcmpUltDouble(double %a, double %b) {
237entry:
238 %cmp = fcmp ult double %a, %b
239 %cmp.ret_ext = zext i1 %cmp to i32
240 ret i32 %cmp.ret_ext
241}
242; CHECK: fcmpUltDouble:
243; CHECK: ucomisd
244; CHECK: jb .
245
246define i32 @fcmpUleFloat(float %a, float %b) {
247entry:
248 %cmp = fcmp ule float %a, %b
249 %cmp.ret_ext = zext i1 %cmp to i32
250 ret i32 %cmp.ret_ext
251}
252; CHECK: fcmpUleFloat:
253; CHECK: ucomiss
254; CHECK: jbe .
255
256define i32 @fcmpUleDouble(double %a, double %b) {
257entry:
258 %cmp = fcmp ule double %a, %b
259 %cmp.ret_ext = zext i1 %cmp to i32
260 ret i32 %cmp.ret_ext
261}
262; CHECK: fcmpUleDouble:
263; CHECK: ucomisd
264; CHECK: jbe .
265
266define i32 @fcmpUneFloat(float %a, float %b) {
267entry:
268 %cmp = fcmp une float %a, %b
269 %cmp.ret_ext = zext i1 %cmp to i32
270 ret i32 %cmp.ret_ext
271}
272; CHECK: fcmpUneFloat:
273; CHECK: ucomiss
274; CHECK: je .
275; CHECK: jnp .
276
277define i32 @fcmpUneDouble(double %a, double %b) {
278entry:
279 %cmp = fcmp une double %a, %b
280 %cmp.ret_ext = zext i1 %cmp to i32
281 ret i32 %cmp.ret_ext
282}
283; CHECK: fcmpUneDouble:
284; CHECK: ucomisd
285; CHECK: je .
286; CHECK: jnp .
287
288define i32 @fcmpUnoFloat(float %a, float %b) {
289entry:
290 %cmp = fcmp uno float %a, %b
291 %cmp.ret_ext = zext i1 %cmp to i32
292 ret i32 %cmp.ret_ext
293}
294; CHECK: fcmpUnoFloat:
295; CHECK: ucomiss
296; CHECK: jp .
297
298define i32 @fcmpUnoDouble(double %a, double %b) {
299entry:
300 %cmp = fcmp uno double %a, %b
301 %cmp.ret_ext = zext i1 %cmp to i32
302 ret i32 %cmp.ret_ext
303}
304; CHECK: fcmpUnoDouble:
305; CHECK: ucomisd
306; CHECK: jp .
307
308define i32 @fcmpTrueFloat(float %a, float %b) {
309entry:
310 %cmp = fcmp true float %a, %b
311 %cmp.ret_ext = zext i1 %cmp to i32
312 ret i32 %cmp.ret_ext
313}
314; CHECK: fcmpTrueFloat:
315; CHECK: mov {{.*}}, 1
316
317define i32 @fcmpTrueDouble(double %a, double %b) {
318entry:
319 %cmp = fcmp true double %a, %b
320 %cmp.ret_ext = zext i1 %cmp to i32
321 ret i32 %cmp.ret_ext
322}
323; CHECK: fcmpTrueDouble:
324; CHECK: mov {{.*}}, 1
Matt Walace0ca8f2014-07-24 12:34:20 -0700325
326define <4 x i32> @fcmpFalseVector(<4 x float> %a, <4 x float> %b) {
327entry:
328 %res.trunc = fcmp false <4 x float> %a, %b
329 %res = sext <4 x i1> %res.trunc to <4 x i32>
330 ret <4 x i32> %res
331; CHECK-LABEL: fcmpFalseVector:
332; CHECK: pxor
333}
334
335define <4 x i32> @fcmpOeqVector(<4 x float> %a, <4 x float> %b) {
336entry:
337 %res.trunc = fcmp oeq <4 x float> %a, %b
338 %res = sext <4 x i1> %res.trunc to <4 x i32>
339 ret <4 x i32> %res
340; CHECK-LABEL: fcmpOeqVector:
341; CHECK: cmpeqps
342}
343
344define <4 x i32> @fcmpOgeVector(<4 x float> %a, <4 x float> %b) {
345entry:
346 %res.trunc = fcmp oge <4 x float> %a, %b
347 %res = sext <4 x i1> %res.trunc to <4 x i32>
348 ret <4 x i32> %res
349; CHECK-LABEL: fcmpOgeVector:
350; CHECK: cmpleps
351}
352
353define <4 x i32> @fcmpOgtVector(<4 x float> %a, <4 x float> %b) {
354entry:
355 %res.trunc = fcmp ogt <4 x float> %a, %b
356 %res = sext <4 x i1> %res.trunc to <4 x i32>
357 ret <4 x i32> %res
358; CHECK-LABEL: fcmpOgtVector:
359; CHECK: cmpltps
360}
361
362define <4 x i32> @fcmpOleVector(<4 x float> %a, <4 x float> %b) {
363entry:
364 %res.trunc = fcmp ole <4 x float> %a, %b
365 %res = sext <4 x i1> %res.trunc to <4 x i32>
366 ret <4 x i32> %res
367; CHECK-LABEL: fcmpOleVector:
368; CHECK: cmpleps
369}
370
371define <4 x i32> @fcmpOltVector(<4 x float> %a, <4 x float> %b) {
372entry:
373 %res.trunc = fcmp olt <4 x float> %a, %b
374 %res = sext <4 x i1> %res.trunc to <4 x i32>
375 ret <4 x i32> %res
376; CHECK-LABEL: fcmpOltVector:
377; CHECK: cmpltps
378}
379
380define <4 x i32> @fcmpOneVector(<4 x float> %a, <4 x float> %b) {
381entry:
382 %res.trunc = fcmp one <4 x float> %a, %b
383 %res = sext <4 x i1> %res.trunc to <4 x i32>
384 ret <4 x i32> %res
385; CHECK-LABEL: fcmpOneVector:
386; CHECK: cmpneqps
387; CHECK: cmpordps
388; CHECK: pand
389}
390
391define <4 x i32> @fcmpOrdVector(<4 x float> %a, <4 x float> %b) {
392entry:
393 %res.trunc = fcmp ord <4 x float> %a, %b
394 %res = sext <4 x i1> %res.trunc to <4 x i32>
395 ret <4 x i32> %res
396; CHECK-LABEL: fcmpOrdVector:
397; CHECK: cmpordps
398}
399
400define <4 x i32> @fcmpTrueVector(<4 x float> %a, <4 x float> %b) {
401entry:
402 %res.trunc = fcmp true <4 x float> %a, %b
403 %res = sext <4 x i1> %res.trunc to <4 x i32>
404 ret <4 x i32> %res
405; CHECK-LABEL: fcmpTrueVector:
406; CHECK: pcmpeqd
407}
408
409define <4 x i32> @fcmpUeqVector(<4 x float> %a, <4 x float> %b) {
410entry:
411 %res.trunc = fcmp ueq <4 x float> %a, %b
412 %res = sext <4 x i1> %res.trunc to <4 x i32>
413 ret <4 x i32> %res
414; CHECK-LABEL: fcmpUeqVector:
415; CHECK: cmpeqps
416; CHECK: cmpunordps
417; CHECK: por
418}
419
420define <4 x i32> @fcmpUgeVector(<4 x float> %a, <4 x float> %b) {
421entry:
422 %res.trunc = fcmp uge <4 x float> %a, %b
423 %res = sext <4 x i1> %res.trunc to <4 x i32>
424 ret <4 x i32> %res
425; CHECK-LABEL: fcmpUgeVector:
426; CHECK: cmpnltps
427}
428
429define <4 x i32> @fcmpUgtVector(<4 x float> %a, <4 x float> %b) {
430entry:
431 %res.trunc = fcmp ugt <4 x float> %a, %b
432 %res = sext <4 x i1> %res.trunc to <4 x i32>
433 ret <4 x i32> %res
434; CHECK-LABEL: fcmpUgtVector:
435; CHECK: cmpnleps
436}
437
438define <4 x i32> @fcmpUleVector(<4 x float> %a, <4 x float> %b) {
439entry:
440 %res.trunc = fcmp ule <4 x float> %a, %b
441 %res = sext <4 x i1> %res.trunc to <4 x i32>
442 ret <4 x i32> %res
443; CHECK-LABEL: fcmpUleVector:
444; CHECK: cmpnltps
445}
446
447define <4 x i32> @fcmpUltVector(<4 x float> %a, <4 x float> %b) {
448entry:
449 %res.trunc = fcmp ult <4 x float> %a, %b
450 %res = sext <4 x i1> %res.trunc to <4 x i32>
451 ret <4 x i32> %res
452; CHECK-LABEL: fcmpUltVector:
453; CHECK: cmpnleps
454}
455
456define <4 x i32> @fcmpUneVector(<4 x float> %a, <4 x float> %b) {
457entry:
458 %res.trunc = fcmp une <4 x float> %a, %b
459 %res = sext <4 x i1> %res.trunc to <4 x i32>
460 ret <4 x i32> %res
461; CHECK-LABEL: fcmpUneVector:
462; CHECK: cmpneqps
463}
464
465define <4 x i32> @fcmpUnoVector(<4 x float> %a, <4 x float> %b) {
466entry:
467 %res.trunc = fcmp uno <4 x float> %a, %b
468 %res = sext <4 x i1> %res.trunc to <4 x i32>
469 ret <4 x i32> %res
470; CHECK-LABEL: fcmpUnoVector:
471; CHECK: cmpunordps
472}