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swiftshader / SwiftShader / ec3f56532be1792d04ed470221df663bb8ca9c19 / . / tests_lit / llvm2ice_tests / shift.ll
blob: 6a98bb03b2ba005380bc7266d56aaf24af9051f4 [file] [log] [blame]
Jim Stichnoth5bc2b1d2014-05-22 13:38:48 -0700[diff] [blame]1; This is a test of C-level conversion operations that clang lowers
2; into pairs of shifts.
3
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]4; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
5; RUN: --target x8632 -i %s --args -O2 \
6; RUN: | %if --need=target_X8632 --command FileCheck %s
7
8; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
9; RUN: --target x8632 -i %s --args -Om1 \
10; RUN: | %if --need=target_X8632 --command FileCheck %s
11
12; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
13; once enough infrastructure is in. Also, switch to --filetype=obj
14; when possible.
Jim Stichnothc8799682015-06-22 13:04:10 -0700[diff] [blame]15; RUN: %if --need=target_ARM32 --need=allow_dump \
16; RUN: --command %p2i --filetype=asm --assemble \
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]17; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \
Jim Stichnothc8799682015-06-22 13:04:10 -0700[diff] [blame]18; RUN: | %if --need=target_ARM32 --need=allow_dump \
19; RUN: --command FileCheck --check-prefix ARM32 %s
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]20
Jim Stichnothc8799682015-06-22 13:04:10 -0700[diff] [blame]21; RUN: %if --need=target_ARM32 --need=allow_dump \
22; RUN: --command %p2i --filetype=asm --assemble \
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]23; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \
Jim Stichnothc8799682015-06-22 13:04:10 -0700[diff] [blame]24; RUN: | %if --need=target_ARM32 --need=allow_dump \
25; RUN: --command FileCheck --check-prefix ARM32 %s
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]26
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]27
Jim Stichnothde4ca712014-06-29 08:13:48 -0700[diff] [blame]28@i1 = internal global [4 x i8] zeroinitializer, align 4
29@i2 = internal global [4 x i8] zeroinitializer, align 4
30@u1 = internal global [4 x i8] zeroinitializer, align 4
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]31
32define void @conv1() {
33entry:
Karl Schimpfa667fb82014-05-19 14:56:51 -0700[diff] [blame]34 %__0 = bitcast [4 x i8]* @u1 to i32*
Jim Stichnothe5b58fb2015-06-01 15:17:20 -0700[diff] [blame]35 %v0 = load i32, i32* %__0, align 1
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]36 %sext = shl i32 %v0, 24
37 %v1 = ashr i32 %sext, 24
Karl Schimpfa667fb82014-05-19 14:56:51 -0700[diff] [blame]38 %__4 = bitcast [4 x i8]* @i1 to i32*
39 store i32 %v1, i32* %__4, align 1
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]40 ret void
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]41}
Jan Voungdddc3062014-08-29 12:59:02 -0700[diff] [blame]42; CHECK-LABEL: conv1
Jan Vounga2703ae2015-02-19 11:27:44 -0800[diff] [blame]43; CHECK: shl {{.*}},0x18
44; CHECK: sar {{.*}},0x18
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]45
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]46; ARM32-LABEL: conv1
47; ARM32: lsl {{.*}}, #24
48; ARM32: asr {{.*}}, #24
49
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]50define void @conv2() {
51entry:
Karl Schimpfa667fb82014-05-19 14:56:51 -0700[diff] [blame]52 %__0 = bitcast [4 x i8]* @u1 to i32*
Jim Stichnothe5b58fb2015-06-01 15:17:20 -0700[diff] [blame]53 %v0 = load i32, i32* %__0, align 1
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]54 %sext1 = shl i32 %v0, 16
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]55 %v1 = lshr i32 %sext1, 16
Karl Schimpfa667fb82014-05-19 14:56:51 -0700[diff] [blame]56 %__4 = bitcast [4 x i8]* @i2 to i32*
57 store i32 %v1, i32* %__4, align 1
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]58 ret void
Jim Stichnothf7c9a142014-04-29 10:52:43 -0700[diff] [blame]59}
Jan Voungdddc3062014-08-29 12:59:02 -0700[diff] [blame]60; CHECK-LABEL: conv2
Jan Vounga2703ae2015-02-19 11:27:44 -0800[diff] [blame]61; CHECK: shl {{.*}},0x10
Jan Voung66c3d5e2015-06-04 17:02:31 -0700[diff] [blame]62; CHECK: shr {{.*}},0x10
63
64; ARM32-LABEL: conv2
65; ARM32: lsl {{.*}}, #16
66; ARM32: lsr {{.*}}, #16