blob: 04db6de9e4e52cad7a0ffc66bd026349a5a703f5 [file] [log] [blame]
Ben Claytonfe71eb92019-09-05 12:35:50 +01001// Copyright 2019 The Marl Authors.
2//
3// Licensed under the Apache License, Version 2.0 (the "License");
4// you may not use this file except in compliance with the License.
5// You may obtain a copy of the License at
6//
7// https://www.apache.org/licenses/LICENSE-2.0
8//
9// Unless required by applicable law or agreed to in writing, software
10// distributed under the License is distributed on an "AS IS" BASIS,
11// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12// See the License for the specific language governing permissions and
13// limitations under the License.
14
15#if defined(__aarch64__)
16
17#define MARL_BUILD_ASM 1
18#include "osfiber_asm_aarch64.h"
19
20// void marl_fiber_swap(marl_fiber_context* from, const marl_fiber_context* to)
21// x0: from
22// x1: to
23.text
24.global MARL_ASM_SYMBOL(marl_fiber_swap)
25.align 4
26MARL_ASM_SYMBOL(marl_fiber_swap):
27
28 // Save context 'from'
29 // TODO: pairs of str can be combined with stp.
30
31 // Store special purpose registers
32 str x16, [x0, #MARL_REG_r16]
33 str x17, [x0, #MARL_REG_r17]
34 str x18, [x0, #MARL_REG_r18]
35
36 // Store callee-preserved registers
37 str x19, [x0, #MARL_REG_r19]
38 str x20, [x0, #MARL_REG_r20]
39 str x21, [x0, #MARL_REG_r21]
40 str x22, [x0, #MARL_REG_r22]
41 str x23, [x0, #MARL_REG_r23]
42 str x24, [x0, #MARL_REG_r24]
43 str x25, [x0, #MARL_REG_r25]
44 str x26, [x0, #MARL_REG_r26]
45 str x27, [x0, #MARL_REG_r27]
46 str x28, [x0, #MARL_REG_r28]
Nicolas Capens9e5f50f2019-09-20 10:15:53 -040047 str x29, [x0, #MARL_REG_r29]
Ben Claytonfe71eb92019-09-05 12:35:50 +010048
49 str d8, [x0, #MARL_REG_v8]
50 str d9, [x0, #MARL_REG_v9]
51 str d10, [x0, #MARL_REG_v10]
52 str d11, [x0, #MARL_REG_v11]
53 str d12, [x0, #MARL_REG_v12]
54 str d13, [x0, #MARL_REG_v13]
55 str d14, [x0, #MARL_REG_v14]
56 str d15, [x0, #MARL_REG_v15]
57
58 // Store sp and lr
59 mov x2, sp
60 str x2, [x0, #MARL_REG_SP]
61 str x30, [x0, #MARL_REG_LR]
62
63 // Load context 'to'
64 mov x7, x1
65
66 // Load special purpose registers
67 ldr x16, [x7, #MARL_REG_r16]
68 ldr x17, [x7, #MARL_REG_r17]
69 ldr x18, [x7, #MARL_REG_r18]
70
71 // Load callee-preserved registers
72 ldr x19, [x7, #MARL_REG_r19]
73 ldr x20, [x7, #MARL_REG_r20]
74 ldr x21, [x7, #MARL_REG_r21]
75 ldr x22, [x7, #MARL_REG_r22]
76 ldr x23, [x7, #MARL_REG_r23]
77 ldr x24, [x7, #MARL_REG_r24]
78 ldr x25, [x7, #MARL_REG_r25]
79 ldr x26, [x7, #MARL_REG_r26]
80 ldr x27, [x7, #MARL_REG_r27]
81 ldr x28, [x7, #MARL_REG_r28]
Nicolas Capens9e5f50f2019-09-20 10:15:53 -040082 ldr x29, [x7, #MARL_REG_r29]
Ben Claytonfe71eb92019-09-05 12:35:50 +010083
84 ldr d8, [x7, #MARL_REG_v8]
85 ldr d9, [x7, #MARL_REG_v9]
86 ldr d10, [x7, #MARL_REG_v10]
87 ldr d11, [x7, #MARL_REG_v11]
88 ldr d12, [x7, #MARL_REG_v12]
89 ldr d13, [x7, #MARL_REG_v13]
90 ldr d14, [x7, #MARL_REG_v14]
91 ldr d15, [x7, #MARL_REG_v15]
92
93 // Load parameter registers
94 ldr x0, [x7, #MARL_REG_r0]
95 ldr x1, [x7, #MARL_REG_r1]
96
97 // Load sp and lr
98 ldr x30, [x7, #MARL_REG_LR]
99 ldr x2, [x7, #MARL_REG_SP]
100 mov sp, x2
101
102 ret
103
104#endif // defined(__aarch64__)