Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1 | // Copyright 2016 The SwiftShader Authors. All Rights Reserved. |
| 2 | // |
| 3 | // Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | // you may not use this file except in compliance with the License. |
| 5 | // You may obtain a copy of the License at |
| 6 | // |
| 7 | // http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | // |
| 9 | // Unless required by applicable law or agreed to in writing, software |
| 10 | // distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | // See the License for the specific language governing permissions and |
| 13 | // limitations under the License. |
| 14 | |
| 15 | #include "OutputASM.h" |
| 16 | #include "Common/Math.hpp" |
| 17 | |
| 18 | #include "common/debug.h" |
| 19 | #include "InfoSink.h" |
| 20 | |
| 21 | #include "libGLESv2/Shader.h" |
| 22 | |
| 23 | #include <GLES2/gl2.h> |
| 24 | #include <GLES2/gl2ext.h> |
| 25 | #include <GLES3/gl3.h> |
| 26 | |
| 27 | namespace glsl |
| 28 | { |
| 29 | // Integer to TString conversion |
| 30 | TString str(int i) |
| 31 | { |
| 32 | char buffer[20]; |
| 33 | sprintf(buffer, "%d", i); |
| 34 | return buffer; |
| 35 | } |
| 36 | |
| 37 | class Temporary : public TIntermSymbol |
| 38 | { |
| 39 | public: |
| 40 | Temporary(OutputASM *assembler) : TIntermSymbol(TSymbolTableLevel::nextUniqueId(), "tmp", TType(EbtFloat, EbpHigh, EvqTemporary, 4, 1, false)), assembler(assembler) |
| 41 | { |
| 42 | } |
| 43 | |
| 44 | ~Temporary() |
| 45 | { |
| 46 | assembler->freeTemporary(this); |
| 47 | } |
| 48 | |
| 49 | private: |
| 50 | OutputASM *const assembler; |
| 51 | }; |
| 52 | |
| 53 | class Constant : public TIntermConstantUnion |
| 54 | { |
| 55 | public: |
| 56 | Constant(float x, float y, float z, float w) : TIntermConstantUnion(constants, TType(EbtFloat, EbpHigh, EvqConstExpr, 4, 1, false)) |
| 57 | { |
| 58 | constants[0].setFConst(x); |
| 59 | constants[1].setFConst(y); |
| 60 | constants[2].setFConst(z); |
| 61 | constants[3].setFConst(w); |
| 62 | } |
| 63 | |
| 64 | Constant(bool b) : TIntermConstantUnion(constants, TType(EbtBool, EbpHigh, EvqConstExpr, 1, 1, false)) |
| 65 | { |
| 66 | constants[0].setBConst(b); |
| 67 | } |
| 68 | |
| 69 | Constant(int i) : TIntermConstantUnion(constants, TType(EbtInt, EbpHigh, EvqConstExpr, 1, 1, false)) |
| 70 | { |
| 71 | constants[0].setIConst(i); |
| 72 | } |
| 73 | |
| 74 | ~Constant() |
| 75 | { |
| 76 | } |
| 77 | |
| 78 | private: |
| 79 | ConstantUnion constants[4]; |
| 80 | }; |
| 81 | |
| 82 | Uniform::Uniform(GLenum type, GLenum precision, const std::string &name, int arraySize, int registerIndex, int blockId, const BlockMemberInfo& blockMemberInfo) : |
| 83 | type(type), precision(precision), name(name), arraySize(arraySize), registerIndex(registerIndex), blockId(blockId), blockInfo(blockMemberInfo) |
| 84 | { |
| 85 | } |
| 86 | |
| 87 | UniformBlock::UniformBlock(const std::string& name, unsigned int dataSize, unsigned int arraySize, |
| 88 | TLayoutBlockStorage layout, bool isRowMajorLayout, int registerIndex, int blockId) : |
| 89 | name(name), dataSize(dataSize), arraySize(arraySize), layout(layout), |
| 90 | isRowMajorLayout(isRowMajorLayout), registerIndex(registerIndex), blockId(blockId) |
| 91 | { |
| 92 | } |
| 93 | |
| 94 | BlockLayoutEncoder::BlockLayoutEncoder(bool rowMajor) |
| 95 | : mCurrentOffset(0), isRowMajor(rowMajor) |
| 96 | { |
| 97 | } |
| 98 | |
| 99 | BlockMemberInfo BlockLayoutEncoder::encodeType(const TType &type) |
| 100 | { |
| 101 | int arrayStride; |
| 102 | int matrixStride; |
| 103 | |
| 104 | getBlockLayoutInfo(type, type.getArraySize(), isRowMajor, &arrayStride, &matrixStride); |
| 105 | |
| 106 | const BlockMemberInfo memberInfo(static_cast<int>(mCurrentOffset * BytesPerComponent), |
| 107 | static_cast<int>(arrayStride * BytesPerComponent), |
| 108 | static_cast<int>(matrixStride * BytesPerComponent), |
| 109 | (matrixStride > 0) && isRowMajor); |
| 110 | |
| 111 | advanceOffset(type, type.getArraySize(), isRowMajor, arrayStride, matrixStride); |
| 112 | |
| 113 | return memberInfo; |
| 114 | } |
| 115 | |
| 116 | // static |
| 117 | size_t BlockLayoutEncoder::getBlockRegister(const BlockMemberInfo &info) |
| 118 | { |
| 119 | return (info.offset / BytesPerComponent) / ComponentsPerRegister; |
| 120 | } |
| 121 | |
| 122 | // static |
| 123 | size_t BlockLayoutEncoder::getBlockRegisterElement(const BlockMemberInfo &info) |
| 124 | { |
| 125 | return (info.offset / BytesPerComponent) % ComponentsPerRegister; |
| 126 | } |
| 127 | |
| 128 | void BlockLayoutEncoder::nextRegister() |
| 129 | { |
| 130 | mCurrentOffset = sw::align(mCurrentOffset, ComponentsPerRegister); |
| 131 | } |
| 132 | |
| 133 | Std140BlockEncoder::Std140BlockEncoder(bool rowMajor) : BlockLayoutEncoder(rowMajor) |
| 134 | { |
| 135 | } |
| 136 | |
| 137 | void Std140BlockEncoder::enterAggregateType() |
| 138 | { |
| 139 | nextRegister(); |
| 140 | } |
| 141 | |
| 142 | void Std140BlockEncoder::exitAggregateType() |
| 143 | { |
| 144 | nextRegister(); |
| 145 | } |
| 146 | |
| 147 | void Std140BlockEncoder::getBlockLayoutInfo(const TType &type, unsigned int arraySize, bool isRowMajorMatrix, int *arrayStrideOut, int *matrixStrideOut) |
| 148 | { |
| 149 | size_t baseAlignment = 0; |
| 150 | int matrixStride = 0; |
| 151 | int arrayStride = 0; |
| 152 | |
| 153 | if(type.isMatrix()) |
| 154 | { |
| 155 | baseAlignment = ComponentsPerRegister; |
| 156 | matrixStride = ComponentsPerRegister; |
| 157 | |
| 158 | if(arraySize > 0) |
| 159 | { |
| 160 | const int numRegisters = isRowMajorMatrix ? type.getSecondarySize() : type.getNominalSize(); |
| 161 | arrayStride = ComponentsPerRegister * numRegisters; |
| 162 | } |
| 163 | } |
| 164 | else if(arraySize > 0) |
| 165 | { |
| 166 | baseAlignment = ComponentsPerRegister; |
| 167 | arrayStride = ComponentsPerRegister; |
| 168 | } |
| 169 | else |
| 170 | { |
| 171 | const size_t numComponents = type.getElementSize(); |
| 172 | baseAlignment = (numComponents == 3 ? 4u : numComponents); |
| 173 | } |
| 174 | |
| 175 | mCurrentOffset = sw::align(mCurrentOffset, baseAlignment); |
| 176 | |
| 177 | *matrixStrideOut = matrixStride; |
| 178 | *arrayStrideOut = arrayStride; |
| 179 | } |
| 180 | |
| 181 | void Std140BlockEncoder::advanceOffset(const TType &type, unsigned int arraySize, bool isRowMajorMatrix, int arrayStride, int matrixStride) |
| 182 | { |
| 183 | if(arraySize > 0) |
| 184 | { |
| 185 | mCurrentOffset += arrayStride * arraySize; |
| 186 | } |
| 187 | else if(type.isMatrix()) |
| 188 | { |
| 189 | ASSERT(matrixStride == ComponentsPerRegister); |
| 190 | const int numRegisters = isRowMajorMatrix ? type.getSecondarySize() : type.getNominalSize(); |
| 191 | mCurrentOffset += ComponentsPerRegister * numRegisters; |
| 192 | } |
| 193 | else |
| 194 | { |
| 195 | mCurrentOffset += type.getElementSize(); |
| 196 | } |
| 197 | } |
| 198 | |
| 199 | Attribute::Attribute() |
| 200 | { |
| 201 | type = GL_NONE; |
| 202 | arraySize = 0; |
| 203 | registerIndex = 0; |
| 204 | } |
| 205 | |
| 206 | Attribute::Attribute(GLenum type, const std::string &name, int arraySize, int location, int registerIndex) |
| 207 | { |
| 208 | this->type = type; |
| 209 | this->name = name; |
| 210 | this->arraySize = arraySize; |
| 211 | this->location = location; |
| 212 | this->registerIndex = registerIndex; |
| 213 | } |
| 214 | |
| 215 | sw::PixelShader *Shader::getPixelShader() const |
| 216 | { |
| 217 | return 0; |
| 218 | } |
| 219 | |
| 220 | sw::VertexShader *Shader::getVertexShader() const |
| 221 | { |
| 222 | return 0; |
| 223 | } |
| 224 | |
| 225 | OutputASM::TextureFunction::TextureFunction(const TString& nodeName) : method(IMPLICIT), proj(false), offset(false) |
| 226 | { |
| 227 | TString name = TFunction::unmangleName(nodeName); |
| 228 | |
| 229 | if(name == "texture2D" || name == "textureCube" || name == "texture" || name == "texture3D") |
| 230 | { |
| 231 | method = IMPLICIT; |
| 232 | } |
| 233 | else if(name == "texture2DProj" || name == "textureProj") |
| 234 | { |
| 235 | method = IMPLICIT; |
| 236 | proj = true; |
| 237 | } |
| 238 | else if(name == "texture2DLod" || name == "textureCubeLod" || name == "textureLod") |
| 239 | { |
| 240 | method = LOD; |
| 241 | } |
| 242 | else if(name == "texture2DProjLod" || name == "textureProjLod") |
| 243 | { |
| 244 | method = LOD; |
| 245 | proj = true; |
| 246 | } |
| 247 | else if(name == "textureSize") |
| 248 | { |
| 249 | method = SIZE; |
| 250 | } |
| 251 | else if(name == "textureOffset") |
| 252 | { |
| 253 | method = IMPLICIT; |
| 254 | offset = true; |
| 255 | } |
| 256 | else if(name == "textureProjOffset") |
| 257 | { |
| 258 | method = IMPLICIT; |
| 259 | offset = true; |
| 260 | proj = true; |
| 261 | } |
| 262 | else if(name == "textureLodOffset") |
| 263 | { |
| 264 | method = LOD; |
| 265 | offset = true; |
| 266 | } |
| 267 | else if(name == "textureProjLodOffset") |
| 268 | { |
| 269 | method = LOD; |
| 270 | proj = true; |
| 271 | offset = true; |
| 272 | } |
| 273 | else if(name == "texelFetch") |
| 274 | { |
| 275 | method = FETCH; |
| 276 | } |
| 277 | else if(name == "texelFetchOffset") |
| 278 | { |
| 279 | method = FETCH; |
| 280 | offset = true; |
| 281 | } |
| 282 | else if(name == "textureGrad") |
| 283 | { |
| 284 | method = GRAD; |
| 285 | } |
| 286 | else if(name == "textureGradOffset") |
| 287 | { |
| 288 | method = GRAD; |
| 289 | offset = true; |
| 290 | } |
| 291 | else if(name == "textureProjGrad") |
| 292 | { |
| 293 | method = GRAD; |
| 294 | proj = true; |
| 295 | } |
| 296 | else if(name == "textureProjGradOffset") |
| 297 | { |
| 298 | method = GRAD; |
| 299 | proj = true; |
| 300 | offset = true; |
| 301 | } |
| 302 | else UNREACHABLE(0); |
| 303 | } |
| 304 | |
| 305 | OutputASM::OutputASM(TParseContext &context, Shader *shaderObject) : TIntermTraverser(true, true, true), shaderObject(shaderObject), mContext(context) |
| 306 | { |
| 307 | shader = 0; |
| 308 | pixelShader = 0; |
| 309 | vertexShader = 0; |
| 310 | |
| 311 | if(shaderObject) |
| 312 | { |
| 313 | shader = shaderObject->getShader(); |
| 314 | pixelShader = shaderObject->getPixelShader(); |
| 315 | vertexShader = shaderObject->getVertexShader(); |
| 316 | } |
| 317 | |
| 318 | functionArray.push_back(Function(0, "main(", 0, 0)); |
| 319 | currentFunction = 0; |
| 320 | outputQualifier = EvqOutput; // Set outputQualifier to any value other than EvqFragColor or EvqFragData |
| 321 | } |
| 322 | |
| 323 | OutputASM::~OutputASM() |
| 324 | { |
| 325 | } |
| 326 | |
| 327 | void OutputASM::output() |
| 328 | { |
| 329 | if(shader) |
| 330 | { |
| 331 | emitShader(GLOBAL); |
| 332 | |
| 333 | if(functionArray.size() > 1) // Only call main() when there are other functions |
| 334 | { |
| 335 | Instruction *callMain = emit(sw::Shader::OPCODE_CALL); |
| 336 | callMain->dst.type = sw::Shader::PARAMETER_LABEL; |
| 337 | callMain->dst.index = 0; // main() |
| 338 | |
| 339 | emit(sw::Shader::OPCODE_RET); |
| 340 | } |
| 341 | |
| 342 | emitShader(FUNCTION); |
| 343 | } |
| 344 | } |
| 345 | |
| 346 | void OutputASM::emitShader(Scope scope) |
| 347 | { |
| 348 | emitScope = scope; |
| 349 | currentScope = GLOBAL; |
| 350 | mContext.getTreeRoot()->traverse(this); |
| 351 | } |
| 352 | |
| 353 | void OutputASM::freeTemporary(Temporary *temporary) |
| 354 | { |
| 355 | free(temporaries, temporary); |
| 356 | } |
| 357 | |
| 358 | sw::Shader::Opcode OutputASM::getOpcode(sw::Shader::Opcode op, TIntermTyped *in) const |
| 359 | { |
| 360 | TBasicType baseType = in->getType().getBasicType(); |
| 361 | |
| 362 | switch(op) |
| 363 | { |
| 364 | case sw::Shader::OPCODE_NEG: |
| 365 | switch(baseType) |
| 366 | { |
| 367 | case EbtInt: |
| 368 | case EbtUInt: |
| 369 | return sw::Shader::OPCODE_INEG; |
| 370 | case EbtFloat: |
| 371 | default: |
| 372 | return op; |
| 373 | } |
| 374 | case sw::Shader::OPCODE_ABS: |
| 375 | switch(baseType) |
| 376 | { |
| 377 | case EbtInt: |
| 378 | return sw::Shader::OPCODE_IABS; |
| 379 | case EbtFloat: |
| 380 | default: |
| 381 | return op; |
| 382 | } |
| 383 | case sw::Shader::OPCODE_SGN: |
| 384 | switch(baseType) |
| 385 | { |
| 386 | case EbtInt: |
| 387 | return sw::Shader::OPCODE_ISGN; |
| 388 | case EbtFloat: |
| 389 | default: |
| 390 | return op; |
| 391 | } |
| 392 | case sw::Shader::OPCODE_ADD: |
| 393 | switch(baseType) |
| 394 | { |
| 395 | case EbtInt: |
| 396 | case EbtUInt: |
| 397 | return sw::Shader::OPCODE_IADD; |
| 398 | case EbtFloat: |
| 399 | default: |
| 400 | return op; |
| 401 | } |
| 402 | case sw::Shader::OPCODE_SUB: |
| 403 | switch(baseType) |
| 404 | { |
| 405 | case EbtInt: |
| 406 | case EbtUInt: |
| 407 | return sw::Shader::OPCODE_ISUB; |
| 408 | case EbtFloat: |
| 409 | default: |
| 410 | return op; |
| 411 | } |
| 412 | case sw::Shader::OPCODE_MUL: |
| 413 | switch(baseType) |
| 414 | { |
| 415 | case EbtInt: |
| 416 | case EbtUInt: |
| 417 | return sw::Shader::OPCODE_IMUL; |
| 418 | case EbtFloat: |
| 419 | default: |
| 420 | return op; |
| 421 | } |
| 422 | case sw::Shader::OPCODE_DIV: |
| 423 | switch(baseType) |
| 424 | { |
| 425 | case EbtInt: |
| 426 | return sw::Shader::OPCODE_IDIV; |
| 427 | case EbtUInt: |
| 428 | return sw::Shader::OPCODE_UDIV; |
| 429 | case EbtFloat: |
| 430 | default: |
| 431 | return op; |
| 432 | } |
| 433 | case sw::Shader::OPCODE_IMOD: |
| 434 | return baseType == EbtUInt ? sw::Shader::OPCODE_UMOD : op; |
| 435 | case sw::Shader::OPCODE_ISHR: |
| 436 | return baseType == EbtUInt ? sw::Shader::OPCODE_USHR : op; |
| 437 | case sw::Shader::OPCODE_MIN: |
| 438 | switch(baseType) |
| 439 | { |
| 440 | case EbtInt: |
| 441 | return sw::Shader::OPCODE_IMIN; |
| 442 | case EbtUInt: |
| 443 | return sw::Shader::OPCODE_UMIN; |
| 444 | case EbtFloat: |
| 445 | default: |
| 446 | return op; |
| 447 | } |
| 448 | case sw::Shader::OPCODE_MAX: |
| 449 | switch(baseType) |
| 450 | { |
| 451 | case EbtInt: |
| 452 | return sw::Shader::OPCODE_IMAX; |
| 453 | case EbtUInt: |
| 454 | return sw::Shader::OPCODE_UMAX; |
| 455 | case EbtFloat: |
| 456 | default: |
| 457 | return op; |
| 458 | } |
| 459 | default: |
| 460 | return op; |
| 461 | } |
| 462 | } |
| 463 | |
| 464 | void OutputASM::visitSymbol(TIntermSymbol *symbol) |
| 465 | { |
| 466 | // Vertex varyings don't have to be actively used to successfully link |
| 467 | // against pixel shaders that use them. So make sure they're declared. |
| 468 | if(symbol->getQualifier() == EvqVaryingOut || symbol->getQualifier() == EvqInvariantVaryingOut || symbol->getQualifier() == EvqVertexOut) |
| 469 | { |
| 470 | if(symbol->getBasicType() != EbtInvariant) // Typeless declarations are not new varyings |
| 471 | { |
| 472 | declareVarying(symbol, -1); |
| 473 | } |
| 474 | } |
| 475 | |
| 476 | TInterfaceBlock* block = symbol->getType().getInterfaceBlock(); |
| 477 | // OpenGL ES 3.0.4 spec, section 2.12.6 Uniform Variables: |
| 478 | // "All members of a named uniform block declared with a shared or std140 layout qualifier |
| 479 | // are considered active, even if they are not referenced in any shader in the program. |
| 480 | // The uniform block itself is also considered active, even if no member of the block is referenced." |
| 481 | if(block && ((block->blockStorage() == EbsShared) || (block->blockStorage() == EbsStd140))) |
| 482 | { |
| 483 | uniformRegister(symbol); |
| 484 | } |
| 485 | } |
| 486 | |
| 487 | bool OutputASM::visitBinary(Visit visit, TIntermBinary *node) |
| 488 | { |
| 489 | if(currentScope != emitScope) |
| 490 | { |
| 491 | return false; |
| 492 | } |
| 493 | |
| 494 | TIntermTyped *result = node; |
| 495 | TIntermTyped *left = node->getLeft(); |
| 496 | TIntermTyped *right = node->getRight(); |
| 497 | const TType &leftType = left->getType(); |
| 498 | const TType &rightType = right->getType(); |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 499 | |
| 500 | if(isSamplerRegister(result)) |
| 501 | { |
| 502 | return false; // Don't traverse, the register index is determined statically |
| 503 | } |
| 504 | |
| 505 | switch(node->getOp()) |
| 506 | { |
| 507 | case EOpAssign: |
| 508 | if(visit == PostVisit) |
| 509 | { |
| 510 | assignLvalue(left, right); |
| 511 | copy(result, right); |
| 512 | } |
| 513 | break; |
| 514 | case EOpInitialize: |
| 515 | if(visit == PostVisit) |
| 516 | { |
| 517 | copy(left, right); |
| 518 | } |
| 519 | break; |
| 520 | case EOpMatrixTimesScalarAssign: |
| 521 | if(visit == PostVisit) |
| 522 | { |
| 523 | for(int i = 0; i < leftType.getNominalSize(); i++) |
| 524 | { |
| 525 | emit(sw::Shader::OPCODE_MUL, result, i, left, i, right); |
| 526 | } |
| 527 | |
| 528 | assignLvalue(left, result); |
| 529 | } |
| 530 | break; |
| 531 | case EOpVectorTimesMatrixAssign: |
| 532 | if(visit == PostVisit) |
| 533 | { |
| 534 | int size = leftType.getNominalSize(); |
| 535 | |
| 536 | for(int i = 0; i < size; i++) |
| 537 | { |
| 538 | Instruction *dot = emit(sw::Shader::OPCODE_DP(size), result, 0, left, 0, right, i); |
| 539 | dot->dst.mask = 1 << i; |
| 540 | } |
| 541 | |
| 542 | assignLvalue(left, result); |
| 543 | } |
| 544 | break; |
| 545 | case EOpMatrixTimesMatrixAssign: |
| 546 | if(visit == PostVisit) |
| 547 | { |
| 548 | int dim = leftType.getNominalSize(); |
| 549 | |
| 550 | for(int i = 0; i < dim; i++) |
| 551 | { |
| 552 | Instruction *mul = emit(sw::Shader::OPCODE_MUL, result, i, left, 0, right, i); |
| 553 | mul->src[1].swizzle = 0x00; |
| 554 | |
| 555 | for(int j = 1; j < dim; j++) |
| 556 | { |
| 557 | Instruction *mad = emit(sw::Shader::OPCODE_MAD, result, i, left, j, right, i, result, i); |
| 558 | mad->src[1].swizzle = j * 0x55; |
| 559 | } |
| 560 | } |
| 561 | |
| 562 | assignLvalue(left, result); |
| 563 | } |
| 564 | break; |
| 565 | case EOpIndexDirect: |
| 566 | if(visit == PostVisit) |
| 567 | { |
| 568 | int index = right->getAsConstantUnion()->getIConst(0); |
| 569 | |
| 570 | if(result->isMatrix() || result->isStruct() || result->isInterfaceBlock()) |
| 571 | { |
| 572 | ASSERT(left->isArray()); |
| 573 | copy(result, left, index * left->elementRegisterCount()); |
| 574 | } |
| 575 | else if(result->isRegister()) |
| 576 | { |
| 577 | int srcIndex = 0; |
| 578 | if(left->isRegister()) |
| 579 | { |
| 580 | srcIndex = 0; |
| 581 | } |
| 582 | else if(left->isArray()) |
| 583 | { |
| 584 | srcIndex = index * left->elementRegisterCount(); |
| 585 | } |
| 586 | else if(left->isMatrix()) |
| 587 | { |
| 588 | ASSERT(index < left->getNominalSize()); // FIXME: Report semantic error |
| 589 | srcIndex = index; |
| 590 | } |
| 591 | else UNREACHABLE(0); |
| 592 | |
| 593 | Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, 0, left, srcIndex); |
| 594 | |
| 595 | if(left->isRegister()) |
| 596 | { |
| 597 | mov->src[0].swizzle = index; |
| 598 | } |
| 599 | } |
| 600 | else UNREACHABLE(0); |
| 601 | } |
| 602 | break; |
| 603 | case EOpIndexIndirect: |
| 604 | if(visit == PostVisit) |
| 605 | { |
| 606 | if(left->isArray() || left->isMatrix()) |
| 607 | { |
| 608 | for(int index = 0; index < result->totalRegisterCount(); index++) |
| 609 | { |
| 610 | Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, index, left, index); |
| 611 | mov->dst.mask = writeMask(result, index); |
| 612 | |
| 613 | if(left->totalRegisterCount() > 1) |
| 614 | { |
| 615 | sw::Shader::SourceParameter relativeRegister; |
| 616 | argument(relativeRegister, right); |
| 617 | |
| 618 | mov->src[0].rel.type = relativeRegister.type; |
| 619 | mov->src[0].rel.index = relativeRegister.index; |
| 620 | mov->src[0].rel.scale = result->totalRegisterCount(); |
| 621 | mov->src[0].rel.deterministic = !(vertexShader && left->getQualifier() == EvqUniform); |
| 622 | } |
| 623 | } |
| 624 | } |
| 625 | else if(left->isRegister()) |
| 626 | { |
| 627 | emit(sw::Shader::OPCODE_EXTRACT, result, left, right); |
| 628 | } |
| 629 | else UNREACHABLE(0); |
| 630 | } |
| 631 | break; |
| 632 | case EOpIndexDirectStruct: |
| 633 | case EOpIndexDirectInterfaceBlock: |
| 634 | if(visit == PostVisit) |
| 635 | { |
| 636 | ASSERT(leftType.isStruct() || (leftType.isInterfaceBlock())); |
| 637 | |
| 638 | const TFieldList& fields = (node->getOp() == EOpIndexDirectStruct) ? |
| 639 | leftType.getStruct()->fields() : |
| 640 | leftType.getInterfaceBlock()->fields(); |
| 641 | int index = right->getAsConstantUnion()->getIConst(0); |
| 642 | int fieldOffset = 0; |
| 643 | |
| 644 | for(int i = 0; i < index; i++) |
| 645 | { |
| 646 | fieldOffset += fields[i]->type()->totalRegisterCount(); |
| 647 | } |
| 648 | |
| 649 | copy(result, left, fieldOffset); |
| 650 | } |
| 651 | break; |
| 652 | case EOpVectorSwizzle: |
| 653 | if(visit == PostVisit) |
| 654 | { |
| 655 | int swizzle = 0; |
| 656 | TIntermAggregate *components = right->getAsAggregate(); |
| 657 | |
| 658 | if(components) |
| 659 | { |
| 660 | TIntermSequence &sequence = components->getSequence(); |
| 661 | int component = 0; |
| 662 | |
| 663 | for(TIntermSequence::iterator sit = sequence.begin(); sit != sequence.end(); sit++) |
| 664 | { |
| 665 | TIntermConstantUnion *element = (*sit)->getAsConstantUnion(); |
| 666 | |
| 667 | if(element) |
| 668 | { |
| 669 | int i = element->getUnionArrayPointer()[0].getIConst(); |
| 670 | swizzle |= i << (component * 2); |
| 671 | component++; |
| 672 | } |
| 673 | else UNREACHABLE(0); |
| 674 | } |
| 675 | } |
| 676 | else UNREACHABLE(0); |
| 677 | |
| 678 | Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, left); |
| 679 | mov->src[0].swizzle = swizzle; |
| 680 | } |
| 681 | break; |
| 682 | case EOpAddAssign: if(visit == PostVisit) emitAssign(getOpcode(sw::Shader::OPCODE_ADD, result), result, left, left, right); break; |
| 683 | case EOpAdd: if(visit == PostVisit) emitBinary(getOpcode(sw::Shader::OPCODE_ADD, result), result, left, right); break; |
| 684 | case EOpSubAssign: if(visit == PostVisit) emitAssign(getOpcode(sw::Shader::OPCODE_SUB, result), result, left, left, right); break; |
| 685 | case EOpSub: if(visit == PostVisit) emitBinary(getOpcode(sw::Shader::OPCODE_SUB, result), result, left, right); break; |
| 686 | case EOpMulAssign: if(visit == PostVisit) emitAssign(getOpcode(sw::Shader::OPCODE_MUL, result), result, left, left, right); break; |
| 687 | case EOpMul: if(visit == PostVisit) emitBinary(getOpcode(sw::Shader::OPCODE_MUL, result), result, left, right); break; |
| 688 | case EOpDivAssign: if(visit == PostVisit) emitAssign(getOpcode(sw::Shader::OPCODE_DIV, result), result, left, left, right); break; |
| 689 | case EOpDiv: if(visit == PostVisit) emitBinary(getOpcode(sw::Shader::OPCODE_DIV, result), result, left, right); break; |
| 690 | case EOpIModAssign: if(visit == PostVisit) emitAssign(getOpcode(sw::Shader::OPCODE_IMOD, result), result, left, left, right); break; |
| 691 | case EOpIMod: if(visit == PostVisit) emitBinary(getOpcode(sw::Shader::OPCODE_IMOD, result), result, left, right); break; |
| 692 | case EOpBitShiftLeftAssign: if(visit == PostVisit) emitAssign(sw::Shader::OPCODE_SHL, result, left, left, right); break; |
| 693 | case EOpBitShiftLeft: if(visit == PostVisit) emitBinary(sw::Shader::OPCODE_SHL, result, left, right); break; |
| 694 | case EOpBitShiftRightAssign: if(visit == PostVisit) emitAssign(getOpcode(sw::Shader::OPCODE_ISHR, result), result, left, left, right); break; |
| 695 | case EOpBitShiftRight: if(visit == PostVisit) emitBinary(getOpcode(sw::Shader::OPCODE_ISHR, result), result, left, right); break; |
| 696 | case EOpBitwiseAndAssign: if(visit == PostVisit) emitAssign(sw::Shader::OPCODE_AND, result, left, left, right); break; |
| 697 | case EOpBitwiseAnd: if(visit == PostVisit) emitBinary(sw::Shader::OPCODE_AND, result, left, right); break; |
| 698 | case EOpBitwiseXorAssign: if(visit == PostVisit) emitAssign(sw::Shader::OPCODE_XOR, result, left, left, right); break; |
| 699 | case EOpBitwiseXor: if(visit == PostVisit) emitBinary(sw::Shader::OPCODE_XOR, result, left, right); break; |
| 700 | case EOpBitwiseOrAssign: if(visit == PostVisit) emitAssign(sw::Shader::OPCODE_OR, result, left, left, right); break; |
| 701 | case EOpBitwiseOr: if(visit == PostVisit) emitBinary(sw::Shader::OPCODE_OR, result, left, right); break; |
| 702 | case EOpEqual: |
| 703 | if(visit == PostVisit) |
| 704 | { |
| 705 | emitBinary(sw::Shader::OPCODE_EQ, result, left, right); |
| 706 | |
| 707 | for(int index = 1; index < left->totalRegisterCount(); index++) |
| 708 | { |
| 709 | Temporary equal(this); |
| 710 | emit(sw::Shader::OPCODE_EQ, &equal, 0, left, index, right, index); |
| 711 | emit(sw::Shader::OPCODE_AND, result, result, &equal); |
| 712 | } |
| 713 | } |
| 714 | break; |
| 715 | case EOpNotEqual: |
| 716 | if(visit == PostVisit) |
| 717 | { |
| 718 | emitBinary(sw::Shader::OPCODE_NE, result, left, right); |
| 719 | |
| 720 | for(int index = 1; index < left->totalRegisterCount(); index++) |
| 721 | { |
| 722 | Temporary notEqual(this); |
| 723 | emit(sw::Shader::OPCODE_NE, ¬Equal, 0, left, index, right, index); |
| 724 | emit(sw::Shader::OPCODE_OR, result, result, ¬Equal); |
| 725 | } |
| 726 | } |
| 727 | break; |
| 728 | case EOpLessThan: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_LT, result, left, right); break; |
| 729 | case EOpGreaterThan: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_GT, result, left, right); break; |
| 730 | case EOpLessThanEqual: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_LE, result, left, right); break; |
| 731 | case EOpGreaterThanEqual: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_GE, result, left, right); break; |
| 732 | case EOpVectorTimesScalarAssign: if(visit == PostVisit) emitAssign(getOpcode(sw::Shader::OPCODE_MUL, left), result, left, left, right); break; |
| 733 | case EOpVectorTimesScalar: if(visit == PostVisit) emit(getOpcode(sw::Shader::OPCODE_MUL, left), result, left, right); break; |
| 734 | case EOpMatrixTimesScalar: |
| 735 | if(visit == PostVisit) |
| 736 | { |
| 737 | if(left->isMatrix()) |
| 738 | { |
| 739 | for(int i = 0; i < leftType.getNominalSize(); i++) |
| 740 | { |
| 741 | emit(sw::Shader::OPCODE_MUL, result, i, left, i, right, 0); |
| 742 | } |
| 743 | } |
| 744 | else if(right->isMatrix()) |
| 745 | { |
| 746 | for(int i = 0; i < rightType.getNominalSize(); i++) |
| 747 | { |
| 748 | emit(sw::Shader::OPCODE_MUL, result, i, left, 0, right, i); |
| 749 | } |
| 750 | } |
| 751 | else UNREACHABLE(0); |
| 752 | } |
| 753 | break; |
| 754 | case EOpVectorTimesMatrix: |
| 755 | if(visit == PostVisit) |
| 756 | { |
| 757 | sw::Shader::Opcode dpOpcode = sw::Shader::OPCODE_DP(leftType.getNominalSize()); |
| 758 | |
| 759 | int size = rightType.getNominalSize(); |
| 760 | for(int i = 0; i < size; i++) |
| 761 | { |
| 762 | Instruction *dot = emit(dpOpcode, result, 0, left, 0, right, i); |
| 763 | dot->dst.mask = 1 << i; |
| 764 | } |
| 765 | } |
| 766 | break; |
| 767 | case EOpMatrixTimesVector: |
| 768 | if(visit == PostVisit) |
| 769 | { |
| 770 | Instruction *mul = emit(sw::Shader::OPCODE_MUL, result, left, right); |
| 771 | mul->src[1].swizzle = 0x00; |
| 772 | |
| 773 | int size = rightType.getNominalSize(); |
| 774 | for(int i = 1; i < size; i++) |
| 775 | { |
| 776 | Instruction *mad = emit(sw::Shader::OPCODE_MAD, result, 0, left, i, right, 0, result); |
| 777 | mad->src[1].swizzle = i * 0x55; |
| 778 | } |
| 779 | } |
| 780 | break; |
| 781 | case EOpMatrixTimesMatrix: |
| 782 | if(visit == PostVisit) |
| 783 | { |
| 784 | int dim = leftType.getNominalSize(); |
| 785 | |
| 786 | int size = rightType.getNominalSize(); |
| 787 | for(int i = 0; i < size; i++) |
| 788 | { |
| 789 | Instruction *mul = emit(sw::Shader::OPCODE_MUL, result, i, left, 0, right, i); |
| 790 | mul->src[1].swizzle = 0x00; |
| 791 | |
| 792 | for(int j = 1; j < dim; j++) |
| 793 | { |
| 794 | Instruction *mad = emit(sw::Shader::OPCODE_MAD, result, i, left, j, right, i, result, i); |
| 795 | mad->src[1].swizzle = j * 0x55; |
| 796 | } |
| 797 | } |
| 798 | } |
| 799 | break; |
| 800 | case EOpLogicalOr: |
| 801 | if(trivial(right, 6)) |
| 802 | { |
| 803 | if(visit == PostVisit) |
| 804 | { |
| 805 | emit(sw::Shader::OPCODE_OR, result, left, right); |
| 806 | } |
| 807 | } |
| 808 | else // Short-circuit evaluation |
| 809 | { |
| 810 | if(visit == InVisit) |
| 811 | { |
| 812 | emit(sw::Shader::OPCODE_MOV, result, left); |
| 813 | Instruction *ifnot = emit(sw::Shader::OPCODE_IF, 0, result); |
| 814 | ifnot->src[0].modifier = sw::Shader::MODIFIER_NOT; |
| 815 | } |
| 816 | else if(visit == PostVisit) |
| 817 | { |
| 818 | emit(sw::Shader::OPCODE_MOV, result, right); |
| 819 | emit(sw::Shader::OPCODE_ENDIF); |
| 820 | } |
| 821 | } |
| 822 | break; |
| 823 | case EOpLogicalXor: if(visit == PostVisit) emit(sw::Shader::OPCODE_XOR, result, left, right); break; |
| 824 | case EOpLogicalAnd: |
| 825 | if(trivial(right, 6)) |
| 826 | { |
| 827 | if(visit == PostVisit) |
| 828 | { |
| 829 | emit(sw::Shader::OPCODE_AND, result, left, right); |
| 830 | } |
| 831 | } |
| 832 | else // Short-circuit evaluation |
| 833 | { |
| 834 | if(visit == InVisit) |
| 835 | { |
| 836 | emit(sw::Shader::OPCODE_MOV, result, left); |
| 837 | emit(sw::Shader::OPCODE_IF, 0, result); |
| 838 | } |
| 839 | else if(visit == PostVisit) |
| 840 | { |
| 841 | emit(sw::Shader::OPCODE_MOV, result, right); |
| 842 | emit(sw::Shader::OPCODE_ENDIF); |
| 843 | } |
| 844 | } |
| 845 | break; |
| 846 | default: UNREACHABLE(node->getOp()); |
| 847 | } |
| 848 | |
| 849 | return true; |
| 850 | } |
| 851 | |
| 852 | void OutputASM::emitDeterminant(TIntermTyped *result, TIntermTyped *arg, int size, int col, int row, int outCol, int outRow) |
| 853 | { |
| 854 | switch(size) |
| 855 | { |
| 856 | case 1: // Used for cofactor computation only |
| 857 | { |
| 858 | // For a 2x2 matrix, the cofactor is simply a transposed move or negate |
| 859 | bool isMov = (row == col); |
| 860 | sw::Shader::Opcode op = isMov ? sw::Shader::OPCODE_MOV : sw::Shader::OPCODE_NEG; |
| 861 | Instruction *mov = emit(op, result, outCol, arg, isMov ? 1 - row : row); |
| 862 | mov->src[0].swizzle = 0x55 * (isMov ? 1 - col : col); |
| 863 | mov->dst.mask = 1 << outRow; |
| 864 | } |
| 865 | break; |
| 866 | case 2: |
| 867 | { |
| 868 | static const unsigned int swizzle[3] = { 0x99, 0x88, 0x44 }; // xy?? : yzyz, xzxz, xyxy |
| 869 | |
| 870 | bool isCofactor = (col >= 0) && (row >= 0); |
| 871 | int col0 = (isCofactor && (col <= 0)) ? 1 : 0; |
| 872 | int col1 = (isCofactor && (col <= 1)) ? 2 : 1; |
| 873 | bool negate = isCofactor && ((col & 0x01) ^ (row & 0x01)); |
| 874 | |
| 875 | Instruction *det = emit(sw::Shader::OPCODE_DET2, result, outCol, arg, negate ? col1 : col0, arg, negate ? col0 : col1); |
| 876 | det->src[0].swizzle = det->src[1].swizzle = swizzle[isCofactor ? row : 2]; |
| 877 | det->dst.mask = 1 << outRow; |
| 878 | } |
| 879 | break; |
| 880 | case 3: |
| 881 | { |
| 882 | static const unsigned int swizzle[4] = { 0xF9, 0xF8, 0xF4, 0xE4 }; // xyz? : yzww, xzww, xyww, xyzw |
| 883 | |
| 884 | bool isCofactor = (col >= 0) && (row >= 0); |
| 885 | int col0 = (isCofactor && (col <= 0)) ? 1 : 0; |
| 886 | int col1 = (isCofactor && (col <= 1)) ? 2 : 1; |
| 887 | int col2 = (isCofactor && (col <= 2)) ? 3 : 2; |
| 888 | bool negate = isCofactor && ((col & 0x01) ^ (row & 0x01)); |
| 889 | |
| 890 | Instruction *det = emit(sw::Shader::OPCODE_DET3, result, outCol, arg, col0, arg, negate ? col2 : col1, arg, negate ? col1 : col2); |
| 891 | det->src[0].swizzle = det->src[1].swizzle = det->src[2].swizzle = swizzle[isCofactor ? row : 3]; |
| 892 | det->dst.mask = 1 << outRow; |
| 893 | } |
| 894 | break; |
| 895 | case 4: |
| 896 | { |
| 897 | Instruction *det = emit(sw::Shader::OPCODE_DET4, result, outCol, arg, 0, arg, 1, arg, 2, arg, 3); |
| 898 | det->dst.mask = 1 << outRow; |
| 899 | } |
| 900 | break; |
| 901 | default: |
| 902 | UNREACHABLE(size); |
| 903 | break; |
| 904 | } |
| 905 | } |
| 906 | |
| 907 | bool OutputASM::visitUnary(Visit visit, TIntermUnary *node) |
| 908 | { |
| 909 | if(currentScope != emitScope) |
| 910 | { |
| 911 | return false; |
| 912 | } |
| 913 | |
| 914 | TIntermTyped *result = node; |
| 915 | TIntermTyped *arg = node->getOperand(); |
| 916 | TBasicType basicType = arg->getType().getBasicType(); |
| 917 | |
| 918 | union |
| 919 | { |
| 920 | float f; |
| 921 | int i; |
| 922 | } one_value; |
| 923 | |
| 924 | if(basicType == EbtInt || basicType == EbtUInt) |
| 925 | { |
| 926 | one_value.i = 1; |
| 927 | } |
| 928 | else |
| 929 | { |
| 930 | one_value.f = 1.0f; |
| 931 | } |
| 932 | |
| 933 | Constant one(one_value.f, one_value.f, one_value.f, one_value.f); |
| 934 | Constant rad(1.74532925e-2f, 1.74532925e-2f, 1.74532925e-2f, 1.74532925e-2f); |
| 935 | Constant deg(5.72957795e+1f, 5.72957795e+1f, 5.72957795e+1f, 5.72957795e+1f); |
| 936 | |
| 937 | switch(node->getOp()) |
| 938 | { |
| 939 | case EOpNegative: |
| 940 | if(visit == PostVisit) |
| 941 | { |
| 942 | sw::Shader::Opcode negOpcode = getOpcode(sw::Shader::OPCODE_NEG, arg); |
| 943 | for(int index = 0; index < arg->totalRegisterCount(); index++) |
| 944 | { |
| 945 | emit(negOpcode, result, index, arg, index); |
| 946 | } |
| 947 | } |
| 948 | break; |
| 949 | case EOpVectorLogicalNot: if(visit == PostVisit) emit(sw::Shader::OPCODE_NOT, result, arg); break; |
| 950 | case EOpLogicalNot: if(visit == PostVisit) emit(sw::Shader::OPCODE_NOT, result, arg); break; |
| 951 | case EOpPostIncrement: |
| 952 | if(visit == PostVisit) |
| 953 | { |
| 954 | copy(result, arg); |
| 955 | |
| 956 | sw::Shader::Opcode addOpcode = getOpcode(sw::Shader::OPCODE_ADD, arg); |
| 957 | for(int index = 0; index < arg->totalRegisterCount(); index++) |
| 958 | { |
| 959 | emit(addOpcode, arg, index, arg, index, &one); |
| 960 | } |
| 961 | |
| 962 | assignLvalue(arg, arg); |
| 963 | } |
| 964 | break; |
| 965 | case EOpPostDecrement: |
| 966 | if(visit == PostVisit) |
| 967 | { |
| 968 | copy(result, arg); |
| 969 | |
| 970 | sw::Shader::Opcode subOpcode = getOpcode(sw::Shader::OPCODE_SUB, arg); |
| 971 | for(int index = 0; index < arg->totalRegisterCount(); index++) |
| 972 | { |
| 973 | emit(subOpcode, arg, index, arg, index, &one); |
| 974 | } |
| 975 | |
| 976 | assignLvalue(arg, arg); |
| 977 | } |
| 978 | break; |
| 979 | case EOpPreIncrement: |
| 980 | if(visit == PostVisit) |
| 981 | { |
| 982 | sw::Shader::Opcode addOpcode = getOpcode(sw::Shader::OPCODE_ADD, arg); |
| 983 | for(int index = 0; index < arg->totalRegisterCount(); index++) |
| 984 | { |
| 985 | emit(addOpcode, result, index, arg, index, &one); |
| 986 | } |
| 987 | |
| 988 | assignLvalue(arg, result); |
| 989 | } |
| 990 | break; |
| 991 | case EOpPreDecrement: |
| 992 | if(visit == PostVisit) |
| 993 | { |
| 994 | sw::Shader::Opcode subOpcode = getOpcode(sw::Shader::OPCODE_SUB, arg); |
| 995 | for(int index = 0; index < arg->totalRegisterCount(); index++) |
| 996 | { |
| 997 | emit(subOpcode, result, index, arg, index, &one); |
| 998 | } |
| 999 | |
| 1000 | assignLvalue(arg, result); |
| 1001 | } |
| 1002 | break; |
| 1003 | case EOpRadians: if(visit == PostVisit) emit(sw::Shader::OPCODE_MUL, result, arg, &rad); break; |
| 1004 | case EOpDegrees: if(visit == PostVisit) emit(sw::Shader::OPCODE_MUL, result, arg, °); break; |
| 1005 | case EOpSin: if(visit == PostVisit) emit(sw::Shader::OPCODE_SIN, result, arg); break; |
| 1006 | case EOpCos: if(visit == PostVisit) emit(sw::Shader::OPCODE_COS, result, arg); break; |
| 1007 | case EOpTan: if(visit == PostVisit) emit(sw::Shader::OPCODE_TAN, result, arg); break; |
| 1008 | case EOpAsin: if(visit == PostVisit) emit(sw::Shader::OPCODE_ASIN, result, arg); break; |
| 1009 | case EOpAcos: if(visit == PostVisit) emit(sw::Shader::OPCODE_ACOS, result, arg); break; |
| 1010 | case EOpAtan: if(visit == PostVisit) emit(sw::Shader::OPCODE_ATAN, result, arg); break; |
| 1011 | case EOpSinh: if(visit == PostVisit) emit(sw::Shader::OPCODE_SINH, result, arg); break; |
| 1012 | case EOpCosh: if(visit == PostVisit) emit(sw::Shader::OPCODE_COSH, result, arg); break; |
| 1013 | case EOpTanh: if(visit == PostVisit) emit(sw::Shader::OPCODE_TANH, result, arg); break; |
| 1014 | case EOpAsinh: if(visit == PostVisit) emit(sw::Shader::OPCODE_ASINH, result, arg); break; |
| 1015 | case EOpAcosh: if(visit == PostVisit) emit(sw::Shader::OPCODE_ACOSH, result, arg); break; |
| 1016 | case EOpAtanh: if(visit == PostVisit) emit(sw::Shader::OPCODE_ATANH, result, arg); break; |
| 1017 | case EOpExp: if(visit == PostVisit) emit(sw::Shader::OPCODE_EXP, result, arg); break; |
| 1018 | case EOpLog: if(visit == PostVisit) emit(sw::Shader::OPCODE_LOG, result, arg); break; |
| 1019 | case EOpExp2: if(visit == PostVisit) emit(sw::Shader::OPCODE_EXP2, result, arg); break; |
| 1020 | case EOpLog2: if(visit == PostVisit) emit(sw::Shader::OPCODE_LOG2, result, arg); break; |
| 1021 | case EOpSqrt: if(visit == PostVisit) emit(sw::Shader::OPCODE_SQRT, result, arg); break; |
| 1022 | case EOpInverseSqrt: if(visit == PostVisit) emit(sw::Shader::OPCODE_RSQ, result, arg); break; |
| 1023 | case EOpAbs: if(visit == PostVisit) emit(getOpcode(sw::Shader::OPCODE_ABS, result), result, arg); break; |
| 1024 | case EOpSign: if(visit == PostVisit) emit(getOpcode(sw::Shader::OPCODE_SGN, result), result, arg); break; |
| 1025 | case EOpFloor: if(visit == PostVisit) emit(sw::Shader::OPCODE_FLOOR, result, arg); break; |
| 1026 | case EOpTrunc: if(visit == PostVisit) emit(sw::Shader::OPCODE_TRUNC, result, arg); break; |
| 1027 | case EOpRound: if(visit == PostVisit) emit(sw::Shader::OPCODE_ROUND, result, arg); break; |
| 1028 | case EOpRoundEven: if(visit == PostVisit) emit(sw::Shader::OPCODE_ROUNDEVEN, result, arg); break; |
| 1029 | case EOpCeil: if(visit == PostVisit) emit(sw::Shader::OPCODE_CEIL, result, arg, result); break; |
| 1030 | case EOpFract: if(visit == PostVisit) emit(sw::Shader::OPCODE_FRC, result, arg); break; |
| 1031 | case EOpIsNan: if(visit == PostVisit) emit(sw::Shader::OPCODE_ISNAN, result, arg); break; |
| 1032 | case EOpIsInf: if(visit == PostVisit) emit(sw::Shader::OPCODE_ISINF, result, arg); break; |
| 1033 | case EOpLength: if(visit == PostVisit) emit(sw::Shader::OPCODE_LEN(dim(arg)), result, arg); break; |
| 1034 | case EOpNormalize: if(visit == PostVisit) emit(sw::Shader::OPCODE_NRM(dim(arg)), result, arg); break; |
| 1035 | case EOpDFdx: if(visit == PostVisit) emit(sw::Shader::OPCODE_DFDX, result, arg); break; |
| 1036 | case EOpDFdy: if(visit == PostVisit) emit(sw::Shader::OPCODE_DFDY, result, arg); break; |
| 1037 | case EOpFwidth: if(visit == PostVisit) emit(sw::Shader::OPCODE_FWIDTH, result, arg); break; |
| 1038 | case EOpAny: if(visit == PostVisit) emit(sw::Shader::OPCODE_ANY, result, arg); break; |
| 1039 | case EOpAll: if(visit == PostVisit) emit(sw::Shader::OPCODE_ALL, result, arg); break; |
| 1040 | case EOpFloatBitsToInt: if(visit == PostVisit) emit(sw::Shader::OPCODE_FLOATBITSTOINT, result, arg); break; |
| 1041 | case EOpFloatBitsToUint: if(visit == PostVisit) emit(sw::Shader::OPCODE_FLOATBITSTOUINT, result, arg); break; |
| 1042 | case EOpIntBitsToFloat: if(visit == PostVisit) emit(sw::Shader::OPCODE_INTBITSTOFLOAT, result, arg); break; |
| 1043 | case EOpUintBitsToFloat: if(visit == PostVisit) emit(sw::Shader::OPCODE_UINTBITSTOFLOAT, result, arg); break; |
| 1044 | case EOpPackSnorm2x16: if(visit == PostVisit) emit(sw::Shader::OPCODE_PACKSNORM2x16, result, arg); break; |
| 1045 | case EOpPackUnorm2x16: if(visit == PostVisit) emit(sw::Shader::OPCODE_PACKUNORM2x16, result, arg); break; |
| 1046 | case EOpPackHalf2x16: if(visit == PostVisit) emit(sw::Shader::OPCODE_PACKHALF2x16, result, arg); break; |
| 1047 | case EOpUnpackSnorm2x16: if(visit == PostVisit) emit(sw::Shader::OPCODE_UNPACKSNORM2x16, result, arg); break; |
| 1048 | case EOpUnpackUnorm2x16: if(visit == PostVisit) emit(sw::Shader::OPCODE_UNPACKUNORM2x16, result, arg); break; |
| 1049 | case EOpUnpackHalf2x16: if(visit == PostVisit) emit(sw::Shader::OPCODE_UNPACKHALF2x16, result, arg); break; |
| 1050 | case EOpTranspose: |
| 1051 | if(visit == PostVisit) |
| 1052 | { |
| 1053 | int numCols = arg->getNominalSize(); |
| 1054 | int numRows = arg->getSecondarySize(); |
| 1055 | for(int i = 0; i < numCols; ++i) |
| 1056 | { |
| 1057 | for(int j = 0; j < numRows; ++j) |
| 1058 | { |
| 1059 | Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, j, arg, i); |
| 1060 | mov->src[0].swizzle = 0x55 * j; |
| 1061 | mov->dst.mask = 1 << i; |
| 1062 | } |
| 1063 | } |
| 1064 | } |
| 1065 | break; |
| 1066 | case EOpDeterminant: |
| 1067 | if(visit == PostVisit) |
| 1068 | { |
| 1069 | int size = arg->getNominalSize(); |
| 1070 | ASSERT(size == arg->getSecondarySize()); |
| 1071 | |
| 1072 | emitDeterminant(result, arg, size); |
| 1073 | } |
| 1074 | break; |
| 1075 | case EOpInverse: |
| 1076 | if(visit == PostVisit) |
| 1077 | { |
| 1078 | int size = arg->getNominalSize(); |
| 1079 | ASSERT(size == arg->getSecondarySize()); |
| 1080 | |
| 1081 | // Compute transposed matrix of cofactors |
| 1082 | for(int i = 0; i < size; ++i) |
| 1083 | { |
| 1084 | for(int j = 0; j < size; ++j) |
| 1085 | { |
| 1086 | // For a 2x2 matrix, the cofactor is simply a transposed move or negate |
| 1087 | // For a 3x3 or 4x4 matrix, the cofactor is a transposed determinant |
| 1088 | emitDeterminant(result, arg, size - 1, j, i, i, j); |
| 1089 | } |
| 1090 | } |
| 1091 | |
| 1092 | // Compute 1 / determinant |
| 1093 | Temporary invDet(this); |
| 1094 | emitDeterminant(&invDet, arg, size); |
| 1095 | Constant one(1.0f, 1.0f, 1.0f, 1.0f); |
| 1096 | Instruction *div = emit(sw::Shader::OPCODE_DIV, &invDet, &one, &invDet); |
| 1097 | div->src[1].swizzle = 0x00; // xxxx |
| 1098 | |
| 1099 | // Divide transposed matrix of cofactors by determinant |
| 1100 | for(int i = 0; i < size; ++i) |
| 1101 | { |
| 1102 | emit(sw::Shader::OPCODE_MUL, result, i, result, i, &invDet); |
| 1103 | } |
| 1104 | } |
| 1105 | break; |
| 1106 | default: UNREACHABLE(node->getOp()); |
| 1107 | } |
| 1108 | |
| 1109 | return true; |
| 1110 | } |
| 1111 | |
| 1112 | bool OutputASM::visitAggregate(Visit visit, TIntermAggregate *node) |
| 1113 | { |
| 1114 | if(currentScope != emitScope && node->getOp() != EOpFunction && node->getOp() != EOpSequence) |
| 1115 | { |
| 1116 | return false; |
| 1117 | } |
| 1118 | |
| 1119 | Constant zero(0.0f, 0.0f, 0.0f, 0.0f); |
| 1120 | |
| 1121 | TIntermTyped *result = node; |
| 1122 | const TType &resultType = node->getType(); |
| 1123 | TIntermSequence &arg = node->getSequence(); |
| 1124 | size_t argumentCount = arg.size(); |
| 1125 | |
| 1126 | switch(node->getOp()) |
| 1127 | { |
| 1128 | case EOpSequence: break; |
| 1129 | case EOpDeclaration: break; |
| 1130 | case EOpInvariantDeclaration: break; |
| 1131 | case EOpPrototype: break; |
| 1132 | case EOpComma: |
| 1133 | if(visit == PostVisit) |
| 1134 | { |
| 1135 | copy(result, arg[1]); |
| 1136 | } |
| 1137 | break; |
| 1138 | case EOpFunction: |
| 1139 | if(visit == PreVisit) |
| 1140 | { |
| 1141 | const TString &name = node->getName(); |
| 1142 | |
| 1143 | if(emitScope == FUNCTION) |
| 1144 | { |
| 1145 | if(functionArray.size() > 1) // No need for a label when there's only main() |
| 1146 | { |
| 1147 | Instruction *label = emit(sw::Shader::OPCODE_LABEL); |
| 1148 | label->dst.type = sw::Shader::PARAMETER_LABEL; |
| 1149 | |
| 1150 | const Function *function = findFunction(name); |
| 1151 | ASSERT(function); // Should have been added during global pass |
| 1152 | label->dst.index = function->label; |
| 1153 | currentFunction = function->label; |
| 1154 | } |
| 1155 | } |
| 1156 | else if(emitScope == GLOBAL) |
| 1157 | { |
| 1158 | if(name != "main(") |
| 1159 | { |
| 1160 | TIntermSequence &arguments = node->getSequence()[0]->getAsAggregate()->getSequence(); |
| 1161 | functionArray.push_back(Function(functionArray.size(), name, &arguments, node)); |
| 1162 | } |
| 1163 | } |
| 1164 | else UNREACHABLE(emitScope); |
| 1165 | |
| 1166 | currentScope = FUNCTION; |
| 1167 | } |
| 1168 | else if(visit == PostVisit) |
| 1169 | { |
| 1170 | if(emitScope == FUNCTION) |
| 1171 | { |
| 1172 | if(functionArray.size() > 1) // No need to return when there's only main() |
| 1173 | { |
| 1174 | emit(sw::Shader::OPCODE_RET); |
| 1175 | } |
| 1176 | } |
| 1177 | |
| 1178 | currentScope = GLOBAL; |
| 1179 | } |
| 1180 | break; |
| 1181 | case EOpFunctionCall: |
| 1182 | if(visit == PostVisit) |
| 1183 | { |
| 1184 | if(node->isUserDefined()) |
| 1185 | { |
| 1186 | const TString &name = node->getName(); |
| 1187 | const Function *function = findFunction(name); |
| 1188 | |
| 1189 | if(!function) |
| 1190 | { |
| 1191 | mContext.error(node->getLine(), "function definition not found", name.c_str()); |
| 1192 | return false; |
| 1193 | } |
| 1194 | |
| 1195 | TIntermSequence &arguments = *function->arg; |
| 1196 | |
| 1197 | for(size_t i = 0; i < argumentCount; i++) |
| 1198 | { |
| 1199 | TIntermTyped *in = arguments[i]->getAsTyped(); |
| 1200 | |
| 1201 | if(in->getQualifier() == EvqIn || |
| 1202 | in->getQualifier() == EvqInOut || |
| 1203 | in->getQualifier() == EvqConstReadOnly) |
| 1204 | { |
| 1205 | copy(in, arg[i]); |
| 1206 | } |
| 1207 | } |
| 1208 | |
| 1209 | Instruction *call = emit(sw::Shader::OPCODE_CALL); |
| 1210 | call->dst.type = sw::Shader::PARAMETER_LABEL; |
| 1211 | call->dst.index = function->label; |
| 1212 | |
| 1213 | if(function->ret && function->ret->getType().getBasicType() != EbtVoid) |
| 1214 | { |
| 1215 | copy(result, function->ret); |
| 1216 | } |
| 1217 | |
| 1218 | for(size_t i = 0; i < argumentCount; i++) |
| 1219 | { |
| 1220 | TIntermTyped *argument = arguments[i]->getAsTyped(); |
| 1221 | TIntermTyped *out = arg[i]->getAsTyped(); |
| 1222 | |
| 1223 | if(argument->getQualifier() == EvqOut || |
| 1224 | argument->getQualifier() == EvqInOut) |
| 1225 | { |
Nicolas Capens | 5da2d3f | 2016-06-11 00:41:49 -0400 | [diff] [blame] | 1226 | assignLvalue(out, argument); |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1227 | } |
| 1228 | } |
| 1229 | } |
| 1230 | else |
| 1231 | { |
| 1232 | const TextureFunction textureFunction(node->getName()); |
| 1233 | TIntermTyped *t = arg[1]->getAsTyped(); |
| 1234 | |
| 1235 | Temporary coord(this); |
| 1236 | |
| 1237 | if(textureFunction.proj) |
| 1238 | { |
Nicolas Capens | 0484c79 | 2016-06-13 22:02:36 -0400 | [diff] [blame] | 1239 | Instruction *rcp = emit(sw::Shader::OPCODE_RCPX, &coord, arg[1]); |
| 1240 | rcp->src[0].swizzle = 0x55 * (t->getNominalSize() - 1); |
| 1241 | rcp->dst.mask = 0x7; |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1242 | |
Nicolas Capens | 0484c79 | 2016-06-13 22:02:36 -0400 | [diff] [blame] | 1243 | Instruction *mul = emit(sw::Shader::OPCODE_MUL, &coord, arg[1], &coord); |
| 1244 | mul->dst.mask = 0x7; |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1245 | } |
| 1246 | else |
| 1247 | { |
| 1248 | emit(sw::Shader::OPCODE_MOV, &coord, arg[1]); |
| 1249 | } |
| 1250 | |
| 1251 | switch(textureFunction.method) |
| 1252 | { |
| 1253 | case TextureFunction::IMPLICIT: |
| 1254 | { |
| 1255 | TIntermNode* offset = textureFunction.offset ? arg[2] : 0; |
| 1256 | |
| 1257 | if(argumentCount == 2 || (textureFunction.offset && argumentCount == 3)) |
| 1258 | { |
Alexis Hetu | 7208e93 | 2016-06-02 11:19:24 -0400 | [diff] [blame] | 1259 | emit(textureFunction.offset ? sw::Shader::OPCODE_TEXOFFSET : sw::Shader::OPCODE_TEX, |
| 1260 | result, &coord, arg[0], offset); |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1261 | } |
| 1262 | else if(argumentCount == 3 || (textureFunction.offset && argumentCount == 4)) // bias |
| 1263 | { |
| 1264 | Instruction *bias = emit(sw::Shader::OPCODE_MOV, &coord, arg[textureFunction.offset ? 3 : 2]); |
| 1265 | bias->dst.mask = 0x8; |
| 1266 | |
| 1267 | Instruction *tex = emit(textureFunction.offset ? sw::Shader::OPCODE_TEXOFFSET : sw::Shader::OPCODE_TEX, |
| 1268 | result, &coord, arg[0], offset); // FIXME: Implement an efficient TEXLDB instruction |
| 1269 | tex->bias = true; |
| 1270 | } |
| 1271 | else UNREACHABLE(argumentCount); |
| 1272 | } |
| 1273 | break; |
| 1274 | case TextureFunction::LOD: |
| 1275 | { |
| 1276 | Instruction *lod = emit(sw::Shader::OPCODE_MOV, &coord, arg[2]); |
| 1277 | lod->dst.mask = 0x8; |
| 1278 | |
| 1279 | emit(textureFunction.offset ? sw::Shader::OPCODE_TEXLDLOFFSET : sw::Shader::OPCODE_TEXLDL, |
| 1280 | result, &coord, arg[0], textureFunction.offset ? arg[3] : nullptr); |
| 1281 | } |
| 1282 | break; |
| 1283 | case TextureFunction::FETCH: |
| 1284 | { |
| 1285 | if(argumentCount == 3 || (textureFunction.offset && argumentCount == 4)) |
| 1286 | { |
Meng-Lin Wu | 9d62c48 | 2016-06-14 11:11:25 -0400 | [diff] [blame] | 1287 | Instruction *lod = emit(sw::Shader::OPCODE_MOV, &coord, arg[2]); |
| 1288 | lod->dst.mask = 0x8; |
| 1289 | |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1290 | TIntermNode *offset = textureFunction.offset ? arg[3] : nullptr; |
| 1291 | |
| 1292 | emit(textureFunction.offset ? sw::Shader::OPCODE_TEXELFETCHOFFSET : sw::Shader::OPCODE_TEXELFETCH, |
Meng-Lin Wu | 9d62c48 | 2016-06-14 11:11:25 -0400 | [diff] [blame] | 1293 | result, &coord, arg[0], offset); |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1294 | } |
| 1295 | else UNREACHABLE(argumentCount); |
| 1296 | } |
| 1297 | break; |
| 1298 | case TextureFunction::GRAD: |
| 1299 | { |
| 1300 | if(argumentCount == 4 || (textureFunction.offset && argumentCount == 5)) |
| 1301 | { |
| 1302 | TIntermNode *offset = textureFunction.offset ? arg[4] : nullptr; |
| 1303 | |
| 1304 | emit(textureFunction.offset ? sw::Shader::OPCODE_TEXGRADOFFSET : sw::Shader::OPCODE_TEXGRAD, |
| 1305 | result, &coord, arg[0], arg[2], arg[3], offset); |
| 1306 | } |
| 1307 | else UNREACHABLE(argumentCount); |
| 1308 | } |
| 1309 | break; |
| 1310 | case TextureFunction::SIZE: |
| 1311 | emit(sw::Shader::OPCODE_TEXSIZE, result, arg[1], arg[0]); |
| 1312 | break; |
| 1313 | default: |
| 1314 | UNREACHABLE(textureFunction.method); |
| 1315 | } |
| 1316 | } |
| 1317 | } |
| 1318 | break; |
| 1319 | case EOpParameters: |
| 1320 | break; |
| 1321 | case EOpConstructFloat: |
| 1322 | case EOpConstructVec2: |
| 1323 | case EOpConstructVec3: |
| 1324 | case EOpConstructVec4: |
| 1325 | case EOpConstructBool: |
| 1326 | case EOpConstructBVec2: |
| 1327 | case EOpConstructBVec3: |
| 1328 | case EOpConstructBVec4: |
| 1329 | case EOpConstructInt: |
| 1330 | case EOpConstructIVec2: |
| 1331 | case EOpConstructIVec3: |
| 1332 | case EOpConstructIVec4: |
| 1333 | case EOpConstructUInt: |
| 1334 | case EOpConstructUVec2: |
| 1335 | case EOpConstructUVec3: |
| 1336 | case EOpConstructUVec4: |
| 1337 | if(visit == PostVisit) |
| 1338 | { |
| 1339 | int component = 0; |
| 1340 | |
| 1341 | for(size_t i = 0; i < argumentCount; i++) |
| 1342 | { |
| 1343 | TIntermTyped *argi = arg[i]->getAsTyped(); |
| 1344 | int size = argi->getNominalSize(); |
| 1345 | |
| 1346 | if(!argi->isMatrix()) |
| 1347 | { |
| 1348 | Instruction *mov = emitCast(result, argi); |
| 1349 | mov->dst.mask = (0xF << component) & 0xF; |
| 1350 | mov->src[0].swizzle = readSwizzle(argi, size) << (component * 2); |
| 1351 | |
| 1352 | component += size; |
| 1353 | } |
| 1354 | else // Matrix |
| 1355 | { |
| 1356 | int column = 0; |
| 1357 | |
| 1358 | while(component < resultType.getNominalSize()) |
| 1359 | { |
| 1360 | Instruction *mov = emitCast(result, 0, argi, column); |
| 1361 | mov->dst.mask = (0xF << component) & 0xF; |
| 1362 | mov->src[0].swizzle = readSwizzle(argi, size) << (component * 2); |
| 1363 | |
| 1364 | column++; |
| 1365 | component += size; |
| 1366 | } |
| 1367 | } |
| 1368 | } |
| 1369 | } |
| 1370 | break; |
| 1371 | case EOpConstructMat2: |
| 1372 | case EOpConstructMat2x3: |
| 1373 | case EOpConstructMat2x4: |
| 1374 | case EOpConstructMat3x2: |
| 1375 | case EOpConstructMat3: |
| 1376 | case EOpConstructMat3x4: |
| 1377 | case EOpConstructMat4x2: |
| 1378 | case EOpConstructMat4x3: |
| 1379 | case EOpConstructMat4: |
| 1380 | if(visit == PostVisit) |
| 1381 | { |
| 1382 | TIntermTyped *arg0 = arg[0]->getAsTyped(); |
| 1383 | const int outCols = result->getNominalSize(); |
| 1384 | const int outRows = result->getSecondarySize(); |
| 1385 | |
| 1386 | if(arg0->isScalar() && arg.size() == 1) // Construct scale matrix |
| 1387 | { |
| 1388 | for(int i = 0; i < outCols; i++) |
| 1389 | { |
Alexis Hetu | 7208e93 | 2016-06-02 11:19:24 -0400 | [diff] [blame] | 1390 | emit(sw::Shader::OPCODE_MOV, result, i, &zero); |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1391 | Instruction *mov = emitCast(result, i, arg0, 0); |
| 1392 | mov->dst.mask = 1 << i; |
| 1393 | ASSERT(mov->src[0].swizzle == 0x00); |
| 1394 | } |
| 1395 | } |
| 1396 | else if(arg0->isMatrix()) |
| 1397 | { |
| 1398 | const int inCols = arg0->getNominalSize(); |
| 1399 | const int inRows = arg0->getSecondarySize(); |
| 1400 | |
| 1401 | for(int i = 0; i < outCols; i++) |
| 1402 | { |
| 1403 | if(i >= inCols || outRows > inRows) |
| 1404 | { |
| 1405 | // Initialize to identity matrix |
| 1406 | Constant col((i == 0 ? 1.0f : 0.0f), (i == 1 ? 1.0f : 0.0f), (i == 2 ? 1.0f : 0.0f), (i == 3 ? 1.0f : 0.0f)); |
Alexis Hetu | 7208e93 | 2016-06-02 11:19:24 -0400 | [diff] [blame] | 1407 | emitCast(result, i, &col, 0); |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1408 | } |
| 1409 | |
| 1410 | if(i < inCols) |
| 1411 | { |
| 1412 | Instruction *mov = emitCast(result, i, arg0, i); |
| 1413 | mov->dst.mask = 0xF >> (4 - inRows); |
| 1414 | } |
| 1415 | } |
| 1416 | } |
| 1417 | else |
| 1418 | { |
| 1419 | int column = 0; |
| 1420 | int row = 0; |
| 1421 | |
| 1422 | for(size_t i = 0; i < argumentCount; i++) |
| 1423 | { |
| 1424 | TIntermTyped *argi = arg[i]->getAsTyped(); |
| 1425 | int size = argi->getNominalSize(); |
| 1426 | int element = 0; |
| 1427 | |
| 1428 | while(element < size) |
| 1429 | { |
| 1430 | Instruction *mov = emitCast(result, column, argi, 0); |
| 1431 | mov->dst.mask = (0xF << row) & 0xF; |
| 1432 | mov->src[0].swizzle = (readSwizzle(argi, size) << (row * 2)) + 0x55 * element; |
| 1433 | |
| 1434 | int end = row + size - element; |
| 1435 | column = end >= outRows ? column + 1 : column; |
| 1436 | element = element + outRows - row; |
| 1437 | row = end >= outRows ? 0 : end; |
| 1438 | } |
| 1439 | } |
| 1440 | } |
| 1441 | } |
| 1442 | break; |
| 1443 | case EOpConstructStruct: |
| 1444 | if(visit == PostVisit) |
| 1445 | { |
| 1446 | int offset = 0; |
| 1447 | for(size_t i = 0; i < argumentCount; i++) |
| 1448 | { |
| 1449 | TIntermTyped *argi = arg[i]->getAsTyped(); |
| 1450 | int size = argi->totalRegisterCount(); |
| 1451 | |
| 1452 | for(int index = 0; index < size; index++) |
| 1453 | { |
| 1454 | Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, index + offset, argi, index); |
| 1455 | mov->dst.mask = writeMask(result, offset + index); |
| 1456 | } |
| 1457 | |
| 1458 | offset += size; |
| 1459 | } |
| 1460 | } |
| 1461 | break; |
| 1462 | case EOpLessThan: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_LT, result, arg[0], arg[1]); break; |
| 1463 | case EOpGreaterThan: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_GT, result, arg[0], arg[1]); break; |
| 1464 | case EOpLessThanEqual: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_LE, result, arg[0], arg[1]); break; |
| 1465 | case EOpGreaterThanEqual: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_GE, result, arg[0], arg[1]); break; |
| 1466 | case EOpVectorEqual: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_EQ, result, arg[0], arg[1]); break; |
| 1467 | case EOpVectorNotEqual: if(visit == PostVisit) emitCmp(sw::Shader::CONTROL_NE, result, arg[0], arg[1]); break; |
| 1468 | case EOpMod: if(visit == PostVisit) emit(sw::Shader::OPCODE_MOD, result, arg[0], arg[1]); break; |
| 1469 | case EOpModf: |
| 1470 | if(visit == PostVisit) |
| 1471 | { |
| 1472 | TIntermTyped* arg1 = arg[1]->getAsTyped(); |
| 1473 | emit(sw::Shader::OPCODE_TRUNC, arg1, arg[0]); |
| 1474 | assignLvalue(arg1, arg1); |
| 1475 | emitBinary(sw::Shader::OPCODE_SUB, result, arg[0], arg1); |
| 1476 | } |
| 1477 | break; |
| 1478 | case EOpPow: if(visit == PostVisit) emit(sw::Shader::OPCODE_POW, result, arg[0], arg[1]); break; |
| 1479 | case EOpAtan: if(visit == PostVisit) emit(sw::Shader::OPCODE_ATAN2, result, arg[0], arg[1]); break; |
| 1480 | case EOpMin: if(visit == PostVisit) emit(getOpcode(sw::Shader::OPCODE_MIN, result), result, arg[0], arg[1]); break; |
| 1481 | case EOpMax: if(visit == PostVisit) emit(getOpcode(sw::Shader::OPCODE_MAX, result), result, arg[0], arg[1]); break; |
| 1482 | case EOpClamp: |
| 1483 | if(visit == PostVisit) |
| 1484 | { |
| 1485 | emit(getOpcode(sw::Shader::OPCODE_MAX, result), result, arg[0], arg[1]); |
| 1486 | emit(getOpcode(sw::Shader::OPCODE_MIN, result), result, result, arg[2]); |
| 1487 | } |
| 1488 | break; |
| 1489 | case EOpMix: if(visit == PostVisit) emit(sw::Shader::OPCODE_LRP, result, arg[2], arg[1], arg[0]); break; |
| 1490 | case EOpStep: if(visit == PostVisit) emit(sw::Shader::OPCODE_STEP, result, arg[0], arg[1]); break; |
| 1491 | case EOpSmoothStep: if(visit == PostVisit) emit(sw::Shader::OPCODE_SMOOTH, result, arg[0], arg[1], arg[2]); break; |
| 1492 | case EOpDistance: if(visit == PostVisit) emit(sw::Shader::OPCODE_DIST(dim(arg[0])), result, arg[0], arg[1]); break; |
| 1493 | case EOpDot: if(visit == PostVisit) emit(sw::Shader::OPCODE_DP(dim(arg[0])), result, arg[0], arg[1]); break; |
| 1494 | case EOpCross: if(visit == PostVisit) emit(sw::Shader::OPCODE_CRS, result, arg[0], arg[1]); break; |
| 1495 | case EOpFaceForward: if(visit == PostVisit) emit(sw::Shader::OPCODE_FORWARD(dim(arg[0])), result, arg[0], arg[1], arg[2]); break; |
| 1496 | case EOpReflect: if(visit == PostVisit) emit(sw::Shader::OPCODE_REFLECT(dim(arg[0])), result, arg[0], arg[1]); break; |
| 1497 | case EOpRefract: if(visit == PostVisit) emit(sw::Shader::OPCODE_REFRACT(dim(arg[0])), result, arg[0], arg[1], arg[2]); break; |
| 1498 | case EOpMul: |
| 1499 | if(visit == PostVisit) |
| 1500 | { |
| 1501 | TIntermTyped *arg0 = arg[0]->getAsTyped(); |
| 1502 | TIntermTyped *arg1 = arg[1]->getAsTyped(); |
| 1503 | ASSERT((arg0->getNominalSize() == arg1->getNominalSize()) && (arg0->getSecondarySize() == arg1->getSecondarySize())); |
| 1504 | |
| 1505 | int size = arg0->getNominalSize(); |
| 1506 | for(int i = 0; i < size; i++) |
| 1507 | { |
| 1508 | emit(sw::Shader::OPCODE_MUL, result, i, arg[0], i, arg[1], i); |
| 1509 | } |
| 1510 | } |
| 1511 | break; |
| 1512 | case EOpOuterProduct: |
| 1513 | if(visit == PostVisit) |
| 1514 | { |
| 1515 | for(int i = 0; i < dim(arg[1]); i++) |
| 1516 | { |
| 1517 | Instruction *mul = emit(sw::Shader::OPCODE_MUL, result, i, arg[0], 0, arg[1]); |
| 1518 | mul->src[1].swizzle = 0x55 * i; |
| 1519 | } |
| 1520 | } |
| 1521 | break; |
| 1522 | default: UNREACHABLE(node->getOp()); |
| 1523 | } |
| 1524 | |
| 1525 | return true; |
| 1526 | } |
| 1527 | |
| 1528 | bool OutputASM::visitSelection(Visit visit, TIntermSelection *node) |
| 1529 | { |
| 1530 | if(currentScope != emitScope) |
| 1531 | { |
| 1532 | return false; |
| 1533 | } |
| 1534 | |
| 1535 | TIntermTyped *condition = node->getCondition(); |
| 1536 | TIntermNode *trueBlock = node->getTrueBlock(); |
| 1537 | TIntermNode *falseBlock = node->getFalseBlock(); |
| 1538 | TIntermConstantUnion *constantCondition = condition->getAsConstantUnion(); |
| 1539 | |
| 1540 | condition->traverse(this); |
| 1541 | |
| 1542 | if(node->usesTernaryOperator()) |
| 1543 | { |
| 1544 | if(constantCondition) |
| 1545 | { |
| 1546 | bool trueCondition = constantCondition->getUnionArrayPointer()->getBConst(); |
| 1547 | |
| 1548 | if(trueCondition) |
| 1549 | { |
| 1550 | trueBlock->traverse(this); |
| 1551 | copy(node, trueBlock); |
| 1552 | } |
| 1553 | else |
| 1554 | { |
| 1555 | falseBlock->traverse(this); |
| 1556 | copy(node, falseBlock); |
| 1557 | } |
| 1558 | } |
| 1559 | else if(trivial(node, 6)) // Fast to compute both potential results and no side effects |
| 1560 | { |
| 1561 | trueBlock->traverse(this); |
| 1562 | falseBlock->traverse(this); |
| 1563 | emit(sw::Shader::OPCODE_SELECT, node, condition, trueBlock, falseBlock); |
| 1564 | } |
| 1565 | else |
| 1566 | { |
| 1567 | emit(sw::Shader::OPCODE_IF, 0, condition); |
| 1568 | |
| 1569 | if(trueBlock) |
| 1570 | { |
| 1571 | trueBlock->traverse(this); |
| 1572 | copy(node, trueBlock); |
| 1573 | } |
| 1574 | |
| 1575 | if(falseBlock) |
| 1576 | { |
| 1577 | emit(sw::Shader::OPCODE_ELSE); |
| 1578 | falseBlock->traverse(this); |
| 1579 | copy(node, falseBlock); |
| 1580 | } |
| 1581 | |
| 1582 | emit(sw::Shader::OPCODE_ENDIF); |
| 1583 | } |
| 1584 | } |
| 1585 | else // if/else statement |
| 1586 | { |
| 1587 | if(constantCondition) |
| 1588 | { |
| 1589 | bool trueCondition = constantCondition->getUnionArrayPointer()->getBConst(); |
| 1590 | |
| 1591 | if(trueCondition) |
| 1592 | { |
| 1593 | if(trueBlock) |
| 1594 | { |
| 1595 | trueBlock->traverse(this); |
| 1596 | } |
| 1597 | } |
| 1598 | else |
| 1599 | { |
| 1600 | if(falseBlock) |
| 1601 | { |
| 1602 | falseBlock->traverse(this); |
| 1603 | } |
| 1604 | } |
| 1605 | } |
| 1606 | else |
| 1607 | { |
| 1608 | emit(sw::Shader::OPCODE_IF, 0, condition); |
| 1609 | |
| 1610 | if(trueBlock) |
| 1611 | { |
| 1612 | trueBlock->traverse(this); |
| 1613 | } |
| 1614 | |
| 1615 | if(falseBlock) |
| 1616 | { |
| 1617 | emit(sw::Shader::OPCODE_ELSE); |
| 1618 | falseBlock->traverse(this); |
| 1619 | } |
| 1620 | |
| 1621 | emit(sw::Shader::OPCODE_ENDIF); |
| 1622 | } |
| 1623 | } |
| 1624 | |
| 1625 | return false; |
| 1626 | } |
| 1627 | |
| 1628 | bool OutputASM::visitLoop(Visit visit, TIntermLoop *node) |
| 1629 | { |
| 1630 | if(currentScope != emitScope) |
| 1631 | { |
| 1632 | return false; |
| 1633 | } |
| 1634 | |
| 1635 | unsigned int iterations = loopCount(node); |
| 1636 | |
| 1637 | if(iterations == 0) |
| 1638 | { |
| 1639 | return false; |
| 1640 | } |
| 1641 | |
| 1642 | bool unroll = (iterations <= 4); |
| 1643 | |
| 1644 | if(unroll) |
| 1645 | { |
| 1646 | LoopUnrollable loopUnrollable; |
| 1647 | unroll = loopUnrollable.traverse(node); |
| 1648 | } |
| 1649 | |
| 1650 | TIntermNode *init = node->getInit(); |
| 1651 | TIntermTyped *condition = node->getCondition(); |
| 1652 | TIntermTyped *expression = node->getExpression(); |
| 1653 | TIntermNode *body = node->getBody(); |
| 1654 | Constant True(true); |
| 1655 | |
| 1656 | if(node->getType() == ELoopDoWhile) |
| 1657 | { |
| 1658 | Temporary iterate(this); |
| 1659 | emit(sw::Shader::OPCODE_MOV, &iterate, &True); |
| 1660 | |
| 1661 | emit(sw::Shader::OPCODE_WHILE, 0, &iterate); // FIXME: Implement real do-while |
| 1662 | |
| 1663 | if(body) |
| 1664 | { |
| 1665 | body->traverse(this); |
| 1666 | } |
| 1667 | |
| 1668 | emit(sw::Shader::OPCODE_TEST); |
| 1669 | |
| 1670 | condition->traverse(this); |
| 1671 | emit(sw::Shader::OPCODE_MOV, &iterate, condition); |
| 1672 | |
| 1673 | emit(sw::Shader::OPCODE_ENDWHILE); |
| 1674 | } |
| 1675 | else |
| 1676 | { |
| 1677 | if(init) |
| 1678 | { |
| 1679 | init->traverse(this); |
| 1680 | } |
| 1681 | |
| 1682 | if(unroll) |
| 1683 | { |
| 1684 | for(unsigned int i = 0; i < iterations; i++) |
| 1685 | { |
| 1686 | // condition->traverse(this); // Condition could contain statements, but not in an unrollable loop |
| 1687 | |
| 1688 | if(body) |
| 1689 | { |
| 1690 | body->traverse(this); |
| 1691 | } |
| 1692 | |
| 1693 | if(expression) |
| 1694 | { |
| 1695 | expression->traverse(this); |
| 1696 | } |
| 1697 | } |
| 1698 | } |
| 1699 | else |
| 1700 | { |
| 1701 | if(condition) |
| 1702 | { |
| 1703 | condition->traverse(this); |
| 1704 | } |
| 1705 | else |
| 1706 | { |
| 1707 | condition = &True; |
| 1708 | } |
| 1709 | |
| 1710 | emit(sw::Shader::OPCODE_WHILE, 0, condition); |
| 1711 | |
| 1712 | if(body) |
| 1713 | { |
| 1714 | body->traverse(this); |
| 1715 | } |
| 1716 | |
| 1717 | emit(sw::Shader::OPCODE_TEST); |
| 1718 | |
| 1719 | if(expression) |
| 1720 | { |
| 1721 | expression->traverse(this); |
| 1722 | } |
| 1723 | |
| 1724 | if(condition) |
| 1725 | { |
| 1726 | condition->traverse(this); |
| 1727 | } |
| 1728 | |
| 1729 | emit(sw::Shader::OPCODE_ENDWHILE); |
| 1730 | } |
| 1731 | } |
| 1732 | |
| 1733 | return false; |
| 1734 | } |
| 1735 | |
| 1736 | bool OutputASM::visitBranch(Visit visit, TIntermBranch *node) |
| 1737 | { |
| 1738 | if(currentScope != emitScope) |
| 1739 | { |
| 1740 | return false; |
| 1741 | } |
| 1742 | |
| 1743 | switch(node->getFlowOp()) |
| 1744 | { |
| 1745 | case EOpKill: if(visit == PostVisit) emit(sw::Shader::OPCODE_DISCARD); break; |
| 1746 | case EOpBreak: if(visit == PostVisit) emit(sw::Shader::OPCODE_BREAK); break; |
| 1747 | case EOpContinue: if(visit == PostVisit) emit(sw::Shader::OPCODE_CONTINUE); break; |
| 1748 | case EOpReturn: |
| 1749 | if(visit == PostVisit) |
| 1750 | { |
| 1751 | TIntermTyped *value = node->getExpression(); |
| 1752 | |
| 1753 | if(value) |
| 1754 | { |
| 1755 | copy(functionArray[currentFunction].ret, value); |
| 1756 | } |
| 1757 | |
| 1758 | emit(sw::Shader::OPCODE_LEAVE); |
| 1759 | } |
| 1760 | break; |
| 1761 | default: UNREACHABLE(node->getFlowOp()); |
| 1762 | } |
| 1763 | |
| 1764 | return true; |
| 1765 | } |
| 1766 | |
Alexis Hetu | 9aa83a9 | 2016-05-02 17:34:46 -0400 | [diff] [blame] | 1767 | bool OutputASM::visitSwitch(Visit visit, TIntermSwitch *node) |
| 1768 | { |
| 1769 | if(currentScope != emitScope) |
| 1770 | { |
| 1771 | return false; |
| 1772 | } |
| 1773 | |
| 1774 | TIntermTyped* switchValue = node->getInit(); |
| 1775 | TIntermAggregate* opList = node->getStatementList(); |
| 1776 | |
| 1777 | if(!switchValue || !opList) |
| 1778 | { |
| 1779 | return false; |
| 1780 | } |
| 1781 | |
| 1782 | switchValue->traverse(this); |
| 1783 | |
| 1784 | emit(sw::Shader::OPCODE_SWITCH); |
| 1785 | |
| 1786 | TIntermSequence& sequence = opList->getSequence(); |
| 1787 | TIntermSequence::iterator it = sequence.begin(); |
| 1788 | TIntermSequence::iterator defaultIt = sequence.end(); |
| 1789 | int nbCases = 0; |
| 1790 | for(; it != sequence.end(); ++it) |
| 1791 | { |
| 1792 | TIntermCase* currentCase = (*it)->getAsCaseNode(); |
| 1793 | if(currentCase) |
| 1794 | { |
| 1795 | TIntermSequence::iterator caseIt = it; |
| 1796 | |
| 1797 | TIntermTyped* condition = currentCase->getCondition(); |
| 1798 | if(condition) // non default case |
| 1799 | { |
| 1800 | if(nbCases != 0) |
| 1801 | { |
| 1802 | emit(sw::Shader::OPCODE_ELSE); |
| 1803 | } |
| 1804 | |
| 1805 | condition->traverse(this); |
| 1806 | Temporary result(this); |
| 1807 | emitBinary(sw::Shader::OPCODE_EQ, &result, switchValue, condition); |
| 1808 | emit(sw::Shader::OPCODE_IF, 0, &result); |
| 1809 | nbCases++; |
| 1810 | |
| 1811 | for(++caseIt; caseIt != sequence.end(); ++caseIt) |
| 1812 | { |
| 1813 | (*caseIt)->traverse(this); |
| 1814 | if((*caseIt)->getAsBranchNode()) // Kill, Break, Continue or Return |
| 1815 | { |
| 1816 | break; |
| 1817 | } |
| 1818 | } |
| 1819 | } |
| 1820 | else |
| 1821 | { |
| 1822 | defaultIt = it; // The default case might not be the last case, keep it for last |
| 1823 | } |
| 1824 | } |
| 1825 | } |
| 1826 | |
| 1827 | // If there's a default case, traverse it here |
| 1828 | if(defaultIt != sequence.end()) |
| 1829 | { |
| 1830 | emit(sw::Shader::OPCODE_ELSE); |
| 1831 | for(++defaultIt; defaultIt != sequence.end(); ++defaultIt) |
| 1832 | { |
| 1833 | (*defaultIt)->traverse(this); |
| 1834 | if((*defaultIt)->getAsBranchNode()) // Kill, Break, Continue or Return |
| 1835 | { |
| 1836 | break; |
| 1837 | } |
| 1838 | } |
| 1839 | } |
| 1840 | |
| 1841 | for(int i = 0; i < nbCases; ++i) |
| 1842 | { |
| 1843 | emit(sw::Shader::OPCODE_ENDIF); |
| 1844 | } |
| 1845 | |
| 1846 | emit(sw::Shader::OPCODE_ENDSWITCH); |
| 1847 | |
| 1848 | return false; |
| 1849 | } |
| 1850 | |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 1851 | Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2, TIntermNode *src3, TIntermNode *src4) |
| 1852 | { |
| 1853 | return emit(op, dst, 0, src0, 0, src1, 0, src2, 0, src3, 0, src4, 0); |
| 1854 | } |
| 1855 | |
| 1856 | Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, int dstIndex, TIntermNode *src0, int index0, TIntermNode *src1, int index1, |
| 1857 | TIntermNode *src2, int index2, TIntermNode *src3, int index3, TIntermNode *src4, int index4) |
| 1858 | { |
| 1859 | Instruction *instruction = new Instruction(op); |
| 1860 | |
| 1861 | if(dst) |
| 1862 | { |
| 1863 | instruction->dst.type = registerType(dst); |
| 1864 | instruction->dst.index = registerIndex(dst) + dstIndex; |
| 1865 | instruction->dst.mask = writeMask(dst); |
| 1866 | instruction->dst.integer = (dst->getBasicType() == EbtInt); |
| 1867 | } |
| 1868 | |
| 1869 | argument(instruction->src[0], src0, index0); |
| 1870 | argument(instruction->src[1], src1, index1); |
| 1871 | argument(instruction->src[2], src2, index2); |
| 1872 | argument(instruction->src[3], src3, index3); |
| 1873 | argument(instruction->src[4], src4, index4); |
| 1874 | |
| 1875 | shader->append(instruction); |
| 1876 | |
| 1877 | return instruction; |
| 1878 | } |
| 1879 | |
| 1880 | Instruction *OutputASM::emitCast(TIntermTyped *dst, TIntermTyped *src) |
| 1881 | { |
| 1882 | return emitCast(dst, 0, src, 0); |
| 1883 | } |
| 1884 | |
| 1885 | Instruction *OutputASM::emitCast(TIntermTyped *dst, int dstIndex, TIntermTyped *src, int srcIndex) |
| 1886 | { |
| 1887 | switch(src->getBasicType()) |
| 1888 | { |
| 1889 | case EbtBool: |
| 1890 | switch(dst->getBasicType()) |
| 1891 | { |
| 1892 | case EbtInt: return emit(sw::Shader::OPCODE_B2I, dst, dstIndex, src, srcIndex); |
| 1893 | case EbtUInt: return emit(sw::Shader::OPCODE_B2I, dst, dstIndex, src, srcIndex); |
| 1894 | case EbtFloat: return emit(sw::Shader::OPCODE_B2F, dst, dstIndex, src, srcIndex); |
| 1895 | default: break; |
| 1896 | } |
| 1897 | break; |
| 1898 | case EbtInt: |
| 1899 | switch(dst->getBasicType()) |
| 1900 | { |
| 1901 | case EbtBool: return emit(sw::Shader::OPCODE_I2B, dst, dstIndex, src, srcIndex); |
| 1902 | case EbtFloat: return emit(sw::Shader::OPCODE_I2F, dst, dstIndex, src, srcIndex); |
| 1903 | default: break; |
| 1904 | } |
| 1905 | break; |
| 1906 | case EbtUInt: |
| 1907 | switch(dst->getBasicType()) |
| 1908 | { |
| 1909 | case EbtBool: return emit(sw::Shader::OPCODE_I2B, dst, dstIndex, src, srcIndex); |
| 1910 | case EbtFloat: return emit(sw::Shader::OPCODE_U2F, dst, dstIndex, src, srcIndex); |
| 1911 | default: break; |
| 1912 | } |
| 1913 | break; |
| 1914 | case EbtFloat: |
| 1915 | switch(dst->getBasicType()) |
| 1916 | { |
| 1917 | case EbtBool: return emit(sw::Shader::OPCODE_F2B, dst, dstIndex, src, srcIndex); |
| 1918 | case EbtInt: return emit(sw::Shader::OPCODE_F2I, dst, dstIndex, src, srcIndex); |
| 1919 | case EbtUInt: return emit(sw::Shader::OPCODE_F2U, dst, dstIndex, src, srcIndex); |
| 1920 | default: break; |
| 1921 | } |
| 1922 | break; |
| 1923 | default: |
| 1924 | break; |
| 1925 | } |
| 1926 | |
| 1927 | ASSERT((src->getBasicType() == dst->getBasicType()) || |
| 1928 | ((src->getBasicType() == EbtInt) && (dst->getBasicType() == EbtUInt)) || |
| 1929 | ((src->getBasicType() == EbtUInt) && (dst->getBasicType() == EbtInt))); |
| 1930 | |
| 1931 | return emit(sw::Shader::OPCODE_MOV, dst, dstIndex, src, srcIndex); |
| 1932 | } |
| 1933 | |
| 1934 | void OutputASM::emitBinary(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2) |
| 1935 | { |
| 1936 | for(int index = 0; index < dst->elementRegisterCount(); index++) |
| 1937 | { |
| 1938 | emit(op, dst, index, src0, index, src1, index, src2, index); |
| 1939 | } |
| 1940 | } |
| 1941 | |
| 1942 | void OutputASM::emitAssign(sw::Shader::Opcode op, TIntermTyped *result, TIntermTyped *lhs, TIntermTyped *src0, TIntermTyped *src1) |
| 1943 | { |
| 1944 | emitBinary(op, result, src0, src1); |
| 1945 | assignLvalue(lhs, result); |
| 1946 | } |
| 1947 | |
| 1948 | void OutputASM::emitCmp(sw::Shader::Control cmpOp, TIntermTyped *dst, TIntermNode *left, TIntermNode *right, int index) |
| 1949 | { |
| 1950 | sw::Shader::Opcode opcode; |
| 1951 | switch(left->getAsTyped()->getBasicType()) |
| 1952 | { |
| 1953 | case EbtBool: |
| 1954 | case EbtInt: |
| 1955 | opcode = sw::Shader::OPCODE_ICMP; |
| 1956 | break; |
| 1957 | case EbtUInt: |
| 1958 | opcode = sw::Shader::OPCODE_UCMP; |
| 1959 | break; |
| 1960 | default: |
| 1961 | opcode = sw::Shader::OPCODE_CMP; |
| 1962 | break; |
| 1963 | } |
| 1964 | |
| 1965 | Instruction *cmp = emit(opcode, dst, 0, left, index, right, index); |
| 1966 | cmp->control = cmpOp; |
| 1967 | } |
| 1968 | |
| 1969 | int componentCount(const TType &type, int registers) |
| 1970 | { |
| 1971 | if(registers == 0) |
| 1972 | { |
| 1973 | return 0; |
| 1974 | } |
| 1975 | |
| 1976 | if(type.isArray() && registers >= type.elementRegisterCount()) |
| 1977 | { |
| 1978 | int index = registers / type.elementRegisterCount(); |
| 1979 | registers -= index * type.elementRegisterCount(); |
| 1980 | return index * type.getElementSize() + componentCount(type, registers); |
| 1981 | } |
| 1982 | |
| 1983 | if(type.isStruct() || type.isInterfaceBlock()) |
| 1984 | { |
| 1985 | const TFieldList& fields = type.getStruct() ? type.getStruct()->fields() : type.getInterfaceBlock()->fields(); |
| 1986 | int elements = 0; |
| 1987 | |
| 1988 | for(TFieldList::const_iterator field = fields.begin(); field != fields.end(); field++) |
| 1989 | { |
| 1990 | const TType &fieldType = *((*field)->type()); |
| 1991 | |
| 1992 | if(fieldType.totalRegisterCount() <= registers) |
| 1993 | { |
| 1994 | registers -= fieldType.totalRegisterCount(); |
| 1995 | elements += fieldType.getObjectSize(); |
| 1996 | } |
| 1997 | else // Register within this field |
| 1998 | { |
| 1999 | return elements + componentCount(fieldType, registers); |
| 2000 | } |
| 2001 | } |
| 2002 | } |
| 2003 | else if(type.isMatrix()) |
| 2004 | { |
| 2005 | return registers * type.registerSize(); |
| 2006 | } |
| 2007 | |
| 2008 | UNREACHABLE(0); |
| 2009 | return 0; |
| 2010 | } |
| 2011 | |
| 2012 | int registerSize(const TType &type, int registers) |
| 2013 | { |
| 2014 | if(registers == 0) |
| 2015 | { |
| 2016 | if(type.isStruct()) |
| 2017 | { |
| 2018 | return registerSize(*((*(type.getStruct()->fields().begin()))->type()), 0); |
| 2019 | } |
| 2020 | else if(type.isInterfaceBlock()) |
| 2021 | { |
| 2022 | return registerSize(*((*(type.getInterfaceBlock()->fields().begin()))->type()), 0); |
| 2023 | } |
| 2024 | |
| 2025 | return type.registerSize(); |
| 2026 | } |
| 2027 | |
| 2028 | if(type.isArray() && registers >= type.elementRegisterCount()) |
| 2029 | { |
| 2030 | int index = registers / type.elementRegisterCount(); |
| 2031 | registers -= index * type.elementRegisterCount(); |
| 2032 | return registerSize(type, registers); |
| 2033 | } |
| 2034 | |
| 2035 | if(type.isStruct() || type.isInterfaceBlock()) |
| 2036 | { |
| 2037 | const TFieldList& fields = type.getStruct() ? type.getStruct()->fields() : type.getInterfaceBlock()->fields(); |
| 2038 | int elements = 0; |
| 2039 | |
| 2040 | for(TFieldList::const_iterator field = fields.begin(); field != fields.end(); field++) |
| 2041 | { |
| 2042 | const TType &fieldType = *((*field)->type()); |
| 2043 | |
| 2044 | if(fieldType.totalRegisterCount() <= registers) |
| 2045 | { |
| 2046 | registers -= fieldType.totalRegisterCount(); |
| 2047 | elements += fieldType.getObjectSize(); |
| 2048 | } |
| 2049 | else // Register within this field |
| 2050 | { |
| 2051 | return registerSize(fieldType, registers); |
| 2052 | } |
| 2053 | } |
| 2054 | } |
| 2055 | else if(type.isMatrix()) |
| 2056 | { |
| 2057 | return registerSize(type, 0); |
| 2058 | } |
| 2059 | |
| 2060 | UNREACHABLE(0); |
| 2061 | return 0; |
| 2062 | } |
| 2063 | |
| 2064 | int OutputASM::getBlockId(TIntermTyped *arg) |
| 2065 | { |
| 2066 | if(arg) |
| 2067 | { |
| 2068 | const TType &type = arg->getType(); |
| 2069 | TInterfaceBlock* block = type.getInterfaceBlock(); |
| 2070 | if(block && (type.getQualifier() == EvqUniform)) |
| 2071 | { |
| 2072 | // Make sure the uniform block is declared |
| 2073 | uniformRegister(arg); |
| 2074 | |
| 2075 | const char* blockName = block->name().c_str(); |
| 2076 | |
| 2077 | // Fetch uniform block index from array of blocks |
| 2078 | for(ActiveUniformBlocks::const_iterator it = shaderObject->activeUniformBlocks.begin(); it != shaderObject->activeUniformBlocks.end(); ++it) |
| 2079 | { |
| 2080 | if(blockName == it->name) |
| 2081 | { |
| 2082 | return it->blockId; |
| 2083 | } |
| 2084 | } |
| 2085 | |
| 2086 | ASSERT(false); |
| 2087 | } |
| 2088 | } |
| 2089 | |
| 2090 | return -1; |
| 2091 | } |
| 2092 | |
| 2093 | OutputASM::ArgumentInfo OutputASM::getArgumentInfo(TIntermTyped *arg, int index) |
| 2094 | { |
| 2095 | const TType &type = arg->getType(); |
| 2096 | int blockId = getBlockId(arg); |
| 2097 | ArgumentInfo argumentInfo(BlockMemberInfo::getDefaultBlockInfo(), type, -1, -1); |
| 2098 | if(blockId != -1) |
| 2099 | { |
| 2100 | argumentInfo.bufferIndex = 0; |
| 2101 | for(int i = 0; i < blockId; ++i) |
| 2102 | { |
| 2103 | int blockArraySize = shaderObject->activeUniformBlocks[i].arraySize; |
| 2104 | argumentInfo.bufferIndex += blockArraySize > 0 ? blockArraySize : 1; |
| 2105 | } |
| 2106 | |
| 2107 | const BlockDefinitionIndexMap& blockDefinition = blockDefinitions[blockId]; |
| 2108 | |
| 2109 | BlockDefinitionIndexMap::const_iterator itEnd = blockDefinition.end(); |
| 2110 | BlockDefinitionIndexMap::const_iterator it = itEnd; |
| 2111 | |
| 2112 | argumentInfo.clampedIndex = index; |
| 2113 | if(type.isInterfaceBlock()) |
| 2114 | { |
| 2115 | // Offset index to the beginning of the selected instance |
| 2116 | int blockRegisters = type.elementRegisterCount(); |
| 2117 | int bufferOffset = argumentInfo.clampedIndex / blockRegisters; |
| 2118 | argumentInfo.bufferIndex += bufferOffset; |
| 2119 | argumentInfo.clampedIndex -= bufferOffset * blockRegisters; |
| 2120 | } |
| 2121 | |
| 2122 | int regIndex = registerIndex(arg); |
| 2123 | for(int i = regIndex + argumentInfo.clampedIndex; i >= regIndex; --i) |
| 2124 | { |
| 2125 | it = blockDefinition.find(i); |
| 2126 | if(it != itEnd) |
| 2127 | { |
| 2128 | argumentInfo.clampedIndex -= (i - regIndex); |
| 2129 | break; |
| 2130 | } |
| 2131 | } |
| 2132 | ASSERT(it != itEnd); |
| 2133 | |
| 2134 | argumentInfo.typedMemberInfo = it->second; |
| 2135 | |
| 2136 | int registerCount = argumentInfo.typedMemberInfo.type.totalRegisterCount(); |
| 2137 | argumentInfo.clampedIndex = (argumentInfo.clampedIndex >= registerCount) ? registerCount - 1 : argumentInfo.clampedIndex; |
| 2138 | } |
| 2139 | else |
| 2140 | { |
| 2141 | argumentInfo.clampedIndex = (index >= arg->totalRegisterCount()) ? arg->totalRegisterCount() - 1 : index; |
| 2142 | } |
| 2143 | |
| 2144 | return argumentInfo; |
| 2145 | } |
| 2146 | |
| 2147 | void OutputASM::argument(sw::Shader::SourceParameter ¶meter, TIntermNode *argument, int index) |
| 2148 | { |
| 2149 | if(argument) |
| 2150 | { |
| 2151 | TIntermTyped *arg = argument->getAsTyped(); |
| 2152 | Temporary unpackedUniform(this); |
| 2153 | |
| 2154 | const TType& srcType = arg->getType(); |
| 2155 | TInterfaceBlock* srcBlock = srcType.getInterfaceBlock(); |
| 2156 | if(srcBlock && (srcType.getQualifier() == EvqUniform)) |
| 2157 | { |
| 2158 | const ArgumentInfo argumentInfo = getArgumentInfo(arg, index); |
| 2159 | const TType &memberType = argumentInfo.typedMemberInfo.type; |
| 2160 | |
| 2161 | if(memberType.getBasicType() == EbtBool) |
| 2162 | { |
| 2163 | int arraySize = (memberType.isArray() ? memberType.getArraySize() : 1); |
| 2164 | ASSERT(argumentInfo.clampedIndex < arraySize); |
| 2165 | |
| 2166 | // Convert the packed bool, which is currently an int, to a true bool |
| 2167 | Instruction *instruction = new Instruction(sw::Shader::OPCODE_I2B); |
| 2168 | instruction->dst.type = sw::Shader::PARAMETER_TEMP; |
| 2169 | instruction->dst.index = registerIndex(&unpackedUniform); |
| 2170 | instruction->src[0].type = sw::Shader::PARAMETER_CONST; |
| 2171 | instruction->src[0].bufferIndex = argumentInfo.bufferIndex; |
| 2172 | instruction->src[0].index = argumentInfo.typedMemberInfo.offset + argumentInfo.clampedIndex * argumentInfo.typedMemberInfo.arrayStride; |
| 2173 | |
| 2174 | shader->append(instruction); |
| 2175 | |
| 2176 | arg = &unpackedUniform; |
| 2177 | index = 0; |
| 2178 | } |
| 2179 | else if((srcBlock->matrixPacking() == EmpRowMajor) && memberType.isMatrix()) |
| 2180 | { |
| 2181 | int numCols = memberType.getNominalSize(); |
| 2182 | int numRows = memberType.getSecondarySize(); |
| 2183 | int arraySize = (memberType.isArray() ? memberType.getArraySize() : 1); |
| 2184 | |
| 2185 | ASSERT(argumentInfo.clampedIndex < (numCols * arraySize)); |
| 2186 | |
| 2187 | unsigned int dstIndex = registerIndex(&unpackedUniform); |
| 2188 | unsigned int srcSwizzle = (argumentInfo.clampedIndex % numCols) * 0x55; |
| 2189 | int arrayIndex = argumentInfo.clampedIndex / numCols; |
| 2190 | int matrixStartOffset = argumentInfo.typedMemberInfo.offset + arrayIndex * argumentInfo.typedMemberInfo.arrayStride; |
| 2191 | |
| 2192 | for(int j = 0; j < numRows; ++j) |
| 2193 | { |
| 2194 | // Transpose the row major matrix |
| 2195 | Instruction *instruction = new Instruction(sw::Shader::OPCODE_MOV); |
| 2196 | instruction->dst.type = sw::Shader::PARAMETER_TEMP; |
| 2197 | instruction->dst.index = dstIndex; |
| 2198 | instruction->dst.mask = 1 << j; |
| 2199 | instruction->src[0].type = sw::Shader::PARAMETER_CONST; |
| 2200 | instruction->src[0].bufferIndex = argumentInfo.bufferIndex; |
| 2201 | instruction->src[0].index = matrixStartOffset + j * argumentInfo.typedMemberInfo.matrixStride; |
| 2202 | instruction->src[0].swizzle = srcSwizzle; |
| 2203 | |
| 2204 | shader->append(instruction); |
| 2205 | } |
| 2206 | |
| 2207 | arg = &unpackedUniform; |
| 2208 | index = 0; |
| 2209 | } |
| 2210 | } |
| 2211 | |
| 2212 | const ArgumentInfo argumentInfo = getArgumentInfo(arg, index); |
| 2213 | const TType &type = argumentInfo.typedMemberInfo.type; |
| 2214 | |
| 2215 | int size = registerSize(type, argumentInfo.clampedIndex); |
| 2216 | |
| 2217 | parameter.type = registerType(arg); |
| 2218 | parameter.bufferIndex = argumentInfo.bufferIndex; |
| 2219 | |
| 2220 | if(arg->getAsConstantUnion() && arg->getAsConstantUnion()->getUnionArrayPointer()) |
| 2221 | { |
| 2222 | int component = componentCount(type, argumentInfo.clampedIndex); |
| 2223 | ConstantUnion *constants = arg->getAsConstantUnion()->getUnionArrayPointer(); |
| 2224 | |
| 2225 | for(int i = 0; i < 4; i++) |
| 2226 | { |
| 2227 | if(size == 1) // Replicate |
| 2228 | { |
| 2229 | parameter.value[i] = constants[component + 0].getAsFloat(); |
| 2230 | } |
| 2231 | else if(i < size) |
| 2232 | { |
| 2233 | parameter.value[i] = constants[component + i].getAsFloat(); |
| 2234 | } |
| 2235 | else |
| 2236 | { |
| 2237 | parameter.value[i] = 0.0f; |
| 2238 | } |
| 2239 | } |
| 2240 | } |
| 2241 | else |
| 2242 | { |
| 2243 | parameter.index = registerIndex(arg) + argumentInfo.clampedIndex; |
| 2244 | |
| 2245 | if(parameter.bufferIndex != -1) |
| 2246 | { |
| 2247 | int stride = (argumentInfo.typedMemberInfo.matrixStride > 0) ? argumentInfo.typedMemberInfo.matrixStride : argumentInfo.typedMemberInfo.arrayStride; |
| 2248 | parameter.index = argumentInfo.typedMemberInfo.offset + argumentInfo.clampedIndex * stride; |
| 2249 | } |
| 2250 | } |
| 2251 | |
| 2252 | if(!IsSampler(arg->getBasicType())) |
| 2253 | { |
| 2254 | parameter.swizzle = readSwizzle(arg, size); |
| 2255 | } |
| 2256 | } |
| 2257 | } |
| 2258 | |
| 2259 | void OutputASM::copy(TIntermTyped *dst, TIntermNode *src, int offset) |
| 2260 | { |
| 2261 | for(int index = 0; index < dst->totalRegisterCount(); index++) |
| 2262 | { |
| 2263 | Instruction *mov = emit(sw::Shader::OPCODE_MOV, dst, index, src, offset + index); |
| 2264 | mov->dst.mask = writeMask(dst, index); |
| 2265 | } |
| 2266 | } |
| 2267 | |
| 2268 | int swizzleElement(int swizzle, int index) |
| 2269 | { |
| 2270 | return (swizzle >> (index * 2)) & 0x03; |
| 2271 | } |
| 2272 | |
| 2273 | int swizzleSwizzle(int leftSwizzle, int rightSwizzle) |
| 2274 | { |
| 2275 | return (swizzleElement(leftSwizzle, swizzleElement(rightSwizzle, 0)) << 0) | |
| 2276 | (swizzleElement(leftSwizzle, swizzleElement(rightSwizzle, 1)) << 2) | |
| 2277 | (swizzleElement(leftSwizzle, swizzleElement(rightSwizzle, 2)) << 4) | |
| 2278 | (swizzleElement(leftSwizzle, swizzleElement(rightSwizzle, 3)) << 6); |
| 2279 | } |
| 2280 | |
| 2281 | void OutputASM::assignLvalue(TIntermTyped *dst, TIntermTyped *src) |
| 2282 | { |
| 2283 | if(src && |
| 2284 | ((src->isVector() && (!dst->isVector() || (src->getNominalSize() != dst->getNominalSize()))) || |
| 2285 | (src->isMatrix() && (!dst->isMatrix() || (src->getNominalSize() != dst->getNominalSize()) || (src->getSecondarySize() != dst->getSecondarySize()))))) |
| 2286 | { |
| 2287 | return mContext.error(src->getLine(), "Result type should match the l-value type in compound assignment", src->isVector() ? "vector" : "matrix"); |
| 2288 | } |
| 2289 | |
| 2290 | TIntermBinary *binary = dst->getAsBinaryNode(); |
| 2291 | |
| 2292 | if(binary && binary->getOp() == EOpIndexIndirect && binary->getLeft()->isVector() && dst->isScalar()) |
| 2293 | { |
| 2294 | Instruction *insert = new Instruction(sw::Shader::OPCODE_INSERT); |
| 2295 | |
| 2296 | Temporary address(this); |
| 2297 | lvalue(insert->dst, address, dst); |
| 2298 | |
| 2299 | insert->src[0].type = insert->dst.type; |
| 2300 | insert->src[0].index = insert->dst.index; |
| 2301 | insert->src[0].rel = insert->dst.rel; |
| 2302 | argument(insert->src[1], src); |
| 2303 | argument(insert->src[2], binary->getRight()); |
| 2304 | |
| 2305 | shader->append(insert); |
| 2306 | } |
| 2307 | else |
| 2308 | { |
| 2309 | for(int offset = 0; offset < dst->totalRegisterCount(); offset++) |
| 2310 | { |
| 2311 | Instruction *mov = new Instruction(sw::Shader::OPCODE_MOV); |
| 2312 | |
| 2313 | Temporary address(this); |
| 2314 | int swizzle = lvalue(mov->dst, address, dst); |
| 2315 | mov->dst.index += offset; |
| 2316 | |
| 2317 | if(offset > 0) |
| 2318 | { |
| 2319 | mov->dst.mask = writeMask(dst, offset); |
| 2320 | } |
| 2321 | |
| 2322 | argument(mov->src[0], src, offset); |
| 2323 | mov->src[0].swizzle = swizzleSwizzle(mov->src[0].swizzle, swizzle); |
| 2324 | |
| 2325 | shader->append(mov); |
| 2326 | } |
| 2327 | } |
| 2328 | } |
| 2329 | |
| 2330 | int OutputASM::lvalue(sw::Shader::DestinationParameter &dst, Temporary &address, TIntermTyped *node) |
| 2331 | { |
| 2332 | TIntermTyped *result = node; |
| 2333 | TIntermBinary *binary = node->getAsBinaryNode(); |
| 2334 | TIntermSymbol *symbol = node->getAsSymbolNode(); |
| 2335 | |
| 2336 | if(binary) |
| 2337 | { |
| 2338 | TIntermTyped *left = binary->getLeft(); |
| 2339 | TIntermTyped *right = binary->getRight(); |
| 2340 | |
| 2341 | int leftSwizzle = lvalue(dst, address, left); // Resolve the l-value of the left side |
| 2342 | |
| 2343 | switch(binary->getOp()) |
| 2344 | { |
| 2345 | case EOpIndexDirect: |
| 2346 | { |
| 2347 | int rightIndex = right->getAsConstantUnion()->getIConst(0); |
| 2348 | |
| 2349 | if(left->isRegister()) |
| 2350 | { |
| 2351 | int leftMask = dst.mask; |
| 2352 | |
| 2353 | dst.mask = 1; |
| 2354 | while((leftMask & dst.mask) == 0) |
| 2355 | { |
| 2356 | dst.mask = dst.mask << 1; |
| 2357 | } |
| 2358 | |
| 2359 | int element = swizzleElement(leftSwizzle, rightIndex); |
| 2360 | dst.mask = 1 << element; |
| 2361 | |
| 2362 | return element; |
| 2363 | } |
| 2364 | else if(left->isArray() || left->isMatrix()) |
| 2365 | { |
| 2366 | dst.index += rightIndex * result->totalRegisterCount(); |
| 2367 | return 0xE4; |
| 2368 | } |
| 2369 | else UNREACHABLE(0); |
| 2370 | } |
| 2371 | break; |
| 2372 | case EOpIndexIndirect: |
| 2373 | { |
| 2374 | if(left->isRegister()) |
| 2375 | { |
| 2376 | // Requires INSERT instruction (handled by calling function) |
| 2377 | } |
| 2378 | else if(left->isArray() || left->isMatrix()) |
| 2379 | { |
| 2380 | int scale = result->totalRegisterCount(); |
| 2381 | |
| 2382 | if(dst.rel.type == sw::Shader::PARAMETER_VOID) // Use the index register as the relative address directly |
| 2383 | { |
| 2384 | if(left->totalRegisterCount() > 1) |
| 2385 | { |
| 2386 | sw::Shader::SourceParameter relativeRegister; |
| 2387 | argument(relativeRegister, right); |
| 2388 | |
| 2389 | dst.rel.index = relativeRegister.index; |
| 2390 | dst.rel.type = relativeRegister.type; |
| 2391 | dst.rel.scale = scale; |
| 2392 | dst.rel.deterministic = !(vertexShader && left->getQualifier() == EvqUniform); |
| 2393 | } |
| 2394 | } |
| 2395 | else if(dst.rel.index != registerIndex(&address)) // Move the previous index register to the address register |
| 2396 | { |
| 2397 | if(scale == 1) |
| 2398 | { |
| 2399 | Constant oldScale((int)dst.rel.scale); |
| 2400 | Instruction *mad = emit(sw::Shader::OPCODE_IMAD, &address, &address, &oldScale, right); |
| 2401 | mad->src[0].index = dst.rel.index; |
| 2402 | mad->src[0].type = dst.rel.type; |
| 2403 | } |
| 2404 | else |
| 2405 | { |
| 2406 | Constant oldScale((int)dst.rel.scale); |
| 2407 | Instruction *mul = emit(sw::Shader::OPCODE_IMUL, &address, &address, &oldScale); |
| 2408 | mul->src[0].index = dst.rel.index; |
| 2409 | mul->src[0].type = dst.rel.type; |
| 2410 | |
| 2411 | Constant newScale(scale); |
| 2412 | emit(sw::Shader::OPCODE_IMAD, &address, right, &newScale, &address); |
| 2413 | } |
| 2414 | |
| 2415 | dst.rel.type = sw::Shader::PARAMETER_TEMP; |
| 2416 | dst.rel.index = registerIndex(&address); |
| 2417 | dst.rel.scale = 1; |
| 2418 | } |
| 2419 | else // Just add the new index to the address register |
| 2420 | { |
| 2421 | if(scale == 1) |
| 2422 | { |
| 2423 | emit(sw::Shader::OPCODE_IADD, &address, &address, right); |
| 2424 | } |
| 2425 | else |
| 2426 | { |
| 2427 | Constant newScale(scale); |
| 2428 | emit(sw::Shader::OPCODE_IMAD, &address, right, &newScale, &address); |
| 2429 | } |
| 2430 | } |
| 2431 | } |
| 2432 | else UNREACHABLE(0); |
| 2433 | } |
| 2434 | break; |
| 2435 | case EOpIndexDirectStruct: |
| 2436 | case EOpIndexDirectInterfaceBlock: |
| 2437 | { |
| 2438 | const TFieldList& fields = (binary->getOp() == EOpIndexDirectStruct) ? |
| 2439 | left->getType().getStruct()->fields() : |
| 2440 | left->getType().getInterfaceBlock()->fields(); |
| 2441 | int index = right->getAsConstantUnion()->getIConst(0); |
| 2442 | int fieldOffset = 0; |
| 2443 | |
| 2444 | for(int i = 0; i < index; i++) |
| 2445 | { |
| 2446 | fieldOffset += fields[i]->type()->totalRegisterCount(); |
| 2447 | } |
| 2448 | |
| 2449 | dst.type = registerType(left); |
| 2450 | dst.index += fieldOffset; |
| 2451 | dst.mask = writeMask(right); |
| 2452 | |
| 2453 | return 0xE4; |
| 2454 | } |
| 2455 | break; |
| 2456 | case EOpVectorSwizzle: |
| 2457 | { |
| 2458 | ASSERT(left->isRegister()); |
| 2459 | |
| 2460 | int leftMask = dst.mask; |
| 2461 | |
| 2462 | int swizzle = 0; |
| 2463 | int rightMask = 0; |
| 2464 | |
| 2465 | TIntermSequence &sequence = right->getAsAggregate()->getSequence(); |
| 2466 | |
| 2467 | for(unsigned int i = 0; i < sequence.size(); i++) |
| 2468 | { |
| 2469 | int index = sequence[i]->getAsConstantUnion()->getIConst(0); |
| 2470 | |
| 2471 | int element = swizzleElement(leftSwizzle, index); |
| 2472 | rightMask = rightMask | (1 << element); |
| 2473 | swizzle = swizzle | swizzleElement(leftSwizzle, i) << (element * 2); |
| 2474 | } |
| 2475 | |
| 2476 | dst.mask = leftMask & rightMask; |
| 2477 | |
| 2478 | return swizzle; |
| 2479 | } |
| 2480 | break; |
| 2481 | default: |
| 2482 | UNREACHABLE(binary->getOp()); // Not an l-value operator |
| 2483 | break; |
| 2484 | } |
| 2485 | } |
| 2486 | else if(symbol) |
| 2487 | { |
| 2488 | dst.type = registerType(symbol); |
| 2489 | dst.index = registerIndex(symbol); |
| 2490 | dst.mask = writeMask(symbol); |
| 2491 | return 0xE4; |
| 2492 | } |
| 2493 | |
| 2494 | return 0xE4; |
| 2495 | } |
| 2496 | |
| 2497 | sw::Shader::ParameterType OutputASM::registerType(TIntermTyped *operand) |
| 2498 | { |
| 2499 | if(isSamplerRegister(operand)) |
| 2500 | { |
| 2501 | return sw::Shader::PARAMETER_SAMPLER; |
| 2502 | } |
| 2503 | |
| 2504 | const TQualifier qualifier = operand->getQualifier(); |
| 2505 | if((EvqFragColor == qualifier) || (EvqFragData == qualifier)) |
| 2506 | { |
| 2507 | if(((EvqFragData == qualifier) && (EvqFragColor == outputQualifier)) || |
| 2508 | ((EvqFragColor == qualifier) && (EvqFragData == outputQualifier))) |
| 2509 | { |
| 2510 | mContext.error(operand->getLine(), "static assignment to both gl_FragData and gl_FragColor", ""); |
| 2511 | } |
| 2512 | outputQualifier = qualifier; |
| 2513 | } |
| 2514 | |
| 2515 | if(qualifier == EvqConstExpr && (!operand->getAsConstantUnion() || !operand->getAsConstantUnion()->getUnionArrayPointer())) |
| 2516 | { |
| 2517 | return sw::Shader::PARAMETER_TEMP; |
| 2518 | } |
| 2519 | |
| 2520 | switch(qualifier) |
| 2521 | { |
| 2522 | case EvqTemporary: return sw::Shader::PARAMETER_TEMP; |
| 2523 | case EvqGlobal: return sw::Shader::PARAMETER_TEMP; |
| 2524 | case EvqConstExpr: return sw::Shader::PARAMETER_FLOAT4LITERAL; // All converted to float |
| 2525 | case EvqAttribute: return sw::Shader::PARAMETER_INPUT; |
| 2526 | case EvqVaryingIn: return sw::Shader::PARAMETER_INPUT; |
| 2527 | case EvqVaryingOut: return sw::Shader::PARAMETER_OUTPUT; |
| 2528 | case EvqVertexIn: return sw::Shader::PARAMETER_INPUT; |
| 2529 | case EvqFragmentOut: return sw::Shader::PARAMETER_COLOROUT; |
| 2530 | case EvqVertexOut: return sw::Shader::PARAMETER_OUTPUT; |
| 2531 | case EvqFragmentIn: return sw::Shader::PARAMETER_INPUT; |
| 2532 | case EvqInvariantVaryingIn: return sw::Shader::PARAMETER_INPUT; // FIXME: Guarantee invariance at the backend |
| 2533 | case EvqInvariantVaryingOut: return sw::Shader::PARAMETER_OUTPUT; // FIXME: Guarantee invariance at the backend |
| 2534 | case EvqSmooth: return sw::Shader::PARAMETER_OUTPUT; |
| 2535 | case EvqFlat: return sw::Shader::PARAMETER_OUTPUT; |
| 2536 | case EvqCentroidOut: return sw::Shader::PARAMETER_OUTPUT; |
| 2537 | case EvqSmoothIn: return sw::Shader::PARAMETER_INPUT; |
| 2538 | case EvqFlatIn: return sw::Shader::PARAMETER_INPUT; |
| 2539 | case EvqCentroidIn: return sw::Shader::PARAMETER_INPUT; |
| 2540 | case EvqUniform: return sw::Shader::PARAMETER_CONST; |
| 2541 | case EvqIn: return sw::Shader::PARAMETER_TEMP; |
| 2542 | case EvqOut: return sw::Shader::PARAMETER_TEMP; |
| 2543 | case EvqInOut: return sw::Shader::PARAMETER_TEMP; |
| 2544 | case EvqConstReadOnly: return sw::Shader::PARAMETER_TEMP; |
| 2545 | case EvqPosition: return sw::Shader::PARAMETER_OUTPUT; |
| 2546 | case EvqPointSize: return sw::Shader::PARAMETER_OUTPUT; |
| 2547 | case EvqInstanceID: return sw::Shader::PARAMETER_MISCTYPE; |
| 2548 | case EvqFragCoord: return sw::Shader::PARAMETER_MISCTYPE; |
| 2549 | case EvqFrontFacing: return sw::Shader::PARAMETER_MISCTYPE; |
| 2550 | case EvqPointCoord: return sw::Shader::PARAMETER_INPUT; |
| 2551 | case EvqFragColor: return sw::Shader::PARAMETER_COLOROUT; |
| 2552 | case EvqFragData: return sw::Shader::PARAMETER_COLOROUT; |
| 2553 | case EvqFragDepth: return sw::Shader::PARAMETER_DEPTHOUT; |
| 2554 | default: UNREACHABLE(qualifier); |
| 2555 | } |
| 2556 | |
| 2557 | return sw::Shader::PARAMETER_VOID; |
| 2558 | } |
| 2559 | |
Alexis Hetu | 12b0050 | 2016-05-20 13:01:11 -0400 | [diff] [blame] | 2560 | bool OutputASM::hasFlatQualifier(TIntermTyped *operand) |
| 2561 | { |
| 2562 | const TQualifier qualifier = operand->getQualifier(); |
| 2563 | return qualifier == EvqFlat || qualifier == EvqFlatOut || qualifier == EvqFlatIn; |
| 2564 | } |
| 2565 | |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 2566 | unsigned int OutputASM::registerIndex(TIntermTyped *operand) |
| 2567 | { |
| 2568 | if(isSamplerRegister(operand)) |
| 2569 | { |
| 2570 | return samplerRegister(operand); |
| 2571 | } |
| 2572 | |
| 2573 | switch(operand->getQualifier()) |
| 2574 | { |
| 2575 | case EvqTemporary: return temporaryRegister(operand); |
| 2576 | case EvqGlobal: return temporaryRegister(operand); |
| 2577 | case EvqConstExpr: return temporaryRegister(operand); // Unevaluated constant expression |
| 2578 | case EvqAttribute: return attributeRegister(operand); |
| 2579 | case EvqVaryingIn: return varyingRegister(operand); |
| 2580 | case EvqVaryingOut: return varyingRegister(operand); |
| 2581 | case EvqVertexIn: return attributeRegister(operand); |
| 2582 | case EvqFragmentOut: return fragmentOutputRegister(operand); |
| 2583 | case EvqVertexOut: return varyingRegister(operand); |
| 2584 | case EvqFragmentIn: return varyingRegister(operand); |
| 2585 | case EvqInvariantVaryingIn: return varyingRegister(operand); |
| 2586 | case EvqInvariantVaryingOut: return varyingRegister(operand); |
| 2587 | case EvqSmooth: return varyingRegister(operand); |
| 2588 | case EvqFlat: return varyingRegister(operand); |
| 2589 | case EvqCentroidOut: return varyingRegister(operand); |
| 2590 | case EvqSmoothIn: return varyingRegister(operand); |
| 2591 | case EvqFlatIn: return varyingRegister(operand); |
| 2592 | case EvqCentroidIn: return varyingRegister(operand); |
| 2593 | case EvqUniform: return uniformRegister(operand); |
| 2594 | case EvqIn: return temporaryRegister(operand); |
| 2595 | case EvqOut: return temporaryRegister(operand); |
| 2596 | case EvqInOut: return temporaryRegister(operand); |
| 2597 | case EvqConstReadOnly: return temporaryRegister(operand); |
| 2598 | case EvqPosition: return varyingRegister(operand); |
| 2599 | case EvqPointSize: return varyingRegister(operand); |
| 2600 | case EvqInstanceID: vertexShader->instanceIdDeclared = true; return 0; |
| 2601 | case EvqFragCoord: pixelShader->vPosDeclared = true; return 0; |
| 2602 | case EvqFrontFacing: pixelShader->vFaceDeclared = true; return 1; |
| 2603 | case EvqPointCoord: return varyingRegister(operand); |
| 2604 | case EvqFragColor: return 0; |
| 2605 | case EvqFragData: return fragmentOutputRegister(operand); |
| 2606 | case EvqFragDepth: return 0; |
| 2607 | default: UNREACHABLE(operand->getQualifier()); |
| 2608 | } |
| 2609 | |
| 2610 | return 0; |
| 2611 | } |
| 2612 | |
| 2613 | int OutputASM::writeMask(TIntermTyped *destination, int index) |
| 2614 | { |
| 2615 | if(destination->getQualifier() == EvqPointSize) |
| 2616 | { |
| 2617 | return 0x2; // Point size stored in the y component |
| 2618 | } |
| 2619 | |
| 2620 | return 0xF >> (4 - registerSize(destination->getType(), index)); |
| 2621 | } |
| 2622 | |
| 2623 | int OutputASM::readSwizzle(TIntermTyped *argument, int size) |
| 2624 | { |
| 2625 | if(argument->getQualifier() == EvqPointSize) |
| 2626 | { |
| 2627 | return 0x55; // Point size stored in the y component |
| 2628 | } |
| 2629 | |
| 2630 | static const unsigned char swizzleSize[5] = {0x00, 0x00, 0x54, 0xA4, 0xE4}; // (void), xxxx, xyyy, xyzz, xyzw |
| 2631 | |
| 2632 | return swizzleSize[size]; |
| 2633 | } |
| 2634 | |
| 2635 | // Conservatively checks whether an expression is fast to compute and has no side effects |
| 2636 | bool OutputASM::trivial(TIntermTyped *expression, int budget) |
| 2637 | { |
| 2638 | if(!expression->isRegister()) |
| 2639 | { |
| 2640 | return false; |
| 2641 | } |
| 2642 | |
| 2643 | return cost(expression, budget) >= 0; |
| 2644 | } |
| 2645 | |
| 2646 | // Returns the remaining computing budget (if < 0 the expression is too expensive or has side effects) |
| 2647 | int OutputASM::cost(TIntermNode *expression, int budget) |
| 2648 | { |
| 2649 | if(budget < 0) |
| 2650 | { |
| 2651 | return budget; |
| 2652 | } |
| 2653 | |
| 2654 | if(expression->getAsSymbolNode()) |
| 2655 | { |
| 2656 | return budget; |
| 2657 | } |
| 2658 | else if(expression->getAsConstantUnion()) |
| 2659 | { |
| 2660 | return budget; |
| 2661 | } |
| 2662 | else if(expression->getAsBinaryNode()) |
| 2663 | { |
| 2664 | TIntermBinary *binary = expression->getAsBinaryNode(); |
| 2665 | |
| 2666 | switch(binary->getOp()) |
| 2667 | { |
| 2668 | case EOpVectorSwizzle: |
| 2669 | case EOpIndexDirect: |
| 2670 | case EOpIndexDirectStruct: |
| 2671 | case EOpIndexDirectInterfaceBlock: |
| 2672 | return cost(binary->getLeft(), budget - 0); |
| 2673 | case EOpAdd: |
| 2674 | case EOpSub: |
| 2675 | case EOpMul: |
| 2676 | return cost(binary->getLeft(), cost(binary->getRight(), budget - 1)); |
| 2677 | default: |
| 2678 | return -1; |
| 2679 | } |
| 2680 | } |
| 2681 | else if(expression->getAsUnaryNode()) |
| 2682 | { |
| 2683 | TIntermUnary *unary = expression->getAsUnaryNode(); |
| 2684 | |
| 2685 | switch(unary->getOp()) |
| 2686 | { |
| 2687 | case EOpAbs: |
| 2688 | case EOpNegative: |
| 2689 | return cost(unary->getOperand(), budget - 1); |
| 2690 | default: |
| 2691 | return -1; |
| 2692 | } |
| 2693 | } |
| 2694 | else if(expression->getAsSelectionNode()) |
| 2695 | { |
| 2696 | TIntermSelection *selection = expression->getAsSelectionNode(); |
| 2697 | |
| 2698 | if(selection->usesTernaryOperator()) |
| 2699 | { |
| 2700 | TIntermTyped *condition = selection->getCondition(); |
| 2701 | TIntermNode *trueBlock = selection->getTrueBlock(); |
| 2702 | TIntermNode *falseBlock = selection->getFalseBlock(); |
| 2703 | TIntermConstantUnion *constantCondition = condition->getAsConstantUnion(); |
| 2704 | |
| 2705 | if(constantCondition) |
| 2706 | { |
| 2707 | bool trueCondition = constantCondition->getUnionArrayPointer()->getBConst(); |
| 2708 | |
| 2709 | if(trueCondition) |
| 2710 | { |
| 2711 | return cost(trueBlock, budget - 0); |
| 2712 | } |
| 2713 | else |
| 2714 | { |
| 2715 | return cost(falseBlock, budget - 0); |
| 2716 | } |
| 2717 | } |
| 2718 | else |
| 2719 | { |
| 2720 | return cost(trueBlock, cost(falseBlock, budget - 2)); |
| 2721 | } |
| 2722 | } |
| 2723 | } |
| 2724 | |
| 2725 | return -1; |
| 2726 | } |
| 2727 | |
| 2728 | const Function *OutputASM::findFunction(const TString &name) |
| 2729 | { |
| 2730 | for(unsigned int f = 0; f < functionArray.size(); f++) |
| 2731 | { |
| 2732 | if(functionArray[f].name == name) |
| 2733 | { |
| 2734 | return &functionArray[f]; |
| 2735 | } |
| 2736 | } |
| 2737 | |
| 2738 | return 0; |
| 2739 | } |
| 2740 | |
| 2741 | int OutputASM::temporaryRegister(TIntermTyped *temporary) |
| 2742 | { |
| 2743 | return allocate(temporaries, temporary); |
| 2744 | } |
| 2745 | |
| 2746 | int OutputASM::varyingRegister(TIntermTyped *varying) |
| 2747 | { |
| 2748 | int var = lookup(varyings, varying); |
| 2749 | |
| 2750 | if(var == -1) |
| 2751 | { |
| 2752 | var = allocate(varyings, varying); |
| 2753 | int componentCount = varying->registerSize(); |
| 2754 | int registerCount = varying->totalRegisterCount(); |
| 2755 | |
| 2756 | if(pixelShader) |
| 2757 | { |
Nicolas Capens | 3b4c93f | 2016-05-18 12:51:37 -0400 | [diff] [blame] | 2758 | if((var + registerCount) > sw::MAX_FRAGMENT_INPUTS) |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 2759 | { |
| 2760 | mContext.error(varying->getLine(), "Varyings packing failed: Too many varyings", "fragment shader"); |
| 2761 | return 0; |
| 2762 | } |
| 2763 | |
| 2764 | if(varying->getQualifier() == EvqPointCoord) |
| 2765 | { |
| 2766 | ASSERT(varying->isRegister()); |
| 2767 | if(componentCount >= 1) pixelShader->semantic[var][0] = sw::Shader::Semantic(sw::Shader::USAGE_TEXCOORD, var); |
| 2768 | if(componentCount >= 2) pixelShader->semantic[var][1] = sw::Shader::Semantic(sw::Shader::USAGE_TEXCOORD, var); |
| 2769 | if(componentCount >= 3) pixelShader->semantic[var][2] = sw::Shader::Semantic(sw::Shader::USAGE_TEXCOORD, var); |
| 2770 | if(componentCount >= 4) pixelShader->semantic[var][3] = sw::Shader::Semantic(sw::Shader::USAGE_TEXCOORD, var); |
| 2771 | } |
| 2772 | else |
| 2773 | { |
| 2774 | for(int i = 0; i < varying->totalRegisterCount(); i++) |
| 2775 | { |
Alexis Hetu | 12b0050 | 2016-05-20 13:01:11 -0400 | [diff] [blame] | 2776 | bool flat = hasFlatQualifier(varying); |
| 2777 | |
| 2778 | if(componentCount >= 1) pixelShader->semantic[var + i][0] = sw::Shader::Semantic(sw::Shader::USAGE_COLOR, var + i, flat); |
| 2779 | if(componentCount >= 2) pixelShader->semantic[var + i][1] = sw::Shader::Semantic(sw::Shader::USAGE_COLOR, var + i, flat); |
| 2780 | if(componentCount >= 3) pixelShader->semantic[var + i][2] = sw::Shader::Semantic(sw::Shader::USAGE_COLOR, var + i, flat); |
| 2781 | if(componentCount >= 4) pixelShader->semantic[var + i][3] = sw::Shader::Semantic(sw::Shader::USAGE_COLOR, var + i, flat); |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 2782 | } |
| 2783 | } |
| 2784 | } |
| 2785 | else if(vertexShader) |
| 2786 | { |
Nicolas Capens | ec0936c | 2016-05-18 12:32:02 -0400 | [diff] [blame] | 2787 | if((var + registerCount) > sw::MAX_VERTEX_OUTPUTS) |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 2788 | { |
| 2789 | mContext.error(varying->getLine(), "Varyings packing failed: Too many varyings", "vertex shader"); |
| 2790 | return 0; |
| 2791 | } |
| 2792 | |
| 2793 | if(varying->getQualifier() == EvqPosition) |
| 2794 | { |
| 2795 | ASSERT(varying->isRegister()); |
| 2796 | vertexShader->output[var][0] = sw::Shader::Semantic(sw::Shader::USAGE_POSITION, 0); |
| 2797 | vertexShader->output[var][1] = sw::Shader::Semantic(sw::Shader::USAGE_POSITION, 0); |
| 2798 | vertexShader->output[var][2] = sw::Shader::Semantic(sw::Shader::USAGE_POSITION, 0); |
| 2799 | vertexShader->output[var][3] = sw::Shader::Semantic(sw::Shader::USAGE_POSITION, 0); |
| 2800 | vertexShader->positionRegister = var; |
| 2801 | } |
| 2802 | else if(varying->getQualifier() == EvqPointSize) |
| 2803 | { |
| 2804 | ASSERT(varying->isRegister()); |
| 2805 | vertexShader->output[var][0] = sw::Shader::Semantic(sw::Shader::USAGE_PSIZE, 0); |
| 2806 | vertexShader->output[var][1] = sw::Shader::Semantic(sw::Shader::USAGE_PSIZE, 0); |
| 2807 | vertexShader->output[var][2] = sw::Shader::Semantic(sw::Shader::USAGE_PSIZE, 0); |
| 2808 | vertexShader->output[var][3] = sw::Shader::Semantic(sw::Shader::USAGE_PSIZE, 0); |
| 2809 | vertexShader->pointSizeRegister = var; |
| 2810 | } |
| 2811 | else |
| 2812 | { |
| 2813 | // Semantic indexes for user varyings will be assigned during program link to match the pixel shader |
| 2814 | } |
| 2815 | } |
| 2816 | else UNREACHABLE(0); |
| 2817 | |
| 2818 | declareVarying(varying, var); |
| 2819 | } |
| 2820 | |
| 2821 | return var; |
| 2822 | } |
| 2823 | |
| 2824 | void OutputASM::declareVarying(TIntermTyped *varying, int reg) |
| 2825 | { |
| 2826 | if(varying->getQualifier() != EvqPointCoord) // gl_PointCoord does not need linking |
| 2827 | { |
| 2828 | const TType &type = varying->getType(); |
| 2829 | const char *name = varying->getAsSymbolNode()->getSymbol().c_str(); |
| 2830 | VaryingList &activeVaryings = shaderObject->varyings; |
| 2831 | |
| 2832 | // Check if this varying has been declared before without having a register assigned |
| 2833 | for(VaryingList::iterator v = activeVaryings.begin(); v != activeVaryings.end(); v++) |
| 2834 | { |
| 2835 | if(v->name == name) |
| 2836 | { |
| 2837 | if(reg >= 0) |
| 2838 | { |
| 2839 | ASSERT(v->reg < 0 || v->reg == reg); |
| 2840 | v->reg = reg; |
| 2841 | } |
| 2842 | |
| 2843 | return; |
| 2844 | } |
| 2845 | } |
| 2846 | |
| 2847 | activeVaryings.push_back(glsl::Varying(glVariableType(type), name, varying->getArraySize(), reg, 0)); |
| 2848 | } |
| 2849 | } |
| 2850 | |
| 2851 | int OutputASM::uniformRegister(TIntermTyped *uniform) |
| 2852 | { |
| 2853 | const TType &type = uniform->getType(); |
| 2854 | ASSERT(!IsSampler(type.getBasicType())); |
| 2855 | TInterfaceBlock *block = type.getAsInterfaceBlock(); |
| 2856 | TIntermSymbol *symbol = uniform->getAsSymbolNode(); |
| 2857 | ASSERT(symbol || block); |
| 2858 | |
| 2859 | if(symbol || block) |
| 2860 | { |
| 2861 | TInterfaceBlock* parentBlock = type.getInterfaceBlock(); |
| 2862 | bool isBlockMember = (!block && parentBlock); |
| 2863 | int index = isBlockMember ? lookup(uniforms, parentBlock) : lookup(uniforms, uniform); |
| 2864 | |
| 2865 | if(index == -1 || isBlockMember) |
| 2866 | { |
| 2867 | if(index == -1) |
| 2868 | { |
| 2869 | index = allocate(uniforms, uniform); |
| 2870 | } |
| 2871 | |
| 2872 | // Verify if the current uniform is a member of an already declared block |
| 2873 | const TString &name = symbol ? symbol->getSymbol() : block->name(); |
| 2874 | int blockMemberIndex = blockMemberLookup(type, name, index); |
| 2875 | if(blockMemberIndex == -1) |
| 2876 | { |
| 2877 | declareUniform(type, name, index); |
| 2878 | } |
| 2879 | else |
| 2880 | { |
| 2881 | index = blockMemberIndex; |
| 2882 | } |
| 2883 | } |
| 2884 | |
| 2885 | return index; |
| 2886 | } |
| 2887 | |
| 2888 | return 0; |
| 2889 | } |
| 2890 | |
| 2891 | int OutputASM::attributeRegister(TIntermTyped *attribute) |
| 2892 | { |
| 2893 | ASSERT(!attribute->isArray()); |
| 2894 | |
| 2895 | int index = lookup(attributes, attribute); |
| 2896 | |
| 2897 | if(index == -1) |
| 2898 | { |
| 2899 | TIntermSymbol *symbol = attribute->getAsSymbolNode(); |
| 2900 | ASSERT(symbol); |
| 2901 | |
| 2902 | if(symbol) |
| 2903 | { |
| 2904 | index = allocate(attributes, attribute); |
| 2905 | const TType &type = attribute->getType(); |
| 2906 | int registerCount = attribute->totalRegisterCount(); |
| 2907 | |
Nicolas Capens | f0aef1a | 2016-05-18 14:44:21 -0400 | [diff] [blame] | 2908 | if(vertexShader && (index + registerCount) <= sw::MAX_VERTEX_INPUTS) |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 2909 | { |
| 2910 | for(int i = 0; i < registerCount; i++) |
| 2911 | { |
| 2912 | vertexShader->input[index + i] = sw::Shader::Semantic(sw::Shader::USAGE_TEXCOORD, index + i); |
| 2913 | } |
| 2914 | } |
| 2915 | |
| 2916 | ActiveAttributes &activeAttributes = shaderObject->activeAttributes; |
| 2917 | |
| 2918 | const char *name = symbol->getSymbol().c_str(); |
| 2919 | activeAttributes.push_back(Attribute(glVariableType(type), name, type.getArraySize(), type.getLayoutQualifier().location, index)); |
| 2920 | } |
| 2921 | } |
| 2922 | |
| 2923 | return index; |
| 2924 | } |
| 2925 | |
| 2926 | int OutputASM::fragmentOutputRegister(TIntermTyped *fragmentOutput) |
| 2927 | { |
| 2928 | return allocate(fragmentOutputs, fragmentOutput); |
| 2929 | } |
| 2930 | |
| 2931 | int OutputASM::samplerRegister(TIntermTyped *sampler) |
| 2932 | { |
| 2933 | const TType &type = sampler->getType(); |
| 2934 | ASSERT(IsSampler(type.getBasicType()) || type.isStruct()); // Structures can contain samplers |
| 2935 | |
| 2936 | TIntermSymbol *symbol = sampler->getAsSymbolNode(); |
| 2937 | TIntermBinary *binary = sampler->getAsBinaryNode(); |
| 2938 | |
| 2939 | if(symbol && type.getQualifier() == EvqUniform) |
| 2940 | { |
| 2941 | return samplerRegister(symbol); |
| 2942 | } |
| 2943 | else if(binary) |
| 2944 | { |
| 2945 | TIntermTyped *left = binary->getLeft(); |
| 2946 | TIntermTyped *right = binary->getRight(); |
| 2947 | const TType &leftType = left->getType(); |
| 2948 | int index = right->getAsConstantUnion() ? right->getAsConstantUnion()->getIConst(0) : 0; |
| 2949 | int offset = 0; |
| 2950 | |
| 2951 | switch(binary->getOp()) |
| 2952 | { |
| 2953 | case EOpIndexDirect: |
| 2954 | ASSERT(left->isArray()); |
| 2955 | offset = index * leftType.elementRegisterCount(); |
| 2956 | break; |
| 2957 | case EOpIndexDirectStruct: |
| 2958 | ASSERT(leftType.isStruct()); |
| 2959 | { |
| 2960 | const TFieldList &fields = leftType.getStruct()->fields(); |
| 2961 | |
| 2962 | for(int i = 0; i < index; i++) |
| 2963 | { |
| 2964 | offset += fields[i]->type()->totalRegisterCount(); |
| 2965 | } |
| 2966 | } |
| 2967 | break; |
| 2968 | case EOpIndexIndirect: // Indirect indexing produces a temporary, not a sampler register |
| 2969 | return -1; |
| 2970 | case EOpIndexDirectInterfaceBlock: // Interface blocks can't contain samplers |
| 2971 | default: |
| 2972 | UNREACHABLE(binary->getOp()); |
| 2973 | return -1; |
| 2974 | } |
| 2975 | |
| 2976 | int base = samplerRegister(left); |
| 2977 | |
| 2978 | if(base < 0) |
| 2979 | { |
| 2980 | return -1; |
| 2981 | } |
| 2982 | |
| 2983 | return base + offset; |
| 2984 | } |
| 2985 | |
| 2986 | UNREACHABLE(0); |
| 2987 | return -1; // Not a sampler register |
| 2988 | } |
| 2989 | |
| 2990 | int OutputASM::samplerRegister(TIntermSymbol *sampler) |
| 2991 | { |
| 2992 | const TType &type = sampler->getType(); |
| 2993 | ASSERT(IsSampler(type.getBasicType()) || type.isStruct()); // Structures can contain samplers |
| 2994 | |
| 2995 | int index = lookup(samplers, sampler); |
| 2996 | |
| 2997 | if(index == -1) |
| 2998 | { |
| 2999 | index = allocate(samplers, sampler); |
| 3000 | |
| 3001 | if(sampler->getQualifier() == EvqUniform) |
| 3002 | { |
| 3003 | const char *name = sampler->getSymbol().c_str(); |
| 3004 | declareUniform(type, name, index); |
| 3005 | } |
| 3006 | } |
| 3007 | |
| 3008 | return index; |
| 3009 | } |
| 3010 | |
| 3011 | bool OutputASM::isSamplerRegister(TIntermTyped *operand) |
| 3012 | { |
| 3013 | return operand && IsSampler(operand->getBasicType()) && samplerRegister(operand) >= 0; |
| 3014 | } |
| 3015 | |
| 3016 | int OutputASM::lookup(VariableArray &list, TIntermTyped *variable) |
| 3017 | { |
| 3018 | for(unsigned int i = 0; i < list.size(); i++) |
| 3019 | { |
| 3020 | if(list[i] == variable) |
| 3021 | { |
| 3022 | return i; // Pointer match |
| 3023 | } |
| 3024 | } |
| 3025 | |
| 3026 | TIntermSymbol *varSymbol = variable->getAsSymbolNode(); |
| 3027 | TInterfaceBlock *varBlock = variable->getType().getAsInterfaceBlock(); |
| 3028 | |
| 3029 | if(varBlock) |
| 3030 | { |
| 3031 | for(unsigned int i = 0; i < list.size(); i++) |
| 3032 | { |
| 3033 | if(list[i]) |
| 3034 | { |
| 3035 | TInterfaceBlock *listBlock = list[i]->getType().getAsInterfaceBlock(); |
| 3036 | |
| 3037 | if(listBlock) |
| 3038 | { |
| 3039 | if(listBlock->name() == varBlock->name()) |
| 3040 | { |
| 3041 | ASSERT(listBlock->arraySize() == varBlock->arraySize()); |
| 3042 | ASSERT(listBlock->fields() == varBlock->fields()); |
| 3043 | ASSERT(listBlock->blockStorage() == varBlock->blockStorage()); |
| 3044 | ASSERT(listBlock->matrixPacking() == varBlock->matrixPacking()); |
| 3045 | |
| 3046 | return i; |
| 3047 | } |
| 3048 | } |
| 3049 | } |
| 3050 | } |
| 3051 | } |
| 3052 | else if(varSymbol) |
| 3053 | { |
| 3054 | for(unsigned int i = 0; i < list.size(); i++) |
| 3055 | { |
| 3056 | if(list[i]) |
| 3057 | { |
| 3058 | TIntermSymbol *listSymbol = list[i]->getAsSymbolNode(); |
| 3059 | |
| 3060 | if(listSymbol) |
| 3061 | { |
| 3062 | if(listSymbol->getId() == varSymbol->getId()) |
| 3063 | { |
| 3064 | ASSERT(listSymbol->getSymbol() == varSymbol->getSymbol()); |
| 3065 | ASSERT(listSymbol->getType() == varSymbol->getType()); |
| 3066 | ASSERT(listSymbol->getQualifier() == varSymbol->getQualifier()); |
| 3067 | |
| 3068 | return i; |
| 3069 | } |
| 3070 | } |
| 3071 | } |
| 3072 | } |
| 3073 | } |
| 3074 | |
| 3075 | return -1; |
| 3076 | } |
| 3077 | |
| 3078 | int OutputASM::lookup(VariableArray &list, TInterfaceBlock *block) |
| 3079 | { |
| 3080 | for(unsigned int i = 0; i < list.size(); i++) |
| 3081 | { |
| 3082 | if(list[i] && (list[i]->getType().getInterfaceBlock() == block)) |
| 3083 | { |
| 3084 | return i; // Pointer match |
| 3085 | } |
| 3086 | } |
| 3087 | return -1; |
| 3088 | } |
| 3089 | |
| 3090 | int OutputASM::allocate(VariableArray &list, TIntermTyped *variable) |
| 3091 | { |
| 3092 | int index = lookup(list, variable); |
| 3093 | |
| 3094 | if(index == -1) |
| 3095 | { |
| 3096 | unsigned int registerCount = variable->blockRegisterCount(); |
| 3097 | |
| 3098 | for(unsigned int i = 0; i < list.size(); i++) |
| 3099 | { |
| 3100 | if(list[i] == 0) |
| 3101 | { |
| 3102 | unsigned int j = 1; |
| 3103 | for( ; j < registerCount && (i + j) < list.size(); j++) |
| 3104 | { |
| 3105 | if(list[i + j] != 0) |
| 3106 | { |
| 3107 | break; |
| 3108 | } |
| 3109 | } |
| 3110 | |
| 3111 | if(j == registerCount) // Found free slots |
| 3112 | { |
| 3113 | for(unsigned int j = 0; j < registerCount; j++) |
| 3114 | { |
| 3115 | list[i + j] = variable; |
| 3116 | } |
| 3117 | |
| 3118 | return i; |
| 3119 | } |
| 3120 | } |
| 3121 | } |
| 3122 | |
| 3123 | index = list.size(); |
| 3124 | |
| 3125 | for(unsigned int i = 0; i < registerCount; i++) |
| 3126 | { |
| 3127 | list.push_back(variable); |
| 3128 | } |
| 3129 | } |
| 3130 | |
| 3131 | return index; |
| 3132 | } |
| 3133 | |
| 3134 | void OutputASM::free(VariableArray &list, TIntermTyped *variable) |
| 3135 | { |
| 3136 | int index = lookup(list, variable); |
| 3137 | |
| 3138 | if(index >= 0) |
| 3139 | { |
| 3140 | list[index] = 0; |
| 3141 | } |
| 3142 | } |
| 3143 | |
| 3144 | int OutputASM::blockMemberLookup(const TType &type, const TString &name, int registerIndex) |
| 3145 | { |
| 3146 | const TInterfaceBlock *block = type.getInterfaceBlock(); |
| 3147 | |
| 3148 | if(block) |
| 3149 | { |
| 3150 | ActiveUniformBlocks &activeUniformBlocks = shaderObject->activeUniformBlocks; |
| 3151 | const TFieldList& fields = block->fields(); |
| 3152 | const TString &blockName = block->name(); |
| 3153 | int fieldRegisterIndex = registerIndex; |
| 3154 | |
| 3155 | if(!type.isInterfaceBlock()) |
| 3156 | { |
| 3157 | // This is a uniform that's part of a block, let's see if the block is already defined |
| 3158 | for(size_t i = 0; i < activeUniformBlocks.size(); ++i) |
| 3159 | { |
| 3160 | if(activeUniformBlocks[i].name == blockName.c_str()) |
| 3161 | { |
| 3162 | // The block is already defined, find the register for the current uniform and return it |
| 3163 | for(size_t j = 0; j < fields.size(); j++) |
| 3164 | { |
| 3165 | const TString &fieldName = fields[j]->name(); |
| 3166 | if(fieldName == name) |
| 3167 | { |
| 3168 | return fieldRegisterIndex; |
| 3169 | } |
| 3170 | |
| 3171 | fieldRegisterIndex += fields[j]->type()->totalRegisterCount(); |
| 3172 | } |
| 3173 | |
| 3174 | ASSERT(false); |
| 3175 | return fieldRegisterIndex; |
| 3176 | } |
| 3177 | } |
| 3178 | } |
| 3179 | } |
| 3180 | |
| 3181 | return -1; |
| 3182 | } |
| 3183 | |
| 3184 | void OutputASM::declareUniform(const TType &type, const TString &name, int registerIndex, int blockId, BlockLayoutEncoder* encoder) |
| 3185 | { |
| 3186 | const TStructure *structure = type.getStruct(); |
| 3187 | const TInterfaceBlock *block = (type.isInterfaceBlock() || (blockId == -1)) ? type.getInterfaceBlock() : nullptr; |
| 3188 | |
| 3189 | if(!structure && !block) |
| 3190 | { |
| 3191 | ActiveUniforms &activeUniforms = shaderObject->activeUniforms; |
| 3192 | const BlockMemberInfo blockInfo = encoder ? encoder->encodeType(type) : BlockMemberInfo::getDefaultBlockInfo(); |
| 3193 | if(blockId >= 0) |
| 3194 | { |
| 3195 | blockDefinitions[blockId][registerIndex] = TypedMemberInfo(blockInfo, type); |
| 3196 | shaderObject->activeUniformBlocks[blockId].fields.push_back(activeUniforms.size()); |
| 3197 | } |
| 3198 | int fieldRegisterIndex = encoder ? shaderObject->activeUniformBlocks[blockId].registerIndex + BlockLayoutEncoder::getBlockRegister(blockInfo) : registerIndex; |
| 3199 | activeUniforms.push_back(Uniform(glVariableType(type), glVariablePrecision(type), name.c_str(), type.getArraySize(), |
| 3200 | fieldRegisterIndex, blockId, blockInfo)); |
| 3201 | if(IsSampler(type.getBasicType())) |
| 3202 | { |
| 3203 | for(int i = 0; i < type.totalRegisterCount(); i++) |
| 3204 | { |
| 3205 | shader->declareSampler(fieldRegisterIndex + i); |
| 3206 | } |
| 3207 | } |
| 3208 | } |
| 3209 | else if(block) |
| 3210 | { |
| 3211 | ActiveUniformBlocks &activeUniformBlocks = shaderObject->activeUniformBlocks; |
| 3212 | const TFieldList& fields = block->fields(); |
| 3213 | const TString &blockName = block->name(); |
| 3214 | int fieldRegisterIndex = registerIndex; |
| 3215 | bool isUniformBlockMember = !type.isInterfaceBlock() && (blockId == -1); |
| 3216 | |
| 3217 | blockId = activeUniformBlocks.size(); |
| 3218 | bool isRowMajor = block->matrixPacking() == EmpRowMajor; |
| 3219 | activeUniformBlocks.push_back(UniformBlock(blockName.c_str(), 0, block->arraySize(), |
| 3220 | block->blockStorage(), isRowMajor, registerIndex, blockId)); |
| 3221 | blockDefinitions.push_back(BlockDefinitionIndexMap()); |
| 3222 | |
| 3223 | Std140BlockEncoder currentBlockEncoder(isRowMajor); |
| 3224 | currentBlockEncoder.enterAggregateType(); |
| 3225 | for(size_t i = 0; i < fields.size(); i++) |
| 3226 | { |
| 3227 | const TType &fieldType = *(fields[i]->type()); |
| 3228 | const TString &fieldName = fields[i]->name(); |
| 3229 | if(isUniformBlockMember && (fieldName == name)) |
| 3230 | { |
| 3231 | registerIndex = fieldRegisterIndex; |
| 3232 | } |
| 3233 | |
| 3234 | const TString uniformName = block->hasInstanceName() ? blockName + "." + fieldName : fieldName; |
| 3235 | |
| 3236 | declareUniform(fieldType, uniformName, fieldRegisterIndex, blockId, ¤tBlockEncoder); |
| 3237 | fieldRegisterIndex += fieldType.totalRegisterCount(); |
| 3238 | } |
| 3239 | currentBlockEncoder.exitAggregateType(); |
| 3240 | activeUniformBlocks[blockId].dataSize = currentBlockEncoder.getBlockSize(); |
| 3241 | } |
| 3242 | else |
| 3243 | { |
| 3244 | int fieldRegisterIndex = registerIndex; |
| 3245 | |
| 3246 | const TFieldList& fields = structure->fields(); |
| 3247 | if(type.isArray() && (structure || type.isInterfaceBlock())) |
| 3248 | { |
| 3249 | for(int i = 0; i < type.getArraySize(); i++) |
| 3250 | { |
| 3251 | if(encoder) |
| 3252 | { |
| 3253 | encoder->enterAggregateType(); |
| 3254 | } |
| 3255 | for(size_t j = 0; j < fields.size(); j++) |
| 3256 | { |
| 3257 | const TType &fieldType = *(fields[j]->type()); |
| 3258 | const TString &fieldName = fields[j]->name(); |
| 3259 | const TString uniformName = name + "[" + str(i) + "]." + fieldName; |
| 3260 | |
| 3261 | declareUniform(fieldType, uniformName, fieldRegisterIndex, blockId, encoder); |
| 3262 | fieldRegisterIndex += fieldType.totalRegisterCount(); |
| 3263 | } |
| 3264 | if(encoder) |
| 3265 | { |
| 3266 | encoder->exitAggregateType(); |
| 3267 | } |
| 3268 | } |
| 3269 | } |
| 3270 | else |
| 3271 | { |
| 3272 | if(encoder) |
| 3273 | { |
| 3274 | encoder->enterAggregateType(); |
| 3275 | } |
| 3276 | for(size_t i = 0; i < fields.size(); i++) |
| 3277 | { |
| 3278 | const TType &fieldType = *(fields[i]->type()); |
| 3279 | const TString &fieldName = fields[i]->name(); |
| 3280 | const TString uniformName = name + "." + fieldName; |
| 3281 | |
| 3282 | declareUniform(fieldType, uniformName, fieldRegisterIndex, blockId, encoder); |
| 3283 | fieldRegisterIndex += fieldType.totalRegisterCount(); |
| 3284 | } |
| 3285 | if(encoder) |
| 3286 | { |
| 3287 | encoder->exitAggregateType(); |
| 3288 | } |
| 3289 | } |
| 3290 | } |
| 3291 | } |
| 3292 | |
| 3293 | GLenum OutputASM::glVariableType(const TType &type) |
| 3294 | { |
| 3295 | switch(type.getBasicType()) |
| 3296 | { |
| 3297 | case EbtFloat: |
| 3298 | if(type.isScalar()) |
| 3299 | { |
| 3300 | return GL_FLOAT; |
| 3301 | } |
| 3302 | else if(type.isVector()) |
| 3303 | { |
| 3304 | switch(type.getNominalSize()) |
| 3305 | { |
| 3306 | case 2: return GL_FLOAT_VEC2; |
| 3307 | case 3: return GL_FLOAT_VEC3; |
| 3308 | case 4: return GL_FLOAT_VEC4; |
| 3309 | default: UNREACHABLE(type.getNominalSize()); |
| 3310 | } |
| 3311 | } |
| 3312 | else if(type.isMatrix()) |
| 3313 | { |
| 3314 | switch(type.getNominalSize()) |
| 3315 | { |
| 3316 | case 2: |
| 3317 | switch(type.getSecondarySize()) |
| 3318 | { |
| 3319 | case 2: return GL_FLOAT_MAT2; |
| 3320 | case 3: return GL_FLOAT_MAT2x3; |
| 3321 | case 4: return GL_FLOAT_MAT2x4; |
| 3322 | default: UNREACHABLE(type.getSecondarySize()); |
| 3323 | } |
| 3324 | case 3: |
| 3325 | switch(type.getSecondarySize()) |
| 3326 | { |
| 3327 | case 2: return GL_FLOAT_MAT3x2; |
| 3328 | case 3: return GL_FLOAT_MAT3; |
| 3329 | case 4: return GL_FLOAT_MAT3x4; |
| 3330 | default: UNREACHABLE(type.getSecondarySize()); |
| 3331 | } |
| 3332 | case 4: |
| 3333 | switch(type.getSecondarySize()) |
| 3334 | { |
| 3335 | case 2: return GL_FLOAT_MAT4x2; |
| 3336 | case 3: return GL_FLOAT_MAT4x3; |
| 3337 | case 4: return GL_FLOAT_MAT4; |
| 3338 | default: UNREACHABLE(type.getSecondarySize()); |
| 3339 | } |
| 3340 | default: UNREACHABLE(type.getNominalSize()); |
| 3341 | } |
| 3342 | } |
| 3343 | else UNREACHABLE(0); |
| 3344 | break; |
| 3345 | case EbtInt: |
| 3346 | if(type.isScalar()) |
| 3347 | { |
| 3348 | return GL_INT; |
| 3349 | } |
| 3350 | else if(type.isVector()) |
| 3351 | { |
| 3352 | switch(type.getNominalSize()) |
| 3353 | { |
| 3354 | case 2: return GL_INT_VEC2; |
| 3355 | case 3: return GL_INT_VEC3; |
| 3356 | case 4: return GL_INT_VEC4; |
| 3357 | default: UNREACHABLE(type.getNominalSize()); |
| 3358 | } |
| 3359 | } |
| 3360 | else UNREACHABLE(0); |
| 3361 | break; |
| 3362 | case EbtUInt: |
| 3363 | if(type.isScalar()) |
| 3364 | { |
| 3365 | return GL_UNSIGNED_INT; |
| 3366 | } |
| 3367 | else if(type.isVector()) |
| 3368 | { |
| 3369 | switch(type.getNominalSize()) |
| 3370 | { |
| 3371 | case 2: return GL_UNSIGNED_INT_VEC2; |
| 3372 | case 3: return GL_UNSIGNED_INT_VEC3; |
| 3373 | case 4: return GL_UNSIGNED_INT_VEC4; |
| 3374 | default: UNREACHABLE(type.getNominalSize()); |
| 3375 | } |
| 3376 | } |
| 3377 | else UNREACHABLE(0); |
| 3378 | break; |
| 3379 | case EbtBool: |
| 3380 | if(type.isScalar()) |
| 3381 | { |
| 3382 | return GL_BOOL; |
| 3383 | } |
| 3384 | else if(type.isVector()) |
| 3385 | { |
| 3386 | switch(type.getNominalSize()) |
| 3387 | { |
| 3388 | case 2: return GL_BOOL_VEC2; |
| 3389 | case 3: return GL_BOOL_VEC3; |
| 3390 | case 4: return GL_BOOL_VEC4; |
| 3391 | default: UNREACHABLE(type.getNominalSize()); |
| 3392 | } |
| 3393 | } |
| 3394 | else UNREACHABLE(0); |
| 3395 | break; |
| 3396 | case EbtSampler2D: |
| 3397 | return GL_SAMPLER_2D; |
| 3398 | case EbtISampler2D: |
| 3399 | return GL_INT_SAMPLER_2D; |
| 3400 | case EbtUSampler2D: |
| 3401 | return GL_UNSIGNED_INT_SAMPLER_2D; |
| 3402 | case EbtSamplerCube: |
| 3403 | return GL_SAMPLER_CUBE; |
| 3404 | case EbtISamplerCube: |
| 3405 | return GL_INT_SAMPLER_CUBE; |
| 3406 | case EbtUSamplerCube: |
| 3407 | return GL_UNSIGNED_INT_SAMPLER_CUBE; |
| 3408 | case EbtSamplerExternalOES: |
| 3409 | return GL_SAMPLER_EXTERNAL_OES; |
| 3410 | case EbtSampler3D: |
| 3411 | return GL_SAMPLER_3D_OES; |
| 3412 | case EbtISampler3D: |
| 3413 | return GL_INT_SAMPLER_3D; |
| 3414 | case EbtUSampler3D: |
| 3415 | return GL_UNSIGNED_INT_SAMPLER_3D; |
| 3416 | case EbtSampler2DArray: |
| 3417 | return GL_SAMPLER_2D_ARRAY; |
| 3418 | case EbtISampler2DArray: |
| 3419 | return GL_INT_SAMPLER_2D_ARRAY; |
| 3420 | case EbtUSampler2DArray: |
| 3421 | return GL_UNSIGNED_INT_SAMPLER_2D_ARRAY; |
| 3422 | case EbtSampler2DShadow: |
| 3423 | return GL_SAMPLER_2D_SHADOW; |
| 3424 | case EbtSamplerCubeShadow: |
| 3425 | return GL_SAMPLER_CUBE_SHADOW; |
| 3426 | case EbtSampler2DArrayShadow: |
| 3427 | return GL_SAMPLER_2D_ARRAY_SHADOW; |
| 3428 | default: |
| 3429 | UNREACHABLE(type.getBasicType()); |
| 3430 | break; |
| 3431 | } |
| 3432 | |
| 3433 | return GL_NONE; |
| 3434 | } |
| 3435 | |
| 3436 | GLenum OutputASM::glVariablePrecision(const TType &type) |
| 3437 | { |
| 3438 | if(type.getBasicType() == EbtFloat) |
| 3439 | { |
| 3440 | switch(type.getPrecision()) |
| 3441 | { |
| 3442 | case EbpHigh: return GL_HIGH_FLOAT; |
| 3443 | case EbpMedium: return GL_MEDIUM_FLOAT; |
| 3444 | case EbpLow: return GL_LOW_FLOAT; |
| 3445 | case EbpUndefined: |
| 3446 | // Should be defined as the default precision by the parser |
| 3447 | default: UNREACHABLE(type.getPrecision()); |
| 3448 | } |
| 3449 | } |
| 3450 | else if(type.getBasicType() == EbtInt) |
| 3451 | { |
| 3452 | switch(type.getPrecision()) |
| 3453 | { |
| 3454 | case EbpHigh: return GL_HIGH_INT; |
| 3455 | case EbpMedium: return GL_MEDIUM_INT; |
| 3456 | case EbpLow: return GL_LOW_INT; |
| 3457 | case EbpUndefined: |
| 3458 | // Should be defined as the default precision by the parser |
| 3459 | default: UNREACHABLE(type.getPrecision()); |
| 3460 | } |
| 3461 | } |
| 3462 | |
| 3463 | // Other types (boolean, sampler) don't have a precision |
| 3464 | return GL_NONE; |
| 3465 | } |
| 3466 | |
| 3467 | int OutputASM::dim(TIntermNode *v) |
| 3468 | { |
| 3469 | TIntermTyped *vector = v->getAsTyped(); |
| 3470 | ASSERT(vector && vector->isRegister()); |
| 3471 | return vector->getNominalSize(); |
| 3472 | } |
| 3473 | |
| 3474 | int OutputASM::dim2(TIntermNode *m) |
| 3475 | { |
| 3476 | TIntermTyped *matrix = m->getAsTyped(); |
| 3477 | ASSERT(matrix && matrix->isMatrix() && !matrix->isArray()); |
| 3478 | return matrix->getSecondarySize(); |
| 3479 | } |
| 3480 | |
| 3481 | // Returns ~0u if no loop count could be determined |
| 3482 | unsigned int OutputASM::loopCount(TIntermLoop *node) |
| 3483 | { |
| 3484 | // Parse loops of the form: |
| 3485 | // for(int index = initial; index [comparator] limit; index += increment) |
| 3486 | TIntermSymbol *index = 0; |
| 3487 | TOperator comparator = EOpNull; |
| 3488 | int initial = 0; |
| 3489 | int limit = 0; |
| 3490 | int increment = 0; |
| 3491 | |
| 3492 | // Parse index name and intial value |
| 3493 | if(node->getInit()) |
| 3494 | { |
| 3495 | TIntermAggregate *init = node->getInit()->getAsAggregate(); |
| 3496 | |
| 3497 | if(init) |
| 3498 | { |
| 3499 | TIntermSequence &sequence = init->getSequence(); |
| 3500 | TIntermTyped *variable = sequence[0]->getAsTyped(); |
| 3501 | |
| 3502 | if(variable && variable->getQualifier() == EvqTemporary) |
| 3503 | { |
| 3504 | TIntermBinary *assign = variable->getAsBinaryNode(); |
| 3505 | |
| 3506 | if(assign->getOp() == EOpInitialize) |
| 3507 | { |
| 3508 | TIntermSymbol *symbol = assign->getLeft()->getAsSymbolNode(); |
| 3509 | TIntermConstantUnion *constant = assign->getRight()->getAsConstantUnion(); |
| 3510 | |
| 3511 | if(symbol && constant) |
| 3512 | { |
| 3513 | if(constant->getBasicType() == EbtInt && constant->getNominalSize() == 1) |
| 3514 | { |
| 3515 | index = symbol; |
| 3516 | initial = constant->getUnionArrayPointer()[0].getIConst(); |
| 3517 | } |
| 3518 | } |
| 3519 | } |
| 3520 | } |
| 3521 | } |
| 3522 | } |
| 3523 | |
| 3524 | // Parse comparator and limit value |
| 3525 | if(index && node->getCondition()) |
| 3526 | { |
| 3527 | TIntermBinary *test = node->getCondition()->getAsBinaryNode(); |
Alexis Hetu | 7be70cf | 2016-05-11 10:56:43 -0400 | [diff] [blame] | 3528 | TIntermSymbol *left = test ? test->getLeft()->getAsSymbolNode() : nullptr; |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 3529 | |
Alexis Hetu | 7be70cf | 2016-05-11 10:56:43 -0400 | [diff] [blame] | 3530 | if(left && (left->getId() == index->getId())) |
Nicolas Capens | 0bac285 | 2016-05-07 06:09:58 -0400 | [diff] [blame] | 3531 | { |
| 3532 | TIntermConstantUnion *constant = test->getRight()->getAsConstantUnion(); |
| 3533 | |
| 3534 | if(constant) |
| 3535 | { |
| 3536 | if(constant->getBasicType() == EbtInt && constant->getNominalSize() == 1) |
| 3537 | { |
| 3538 | comparator = test->getOp(); |
| 3539 | limit = constant->getUnionArrayPointer()[0].getIConst(); |
| 3540 | } |
| 3541 | } |
| 3542 | } |
| 3543 | } |
| 3544 | |
| 3545 | // Parse increment |
| 3546 | if(index && comparator != EOpNull && node->getExpression()) |
| 3547 | { |
| 3548 | TIntermBinary *binaryTerminal = node->getExpression()->getAsBinaryNode(); |
| 3549 | TIntermUnary *unaryTerminal = node->getExpression()->getAsUnaryNode(); |
| 3550 | |
| 3551 | if(binaryTerminal) |
| 3552 | { |
| 3553 | TOperator op = binaryTerminal->getOp(); |
| 3554 | TIntermConstantUnion *constant = binaryTerminal->getRight()->getAsConstantUnion(); |
| 3555 | |
| 3556 | if(constant) |
| 3557 | { |
| 3558 | if(constant->getBasicType() == EbtInt && constant->getNominalSize() == 1) |
| 3559 | { |
| 3560 | int value = constant->getUnionArrayPointer()[0].getIConst(); |
| 3561 | |
| 3562 | switch(op) |
| 3563 | { |
| 3564 | case EOpAddAssign: increment = value; break; |
| 3565 | case EOpSubAssign: increment = -value; break; |
| 3566 | default: UNIMPLEMENTED(); |
| 3567 | } |
| 3568 | } |
| 3569 | } |
| 3570 | } |
| 3571 | else if(unaryTerminal) |
| 3572 | { |
| 3573 | TOperator op = unaryTerminal->getOp(); |
| 3574 | |
| 3575 | switch(op) |
| 3576 | { |
| 3577 | case EOpPostIncrement: increment = 1; break; |
| 3578 | case EOpPostDecrement: increment = -1; break; |
| 3579 | case EOpPreIncrement: increment = 1; break; |
| 3580 | case EOpPreDecrement: increment = -1; break; |
| 3581 | default: UNIMPLEMENTED(); |
| 3582 | } |
| 3583 | } |
| 3584 | } |
| 3585 | |
| 3586 | if(index && comparator != EOpNull && increment != 0) |
| 3587 | { |
| 3588 | if(comparator == EOpLessThanEqual) |
| 3589 | { |
| 3590 | comparator = EOpLessThan; |
| 3591 | limit += 1; |
| 3592 | } |
| 3593 | |
| 3594 | if(comparator == EOpLessThan) |
| 3595 | { |
| 3596 | int iterations = (limit - initial) / increment; |
| 3597 | |
| 3598 | if(iterations <= 0) |
| 3599 | { |
| 3600 | iterations = 0; |
| 3601 | } |
| 3602 | |
| 3603 | return iterations; |
| 3604 | } |
| 3605 | else UNIMPLEMENTED(); // Falls through |
| 3606 | } |
| 3607 | |
| 3608 | return ~0u; |
| 3609 | } |
| 3610 | |
| 3611 | bool LoopUnrollable::traverse(TIntermNode *node) |
| 3612 | { |
| 3613 | loopDepth = 0; |
| 3614 | loopUnrollable = true; |
| 3615 | |
| 3616 | node->traverse(this); |
| 3617 | |
| 3618 | return loopUnrollable; |
| 3619 | } |
| 3620 | |
| 3621 | bool LoopUnrollable::visitLoop(Visit visit, TIntermLoop *loop) |
| 3622 | { |
| 3623 | if(visit == PreVisit) |
| 3624 | { |
| 3625 | loopDepth++; |
| 3626 | } |
| 3627 | else if(visit == PostVisit) |
| 3628 | { |
| 3629 | loopDepth++; |
| 3630 | } |
| 3631 | |
| 3632 | return true; |
| 3633 | } |
| 3634 | |
| 3635 | bool LoopUnrollable::visitBranch(Visit visit, TIntermBranch *node) |
| 3636 | { |
| 3637 | if(!loopUnrollable) |
| 3638 | { |
| 3639 | return false; |
| 3640 | } |
| 3641 | |
| 3642 | if(!loopDepth) |
| 3643 | { |
| 3644 | return true; |
| 3645 | } |
| 3646 | |
| 3647 | switch(node->getFlowOp()) |
| 3648 | { |
| 3649 | case EOpKill: |
| 3650 | case EOpReturn: |
| 3651 | break; |
| 3652 | case EOpBreak: |
| 3653 | case EOpContinue: |
| 3654 | loopUnrollable = false; |
| 3655 | break; |
| 3656 | default: UNREACHABLE(node->getFlowOp()); |
| 3657 | } |
| 3658 | |
| 3659 | return loopUnrollable; |
| 3660 | } |
| 3661 | |
| 3662 | bool LoopUnrollable::visitAggregate(Visit visit, TIntermAggregate *node) |
| 3663 | { |
| 3664 | return loopUnrollable; |
| 3665 | } |
| 3666 | } |