blob: 50ca6e8ad63a87c5676a7d5dc362df2ab3261b97 [file] [log] [blame]
Jim Stichnoth0933c0c2015-06-12 10:41:16 -07001; This tests various strength reduction operations.
2
3; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4; RUN: --target x8632 -i %s --args -O2 \
5; RUN: | %if --need=target_X8632 --command FileCheck %s
6
7define internal i32 @mul_i32_arg_5(i32 %arg) {
8 %result = mul i32 %arg, 5
9 ret i32 %result
10}
11; CHECK-LABEL: mul_i32_arg_5
12; CHECK: lea [[REG:e..]],{{\[}}[[REG]]+[[REG]]*4]
13
14define internal i32 @mul_i32_5_arg(i32 %arg) {
15 %result = mul i32 5, %arg
16 ret i32 %result
17}
18; CHECK-LABEL: mul_i32_5_arg
19; CHECK: lea [[REG:e..]],{{\[}}[[REG]]+[[REG]]*4]
20
21define internal i32 @mul_i32_arg_18(i32 %arg) {
22 %result = mul i32 %arg, 18
23 ret i32 %result
24}
25; CHECK-LABEL: mul_i32_arg_18
26; CHECK-DAG: lea [[REG:e..]],{{\[}}[[REG]]+[[REG]]*8]
27; CHECK-DAG: shl [[REG]],1
28
29define internal i32 @mul_i32_arg_27(i32 %arg) {
30 %result = mul i32 %arg, 27
31 ret i32 %result
32}
33; CHECK-LABEL: mul_i32_arg_27
34; CHECK-DAG: lea [[REG:e..]],{{\[}}[[REG]]+[[REG]]*2]
35; CHECK-DAG: lea [[REG]],{{\[}}[[REG]]+[[REG]]*8]
36
37define internal i32 @mul_i32_arg_m45(i32 %arg) {
38 %result = mul i32 %arg, -45
39 ret i32 %result
40}
41; CHECK-LABEL: mul_i32_arg_m45
42; CHECK-DAG: lea [[REG:e..]],{{\[}}[[REG]]+[[REG]]*8]
43; CHECK-DAG: lea [[REG]],{{\[}}[[REG]]+[[REG]]*4]
44; CHECK: neg [[REG]]
45
46define internal i16 @mul_i16_arg_18(i16 %arg) {
47 %result = mul i16 %arg, 18
48 ret i16 %result
49}
50; Disassembly will look like "lea ax,[eax+eax*8]".
51; CHECK-LABEL: mul_i16_arg_18
52; CHECK-DAG: lea [[REG:..]],{{\[}}e[[REG]]+e[[REG]]*8]
53; CHECK-DAG: shl [[REG]],1
54
55define internal i8 @mul_i8_arg_16(i8 %arg) {
56 %result = mul i8 %arg, 16
57 ret i8 %result
58}
59; CHECK-LABEL: mul_i8_arg_16
60; CHECK: shl {{.*}},0x4
61
62define internal i8 @mul_i8_arg_18(i8 %arg) {
63 %result = mul i8 %arg, 18
64 ret i8 %result
65}
66; CHECK-LABEL: mul_i8_arg_18
67; CHECK: imul