blob: 06378924b12c070ca961f5ddb2650da135670063 [file] [log] [blame]
Matt Walace0ca8f2014-07-24 12:34:20 -07001; This file is extracted from fp.pnacl.ll and vector-fcmp.ll in the lit
2; tests, with the "internal" attribute removed from the functions.
Jim Stichnoth5bc2b1d2014-05-22 13:38:48 -07003
4define i32 @fcmpFalseFloat(float %a, float %b) {
5entry:
6 %cmp = fcmp false float %a, %b
7 %cmp.ret_ext = zext i1 %cmp to i32
8 ret i32 %cmp.ret_ext
9}
10; CHECK: fcmpFalseFloat:
11; CHECK: mov {{.*}}, 0
12
13define i32 @fcmpFalseDouble(double %a, double %b) {
14entry:
15 %cmp = fcmp false double %a, %b
16 %cmp.ret_ext = zext i1 %cmp to i32
17 ret i32 %cmp.ret_ext
18}
19; CHECK: fcmpFalseDouble:
20; CHECK: mov {{.*}}, 0
21
22define i32 @fcmpOeqFloat(float %a, float %b) {
23entry:
24 %cmp = fcmp oeq float %a, %b
25 %cmp.ret_ext = zext i1 %cmp to i32
26 ret i32 %cmp.ret_ext
27}
28; CHECK: fcmpOeqFloat:
29; CHECK: ucomiss
30; CHECK: jne .
31; CHECK: jp .
32
33define i32 @fcmpOeqDouble(double %a, double %b) {
34entry:
35 %cmp = fcmp oeq double %a, %b
36 %cmp.ret_ext = zext i1 %cmp to i32
37 ret i32 %cmp.ret_ext
38}
39; CHECK: fcmpOeqDouble:
40; CHECK: ucomisd
41; CHECK: jne .
42; CHECK: jp .
43
44define i32 @fcmpOgtFloat(float %a, float %b) {
45entry:
46 %cmp = fcmp ogt float %a, %b
47 %cmp.ret_ext = zext i1 %cmp to i32
48 ret i32 %cmp.ret_ext
49}
50; CHECK: fcmpOgtFloat:
51; CHECK: ucomiss
52; CHECK: ja .
53
54define i32 @fcmpOgtDouble(double %a, double %b) {
55entry:
56 %cmp = fcmp ogt double %a, %b
57 %cmp.ret_ext = zext i1 %cmp to i32
58 ret i32 %cmp.ret_ext
59}
60; CHECK: fcmpOgtDouble:
61; CHECK: ucomisd
62; CHECK: ja .
63
64define i32 @fcmpOgeFloat(float %a, float %b) {
65entry:
66 %cmp = fcmp oge float %a, %b
67 %cmp.ret_ext = zext i1 %cmp to i32
68 ret i32 %cmp.ret_ext
69}
70; CHECK: fcmpOgeFloat:
71; CHECK: ucomiss
72; CHECK: jae .
73
74define i32 @fcmpOgeDouble(double %a, double %b) {
75entry:
76 %cmp = fcmp oge double %a, %b
77 %cmp.ret_ext = zext i1 %cmp to i32
78 ret i32 %cmp.ret_ext
79}
80; CHECK: fcmpOgeDouble:
81; CHECK: ucomisd
82; CHECK: jae .
83
84define i32 @fcmpOltFloat(float %a, float %b) {
85entry:
86 %cmp = fcmp olt float %a, %b
87 %cmp.ret_ext = zext i1 %cmp to i32
88 ret i32 %cmp.ret_ext
89}
90; CHECK: fcmpOltFloat:
91; CHECK: ucomiss
92; CHECK: ja .
93
94define i32 @fcmpOltDouble(double %a, double %b) {
95entry:
96 %cmp = fcmp olt double %a, %b
97 %cmp.ret_ext = zext i1 %cmp to i32
98 ret i32 %cmp.ret_ext
99}
100; CHECK: fcmpOltDouble:
101; CHECK: ucomisd
102; CHECK: ja .
103
104define i32 @fcmpOleFloat(float %a, float %b) {
105entry:
106 %cmp = fcmp ole float %a, %b
107 %cmp.ret_ext = zext i1 %cmp to i32
108 ret i32 %cmp.ret_ext
109}
110; CHECK: fcmpOleFloat:
111; CHECK: ucomiss
112; CHECK: jae .
113
114define i32 @fcmpOleDouble(double %a, double %b) {
115entry:
116 %cmp = fcmp ole double %a, %b
117 %cmp.ret_ext = zext i1 %cmp to i32
118 ret i32 %cmp.ret_ext
119}
120; CHECK: fcmpOleDouble:
121; CHECK: ucomisd
122; CHECK: jae .
123
124define i32 @fcmpOneFloat(float %a, float %b) {
125entry:
126 %cmp = fcmp one float %a, %b
127 %cmp.ret_ext = zext i1 %cmp to i32
128 ret i32 %cmp.ret_ext
129}
130; CHECK: fcmpOneFloat:
131; CHECK: ucomiss
132; CHECK: jne .
133
134define i32 @fcmpOneDouble(double %a, double %b) {
135entry:
136 %cmp = fcmp one double %a, %b
137 %cmp.ret_ext = zext i1 %cmp to i32
138 ret i32 %cmp.ret_ext
139}
140; CHECK: fcmpOneDouble:
141; CHECK: ucomisd
142; CHECK: jne .
143
144define i32 @fcmpOrdFloat(float %a, float %b) {
145entry:
146 %cmp = fcmp ord float %a, %b
147 %cmp.ret_ext = zext i1 %cmp to i32
148 ret i32 %cmp.ret_ext
149}
150; CHECK: fcmpOrdFloat:
151; CHECK: ucomiss
152; CHECK: jnp .
153
154define i32 @fcmpOrdDouble(double %a, double %b) {
155entry:
156 %cmp = fcmp ord double %a, %b
157 %cmp.ret_ext = zext i1 %cmp to i32
158 ret i32 %cmp.ret_ext
159}
160; CHECK: fcmpOrdDouble:
161; CHECK: ucomisd
162; CHECK: jnp .
163
164define i32 @fcmpUeqFloat(float %a, float %b) {
165entry:
166 %cmp = fcmp ueq float %a, %b
167 %cmp.ret_ext = zext i1 %cmp to i32
168 ret i32 %cmp.ret_ext
169}
170; CHECK: fcmpUeqFloat:
171; CHECK: ucomiss
172; CHECK: je .
173
174define i32 @fcmpUeqDouble(double %a, double %b) {
175entry:
176 %cmp = fcmp ueq double %a, %b
177 %cmp.ret_ext = zext i1 %cmp to i32
178 ret i32 %cmp.ret_ext
179}
180; CHECK: fcmpUeqDouble:
181; CHECK: ucomisd
182; CHECK: je .
183
184define i32 @fcmpUgtFloat(float %a, float %b) {
185entry:
186 %cmp = fcmp ugt float %a, %b
187 %cmp.ret_ext = zext i1 %cmp to i32
188 ret i32 %cmp.ret_ext
189}
190; CHECK: fcmpUgtFloat:
191; CHECK: ucomiss
192; CHECK: jb .
193
194define i32 @fcmpUgtDouble(double %a, double %b) {
195entry:
196 %cmp = fcmp ugt double %a, %b
197 %cmp.ret_ext = zext i1 %cmp to i32
198 ret i32 %cmp.ret_ext
199}
200; CHECK: fcmpUgtDouble:
201; CHECK: ucomisd
202; CHECK: jb .
203
204define i32 @fcmpUgeFloat(float %a, float %b) {
205entry:
206 %cmp = fcmp uge float %a, %b
207 %cmp.ret_ext = zext i1 %cmp to i32
208 ret i32 %cmp.ret_ext
209}
210; CHECK: fcmpUgeFloat:
211; CHECK: ucomiss
212; CHECK: jbe .
213
214define i32 @fcmpUgeDouble(double %a, double %b) {
215entry:
216 %cmp = fcmp uge double %a, %b
217 %cmp.ret_ext = zext i1 %cmp to i32
218 ret i32 %cmp.ret_ext
219}
220; CHECK: fcmpUgeDouble:
221; CHECK: ucomisd
222; CHECK: jbe .
223
224define i32 @fcmpUltFloat(float %a, float %b) {
225entry:
226 %cmp = fcmp ult float %a, %b
227 %cmp.ret_ext = zext i1 %cmp to i32
228 ret i32 %cmp.ret_ext
229}
230; CHECK: fcmpUltFloat:
231; CHECK: ucomiss
232; CHECK: jb .
233
234define i32 @fcmpUltDouble(double %a, double %b) {
235entry:
236 %cmp = fcmp ult double %a, %b
237 %cmp.ret_ext = zext i1 %cmp to i32
238 ret i32 %cmp.ret_ext
239}
240; CHECK: fcmpUltDouble:
241; CHECK: ucomisd
242; CHECK: jb .
243
244define i32 @fcmpUleFloat(float %a, float %b) {
245entry:
246 %cmp = fcmp ule float %a, %b
247 %cmp.ret_ext = zext i1 %cmp to i32
248 ret i32 %cmp.ret_ext
249}
250; CHECK: fcmpUleFloat:
251; CHECK: ucomiss
252; CHECK: jbe .
253
254define i32 @fcmpUleDouble(double %a, double %b) {
255entry:
256 %cmp = fcmp ule double %a, %b
257 %cmp.ret_ext = zext i1 %cmp to i32
258 ret i32 %cmp.ret_ext
259}
260; CHECK: fcmpUleDouble:
261; CHECK: ucomisd
262; CHECK: jbe .
263
264define i32 @fcmpUneFloat(float %a, float %b) {
265entry:
266 %cmp = fcmp une float %a, %b
267 %cmp.ret_ext = zext i1 %cmp to i32
268 ret i32 %cmp.ret_ext
269}
270; CHECK: fcmpUneFloat:
271; CHECK: ucomiss
272; CHECK: je .
273; CHECK: jnp .
274
275define i32 @fcmpUneDouble(double %a, double %b) {
276entry:
277 %cmp = fcmp une double %a, %b
278 %cmp.ret_ext = zext i1 %cmp to i32
279 ret i32 %cmp.ret_ext
280}
281; CHECK: fcmpUneDouble:
282; CHECK: ucomisd
283; CHECK: je .
284; CHECK: jnp .
285
286define i32 @fcmpUnoFloat(float %a, float %b) {
287entry:
288 %cmp = fcmp uno float %a, %b
289 %cmp.ret_ext = zext i1 %cmp to i32
290 ret i32 %cmp.ret_ext
291}
292; CHECK: fcmpUnoFloat:
293; CHECK: ucomiss
294; CHECK: jp .
295
296define i32 @fcmpUnoDouble(double %a, double %b) {
297entry:
298 %cmp = fcmp uno double %a, %b
299 %cmp.ret_ext = zext i1 %cmp to i32
300 ret i32 %cmp.ret_ext
301}
302; CHECK: fcmpUnoDouble:
303; CHECK: ucomisd
304; CHECK: jp .
305
306define i32 @fcmpTrueFloat(float %a, float %b) {
307entry:
308 %cmp = fcmp true float %a, %b
309 %cmp.ret_ext = zext i1 %cmp to i32
310 ret i32 %cmp.ret_ext
311}
312; CHECK: fcmpTrueFloat:
313; CHECK: mov {{.*}}, 1
314
315define i32 @fcmpTrueDouble(double %a, double %b) {
316entry:
317 %cmp = fcmp true double %a, %b
318 %cmp.ret_ext = zext i1 %cmp to i32
319 ret i32 %cmp.ret_ext
320}
321; CHECK: fcmpTrueDouble:
322; CHECK: mov {{.*}}, 1
Matt Walace0ca8f2014-07-24 12:34:20 -0700323
324define <4 x i32> @fcmpFalseVector(<4 x float> %a, <4 x float> %b) {
325entry:
326 %res.trunc = fcmp false <4 x float> %a, %b
327 %res = sext <4 x i1> %res.trunc to <4 x i32>
328 ret <4 x i32> %res
329; CHECK-LABEL: fcmpFalseVector:
330; CHECK: pxor
331}
332
333define <4 x i32> @fcmpOeqVector(<4 x float> %a, <4 x float> %b) {
334entry:
335 %res.trunc = fcmp oeq <4 x float> %a, %b
336 %res = sext <4 x i1> %res.trunc to <4 x i32>
337 ret <4 x i32> %res
338; CHECK-LABEL: fcmpOeqVector:
339; CHECK: cmpeqps
340}
341
342define <4 x i32> @fcmpOgeVector(<4 x float> %a, <4 x float> %b) {
343entry:
344 %res.trunc = fcmp oge <4 x float> %a, %b
345 %res = sext <4 x i1> %res.trunc to <4 x i32>
346 ret <4 x i32> %res
347; CHECK-LABEL: fcmpOgeVector:
348; CHECK: cmpleps
349}
350
351define <4 x i32> @fcmpOgtVector(<4 x float> %a, <4 x float> %b) {
352entry:
353 %res.trunc = fcmp ogt <4 x float> %a, %b
354 %res = sext <4 x i1> %res.trunc to <4 x i32>
355 ret <4 x i32> %res
356; CHECK-LABEL: fcmpOgtVector:
357; CHECK: cmpltps
358}
359
360define <4 x i32> @fcmpOleVector(<4 x float> %a, <4 x float> %b) {
361entry:
362 %res.trunc = fcmp ole <4 x float> %a, %b
363 %res = sext <4 x i1> %res.trunc to <4 x i32>
364 ret <4 x i32> %res
365; CHECK-LABEL: fcmpOleVector:
366; CHECK: cmpleps
367}
368
369define <4 x i32> @fcmpOltVector(<4 x float> %a, <4 x float> %b) {
370entry:
371 %res.trunc = fcmp olt <4 x float> %a, %b
372 %res = sext <4 x i1> %res.trunc to <4 x i32>
373 ret <4 x i32> %res
374; CHECK-LABEL: fcmpOltVector:
375; CHECK: cmpltps
376}
377
378define <4 x i32> @fcmpOneVector(<4 x float> %a, <4 x float> %b) {
379entry:
380 %res.trunc = fcmp one <4 x float> %a, %b
381 %res = sext <4 x i1> %res.trunc to <4 x i32>
382 ret <4 x i32> %res
383; CHECK-LABEL: fcmpOneVector:
384; CHECK: cmpneqps
385; CHECK: cmpordps
386; CHECK: pand
387}
388
389define <4 x i32> @fcmpOrdVector(<4 x float> %a, <4 x float> %b) {
390entry:
391 %res.trunc = fcmp ord <4 x float> %a, %b
392 %res = sext <4 x i1> %res.trunc to <4 x i32>
393 ret <4 x i32> %res
394; CHECK-LABEL: fcmpOrdVector:
395; CHECK: cmpordps
396}
397
398define <4 x i32> @fcmpTrueVector(<4 x float> %a, <4 x float> %b) {
399entry:
400 %res.trunc = fcmp true <4 x float> %a, %b
401 %res = sext <4 x i1> %res.trunc to <4 x i32>
402 ret <4 x i32> %res
403; CHECK-LABEL: fcmpTrueVector:
404; CHECK: pcmpeqd
405}
406
407define <4 x i32> @fcmpUeqVector(<4 x float> %a, <4 x float> %b) {
408entry:
409 %res.trunc = fcmp ueq <4 x float> %a, %b
410 %res = sext <4 x i1> %res.trunc to <4 x i32>
411 ret <4 x i32> %res
412; CHECK-LABEL: fcmpUeqVector:
413; CHECK: cmpeqps
414; CHECK: cmpunordps
415; CHECK: por
416}
417
418define <4 x i32> @fcmpUgeVector(<4 x float> %a, <4 x float> %b) {
419entry:
420 %res.trunc = fcmp uge <4 x float> %a, %b
421 %res = sext <4 x i1> %res.trunc to <4 x i32>
422 ret <4 x i32> %res
423; CHECK-LABEL: fcmpUgeVector:
424; CHECK: cmpnltps
425}
426
427define <4 x i32> @fcmpUgtVector(<4 x float> %a, <4 x float> %b) {
428entry:
429 %res.trunc = fcmp ugt <4 x float> %a, %b
430 %res = sext <4 x i1> %res.trunc to <4 x i32>
431 ret <4 x i32> %res
432; CHECK-LABEL: fcmpUgtVector:
433; CHECK: cmpnleps
434}
435
436define <4 x i32> @fcmpUleVector(<4 x float> %a, <4 x float> %b) {
437entry:
438 %res.trunc = fcmp ule <4 x float> %a, %b
439 %res = sext <4 x i1> %res.trunc to <4 x i32>
440 ret <4 x i32> %res
441; CHECK-LABEL: fcmpUleVector:
442; CHECK: cmpnltps
443}
444
445define <4 x i32> @fcmpUltVector(<4 x float> %a, <4 x float> %b) {
446entry:
447 %res.trunc = fcmp ult <4 x float> %a, %b
448 %res = sext <4 x i1> %res.trunc to <4 x i32>
449 ret <4 x i32> %res
450; CHECK-LABEL: fcmpUltVector:
451; CHECK: cmpnleps
452}
453
454define <4 x i32> @fcmpUneVector(<4 x float> %a, <4 x float> %b) {
455entry:
456 %res.trunc = fcmp une <4 x float> %a, %b
457 %res = sext <4 x i1> %res.trunc to <4 x i32>
458 ret <4 x i32> %res
459; CHECK-LABEL: fcmpUneVector:
460; CHECK: cmpneqps
461}
462
463define <4 x i32> @fcmpUnoVector(<4 x float> %a, <4 x float> %b) {
464entry:
465 %res.trunc = fcmp uno <4 x float> %a, %b
466 %res = sext <4 x i1> %res.trunc to <4 x i32>
467 ret <4 x i32> %res
468; CHECK-LABEL: fcmpUnoVector:
469; CHECK: cmpunordps
470}