| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| |* *| |
| |* X86 Mnemonic tables *| |
| |* *| |
| |* Automatically generated file, do not edit! *| |
| |* *| |
| \*===----------------------------------------------------------------------===*/ |
| |
| namespace llvm { |
| namespace X86 { |
| |
| #ifdef GET_X86_MNEMONIC_TABLES_H |
| #undef GET_X86_MNEMONIC_TABLES_H |
| |
| bool isPCMPISTRM(unsigned Opcode); |
| bool isVALIGND(unsigned Opcode); |
| bool isVFMULCPH(unsigned Opcode); |
| bool isVPDPBSSD(unsigned Opcode); |
| bool isVFIXUPIMMPS(unsigned Opcode); |
| bool isVPMOVQ2M(unsigned Opcode); |
| bool isLDTILECFG(unsigned Opcode); |
| bool isFADD(unsigned Opcode); |
| bool isVALIGNQ(unsigned Opcode); |
| bool isAESENC128KL(unsigned Opcode); |
| bool isVPMAXUB(unsigned Opcode); |
| bool isFMULP(unsigned Opcode); |
| bool isVPMAXUD(unsigned Opcode); |
| bool isCMPCC(unsigned Opcode); |
| bool isVSHUFI32X4(unsigned Opcode); |
| bool isLOOPNE(unsigned Opcode); |
| bool isVPMAXUQ(unsigned Opcode); |
| bool isVCOMPRESSPD(unsigned Opcode); |
| bool isVPMAXUW(unsigned Opcode); |
| bool isVPMOVB2M(unsigned Opcode); |
| bool isVANDPD(unsigned Opcode); |
| bool isVCOMPRESSPS(unsigned Opcode); |
| bool isVPDPBSUD(unsigned Opcode); |
| bool isPFRCPIT1(unsigned Opcode); |
| bool isPFRCPIT2(unsigned Opcode); |
| bool isWRPKRU(unsigned Opcode); |
| bool isVANDPS(unsigned Opcode); |
| bool isWRUSSD(unsigned Opcode); |
| bool isVMPTRLD(unsigned Opcode); |
| bool isWRUSSQ(unsigned Opcode); |
| bool isAESDECLAST(unsigned Opcode); |
| bool isSYSCALL(unsigned Opcode); |
| bool isVFIXUPIMMSD(unsigned Opcode); |
| bool isVPRORD(unsigned Opcode); |
| bool isTEST(unsigned Opcode); |
| bool isSHA1MSG1(unsigned Opcode); |
| bool isSHA1MSG2(unsigned Opcode); |
| bool isVFMULCSH(unsigned Opcode); |
| bool isMOVNTDQA(unsigned Opcode); |
| bool isVFIXUPIMMSS(unsigned Opcode); |
| bool isADOX(unsigned Opcode); |
| bool isVPRORQ(unsigned Opcode); |
| bool isVSCATTERPF1DPD(unsigned Opcode); |
| bool isVPSRLDQ(unsigned Opcode); |
| bool isVPMOVUSWB(unsigned Opcode); |
| bool isVSCATTERPF1DPS(unsigned Opcode); |
| bool isFICOMP(unsigned Opcode); |
| bool isFBSTP(unsigned Opcode); |
| bool isVPSHUFLW(unsigned Opcode); |
| bool isVPSCATTERDD(unsigned Opcode); |
| bool isFNINIT(unsigned Opcode); |
| bool isMOVNTPD(unsigned Opcode); |
| bool isUIRET(unsigned Opcode); |
| bool isPINSRB(unsigned Opcode); |
| bool isPINSRD(unsigned Opcode); |
| bool isSHRD(unsigned Opcode); |
| bool isVPSCATTERDQ(unsigned Opcode); |
| bool isMOVNTPS(unsigned Opcode); |
| bool isVGETEXPPD(unsigned Opcode); |
| bool isVRANGEPD(unsigned Opcode); |
| bool isPFRCP(unsigned Opcode); |
| bool isVGETEXPPH(unsigned Opcode); |
| bool isPINSRQ(unsigned Opcode); |
| bool isVPROTB(unsigned Opcode); |
| bool isVPROTD(unsigned Opcode); |
| bool isSEAMCALL(unsigned Opcode); |
| bool isPINSRW(unsigned Opcode); |
| bool isSHRX(unsigned Opcode); |
| bool isVGETEXPPS(unsigned Opcode); |
| bool isVRANGEPS(unsigned Opcode); |
| bool isPABSB(unsigned Opcode); |
| bool isPABSD(unsigned Opcode); |
| bool isVPROTQ(unsigned Opcode); |
| bool isVPROTW(unsigned Opcode); |
| bool isVCVTTPS2UDQ(unsigned Opcode); |
| bool isFXRSTOR(unsigned Opcode); |
| bool isVMOVDQU16(unsigned Opcode); |
| bool isPABSW(unsigned Opcode); |
| bool isCVTDQ2PD(unsigned Opcode); |
| bool isCVTDQ2PS(unsigned Opcode); |
| bool isXOR(unsigned Opcode); |
| bool isINC(unsigned Opcode); |
| bool isVMCALL(unsigned Opcode); |
| bool isPACKSSDW(unsigned Opcode); |
| bool isPSUBUSB(unsigned Opcode); |
| bool isINT(unsigned Opcode); |
| bool isMOVNTSD(unsigned Opcode); |
| bool isVPMOVZXBD(unsigned Opcode); |
| bool isVCVTUDQ2PD(unsigned Opcode); |
| bool isVCVTUDQ2PH(unsigned Opcode); |
| bool isVMOVDQU32(unsigned Opcode); |
| bool isPSUBUSW(unsigned Opcode); |
| bool isMOVNTSS(unsigned Opcode); |
| bool isVGETEXPSD(unsigned Opcode); |
| bool isVPMOVZXBQ(unsigned Opcode); |
| bool isVGETEXPSH(unsigned Opcode); |
| bool isVCVTNEEBF162PS(unsigned Opcode); |
| bool isVRANGESD(unsigned Opcode); |
| bool isVCVTUDQ2PS(unsigned Opcode); |
| bool isVPMOVZXBW(unsigned Opcode); |
| bool isVGETEXPSS(unsigned Opcode); |
| bool isSHUFPD(unsigned Opcode); |
| bool isVCVTTSS2SI(unsigned Opcode); |
| bool isVINSERTF128(unsigned Opcode); |
| bool isKANDNB(unsigned Opcode); |
| bool isPADDSB(unsigned Opcode); |
| bool isKANDND(unsigned Opcode); |
| bool isVPCMPISTRI(unsigned Opcode); |
| bool isRDPID(unsigned Opcode); |
| bool isVPCMPISTRM(unsigned Opcode); |
| bool isVRANGESS(unsigned Opcode); |
| bool isSHUFPS(unsigned Opcode); |
| bool isVPDPBSSDS(unsigned Opcode); |
| bool isKANDNQ(unsigned Opcode); |
| bool isKANDNW(unsigned Opcode); |
| bool isPADDSW(unsigned Opcode); |
| bool isVCVTTPD2UDQ(unsigned Opcode); |
| bool isVANDNPD(unsigned Opcode); |
| bool isXEND(unsigned Opcode); |
| bool isVUNPCKHPD(unsigned Opcode); |
| bool isPSRAD(unsigned Opcode); |
| bool isVANDNPS(unsigned Opcode); |
| bool isVPMOVZXDQ(unsigned Opcode); |
| bool isVMPTRST(unsigned Opcode); |
| bool isVUNPCKHPS(unsigned Opcode); |
| bool isPSRAW(unsigned Opcode); |
| bool isVPLZCNTD(unsigned Opcode); |
| bool isWRMSRLIST(unsigned Opcode); |
| bool isVPADDUSB(unsigned Opcode); |
| bool isVMOVDQU64(unsigned Opcode); |
| bool isSUBPD(unsigned Opcode); |
| bool isMOVDDUP(unsigned Opcode); |
| bool isVPLZCNTQ(unsigned Opcode); |
| bool isSTAC(unsigned Opcode); |
| bool isSUBPS(unsigned Opcode); |
| bool isVPADDUSW(unsigned Opcode); |
| bool isFCMOVNBE(unsigned Opcode); |
| bool isSHA1RNDS4(unsigned Opcode); |
| bool isPAUSE(unsigned Opcode); |
| bool isSAHF(unsigned Opcode); |
| bool isVREDUCEPD(unsigned Opcode); |
| bool isVREDUCEPH(unsigned Opcode); |
| bool isFXAM(unsigned Opcode); |
| bool isLGDTD(unsigned Opcode); |
| bool isPMULHRW(unsigned Opcode); |
| bool isVREDUCEPS(unsigned Opcode); |
| bool isRDPMC(unsigned Opcode); |
| bool isVGATHERPF1QPD(unsigned Opcode); |
| bool isLGDTW(unsigned Opcode); |
| bool isVAESKEYGENASSIST(unsigned Opcode); |
| bool isRDFSBASE(unsigned Opcode); |
| bool isVGATHERPF1QPS(unsigned Opcode); |
| bool isSUBSD(unsigned Opcode); |
| bool isVCVTNEOBF162PS(unsigned Opcode); |
| bool isAESENCWIDE128KL(unsigned Opcode); |
| bool isFXCH(unsigned Opcode); |
| bool isSUBSS(unsigned Opcode); |
| bool isPANDN(unsigned Opcode); |
| bool isVPERMT2B(unsigned Opcode); |
| bool isLJMP(unsigned Opcode); |
| bool isCMPPD(unsigned Opcode); |
| bool isVPERMT2D(unsigned Opcode); |
| bool isVPMADD52HUQ(unsigned Opcode); |
| bool isVPERMT2Q(unsigned Opcode); |
| bool isCMPPS(unsigned Opcode); |
| bool isVCVTPH2W(unsigned Opcode); |
| bool isVREDUCESD(unsigned Opcode); |
| bool isVPERMT2W(unsigned Opcode); |
| bool isWBNOINVD(unsigned Opcode); |
| bool isVREDUCESH(unsigned Opcode); |
| bool isTILEZERO(unsigned Opcode); |
| bool isPMULHUW(unsigned Opcode); |
| bool isVREDUCESS(unsigned Opcode); |
| bool isVCVTUW2PH(unsigned Opcode); |
| bool isVPBLENDMB(unsigned Opcode); |
| bool isVPBLENDMD(unsigned Opcode); |
| bool isVFMSUB132PD(unsigned Opcode); |
| bool isVFMSUB132PH(unsigned Opcode); |
| bool isMWAIT(unsigned Opcode); |
| bool isSALC(unsigned Opcode); |
| bool isPMADDUBSW(unsigned Opcode); |
| bool isVFCMULCPH(unsigned Opcode); |
| bool isVPBLENDMQ(unsigned Opcode); |
| bool isRORX(unsigned Opcode); |
| bool isVFMSUB132PS(unsigned Opcode); |
| bool isVPBLENDMW(unsigned Opcode); |
| bool isMOV(unsigned Opcode); |
| bool isFXSAVE64(unsigned Opcode); |
| bool isRMPADJUST(unsigned Opcode); |
| bool isAADD(unsigned Opcode); |
| bool isVLDDQU(unsigned Opcode); |
| bool isVPSCATTERQD(unsigned Opcode); |
| bool isVPHADDUBD(unsigned Opcode); |
| bool isCMPSB(unsigned Opcode); |
| bool isCMPSD(unsigned Opcode); |
| bool isSTGI(unsigned Opcode); |
| bool isVUNPCKLPD(unsigned Opcode); |
| bool isVPSCATTERQQ(unsigned Opcode); |
| bool isFADDP(unsigned Opcode); |
| bool isVPHADDUBQ(unsigned Opcode); |
| bool isCMPSQ(unsigned Opcode); |
| bool isVPHADDUBW(unsigned Opcode); |
| bool isCMPSS(unsigned Opcode); |
| bool isVUNPCKLPS(unsigned Opcode); |
| bool isLCALL(unsigned Opcode); |
| bool isPSHUFB(unsigned Opcode); |
| bool isCMPSW(unsigned Opcode); |
| bool isPSHUFD(unsigned Opcode); |
| bool isRDPRU(unsigned Opcode); |
| bool isFRNDINT(unsigned Opcode); |
| bool isVPACKUSWB(unsigned Opcode); |
| bool isDIVPD(unsigned Opcode); |
| bool isVAESDEC(unsigned Opcode); |
| bool isPSHUFW(unsigned Opcode); |
| bool isVPDPBUUDS(unsigned Opcode); |
| bool isKMOVB(unsigned Opcode); |
| bool isVFMSUB132SD(unsigned Opcode); |
| bool isKMOVD(unsigned Opcode); |
| bool isVCVTTPS2UQQ(unsigned Opcode); |
| bool isVFMSUB132SH(unsigned Opcode); |
| bool isDIVPS(unsigned Opcode); |
| bool isVFCMULCSH(unsigned Opcode); |
| bool isFICOM(unsigned Opcode); |
| bool isKMOVQ(unsigned Opcode); |
| bool isVFMSUB132SS(unsigned Opcode); |
| bool isENCODEKEY128(unsigned Opcode); |
| bool isKMOVW(unsigned Opcode); |
| bool isPREFETCHT0(unsigned Opcode); |
| bool isPREFETCHT1(unsigned Opcode); |
| bool isPREFETCHT2(unsigned Opcode); |
| bool isSWAPGS(unsigned Opcode); |
| bool isVPTESTMD(unsigned Opcode); |
| bool isVPTESTMB(unsigned Opcode); |
| bool isVPHADDUDQ(unsigned Opcode); |
| bool isVPTESTMQ(unsigned Opcode); |
| bool isXRSTORS(unsigned Opcode); |
| bool isVPMULDQ(unsigned Opcode); |
| bool isUD1(unsigned Opcode); |
| bool isUD2(unsigned Opcode); |
| bool isVPTESTMW(unsigned Opcode); |
| bool isSEAMOPS(unsigned Opcode); |
| bool isMWAITX(unsigned Opcode); |
| bool isVFMADD132PD(unsigned Opcode); |
| bool isWRMSRNS(unsigned Opcode); |
| bool isVMOVNTDQ(unsigned Opcode); |
| bool isVFMADD132PH(unsigned Opcode); |
| bool isPSRLD(unsigned Opcode); |
| bool isVBROADCASTI64X2(unsigned Opcode); |
| bool isVBROADCASTI64X4(unsigned Opcode); |
| bool isVFMADD132PS(unsigned Opcode); |
| bool isIDIV(unsigned Opcode); |
| bool isPREFETCHWT1(unsigned Opcode); |
| bool isVPSRLVD(unsigned Opcode); |
| bool isPSRLQ(unsigned Opcode); |
| bool isPSRLW(unsigned Opcode); |
| bool isDIVSD(unsigned Opcode); |
| bool isVPMOVDB(unsigned Opcode); |
| bool isVPSRLVQ(unsigned Opcode); |
| bool isVPSRLVW(unsigned Opcode); |
| bool isDIVSS(unsigned Opcode); |
| bool isMUL(unsigned Opcode); |
| bool isVPMOVDW(unsigned Opcode); |
| bool isVCVTTPD2UQQ(unsigned Opcode); |
| bool isFSINCOS(unsigned Opcode); |
| bool isVPMADD52LUQ(unsigned Opcode); |
| bool isLWPINS(unsigned Opcode); |
| bool isMOVDIR64B(unsigned Opcode); |
| bool isLOOPE(unsigned Opcode); |
| bool isPUSH(unsigned Opcode); |
| bool isPSADBW(unsigned Opcode); |
| bool isFTST(unsigned Opcode); |
| bool isSETSSBSY(unsigned Opcode); |
| bool isSARX(unsigned Opcode); |
| bool isVADDSUBPD(unsigned Opcode); |
| bool isVADDSUBPS(unsigned Opcode); |
| bool isVMINPD(unsigned Opcode); |
| bool isCLZERO(unsigned Opcode); |
| bool isVMINPH(unsigned Opcode); |
| bool isXCRYPTCBC(unsigned Opcode); |
| bool isFXTRACT(unsigned Opcode); |
| bool isVMINPS(unsigned Opcode); |
| bool isVFMADD132SD(unsigned Opcode); |
| bool isVFMADD132SH(unsigned Opcode); |
| bool isVPERMI2B(unsigned Opcode); |
| bool isVPERMI2D(unsigned Opcode); |
| bool isVFMADD132SS(unsigned Opcode); |
| bool isVRSQRT28PD(unsigned Opcode); |
| bool isVPMULHW(unsigned Opcode); |
| bool isSIDT(unsigned Opcode); |
| bool isTDCALL(unsigned Opcode); |
| bool isVPERMI2Q(unsigned Opcode); |
| bool isVPERMI2W(unsigned Opcode); |
| bool isVPERM2F128(unsigned Opcode); |
| bool isVMLAUNCH(unsigned Opcode); |
| bool isFILD(unsigned Opcode); |
| bool isVRSQRT28PS(unsigned Opcode); |
| bool isVPBLENDVB(unsigned Opcode); |
| bool isVPMADDUBSW(unsigned Opcode); |
| bool isVSTMXCSR(unsigned Opcode); |
| bool isVCVTTPH2UDQ(unsigned Opcode); |
| bool isXSHA256(unsigned Opcode); |
| bool isWAIT(unsigned Opcode); |
| bool isPACKSSWB(unsigned Opcode); |
| bool isPMULHRSW(unsigned Opcode); |
| bool isMASKMOVQ(unsigned Opcode); |
| bool isVMINSD(unsigned Opcode); |
| bool isVMINSH(unsigned Opcode); |
| bool isRDTSC(unsigned Opcode); |
| bool isVMINSS(unsigned Opcode); |
| bool isVRSQRT28SD(unsigned Opcode); |
| bool isAAND(unsigned Opcode); |
| bool isXCRYPTCFB(unsigned Opcode); |
| bool isVSCALEFPD(unsigned Opcode); |
| bool isVPBROADCASTB(unsigned Opcode); |
| bool isVSCALEFPH(unsigned Opcode); |
| bool isVPBROADCASTD(unsigned Opcode); |
| bool isVRSQRT28SS(unsigned Opcode); |
| bool isVPMULLD(unsigned Opcode); |
| bool isVSCALEFPS(unsigned Opcode); |
| bool isMOVQ2DQ(unsigned Opcode); |
| bool isVPBROADCASTQ(unsigned Opcode); |
| bool isPALIGNR(unsigned Opcode); |
| bool isPUSHAL(unsigned Opcode); |
| bool isVPBROADCASTW(unsigned Opcode); |
| bool isVPMULLQ(unsigned Opcode); |
| bool isFINCSTP(unsigned Opcode); |
| bool isPUSHAW(unsigned Opcode); |
| bool isVPMULLW(unsigned Opcode); |
| bool isPFPNACC(unsigned Opcode); |
| bool isTESTUI(unsigned Opcode); |
| bool isVPMOVZXWD(unsigned Opcode); |
| bool isVPDPWSSDS(unsigned Opcode); |
| bool isINVLPG(unsigned Opcode); |
| bool isJCC(unsigned Opcode); |
| bool isVPMOVZXWQ(unsigned Opcode); |
| bool isBSF(unsigned Opcode); |
| bool isROUNDPD(unsigned Opcode); |
| bool isSAVEPREVSSP(unsigned Opcode); |
| bool isVSCATTERDPD(unsigned Opcode); |
| bool isBSR(unsigned Opcode); |
| bool isROUNDPS(unsigned Opcode); |
| bool isCVTPI2PD(unsigned Opcode); |
| bool isKTESTB(unsigned Opcode); |
| bool isKTESTD(unsigned Opcode); |
| bool isVSCATTERDPS(unsigned Opcode); |
| bool isFLD(unsigned Opcode); |
| bool isBTC(unsigned Opcode); |
| bool isVBCSTNEBF162PS(unsigned Opcode); |
| bool isCVTPI2PS(unsigned Opcode); |
| bool isKTESTQ(unsigned Opcode); |
| bool isVSCALEFSD(unsigned Opcode); |
| bool isVSCALEFSH(unsigned Opcode); |
| bool isKTESTW(unsigned Opcode); |
| bool isXSTORE(unsigned Opcode); |
| bool isVFMADDSUB132PD(unsigned Opcode); |
| bool isVPSRAVD(unsigned Opcode); |
| bool isBTR(unsigned Opcode); |
| bool isBTS(unsigned Opcode); |
| bool isVFMADDSUB132PH(unsigned Opcode); |
| bool isLGDT(unsigned Opcode); |
| bool isVSCALEFSS(unsigned Opcode); |
| bool isVEXTRACTF128(unsigned Opcode); |
| bool isPMOVSXBD(unsigned Opcode); |
| bool isKXNORB(unsigned Opcode); |
| bool isVFMADDSUB132PS(unsigned Opcode); |
| bool isKXNORD(unsigned Opcode); |
| bool isXRSTOR(unsigned Opcode); |
| bool isVPSRAVQ(unsigned Opcode); |
| bool isVPSRAVW(unsigned Opcode); |
| bool isVPDPWSSD(unsigned Opcode); |
| bool isSQRTPD(unsigned Opcode); |
| bool isVDPPD(unsigned Opcode); |
| bool isPMOVSXBQ(unsigned Opcode); |
| bool isPMADDWD(unsigned Opcode); |
| bool isKXNORQ(unsigned Opcode); |
| bool isSTUI(unsigned Opcode); |
| bool isINSERTQ(unsigned Opcode); |
| bool isPMOVSXBW(unsigned Opcode); |
| bool isVCVTSI2SD(unsigned Opcode); |
| bool isKXNORW(unsigned Opcode); |
| bool isVSCATTERPF0DPD(unsigned Opcode); |
| bool isVCVTSI2SH(unsigned Opcode); |
| bool isSQRTPS(unsigned Opcode); |
| bool isVDPPS(unsigned Opcode); |
| bool isPSUBSB(unsigned Opcode); |
| bool isVPSHRDVD(unsigned Opcode); |
| bool isFIST(unsigned Opcode); |
| bool isVCVTSI2SS(unsigned Opcode); |
| bool isVSCATTERPF0DPS(unsigned Opcode); |
| bool isVMOVNTPD(unsigned Opcode); |
| bool isROUNDSD(unsigned Opcode); |
| bool isVPSHRDVQ(unsigned Opcode); |
| bool isPSIGNB(unsigned Opcode); |
| bool isJECXZ(unsigned Opcode); |
| bool isPSIGND(unsigned Opcode); |
| bool isPSUBSW(unsigned Opcode); |
| bool isMOVDQ2Q(unsigned Opcode); |
| bool isPUSHFD(unsigned Opcode); |
| bool isVMOVNTPS(unsigned Opcode); |
| bool isROUNDSS(unsigned Opcode); |
| bool isVAESDECLAST(unsigned Opcode); |
| bool isPAVGB(unsigned Opcode); |
| bool isVPSUBB(unsigned Opcode); |
| bool isVPSHRDVW(unsigned Opcode); |
| bool isVPSUBD(unsigned Opcode); |
| bool isPUSHFQ(unsigned Opcode); |
| bool isPSIGNW(unsigned Opcode); |
| bool isVBROADCASTSD(unsigned Opcode); |
| bool isVPSUBQ(unsigned Opcode); |
| bool isPMOVSXDQ(unsigned Opcode); |
| bool isPAVGW(unsigned Opcode); |
| bool isVFMSUBADD132PD(unsigned Opcode); |
| bool isVPSUBW(unsigned Opcode); |
| bool isVCVTPS2PHX(unsigned Opcode); |
| bool isMOVHLPS(unsigned Opcode); |
| bool isVFMSUBADD132PH(unsigned Opcode); |
| bool isVSHUFF64X2(unsigned Opcode); |
| bool isVBROADCASTSS(unsigned Opcode); |
| bool isVFMSUBADD132PS(unsigned Opcode); |
| bool isMAXPD(unsigned Opcode); |
| bool isSQRTSD(unsigned Opcode); |
| bool isCVTPD2DQ(unsigned Opcode); |
| bool isMAXPS(unsigned Opcode); |
| bool isVPMOVQB(unsigned Opcode); |
| bool isINVPCID(unsigned Opcode); |
| bool isVCVTPS2DQ(unsigned Opcode); |
| bool isSQRTSS(unsigned Opcode); |
| bool isVADDPD(unsigned Opcode); |
| bool isLODSB(unsigned Opcode); |
| bool isLODSD(unsigned Opcode); |
| bool isV4FNMADDPS(unsigned Opcode); |
| bool isIRETD(unsigned Opcode); |
| bool isVADDPH(unsigned Opcode); |
| bool isVHADDPD(unsigned Opcode); |
| bool isVPMOVQD(unsigned Opcode); |
| bool isVPSUBUSB(unsigned Opcode); |
| bool isVPMOVQW(unsigned Opcode); |
| bool isVADDPS(unsigned Opcode); |
| bool isLODSQ(unsigned Opcode); |
| bool isFIDIVR(unsigned Opcode); |
| bool isIRETQ(unsigned Opcode); |
| bool isLODSW(unsigned Opcode); |
| bool isVHADDPS(unsigned Opcode); |
| bool isCVTTPS2DQ(unsigned Opcode); |
| bool isVPORD(unsigned Opcode); |
| bool isVP2INTERSECTD(unsigned Opcode); |
| bool isVPSUBUSW(unsigned Opcode); |
| bool isVPERMILPD(unsigned Opcode); |
| bool isVPSHLDD(unsigned Opcode); |
| bool isMOVD(unsigned Opcode); |
| bool isVPORQ(unsigned Opcode); |
| bool isVP2INTERSECTQ(unsigned Opcode); |
| bool isCRC32(unsigned Opcode); |
| bool isVPERMILPS(unsigned Opcode); |
| bool isMOVQ(unsigned Opcode); |
| bool isVPSHLDQ(unsigned Opcode); |
| bool isVPMASKMOVD(unsigned Opcode); |
| bool isVPSHLDW(unsigned Opcode); |
| bool isSLWPCB(unsigned Opcode); |
| bool isVORPD(unsigned Opcode); |
| bool isPCMPGTB(unsigned Opcode); |
| bool isPCMPGTD(unsigned Opcode); |
| bool isVPMASKMOVQ(unsigned Opcode); |
| bool isPFRSQIT1(unsigned Opcode); |
| bool isVORPS(unsigned Opcode); |
| bool isPCMPGTQ(unsigned Opcode); |
| bool isBLCIC(unsigned Opcode); |
| bool isMAXSD(unsigned Opcode); |
| bool isPCMPGTW(unsigned Opcode); |
| bool isVBCSTNESH2PS(unsigned Opcode); |
| bool isMOVLHPS(unsigned Opcode); |
| bool isXSAVEC(unsigned Opcode); |
| bool isMAXSS(unsigned Opcode); |
| bool isFST(unsigned Opcode); |
| bool isVCVTSS2USI(unsigned Opcode); |
| bool isVADDSD(unsigned Opcode); |
| bool isVRNDSCALEPD(unsigned Opcode); |
| bool isVCVTTPH2UQQ(unsigned Opcode); |
| bool isV4FNMADDSS(unsigned Opcode); |
| bool isVADDSH(unsigned Opcode); |
| bool isVRNDSCALEPH(unsigned Opcode); |
| bool isXSAVES(unsigned Opcode); |
| bool isXRESLDTRK(unsigned Opcode); |
| bool isVADDSS(unsigned Opcode); |
| bool isVRNDSCALEPS(unsigned Opcode); |
| bool isVPHADDUWD(unsigned Opcode); |
| bool isRDSSPD(unsigned Opcode); |
| bool isVPHADDUWQ(unsigned Opcode); |
| bool isVMOVDDUP(unsigned Opcode); |
| bool isINSERTPS(unsigned Opcode); |
| bool isNEG(unsigned Opcode); |
| bool isMOVUPD(unsigned Opcode); |
| bool isRDSSPQ(unsigned Opcode); |
| bool isVFRCZPD(unsigned Opcode); |
| bool isPHMINPOSUW(unsigned Opcode); |
| bool isVBROADCASTI32X2(unsigned Opcode); |
| bool isVBROADCASTI32X4(unsigned Opcode); |
| bool isJMP(unsigned Opcode); |
| bool isVBROADCASTI32X8(unsigned Opcode); |
| bool isMOVUPS(unsigned Opcode); |
| bool isVPANDND(unsigned Opcode); |
| bool isVCVTNE2PS2BF16(unsigned Opcode); |
| bool isVPROLVD(unsigned Opcode); |
| bool isVFRCZPS(unsigned Opcode); |
| bool isJRCXZ(unsigned Opcode); |
| bool isFNSTCW(unsigned Opcode); |
| bool isFFREEP(unsigned Opcode); |
| bool isVPANDNQ(unsigned Opcode); |
| bool isVPROLVQ(unsigned Opcode); |
| bool isAESDECWIDE128KL(unsigned Opcode); |
| bool isSTTILECFG(unsigned Opcode); |
| bool isVPMOVWB(unsigned Opcode); |
| bool isVRNDSCALESD(unsigned Opcode); |
| bool isVGATHERPF0QPD(unsigned Opcode); |
| bool isVPHSUBD(unsigned Opcode); |
| bool isVCVTSD2USI(unsigned Opcode); |
| bool isWRGSBASE(unsigned Opcode); |
| bool isVRNDSCALESH(unsigned Opcode); |
| bool isAESENC256KL(unsigned Opcode); |
| bool isVRNDSCALESS(unsigned Opcode); |
| bool isVGATHERPF0QPS(unsigned Opcode); |
| bool isVPHSUBW(unsigned Opcode); |
| bool isSHA1NEXTE(unsigned Opcode); |
| bool isXCRYPTCTR(unsigned Opcode); |
| bool isFMUL(unsigned Opcode); |
| bool isFBLD(unsigned Opcode); |
| bool isVMXON(unsigned Opcode); |
| bool isPUNPCKHQDQ(unsigned Opcode); |
| bool isVFRCZSD(unsigned Opcode); |
| bool isVFRCZSS(unsigned Opcode); |
| bool isRMPUPDATE(unsigned Opcode); |
| bool isVFNMADDPD(unsigned Opcode); |
| bool isVCOMISD(unsigned Opcode); |
| bool isVCOMISH(unsigned Opcode); |
| bool isAXOR(unsigned Opcode); |
| bool isVFNMADDPS(unsigned Opcode); |
| bool isVCOMISS(unsigned Opcode); |
| bool isPHADDD(unsigned Opcode); |
| bool isVPMULHUW(unsigned Opcode); |
| bool isVFNMSUB132PD(unsigned Opcode); |
| bool isPMOVMSKB(unsigned Opcode); |
| bool isVFNMSUB132PH(unsigned Opcode); |
| bool isPHADDW(unsigned Opcode); |
| bool isVFNMSUB132PS(unsigned Opcode); |
| bool isVMOVDQA(unsigned Opcode); |
| bool isSENDUIPI(unsigned Opcode); |
| bool isVCVTTPS2DQ(unsigned Opcode); |
| bool isRCPPS(unsigned Opcode); |
| bool isRDMSR(unsigned Opcode); |
| bool isVCVTQQ2PD(unsigned Opcode); |
| bool isVRSQRT14PD(unsigned Opcode); |
| bool isXORPD(unsigned Opcode); |
| bool isVCVTQQ2PH(unsigned Opcode); |
| bool isVMOVDQU(unsigned Opcode); |
| bool isBLENDPD(unsigned Opcode); |
| bool isVCVTQQ2PS(unsigned Opcode); |
| bool isVRSQRT14PS(unsigned Opcode); |
| bool isXORPS(unsigned Opcode); |
| bool isRCL(unsigned Opcode); |
| bool isRCR(unsigned Opcode); |
| bool isBLENDPS(unsigned Opcode); |
| bool isVPEXPANDB(unsigned Opcode); |
| bool isVEXPANDPD(unsigned Opcode); |
| bool isVPEXPANDD(unsigned Opcode); |
| bool isBLSMSK(unsigned Opcode); |
| bool isXSUSLDTRK(unsigned Opcode); |
| bool isGF2P8MULB(unsigned Opcode); |
| bool isSIDTD(unsigned Opcode); |
| bool isVEXPANDPS(unsigned Opcode); |
| bool isVFNMADDSD(unsigned Opcode); |
| bool isCBW(unsigned Opcode); |
| bool isVPEXPANDW(unsigned Opcode); |
| bool isVPEXPANDQ(unsigned Opcode); |
| bool isFXRSTOR64(unsigned Opcode); |
| bool isVFNMADDSS(unsigned Opcode); |
| bool isSIDTW(unsigned Opcode); |
| bool isCVTPD2PI(unsigned Opcode); |
| bool isVCVTPS2PD(unsigned Opcode); |
| bool isVFNMSUB132SD(unsigned Opcode); |
| bool isVCVTPS2PH(unsigned Opcode); |
| bool isFIDIV(unsigned Opcode); |
| bool isVFNMSUB132SH(unsigned Opcode); |
| bool isCVTPD2PS(unsigned Opcode); |
| bool isINVEPT(unsigned Opcode); |
| bool isVPERMI2PD(unsigned Opcode); |
| bool isVFMSUB213PD(unsigned Opcode); |
| bool isVFNMSUB132SS(unsigned Opcode); |
| bool isINVVPID(unsigned Opcode); |
| bool isVFMSUB213PH(unsigned Opcode); |
| bool isVPCOMB(unsigned Opcode); |
| bool isVPERMI2PS(unsigned Opcode); |
| bool isVPCOMD(unsigned Opcode); |
| bool isSMSW(unsigned Opcode); |
| bool isRCPSS(unsigned Opcode); |
| bool isRET(unsigned Opcode); |
| bool isVFMSUB213PS(unsigned Opcode); |
| bool isVRSQRT14SD(unsigned Opcode); |
| bool isCVTTPS2PI(unsigned Opcode); |
| bool isVMCLEAR(unsigned Opcode); |
| bool isVPCOMQ(unsigned Opcode); |
| bool isCDQ(unsigned Opcode); |
| bool isFLDL2E(unsigned Opcode); |
| bool isVCVTPS2QQ(unsigned Opcode); |
| bool isVPCOMW(unsigned Opcode); |
| bool isVRSQRT14SS(unsigned Opcode); |
| bool isVP4DPWSSDS(unsigned Opcode); |
| bool isVPSLLDQ(unsigned Opcode); |
| bool isVCVTSD2SH(unsigned Opcode); |
| bool isFLDL2T(unsigned Opcode); |
| bool isVEXP2PD(unsigned Opcode); |
| bool isVFNMADD132PD(unsigned Opcode); |
| bool isVCVTSD2SI(unsigned Opcode); |
| bool isVPOPCNTB(unsigned Opcode); |
| bool isVFNMADD132PH(unsigned Opcode); |
| bool isVINSERTI128(unsigned Opcode); |
| bool isVPOPCNTD(unsigned Opcode); |
| bool isSETCC(unsigned Opcode); |
| bool isVCVTSD2SS(unsigned Opcode); |
| bool isVEXP2PS(unsigned Opcode); |
| bool isVFNMADD132PS(unsigned Opcode); |
| bool isMOVDIRI(unsigned Opcode); |
| bool isVPOPCNTQ(unsigned Opcode); |
| bool isVFMSUB231PD(unsigned Opcode); |
| bool isVFMSUB231PH(unsigned Opcode); |
| bool isFCMOVBE(unsigned Opcode); |
| bool isVPOPCNTW(unsigned Opcode); |
| bool isCVTTSD2SI(unsigned Opcode); |
| bool isVFMSUB231PS(unsigned Opcode); |
| bool isNOP(unsigned Opcode); |
| bool isNOT(unsigned Opcode); |
| bool isTPAUSE(unsigned Opcode); |
| bool isVCVTNEPS2BF16(unsigned Opcode); |
| bool isVFMSUB213SD(unsigned Opcode); |
| bool isVFMSUB213SH(unsigned Opcode); |
| bool isVFMADDCPH(unsigned Opcode); |
| bool isVEXTRACTI64X2(unsigned Opcode); |
| bool isVFMSUB213SS(unsigned Opcode); |
| bool isVEXTRACTI64X4(unsigned Opcode); |
| bool isXSAVEC64(unsigned Opcode); |
| bool isBLCFILL(unsigned Opcode); |
| bool isXBEGIN(unsigned Opcode); |
| bool isXCRYPTOFB(unsigned Opcode); |
| bool isFUCOMI(unsigned Opcode); |
| bool isVMOVHPD(unsigned Opcode); |
| bool isMASKMOVDQU(unsigned Opcode); |
| bool isFUCOMP(unsigned Opcode); |
| bool isVFNMADD132SD(unsigned Opcode); |
| bool isMFENCE(unsigned Opcode); |
| bool isVFNMADD132SH(unsigned Opcode); |
| bool isVMOVHPS(unsigned Opcode); |
| bool isVPBROADCASTMW2D(unsigned Opcode); |
| bool isVFMADD213PD(unsigned Opcode); |
| bool isVFNMADD132SS(unsigned Opcode); |
| bool isVFMADD213PH(unsigned Opcode); |
| bool isVFMSUB231SD(unsigned Opcode); |
| bool isVPMULTISHIFTQB(unsigned Opcode); |
| bool isFNSAVE(unsigned Opcode); |
| bool isVFMSUB231SH(unsigned Opcode); |
| bool isVSHUFF32X4(unsigned Opcode); |
| bool isPMOVSXWD(unsigned Opcode); |
| bool isVFMADD213PS(unsigned Opcode); |
| bool isVFMSUB231SS(unsigned Opcode); |
| bool isVPCOMPRESSB(unsigned Opcode); |
| bool isPMOVSXWQ(unsigned Opcode); |
| bool isVPCOMPRESSD(unsigned Opcode); |
| bool isVPABSB(unsigned Opcode); |
| bool isVMOVNTDQA(unsigned Opcode); |
| bool isVPABSD(unsigned Opcode); |
| bool isVPCOMPRESSQ(unsigned Opcode); |
| bool isVINSERTI64X2(unsigned Opcode); |
| bool isVPCOMPRESSW(unsigned Opcode); |
| bool isVINSERTI64X4(unsigned Opcode); |
| bool isVPABSQ(unsigned Opcode); |
| bool isVFMADDCSH(unsigned Opcode); |
| bool isVPABSW(unsigned Opcode); |
| bool isPVALIDATE(unsigned Opcode); |
| bool isVFMADD231PD(unsigned Opcode); |
| bool isVFMADD231PH(unsigned Opcode); |
| bool isPUNPCKLQDQ(unsigned Opcode); |
| bool isVCVTNEEPH2PS(unsigned Opcode); |
| bool isVFMADD231PS(unsigned Opcode); |
| bool isAESENCWIDE256KL(unsigned Opcode); |
| bool isVGF2P8MULB(unsigned Opcode); |
| bool isWRSSD(unsigned Opcode); |
| bool isMOVSHDUP(unsigned Opcode); |
| bool isTZMSK(unsigned Opcode); |
| bool isFPATAN(unsigned Opcode); |
| bool isFUCOM(unsigned Opcode); |
| bool isVFMADD213SD(unsigned Opcode); |
| bool isWRSSQ(unsigned Opcode); |
| bool isVFMADD213SH(unsigned Opcode); |
| bool isVPTESTNMB(unsigned Opcode); |
| bool isVPTESTNMD(unsigned Opcode); |
| bool isPMULUDQ(unsigned Opcode); |
| bool isHRESET(unsigned Opcode); |
| bool isPMAXSB(unsigned Opcode); |
| bool isPMAXSD(unsigned Opcode); |
| bool isVFMADD213SS(unsigned Opcode); |
| bool isCLC(unsigned Opcode); |
| bool isCLD(unsigned Opcode); |
| bool isENCODEKEY256(unsigned Opcode); |
| bool isVPTESTNMQ(unsigned Opcode); |
| bool isVGATHERQPD(unsigned Opcode); |
| bool isBOUND(unsigned Opcode); |
| bool isCLI(unsigned Opcode); |
| bool isVPTESTNMW(unsigned Opcode); |
| bool isPREFETCHIT0(unsigned Opcode); |
| bool isPREFETCHIT1(unsigned Opcode); |
| bool isPMAXSW(unsigned Opcode); |
| bool isPFSUB(unsigned Opcode); |
| bool isVCVTDQ2PH(unsigned Opcode); |
| bool isVPALIGNR(unsigned Opcode); |
| bool isVCVTDQ2PD(unsigned Opcode); |
| bool isFNSTSW(unsigned Opcode); |
| bool isFISTP(unsigned Opcode); |
| bool isVFMADDPD(unsigned Opcode); |
| bool isVGATHERQPS(unsigned Opcode); |
| bool isPBLENDW(unsigned Opcode); |
| bool isVCVTDQ2PS(unsigned Opcode); |
| bool isPREFETCH(unsigned Opcode); |
| bool isSKINIT(unsigned Opcode); |
| bool isCMC(unsigned Opcode); |
| bool isVFMADDPS(unsigned Opcode); |
| bool isVPACKSSDW(unsigned Opcode); |
| bool isFISUB(unsigned Opcode); |
| bool isPADDB(unsigned Opcode); |
| bool isPOPAL(unsigned Opcode); |
| bool isPADDD(unsigned Opcode); |
| bool isVFMADD231SD(unsigned Opcode); |
| bool isCMP(unsigned Opcode); |
| bool isKANDB(unsigned Opcode); |
| bool isKANDD(unsigned Opcode); |
| bool isVFMADD231SH(unsigned Opcode); |
| bool isVCVTSH2USI(unsigned Opcode); |
| bool isPCONFIG(unsigned Opcode); |
| bool isPOPAW(unsigned Opcode); |
| bool isPADDQ(unsigned Opcode); |
| bool isPMAXUB(unsigned Opcode); |
| bool isROL(unsigned Opcode); |
| bool isKANDQ(unsigned Opcode); |
| bool isPADDW(unsigned Opcode); |
| bool isVCVTTPS2QQ(unsigned Opcode); |
| bool isPMAXUD(unsigned Opcode); |
| bool isROR(unsigned Opcode); |
| bool isVFMADD231SS(unsigned Opcode); |
| bool isKANDW(unsigned Opcode); |
| bool isVPSRAD(unsigned Opcode); |
| bool isVROUNDPD(unsigned Opcode); |
| bool isMOVBE(unsigned Opcode); |
| bool isLOOP(unsigned Opcode); |
| bool isVCVTTSD2SI(unsigned Opcode); |
| bool isVPSRAQ(unsigned Opcode); |
| bool isVROUNDPS(unsigned Opcode); |
| bool isPMAXUW(unsigned Opcode); |
| bool isVPSRAW(unsigned Opcode); |
| bool isVPOR(unsigned Opcode); |
| bool isVPEXTRB(unsigned Opcode); |
| bool isVPEXTRD(unsigned Opcode); |
| bool isXGETBV(unsigned Opcode); |
| bool isVSUBPD(unsigned Opcode); |
| bool isENCLS(unsigned Opcode); |
| bool isENCLU(unsigned Opcode); |
| bool isENCLV(unsigned Opcode); |
| bool isVSUBPH(unsigned Opcode); |
| bool isVPEXTRQ(unsigned Opcode); |
| bool isVHSUBPD(unsigned Opcode); |
| bool isVPEXTRW(unsigned Opcode); |
| bool isVSUBPS(unsigned Opcode); |
| bool isVGF2P8AFFINEINVQB(unsigned Opcode); |
| bool isVMOVLPD(unsigned Opcode); |
| bool isVFMADDSD(unsigned Opcode); |
| bool isVHSUBPS(unsigned Opcode); |
| bool isPSRLDQ(unsigned Opcode); |
| bool isVMOVLPS(unsigned Opcode); |
| bool isVFMADDSS(unsigned Opcode); |
| bool isVRCP28PD(unsigned Opcode); |
| bool isFPREM(unsigned Opcode); |
| bool isVPMADDWD(unsigned Opcode); |
| bool isVCVTSH2SD(unsigned Opcode); |
| bool isSERIALIZE(unsigned Opcode); |
| bool isV4FMADDPS(unsigned Opcode); |
| bool isVRCP28PS(unsigned Opcode); |
| bool isVCVTSH2SI(unsigned Opcode); |
| bool isRETF(unsigned Opcode); |
| bool isVROUNDSD(unsigned Opcode); |
| bool isVCVTSH2SS(unsigned Opcode); |
| bool isVSCATTERPF1QPD(unsigned Opcode); |
| bool isVPCONFLICTD(unsigned Opcode); |
| bool isMOVNTI(unsigned Opcode); |
| bool isCQO(unsigned Opcode); |
| bool isVROUNDSS(unsigned Opcode); |
| bool isMOVNTQ(unsigned Opcode); |
| bool isVAESENC(unsigned Opcode); |
| bool isVSCATTERPF1QPS(unsigned Opcode); |
| bool isVPCONFLICTQ(unsigned Opcode); |
| bool isFCMOVNB(unsigned Opcode); |
| bool isLZCNT(unsigned Opcode); |
| bool isFCMOVNE(unsigned Opcode); |
| bool isRSM(unsigned Opcode); |
| bool isPOPCNT(unsigned Opcode); |
| bool isVSUBSD(unsigned Opcode); |
| bool isPOPFD(unsigned Opcode); |
| bool isVSUBSH(unsigned Opcode); |
| bool isVPANDD(unsigned Opcode); |
| bool isFCMOVNU(unsigned Opcode); |
| bool isVMOVHLPS(unsigned Opcode); |
| bool isPOPFQ(unsigned Opcode); |
| bool isVPANDN(unsigned Opcode); |
| bool isVFMADDSUB213PD(unsigned Opcode); |
| bool isVCMPPD(unsigned Opcode); |
| bool isVFMADDSUB213PH(unsigned Opcode); |
| bool isVSUBSS(unsigned Opcode); |
| bool isVPANDQ(unsigned Opcode); |
| bool isVCMPPH(unsigned Opcode); |
| bool isVP4DPWSSD(unsigned Opcode); |
| bool isENDBR32(unsigned Opcode); |
| bool isEMMS(unsigned Opcode); |
| bool isXCHG(unsigned Opcode); |
| bool isVFMADDSUB213PS(unsigned Opcode); |
| bool isTDPBUSD(unsigned Opcode); |
| bool isRDSEED(unsigned Opcode); |
| bool isVCMPPS(unsigned Opcode); |
| bool isVRCP28SD(unsigned Opcode); |
| bool isRDMSRLIST(unsigned Opcode); |
| bool isVRCP28SS(unsigned Opcode); |
| bool isV4FMADDSS(unsigned Opcode); |
| bool isAESKEYGENASSIST(unsigned Opcode); |
| bool isFUCOMPI(unsigned Opcode); |
| bool isTDPBF16PS(unsigned Opcode); |
| bool isFUCOMPP(unsigned Opcode); |
| bool isVFMADDSUB231PD(unsigned Opcode); |
| bool isVCVTPH2PSX(unsigned Opcode); |
| bool isVFMADDSUB231PH(unsigned Opcode); |
| bool isBLENDVPD(unsigned Opcode); |
| bool isPSWAPD(unsigned Opcode); |
| bool isVMSAVE(unsigned Opcode); |
| bool isVFMADDSUB231PS(unsigned Opcode); |
| bool isTDPBUUD(unsigned Opcode); |
| bool isVBLENDMPD(unsigned Opcode); |
| bool isPFACC(unsigned Opcode); |
| bool isBLENDVPS(unsigned Opcode); |
| bool isVPERM2I128(unsigned Opcode); |
| bool isVPCMPGTB(unsigned Opcode); |
| bool isLLWPCB(unsigned Opcode); |
| bool isVPCMPGTD(unsigned Opcode); |
| bool isVFMSUBADD213PD(unsigned Opcode); |
| bool isVFMSUBADD213PH(unsigned Opcode); |
| bool isVBLENDMPS(unsigned Opcode); |
| bool isVCMPSD(unsigned Opcode); |
| bool isVCMPSH(unsigned Opcode); |
| bool isVPCMPGTQ(unsigned Opcode); |
| bool isANDNPD(unsigned Opcode); |
| bool isENDBR64(unsigned Opcode); |
| bool isVFMSUBADD213PS(unsigned Opcode); |
| bool isVPCMPGTW(unsigned Opcode); |
| bool isVCMPSS(unsigned Opcode); |
| bool isPFADD(unsigned Opcode); |
| bool isVMOVLHPS(unsigned Opcode); |
| bool isVPMINSD(unsigned Opcode); |
| bool isVPMINSB(unsigned Opcode); |
| bool isANDNPS(unsigned Opcode); |
| bool isPHADDSW(unsigned Opcode); |
| bool isVPSLLVD(unsigned Opcode); |
| bool isVDIVPD(unsigned Opcode); |
| bool isVPMINSQ(unsigned Opcode); |
| bool isVDIVPH(unsigned Opcode); |
| bool isVPMINSW(unsigned Opcode); |
| bool isVFNMSUBPD(unsigned Opcode); |
| bool isLWPVAL(unsigned Opcode); |
| bool isAESDEC128KL(unsigned Opcode); |
| bool isFIADD(unsigned Opcode); |
| bool isVPAND(unsigned Opcode); |
| bool isMOVSLDUP(unsigned Opcode); |
| bool isVPSLLVQ(unsigned Opcode); |
| bool isVDIVPS(unsigned Opcode); |
| bool isCWD(unsigned Opcode); |
| bool isVPSLLVW(unsigned Opcode); |
| bool isCWDE(unsigned Opcode); |
| bool isVFNMSUBPS(unsigned Opcode); |
| bool isVFMSUBADD231PD(unsigned Opcode); |
| bool isVPDPBUSD(unsigned Opcode); |
| bool isVFMSUBADD231PH(unsigned Opcode); |
| bool isPFNACC(unsigned Opcode); |
| bool isPFRSQRT(unsigned Opcode); |
| bool isVPMACSDD(unsigned Opcode); |
| bool isVFMSUBADD231PS(unsigned Opcode); |
| bool isFRSTOR(unsigned Opcode); |
| bool isVPMINUB(unsigned Opcode); |
| bool isVPMINUD(unsigned Opcode); |
| bool isKUNPCKBW(unsigned Opcode); |
| bool isDPPD(unsigned Opcode); |
| bool isVAESIMC(unsigned Opcode); |
| bool isPTEST(unsigned Opcode); |
| bool isVPMINUQ(unsigned Opcode); |
| bool isUCOMISD(unsigned Opcode); |
| bool isVPMINUW(unsigned Opcode); |
| bool isDPPS(unsigned Opcode); |
| bool isFLDLG2(unsigned Opcode); |
| bool isVPMOVD2M(unsigned Opcode); |
| bool isVMOVAPD(unsigned Opcode); |
| bool isVPSRLD(unsigned Opcode); |
| bool isTLBSYNC(unsigned Opcode); |
| bool isXLATB(unsigned Opcode); |
| bool isUCOMISS(unsigned Opcode); |
| bool isVPSRLQ(unsigned Opcode); |
| bool isPDEP(unsigned Opcode); |
| bool isVPDPBUUD(unsigned Opcode); |
| bool isVEXTRACTI32X4(unsigned Opcode); |
| bool isPFCMPEQ(unsigned Opcode); |
| bool isBLSIC(unsigned Opcode); |
| bool isVPSRLW(unsigned Opcode); |
| bool isVEXTRACTI32X8(unsigned Opcode); |
| bool isVDIVSD(unsigned Opcode); |
| bool isVFCMADDCPH(unsigned Opcode); |
| bool isVMOVAPS(unsigned Opcode); |
| bool isFNOP(unsigned Opcode); |
| bool isVDIVSH(unsigned Opcode); |
| bool isBT(unsigned Opcode); |
| bool isVFNMSUBSD(unsigned Opcode); |
| bool isVPHMINPOSUW(unsigned Opcode); |
| bool isVDIVSS(unsigned Opcode); |
| bool isVCVTTSH2SI(unsigned Opcode); |
| bool isKUNPCKDQ(unsigned Opcode); |
| bool isMULPD(unsigned Opcode); |
| bool isBEXTR(unsigned Opcode); |
| bool isVFNMSUBSS(unsigned Opcode); |
| bool isMPSADBW(unsigned Opcode); |
| bool isMULPS(unsigned Opcode); |
| bool isSHA256MSG1(unsigned Opcode); |
| bool isSHA256MSG2(unsigned Opcode); |
| bool isPOPF(unsigned Opcode); |
| bool isVERR(unsigned Opcode); |
| bool isPFCMPGE(unsigned Opcode); |
| bool isVCVTPS2UDQ(unsigned Opcode); |
| bool isVERW(unsigned Opcode); |
| bool isVFMSUBADDPD(unsigned Opcode); |
| bool isPFCMPGT(unsigned Opcode); |
| bool isVEXTRACTI128(unsigned Opcode); |
| bool isVGF2P8AFFINEQB(unsigned Opcode); |
| bool isPSLLD(unsigned Opcode); |
| bool isFSUBP(unsigned Opcode); |
| bool isFSUBR(unsigned Opcode); |
| bool isVBROADCASTF64X2(unsigned Opcode); |
| bool isFCHS(unsigned Opcode); |
| bool isCMPXCHG8B(unsigned Opcode); |
| bool isVBROADCASTF64X4(unsigned Opcode); |
| bool isVINSERTI32X4(unsigned Opcode); |
| bool isVFMSUBADDPS(unsigned Opcode); |
| bool isVBROADCASTF128(unsigned Opcode); |
| bool isVPERMIL2PD(unsigned Opcode); |
| bool isPSLLQ(unsigned Opcode); |
| bool isVINSERTI32X8(unsigned Opcode); |
| bool isLLDT(unsigned Opcode); |
| bool isMOVMSKPD(unsigned Opcode); |
| bool isPSLLW(unsigned Opcode); |
| bool isVFCMADDCSH(unsigned Opcode); |
| bool isVPERMIL2PS(unsigned Opcode); |
| bool isPF2ID(unsigned Opcode); |
| bool isVPUNPCKHQDQ(unsigned Opcode); |
| bool isMOVMSKPS(unsigned Opcode); |
| bool isMULSD(unsigned Opcode); |
| bool isPF2IW(unsigned Opcode); |
| bool isVBLENDPD(unsigned Opcode); |
| bool isCLAC(unsigned Opcode); |
| bool isMULSS(unsigned Opcode); |
| bool isORPD(unsigned Opcode); |
| bool isCDQE(unsigned Opcode); |
| bool isVBLENDPS(unsigned Opcode); |
| bool isTILESTORED(unsigned Opcode); |
| bool isORPS(unsigned Opcode); |
| bool isVPINSRB(unsigned Opcode); |
| bool isVPINSRD(unsigned Opcode); |
| bool isBZHI(unsigned Opcode); |
| bool isPUNPCKHBW(unsigned Opcode); |
| bool isVCVTPD2UDQ(unsigned Opcode); |
| bool isVPINSRQ(unsigned Opcode); |
| bool isVPINSRW(unsigned Opcode); |
| bool isVPMACSSDQH(unsigned Opcode); |
| bool isGETSEC(unsigned Opcode); |
| bool isCVTSS2SD(unsigned Opcode); |
| bool isVPMACSSDQL(unsigned Opcode); |
| bool isANDN(unsigned Opcode); |
| bool isCVTSS2SI(unsigned Opcode); |
| bool isAESDEC(unsigned Opcode); |
| bool isMOVSB(unsigned Opcode); |
| bool isMOVSD(unsigned Opcode); |
| bool isVFNMSUB213PD(unsigned Opcode); |
| bool isVPMOVW2M(unsigned Opcode); |
| bool isVFNMSUB213PH(unsigned Opcode); |
| bool isVPACKSSWB(unsigned Opcode); |
| bool isMOVSQ(unsigned Opcode); |
| bool isMOVSS(unsigned Opcode); |
| bool isVPMULHRSW(unsigned Opcode); |
| bool isVFNMSUB213PS(unsigned Opcode); |
| bool isCMOVCC(unsigned Opcode); |
| bool isMOVSW(unsigned Opcode); |
| bool isMOVSX(unsigned Opcode); |
| bool isVPCOMUD(unsigned Opcode); |
| bool isVPCOMUB(unsigned Opcode); |
| bool isVPDPBSUDS(unsigned Opcode); |
| bool isFLDLN2(unsigned Opcode); |
| bool isPACKUSDW(unsigned Opcode); |
| bool isVPCOMUQ(unsigned Opcode); |
| bool isMONTMUL(unsigned Opcode); |
| bool isPUNPCKHDQ(unsigned Opcode); |
| bool isVPCOMUW(unsigned Opcode); |
| bool isPMULDQ(unsigned Opcode); |
| bool isT1MSKC(unsigned Opcode); |
| bool isIN(unsigned Opcode); |
| bool isVPHADDBD(unsigned Opcode); |
| bool isSAR(unsigned Opcode); |
| bool isVPHADDBQ(unsigned Opcode); |
| bool isVFNMSUB231PD(unsigned Opcode); |
| bool isVPSHLDVD(unsigned Opcode); |
| bool isFSCALE(unsigned Opcode); |
| bool isVFNMSUB231PH(unsigned Opcode); |
| bool isVPHADDBW(unsigned Opcode); |
| bool isSBB(unsigned Opcode); |
| bool isVPSHLDVQ(unsigned Opcode); |
| bool isVFNMSUB231PS(unsigned Opcode); |
| bool isVPDPBUSDS(unsigned Opcode); |
| bool isFCOMPI(unsigned Opcode); |
| bool isRSQRTPS(unsigned Opcode); |
| bool isVSHUFPD(unsigned Opcode); |
| bool isVPSHLDVW(unsigned Opcode); |
| bool isVPADDSB(unsigned Opcode); |
| bool isFCOMPP(unsigned Opcode); |
| bool isDAA(unsigned Opcode); |
| bool isVFNMSUB213SD(unsigned Opcode); |
| bool isVSHUFPS(unsigned Opcode); |
| bool isINVLPGA(unsigned Opcode); |
| bool isINVLPGB(unsigned Opcode); |
| bool isVFNMSUB213SH(unsigned Opcode); |
| bool isDAS(unsigned Opcode); |
| bool isVPADDSW(unsigned Opcode); |
| bool isVFNMSUB213SS(unsigned Opcode); |
| bool isFCOM(unsigned Opcode); |
| bool isKXORB(unsigned Opcode); |
| bool isKXORD(unsigned Opcode); |
| bool isFCOS(unsigned Opcode); |
| bool isVPHADDDQ(unsigned Opcode); |
| bool isCLDEMOTE(unsigned Opcode); |
| bool isKXORQ(unsigned Opcode); |
| bool isKXORW(unsigned Opcode); |
| bool isVDPBF16PS(unsigned Opcode); |
| bool isCLGI(unsigned Opcode); |
| bool isVMREAD(unsigned Opcode); |
| bool isANDPD(unsigned Opcode); |
| bool isVFMSUBPD(unsigned Opcode); |
| bool isVFNMADD213PD(unsigned Opcode); |
| bool isVFNMADD213PH(unsigned Opcode); |
| bool isVFNMSUB231SD(unsigned Opcode); |
| bool isFSQRT(unsigned Opcode); |
| bool isVFNMSUB231SH(unsigned Opcode); |
| bool isPCLMULQDQ(unsigned Opcode); |
| bool isVRCP14PD(unsigned Opcode); |
| bool isANDPS(unsigned Opcode); |
| bool isVFMSUBPS(unsigned Opcode); |
| bool isVFNMADD213PS(unsigned Opcode); |
| bool isPMULHW(unsigned Opcode); |
| bool isVFNMSUB231SS(unsigned Opcode); |
| bool isAESDECWIDE256KL(unsigned Opcode); |
| bool isRSQRTSS(unsigned Opcode); |
| bool isVRCP14PS(unsigned Opcode); |
| bool isVZEROUPPER(unsigned Opcode); |
| bool isVPAVGB(unsigned Opcode); |
| bool isVPMOVSXBD(unsigned Opcode); |
| bool isRDGSBASE(unsigned Opcode); |
| bool isFLDCW(unsigned Opcode); |
| bool isLIDTD(unsigned Opcode); |
| bool isVGATHERPF1DPD(unsigned Opcode); |
| bool isSFENCE(unsigned Opcode); |
| bool isVPMOVSXBQ(unsigned Opcode); |
| bool isVPAVGW(unsigned Opcode); |
| bool isVPMOVSXBW(unsigned Opcode); |
| bool isFCMOVB(unsigned Opcode); |
| bool isVMASKMOVDQU(unsigned Opcode); |
| bool isVGATHERPF1DPS(unsigned Opcode); |
| bool isFCMOVE(unsigned Opcode); |
| bool isVMLOAD(unsigned Opcode); |
| bool isLIDTW(unsigned Opcode); |
| bool isVFNMADD231PD(unsigned Opcode); |
| bool isDEC(unsigned Opcode); |
| bool isVFNMADD231PH(unsigned Opcode); |
| bool isFCMOVU(unsigned Opcode); |
| bool isRSTORSSP(unsigned Opcode); |
| bool isVMAXPD(unsigned Opcode); |
| bool isVMAXPH(unsigned Opcode); |
| bool isPUNPCKLBW(unsigned Opcode); |
| bool isIMUL(unsigned Opcode); |
| bool isTILELOADDT1(unsigned Opcode); |
| bool isVFNMADD231PS(unsigned Opcode); |
| bool isVMAXPS(unsigned Opcode); |
| bool isVPXOR(unsigned Opcode); |
| bool isOR(unsigned Opcode); |
| bool isMOVZX(unsigned Opcode); |
| bool isXSAVES64(unsigned Opcode); |
| bool isVPUNPCKHBW(unsigned Opcode); |
| bool isSYSRET(unsigned Opcode); |
| bool isVFMSUBSD(unsigned Opcode); |
| bool isVFNMADD213SD(unsigned Opcode); |
| bool isVFNMADD213SH(unsigned Opcode); |
| bool isSGDT(unsigned Opcode); |
| bool isVRCP14SD(unsigned Opcode); |
| bool isVPMOVSXDQ(unsigned Opcode); |
| bool isSYSEXIT(unsigned Opcode); |
| bool isPMOVZXBD(unsigned Opcode); |
| bool isVFNMADD213SS(unsigned Opcode); |
| bool isVPMADCSSWD(unsigned Opcode); |
| bool isVPMULUDQ(unsigned Opcode); |
| bool isVFMSUBSS(unsigned Opcode); |
| bool isVPXORD(unsigned Opcode); |
| bool isXSAVEOPT64(unsigned Opcode); |
| bool isXSHA1(unsigned Opcode); |
| bool isVRCP14SS(unsigned Opcode); |
| bool isPMOVZXBQ(unsigned Opcode); |
| bool isSHL(unsigned Opcode); |
| bool isPMOVZXBW(unsigned Opcode); |
| bool isPMULLD(unsigned Opcode); |
| bool isVCVTPS2UQQ(unsigned Opcode); |
| bool isVPBLENDD(unsigned Opcode); |
| bool isVPXORQ(unsigned Opcode); |
| bool isPUNPCKLDQ(unsigned Opcode); |
| bool isSHR(unsigned Opcode); |
| bool isVPUNPCKLQDQ(unsigned Opcode); |
| bool isVCVTPD2DQ(unsigned Opcode); |
| bool isPMULLW(unsigned Opcode); |
| bool isVPBLENDW(unsigned Opcode); |
| bool isAESENCLAST(unsigned Opcode); |
| bool isVPUNPCKHDQ(unsigned Opcode); |
| bool isVFNMADD231SD(unsigned Opcode); |
| bool isVFNMADD231SH(unsigned Opcode); |
| bool isVPMOVSDB(unsigned Opcode); |
| bool isVMAXSD(unsigned Opcode); |
| bool isVMAXSH(unsigned Opcode); |
| bool isLAHF(unsigned Opcode); |
| bool isCVTTPD2DQ(unsigned Opcode); |
| bool isUNPCKHPD(unsigned Opcode); |
| bool isVFNMADD231SS(unsigned Opcode); |
| bool isVMAXSS(unsigned Opcode); |
| bool isVPMACSSDD(unsigned Opcode); |
| bool isVPMOVSDW(unsigned Opcode); |
| bool isPMOVZXDQ(unsigned Opcode); |
| bool isUNPCKHPS(unsigned Opcode); |
| bool isFCOMI(unsigned Opcode); |
| bool isCLFLUSH(unsigned Opcode); |
| bool isTILELOADD(unsigned Opcode); |
| bool isFCOMP(unsigned Opcode); |
| bool isDIV(unsigned Opcode); |
| bool isVPMACSWD(unsigned Opcode); |
| bool isFPREM1(unsigned Opcode); |
| bool isVSCATTERQPD(unsigned Opcode); |
| bool isFYL2X(unsigned Opcode); |
| bool isVPMACSWW(unsigned Opcode); |
| bool isPFMAX(unsigned Opcode); |
| bool isVPSHUFB(unsigned Opcode); |
| bool isVCVTPD2UQQ(unsigned Opcode); |
| bool isVPSHUFD(unsigned Opcode); |
| bool isVSCATTERQPS(unsigned Opcode); |
| bool isGF2P8AFFINEINVQB(unsigned Opcode); |
| bool isFEMMS(unsigned Opcode); |
| bool isKUNPCKWD(unsigned Opcode); |
| bool isVPCLMULQDQ(unsigned Opcode); |
| bool isKORB(unsigned Opcode); |
| bool isVINSERTPS(unsigned Opcode); |
| bool isKORD(unsigned Opcode); |
| bool isVMFUNC(unsigned Opcode); |
| bool isCPUID(unsigned Opcode); |
| bool isVSCATTERPF0QPD(unsigned Opcode); |
| bool isOUT(unsigned Opcode); |
| bool isKORQ(unsigned Opcode); |
| bool isKORW(unsigned Opcode); |
| bool isVSCATTERPF0QPS(unsigned Opcode); |
| bool isPHSUBSW(unsigned Opcode); |
| bool isPFSUBR(unsigned Opcode); |
| bool isVCVTPH2UDQ(unsigned Opcode); |
| bool isVBROADCASTF32X2(unsigned Opcode); |
| bool isVBROADCASTF32X4(unsigned Opcode); |
| bool isSHA256RNDS2(unsigned Opcode); |
| bool isVBROADCASTF32X8(unsigned Opcode); |
| bool isVPERMB(unsigned Opcode); |
| bool isVPUNPCKLBW(unsigned Opcode); |
| bool isVPERMD(unsigned Opcode); |
| bool isXCRYPTECB(unsigned Opcode); |
| bool isVPERMQ(unsigned Opcode); |
| bool isEXTRACTPS(unsigned Opcode); |
| bool isVPERMW(unsigned Opcode); |
| bool isHADDPD(unsigned Opcode); |
| bool isFXSAVE(unsigned Opcode); |
| bool isVRCPPH(unsigned Opcode); |
| bool isHADDPS(unsigned Opcode); |
| bool isVPSADBW(unsigned Opcode); |
| bool isRDRAND(unsigned Opcode); |
| bool isVRCPPS(unsigned Opcode); |
| bool isVXORPD(unsigned Opcode); |
| bool isFFREE(unsigned Opcode); |
| bool isPCMPEQB(unsigned Opcode); |
| bool isPCMPEQD(unsigned Opcode); |
| bool isVPUNPCKLDQ(unsigned Opcode); |
| bool isVTESTPD(unsigned Opcode); |
| bool isVXORPS(unsigned Opcode); |
| bool isTZCNT(unsigned Opcode); |
| bool isCLTS(unsigned Opcode); |
| bool isPCMPEQQ(unsigned Opcode); |
| bool isVFPCLASSPD(unsigned Opcode); |
| bool isVFPCLASSPH(unsigned Opcode); |
| bool isVTESTPS(unsigned Opcode); |
| bool isPCMPEQW(unsigned Opcode); |
| bool isUNPCKLPD(unsigned Opcode); |
| bool isVMOVDQA32(unsigned Opcode); |
| bool isVFPCLASSPS(unsigned Opcode); |
| bool isVPMOVMSKB(unsigned Opcode); |
| bool isFDECSTP(unsigned Opcode); |
| bool isCLUI(unsigned Opcode); |
| bool isFLDPI(unsigned Opcode); |
| bool isUNPCKLPS(unsigned Opcode); |
| bool isVCVTTPD2DQ(unsigned Opcode); |
| bool isPAVGUSB(unsigned Opcode); |
| bool isCALL(unsigned Opcode); |
| bool isFLDENV(unsigned Opcode); |
| bool isPACKUSWB(unsigned Opcode); |
| bool isVPHADDSW(unsigned Opcode); |
| bool isLAR(unsigned Opcode); |
| bool isCLFLUSHOPT(unsigned Opcode); |
| bool isVMMCALL(unsigned Opcode); |
| bool isARPL(unsigned Opcode); |
| bool isXABORT(unsigned Opcode); |
| bool isPUNPCKHWD(unsigned Opcode); |
| bool isVRCPSH(unsigned Opcode); |
| bool isLDDQU(unsigned Opcode); |
| bool isPFMIN(unsigned Opcode); |
| bool isSYSRETQ(unsigned Opcode); |
| bool isVRCPSS(unsigned Opcode); |
| bool isCLWB(unsigned Opcode); |
| bool isSTC(unsigned Opcode); |
| bool isSTD(unsigned Opcode); |
| bool isVMOVDQU8(unsigned Opcode); |
| bool isSTI(unsigned Opcode); |
| bool isSTR(unsigned Opcode); |
| bool isVFPCLASSSD(unsigned Opcode); |
| bool isLDMXCSR(unsigned Opcode); |
| bool isVFPCLASSSH(unsigned Opcode); |
| bool isVCVTPD2PH(unsigned Opcode); |
| bool isVCVTPH2DQ(unsigned Opcode); |
| bool isVFPCLASSSS(unsigned Opcode); |
| bool isVMOVDQA64(unsigned Opcode); |
| bool isSUB(unsigned Opcode); |
| bool isVUCOMISD(unsigned Opcode); |
| bool isVCVTPD2PS(unsigned Opcode); |
| bool isLEAVE(unsigned Opcode); |
| bool isOUTSB(unsigned Opcode); |
| bool isOUTSD(unsigned Opcode); |
| bool isVUCOMISH(unsigned Opcode); |
| bool isEXTRQ(unsigned Opcode); |
| bool isVUCOMISS(unsigned Opcode); |
| bool isCVTTPD2PI(unsigned Opcode); |
| bool isOUTSW(unsigned Opcode); |
| bool isLDS(unsigned Opcode); |
| bool isPSHUFHW(unsigned Opcode); |
| bool isPHSUBD(unsigned Opcode); |
| bool isHLT(unsigned Opcode); |
| bool isVCVTPD2QQ(unsigned Opcode); |
| bool isLIDT(unsigned Opcode); |
| bool isVPTERNLOGD(unsigned Opcode); |
| bool isLEA(unsigned Opcode); |
| bool isVPHADDWD(unsigned Opcode); |
| bool isPREFETCHNTA(unsigned Opcode); |
| bool isVPTERNLOGQ(unsigned Opcode); |
| bool isKSHIFTLB(unsigned Opcode); |
| bool isKSHIFTLD(unsigned Opcode); |
| bool isPHSUBW(unsigned Opcode); |
| bool isVPMOVSQB(unsigned Opcode); |
| bool isVPHADDWQ(unsigned Opcode); |
| bool isVCVTTSS2USI(unsigned Opcode); |
| bool isVPMOVSQD(unsigned Opcode); |
| bool isLES(unsigned Opcode); |
| bool isVMPSADBW(unsigned Opcode); |
| bool isKSHIFTLQ(unsigned Opcode); |
| bool isADDSUBPD(unsigned Opcode); |
| bool isKSHIFTLW(unsigned Opcode); |
| bool isXSAVE64(unsigned Opcode); |
| bool isVPMOVSQW(unsigned Opcode); |
| bool isADDSUBPS(unsigned Opcode); |
| bool isENQCMD(unsigned Opcode); |
| bool isVCVTTPH2W(unsigned Opcode); |
| bool isVMRUN(unsigned Opcode); |
| bool isWRFSBASE(unsigned Opcode); |
| bool isCOMISD(unsigned Opcode); |
| bool isLFS(unsigned Opcode); |
| bool isSTOSB(unsigned Opcode); |
| bool isSTOSD(unsigned Opcode); |
| bool isCOMISS(unsigned Opcode); |
| bool isVZEROALL(unsigned Opcode); |
| bool isVFMADDSUBPD(unsigned Opcode); |
| bool isVEXTRACTPS(unsigned Opcode); |
| bool isKADDB(unsigned Opcode); |
| bool isKADDD(unsigned Opcode); |
| bool isXTEST(unsigned Opcode); |
| bool isFISTTP(unsigned Opcode); |
| bool isSTOSQ(unsigned Opcode); |
| bool isJCXZ(unsigned Opcode); |
| bool isSTOSW(unsigned Opcode); |
| bool isVFMADDSUBPS(unsigned Opcode); |
| bool isVPSHAB(unsigned Opcode); |
| bool isKADDQ(unsigned Opcode); |
| bool isLGS(unsigned Opcode); |
| bool isVPMACSDQH(unsigned Opcode); |
| bool isMOVDQA(unsigned Opcode); |
| bool isVPSHAD(unsigned Opcode); |
| bool isKADDW(unsigned Opcode); |
| bool isPSMASH(unsigned Opcode); |
| bool isPBLENDVB(unsigned Opcode); |
| bool isVPMACSDQL(unsigned Opcode); |
| bool isVPHSUBBW(unsigned Opcode); |
| bool isVPSHAQ(unsigned Opcode); |
| bool isVSQRTPD(unsigned Opcode); |
| bool isCLRSSBSY(unsigned Opcode); |
| bool isMINPD(unsigned Opcode); |
| bool isVPSHAW(unsigned Opcode); |
| bool isVSQRTPH(unsigned Opcode); |
| bool isMOVDQU(unsigned Opcode); |
| bool isVSQRTPS(unsigned Opcode); |
| bool isVPSUBSB(unsigned Opcode); |
| bool isMULX(unsigned Opcode); |
| bool isMINPS(unsigned Opcode); |
| bool isPSHUFLW(unsigned Opcode); |
| bool isVEXTRACTF64X2(unsigned Opcode); |
| bool isVEXTRACTF64X4(unsigned Opcode); |
| bool isVCVTTSD2USI(unsigned Opcode); |
| bool isINCSSPD(unsigned Opcode); |
| bool isVPSIGNB(unsigned Opcode); |
| bool isVPSUBSW(unsigned Opcode); |
| bool isVPSIGND(unsigned Opcode); |
| bool isXSAVEOPT(unsigned Opcode); |
| bool isVPMOVSXWD(unsigned Opcode); |
| bool isINCSSPQ(unsigned Opcode); |
| bool isGF2P8AFFINEQB(unsigned Opcode); |
| bool isVPMOVSXWQ(unsigned Opcode); |
| bool isVPHSUBDQ(unsigned Opcode); |
| bool isVPSIGNW(unsigned Opcode); |
| bool isSGDTD(unsigned Opcode); |
| bool isPUNPCKLWD(unsigned Opcode); |
| bool isVPPERM(unsigned Opcode); |
| bool isAAA(unsigned Opcode); |
| bool isPAND(unsigned Opcode); |
| bool isVCVTPH2UQQ(unsigned Opcode); |
| bool isAAD(unsigned Opcode); |
| bool isSGDTW(unsigned Opcode); |
| bool isVPUNPCKHWD(unsigned Opcode); |
| bool isAAM(unsigned Opcode); |
| bool isVCVTNEOPH2PS(unsigned Opcode); |
| bool isAAS(unsigned Opcode); |
| bool isVSQRTSD(unsigned Opcode); |
| bool isBLCI(unsigned Opcode); |
| bool isMINSD(unsigned Opcode); |
| bool isVPSHUFBITQMB(unsigned Opcode); |
| bool isKSHIFTRB(unsigned Opcode); |
| bool isUMONITOR(unsigned Opcode); |
| bool isKSHIFTRD(unsigned Opcode); |
| bool isFNCLEX(unsigned Opcode); |
| bool isVSQRTSH(unsigned Opcode); |
| bool isBLCS(unsigned Opcode); |
| bool isVINSERTF64X2(unsigned Opcode); |
| bool isVSQRTSS(unsigned Opcode); |
| bool isVINSERTF64X4(unsigned Opcode); |
| bool isMINSS(unsigned Opcode); |
| bool isVPBROADCASTMB2Q(unsigned Opcode); |
| bool isKSHIFTRQ(unsigned Opcode); |
| bool isVMOVSHDUP(unsigned Opcode); |
| bool isVPMOVSWB(unsigned Opcode); |
| bool isPMOVZXWD(unsigned Opcode); |
| bool isFSIN(unsigned Opcode); |
| bool isPSLLDQ(unsigned Opcode); |
| bool isKSHIFTRW(unsigned Opcode); |
| bool isVPADDD(unsigned Opcode); |
| bool isVPADDB(unsigned Opcode); |
| bool isVPMACSSWD(unsigned Opcode); |
| bool isPMOVZXWQ(unsigned Opcode); |
| bool isVPADDQ(unsigned Opcode); |
| bool isVPADDW(unsigned Opcode); |
| bool isVRSQRTPH(unsigned Opcode); |
| bool isVPMACSSWW(unsigned Opcode); |
| bool isVRSQRTPS(unsigned Opcode); |
| bool isVCVTTPH2DQ(unsigned Opcode); |
| bool isWRMSR(unsigned Opcode); |
| bool isXSETBV(unsigned Opcode); |
| bool isMOVSXD(unsigned Opcode); |
| bool isADC(unsigned Opcode); |
| bool isADD(unsigned Opcode); |
| bool isFDIV(unsigned Opcode); |
| bool isAESDEC256KL(unsigned Opcode); |
| bool isVPCMPUB(unsigned Opcode); |
| bool isVCVTTPD2QQ(unsigned Opcode); |
| bool isVPCMPUD(unsigned Opcode); |
| bool isPFMUL(unsigned Opcode); |
| bool isPREFETCHW(unsigned Opcode); |
| bool isVPCMPUQ(unsigned Opcode); |
| bool isKORTESTB(unsigned Opcode); |
| bool isMOVHPD(unsigned Opcode); |
| bool isKORTESTD(unsigned Opcode); |
| bool isCVTSI2SD(unsigned Opcode); |
| bool isFSUBRP(unsigned Opcode); |
| bool isIRET(unsigned Opcode); |
| bool isPTWRITE(unsigned Opcode); |
| bool isVPCMPUW(unsigned Opcode); |
| bool isKORTESTQ(unsigned Opcode); |
| bool isMOVHPS(unsigned Opcode); |
| bool isFIMUL(unsigned Opcode); |
| bool isCVTSI2SS(unsigned Opcode); |
| bool isVCVTPH2PD(unsigned Opcode); |
| bool isKORTESTW(unsigned Opcode); |
| bool isPADDUSB(unsigned Opcode); |
| bool isVSHUFI64X2(unsigned Opcode); |
| bool isVRSQRTSH(unsigned Opcode); |
| bool isVMWRITE(unsigned Opcode); |
| bool isTILERELEASE(unsigned Opcode); |
| bool isVCVTPH2PS(unsigned Opcode); |
| bool isVMOVUPD(unsigned Opcode); |
| bool isPADDUSW(unsigned Opcode); |
| bool isVRSQRTSS(unsigned Opcode); |
| bool isVPCMOV(unsigned Opcode); |
| bool isVCVTUSI2SD(unsigned Opcode); |
| bool isVMOVUPS(unsigned Opcode); |
| bool isVCVTUSI2SH(unsigned Opcode); |
| bool isVPCMPB(unsigned Opcode); |
| bool isVPGATHERDD(unsigned Opcode); |
| bool isVPCMPD(unsigned Opcode); |
| bool isVCVTUSI2SS(unsigned Opcode); |
| bool isLFENCE(unsigned Opcode); |
| bool isVCVTPH2QQ(unsigned Opcode); |
| bool isVGATHERPF0DPD(unsigned Opcode); |
| bool isSEAMRET(unsigned Opcode); |
| bool isPI2FD(unsigned Opcode); |
| bool isVPGATHERDQ(unsigned Opcode); |
| bool isPCMPESTRI(unsigned Opcode); |
| bool isVPCMPQ(unsigned Opcode); |
| bool isPCMPESTRM(unsigned Opcode); |
| bool isVPCMPW(unsigned Opcode); |
| bool isVGATHERPF0DPS(unsigned Opcode); |
| bool isVPMOVUSDB(unsigned Opcode); |
| bool isPI2FW(unsigned Opcode); |
| bool isSYSEXITQ(unsigned Opcode); |
| bool isCVTPS2DQ(unsigned Opcode); |
| bool isRDPKRU(unsigned Opcode); |
| bool isVPMOVUSDW(unsigned Opcode); |
| bool isPSUBB(unsigned Opcode); |
| bool isPSUBD(unsigned Opcode); |
| bool isVPSHRDD(unsigned Opcode); |
| bool isRETFQ(unsigned Opcode); |
| bool isVPERMT2PD(unsigned Opcode); |
| bool isMOVABS(unsigned Opcode); |
| bool isVPSHRDQ(unsigned Opcode); |
| bool isPSUBQ(unsigned Opcode); |
| bool isVPSHRDW(unsigned Opcode); |
| bool isVPSHLB(unsigned Opcode); |
| bool isPSUBW(unsigned Opcode); |
| bool isVPSHLD(unsigned Opcode); |
| bool isVPERMT2PS(unsigned Opcode); |
| bool isVPUNPCKLWD(unsigned Opcode); |
| bool isVPSHLQ(unsigned Opcode); |
| bool isVPSHLW(unsigned Opcode); |
| bool isLSL(unsigned Opcode); |
| bool isVBROADCASTI128(unsigned Opcode); |
| bool isLSS(unsigned Opcode); |
| bool isVPHADDD(unsigned Opcode); |
| bool isADDPD(unsigned Opcode); |
| bool isVMASKMOVPD(unsigned Opcode); |
| bool isADDPS(unsigned Opcode); |
| bool isINSB(unsigned Opcode); |
| bool isINSD(unsigned Opcode); |
| bool isVPHADDW(unsigned Opcode); |
| bool isLTR(unsigned Opcode); |
| bool isVMASKMOVPS(unsigned Opcode); |
| bool isVCVTPH2UW(unsigned Opcode); |
| bool isINT3(unsigned Opcode); |
| bool isKNOTB(unsigned Opcode); |
| bool isKNOTD(unsigned Opcode); |
| bool isINSW(unsigned Opcode); |
| bool isVBLENDVPD(unsigned Opcode); |
| bool isBLSFILL(unsigned Opcode); |
| bool isMONITOR(unsigned Opcode); |
| bool isKNOTQ(unsigned Opcode); |
| bool isCMPXCHG16B(unsigned Opcode); |
| bool isKNOTW(unsigned Opcode); |
| bool isPEXTRB(unsigned Opcode); |
| bool isVPRORVD(unsigned Opcode); |
| bool isPEXTRD(unsigned Opcode); |
| bool isVAESENCLAST(unsigned Opcode); |
| bool isINTO(unsigned Opcode); |
| bool isVBLENDVPS(unsigned Opcode); |
| bool isVPRORVQ(unsigned Opcode); |
| bool isPEXTRQ(unsigned Opcode); |
| bool isHSUBPD(unsigned Opcode); |
| bool isPEXTRW(unsigned Opcode); |
| bool isFDIVRP(unsigned Opcode); |
| bool isSCASB(unsigned Opcode); |
| bool isF2XM1(unsigned Opcode); |
| bool isSCASD(unsigned Opcode); |
| bool isFISUBR(unsigned Opcode); |
| bool isMOVLPD(unsigned Opcode); |
| bool isHSUBPS(unsigned Opcode); |
| bool isSCASQ(unsigned Opcode); |
| bool isFSTP(unsigned Opcode); |
| bool isVDBPSADBW(unsigned Opcode); |
| bool isADDSD(unsigned Opcode); |
| bool isMOVLPS(unsigned Opcode); |
| bool isSCASW(unsigned Opcode); |
| bool isVCVTW2PH(unsigned Opcode); |
| bool isVPTEST(unsigned Opcode); |
| bool isFLD1(unsigned Opcode); |
| bool isWBINVD(unsigned Opcode); |
| bool isADDSS(unsigned Opcode); |
| bool isPOP(unsigned Opcode); |
| bool isINVD(unsigned Opcode); |
| bool isPOR(unsigned Opcode); |
| bool isAND(unsigned Opcode); |
| bool isFYL2XP1(unsigned Opcode); |
| bool isFSUB(unsigned Opcode); |
| bool isENTER(unsigned Opcode); |
| bool isVMOVSLDUP(unsigned Opcode); |
| bool isADCX(unsigned Opcode); |
| bool isXADD(unsigned Opcode); |
| bool isAESENC(unsigned Opcode); |
| bool isFLDZ(unsigned Opcode); |
| bool isXRSTORS64(unsigned Opcode); |
| bool isVCVTTSH2USI(unsigned Opcode); |
| bool isVMULPD(unsigned Opcode); |
| bool isFDIVP(unsigned Opcode); |
| bool isVGETMANTPD(unsigned Opcode); |
| bool isFDIVR(unsigned Opcode); |
| bool isVPMOVM2D(unsigned Opcode); |
| bool isVMULPH(unsigned Opcode); |
| bool isVGETMANTPH(unsigned Opcode); |
| bool isVPMOVM2B(unsigned Opcode); |
| bool isAOR(unsigned Opcode); |
| bool isVPHSUBSW(unsigned Opcode); |
| bool isVMULPS(unsigned Opcode); |
| bool isVPMOVM2Q(unsigned Opcode); |
| bool isMOVNTDQ(unsigned Opcode); |
| bool isVGETMANTPS(unsigned Opcode); |
| bool isVPCMPESTRI(unsigned Opcode); |
| bool isVPMOVM2W(unsigned Opcode); |
| bool isVPCMPESTRM(unsigned Opcode); |
| bool isSYSENTER(unsigned Opcode); |
| bool isVPERMPD(unsigned Opcode); |
| bool isVCVTTPH2QQ(unsigned Opcode); |
| bool isPUSHF(unsigned Opcode); |
| bool isPXOR(unsigned Opcode); |
| bool isCMPXCHG(unsigned Opcode); |
| bool isVPERMPS(unsigned Opcode); |
| bool isVMRESUME(unsigned Opcode); |
| bool isVPSLLD(unsigned Opcode); |
| bool isVPSLLQ(unsigned Opcode); |
| bool isVEXTRACTF32X4(unsigned Opcode); |
| bool isVPSLLW(unsigned Opcode); |
| bool isBLSI(unsigned Opcode); |
| bool isVEXTRACTF32X8(unsigned Opcode); |
| bool isBLSR(unsigned Opcode); |
| bool isVMULSD(unsigned Opcode); |
| bool isVGETMANTSD(unsigned Opcode); |
| bool isVPCMPEQB(unsigned Opcode); |
| bool isVMULSH(unsigned Opcode); |
| bool isVPCMPEQD(unsigned Opcode); |
| bool isVGETMANTSH(unsigned Opcode); |
| bool isLMSW(unsigned Opcode); |
| bool isFNSTENV(unsigned Opcode); |
| bool isVMULSS(unsigned Opcode); |
| bool isVGETMANTSS(unsigned Opcode); |
| bool isVPCMPEQQ(unsigned Opcode); |
| bool isVPCMPEQW(unsigned Opcode); |
| bool isTDPBSSD(unsigned Opcode); |
| bool isVPHSUBWD(unsigned Opcode); |
| bool isUMWAIT(unsigned Opcode); |
| bool isBSWAP(unsigned Opcode); |
| bool isVCVTUQQ2PD(unsigned Opcode); |
| bool isPEXT(unsigned Opcode); |
| bool isVCVTUQQ2PH(unsigned Opcode); |
| bool isVMOVMSKPD(unsigned Opcode); |
| bool isLOADIWKEY(unsigned Opcode); |
| bool isPMINSB(unsigned Opcode); |
| bool isPMINSD(unsigned Opcode); |
| bool isVCVTUQQ2PS(unsigned Opcode); |
| bool isSTMXCSR(unsigned Opcode); |
| bool isCVTPS2PD(unsigned Opcode); |
| bool isVMOVMSKPS(unsigned Opcode); |
| bool isVPROLD(unsigned Opcode); |
| bool isFPTAN(unsigned Opcode); |
| bool isCVTPS2PI(unsigned Opcode); |
| bool isVMXOFF(unsigned Opcode); |
| bool isXRSTOR64(unsigned Opcode); |
| bool isPMINSW(unsigned Opcode); |
| bool isVMOVSD(unsigned Opcode); |
| bool isVPGATHERQD(unsigned Opcode); |
| bool isVINSERTF32X4(unsigned Opcode); |
| bool isVMOVSH(unsigned Opcode); |
| bool isVPGATHERQQ(unsigned Opcode); |
| bool isVPROLQ(unsigned Opcode); |
| bool isVINSERTF32X8(unsigned Opcode); |
| bool isXSAVE(unsigned Opcode); |
| bool isTDPFP16PS(unsigned Opcode); |
| bool isVCVTTPH2UW(unsigned Opcode); |
| bool isVMOVSS(unsigned Opcode); |
| bool isRDTSCP(unsigned Opcode); |
| bool isVPMOVUSQB(unsigned Opcode); |
| bool isVPMOVUSQD(unsigned Opcode); |
| bool isTDPBSUD(unsigned Opcode); |
| bool isBLCMSK(unsigned Opcode); |
| bool isVPMOVUSQW(unsigned Opcode); |
| bool isVPMADCSWD(unsigned Opcode); |
| bool isVGATHERDPD(unsigned Opcode); |
| bool isSHLD(unsigned Opcode); |
| bool isPMINUB(unsigned Opcode); |
| bool isPMINUD(unsigned Opcode); |
| bool isAESIMC(unsigned Opcode); |
| bool isCVTSD2SI(unsigned Opcode); |
| bool isVLDMXCSR(unsigned Opcode); |
| bool isVCVTSS2SD(unsigned Opcode); |
| bool isVCVTSS2SH(unsigned Opcode); |
| bool isSLDT(unsigned Opcode); |
| bool isVCVTSS2SI(unsigned Opcode); |
| bool isVGATHERDPS(unsigned Opcode); |
| bool isFABS(unsigned Opcode); |
| bool isCVTSD2SS(unsigned Opcode); |
| bool isSHLX(unsigned Opcode); |
| bool isMONITORX(unsigned Opcode); |
| bool isPMINUW(unsigned Opcode); |
| bool isVPMAXSB(unsigned Opcode); |
| bool isVPMAXSD(unsigned Opcode); |
| bool isMOVAPD(unsigned Opcode); |
| bool isENQCMDS(unsigned Opcode); |
| bool isVMOVD(unsigned Opcode); |
| bool isVPMAXSQ(unsigned Opcode); |
| bool isCVTTSS2SI(unsigned Opcode); |
| bool isVPMAXSW(unsigned Opcode); |
| bool isMOVAPS(unsigned Opcode); |
| bool isVPACKUSDW(unsigned Opcode); |
| bool isVFIXUPIMMPD(unsigned Opcode); |
| bool isVMOVQ(unsigned Opcode); |
| bool isVPSHUFHW(unsigned Opcode); |
| bool isPCMPISTRI(unsigned Opcode); |
| bool isVMOVW(unsigned Opcode); |
| #endif // GET_X86_MNEMONIC_TABLES_H |
| |
| #ifdef GET_X86_MNEMONIC_TABLES_CPP |
| #undef GET_X86_MNEMONIC_TABLES_CPP |
| |
| bool isPCMPISTRM(unsigned Opcode) { |
| switch (Opcode) { |
| case PCMPISTRMrm: |
| case PCMPISTRMrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVALIGND(unsigned Opcode) { |
| switch (Opcode) { |
| case VALIGNDZ128rmbi: |
| case VALIGNDZ128rmbik: |
| case VALIGNDZ128rmbikz: |
| case VALIGNDZ128rmi: |
| case VALIGNDZ128rmik: |
| case VALIGNDZ128rmikz: |
| case VALIGNDZ128rri: |
| case VALIGNDZ128rrik: |
| case VALIGNDZ128rrikz: |
| case VALIGNDZ256rmbi: |
| case VALIGNDZ256rmbik: |
| case VALIGNDZ256rmbikz: |
| case VALIGNDZ256rmi: |
| case VALIGNDZ256rmik: |
| case VALIGNDZ256rmikz: |
| case VALIGNDZ256rri: |
| case VALIGNDZ256rrik: |
| case VALIGNDZ256rrikz: |
| case VALIGNDZrmbi: |
| case VALIGNDZrmbik: |
| case VALIGNDZrmbikz: |
| case VALIGNDZrmi: |
| case VALIGNDZrmik: |
| case VALIGNDZrmikz: |
| case VALIGNDZrri: |
| case VALIGNDZrrik: |
| case VALIGNDZrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVFMULCPH(unsigned Opcode) { |
| switch (Opcode) { |
| case VFMULCPHZ128rm: |
| case VFMULCPHZ128rmb: |
| case VFMULCPHZ128rmbk: |
| case VFMULCPHZ128rmbkz: |
| case VFMULCPHZ128rmk: |
| case VFMULCPHZ128rmkz: |
| case VFMULCPHZ128rr: |
| case VFMULCPHZ128rrk: |
| case VFMULCPHZ128rrkz: |
| case VFMULCPHZ256rm: |
| case VFMULCPHZ256rmb: |
| case VFMULCPHZ256rmbk: |
| case VFMULCPHZ256rmbkz: |
| case VFMULCPHZ256rmk: |
| case VFMULCPHZ256rmkz: |
| case VFMULCPHZ256rr: |
| case VFMULCPHZ256rrk: |
| case VFMULCPHZ256rrkz: |
| case VFMULCPHZrm: |
| case VFMULCPHZrmb: |
| case VFMULCPHZrmbk: |
| case VFMULCPHZrmbkz: |
| case VFMULCPHZrmk: |
| case VFMULCPHZrmkz: |
| case VFMULCPHZrr: |
| case VFMULCPHZrrb: |
| case VFMULCPHZrrbk: |
| case VFMULCPHZrrbkz: |
| case VFMULCPHZrrk: |
| case VFMULCPHZrrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPDPBSSD(unsigned Opcode) { |
| switch (Opcode) { |
| case VPDPBSSDYrm: |
| case VPDPBSSDYrr: |
| case VPDPBSSDrm: |
| case VPDPBSSDrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVFIXUPIMMPS(unsigned Opcode) { |
| switch (Opcode) { |
| case VFIXUPIMMPSZ128rmbi: |
| case VFIXUPIMMPSZ128rmbik: |
| case VFIXUPIMMPSZ128rmbikz: |
| case VFIXUPIMMPSZ128rmi: |
| case VFIXUPIMMPSZ128rmik: |
| case VFIXUPIMMPSZ128rmikz: |
| case VFIXUPIMMPSZ128rri: |
| case VFIXUPIMMPSZ128rrik: |
| case VFIXUPIMMPSZ128rrikz: |
| case VFIXUPIMMPSZ256rmbi: |
| case VFIXUPIMMPSZ256rmbik: |
| case VFIXUPIMMPSZ256rmbikz: |
| case VFIXUPIMMPSZ256rmi: |
| case VFIXUPIMMPSZ256rmik: |
| case VFIXUPIMMPSZ256rmikz: |
| case VFIXUPIMMPSZ256rri: |
| case VFIXUPIMMPSZ256rrik: |
| case VFIXUPIMMPSZ256rrikz: |
| case VFIXUPIMMPSZrmbi: |
| case VFIXUPIMMPSZrmbik: |
| case VFIXUPIMMPSZrmbikz: |
| case VFIXUPIMMPSZrmi: |
| case VFIXUPIMMPSZrmik: |
| case VFIXUPIMMPSZrmikz: |
| case VFIXUPIMMPSZrri: |
| case VFIXUPIMMPSZrrib: |
| case VFIXUPIMMPSZrribk: |
| case VFIXUPIMMPSZrribkz: |
| case VFIXUPIMMPSZrrik: |
| case VFIXUPIMMPSZrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPMOVQ2M(unsigned Opcode) { |
| switch (Opcode) { |
| case VPMOVQ2MZ128rr: |
| case VPMOVQ2MZ256rr: |
| case VPMOVQ2MZrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isLDTILECFG(unsigned Opcode) { |
| return Opcode == LDTILECFG; |
| } |
| |
| bool isFADD(unsigned Opcode) { |
| switch (Opcode) { |
| case ADD_F32m: |
| case ADD_F64m: |
| case ADD_FST0r: |
| case ADD_FrST0: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVALIGNQ(unsigned Opcode) { |
| switch (Opcode) { |
| case VALIGNQZ128rmbi: |
| case VALIGNQZ128rmbik: |
| case VALIGNQZ128rmbikz: |
| case VALIGNQZ128rmi: |
| case VALIGNQZ128rmik: |
| case VALIGNQZ128rmikz: |
| case VALIGNQZ128rri: |
| case VALIGNQZ128rrik: |
| case VALIGNQZ128rrikz: |
| case VALIGNQZ256rmbi: |
| case VALIGNQZ256rmbik: |
| case VALIGNQZ256rmbikz: |
| case VALIGNQZ256rmi: |
| case VALIGNQZ256rmik: |
| case VALIGNQZ256rmikz: |
| case VALIGNQZ256rri: |
| case VALIGNQZ256rrik: |
| case VALIGNQZ256rrikz: |
| case VALIGNQZrmbi: |
| case VALIGNQZrmbik: |
| case VALIGNQZrmbikz: |
| case VALIGNQZrmi: |
| case VALIGNQZrmik: |
| case VALIGNQZrmikz: |
| case VALIGNQZrri: |
| case VALIGNQZrrik: |
| case VALIGNQZrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isAESENC128KL(unsigned Opcode) { |
| return Opcode == AESENC128KL; |
| } |
| |
| bool isVPMAXUB(unsigned Opcode) { |
| switch (Opcode) { |
| case VPMAXUBYrm: |
| case VPMAXUBYrr: |
| case VPMAXUBZ128rm: |
| case VPMAXUBZ128rmk: |
| case VPMAXUBZ128rmkz: |
| case VPMAXUBZ128rr: |
| case VPMAXUBZ128rrk: |
| case VPMAXUBZ128rrkz: |
| case VPMAXUBZ256rm: |
| case VPMAXUBZ256rmk: |
| case VPMAXUBZ256rmkz: |
| case VPMAXUBZ256rr: |
| case VPMAXUBZ256rrk: |
| case VPMAXUBZ256rrkz: |
| case VPMAXUBZrm: |
| case VPMAXUBZrmk: |
| case VPMAXUBZrmkz: |
| case VPMAXUBZrr: |
| case VPMAXUBZrrk: |
| case VPMAXUBZrrkz: |
| case VPMAXUBrm: |
| case VPMAXUBrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isFMULP(unsigned Opcode) { |
| return Opcode == MUL_FPrST0; |
| } |
| |
| bool isVPMAXUD(unsigned Opcode) { |
| switch (Opcode) { |
| case VPMAXUDYrm: |
| case VPMAXUDYrr: |
| case VPMAXUDZ128rm: |
| case VPMAXUDZ128rmb: |
| case VPMAXUDZ128rmbk: |
| case VPMAXUDZ128rmbkz: |
| case VPMAXUDZ128rmk: |
| case VPMAXUDZ128rmkz: |
| case VPMAXUDZ128rr: |
| case VPMAXUDZ128rrk: |
| case VPMAXUDZ128rrkz: |
| case VPMAXUDZ256rm: |
| case VPMAXUDZ256rmb: |
| case VPMAXUDZ256rmbk: |
| case VPMAXUDZ256rmbkz: |
| case VPMAXUDZ256rmk: |
| case VPMAXUDZ256rmkz: |
| case VPMAXUDZ256rr: |
| case VPMAXUDZ256rrk: |
| case VPMAXUDZ256rrkz: |
| case VPMAXUDZrm: |
| case VPMAXUDZrmb: |
| case VPMAXUDZrmbk: |
| case VPMAXUDZrmbkz: |
| case VPMAXUDZrmk: |
| case VPMAXUDZrmkz: |
| case VPMAXUDZrr: |
| case VPMAXUDZrrk: |
| case VPMAXUDZrrkz: |
| case VPMAXUDrm: |
| case VPMAXUDrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isCMPCC(unsigned Opcode) { |
| switch (Opcode) { |
| case CMPCCXADDmr32: |
| case CMPCCXADDmr64: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVSHUFI32X4(unsigned Opcode) { |
| switch (Opcode) { |
| case VSHUFI32X4Z256rmbi: |
| case VSHUFI32X4Z256rmbik: |
| case VSHUFI32X4Z256rmbikz: |
| case VSHUFI32X4Z256rmi: |
| case VSHUFI32X4Z256rmik: |
| case VSHUFI32X4Z256rmikz: |
| case VSHUFI32X4Z256rri: |
| case VSHUFI32X4Z256rrik: |
| case VSHUFI32X4Z256rrikz: |
| case VSHUFI32X4Zrmbi: |
| case VSHUFI32X4Zrmbik: |
| case VSHUFI32X4Zrmbikz: |
| case VSHUFI32X4Zrmi: |
| case VSHUFI32X4Zrmik: |
| case VSHUFI32X4Zrmikz: |
| case VSHUFI32X4Zrri: |
| case VSHUFI32X4Zrrik: |
| case VSHUFI32X4Zrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isLOOPNE(unsigned Opcode) { |
| return Opcode == LOOPNE; |
| } |
| |
| bool isVPMAXUQ(unsigned Opcode) { |
| switch (Opcode) { |
| case VPMAXUQZ128rm: |
| case VPMAXUQZ128rmb: |
| case VPMAXUQZ128rmbk: |
| case VPMAXUQZ128rmbkz: |
| case VPMAXUQZ128rmk: |
| case VPMAXUQZ128rmkz: |
| case VPMAXUQZ128rr: |
| case VPMAXUQZ128rrk: |
| case VPMAXUQZ128rrkz: |
| case VPMAXUQZ256rm: |
| case VPMAXUQZ256rmb: |
| case VPMAXUQZ256rmbk: |
| case VPMAXUQZ256rmbkz: |
| case VPMAXUQZ256rmk: |
| case VPMAXUQZ256rmkz: |
| case VPMAXUQZ256rr: |
| case VPMAXUQZ256rrk: |
| case VPMAXUQZ256rrkz: |
| case VPMAXUQZrm: |
| case VPMAXUQZrmb: |
| case VPMAXUQZrmbk: |
| case VPMAXUQZrmbkz: |
| case VPMAXUQZrmk: |
| case VPMAXUQZrmkz: |
| case VPMAXUQZrr: |
| case VPMAXUQZrrk: |
| case VPMAXUQZrrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVCOMPRESSPD(unsigned Opcode) { |
| switch (Opcode) { |
| case VCOMPRESSPDZ128mr: |
| case VCOMPRESSPDZ128mrk: |
| case VCOMPRESSPDZ128rr: |
| case VCOMPRESSPDZ128rrk: |
| case VCOMPRESSPDZ128rrkz: |
| case VCOMPRESSPDZ256mr: |
| case VCOMPRESSPDZ256mrk: |
| case VCOMPRESSPDZ256rr: |
| case VCOMPRESSPDZ256rrk: |
| case VCOMPRESSPDZ256rrkz: |
| case VCOMPRESSPDZmr: |
| case VCOMPRESSPDZmrk: |
| case VCOMPRESSPDZrr: |
| case VCOMPRESSPDZrrk: |
| case VCOMPRESSPDZrrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPMAXUW(unsigned Opcode) { |
| switch (Opcode) { |
| case VPMAXUWYrm: |
| case VPMAXUWYrr: |
| case VPMAXUWZ128rm: |
| case VPMAXUWZ128rmk: |
| case VPMAXUWZ128rmkz: |
| case VPMAXUWZ128rr: |
| case VPMAXUWZ128rrk: |
| case VPMAXUWZ128rrkz: |
| case VPMAXUWZ256rm: |
| case VPMAXUWZ256rmk: |
| case VPMAXUWZ256rmkz: |
| case VPMAXUWZ256rr: |
| case VPMAXUWZ256rrk: |
| case VPMAXUWZ256rrkz: |
| case VPMAXUWZrm: |
| case VPMAXUWZrmk: |
| case VPMAXUWZrmkz: |
| case VPMAXUWZrr: |
| case VPMAXUWZrrk: |
| case VPMAXUWZrrkz: |
| case VPMAXUWrm: |
| case VPMAXUWrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPMOVB2M(unsigned Opcode) { |
| switch (Opcode) { |
| case VPMOVB2MZ128rr: |
| case VPMOVB2MZ256rr: |
| case VPMOVB2MZrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVANDPD(unsigned Opcode) { |
| switch (Opcode) { |
| case VANDPDYrm: |
| case VANDPDYrr: |
| case VANDPDZ128rm: |
| case VANDPDZ128rmb: |
| case VANDPDZ128rmbk: |
| case VANDPDZ128rmbkz: |
| case VANDPDZ128rmk: |
| case VANDPDZ128rmkz: |
| case VANDPDZ128rr: |
| case VANDPDZ128rrk: |
| case VANDPDZ128rrkz: |
| case VANDPDZ256rm: |
| case VANDPDZ256rmb: |
| case VANDPDZ256rmbk: |
| case VANDPDZ256rmbkz: |
| case VANDPDZ256rmk: |
| case VANDPDZ256rmkz: |
| case VANDPDZ256rr: |
| case VANDPDZ256rrk: |
| case VANDPDZ256rrkz: |
| case VANDPDZrm: |
| case VANDPDZrmb: |
| case VANDPDZrmbk: |
| case VANDPDZrmbkz: |
| case VANDPDZrmk: |
| case VANDPDZrmkz: |
| case VANDPDZrr: |
| case VANDPDZrrk: |
| case VANDPDZrrkz: |
| case VANDPDrm: |
| case VANDPDrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVCOMPRESSPS(unsigned Opcode) { |
| switch (Opcode) { |
| case VCOMPRESSPSZ128mr: |
| case VCOMPRESSPSZ128mrk: |
| case VCOMPRESSPSZ128rr: |
| case VCOMPRESSPSZ128rrk: |
| case VCOMPRESSPSZ128rrkz: |
| case VCOMPRESSPSZ256mr: |
| case VCOMPRESSPSZ256mrk: |
| case VCOMPRESSPSZ256rr: |
| case VCOMPRESSPSZ256rrk: |
| case VCOMPRESSPSZ256rrkz: |
| case VCOMPRESSPSZmr: |
| case VCOMPRESSPSZmrk: |
| case VCOMPRESSPSZrr: |
| case VCOMPRESSPSZrrk: |
| case VCOMPRESSPSZrrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPDPBSUD(unsigned Opcode) { |
| switch (Opcode) { |
| case VPDPBSUDYrm: |
| case VPDPBSUDYrr: |
| case VPDPBSUDrm: |
| case VPDPBSUDrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isPFRCPIT1(unsigned Opcode) { |
| switch (Opcode) { |
| case PFRCPIT1rm: |
| case PFRCPIT1rr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isPFRCPIT2(unsigned Opcode) { |
| switch (Opcode) { |
| case PFRCPIT2rm: |
| case PFRCPIT2rr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isWRPKRU(unsigned Opcode) { |
| return Opcode == WRPKRUr; |
| } |
| |
| bool isVANDPS(unsigned Opcode) { |
| switch (Opcode) { |
| case VANDPSYrm: |
| case VANDPSYrr: |
| case VANDPSZ128rm: |
| case VANDPSZ128rmb: |
| case VANDPSZ128rmbk: |
| case VANDPSZ128rmbkz: |
| case VANDPSZ128rmk: |
| case VANDPSZ128rmkz: |
| case VANDPSZ128rr: |
| case VANDPSZ128rrk: |
| case VANDPSZ128rrkz: |
| case VANDPSZ256rm: |
| case VANDPSZ256rmb: |
| case VANDPSZ256rmbk: |
| case VANDPSZ256rmbkz: |
| case VANDPSZ256rmk: |
| case VANDPSZ256rmkz: |
| case VANDPSZ256rr: |
| case VANDPSZ256rrk: |
| case VANDPSZ256rrkz: |
| case VANDPSZrm: |
| case VANDPSZrmb: |
| case VANDPSZrmbk: |
| case VANDPSZrmbkz: |
| case VANDPSZrmk: |
| case VANDPSZrmkz: |
| case VANDPSZrr: |
| case VANDPSZrrk: |
| case VANDPSZrrkz: |
| case VANDPSrm: |
| case VANDPSrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isWRUSSD(unsigned Opcode) { |
| return Opcode == WRUSSD; |
| } |
| |
| bool isVMPTRLD(unsigned Opcode) { |
| return Opcode == VMPTRLDm; |
| } |
| |
| bool isWRUSSQ(unsigned Opcode) { |
| return Opcode == WRUSSQ; |
| } |
| |
| bool isAESDECLAST(unsigned Opcode) { |
| switch (Opcode) { |
| case AESDECLASTrm: |
| case AESDECLASTrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isSYSCALL(unsigned Opcode) { |
| return Opcode == SYSCALL; |
| } |
| |
| bool isVFIXUPIMMSD(unsigned Opcode) { |
| switch (Opcode) { |
| case VFIXUPIMMSDZrmi: |
| case VFIXUPIMMSDZrmik: |
| case VFIXUPIMMSDZrmikz: |
| case VFIXUPIMMSDZrri: |
| case VFIXUPIMMSDZrrib: |
| case VFIXUPIMMSDZrribk: |
| case VFIXUPIMMSDZrribkz: |
| case VFIXUPIMMSDZrrik: |
| case VFIXUPIMMSDZrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPRORD(unsigned Opcode) { |
| switch (Opcode) { |
| case VPRORDZ128mbi: |
| case VPRORDZ128mbik: |
| case VPRORDZ128mbikz: |
| case VPRORDZ128mi: |
| case VPRORDZ128mik: |
| case VPRORDZ128mikz: |
| case VPRORDZ128ri: |
| case VPRORDZ128rik: |
| case VPRORDZ128rikz: |
| case VPRORDZ256mbi: |
| case VPRORDZ256mbik: |
| case VPRORDZ256mbikz: |
| case VPRORDZ256mi: |
| case VPRORDZ256mik: |
| case VPRORDZ256mikz: |
| case VPRORDZ256ri: |
| case VPRORDZ256rik: |
| case VPRORDZ256rikz: |
| case VPRORDZmbi: |
| case VPRORDZmbik: |
| case VPRORDZmbikz: |
| case VPRORDZmi: |
| case VPRORDZmik: |
| case VPRORDZmikz: |
| case VPRORDZri: |
| case VPRORDZrik: |
| case VPRORDZrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isTEST(unsigned Opcode) { |
| switch (Opcode) { |
| case TEST16i16: |
| case TEST16mi: |
| case TEST16mr: |
| case TEST16ri: |
| case TEST16rr: |
| case TEST32i32: |
| case TEST32mi: |
| case TEST32mr: |
| case TEST32ri: |
| case TEST32rr: |
| case TEST64i32: |
| case TEST64mi32: |
| case TEST64mr: |
| case TEST64ri32: |
| case TEST64rr: |
| case TEST8i8: |
| case TEST8mi: |
| case TEST8mr: |
| case TEST8ri: |
| case TEST8rr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isSHA1MSG1(unsigned Opcode) { |
| switch (Opcode) { |
| case SHA1MSG1rm: |
| case SHA1MSG1rr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isSHA1MSG2(unsigned Opcode) { |
| switch (Opcode) { |
| case SHA1MSG2rm: |
| case SHA1MSG2rr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVFMULCSH(unsigned Opcode) { |
| switch (Opcode) { |
| case VFMULCSHZrm: |
| case VFMULCSHZrmk: |
| case VFMULCSHZrmkz: |
| case VFMULCSHZrr: |
| case VFMULCSHZrrb: |
| case VFMULCSHZrrbk: |
| case VFMULCSHZrrbkz: |
| case VFMULCSHZrrk: |
| case VFMULCSHZrrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isMOVNTDQA(unsigned Opcode) { |
| return Opcode == MOVNTDQArm; |
| } |
| |
| bool isVFIXUPIMMSS(unsigned Opcode) { |
| switch (Opcode) { |
| case VFIXUPIMMSSZrmi: |
| case VFIXUPIMMSSZrmik: |
| case VFIXUPIMMSSZrmikz: |
| case VFIXUPIMMSSZrri: |
| case VFIXUPIMMSSZrrib: |
| case VFIXUPIMMSSZrribk: |
| case VFIXUPIMMSSZrribkz: |
| case VFIXUPIMMSSZrrik: |
| case VFIXUPIMMSSZrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isADOX(unsigned Opcode) { |
| switch (Opcode) { |
| case ADOX32rm: |
| case ADOX32rr: |
| case ADOX64rm: |
| case ADOX64rr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPRORQ(unsigned Opcode) { |
| switch (Opcode) { |
| case VPRORQZ128mbi: |
| case VPRORQZ128mbik: |
| case VPRORQZ128mbikz: |
| case VPRORQZ128mi: |
| case VPRORQZ128mik: |
| case VPRORQZ128mikz: |
| case VPRORQZ128ri: |
| case VPRORQZ128rik: |
| case VPRORQZ128rikz: |
| case VPRORQZ256mbi: |
| case VPRORQZ256mbik: |
| case VPRORQZ256mbikz: |
| case VPRORQZ256mi: |
| case VPRORQZ256mik: |
| case VPRORQZ256mikz: |
| case VPRORQZ256ri: |
| case VPRORQZ256rik: |
| case VPRORQZ256rikz: |
| case VPRORQZmbi: |
| case VPRORQZmbik: |
| case VPRORQZmbikz: |
| case VPRORQZmi: |
| case VPRORQZmik: |
| case VPRORQZmikz: |
| case VPRORQZri: |
| case VPRORQZrik: |
| case VPRORQZrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVSCATTERPF1DPD(unsigned Opcode) { |
| return Opcode == VSCATTERPF1DPDm; |
| } |
| |
| bool isVPSRLDQ(unsigned Opcode) { |
| switch (Opcode) { |
| case VPSRLDQYri: |
| case VPSRLDQZ128mi: |
| case VPSRLDQZ128ri: |
| case VPSRLDQZ256mi: |
| case VPSRLDQZ256ri: |
| case VPSRLDQZmi: |
| case VPSRLDQZri: |
| case VPSRLDQri: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPMOVUSWB(unsigned Opcode) { |
| switch (Opcode) { |
| case VPMOVUSWBZ128mr: |
| case VPMOVUSWBZ128mrk: |
| case VPMOVUSWBZ128rr: |
| case VPMOVUSWBZ128rrk: |
| case VPMOVUSWBZ128rrkz: |
| case VPMOVUSWBZ256mr: |
| case VPMOVUSWBZ256mrk: |
| case VPMOVUSWBZ256rr: |
| case VPMOVUSWBZ256rrk: |
| case VPMOVUSWBZ256rrkz: |
| case VPMOVUSWBZmr: |
| case VPMOVUSWBZmrk: |
| case VPMOVUSWBZrr: |
| case VPMOVUSWBZrrk: |
| case VPMOVUSWBZrrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVSCATTERPF1DPS(unsigned Opcode) { |
| return Opcode == VSCATTERPF1DPSm; |
| } |
| |
| bool isFICOMP(unsigned Opcode) { |
| switch (Opcode) { |
| case FICOMP16m: |
| case FICOMP32m: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isFBSTP(unsigned Opcode) { |
| return Opcode == FBSTPm; |
| } |
| |
| bool isVPSHUFLW(unsigned Opcode) { |
| switch (Opcode) { |
| case VPSHUFLWYmi: |
| case VPSHUFLWYri: |
| case VPSHUFLWZ128mi: |
| case VPSHUFLWZ128mik: |
| case VPSHUFLWZ128mikz: |
| case VPSHUFLWZ128ri: |
| case VPSHUFLWZ128rik: |
| case VPSHUFLWZ128rikz: |
| case VPSHUFLWZ256mi: |
| case VPSHUFLWZ256mik: |
| case VPSHUFLWZ256mikz: |
| case VPSHUFLWZ256ri: |
| case VPSHUFLWZ256rik: |
| case VPSHUFLWZ256rikz: |
| case VPSHUFLWZmi: |
| case VPSHUFLWZmik: |
| case VPSHUFLWZmikz: |
| case VPSHUFLWZri: |
| case VPSHUFLWZrik: |
| case VPSHUFLWZrikz: |
| case VPSHUFLWmi: |
| case VPSHUFLWri: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPSCATTERDD(unsigned Opcode) { |
| switch (Opcode) { |
| case VPSCATTERDDZ128mr: |
| case VPSCATTERDDZ256mr: |
| case VPSCATTERDDZmr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isFNINIT(unsigned Opcode) { |
| return Opcode == FNINIT; |
| } |
| |
| bool isMOVNTPD(unsigned Opcode) { |
| return Opcode == MOVNTPDmr; |
| } |
| |
| bool isUIRET(unsigned Opcode) { |
| return Opcode == UIRET; |
| } |
| |
| bool isPINSRB(unsigned Opcode) { |
| switch (Opcode) { |
| case PINSRBrm: |
| case PINSRBrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isPINSRD(unsigned Opcode) { |
| switch (Opcode) { |
| case PINSRDrm: |
| case PINSRDrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isSHRD(unsigned Opcode) { |
| switch (Opcode) { |
| case SHRD16mrCL: |
| case SHRD16mri8: |
| case SHRD16rrCL: |
| case SHRD16rri8: |
| case SHRD32mrCL: |
| case SHRD32mri8: |
| case SHRD32rrCL: |
| case SHRD32rri8: |
| case SHRD64mrCL: |
| case SHRD64mri8: |
| case SHRD64rrCL: |
| case SHRD64rri8: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPSCATTERDQ(unsigned Opcode) { |
| switch (Opcode) { |
| case VPSCATTERDQZ128mr: |
| case VPSCATTERDQZ256mr: |
| case VPSCATTERDQZmr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isMOVNTPS(unsigned Opcode) { |
| return Opcode == MOVNTPSmr; |
| } |
| |
| bool isVGETEXPPD(unsigned Opcode) { |
| switch (Opcode) { |
| case VGETEXPPDZ128m: |
| case VGETEXPPDZ128mb: |
| case VGETEXPPDZ128mbk: |
| case VGETEXPPDZ128mbkz: |
| case VGETEXPPDZ128mk: |
| case VGETEXPPDZ128mkz: |
| case VGETEXPPDZ128r: |
| case VGETEXPPDZ128rk: |
| case VGETEXPPDZ128rkz: |
| case VGETEXPPDZ256m: |
| case VGETEXPPDZ256mb: |
| case VGETEXPPDZ256mbk: |
| case VGETEXPPDZ256mbkz: |
| case VGETEXPPDZ256mk: |
| case VGETEXPPDZ256mkz: |
| case VGETEXPPDZ256r: |
| case VGETEXPPDZ256rk: |
| case VGETEXPPDZ256rkz: |
| case VGETEXPPDZm: |
| case VGETEXPPDZmb: |
| case VGETEXPPDZmbk: |
| case VGETEXPPDZmbkz: |
| case VGETEXPPDZmk: |
| case VGETEXPPDZmkz: |
| case VGETEXPPDZr: |
| case VGETEXPPDZrb: |
| case VGETEXPPDZrbk: |
| case VGETEXPPDZrbkz: |
| case VGETEXPPDZrk: |
| case VGETEXPPDZrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVRANGEPD(unsigned Opcode) { |
| switch (Opcode) { |
| case VRANGEPDZ128rmbi: |
| case VRANGEPDZ128rmbik: |
| case VRANGEPDZ128rmbikz: |
| case VRANGEPDZ128rmi: |
| case VRANGEPDZ128rmik: |
| case VRANGEPDZ128rmikz: |
| case VRANGEPDZ128rri: |
| case VRANGEPDZ128rrik: |
| case VRANGEPDZ128rrikz: |
| case VRANGEPDZ256rmbi: |
| case VRANGEPDZ256rmbik: |
| case VRANGEPDZ256rmbikz: |
| case VRANGEPDZ256rmi: |
| case VRANGEPDZ256rmik: |
| case VRANGEPDZ256rmikz: |
| case VRANGEPDZ256rri: |
| case VRANGEPDZ256rrik: |
| case VRANGEPDZ256rrikz: |
| case VRANGEPDZrmbi: |
| case VRANGEPDZrmbik: |
| case VRANGEPDZrmbikz: |
| case VRANGEPDZrmi: |
| case VRANGEPDZrmik: |
| case VRANGEPDZrmikz: |
| case VRANGEPDZrri: |
| case VRANGEPDZrrib: |
| case VRANGEPDZrribk: |
| case VRANGEPDZrribkz: |
| case VRANGEPDZrrik: |
| case VRANGEPDZrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isPFRCP(unsigned Opcode) { |
| switch (Opcode) { |
| case PFRCPrm: |
| case PFRCPrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVGETEXPPH(unsigned Opcode) { |
| switch (Opcode) { |
| case VGETEXPPHZ128m: |
| case VGETEXPPHZ128mb: |
| case VGETEXPPHZ128mbk: |
| case VGETEXPPHZ128mbkz: |
| case VGETEXPPHZ128mk: |
| case VGETEXPPHZ128mkz: |
| case VGETEXPPHZ128r: |
| case VGETEXPPHZ128rk: |
| case VGETEXPPHZ128rkz: |
| case VGETEXPPHZ256m: |
| case VGETEXPPHZ256mb: |
| case VGETEXPPHZ256mbk: |
| case VGETEXPPHZ256mbkz: |
| case VGETEXPPHZ256mk: |
| case VGETEXPPHZ256mkz: |
| case VGETEXPPHZ256r: |
| case VGETEXPPHZ256rk: |
| case VGETEXPPHZ256rkz: |
| case VGETEXPPHZm: |
| case VGETEXPPHZmb: |
| case VGETEXPPHZmbk: |
| case VGETEXPPHZmbkz: |
| case VGETEXPPHZmk: |
| case VGETEXPPHZmkz: |
| case VGETEXPPHZr: |
| case VGETEXPPHZrb: |
| case VGETEXPPHZrbk: |
| case VGETEXPPHZrbkz: |
| case VGETEXPPHZrk: |
| case VGETEXPPHZrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isPINSRQ(unsigned Opcode) { |
| switch (Opcode) { |
| case PINSRQrm: |
| case PINSRQrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPROTB(unsigned Opcode) { |
| switch (Opcode) { |
| case VPROTBmi: |
| case VPROTBmr: |
| case VPROTBri: |
| case VPROTBrm: |
| case VPROTBrr: |
| case VPROTBrr_REV: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPROTD(unsigned Opcode) { |
| switch (Opcode) { |
| case VPROTDmi: |
| case VPROTDmr: |
| case VPROTDri: |
| case VPROTDrm: |
| case VPROTDrr: |
| case VPROTDrr_REV: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isSEAMCALL(unsigned Opcode) { |
| return Opcode == SEAMCALL; |
| } |
| |
| bool isPINSRW(unsigned Opcode) { |
| switch (Opcode) { |
| case MMX_PINSRWrm: |
| case MMX_PINSRWrr: |
| case PINSRWrm: |
| case PINSRWrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isSHRX(unsigned Opcode) { |
| switch (Opcode) { |
| case SHRX32rm: |
| case SHRX32rr: |
| case SHRX64rm: |
| case SHRX64rr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVGETEXPPS(unsigned Opcode) { |
| switch (Opcode) { |
| case VGETEXPPSZ128m: |
| case VGETEXPPSZ128mb: |
| case VGETEXPPSZ128mbk: |
| case VGETEXPPSZ128mbkz: |
| case VGETEXPPSZ128mk: |
| case VGETEXPPSZ128mkz: |
| case VGETEXPPSZ128r: |
| case VGETEXPPSZ128rk: |
| case VGETEXPPSZ128rkz: |
| case VGETEXPPSZ256m: |
| case VGETEXPPSZ256mb: |
| case VGETEXPPSZ256mbk: |
| case VGETEXPPSZ256mbkz: |
| case VGETEXPPSZ256mk: |
| case VGETEXPPSZ256mkz: |
| case VGETEXPPSZ256r: |
| case VGETEXPPSZ256rk: |
| case VGETEXPPSZ256rkz: |
| case VGETEXPPSZm: |
| case VGETEXPPSZmb: |
| case VGETEXPPSZmbk: |
| case VGETEXPPSZmbkz: |
| case VGETEXPPSZmk: |
| case VGETEXPPSZmkz: |
| case VGETEXPPSZr: |
| case VGETEXPPSZrb: |
| case VGETEXPPSZrbk: |
| case VGETEXPPSZrbkz: |
| case VGETEXPPSZrk: |
| case VGETEXPPSZrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVRANGEPS(unsigned Opcode) { |
| switch (Opcode) { |
| case VRANGEPSZ128rmbi: |
| case VRANGEPSZ128rmbik: |
| case VRANGEPSZ128rmbikz: |
| case VRANGEPSZ128rmi: |
| case VRANGEPSZ128rmik: |
| case VRANGEPSZ128rmikz: |
| case VRANGEPSZ128rri: |
| case VRANGEPSZ128rrik: |
| case VRANGEPSZ128rrikz: |
| case VRANGEPSZ256rmbi: |
| case VRANGEPSZ256rmbik: |
| case VRANGEPSZ256rmbikz: |
| case VRANGEPSZ256rmi: |
| case VRANGEPSZ256rmik: |
| case VRANGEPSZ256rmikz: |
| case VRANGEPSZ256rri: |
| case VRANGEPSZ256rrik: |
| case VRANGEPSZ256rrikz: |
| case VRANGEPSZrmbi: |
| case VRANGEPSZrmbik: |
| case VRANGEPSZrmbikz: |
| case VRANGEPSZrmi: |
| case VRANGEPSZrmik: |
| case VRANGEPSZrmikz: |
| case VRANGEPSZrri: |
| case VRANGEPSZrrib: |
| case VRANGEPSZrribk: |
| case VRANGEPSZrribkz: |
| case VRANGEPSZrrik: |
| case VRANGEPSZrrikz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isPABSB(unsigned Opcode) { |
| switch (Opcode) { |
| case MMX_PABSBrm: |
| case MMX_PABSBrr: |
| case PABSBrm: |
| case PABSBrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isPABSD(unsigned Opcode) { |
| switch (Opcode) { |
| case MMX_PABSDrm: |
| case MMX_PABSDrr: |
| case PABSDrm: |
| case PABSDrr: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPROTQ(unsigned Opcode) { |
| switch (Opcode) { |
| case VPROTQmi: |
| case VPROTQmr: |
| case VPROTQri: |
| case VPROTQrm: |
| case VPROTQrr: |
| case VPROTQrr_REV: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVPROTW(unsigned Opcode) { |
| switch (Opcode) { |
| case VPROTWmi: |
| case VPROTWmr: |
| case VPROTWri: |
| case VPROTWrm: |
| case VPROTWrr: |
| case VPROTWrr_REV: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isVCVTTPS2UDQ(unsigned Opcode) { |
| switch (Opcode) { |
| case VCVTTPS2UDQZ128rm: |
| case VCVTTPS2UDQZ128rmb: |
| case VCVTTPS2UDQZ128rmbk: |
| case VCVTTPS2UDQZ128rmbkz: |
| case VCVTTPS2UDQZ128rmk: |
| case VCVTTPS2UDQZ128rmkz: |
| case VCVTTPS2UDQZ128rr: |
| case VCVTTPS2UDQZ128rrk: |
| case VCVTTPS2UDQZ128rrkz: |
| case VCVTTPS2UDQZ256rm: |
| case VCVTTPS2UDQZ256rmb: |
| case VCVTTPS2UDQZ256rmbk: |
| case VCVTTPS2UDQZ256rmbkz: |
| case VCVTTPS2UDQZ256rmk: |
| case VCVTTPS2UDQZ256rmkz: |
| case VCVTTPS2UDQZ256rr: |
| case VCVTTPS2UDQZ256rrk: |
| case VCVTTPS2UDQZ256rrkz: |
| case VCVTTPS2UDQZrm: |
| case VCVTTPS2UDQZrmb: |
| case VCVTTPS2UDQZrmbk: |
| case VCVTTPS2UDQZrmbkz: |
| case VCVTTPS2UDQZrmk: |
| case VCVTTPS2UDQZrmkz: |
| case VCVTTPS2UDQZrr: |
| case VCVTTPS2UDQZrrb: |
| case VCVTTPS2UDQZrrbk: |
| case VCVTTPS2UDQZrrbkz: |
| case VCVTTPS2UDQZrrk: |
| case VCVTTPS2UDQZrrkz: |
| return true; |
| } |
| return false; |
| } |
| |
| bool isFXRSTOR(unsigned Opcode) { |
| return Opcode == FXRSTOR; |
| } |
| |
| bool isVMOVDQU16(unsigned Opcode) { |
| switch (Opcode) { |
| case VMOVDQU16Z128mr: |
| case VMOVDQU16Z128mrk: |
| case VMOVDQU16Z128rm: |
| case VMOVDQU16Z128rmk: |
| case VMOVDQU16Z128rmkz: |
| case VMOVDQU16Z128rr: |
| case VMOVDQU16Z128rr_REV: |
| case VMOVDQU16Z128rrk: |
| case VMOVDQU16Z128rrk_REV: |
| |
