| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| |* *| |
| |* Global Instruction Selector for the X86 target *| |
| |* *| |
| |* Automatically generated file, do not edit! *| |
| |* *| |
| \*===----------------------------------------------------------------------===*/ |
| |
| #ifdef GET_GLOBALISEL_PREDICATE_BITSET |
| const unsigned MAX_SUBTARGET_PREDICATES = 133; |
| using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>; |
| #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET |
| |
| #ifdef GET_GLOBALISEL_TEMPORARIES_DECL |
| mutable MatcherState State; |
| typedef ComplexRendererFns(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const; |
| typedef void(X86InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const; |
| const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ISelInfo; |
| static X86InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[]; |
| static X86InstructionSelector::CustomRendererFn CustomRenderers[]; |
| bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override; |
| bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override; |
| bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override; |
| const int64_t *getMatchTable() const override; |
| bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const std::array<const MachineOperand *, 3> &Operands) const override; |
| #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL |
| |
| #ifdef GET_GLOBALISEL_TEMPORARIES_INIT |
| , State(0), |
| ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers) |
| #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT |
| |
| #ifdef GET_GLOBALISEL_IMPL |
| // Bits for subtarget features that participate in instruction matching. |
| enum SubtargetFeatureBits : uint8_t { |
| Feature_TruePredicateBit = 54, |
| Feature_HasCMOVBit = 23, |
| Feature_NoCMOVBit = 120, |
| Feature_HasMMXBit = 95, |
| Feature_Has3DNowBit = 97, |
| Feature_HasSSE1Bit = 40, |
| Feature_UseSSE1Bit = 47, |
| Feature_HasSSE2Bit = 39, |
| Feature_UseSSE2Bit = 48, |
| Feature_HasSSE3Bit = 31, |
| Feature_UseSSE3Bit = 57, |
| Feature_HasSSSE3Bit = 96, |
| Feature_UseSSSE3Bit = 58, |
| Feature_UseSSE41Bit = 55, |
| Feature_UseSSE42Bit = 61, |
| Feature_HasSSE4ABit = 71, |
| Feature_NoAVXBit = 67, |
| Feature_HasAVXBit = 49, |
| Feature_HasAVX2Bit = 43, |
| Feature_HasAVX1OnlyBit = 41, |
| Feature_HasAVX512Bit = 80, |
| Feature_UseAVXBit = 45, |
| Feature_NoAVX512Bit = 36, |
| Feature_HasCDIBit = 84, |
| Feature_HasVPOPCNTDQBit = 89, |
| Feature_HasERIBit = 88, |
| Feature_HasDQIBit = 82, |
| Feature_NoDQIBit = 59, |
| Feature_HasBWIBit = 83, |
| Feature_NoBWIBit = 56, |
| Feature_HasVLXBit = 81, |
| Feature_NoVLXBit = 35, |
| Feature_NoVLX_Or_NoBWIBit = 53, |
| Feature_HasVNNIBit = 91, |
| Feature_HasVP2INTERSECTBit = 93, |
| Feature_HasBF16Bit = 94, |
| Feature_HasFP16Bit = 86, |
| Feature_HasAVXVNNIINT8Bit = 78, |
| Feature_HasAVXVNNIBit = 72, |
| Feature_NoVLX_Or_NoVNNIBit = 73, |
| Feature_HasBITALGBit = 92, |
| Feature_HasPOPCNTBit = 60, |
| Feature_HasAESBit = 64, |
| Feature_HasVAESBit = 66, |
| Feature_NoVLX_Or_NoVAESBit = 65, |
| Feature_HasFXSRBit = 32, |
| Feature_HasX87Bit = 30, |
| Feature_HasXSAVEBit = 109, |
| Feature_HasXSAVEOPTBit = 110, |
| Feature_HasXSAVECBit = 111, |
| Feature_HasXSAVESBit = 112, |
| Feature_HasPCLMULBit = 68, |
| Feature_NoVLX_Or_NoVPCLMULQDQBit = 69, |
| Feature_HasVPCLMULQDQBit = 70, |
| Feature_HasGFNIBit = 75, |
| Feature_HasFMABit = 33, |
| Feature_HasFMA4Bit = 37, |
| Feature_NoFMA4Bit = 34, |
| Feature_HasXOPBit = 38, |
| Feature_HasTBMBit = 8, |
| Feature_NoTBMBit = 125, |
| Feature_HasLWPBit = 9, |
| Feature_HasMOVBEBit = 2, |
| Feature_HasRDRANDBit = 3, |
| Feature_HasF16CBit = 74, |
| Feature_HasFSGSBaseBit = 113, |
| Feature_HasLZCNTBit = 5, |
| Feature_HasBMIBit = 6, |
| Feature_HasBMI2Bit = 7, |
| Feature_NoBMI2Bit = 124, |
| Feature_HasVBMIBit = 85, |
| Feature_HasVBMI2Bit = 90, |
| Feature_HasIFMABit = 87, |
| Feature_HasAVXIFMABit = 76, |
| Feature_NoVLX_Or_NoIFMABit = 77, |
| Feature_HasRTMBit = 101, |
| Feature_HasSHABit = 63, |
| Feature_HasRDSEEDBit = 4, |
| Feature_HasSSEPrefetchBit = 50, |
| Feature_NoSSEPrefetchBit = 98, |
| Feature_HasPREFETCHIBit = 17, |
| Feature_HasPrefetchWBit = 99, |
| Feature_HasPREFETCHWT1Bit = 100, |
| Feature_HasMWAITXBit = 123, |
| Feature_HasCLDEMOTEBit = 21, |
| Feature_HasMOVDIRIBit = 11, |
| Feature_HasMOVDIR64BBit = 12, |
| Feature_HasPTWRITEBit = 116, |
| Feature_FPStackf32Bit = 28, |
| Feature_FPStackf64Bit = 29, |
| Feature_HasCLFLUSHBit = 51, |
| Feature_HasCLFLUSHOPTBit = 19, |
| Feature_HasCLWBBit = 20, |
| Feature_HasWBNOINVDBit = 108, |
| Feature_HasRDPIDBit = 115, |
| Feature_HasWAITPKGBit = 10, |
| Feature_HasINVPCIDBit = 114, |
| Feature_HasCX8Bit = 121, |
| Feature_HasCX16Bit = 122, |
| Feature_HasENQCMDBit = 13, |
| Feature_HasAMXFP16Bit = 106, |
| Feature_HasCMPCCXADDBit = 18, |
| Feature_HasAVXNECONVERTBit = 79, |
| Feature_HasKLBit = 102, |
| Feature_HasRAOINTBit = 107, |
| Feature_HasSERIALIZEBit = 14, |
| Feature_HasTSXLDTRKBit = 15, |
| Feature_HasAMXTILEBit = 103, |
| Feature_HasAMXBF16Bit = 105, |
| Feature_HasAMXINT8Bit = 104, |
| Feature_HasUINTRBit = 16, |
| Feature_HasCRC32Bit = 62, |
| Feature_Not64BitModeBit = 0, |
| Feature_In64BitModeBit = 1, |
| Feature_IsLP64Bit = 118, |
| Feature_NotLP64Bit = 117, |
| Feature_NotWin64WithoutFPBit = 119, |
| Feature_IsPSBit = 128, |
| Feature_NotPSBit = 127, |
| Feature_KernelCodeBit = 129, |
| Feature_NearDataBit = 131, |
| Feature_IsNotPICBit = 130, |
| Feature_OptForSizeBit = 44, |
| Feature_OptForMinSizeBit = 42, |
| Feature_OptForSpeedBit = 126, |
| Feature_UseIncDecBit = 22, |
| Feature_NoSSE41_Or_OptForSizeBit = 46, |
| Feature_CallImmAddrBit = 132, |
| Feature_FavorMemIndirectCallBit = 24, |
| Feature_HasFastSHLDRotateBit = 27, |
| Feature_HasMFenceBit = 52, |
| Feature_UseIndirectThunkCallsBit = 26, |
| Feature_NotUseIndirectThunkCallsBit = 25, |
| }; |
| |
| PredicateBitset X86InstructionSelector:: |
| computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const { |
| PredicateBitset Features; |
| if (true) |
| Features.set(Feature_TruePredicateBit); |
| if (Subtarget->canUseCMOV()) |
| Features.set(Feature_HasCMOVBit); |
| if (!Subtarget->canUseCMOV()) |
| Features.set(Feature_NoCMOVBit); |
| if (Subtarget->hasMMX()) |
| Features.set(Feature_HasMMXBit); |
| if (Subtarget->hasThreeDNow()) |
| Features.set(Feature_Has3DNowBit); |
| if (Subtarget->hasSSE1()) |
| Features.set(Feature_HasSSE1Bit); |
| if (Subtarget->hasSSE1() && !Subtarget->hasAVX()) |
| Features.set(Feature_UseSSE1Bit); |
| if (Subtarget->hasSSE2()) |
| Features.set(Feature_HasSSE2Bit); |
| if (Subtarget->hasSSE2() && !Subtarget->hasAVX()) |
| Features.set(Feature_UseSSE2Bit); |
| if (Subtarget->hasSSE3()) |
| Features.set(Feature_HasSSE3Bit); |
| if (Subtarget->hasSSE3() && !Subtarget->hasAVX()) |
| Features.set(Feature_UseSSE3Bit); |
| if (Subtarget->hasSSSE3()) |
| Features.set(Feature_HasSSSE3Bit); |
| if (Subtarget->hasSSSE3() && !Subtarget->hasAVX()) |
| Features.set(Feature_UseSSSE3Bit); |
| if (Subtarget->hasSSE41() && !Subtarget->hasAVX()) |
| Features.set(Feature_UseSSE41Bit); |
| if (Subtarget->hasSSE42() && !Subtarget->hasAVX()) |
| Features.set(Feature_UseSSE42Bit); |
| if (Subtarget->hasSSE4A()) |
| Features.set(Feature_HasSSE4ABit); |
| if (!Subtarget->hasAVX()) |
| Features.set(Feature_NoAVXBit); |
| if (Subtarget->hasAVX()) |
| Features.set(Feature_HasAVXBit); |
| if (Subtarget->hasAVX2()) |
| Features.set(Feature_HasAVX2Bit); |
| if (Subtarget->hasAVX() && !Subtarget->hasAVX2()) |
| Features.set(Feature_HasAVX1OnlyBit); |
| if (Subtarget->hasAVX512()) |
| Features.set(Feature_HasAVX512Bit); |
| if (Subtarget->hasAVX() && !Subtarget->hasAVX512()) |
| Features.set(Feature_UseAVXBit); |
| if (!Subtarget->hasAVX512()) |
| Features.set(Feature_NoAVX512Bit); |
| if (Subtarget->hasCDI()) |
| Features.set(Feature_HasCDIBit); |
| if (Subtarget->hasVPOPCNTDQ()) |
| Features.set(Feature_HasVPOPCNTDQBit); |
| if (Subtarget->hasERI()) |
| Features.set(Feature_HasERIBit); |
| if (Subtarget->hasDQI()) |
| Features.set(Feature_HasDQIBit); |
| if (!Subtarget->hasDQI()) |
| Features.set(Feature_NoDQIBit); |
| if (Subtarget->hasBWI()) |
| Features.set(Feature_HasBWIBit); |
| if (!Subtarget->hasBWI()) |
| Features.set(Feature_NoBWIBit); |
| if (Subtarget->hasVLX()) |
| Features.set(Feature_HasVLXBit); |
| if (!Subtarget->hasVLX()) |
| Features.set(Feature_NoVLXBit); |
| if (!Subtarget->hasVLX() || !Subtarget->hasBWI()) |
| Features.set(Feature_NoVLX_Or_NoBWIBit); |
| if (Subtarget->hasVNNI()) |
| Features.set(Feature_HasVNNIBit); |
| if (Subtarget->hasVP2INTERSECT()) |
| Features.set(Feature_HasVP2INTERSECTBit); |
| if (Subtarget->hasBF16()) |
| Features.set(Feature_HasBF16Bit); |
| if (Subtarget->hasFP16()) |
| Features.set(Feature_HasFP16Bit); |
| if (Subtarget->hasAVXVNNIINT8()) |
| Features.set(Feature_HasAVXVNNIINT8Bit); |
| if (Subtarget->hasAVXVNNI()) |
| Features.set(Feature_HasAVXVNNIBit); |
| if (!Subtarget->hasVLX() || !Subtarget->hasVNNI()) |
| Features.set(Feature_NoVLX_Or_NoVNNIBit); |
| if (Subtarget->hasBITALG()) |
| Features.set(Feature_HasBITALGBit); |
| if (Subtarget->hasPOPCNT()) |
| Features.set(Feature_HasPOPCNTBit); |
| if (Subtarget->hasAES()) |
| Features.set(Feature_HasAESBit); |
| if (Subtarget->hasVAES()) |
| Features.set(Feature_HasVAESBit); |
| if (!Subtarget->hasVLX() || !Subtarget->hasVAES()) |
| Features.set(Feature_NoVLX_Or_NoVAESBit); |
| if (Subtarget->hasFXSR()) |
| Features.set(Feature_HasFXSRBit); |
| if (Subtarget->hasX87()) |
| Features.set(Feature_HasX87Bit); |
| if (Subtarget->hasXSAVE()) |
| Features.set(Feature_HasXSAVEBit); |
| if (Subtarget->hasXSAVEOPT()) |
| Features.set(Feature_HasXSAVEOPTBit); |
| if (Subtarget->hasXSAVEC()) |
| Features.set(Feature_HasXSAVECBit); |
| if (Subtarget->hasXSAVES()) |
| Features.set(Feature_HasXSAVESBit); |
| if (Subtarget->hasPCLMUL()) |
| Features.set(Feature_HasPCLMULBit); |
| if (!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ()) |
| Features.set(Feature_NoVLX_Or_NoVPCLMULQDQBit); |
| if (Subtarget->hasVPCLMULQDQ()) |
| Features.set(Feature_HasVPCLMULQDQBit); |
| if (Subtarget->hasGFNI()) |
| Features.set(Feature_HasGFNIBit); |
| if (Subtarget->hasFMA()) |
| Features.set(Feature_HasFMABit); |
| if (Subtarget->hasFMA4()) |
| Features.set(Feature_HasFMA4Bit); |
| if (!Subtarget->hasFMA4()) |
| Features.set(Feature_NoFMA4Bit); |
| if (Subtarget->hasXOP()) |
| Features.set(Feature_HasXOPBit); |
| if (Subtarget->hasTBM()) |
| Features.set(Feature_HasTBMBit); |
| if (!Subtarget->hasTBM()) |
| Features.set(Feature_NoTBMBit); |
| if (Subtarget->hasLWP()) |
| Features.set(Feature_HasLWPBit); |
| if (Subtarget->hasMOVBE()) |
| Features.set(Feature_HasMOVBEBit); |
| if (Subtarget->hasRDRAND()) |
| Features.set(Feature_HasRDRANDBit); |
| if (Subtarget->hasF16C()) |
| Features.set(Feature_HasF16CBit); |
| if (Subtarget->hasFSGSBase()) |
| Features.set(Feature_HasFSGSBaseBit); |
| if (Subtarget->hasLZCNT()) |
| Features.set(Feature_HasLZCNTBit); |
| if (Subtarget->hasBMI()) |
| Features.set(Feature_HasBMIBit); |
| if (Subtarget->hasBMI2()) |
| Features.set(Feature_HasBMI2Bit); |
| if (!Subtarget->hasBMI2()) |
| Features.set(Feature_NoBMI2Bit); |
| if (Subtarget->hasVBMI()) |
| Features.set(Feature_HasVBMIBit); |
| if (Subtarget->hasVBMI2()) |
| Features.set(Feature_HasVBMI2Bit); |
| if (Subtarget->hasIFMA()) |
| Features.set(Feature_HasIFMABit); |
| if (Subtarget->hasAVXIFMA()) |
| Features.set(Feature_HasAVXIFMABit); |
| if (!Subtarget->hasVLX() || !Subtarget->hasIFMA()) |
| Features.set(Feature_NoVLX_Or_NoIFMABit); |
| if (Subtarget->hasRTM()) |
| Features.set(Feature_HasRTMBit); |
| if (Subtarget->hasSHA()) |
| Features.set(Feature_HasSHABit); |
| if (Subtarget->hasRDSEED()) |
| Features.set(Feature_HasRDSEEDBit); |
| if (Subtarget->hasSSEPrefetch()) |
| Features.set(Feature_HasSSEPrefetchBit); |
| if (!Subtarget->hasSSEPrefetch()) |
| Features.set(Feature_NoSSEPrefetchBit); |
| if (Subtarget->hasPREFETCHI()) |
| Features.set(Feature_HasPREFETCHIBit); |
| if (Subtarget->hasPrefetchW()) |
| Features.set(Feature_HasPrefetchWBit); |
| if (Subtarget->hasPREFETCHWT1()) |
| Features.set(Feature_HasPREFETCHWT1Bit); |
| if (Subtarget->hasMWAITX()) |
| Features.set(Feature_HasMWAITXBit); |
| if (Subtarget->hasCLDEMOTE()) |
| Features.set(Feature_HasCLDEMOTEBit); |
| if (Subtarget->hasMOVDIRI()) |
| Features.set(Feature_HasMOVDIRIBit); |
| if (Subtarget->hasMOVDIR64B()) |
| Features.set(Feature_HasMOVDIR64BBit); |
| if (Subtarget->hasPTWRITE()) |
| Features.set(Feature_HasPTWRITEBit); |
| if (!Subtarget->hasSSE1()) |
| Features.set(Feature_FPStackf32Bit); |
| if (!Subtarget->hasSSE2()) |
| Features.set(Feature_FPStackf64Bit); |
| if (Subtarget->hasCLFLUSH()) |
| Features.set(Feature_HasCLFLUSHBit); |
| if (Subtarget->hasCLFLUSHOPT()) |
| Features.set(Feature_HasCLFLUSHOPTBit); |
| if (Subtarget->hasCLWB()) |
| Features.set(Feature_HasCLWBBit); |
| if (Subtarget->hasWBNOINVD()) |
| Features.set(Feature_HasWBNOINVDBit); |
| if (Subtarget->hasRDPID()) |
| Features.set(Feature_HasRDPIDBit); |
| if (Subtarget->hasWAITPKG()) |
| Features.set(Feature_HasWAITPKGBit); |
| if (Subtarget->hasINVPCID()) |
| Features.set(Feature_HasINVPCIDBit); |
| if (Subtarget->hasCX8()) |
| Features.set(Feature_HasCX8Bit); |
| if (Subtarget->hasCX16()) |
| Features.set(Feature_HasCX16Bit); |
| if (Subtarget->hasENQCMD()) |
| Features.set(Feature_HasENQCMDBit); |
| if (Subtarget->hasAMXFP16()) |
| Features.set(Feature_HasAMXFP16Bit); |
| if (Subtarget->hasCMPCCXADD()) |
| Features.set(Feature_HasCMPCCXADDBit); |
| if (Subtarget->hasAVXNECONVERT()) |
| Features.set(Feature_HasAVXNECONVERTBit); |
| if (Subtarget->hasKL()) |
| Features.set(Feature_HasKLBit); |
| if (Subtarget->hasRAOINT()) |
| Features.set(Feature_HasRAOINTBit); |
| if (Subtarget->hasSERIALIZE()) |
| Features.set(Feature_HasSERIALIZEBit); |
| if (Subtarget->hasTSXLDTRK()) |
| Features.set(Feature_HasTSXLDTRKBit); |
| if (Subtarget->hasAMXTILE()) |
| Features.set(Feature_HasAMXTILEBit); |
| if (Subtarget->hasAMXBF16()) |
| Features.set(Feature_HasAMXBF16Bit); |
| if (Subtarget->hasAMXINT8()) |
| Features.set(Feature_HasAMXINT8Bit); |
| if (Subtarget->hasUINTR()) |
| Features.set(Feature_HasUINTRBit); |
| if (Subtarget->hasCRC32()) |
| Features.set(Feature_HasCRC32Bit); |
| if (!Subtarget->is64Bit()) |
| Features.set(Feature_Not64BitModeBit); |
| if (Subtarget->is64Bit()) |
| Features.set(Feature_In64BitModeBit); |
| if (Subtarget->isTarget64BitLP64()) |
| Features.set(Feature_IsLP64Bit); |
| if (!Subtarget->isTarget64BitLP64()) |
| Features.set(Feature_NotLP64Bit); |
| if (Subtarget->isTargetPS()) |
| Features.set(Feature_IsPSBit); |
| if (!Subtarget->isTargetPS()) |
| Features.set(Feature_NotPSBit); |
| if (TM.getCodeModel() == CodeModel::Kernel) |
| Features.set(Feature_KernelCodeBit); |
| if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel) |
| Features.set(Feature_NearDataBit); |
| if (!TM.isPositionIndependent()) |
| Features.set(Feature_IsNotPICBit); |
| if (Subtarget->isLegalToCallImmediateAddr()) |
| Features.set(Feature_CallImmAddrBit); |
| if (!Subtarget->slowTwoMemOps()) |
| Features.set(Feature_FavorMemIndirectCallBit); |
| if (Subtarget->hasFastSHLDRotate()) |
| Features.set(Feature_HasFastSHLDRotateBit); |
| if (Subtarget->hasMFence()) |
| Features.set(Feature_HasMFenceBit); |
| if (Subtarget->useIndirectThunkCalls()) |
| Features.set(Feature_UseIndirectThunkCallsBit); |
| if (!Subtarget->useIndirectThunkCalls()) |
| Features.set(Feature_NotUseIndirectThunkCallsBit); |
| return Features; |
| } |
| |
| void X86InstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) { |
| AvailableFunctionFeatures = computeAvailableFunctionFeatures((const X86Subtarget *)&MF.getSubtarget(), &MF); |
| } |
| PredicateBitset X86InstructionSelector:: |
| computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const { |
| PredicateBitset Features; |
| if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF)) |
| Features.set(Feature_NotWin64WithoutFPBit); |
| if (shouldOptForSize(MF)) |
| Features.set(Feature_OptForSizeBit); |
| if (MF->getFunction().hasMinSize()) |
| Features.set(Feature_OptForMinSizeBit); |
| if (!shouldOptForSize(MF)) |
| Features.set(Feature_OptForSpeedBit); |
| if (!Subtarget->slowIncDec() || shouldOptForSize(MF)) |
| Features.set(Feature_UseIncDecBit); |
| if (shouldOptForSize(MF) || !Subtarget->hasSSE41()) |
| Features.set(Feature_NoSSE41_Or_OptForSizeBit); |
| return Features; |
| } |
| |
| // LLT Objects. |
| enum { |
| GILLT_s1, |
| GILLT_s8, |
| GILLT_s16, |
| GILLT_s32, |
| GILLT_s64, |
| GILLT_s80, |
| GILLT_s128, |
| GILLT_v2s1, |
| GILLT_v2s64, |
| GILLT_v4s1, |
| GILLT_v4s32, |
| GILLT_v4s64, |
| GILLT_v8s1, |
| GILLT_v8s16, |
| GILLT_v8s32, |
| GILLT_v8s64, |
| GILLT_v16s1, |
| GILLT_v16s8, |
| GILLT_v16s16, |
| GILLT_v16s32, |
| GILLT_v32s1, |
| GILLT_v32s8, |
| GILLT_v32s16, |
| GILLT_v64s1, |
| GILLT_v64s8, |
| }; |
| const static size_t NumTypeObjects = 25; |
| const static LLT TypeObjects[] = { |
| LLT::scalar(1), |
| LLT::scalar(8), |
| LLT::scalar(16), |
| LLT::scalar(32), |
| LLT::scalar(64), |
| LLT::scalar(80), |
| LLT::scalar(128), |
| LLT::vector(ElementCount::getFixed(2), 1), |
| LLT::vector(ElementCount::getFixed(2), 64), |
| LLT::vector(ElementCount::getFixed(4), 1), |
| LLT::vector(ElementCount::getFixed(4), 32), |
| LLT::vector(ElementCount::getFixed(4), 64), |
| LLT::vector(ElementCount::getFixed(8), 1), |
| LLT::vector(ElementCount::getFixed(8), 16), |
| LLT::vector(ElementCount::getFixed(8), 32), |
| LLT::vector(ElementCount::getFixed(8), 64), |
| LLT::vector(ElementCount::getFixed(16), 1), |
| LLT::vector(ElementCount::getFixed(16), 8), |
| LLT::vector(ElementCount::getFixed(16), 16), |
| LLT::vector(ElementCount::getFixed(16), 32), |
| LLT::vector(ElementCount::getFixed(32), 1), |
| LLT::vector(ElementCount::getFixed(32), 8), |
| LLT::vector(ElementCount::getFixed(32), 16), |
| LLT::vector(ElementCount::getFixed(64), 1), |
| LLT::vector(ElementCount::getFixed(64), 8), |
| }; |
| |
| // Feature bitsets. |
| enum { |
| GIFBS_Invalid, |
| GIFBS_FPStackf32, |
| GIFBS_FPStackf64, |
| GIFBS_Has3DNow, |
| GIFBS_HasAVX, |
| GIFBS_HasAVX1Only, |
| GIFBS_HasAVX2, |
| GIFBS_HasAVX512, |
| GIFBS_HasAVXNECONVERT, |
| GIFBS_HasBITALG, |
| GIFBS_HasBMI, |
| GIFBS_HasBMI2, |
| GIFBS_HasBWI, |
| GIFBS_HasCDI, |
| GIFBS_HasCRC32, |
| GIFBS_HasDQI, |
| GIFBS_HasFP16, |
| GIFBS_HasFastSHLDRotate, |
| GIFBS_HasKL, |
| GIFBS_HasLWP, |
| GIFBS_HasMFence, |
| GIFBS_HasMMX, |
| GIFBS_HasMOVBE, |
| GIFBS_HasMWAITX, |
| GIFBS_HasPTWRITE, |
| GIFBS_HasRTM, |
| GIFBS_HasSERIALIZE, |
| GIFBS_HasSHA, |
| GIFBS_HasSSE1, |
| GIFBS_HasSSE2, |
| GIFBS_HasSSE3, |
| GIFBS_HasSSE4A, |
| GIFBS_HasTBM, |
| GIFBS_HasTSXLDTRK, |
| GIFBS_HasVLX, |
| GIFBS_HasVPOPCNTDQ, |
| GIFBS_HasWAITPKG, |
| GIFBS_HasWBNOINVD, |
| GIFBS_HasX87, |
| GIFBS_HasXOP, |
| GIFBS_In64BitMode, |
| GIFBS_NoDQI, |
| GIFBS_Not64BitMode, |
| GIFBS_UseAVX, |
| GIFBS_UseIncDec, |
| GIFBS_UseSSE1, |
| GIFBS_UseSSE2, |
| GIFBS_UseSSE41, |
| GIFBS_UseSSSE3, |
| GIFBS_HasAES_HasAVX, |
| GIFBS_HasAES_NoAVX, |
| GIFBS_HasAMXBF16_In64BitMode, |
| GIFBS_HasAMXFP16_In64BitMode, |
| GIFBS_HasAMXINT8_In64BitMode, |
| GIFBS_HasAMXTILE_In64BitMode, |
| GIFBS_HasAVX_In64BitMode, |
| GIFBS_HasAVX_NoBWI, |
| GIFBS_HasAVX_NoVLX, |
| GIFBS_HasAVX_NoVLX_Or_NoBWI, |
| GIFBS_HasAVX2_NoVLX, |
| GIFBS_HasAVX2_NoVLX_Or_NoBWI, |
| GIFBS_HasAVX512_HasVAES, |
| GIFBS_HasAVX512_HasVLX, |
| GIFBS_HasAVX512_HasVPCLMULQDQ, |
| GIFBS_HasAVX512_NoBWI, |
| GIFBS_HasAVX512_NoDQI, |
| GIFBS_HasAVX512_NoVLX, |
| GIFBS_HasBF16_HasVLX, |
| GIFBS_HasBITALG_HasVLX, |
| GIFBS_HasBITALG_NoVLX, |
| GIFBS_HasBWI_HasVLX, |
| GIFBS_HasBWI_NoVLX, |
| GIFBS_HasCDI_HasVLX, |
| GIFBS_HasCDI_NoVLX, |
| GIFBS_HasDQI_HasVLX, |
| GIFBS_HasDQI_NoBWI, |
| GIFBS_HasDQI_NoVLX, |
| GIFBS_HasFMA4_NoAVX512, |
| GIFBS_HasFMA4_NoVLX, |
| GIFBS_HasFP16_HasVLX, |
| GIFBS_HasFSGSBase_In64BitMode, |
| GIFBS_HasPCLMUL_NoAVX, |
| GIFBS_HasPTWRITE_In64BitMode, |
| GIFBS_HasRDPID_In64BitMode, |
| GIFBS_HasRDPID_Not64BitMode, |
| GIFBS_HasUINTR_In64BitMode, |
| GIFBS_HasVAES_HasVLX, |
| GIFBS_HasVAES_NoVLX, |
| GIFBS_HasVLX_HasVPCLMULQDQ, |
| GIFBS_HasVLX_HasVPOPCNTDQ, |
| GIFBS_HasVPCLMULQDQ_NoVLX, |
| GIFBS_HasVPOPCNTDQ_NoVLX, |
| GIFBS_HasWAITPKG_In64BitMode, |
| GIFBS_HasWAITPKG_Not64BitMode, |
| GIFBS_In64BitMode_UseSSE2, |
| GIFBS_Not64BitMode_OptForSize, |
| GIFBS_NotWin64WithoutFP_OptForMinSize, |
| GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES, |
| GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ, |
| GIFBS_HasDQI_HasVLX_NoBWI, |
| GIFBS_HasFMA_NoAVX512_NoFMA4, |
| GIFBS_HasFMA_NoFMA4_NoVLX, |
| }; |
| const static PredicateBitset FeatureBitsets[] { |
| {}, // GIFBS_Invalid |
| {Feature_FPStackf32Bit, }, |
| {Feature_FPStackf64Bit, }, |
| {Feature_Has3DNowBit, }, |
| {Feature_HasAVXBit, }, |
| {Feature_HasAVX1OnlyBit, }, |
| {Feature_HasAVX2Bit, }, |
| {Feature_HasAVX512Bit, }, |
| {Feature_HasAVXNECONVERTBit, }, |
| {Feature_HasBITALGBit, }, |
| {Feature_HasBMIBit, }, |
| {Feature_HasBMI2Bit, }, |
| {Feature_HasBWIBit, }, |
| {Feature_HasCDIBit, }, |
| {Feature_HasCRC32Bit, }, |
| {Feature_HasDQIBit, }, |
| {Feature_HasFP16Bit, }, |
| {Feature_HasFastSHLDRotateBit, }, |
| {Feature_HasKLBit, }, |
| {Feature_HasLWPBit, }, |
| {Feature_HasMFenceBit, }, |
| {Feature_HasMMXBit, }, |
| {Feature_HasMOVBEBit, }, |
| {Feature_HasMWAITXBit, }, |
| {Feature_HasPTWRITEBit, }, |
| {Feature_HasRTMBit, }, |
| {Feature_HasSERIALIZEBit, }, |
| {Feature_HasSHABit, }, |
| {Feature_HasSSE1Bit, }, |
| {Feature_HasSSE2Bit, }, |
| {Feature_HasSSE3Bit, }, |
| {Feature_HasSSE4ABit, }, |
| {Feature_HasTBMBit, }, |
| {Feature_HasTSXLDTRKBit, }, |
| {Feature_HasVLXBit, }, |
| {Feature_HasVPOPCNTDQBit, }, |
| {Feature_HasWAITPKGBit, }, |
| {Feature_HasWBNOINVDBit, }, |
| {Feature_HasX87Bit, }, |
| {Feature_HasXOPBit, }, |
| {Feature_In64BitModeBit, }, |
| {Feature_NoDQIBit, }, |
| {Feature_Not64BitModeBit, }, |
| {Feature_UseAVXBit, }, |
| {Feature_UseIncDecBit, }, |
| {Feature_UseSSE1Bit, }, |
| {Feature_UseSSE2Bit, }, |
| {Feature_UseSSE41Bit, }, |
| {Feature_UseSSSE3Bit, }, |
| {Feature_HasAESBit, Feature_HasAVXBit, }, |
| {Feature_HasAESBit, Feature_NoAVXBit, }, |
| {Feature_HasAMXBF16Bit, Feature_In64BitModeBit, }, |
| {Feature_HasAMXFP16Bit, Feature_In64BitModeBit, }, |
| {Feature_HasAMXINT8Bit, Feature_In64BitModeBit, }, |
| {Feature_HasAMXTILEBit, Feature_In64BitModeBit, }, |
| {Feature_HasAVXBit, Feature_In64BitModeBit, }, |
| {Feature_HasAVXBit, Feature_NoBWIBit, }, |
| {Feature_HasAVXBit, Feature_NoVLXBit, }, |
| {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, }, |
| {Feature_HasAVX2Bit, Feature_NoVLXBit, }, |
| {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, }, |
| {Feature_HasAVX512Bit, Feature_HasVAESBit, }, |
| {Feature_HasAVX512Bit, Feature_HasVLXBit, }, |
| {Feature_HasAVX512Bit, Feature_HasVPCLMULQDQBit, }, |
| {Feature_HasAVX512Bit, Feature_NoBWIBit, }, |
| {Feature_HasAVX512Bit, Feature_NoDQIBit, }, |
| {Feature_HasAVX512Bit, Feature_NoVLXBit, }, |
| {Feature_HasBF16Bit, Feature_HasVLXBit, }, |
| {Feature_HasBITALGBit, Feature_HasVLXBit, }, |
| {Feature_HasBITALGBit, Feature_NoVLXBit, }, |
| {Feature_HasBWIBit, Feature_HasVLXBit, }, |
| {Feature_HasBWIBit, Feature_NoVLXBit, }, |
| {Feature_HasCDIBit, Feature_HasVLXBit, }, |
| {Feature_HasCDIBit, Feature_NoVLXBit, }, |
| {Feature_HasDQIBit, Feature_HasVLXBit, }, |
| {Feature_HasDQIBit, Feature_NoBWIBit, }, |
| {Feature_HasDQIBit, Feature_NoVLXBit, }, |
| {Feature_HasFMA4Bit, Feature_NoAVX512Bit, }, |
| {Feature_HasFMA4Bit, Feature_NoVLXBit, }, |
| {Feature_HasFP16Bit, Feature_HasVLXBit, }, |
| {Feature_HasFSGSBaseBit, Feature_In64BitModeBit, }, |
| {Feature_HasPCLMULBit, Feature_NoAVXBit, }, |
| {Feature_HasPTWRITEBit, Feature_In64BitModeBit, }, |
| {Feature_HasRDPIDBit, Feature_In64BitModeBit, }, |
| {Feature_HasRDPIDBit, Feature_Not64BitModeBit, }, |
| {Feature_HasUINTRBit, Feature_In64BitModeBit, }, |
| {Feature_HasVAESBit, Feature_HasVLXBit, }, |
| {Feature_HasVAESBit, Feature_NoVLXBit, }, |
| {Feature_HasVLXBit, Feature_HasVPCLMULQDQBit, }, |
| {Feature_HasVLXBit, Feature_HasVPOPCNTDQBit, }, |
| {Feature_HasVPCLMULQDQBit, Feature_NoVLXBit, }, |
| {Feature_HasVPOPCNTDQBit, Feature_NoVLXBit, }, |
| {Feature_HasWAITPKGBit, Feature_In64BitModeBit, }, |
| {Feature_HasWAITPKGBit, Feature_Not64BitModeBit, }, |
| {Feature_In64BitModeBit, Feature_UseSSE2Bit, }, |
| {Feature_Not64BitModeBit, Feature_OptForSizeBit, }, |
| {Feature_NotWin64WithoutFPBit, Feature_OptForMinSizeBit, }, |
| {Feature_HasAESBit, Feature_HasAVXBit, Feature_NoVLX_Or_NoVAESBit, }, |
| {Feature_HasAVXBit, Feature_HasPCLMULBit, Feature_NoVLX_Or_NoVPCLMULQDQBit, }, |
| {Feature_HasDQIBit, Feature_HasVLXBit, Feature_NoBWIBit, }, |
| {Feature_HasFMABit, Feature_NoAVX512Bit, Feature_NoFMA4Bit, }, |
| {Feature_HasFMABit, Feature_NoFMA4Bit, Feature_NoVLXBit, }, |
| }; |
| |
| // ComplexPattern predicates. |
| enum { |
| GICP_Invalid, |
| }; |
| // See constructor for table contents |
| |
| // PatFrag predicates. |
| enum { |
| GIPFP_I64_Predicate_AndMask64 = GIPFP_I64_Invalid + 1, |
| GIPFP_I64_Predicate_BTCBTSMask64, |
| GIPFP_I64_Predicate_BTRMask64, |
| GIPFP_I64_Predicate_PrefetchWT1Level, |
| GIPFP_I64_Predicate_i16immSExt8, |
| GIPFP_I64_Predicate_i32immSExt8, |
| GIPFP_I64_Predicate_i64immSExt32, |
| GIPFP_I64_Predicate_i64immSExt8, |
| GIPFP_I64_Predicate_i64immZExt32, |
| GIPFP_I64_Predicate_i64immZExt32SExt8, |
| GIPFP_I64_Predicate_i64timmSExt32, |
| GIPFP_I64_Predicate_immff00_ffff, |
| }; |
| bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const { |
| switch (PredicateID) { |
| case GIPFP_I64_Predicate_AndMask64: { |
| |
| return isMask_64(Imm) && !isUInt<32>(Imm); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_BTCBTSMask64: { |
| |
| return !isInt<32>(Imm) && isPowerOf2_64(Imm); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_BTRMask64: { |
| |
| return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_PrefetchWT1Level: { |
| |
| return Imm < 3; |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_i16immSExt8: { |
| return isInt<8>(Imm); |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_i32immSExt8: { |
| return isInt<8>(Imm); |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_i64immSExt32: { |
| return isInt<32>(Imm); |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_i64immSExt8: { |
| return isInt<8>(Imm); |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_i64immZExt32: { |
| return isUInt<32>(Imm); |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_i64immZExt32SExt8: { |
| |
| return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm)); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_i64timmSExt32: { |
| return isInt<32>(Imm); |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_I64_Predicate_immff00_ffff: { |
| |
| return Imm >= 0xff00 && Imm <= 0xffff; |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| } |
| llvm_unreachable("Unknown predicate"); |
| return false; |
| } |
| // PatFrag predicates. |
| enum { |
| GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1, |
| GIPFP_APFloat_Predicate_fpimm1, |
| GIPFP_APFloat_Predicate_fpimmneg0, |
| GIPFP_APFloat_Predicate_fpimmneg1, |
| }; |
| bool X86InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const { |
| switch (PredicateID) { |
| case GIPFP_APFloat_Predicate_fpimm0: { |
| |
| return Imm.isExactlyValue(+0.0); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_APFloat_Predicate_fpimm1: { |
| |
| return Imm.isExactlyValue(+1.0); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_APFloat_Predicate_fpimmneg0: { |
| |
| return Imm.isExactlyValue(-0.0); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| case GIPFP_APFloat_Predicate_fpimmneg1: { |
| |
| return Imm.isExactlyValue(-1.0); |
| |
| llvm_unreachable("ImmediateCode should have returned"); |
| return false; |
| } |
| } |
| llvm_unreachable("Unknown predicate"); |
| return false; |
| } |
| bool X86InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const { |
| llvm_unreachable("Unknown predicate"); |
| return false; |
| } |
| bool X86InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const std::array<const MachineOperand *, 3> &Operands) const { |
| const MachineFunction &MF = *MI.getParent()->getParent(); |
| const MachineRegisterInfo &MRI = MF.getRegInfo(); |
| (void)MRI; |
| llvm_unreachable("Unknown predicate"); |
| return false; |
| } |
| |
| X86InstructionSelector::ComplexMatcherMemFn |
| X86InstructionSelector::ComplexPredicateFns[] = { |
| nullptr, // GICP_Invalid |
| }; |
| |
| // Custom renderers. |
| enum { |
| GICR_Invalid, |
| }; |
| X86InstructionSelector::CustomRendererFn |
| X86InstructionSelector::CustomRenderers[] = { |
| nullptr, // GICR_Invalid |
| }; |
| |
| bool X86InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { |
| MachineFunction &MF = *I.getParent()->getParent(); |
| MachineRegisterInfo &MRI = MF.getRegInfo(); |
| const PredicateBitset AvailableFeatures = getAvailableFeatures(); |
| NewMIVector OutMIs; |
| State.MIs.clear(); |
| State.MIs.push_back(&I); |
| |
| if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) { |
| return true; |
| } |
| |
| return false; |
| } |
| |
| const int64_t *X86InstructionSelector::getMatchTable() const { |
| constexpr static int64_t MatchTable0[] = { |
| GIM_SwitchOpcode, /*MI*/0, /*[*/46, 227, /*)*//*default:*//*Label 61*/ 63086, |
| /*TargetOpcode::G_ADD*//*Label 0*/ 186, |
| /*TargetOpcode::G_SUB*//*Label 1*/ 1803, |
| /*TargetOpcode::G_MUL*//*Label 2*/ 2884, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_AND*//*Label 3*/ 3954, |
| /*TargetOpcode::G_OR*//*Label 4*/ 9364, |
| /*TargetOpcode::G_XOR*//*Label 5*/ 13234, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_CONCAT_VECTORS*//*Label 6*/ 20965, 0, 0, |
| /*TargetOpcode::G_BITCAST*//*Label 7*/ 21121, 0, 0, 0, 0, |
| /*TargetOpcode::G_INTRINSIC_LRINT*//*Label 8*/ 22667, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_INTRINSIC*//*Label 9*/ 22990, |
| /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 10*/ 28683, |
| /*TargetOpcode::G_ANYEXT*//*Label 11*/ 31047, |
| /*TargetOpcode::G_TRUNC*//*Label 12*/ 31458, |
| /*TargetOpcode::G_CONSTANT*//*Label 13*/ 32316, |
| /*TargetOpcode::G_FCONSTANT*//*Label 14*/ 32585, 0, 0, |
| /*TargetOpcode::G_SEXT*//*Label 15*/ 32736, 0, |
| /*TargetOpcode::G_ZEXT*//*Label 16*/ 33596, |
| /*TargetOpcode::G_SHL*//*Label 17*/ 34384, |
| /*TargetOpcode::G_LSHR*//*Label 18*/ 34977, |
| /*TargetOpcode::G_ASHR*//*Label 19*/ 35554, |
| /*TargetOpcode::G_FSHL*//*Label 20*/ 36131, |
| /*TargetOpcode::G_FSHR*//*Label 21*/ 36338, |
| /*TargetOpcode::G_ROTR*//*Label 22*/ 36545, |
| /*TargetOpcode::G_ROTL*//*Label 23*/ 38007, |
| /*TargetOpcode::G_ICMP*//*Label 24*/ 39515, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_UMULH*//*Label 25*/ 41072, |
| /*TargetOpcode::G_SMULH*//*Label 26*/ 41260, |
| /*TargetOpcode::G_UADDSAT*//*Label 27*/ 41448, |
| /*TargetOpcode::G_SADDSAT*//*Label 28*/ 41809, |
| /*TargetOpcode::G_USUBSAT*//*Label 29*/ 42170, |
| /*TargetOpcode::G_SSUBSAT*//*Label 30*/ 42531, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_FADD*//*Label 31*/ 42892, |
| /*TargetOpcode::G_FSUB*//*Label 32*/ 43714, |
| /*TargetOpcode::G_FMUL*//*Label 33*/ 44536, |
| /*TargetOpcode::G_FMA*//*Label 34*/ 45358, 0, |
| /*TargetOpcode::G_FDIV*//*Label 35*/ 46532, 0, 0, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_FNEG*//*Label 36*/ 47354, |
| /*TargetOpcode::G_FPEXT*//*Label 37*/ 47445, |
| /*TargetOpcode::G_FPTRUNC*//*Label 38*/ 47924, |
| /*TargetOpcode::G_FPTOSI*//*Label 39*/ 48230, |
| /*TargetOpcode::G_FPTOUI*//*Label 40*/ 48638, |
| /*TargetOpcode::G_SITOFP*//*Label 41*/ 48805, |
| /*TargetOpcode::G_UITOFP*//*Label 42*/ 49937, |
| /*TargetOpcode::G_FABS*//*Label 43*/ 50675, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_SMIN*//*Label 44*/ 50766, |
| /*TargetOpcode::G_SMAX*//*Label 45*/ 51703, |
| /*TargetOpcode::G_UMIN*//*Label 46*/ 52640, |
| /*TargetOpcode::G_UMAX*//*Label 47*/ 53577, |
| /*TargetOpcode::G_ABS*//*Label 48*/ 54514, 0, 0, |
| /*TargetOpcode::G_BR*//*Label 49*/ 55213, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_CTTZ_ZERO_UNDEF*//*Label 50*/ 55226, |
| /*TargetOpcode::G_CTLZ*//*Label 51*/ 55311, 0, |
| /*TargetOpcode::G_CTPOP*//*Label 52*/ 55870, |
| /*TargetOpcode::G_BSWAP*//*Label 53*/ 56974, 0, 0, 0, 0, |
| /*TargetOpcode::G_FSQRT*//*Label 54*/ 57064, 0, 0, 0, 0, 0, 0, 0, |
| /*TargetOpcode::G_STRICT_FADD*//*Label 55*/ 57844, |
| /*TargetOpcode::G_STRICT_FSUB*//*Label 56*/ 58666, |
| /*TargetOpcode::G_STRICT_FMUL*//*Label 57*/ 59488, |
| /*TargetOpcode::G_STRICT_FDIV*//*Label 58*/ 60310, 0, |
| /*TargetOpcode::G_STRICT_FMA*//*Label 59*/ 61132, |
| /*TargetOpcode::G_STRICT_FSQRT*//*Label 60*/ 62306, |
| // Label 0: @186 |
| GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 78*/ 1802, |
| /*GILLT_s8*//*Label 62*/ 216, |
| /*GILLT_s16*//*Label 63*/ 330, |
| /*GILLT_s32*//*Label 64*/ 502, |
| /*GILLT_s64*//*Label 65*/ 674, 0, 0, 0, |
| /*GILLT_v2s64*//*Label 66*/ 874, 0, |
| /*GILLT_v4s32*//*Label 67*/ 955, |
| /*GILLT_v4s64*//*Label 68*/ 1158, 0, |
| /*GILLT_v8s16*//*Label 69*/ 1216, |
| /*GILLT_v8s32*//*Label 70*/ 1419, |
| /*GILLT_v8s64*//*Label 71*/ 1477, 0, |
| /*GILLT_v16s8*//*Label 72*/ 1509, |
| /*GILLT_v16s16*//*Label 73*/ 1590, |
| /*GILLT_v16s32*//*Label 74*/ 1648, 0, |
| /*GILLT_v32s8*//*Label 75*/ 1680, |
| /*GILLT_v32s16*//*Label 76*/ 1738, 0, |
| /*GILLT_v64s8*//*Label 77*/ 1770, |
| // Label 62: @216 |
| GIM_Try, /*On fail goto*//*Label 79*/ 329, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, |
| GIM_Try, /*On fail goto*//*Label 80*/ 258, // Rule ID 21047 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, |
| // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21047, |
| GIR_Done, |
| // Label 80: @258 |
| GIM_Try, /*On fail goto*//*Label 81*/ 282, // Rule ID 21051 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, |
| // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21051, |
| GIR_Done, |
| // Label 81: @282 |
| GIM_Try, /*On fail goto*//*Label 82*/ 312, // Rule ID 21003 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21003, |
| GIR_Done, |
| // Label 82: @312 |
| GIM_Try, /*On fail goto*//*Label 83*/ 328, // Rule ID 20995 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, |
| // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD8rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20995, |
| GIR_Done, |
| // Label 83: @328 |
| GIM_Reject, |
| // Label 79: @329 |
| GIM_Reject, |
| // Label 63: @330 |
| GIM_Try, /*On fail goto*//*Label 84*/ 501, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, |
| GIM_Try, /*On fail goto*//*Label 85*/ 373, // Rule ID 20859 // |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, |
| // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] }) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_AddImm, /*InsnID*/0, /*Imm*/-128, |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20859, |
| GIR_Done, |
| // Label 85: @373 |
| GIM_Try, /*On fail goto*//*Label 86*/ 397, // Rule ID 21048 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, |
| // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC16r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21048, |
| GIR_Done, |
| // Label 86: @397 |
| GIM_Try, /*On fail goto*//*Label 87*/ 421, // Rule ID 21052 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, |
| // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC16r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21052, |
| GIR_Done, |
| // Label 87: @421 |
| GIM_Try, /*On fail goto*//*Label 88*/ 454, // Rule ID 21006 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (ADD16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21006, |
| GIR_Done, |
| // Label 88: @454 |
| GIM_Try, /*On fail goto*//*Label 89*/ 484, // Rule ID 21004 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21004, |
| GIR_Done, |
| // Label 89: @484 |
| GIM_Try, /*On fail goto*//*Label 90*/ 500, // Rule ID 20996 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, |
| // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD16rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20996, |
| GIR_Done, |
| // Label 90: @500 |
| GIM_Reject, |
| // Label 84: @501 |
| GIM_Reject, |
| // Label 64: @502 |
| GIM_Try, /*On fail goto*//*Label 91*/ 673, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, |
| GIM_Try, /*On fail goto*//*Label 92*/ 545, // Rule ID 20861 // |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, |
| // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] }) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_AddImm, /*InsnID*/0, /*Imm*/-128, |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20861, |
| GIR_Done, |
| // Label 92: @545 |
| GIM_Try, /*On fail goto*//*Label 93*/ 569, // Rule ID 21049 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, |
| // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC32r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21049, |
| GIR_Done, |
| // Label 93: @569 |
| GIM_Try, /*On fail goto*//*Label 94*/ 593, // Rule ID 21053 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, |
| // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC32r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21053, |
| GIR_Done, |
| // Label 94: @593 |
| GIM_Try, /*On fail goto*//*Label 95*/ 626, // Rule ID 21007 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (ADD32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21007, |
| GIR_Done, |
| // Label 95: @626 |
| GIM_Try, /*On fail goto*//*Label 96*/ 656, // Rule ID 21005 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21005, |
| GIR_Done, |
| // Label 96: @656 |
| GIM_Try, /*On fail goto*//*Label 97*/ 672, // Rule ID 20997 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, |
| // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD32rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20997, |
| GIR_Done, |
| // Label 97: @672 |
| GIM_Reject, |
| // Label 91: @673 |
| GIM_Reject, |
| // Label 65: @674 |
| GIM_Try, /*On fail goto*//*Label 98*/ 873, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, |
| GIM_Try, /*On fail goto*//*Label 99*/ 717, // Rule ID 20863 // |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128, |
| // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] }) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_AddImm, /*InsnID*/0, /*Imm*/-128, |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20863, |
| GIR_Done, |
| // Label 99: @717 |
| GIM_Try, /*On fail goto*//*Label 100*/ 742, // Rule ID 20868 // |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 2147483648, |
| // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] }) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_AddImm, /*InsnID*/0, /*Imm*/-2147483648, |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20868, |
| GIR_Done, |
| // Label 100: @742 |
| GIM_Try, /*On fail goto*//*Label 101*/ 766, // Rule ID 21050 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1, |
| // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC64r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21050, |
| GIR_Done, |
| // Label 101: @766 |
| GIM_Try, /*On fail goto*//*Label 102*/ 790, // Rule ID 21054 // |
| GIM_CheckFeatures, GIFBS_UseIncDec, |
| GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1, |
| // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC64r, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21054, |
| GIR_Done, |
| // Label 102: @790 |
| GIM_Try, /*On fail goto*//*Label 103*/ 823, // Rule ID 21008 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (ADD64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21008, |
| GIR_Done, |
| // Label 103: @823 |
| GIM_Try, /*On fail goto*//*Label 104*/ 856, // Rule ID 21009 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (ADD64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri32, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21009, |
| GIR_Done, |
| // Label 104: @856 |
| GIM_Try, /*On fail goto*//*Label 105*/ 872, // Rule ID 20998 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, |
| // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD64rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 20998, |
| GIR_Done, |
| // Label 105: @872 |
| GIM_Reject, |
| // Label 98: @873 |
| GIM_Reject, |
| // Label 66: @874 |
| GIM_Try, /*On fail goto*//*Label 106*/ 954, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, |
| GIM_Try, /*On fail goto*//*Label 107*/ 907, // Rule ID 2232 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2232, |
| GIR_Done, |
| // Label 107: @907 |
| GIM_Try, /*On fail goto*//*Label 108*/ 930, // Rule ID 2234 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDQrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2234, |
| GIR_Done, |
| // Label 108: @930 |
| GIM_Try, /*On fail goto*//*Label 109*/ 953, // Rule ID 4290 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (add:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4290, |
| GIR_Done, |
| // Label 109: @953 |
| GIM_Reject, |
| // Label 106: @954 |
| GIM_Reject, |
| // Label 67: @955 |
| GIM_Try, /*On fail goto*//*Label 110*/ 1157, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, |
| GIM_Try, /*On fail goto*//*Label 111*/ 1026, // Rule ID 16322 // |
| GIM_CheckFeatures, GIFBS_HasXOP, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, |
| GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, |
| GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2), VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 16322, |
| GIR_Done, |
| // Label 111: @1026 |
| GIM_Try, /*On fail goto*//*Label 112*/ 1087, // Rule ID 23056 // |
| GIM_CheckFeatures, GIFBS_HasXOP, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, |
| GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32, |
| GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src3, (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 23056, |
| GIR_Done, |
| // Label 112: @1087 |
| GIM_Try, /*On fail goto*//*Label 113*/ 1110, // Rule ID 2226 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2226, |
| GIR_Done, |
| // Label 113: @1110 |
| GIM_Try, /*On fail goto*//*Label 114*/ 1133, // Rule ID 2228 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDDrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2228, |
| GIR_Done, |
| // Label 114: @1133 |
| GIM_Try, /*On fail goto*//*Label 115*/ 1156, // Rule ID 4317 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (add:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4317, |
| GIR_Done, |
| // Label 115: @1156 |
| GIM_Reject, |
| // Label 110: @1157 |
| GIM_Reject, |
| // Label 68: @1158 |
| GIM_Try, /*On fail goto*//*Label 116*/ 1215, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, |
| GIM_Try, /*On fail goto*//*Label 117*/ 1191, // Rule ID 2236 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (add:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPADDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2236, |
| GIR_Done, |
| // Label 117: @1191 |
| GIM_Try, /*On fail goto*//*Label 118*/ 1214, // Rule ID 4281 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (add:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPADDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4281, |
| GIR_Done, |
| // Label 118: @1214 |
| GIM_Reject, |
| // Label 116: @1215 |
| GIM_Reject, |
| // Label 69: @1216 |
| GIM_Try, /*On fail goto*//*Label 119*/ 1418, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, |
| GIM_Try, /*On fail goto*//*Label 120*/ 1287, // Rule ID 16321 // |
| GIM_CheckFeatures, GIFBS_HasXOP, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, |
| GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, |
| GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2), VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 16321, |
| GIR_Done, |
| // Label 120: @1287 |
| GIM_Try, /*On fail goto*//*Label 121*/ 1348, // Rule ID 23055 // |
| GIM_CheckFeatures, GIFBS_HasXOP, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL, |
| GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16, |
| GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src3, (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2 |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 23055, |
| GIR_Done, |
| // Label 121: @1348 |
| GIM_Try, /*On fail goto*//*Label 122*/ 1371, // Rule ID 2220 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2220, |
| GIR_Done, |
| // Label 122: @1371 |
| GIM_Try, /*On fail goto*//*Label 123*/ 1394, // Rule ID 2222 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDWrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2222, |
| GIR_Done, |
| // Label 123: @1394 |
| GIM_Try, /*On fail goto*//*Label 124*/ 1417, // Rule ID 4338 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (add:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4338, |
| GIR_Done, |
| // Label 124: @1417 |
| GIM_Reject, |
| // Label 119: @1418 |
| GIM_Reject, |
| // Label 70: @1419 |
| GIM_Try, /*On fail goto*//*Label 125*/ 1476, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, |
| GIM_Try, /*On fail goto*//*Label 126*/ 1452, // Rule ID 2230 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (add:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPADDDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2230, |
| GIR_Done, |
| // Label 126: @1452 |
| GIM_Try, /*On fail goto*//*Label 127*/ 1475, // Rule ID 4308 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (add:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPADDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4308, |
| GIR_Done, |
| // Label 127: @1475 |
| GIM_Reject, |
| // Label 125: @1476 |
| GIM_Reject, |
| // Label 71: @1477 |
| GIM_Try, /*On fail goto*//*Label 128*/ 1508, // Rule ID 4272 // |
| GIM_CheckFeatures, GIFBS_HasAVX512, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (add:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4272, |
| GIR_Done, |
| // Label 128: @1508 |
| GIM_Reject, |
| // Label 72: @1509 |
| GIM_Try, /*On fail goto*//*Label 129*/ 1589, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, |
| GIM_Try, /*On fail goto*//*Label 130*/ 1542, // Rule ID 2214 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2214, |
| GIR_Done, |
| // Label 130: @1542 |
| GIM_Try, /*On fail goto*//*Label 131*/ 1565, // Rule ID 2216 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDBrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2216, |
| GIR_Done, |
| // Label 131: @1565 |
| GIM_Try, /*On fail goto*//*Label 132*/ 1588, // Rule ID 4356 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (add:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4356, |
| GIR_Done, |
| // Label 132: @1588 |
| GIM_Reject, |
| // Label 129: @1589 |
| GIM_Reject, |
| // Label 73: @1590 |
| GIM_Try, /*On fail goto*//*Label 133*/ 1647, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, |
| GIM_Try, /*On fail goto*//*Label 134*/ 1623, // Rule ID 2224 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (add:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2224, |
| GIR_Done, |
| // Label 134: @1623 |
| GIM_Try, /*On fail goto*//*Label 135*/ 1646, // Rule ID 4332 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (add:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4332, |
| GIR_Done, |
| // Label 135: @1646 |
| GIM_Reject, |
| // Label 133: @1647 |
| GIM_Reject, |
| // Label 74: @1648 |
| GIM_Try, /*On fail goto*//*Label 136*/ 1679, // Rule ID 4299 // |
| GIM_CheckFeatures, GIFBS_HasAVX512, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (add:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPADDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4299, |
| GIR_Done, |
| // Label 136: @1679 |
| GIM_Reject, |
| // Label 75: @1680 |
| GIM_Try, /*On fail goto*//*Label 137*/ 1737, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, |
| GIM_Try, /*On fail goto*//*Label 138*/ 1713, // Rule ID 2218 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (add:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2218, |
| GIR_Done, |
| // Label 138: @1713 |
| GIM_Try, /*On fail goto*//*Label 139*/ 1736, // Rule ID 4350 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (add:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4350, |
| GIR_Done, |
| // Label 139: @1736 |
| GIM_Reject, |
| // Label 137: @1737 |
| GIM_Reject, |
| // Label 76: @1738 |
| GIM_Try, /*On fail goto*//*Label 140*/ 1769, // Rule ID 4326 // |
| GIM_CheckFeatures, GIFBS_HasBWI, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (add:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4326, |
| GIR_Done, |
| // Label 140: @1769 |
| GIM_Reject, |
| // Label 77: @1770 |
| GIM_Try, /*On fail goto*//*Label 141*/ 1801, // Rule ID 4344 // |
| GIM_CheckFeatures, GIFBS_HasBWI, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (add:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4344, |
| GIR_Done, |
| // Label 141: @1801 |
| GIM_Reject, |
| // Label 78: @1802 |
| GIM_Reject, |
| // Label 1: @1803 |
| GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 158*/ 2883, |
| /*GILLT_s8*//*Label 142*/ 1833, |
| /*GILLT_s16*//*Label 143*/ 1899, |
| /*GILLT_s32*//*Label 144*/ 1998, |
| /*GILLT_s64*//*Label 145*/ 2097, 0, 0, 0, |
| /*GILLT_v2s64*//*Label 146*/ 2199, 0, |
| /*GILLT_v4s32*//*Label 147*/ 2280, |
| /*GILLT_v4s64*//*Label 148*/ 2361, 0, |
| /*GILLT_v8s16*//*Label 149*/ 2419, |
| /*GILLT_v8s32*//*Label 150*/ 2500, |
| /*GILLT_v8s64*//*Label 151*/ 2558, 0, |
| /*GILLT_v16s8*//*Label 152*/ 2590, |
| /*GILLT_v16s16*//*Label 153*/ 2671, |
| /*GILLT_v16s32*//*Label 154*/ 2729, 0, |
| /*GILLT_v32s8*//*Label 155*/ 2761, |
| /*GILLT_v32s16*//*Label 156*/ 2819, 0, |
| /*GILLT_v64s8*//*Label 157*/ 2851, |
| // Label 142: @1833 |
| GIM_Try, /*On fail goto*//*Label 159*/ 1898, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID, |
| GIM_Try, /*On fail goto*//*Label 160*/ 1881, // Rule ID 21018 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB8ri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21018, |
| GIR_Done, |
| // Label 160: @1881 |
| GIM_Try, /*On fail goto*//*Label 161*/ 1897, // Rule ID 21010 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID, |
| // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB8rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21010, |
| GIR_Done, |
| // Label 161: @1897 |
| GIM_Reject, |
| // Label 159: @1898 |
| GIM_Reject, |
| // Label 143: @1899 |
| GIM_Try, /*On fail goto*//*Label 162*/ 1997, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, |
| GIM_Try, /*On fail goto*//*Label 163*/ 1950, // Rule ID 21021 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21021, |
| GIR_Done, |
| // Label 163: @1950 |
| GIM_Try, /*On fail goto*//*Label 164*/ 1980, // Rule ID 21019 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21019, |
| GIR_Done, |
| // Label 164: @1980 |
| GIM_Try, /*On fail goto*//*Label 165*/ 1996, // Rule ID 21011 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, |
| // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB16rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21011, |
| GIR_Done, |
| // Label 165: @1996 |
| GIM_Reject, |
| // Label 162: @1997 |
| GIM_Reject, |
| // Label 144: @1998 |
| GIM_Try, /*On fail goto*//*Label 166*/ 2096, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, |
| GIM_Try, /*On fail goto*//*Label 167*/ 2049, // Rule ID 21022 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21022, |
| GIR_Done, |
| // Label 167: @2049 |
| GIM_Try, /*On fail goto*//*Label 168*/ 2079, // Rule ID 21020 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21020, |
| GIR_Done, |
| // Label 168: @2079 |
| GIM_Try, /*On fail goto*//*Label 169*/ 2095, // Rule ID 21012 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, |
| // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB32rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21012, |
| GIR_Done, |
| // Label 169: @2095 |
| GIM_Reject, |
| // Label 166: @2096 |
| GIM_Reject, |
| // Label 145: @2097 |
| GIM_Try, /*On fail goto*//*Label 170*/ 2198, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, |
| GIM_Try, /*On fail goto*//*Label 171*/ 2148, // Rule ID 21023 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21023, |
| GIR_Done, |
| // Label 171: @2148 |
| GIM_Try, /*On fail goto*//*Label 172*/ 2181, // Rule ID 21024 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21024, |
| GIR_Done, |
| // Label 172: @2181 |
| GIM_Try, /*On fail goto*//*Label 173*/ 2197, // Rule ID 21013 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, |
| // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB64rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21013, |
| GIR_Done, |
| // Label 173: @2197 |
| GIM_Reject, |
| // Label 170: @2198 |
| GIM_Reject, |
| // Label 146: @2199 |
| GIM_Try, /*On fail goto*//*Label 174*/ 2279, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, |
| GIM_Try, /*On fail goto*//*Label 175*/ 2232, // Rule ID 2298 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2298, |
| GIR_Done, |
| // Label 175: @2232 |
| GIM_Try, /*On fail goto*//*Label 176*/ 2255, // Rule ID 2300 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBQrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2300, |
| GIR_Done, |
| // Label 176: @2255 |
| GIM_Try, /*On fail goto*//*Label 177*/ 2278, // Rule ID 4380 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (sub:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4380, |
| GIR_Done, |
| // Label 177: @2278 |
| GIM_Reject, |
| // Label 174: @2279 |
| GIM_Reject, |
| // Label 147: @2280 |
| GIM_Try, /*On fail goto*//*Label 178*/ 2360, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32, |
| GIM_Try, /*On fail goto*//*Label 179*/ 2313, // Rule ID 2292 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2292, |
| GIR_Done, |
| // Label 179: @2313 |
| GIM_Try, /*On fail goto*//*Label 180*/ 2336, // Rule ID 2294 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBDrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2294, |
| GIR_Done, |
| // Label 180: @2336 |
| GIM_Try, /*On fail goto*//*Label 181*/ 2359, // Rule ID 4407 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (sub:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4407, |
| GIR_Done, |
| // Label 181: @2359 |
| GIM_Reject, |
| // Label 178: @2360 |
| GIM_Reject, |
| // Label 148: @2361 |
| GIM_Try, /*On fail goto*//*Label 182*/ 2418, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64, |
| GIM_Try, /*On fail goto*//*Label 183*/ 2394, // Rule ID 2302 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (sub:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSUBQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2302, |
| GIR_Done, |
| // Label 183: @2394 |
| GIM_Try, /*On fail goto*//*Label 184*/ 2417, // Rule ID 4371 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (sub:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSUBQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4371, |
| GIR_Done, |
| // Label 184: @2417 |
| GIM_Reject, |
| // Label 182: @2418 |
| GIM_Reject, |
| // Label 149: @2419 |
| GIM_Try, /*On fail goto*//*Label 185*/ 2499, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16, |
| GIM_Try, /*On fail goto*//*Label 186*/ 2452, // Rule ID 2286 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2286, |
| GIR_Done, |
| // Label 186: @2452 |
| GIM_Try, /*On fail goto*//*Label 187*/ 2475, // Rule ID 2288 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBWrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2288, |
| GIR_Done, |
| // Label 187: @2475 |
| GIM_Try, /*On fail goto*//*Label 188*/ 2498, // Rule ID 4428 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (sub:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4428, |
| GIR_Done, |
| // Label 188: @2498 |
| GIM_Reject, |
| // Label 185: @2499 |
| GIM_Reject, |
| // Label 150: @2500 |
| GIM_Try, /*On fail goto*//*Label 189*/ 2557, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32, |
| GIM_Try, /*On fail goto*//*Label 190*/ 2533, // Rule ID 2296 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (sub:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSUBDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2296, |
| GIR_Done, |
| // Label 190: @2533 |
| GIM_Try, /*On fail goto*//*Label 191*/ 2556, // Rule ID 4398 // |
| GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (sub:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSUBDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4398, |
| GIR_Done, |
| // Label 191: @2556 |
| GIM_Reject, |
| // Label 189: @2557 |
| GIM_Reject, |
| // Label 151: @2558 |
| GIM_Try, /*On fail goto*//*Label 192*/ 2589, // Rule ID 4362 // |
| GIM_CheckFeatures, GIFBS_HasAVX512, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (sub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4362, |
| GIR_Done, |
| // Label 192: @2589 |
| GIM_Reject, |
| // Label 152: @2590 |
| GIM_Try, /*On fail goto*//*Label 193*/ 2670, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8, |
| GIM_Try, /*On fail goto*//*Label 194*/ 2623, // Rule ID 2280 // |
| GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2280, |
| GIR_Done, |
| // Label 194: @2623 |
| GIM_Try, /*On fail goto*//*Label 195*/ 2646, // Rule ID 2282 // |
| GIM_CheckFeatures, GIFBS_UseSSE2, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID, |
| // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBBrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2282, |
| GIR_Done, |
| // Label 195: @2646 |
| GIM_Try, /*On fail goto*//*Label 196*/ 2669, // Rule ID 4446 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (sub:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4446, |
| GIR_Done, |
| // Label 196: @2669 |
| GIM_Reject, |
| // Label 193: @2670 |
| GIM_Reject, |
| // Label 153: @2671 |
| GIM_Try, /*On fail goto*//*Label 197*/ 2728, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16, |
| GIM_Try, /*On fail goto*//*Label 198*/ 2704, // Rule ID 2290 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (sub:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2290, |
| GIR_Done, |
| // Label 198: @2704 |
| GIM_Try, /*On fail goto*//*Label 199*/ 2727, // Rule ID 4422 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (sub:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4422, |
| GIR_Done, |
| // Label 199: @2727 |
| GIM_Reject, |
| // Label 197: @2728 |
| GIM_Reject, |
| // Label 154: @2729 |
| GIM_Try, /*On fail goto*//*Label 200*/ 2760, // Rule ID 4389 // |
| GIM_CheckFeatures, GIFBS_HasAVX512, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (sub:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSUBDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4389, |
| GIR_Done, |
| // Label 200: @2760 |
| GIM_Reject, |
| // Label 155: @2761 |
| GIM_Try, /*On fail goto*//*Label 201*/ 2818, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8, |
| GIM_Try, /*On fail goto*//*Label 202*/ 2794, // Rule ID 2284 // |
| GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID, |
| // (sub:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBYrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 2284, |
| GIR_Done, |
| // Label 202: @2794 |
| GIM_Try, /*On fail goto*//*Label 203*/ 2817, // Rule ID 4440 // |
| GIM_CheckFeatures, GIFBS_HasBWI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID, |
| // (sub:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ256rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4440, |
| GIR_Done, |
| // Label 203: @2817 |
| GIM_Reject, |
| // Label 201: @2818 |
| GIM_Reject, |
| // Label 156: @2819 |
| GIM_Try, /*On fail goto*//*Label 204*/ 2850, // Rule ID 4416 // |
| GIM_CheckFeatures, GIFBS_HasBWI, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (sub:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4416, |
| GIR_Done, |
| // Label 204: @2850 |
| GIM_Reject, |
| // Label 157: @2851 |
| GIM_Try, /*On fail goto*//*Label 205*/ 2882, // Rule ID 4434 // |
| GIM_CheckFeatures, GIFBS_HasBWI, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID, |
| // (sub:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZrr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4434, |
| GIR_Done, |
| // Label 205: @2882 |
| GIM_Reject, |
| // Label 158: @2883 |
| GIM_Reject, |
| // Label 2: @2884 |
| GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 218*/ 3953, |
| /*GILLT_s16*//*Label 206*/ 2911, |
| /*GILLT_s32*//*Label 207*/ 3010, |
| /*GILLT_s64*//*Label 208*/ 3109, 0, 0, 0, |
| /*GILLT_v2s64*//*Label 209*/ 3211, 0, |
| /*GILLT_v4s32*//*Label 210*/ 3395, |
| /*GILLT_v4s64*//*Label 211*/ 3476, 0, |
| /*GILLT_v8s16*//*Label 212*/ 3660, |
| /*GILLT_v8s32*//*Label 213*/ 3741, |
| /*GILLT_v8s64*//*Label 214*/ 3799, 0, 0, |
| /*GILLT_v16s16*//*Label 215*/ 3831, |
| /*GILLT_v16s32*//*Label 216*/ 3889, 0, 0, |
| /*GILLT_v32s16*//*Label 217*/ 3921, |
| // Label 206: @2911 |
| GIM_Try, /*On fail goto*//*Label 219*/ 3009, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID, |
| GIM_Try, /*On fail goto*//*Label 220*/ 2962, // Rule ID 21037 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (IMUL16rri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21037, |
| GIR_Done, |
| // Label 220: @2962 |
| GIM_Try, /*On fail goto*//*Label 221*/ 2992, // Rule ID 21035 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (IMUL16rri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21035, |
| GIR_Done, |
| // Label 221: @2992 |
| GIM_Try, /*On fail goto*//*Label 222*/ 3008, // Rule ID 21029 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID, |
| // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL16rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21029, |
| GIR_Done, |
| // Label 222: @3008 |
| GIM_Reject, |
| // Label 219: @3009 |
| GIM_Reject, |
| // Label 207: @3010 |
| GIM_Try, /*On fail goto*//*Label 223*/ 3108, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID, |
| GIM_Try, /*On fail goto*//*Label 224*/ 3061, // Rule ID 21038 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (IMUL32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21038, |
| GIR_Done, |
| // Label 224: @3061 |
| GIM_Try, /*On fail goto*//*Label 225*/ 3091, // Rule ID 21036 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (IMUL32rri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21036, |
| GIR_Done, |
| // Label 225: @3091 |
| GIM_Try, /*On fail goto*//*Label 226*/ 3107, // Rule ID 21030 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID, |
| // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL32rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21030, |
| GIR_Done, |
| // Label 226: @3107 |
| GIM_Reject, |
| // Label 223: @3108 |
| GIM_Reject, |
| // Label 208: @3109 |
| GIM_Try, /*On fail goto*//*Label 227*/ 3210, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID, |
| GIM_Try, /*On fail goto*//*Label 228*/ 3160, // Rule ID 21039 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (IMUL64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri8, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21039, |
| GIR_Done, |
| // Label 228: @3160 |
| GIM_Try, /*On fail goto*//*Label 229*/ 3193, // Rule ID 21040 // |
| GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1] |
| GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT, |
| GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32, |
| // MIs[1] Operand 1 |
| // No operand predicates |
| GIM_CheckIsSafeToFold, /*InsnID*/1, |
| // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (IMUL64rri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) |
| GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri32, |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst |
| GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1 |
| GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2 |
| GIR_EraseFromParent, /*InsnID*/0, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21040, |
| GIR_Done, |
| // Label 229: @3193 |
| GIM_Try, /*On fail goto*//*Label 230*/ 3209, // Rule ID 21031 // |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID, |
| // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL64rr, |
| GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 21031, |
| GIR_Done, |
| // Label 230: @3209 |
| GIM_Reject, |
| // Label 227: @3210 |
| GIM_Reject, |
| // Label 209: @3211 |
| GIM_Try, /*On fail goto*//*Label 231*/ 3394, |
| GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64, |
| GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64, |
| GIM_Try, /*On fail goto*//*Label 232*/ 3244, // Rule ID 4659 // |
| GIM_CheckFeatures, GIFBS_HasDQI_HasVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID, |
| // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) |
| GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ128rr, |
| GIR_ConstrainSelectedInstOperands, /*InsnID*/0, |
| // GIR_Coverage, 4659, |
| GIR_Done, |
| // Label 232: @3244 |
| GIM_Try, /*On fail goto*//*Label 233*/ 3393, // Rule ID 18483 // |
| GIM_CheckFeatures, GIFBS_HasDQI_NoVLX, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID, |
| GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, |