| //===-- XtensaTargetMachine.h - Define TargetMachine for Xtensa -*- C++ -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| // See https://llvm.org/LICENSE.txt for license information. |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file declares the Xtensa specific subclass of TargetMachine. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #ifndef LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H |
| #define LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H |
| |
| #include "llvm/Target/TargetMachine.h" |
| #include <optional> |
| |
| namespace llvm { |
| extern Target TheXtensaTarget; |
| |
| class XtensaTargetMachine : public LLVMTargetMachine { |
| std::unique_ptr<TargetLoweringObjectFile> TLOF; |
| public: |
| XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| StringRef FS, const TargetOptions &Options, |
| std::optional<Reloc::Model> RM, |
| std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, |
| bool JIT, bool isLittle); |
| |
| XtensaTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| StringRef FS, const TargetOptions &Options, |
| std::optional<Reloc::Model> RM, |
| std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, |
| bool JIT); |
| |
| TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
| TargetLoweringObjectFile *getObjFileLowering() const override { |
| return TLOF.get(); |
| } |
| }; |
| } // end namespace llvm |
| |
| #endif // LLVM_LIB_TARGET_XTENSA_XTENSATARGETMACHINE_H |