Update SPIR-V Headers to 7845730ca
Changes:
7845730ca Bump revision to 4, for SPIR-V 1.5.
05836bdba Add SPV_EXT_shader_image_int64 (#170)
be32cb6c8 Added SPV_KHR_fragment_shading_rate (#172)
c43a43c7c Register the Xenia emulator as a generator (#171)
d4e76fb32 Register the Messiah SPIR-V CodeGen (#169)
060627f0b Register the ANGLE compiler (#168)
03a842f95 Rebuild of latest headers, which slightly moves OpTerminateInvocation
3fdabd0da Reserve SPIR-V token range for upcoming Intel extensions. (#165)
5538bf438 Update BUILD.bazel and BUILD.gn (#166)
96013f32b Publish the headers for the clspv embedded reflection non-semantic extended instruction set (#164)
76afa6397 Update the registry in spir-v.xml to modernize and split out opcodes. (#156)
Commands:
./third_party/update-spirvheaders.sh
Bug: b/123642959
Change-Id: I68027fa8e2770cac37af6d648fbb655b2112ee88
diff --git a/third_party/SPIRV-Headers/BUILD.bazel b/third_party/SPIRV-Headers/BUILD.bazel
index 9c53db3..9cb46bf 100644
--- a/third_party/SPIRV-Headers/BUILD.bazel
+++ b/third_party/SPIRV-Headers/BUILD.bazel
@@ -71,6 +71,46 @@
srcs = ["include/spirv/spir-v.xml"],
)
+filegroup(
+ name = "spirv_ext_inst_debuginfo_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.debuginfo.grammar.json"],
+)
+
+filegroup(
+ name = "spirv_ext_inst_nonsemantic_clspvreflection_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json"],
+)
+
+filegroup(
+ name = "spirv_ext_inst_nonsemantic_debugprintf_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.nonsemantic.debugprintf.grammar.json"],
+)
+
+filegroup(
+ name = "spirv_ext_inst_opencl_debuginfo_100_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.opencl.debuginfo.100.grammar.json"],
+)
+
+filegroup(
+ name = "spirv_ext_inst_spv_amd_gcn_shader_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.spv-amd-gcn-shader.grammar.json"],
+)
+
+filegroup(
+ name = "spirv_ext_inst_spv_amd_shader_ballot_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.spv-amd-shader-ballot.grammar.json"],
+)
+
+filegroup(
+ name = "spirv_ext_inst_spv_amd_shader_explicit_vertex_parameter_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.spv-amd-shader-explicit-vertex-parameter.grammar.json"],
+)
+
+filegroup(
+ name = "spirv_ext_inst_spv_amd_shader_trinary_minmax_grammar_unified1",
+ srcs = ["include/spirv/unified1/extinst.spv-amd-shader-trinary-minmax.grammar.json"],
+)
+
cc_library(
name = "spirv_common_headers",
hdrs = [
@@ -81,6 +121,7 @@
"include/spirv/1.2/GLSL.std.450.h",
"include/spirv/1.2/OpenCL.std.h",
"include/spirv/unified1/GLSL.std.450.h",
+ "include/spirv/unified1/NonSemanticClspvReflection.h",
"include/spirv/unified1/NonSemanticDebugPrintf.h",
"include/spirv/unified1/OpenCL.std.h",
],
diff --git a/third_party/SPIRV-Headers/BUILD.gn b/third_party/SPIRV-Headers/BUILD.gn
index 57e35f0..be3f43b 100644
--- a/third_party/SPIRV-Headers/BUILD.gn
+++ b/third_party/SPIRV-Headers/BUILD.gn
@@ -33,6 +33,7 @@
"include/spirv/1.2/spirv.h",
"include/spirv/1.2/spirv.hpp",
"include/spirv/unified1/GLSL.std.450.h",
+ "include/spirv/unified1/NonSemanticClspvReflection.h",
"include/spirv/unified1/NonSemanticDebugPrintf.h",
"include/spirv/unified1/OpenCL.std.h",
"include/spirv/unified1/spirv.h",
diff --git a/third_party/SPIRV-Headers/include/spirv/spir-v.xml b/third_party/SPIRV-Headers/include/spirv/spir-v.xml
index 6925ac1..1298052 100644
--- a/third_party/SPIRV-Headers/include/spirv/spir-v.xml
+++ b/third_party/SPIRV-Headers/include/spirv/spir-v.xml
@@ -23,10 +23,11 @@
MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
-->
<!--
- This file, spir-v.xml, is the SPIR-V Tool ID and Opcode registry. The
- canonical version of the registry, together with related schema and
+ This file, spir-v.xml, is the SPIR-V Tool ID, opcode and enumerant registry.
+ The canonical version of the registry, together with related schema and
documentation, can be found in the Khronos Registry at
- http://www.khronos.org/registry/spir-v/
+ include/spirv/spir-v.xml in the master branch at
+ https://github.com/KhronosGroup/SPIRV-Headers
-->
<!-- SECTION: SPIR-V Tool ID Definitions -->
@@ -73,32 +74,44 @@
<id value="21" vendor="Google" tool="Clspv" comment="Contact David Neto, dneto@google.com"/>
<id value="22" vendor="Google" tool="MLIR SPIR-V Serializer" comment="Contact Lei Zhang, antiagainst@google.com"/>
<id value="23" vendor="Google" tool="Tint Compiler" comment="Contact David Neto, dneto@google.com"/>
- <unused start="24" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
+ <id value="24" vendor="Google" tool="ANGLE Shader Compiler" comment="Contact Shahbaz Youssefi, syoussefi@google.com"/>
+ <id value="25" vendor="Netease Games" tool="Messiah Shader Compiler" comment="Contact Yuwen Wu, atyuwen@gmail.com"/>
+ <id value="26" vendor="Xenia" tool="Xenia Emulator Microcode Translator" comment="Contact Vitaliy Kuzmin, triang3l@yandex.ru, https://github.com/xenia-project/xenia"/>
+ <unused start="27" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
</ids>
<!-- SECTION: SPIR-V Opcodes and Enumerants -->
- <!-- Reserve new ranges for vendors in contiguous blocks of 64
- preceding the "Future use" block below, and modify that block
- accordingly.
- Each vendor determines the use of values in their own ranges.
- Vendors are not required to disclose those uses. If the use of a
- value is included in an extension that is adopted by a Khronos
- extension or specification, then that value's use may be permanently
+ <!-- Vendors reserve new ranges of:
+ - opcode enumerants in the "opcode" list below, and
+ - non-opcode enumerants in the non-opcodes "enumerant" list below.
+ Both are reserved by contiguous blocks of 64, preceding the given
+ "Future use" blocks.
+
+ SPIR-V background:
+ - SPIR-V currently has well over 30 enums, including the opcode enum
+ - each enum has its own name space, allowing reuse of enumerants
+ - SPIR-V restricts opcode enumerants to 16 bits
+ - all other enums use 32-bit enumerants
+
+ Reservation rules:
+ - opcode reservations ("opcode") are only valid for opcodes
+ - non-opcode reservations ("enumerant") are not valid for opcodes
+ - reservations in the enumerant list are valid for all non-opcode enums
+ - it is simpler to use each non-opcode enumerant for only one purpose
+ but this is left to the discretion of the vendor
+ - all enumerants in a range should be used before allocating a new range
+ (several extensions can use enumerants from the same range)
+
+ Each vendor determines the use of enumerants in the ranges they
+ reserve. Vendors are not required to disclose those uses. If the use
+ of an enumerant is included in an extension that is adopted by a Khronos
+ extension or specification, then that enumerant's use may be permanently
fixed as if originally reserved in a Khronos range.
- The SPIR Working Group strongly recommends:
- - Each value is used for only one purpose.
- - All values in a range should be used before allocating a new range.
- For example, to avoid unused gaps in ranges, it is customary for
- several extensions to use values from the same range.
-
- The Id type "enum" is a synonym for "opcode".
-
- Note that SPIR-V restricts opcode values to 16 bits.
-->
- <!-- Reserved opcode & enumerant blocks -->
+ <!-- Begin reservations of opcode enumerants -->
<ids type="opcode" start="0" end="4095" vendor="Khronos" comment="Reserved opcodes, not available to vendors - see the SPIR-V Specification"/>
<ids type="opcode" start="4096" end="4159" vendor="Mesa" comment="Contact TBD"/>
<ids type="opcode" start="4160" end="4415" vendor="ARM"/>
@@ -113,15 +126,41 @@
<ids type="opcode" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
<ids type="opcode" start="5952" end="6015" vendor="Codeplay" comment="Contact victor@codeplay.com"/>
<ids type="opcode" start="6016" end="6079" vendor="Khronos" comment="Contact @tobski"/>
- <!-- Opcodes & enumerants reservable for future use. To get a block, allocate
+ <ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.com"/>
+ <!-- Opcode enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
-
<!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
+ <ids type="opcode" start="6144" end="65535" comment="Opcode range reservable for future use by vendors"/>
+ <!-- End reservations of opcodes -->
- <ids type="opcode" start="6080" end="4294967295" comment="Opcode range reservable for future use by vendors"/>
+
+ <!-- Begin reservations of non-opcode enumerants -->
+ <ids type="enumerant" start="0" end="4095" vendor="Khronos" comment="Reserved enumerants, not available to vendors - see the SPIR-V Specification"/>
+ <ids type="enumerant" start="4096" end="4159" vendor="Mesa" comment="Contact TBD"/>
+ <ids type="enumerant" start="4160" end="4415" vendor="ARM"/>
+ <ids type="enumerant" start="4416" end="4479" vendor="Khronos" comment="SPV_ARB_shader_ballot - contact Neil Henning, neil.henning@amd.com"/>
+ <ids type="enumerant" start="4480" end="4991" vendor="Qualcomm" comment="Contact weifengz@qti.qualcomm.com"/>
+ <ids type="enumerant" start="4992" end="5247" vendor="AMD"/>
+ <ids type="enumerant" start="5248" end="5503" vendor="NVIDIA"/>
+ <ids type="enumerant" start="5504" end="5567" vendor="Imagination"/>
+ <ids type="enumerant" start="5568" end="5631" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/>
+ <ids type="enumerant" start="5632" end="5695" vendor="Google" comment="Contact dneto@google.com"/>
+ <ids type="enumerant" start="5696" end="5823" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/>
+ <ids type="enumerant" start="5824" end="5951" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
+ <ids type="enumerant" start="5952" end="6015" vendor="Codeplay" comment="Contact victor@codeplay.com"/>
+ <ids type="enumerant" start="6016" end="6079" vendor="Khronos" comment="Contact @tobski"/>
+ <ids type="enumerant" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.com"/>
+ <!-- Enumerants to reserve for future use. To get a block, allocate
+ multiples of 64 starting at the lowest available point in this
+ block and add a corresponding <ids> tag immediately above. Make
+ sure to fill in the vendor attribute, and preferably add a contact
+ person/address in a comment attribute. -->
+ <!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
+ <ids type="enumerant" start="6144" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
+ <!-- End reservations of enumerants -->
<!-- SECTION: SPIR-V Loop Control Bit Reservations -->
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/NonSemanticClspvReflection.h b/third_party/SPIRV-Headers/include/spirv/unified1/NonSemanticClspvReflection.h
new file mode 100644
index 0000000..fa7061d
--- /dev/null
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/NonSemanticClspvReflection.h
@@ -0,0 +1,73 @@
+// Copyright (c) 2020 The Khronos Group Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and/or associated documentation files (the
+// "Materials"), to deal in the Materials without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Materials, and to
+// permit persons to whom the Materials are furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Materials.
+//
+// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
+// KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
+// SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
+// https://www.khronos.org/registry/
+//
+// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+//
+
+#ifndef SPIRV_UNIFIED1_NonSemanticClspvReflection_H_
+#define SPIRV_UNIFIED1_NonSemanticClspvReflection_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum {
+ NonSemanticClspvReflectionRevision = 1,
+ NonSemanticClspvReflectionRevision_BitWidthPadding = 0x7fffffff
+};
+
+enum NonSemanticClspvReflectionInstructions {
+ NonSemanticClspvReflectionKernel = 1,
+ NonSemanticClspvReflectionArgumentInfo = 2,
+ NonSemanticClspvReflectionArgumentStorageBuffer = 3,
+ NonSemanticClspvReflectionArgumentUniform = 4,
+ NonSemanticClspvReflectionArgumentPodStorageBuffer = 5,
+ NonSemanticClspvReflectionArgumentPodUniform = 6,
+ NonSemanticClspvReflectionArgumentPodPushConstant = 7,
+ NonSemanticClspvReflectionArgumentSampledImage = 8,
+ NonSemanticClspvReflectionArgumentStorageImage = 9,
+ NonSemanticClspvReflectionArgumentSampler = 10,
+ NonSemanticClspvReflectionArgumentWorkgroup = 11,
+ NonSemanticClspvReflectionSpecConstantWorkgroupSize = 12,
+ NonSemanticClspvReflectionSpecConstantGlobalOffset = 13,
+ NonSemanticClspvReflectionSpecConstantWorkDim = 14,
+ NonSemanticClspvReflectionPushConstantGlobalOffset = 15,
+ NonSemanticClspvReflectionPushConstantEnqueuedLocalSize = 16,
+ NonSemanticClspvReflectionPushConstantGlobalSize = 17,
+ NonSemanticClspvReflectionPushConstantRegionOffset = 18,
+ NonSemanticClspvReflectionPushConstantNumWorkgroups = 19,
+ NonSemanticClspvReflectionPushConstantRegionGroupOffset = 20,
+ NonSemanticClspvReflectionConstantDataStorageBuffer = 21,
+ NonSemanticClspvReflectionConstantDataUniform = 22,
+ NonSemanticClspvReflectionLiteralSampler = 23,
+ NonSemanticClspvReflectionPropertyRequiredWorkgroupSize = 24,
+ NonSemanticClspvReflectionInstructionsMax = 0x7fffffff
+};
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SPIRV_UNIFIED1_NonSemanticClspvReflection_H_
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json b/third_party/SPIRV-Headers/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
new file mode 100644
index 0000000..15e5699
--- /dev/null
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
@@ -0,0 +1,237 @@
+{
+ "revision" : 1,
+ "instructions" : [
+ {
+ "opname" : "Kernel",
+ "opcode" : 1,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Kernel" },
+ { "kind" : "IdRef", "name" : "Name" }
+ ]
+ },
+ {
+ "opname" : "ArgumentInfo",
+ "opcode" : 2,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Name" },
+ { "kind" : "IdRef", "name" : "Type Name", "quantifier" : "?" },
+ { "kind" : "IdRef", "name" : "Address Qualifier", "quantifier" : "?" },
+ { "kind" : "IdRef", "name" : "Access Qualifier", "quantifier" : "?" },
+ { "kind" : "IdRef", "name" : "Type Qualifier", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentStorageBuffer",
+ "opcode" : 3,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentUniform",
+ "opcode" : 4,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentPodStorageBuffer",
+ "opcode" : 5,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentPodUniform",
+ "opcode" : 6,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentPodPushConstant",
+ "opcode" : 7,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentSampledImage",
+ "opcode" : 8,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentStorageImage",
+ "opcode" : 9,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentSampler",
+ "opcode" : 10,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "ArgumentWorkgroup",
+ "opcode" : 11,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Decl" },
+ { "kind" : "IdRef", "name" : "Ordinal" },
+ { "kind" : "IdRef", "name" : "SpecId" },
+ { "kind" : "IdRef", "name" : "ElemSize" },
+ { "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
+ ]
+ },
+ {
+ "opname" : "SpecConstantWorkgroupSize",
+ "opcode" : 12,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "X" },
+ { "kind" : "IdRef", "name" : "Y" },
+ { "kind" : "IdRef", "name" : "Z" }
+ ]
+ },
+ {
+ "opname" : "SpecConstantGlobalOffset",
+ "opcode" : 13,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "X" },
+ { "kind" : "IdRef", "name" : "Y" },
+ { "kind" : "IdRef", "name" : "Z" }
+ ]
+ },
+ {
+ "opname" : "SpecConstantWorkDim",
+ "opcode" : 14,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Dim" }
+ ]
+ },
+ {
+ "opname" : "PushConstantGlobalOffset",
+ "opcode" : 15,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" }
+ ]
+ },
+ {
+ "opname" : "PushConstantEnqueuedLocalSize",
+ "opcode" : 16,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" }
+ ]
+ },
+ {
+ "opname" : "PushConstantGlobalSize",
+ "opcode" : 17,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" }
+ ]
+ },
+ {
+ "opname" : "PushConstantRegionOffset",
+ "opcode" : 18,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" }
+ ]
+ },
+ {
+ "opname" : "PushConstantNumWorkgroups",
+ "opcode" : 19,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" }
+ ]
+ },
+ {
+ "opname" : "PushConstantRegionGroupOffset",
+ "opcode" : 20,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size" }
+ ]
+ },
+ {
+ "opname" : "ConstantDataStorageBuffer",
+ "opcode" : 21,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "Data" }
+ ]
+ },
+ {
+ "opname" : "ConstantDataUniform",
+ "opcode" : 22,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "Data" }
+ ]
+ },
+ {
+ "opname" : "LiteralSampler",
+ "opcode" : 23,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "Mask" }
+ ]
+ },
+ {
+ "opname" : "PropertyRequiredWorkgroupSize",
+ "opcode" : 24,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Kernel" },
+ { "kind" : "IdRef", "name" : "X" },
+ { "kind" : "IdRef", "name" : "Y" },
+ { "kind" : "IdRef", "name" : "Z" }
+ ]
+ }
+ ]
+}
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.core.grammar.json b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.core.grammar.json
index 2044192..18901cd 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.core.grammar.json
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.core.grammar.json
@@ -27,7 +27,7 @@
"magic_number" : "0x07230203",
"major_version" : 1,
"minor_version" : 5,
- "revision" : 3,
+ "revision" : 4,
"instruction_printing_class" : [
{
"tag" : "@exclude"
@@ -7720,6 +7720,36 @@
]
},
{
+ "category" : "BitEnum",
+ "kind" : "FragmentShadingRate",
+ "enumerants" : [
+ {
+ "enumerant" : "Vertical2Pixels",
+ "value" : "0x0001",
+ "capabilities" : [ "FragmentShadingRateKHR" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "Vertical4Pixels",
+ "value" : "0x0002",
+ "capabilities" : [ "FragmentShadingRateKHR" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "Horizontal2Pixels",
+ "value" : "0x0004",
+ "capabilities" : [ "FragmentShadingRateKHR" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "Horizontal4Pixels",
+ "value" : "0x0008",
+ "capabilities" : [ "FragmentShadingRateKHR" ],
+ "version" : "None"
+ }
+ ]
+ },
+ {
"category" : "ValueEnum",
"kind" : "SourceLanguage",
"enumerants" : [
@@ -8826,6 +8856,16 @@
"enumerant" : "R8ui",
"value" : 39,
"capabilities" : [ "StorageImageExtendedFormats" ]
+ },
+ {
+ "enumerant" : "R64ui",
+ "value" : 40,
+ "capabilities" : [ "Int64ImageEXT" ]
+ },
+ {
+ "enumerant" : "R64i",
+ "value" : 41,
+ "capabilities" : [ "Int64ImageEXT" ]
}
]
},
@@ -10005,6 +10045,13 @@
"version" : "1.3"
},
{
+ "enumerant" : "PrimitiveShadingRateKHR",
+ "value" : 4432,
+ "capabilities" : [ "FragmentShadingRateKHR" ],
+ "extensions" : [ "SPV_KHR_fragment_shading_rate" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "DeviceIndex",
"value" : 4438,
"capabilities" : [ "DeviceGroup" ],
@@ -10019,6 +10066,13 @@
"version" : "1.3"
},
{
+ "enumerant" : "ShadingRateKHR",
+ "value" : 4444,
+ "capabilities" : [ "FragmentShadingRateKHR" ],
+ "extensions" : [ "SPV_KHR_fragment_shading_rate" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "BaryCoordNoPerspAMD",
"value" : 4992,
"extensions" : [ "SPV_AMD_shader_explicit_vertex_parameter" ],
@@ -10902,6 +10956,13 @@
"version" : "1.5"
},
{
+ "enumerant" : "FragmentShadingRateKHR",
+ "value" : 4422,
+ "capabilities" : [ "Shader" ],
+ "extensions" : [ "SPV_KHR_fragment_shading_rate" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "SubgroupBallotKHR",
"value" : 4423,
"extensions" : [ "SPV_KHR_shader_ballot" ],
@@ -11102,6 +11163,13 @@
"version" : "None"
},
{
+ "enumerant" : "Int64ImageEXT",
+ "value" : 5016,
+ "capabilities" : [ "Shader" ],
+ "extensions" : [ "SPV_EXT_shader_image_int64" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "ShaderClockKHR",
"value" : 5055,
"capabilities" : [ "Shader" ],
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.cs b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.cs
index ce11768..0419c0f 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.cs
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.cs
@@ -49,7 +49,7 @@
{
public const uint MagicNumber = 0x07230203;
public const uint Version = 0x00010500;
- public const uint Revision = 3;
+ public const uint Revision = 4;
public const uint OpCodeMask = 0xffff;
public const uint WordCountShift = 16;
@@ -270,6 +270,8 @@
Rg8ui = 37,
R16ui = 38,
R8ui = 39,
+ R64ui = 40,
+ R64i = 41,
}
public enum ImageChannelOrder
@@ -556,8 +558,10 @@
BaseVertex = 4424,
BaseInstance = 4425,
DrawIndex = 4426,
+ PrimitiveShadingRateKHR = 4432,
DeviceIndex = 4438,
ViewIndex = 4440,
+ ShadingRateKHR = 4444,
BaryCoordNoPerspAMD = 4992,
BaryCoordNoPerspCentroidAMD = 4993,
BaryCoordNoPerspSampleAMD = 4994,
@@ -874,6 +878,7 @@
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
+ FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
SubgroupVoteKHR = 4431,
@@ -904,6 +909,7 @@
FragmentMaskAMD = 5010,
StencilExportEXT = 5013,
ImageReadWriteLodAMD = 5015,
+ Int64ImageEXT = 5016,
ShaderClockKHR = 5055,
SampleMaskOverrideCoverageNV = 5249,
GeometryShaderPassthroughNV = 5251,
@@ -1028,6 +1034,23 @@
RayQueryCandidateIntersectionAABBKHR = 1,
}
+ public enum FragmentShadingRateShift
+ {
+ Vertical2Pixels = 0,
+ Vertical4Pixels = 1,
+ Horizontal2Pixels = 2,
+ Horizontal4Pixels = 3,
+ }
+
+ public enum FragmentShadingRateMask
+ {
+ MaskNone = 0,
+ Vertical2Pixels = 0x00000001,
+ Vertical4Pixels = 0x00000002,
+ Horizontal2Pixels = 0x00000004,
+ Horizontal4Pixels = 0x00000008,
+ }
+
public enum Op
{
OpNop = 0,
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.h b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.h
index 1e999f2..4e36b3a 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.h
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.h
@@ -54,11 +54,11 @@
typedef unsigned int SpvId;
#define SPV_VERSION 0x10500
-#define SPV_REVISION 3
+#define SPV_REVISION 4
static const unsigned int SpvMagicNumber = 0x07230203;
static const unsigned int SpvVersion = 0x00010500;
-static const unsigned int SpvRevision = 3;
+static const unsigned int SpvRevision = 4;
static const unsigned int SpvOpCodeMask = 0xffff;
static const unsigned int SpvWordCountShift = 16;
@@ -278,6 +278,8 @@
SpvImageFormatRg8ui = 37,
SpvImageFormatR16ui = 38,
SpvImageFormatR8ui = 39,
+ SpvImageFormatR64ui = 40,
+ SpvImageFormatR64i = 41,
SpvImageFormatMax = 0x7fffffff,
} SpvImageFormat;
@@ -562,8 +564,10 @@
SpvBuiltInBaseVertex = 4424,
SpvBuiltInBaseInstance = 4425,
SpvBuiltInDrawIndex = 4426,
+ SpvBuiltInPrimitiveShadingRateKHR = 4432,
SpvBuiltInDeviceIndex = 4438,
SpvBuiltInViewIndex = 4440,
+ SpvBuiltInShadingRateKHR = 4444,
SpvBuiltInBaryCoordNoPerspAMD = 4992,
SpvBuiltInBaryCoordNoPerspCentroidAMD = 4993,
SpvBuiltInBaryCoordNoPerspSampleAMD = 4994,
@@ -874,6 +878,7 @@
SpvCapabilityGroupNonUniformQuad = 68,
SpvCapabilityShaderLayer = 69,
SpvCapabilityShaderViewportIndex = 70,
+ SpvCapabilityFragmentShadingRateKHR = 4422,
SpvCapabilitySubgroupBallotKHR = 4423,
SpvCapabilityDrawParameters = 4427,
SpvCapabilitySubgroupVoteKHR = 4431,
@@ -904,6 +909,7 @@
SpvCapabilityFragmentMaskAMD = 5010,
SpvCapabilityStencilExportEXT = 5013,
SpvCapabilityImageReadWriteLodAMD = 5015,
+ SpvCapabilityInt64ImageEXT = 5016,
SpvCapabilityShaderClockKHR = 5055,
SpvCapabilitySampleMaskOverrideCoverageNV = 5249,
SpvCapabilityGeometryShaderPassthroughNV = 5251,
@@ -1028,6 +1034,22 @@
SpvRayQueryCandidateIntersectionTypeMax = 0x7fffffff,
} SpvRayQueryCandidateIntersectionType;
+typedef enum SpvFragmentShadingRateShift_ {
+ SpvFragmentShadingRateVertical2PixelsShift = 0,
+ SpvFragmentShadingRateVertical4PixelsShift = 1,
+ SpvFragmentShadingRateHorizontal2PixelsShift = 2,
+ SpvFragmentShadingRateHorizontal4PixelsShift = 3,
+ SpvFragmentShadingRateMax = 0x7fffffff,
+} SpvFragmentShadingRateShift;
+
+typedef enum SpvFragmentShadingRateMask_ {
+ SpvFragmentShadingRateMaskNone = 0,
+ SpvFragmentShadingRateVertical2PixelsMask = 0x00000001,
+ SpvFragmentShadingRateVertical4PixelsMask = 0x00000002,
+ SpvFragmentShadingRateHorizontal2PixelsMask = 0x00000004,
+ SpvFragmentShadingRateHorizontal4PixelsMask = 0x00000008,
+} SpvFragmentShadingRateMask;
+
typedef enum SpvOp_ {
SpvOpNop = 0,
SpvOpUndef = 1,
@@ -1944,9 +1966,9 @@
case SpvOpPtrEqual: *hasResult = true; *hasResultType = true; break;
case SpvOpPtrNotEqual: *hasResult = true; *hasResultType = true; break;
case SpvOpPtrDiff: *hasResult = true; *hasResultType = true; break;
+ case SpvOpTerminateInvocation: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break;
- case SpvOpTerminateInvocation: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp
index 489cb75..988545c 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp
@@ -50,11 +50,11 @@
typedef unsigned int Id;
#define SPV_VERSION 0x10500
-#define SPV_REVISION 3
+#define SPV_REVISION 4
static const unsigned int MagicNumber = 0x07230203;
static const unsigned int Version = 0x00010500;
-static const unsigned int Revision = 3;
+static const unsigned int Revision = 4;
static const unsigned int OpCodeMask = 0xffff;
static const unsigned int WordCountShift = 16;
@@ -274,6 +274,8 @@
ImageFormatRg8ui = 37,
ImageFormatR16ui = 38,
ImageFormatR8ui = 39,
+ ImageFormatR64ui = 40,
+ ImageFormatR64i = 41,
ImageFormatMax = 0x7fffffff,
};
@@ -558,8 +560,10 @@
BuiltInBaseVertex = 4424,
BuiltInBaseInstance = 4425,
BuiltInDrawIndex = 4426,
+ BuiltInPrimitiveShadingRateKHR = 4432,
BuiltInDeviceIndex = 4438,
BuiltInViewIndex = 4440,
+ BuiltInShadingRateKHR = 4444,
BuiltInBaryCoordNoPerspAMD = 4992,
BuiltInBaryCoordNoPerspCentroidAMD = 4993,
BuiltInBaryCoordNoPerspSampleAMD = 4994,
@@ -870,6 +874,7 @@
CapabilityGroupNonUniformQuad = 68,
CapabilityShaderLayer = 69,
CapabilityShaderViewportIndex = 70,
+ CapabilityFragmentShadingRateKHR = 4422,
CapabilitySubgroupBallotKHR = 4423,
CapabilityDrawParameters = 4427,
CapabilitySubgroupVoteKHR = 4431,
@@ -900,6 +905,7 @@
CapabilityFragmentMaskAMD = 5010,
CapabilityStencilExportEXT = 5013,
CapabilityImageReadWriteLodAMD = 5015,
+ CapabilityInt64ImageEXT = 5016,
CapabilityShaderClockKHR = 5055,
CapabilitySampleMaskOverrideCoverageNV = 5249,
CapabilityGeometryShaderPassthroughNV = 5251,
@@ -1024,6 +1030,22 @@
RayQueryCandidateIntersectionTypeMax = 0x7fffffff,
};
+enum FragmentShadingRateShift {
+ FragmentShadingRateVertical2PixelsShift = 0,
+ FragmentShadingRateVertical4PixelsShift = 1,
+ FragmentShadingRateHorizontal2PixelsShift = 2,
+ FragmentShadingRateHorizontal4PixelsShift = 3,
+ FragmentShadingRateMax = 0x7fffffff,
+};
+
+enum FragmentShadingRateMask {
+ FragmentShadingRateMaskNone = 0,
+ FragmentShadingRateVertical2PixelsMask = 0x00000001,
+ FragmentShadingRateVertical4PixelsMask = 0x00000002,
+ FragmentShadingRateHorizontal2PixelsMask = 0x00000004,
+ FragmentShadingRateHorizontal4PixelsMask = 0x00000008,
+};
+
enum Op {
OpNop = 0,
OpUndef = 1,
@@ -1940,9 +1962,9 @@
case OpPtrEqual: *hasResult = true; *hasResultType = true; break;
case OpPtrNotEqual: *hasResult = true; *hasResultType = true; break;
case OpPtrDiff: *hasResult = true; *hasResultType = true; break;
+ case OpTerminateInvocation: *hasResult = false; *hasResultType = false; break;
case OpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break;
case OpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break;
- case OpTerminateInvocation: *hasResult = false; *hasResultType = false; break;
case OpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case OpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case OpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
@@ -2166,6 +2188,7 @@
inline MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); }
inline KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); }
inline RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); }
+inline FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); }
} // end namespace spv
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp11 b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp11
index 8ab4131..1e7d12e 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp11
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.hpp11
@@ -50,11 +50,11 @@
typedef unsigned int Id;
#define SPV_VERSION 0x10500
-#define SPV_REVISION 3
+#define SPV_REVISION 4
static const unsigned int MagicNumber = 0x07230203;
static const unsigned int Version = 0x00010500;
-static const unsigned int Revision = 3;
+static const unsigned int Revision = 4;
static const unsigned int OpCodeMask = 0xffff;
static const unsigned int WordCountShift = 16;
@@ -274,6 +274,8 @@
Rg8ui = 37,
R16ui = 38,
R8ui = 39,
+ R64ui = 40,
+ R64i = 41,
Max = 0x7fffffff,
};
@@ -558,8 +560,10 @@
BaseVertex = 4424,
BaseInstance = 4425,
DrawIndex = 4426,
+ PrimitiveShadingRateKHR = 4432,
DeviceIndex = 4438,
ViewIndex = 4440,
+ ShadingRateKHR = 4444,
BaryCoordNoPerspAMD = 4992,
BaryCoordNoPerspCentroidAMD = 4993,
BaryCoordNoPerspSampleAMD = 4994,
@@ -870,6 +874,7 @@
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
+ FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
SubgroupVoteKHR = 4431,
@@ -900,6 +905,7 @@
FragmentMaskAMD = 5010,
StencilExportEXT = 5013,
ImageReadWriteLodAMD = 5015,
+ Int64ImageEXT = 5016,
ShaderClockKHR = 5055,
SampleMaskOverrideCoverageNV = 5249,
GeometryShaderPassthroughNV = 5251,
@@ -1024,6 +1030,22 @@
Max = 0x7fffffff,
};
+enum class FragmentShadingRateShift : unsigned {
+ Vertical2Pixels = 0,
+ Vertical4Pixels = 1,
+ Horizontal2Pixels = 2,
+ Horizontal4Pixels = 3,
+ Max = 0x7fffffff,
+};
+
+enum class FragmentShadingRateMask : unsigned {
+ MaskNone = 0,
+ Vertical2Pixels = 0x00000001,
+ Vertical4Pixels = 0x00000002,
+ Horizontal2Pixels = 0x00000004,
+ Horizontal4Pixels = 0x00000008,
+};
+
enum class Op : unsigned {
OpNop = 0,
OpUndef = 1,
@@ -1940,9 +1962,9 @@
case Op::OpPtrEqual: *hasResult = true; *hasResultType = true; break;
case Op::OpPtrNotEqual: *hasResult = true; *hasResultType = true; break;
case Op::OpPtrDiff: *hasResult = true; *hasResultType = true; break;
+ case Op::OpTerminateInvocation: *hasResult = false; *hasResultType = false; break;
case Op::OpSubgroupBallotKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupFirstInvocationKHR: *hasResult = true; *hasResultType = true; break;
- case Op::OpTerminateInvocation: *hasResult = false; *hasResultType = false; break;
case Op::OpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
@@ -2166,6 +2188,7 @@
inline MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); }
inline KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); }
inline RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); }
+inline FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); }
} // end namespace spv
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.json b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.json
index 1db1cd6..8353274 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.json
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.json
@@ -55,7 +55,7 @@
],
"MagicNumber": 119734787,
"Version": 66816,
- "Revision": 3,
+ "Revision": 4,
"OpCodeMask": 65535,
"WordCountShift": 16
},
@@ -307,7 +307,9 @@
"Rg16ui": 36,
"Rg8ui": 37,
"R16ui": 38,
- "R8ui": 39
+ "R8ui": 39,
+ "R64ui": 40,
+ "R64i": 41
}
},
{
@@ -591,8 +593,10 @@
"BaseVertex": 4424,
"BaseInstance": 4425,
"DrawIndex": 4426,
+ "PrimitiveShadingRateKHR": 4432,
"DeviceIndex": 4438,
"ViewIndex": 4440,
+ "ShadingRateKHR": 4444,
"BaryCoordNoPerspAMD": 4992,
"BaryCoordNoPerspCentroidAMD": 4993,
"BaryCoordNoPerspSampleAMD": 4994,
@@ -860,6 +864,7 @@
"GroupNonUniformQuad": 68,
"ShaderLayer": 69,
"ShaderViewportIndex": 70,
+ "FragmentShadingRateKHR": 4422,
"SubgroupBallotKHR": 4423,
"DrawParameters": 4427,
"SubgroupVoteKHR": 4431,
@@ -890,6 +895,7 @@
"FragmentMaskAMD": 5010,
"StencilExportEXT": 5013,
"ImageReadWriteLodAMD": 5015,
+ "Int64ImageEXT": 5016,
"ShaderClockKHR": 5055,
"SampleMaskOverrideCoverageNV": 5249,
"GeometryShaderPassthroughNV": 5251,
@@ -1012,6 +1018,17 @@
}
},
{
+ "Name": "FragmentShadingRate",
+ "Type": "Bit",
+ "Values":
+ {
+ "Vertical2Pixels": 0,
+ "Vertical4Pixels": 1,
+ "Horizontal2Pixels": 2,
+ "Horizontal4Pixels": 3
+ }
+ },
+ {
"Name": "Op",
"Type": "Value",
"Values":
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.lua b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.lua
index 7002ed9..d97af41 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.lua
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.lua
@@ -45,7 +45,7 @@
spv = {
MagicNumber = 0x07230203,
Version = 0x00010500,
- Revision = 3,
+ Revision = 4,
OpCodeMask = 0xffff,
WordCountShift = 16,
@@ -256,6 +256,8 @@
Rg8ui = 37,
R16ui = 38,
R8ui = 39,
+ R64ui = 40,
+ R64i = 41,
},
ImageChannelOrder = {
@@ -530,8 +532,10 @@
BaseVertex = 4424,
BaseInstance = 4425,
DrawIndex = 4426,
+ PrimitiveShadingRateKHR = 4432,
DeviceIndex = 4438,
ViewIndex = 4440,
+ ShadingRateKHR = 4444,
BaryCoordNoPerspAMD = 4992,
BaryCoordNoPerspCentroidAMD = 4993,
BaryCoordNoPerspSampleAMD = 4994,
@@ -832,6 +836,7 @@
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
+ FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
SubgroupVoteKHR = 4431,
@@ -862,6 +867,7 @@
FragmentMaskAMD = 5010,
StencilExportEXT = 5013,
ImageReadWriteLodAMD = 5015,
+ Int64ImageEXT = 5016,
ShaderClockKHR = 5055,
SampleMaskOverrideCoverageNV = 5249,
GeometryShaderPassthroughNV = 5251,
@@ -981,6 +987,21 @@
RayQueryCandidateIntersectionAABBKHR = 1,
},
+ FragmentShadingRateShift = {
+ Vertical2Pixels = 0,
+ Vertical4Pixels = 1,
+ Horizontal2Pixels = 2,
+ Horizontal4Pixels = 3,
+ },
+
+ FragmentShadingRateMask = {
+ MaskNone = 0,
+ Vertical2Pixels = 0x00000001,
+ Vertical4Pixels = 0x00000002,
+ Horizontal2Pixels = 0x00000004,
+ Horizontal4Pixels = 0x00000008,
+ },
+
Op = {
OpNop = 0,
OpUndef = 1,
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.py b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.py
index b2e469d..869b7f3 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spirv.py
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spirv.py
@@ -45,7 +45,7 @@
spv = {
'MagicNumber' : 0x07230203,
'Version' : 0x00010500,
- 'Revision' : 3,
+ 'Revision' : 4,
'OpCodeMask' : 0xffff,
'WordCountShift' : 16,
@@ -256,6 +256,8 @@
'Rg8ui' : 37,
'R16ui' : 38,
'R8ui' : 39,
+ 'R64ui' : 40,
+ 'R64i' : 41,
},
'ImageChannelOrder' : {
@@ -530,8 +532,10 @@
'BaseVertex' : 4424,
'BaseInstance' : 4425,
'DrawIndex' : 4426,
+ 'PrimitiveShadingRateKHR' : 4432,
'DeviceIndex' : 4438,
'ViewIndex' : 4440,
+ 'ShadingRateKHR' : 4444,
'BaryCoordNoPerspAMD' : 4992,
'BaryCoordNoPerspCentroidAMD' : 4993,
'BaryCoordNoPerspSampleAMD' : 4994,
@@ -832,6 +836,7 @@
'GroupNonUniformQuad' : 68,
'ShaderLayer' : 69,
'ShaderViewportIndex' : 70,
+ 'FragmentShadingRateKHR' : 4422,
'SubgroupBallotKHR' : 4423,
'DrawParameters' : 4427,
'SubgroupVoteKHR' : 4431,
@@ -862,6 +867,7 @@
'FragmentMaskAMD' : 5010,
'StencilExportEXT' : 5013,
'ImageReadWriteLodAMD' : 5015,
+ 'Int64ImageEXT' : 5016,
'ShaderClockKHR' : 5055,
'SampleMaskOverrideCoverageNV' : 5249,
'GeometryShaderPassthroughNV' : 5251,
@@ -981,6 +987,21 @@
'RayQueryCandidateIntersectionAABBKHR' : 1,
},
+ 'FragmentShadingRateShift' : {
+ 'Vertical2Pixels' : 0,
+ 'Vertical4Pixels' : 1,
+ 'Horizontal2Pixels' : 2,
+ 'Horizontal4Pixels' : 3,
+ },
+
+ 'FragmentShadingRateMask' : {
+ 'MaskNone' : 0,
+ 'Vertical2Pixels' : 0x00000001,
+ 'Vertical4Pixels' : 0x00000002,
+ 'Horizontal2Pixels' : 0x00000004,
+ 'Horizontal4Pixels' : 0x00000008,
+ },
+
'Op' : {
'OpNop' : 0,
'OpUndef' : 1,
diff --git a/third_party/SPIRV-Headers/include/spirv/unified1/spv.d b/third_party/SPIRV-Headers/include/spirv/unified1/spv.d
index 3a1c6b1..714e77f 100644
--- a/third_party/SPIRV-Headers/include/spirv/unified1/spv.d
+++ b/third_party/SPIRV-Headers/include/spirv/unified1/spv.d
@@ -52,7 +52,7 @@
enum uint MagicNumber = 0x07230203;
enum uint Version = 0x00010500;
-enum uint Revision = 3;
+enum uint Revision = 4;
enum uint OpCodeMask = 0xffff;
enum uint WordCountShift = 16;
@@ -273,6 +273,8 @@
Rg8ui = 37,
R16ui = 38,
R8ui = 39,
+ R64ui = 40,
+ R64i = 41,
}
enum ImageChannelOrder : uint
@@ -559,8 +561,10 @@
BaseVertex = 4424,
BaseInstance = 4425,
DrawIndex = 4426,
+ PrimitiveShadingRateKHR = 4432,
DeviceIndex = 4438,
ViewIndex = 4440,
+ ShadingRateKHR = 4444,
BaryCoordNoPerspAMD = 4992,
BaryCoordNoPerspCentroidAMD = 4993,
BaryCoordNoPerspSampleAMD = 4994,
@@ -877,6 +881,7 @@
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
+ FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
SubgroupVoteKHR = 4431,
@@ -907,6 +912,7 @@
FragmentMaskAMD = 5010,
StencilExportEXT = 5013,
ImageReadWriteLodAMD = 5015,
+ Int64ImageEXT = 5016,
ShaderClockKHR = 5055,
SampleMaskOverrideCoverageNV = 5249,
GeometryShaderPassthroughNV = 5251,
@@ -1031,6 +1037,23 @@
RayQueryCandidateIntersectionAABBKHR = 1,
}
+enum FragmentShadingRateShift : uint
+{
+ Vertical2Pixels = 0,
+ Vertical4Pixels = 1,
+ Horizontal2Pixels = 2,
+ Horizontal4Pixels = 3,
+}
+
+enum FragmentShadingRateMask : uint
+{
+ MaskNone = 0,
+ Vertical2Pixels = 0x00000001,
+ Vertical4Pixels = 0x00000002,
+ Horizontal2Pixels = 0x00000004,
+ Horizontal4Pixels = 0x00000008,
+}
+
enum Op : uint
{
OpNop = 0,
diff --git a/third_party/SPIRV-Headers/tools/buildHeaders/bin/makeExtinstHeaders.py b/third_party/SPIRV-Headers/tools/buildHeaders/bin/makeExtinstHeaders.py
index 780e479..9359747 100755
--- a/third_party/SPIRV-Headers/tools/buildHeaders/bin/makeExtinstHeaders.py
+++ b/third_party/SPIRV-Headers/tools/buildHeaders/bin/makeExtinstHeaders.py
@@ -25,3 +25,4 @@
mk_extinst('AMD_shader_explicit_vertex_parameter', 'extinst.spv-amd-shader-explicit-vertex-parameter.grammar.json')
mk_extinst('AMD_shader_trinary_minmax', 'extinst.spv-amd-shader-trinary-minmax.grammar.json')
mk_extinst('NonSemanticDebugPrintf', 'extinst.nonsemantic.debugprintf.grammar.json')
+mk_extinst('NonSemanticClspvReflection', 'extinst.nonsemantic.clspvreflection.grammar.json')
diff --git a/third_party/SPIRV-Headers/tools/buildHeaders/header.cpp b/third_party/SPIRV-Headers/tools/buildHeaders/header.cpp
index aad94f7..926905e 100644
--- a/third_party/SPIRV-Headers/tools/buildHeaders/header.cpp
+++ b/third_party/SPIRV-Headers/tools/buildHeaders/header.cpp
@@ -70,8 +70,8 @@
static const int DocMagicNumber = 0x07230203;
static const int DocVersion = 0x00010500;
- static const int DocRevision = 3;
- #define DocRevisionString "3"
+ static const int DocRevision = 4;
+ #define DocRevisionString "4"
static const std::string DocCopyright;
static const std::string DocComment1;
static const std::string DocComment2;
diff --git a/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.cpp b/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.cpp
index 5cca0b9..2118678 100644
--- a/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.cpp
+++ b/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.cpp
@@ -81,6 +81,7 @@
EnumValues RayQueryIntersectionParams;
EnumValues RayQueryCommittedIntersectionTypeParams;
EnumValues RayQueryCandidateIntersectionTypeParams;
+EnumValues FragmentShadingRateParams;
std::pair<bool, std::string> ReadFile(const std::string& path)
{
@@ -215,6 +216,8 @@
type = OperandRayQueryCommittedIntersectionType;
} else if (operandKind == "RayQueryCandidateIntersectionType") {
type = OperandRayQueryCandidateIntersectionType;
+ } else if (operandKind == "FragmentShadingRate") {
+ type = OperandFragmentShadingRate;
}
if (type == OperandNone) {
@@ -483,6 +486,8 @@
establishOperandClass(enumName, OperandRayQueryCommittedIntersectionType, &RayQueryCommittedIntersectionTypeParams, operandEnum, category);
} else if (enumName == "RayQueryCandidateIntersectionType") {
establishOperandClass(enumName, OperandRayQueryCandidateIntersectionType, &RayQueryCandidateIntersectionTypeParams, operandEnum, category);
+ } else if (enumName == "FragmentShadingRate") {
+ establishOperandClass(enumName, OperandFragmentShadingRate, &FragmentShadingRateParams, operandEnum, category);
}
}
}
diff --git a/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.h b/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.h
index 732eed5..72c7cde 100644
--- a/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.h
+++ b/third_party/SPIRV-Headers/tools/buildHeaders/jsonToSpirv.h
@@ -88,6 +88,7 @@
OperandRayQueryIntersection,
OperandRayQueryCommittedIntersectionType,
OperandRayQueryCandidateIntersectionType,
+ OperandFragmentShadingRate,
OperandOpcode,
