Revert "SprivShader: Replace hand-rolled bitreverse with LLVM intrinsic"
This reverts commit a786c4a28d4beb9489bba43b34cebed702ab2e66.
Reason for revert: Breaks LLVM 3 reactor backend.
Change-Id: Ia7353182bbeab8f357bd9e4dababcc24e6cdd811
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/29128
Reviewed-by: Ben Clayton <bclayton@google.com>
Tested-by: Ben Clayton <bclayton@google.com>
diff --git a/src/Pipeline/SpirvShader.cpp b/src/Pipeline/SpirvShader.cpp
index 201541d..031bbf1 100644
--- a/src/Pipeline/SpirvShader.cpp
+++ b/src/Pipeline/SpirvShader.cpp
@@ -2772,7 +2772,17 @@
}
case spv::OpBitReverse:
{
- dst.move(i, BitReverse(src.UInt(i)));
+ // TODO: Add an intrinsic to reactor. Even if there isn't a
+ // single vector instruction, there may be target-dependent
+ // ways to make this faster.
+ // https://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
+ SIMD::UInt v = src.UInt(i);
+ v = ((v >> 1) & SIMD::UInt(0x55555555)) | ((v & SIMD::UInt(0x55555555)) << 1);
+ v = ((v >> 2) & SIMD::UInt(0x33333333)) | ((v & SIMD::UInt(0x33333333)) << 2);
+ v = ((v >> 4) & SIMD::UInt(0x0F0F0F0F)) | ((v & SIMD::UInt(0x0F0F0F0F)) << 4);
+ v = ((v >> 8) & SIMD::UInt(0x00FF00FF)) | ((v & SIMD::UInt(0x00FF00FF)) << 8);
+ v = (v >> 16) | (v << 16);
+ dst.move(i, v);
break;
}
case spv::OpBitCount:
diff --git a/src/Reactor/LLVMReactor.cpp b/src/Reactor/LLVMReactor.cpp
index de30f2e..418e66d 100644
--- a/src/Reactor/LLVMReactor.cpp
+++ b/src/Reactor/LLVMReactor.cpp
@@ -3214,12 +3214,6 @@
return RValue<Float4>(V(::builder->CreateCall(func, V(v.value))));
}
- RValue<UInt4> BitReverse(RValue<UInt4> v)
- {
- auto func = llvm::Intrinsic::getDeclaration(::module, llvm::Intrinsic::bitreverse, { T(UInt4::getType()) } );
- return RValue<UInt4>(V(::builder->CreateCall(func, { V(v.value) })));
- }
-
RValue<UInt4> Ctlz(RValue<UInt4> v, bool isZeroUndef)
{
#if REACTOR_LLVM_VERSION < 7
diff --git a/src/Reactor/Reactor.hpp b/src/Reactor/Reactor.hpp
index c119d45..1d2b2b0 100644
--- a/src/Reactor/Reactor.hpp
+++ b/src/Reactor/Reactor.hpp
@@ -2232,7 +2232,6 @@
// Bit Manipulation functions.
// TODO: Currentlhy unimplemented for Subzero.
- RValue<UInt4> BitReverse(RValue<UInt4> x);
// Count leading zeros.
// Returns 32 when: isZeroUndef && x == 0.
diff --git a/src/Reactor/SubzeroReactor.cpp b/src/Reactor/SubzeroReactor.cpp
index c6e16f0..27604a8 100644
--- a/src/Reactor/SubzeroReactor.cpp
+++ b/src/Reactor/SubzeroReactor.cpp
@@ -3359,18 +3359,6 @@
}
}
- RValue<UInt4> BitReverse(RValue<UInt4> x)
- {
- // https://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
- UInt4 v = x;
- v = ((v >> 1) & UInt4(0x55555555)) | ((v & UInt4(0x55555555)) << 1);
- v = ((v >> 2) & UInt4(0x33333333)) | ((v & UInt4(0x33333333)) << 2);
- v = ((v >> 4) & UInt4(0x0F0F0F0F)) | ((v & UInt4(0x0F0F0F0F)) << 4);
- v = ((v >> 8) & UInt4(0x00FF00FF)) | ((v & UInt4(0x00FF00FF)) << 8);
- v = (v >> 16) | (v << 16);
- return v;
- }
-
Type *Float4::getType()
{
return T(Ice::IceType_v4f32);
