third_party/llvm-7.0/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |

  define void @add_i32(i32 %x, i32 %y) {entry: ret void}

...
---
name:            add_i32
alignment:       2
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $a0, $a1

    ; MIPS32-LABEL: name: add_i32
    ; MIPS32: liveins: $a0, $a1
    ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1
    ; MIPS32: [[ADD:%[0-9]+]]:gprb(s32) = G_ADD [[COPY]], [[COPY1]]
    ; MIPS32: $v0 = COPY [[ADD]](s32)
    ; MIPS32: RetRA implicit $v0
    %0:_(s32) = COPY $a0
    %1:_(s32) = COPY $a1
    %2:_(s32) = G_ADD %0, %1
    $v0 = COPY %2(s32)
    RetRA implicit $v0

...