| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64 |
| |
| --- | |
| define i64 @test_zext_i1(i8 %a) { |
| %val = trunc i8 %a to i1 |
| %r = zext i1 %val to i64 |
| ret i64 %r |
| } |
| |
| define i64 @test_sext_i8(i8 %val) { |
| %r = sext i8 %val to i64 |
| ret i64 %r |
| } |
| |
| define i64 @test_sext_i16(i16 %val) { |
| %r = sext i16 %val to i64 |
| ret i64 %r |
| } |
| |
| define void @anyext_s64_from_s1() { ret void } |
| define void @anyext_s64_from_s8() { ret void } |
| define void @anyext_s64_from_s16() { ret void } |
| define void @anyext_s64_from_s32() { ret void } |
| ... |
| --- |
| name: test_zext_i1 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| - { id: 2, class: gpr } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_zext_i1 |
| ; ALL: [[COPY:%[0-9]+]]:gr8 = COPY $dil |
| ; ALL: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_8bit |
| ; ALL: [[AND64ri8_:%[0-9]+]]:gr64 = AND64ri8 [[SUBREG_TO_REG]], 1, implicit-def $eflags |
| ; ALL: $rax = COPY [[AND64ri8_]] |
| ; ALL: RET 0, implicit $rax |
| %0(s8) = COPY $dil |
| %1(s1) = G_TRUNC %0(s8) |
| %2(s64) = G_ZEXT %1(s1) |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| |
| ... |
| --- |
| name: test_sext_i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_sext_i8 |
| ; ALL: [[COPY:%[0-9]+]]:gr8 = COPY $dil |
| ; ALL: [[MOVSX64rr8_:%[0-9]+]]:gr64 = MOVSX64rr8 [[COPY]] |
| ; ALL: $rax = COPY [[MOVSX64rr8_]] |
| ; ALL: RET 0, implicit $rax |
| %0(s8) = COPY $dil |
| %1(s64) = G_SEXT %0(s8) |
| $rax = COPY %1(s64) |
| RET 0, implicit $rax |
| |
| ... |
| --- |
| name: test_sext_i16 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_sext_i16 |
| ; ALL: [[COPY:%[0-9]+]]:gr16 = COPY $di |
| ; ALL: [[MOVSX64rr16_:%[0-9]+]]:gr64 = MOVSX64rr16 [[COPY]] |
| ; ALL: $rax = COPY [[MOVSX64rr16_]] |
| ; ALL: RET 0, implicit $rax |
| %0(s16) = COPY $di |
| %1(s64) = G_SEXT %0(s16) |
| $rax = COPY %1(s64) |
| RET 0, implicit $rax |
| |
| ... |
| --- |
| name: anyext_s64_from_s1 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| - { id: 2, class: gpr } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: anyext_s64_from_s1 |
| ; ALL: [[COPY:%[0-9]+]]:gr64_with_sub_8bit = COPY $rdi |
| ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit |
| ; ALL: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit |
| ; ALL: $rax = COPY [[SUBREG_TO_REG]] |
| ; ALL: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s1) = G_TRUNC %0(s64) |
| %2(s64) = G_ANYEXT %1(s1) |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| ... |
| --- |
| name: anyext_s64_from_s8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| - { id: 2, class: gpr } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: anyext_s64_from_s8 |
| ; ALL: [[COPY:%[0-9]+]]:gr64_with_sub_8bit = COPY $rdi |
| ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit |
| ; ALL: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit |
| ; ALL: $rax = COPY [[SUBREG_TO_REG]] |
| ; ALL: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s8) = G_TRUNC %0(s64) |
| %2(s64) = G_ANYEXT %1(s8) |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| ... |
| --- |
| name: anyext_s64_from_s16 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| - { id: 2, class: gpr } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: anyext_s64_from_s16 |
| ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi |
| ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit |
| ; ALL: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_16bit |
| ; ALL: $rax = COPY [[SUBREG_TO_REG]] |
| ; ALL: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s16) = G_TRUNC %0(s64) |
| %2(s64) = G_ANYEXT %1(s16) |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| ... |
| --- |
| name: anyext_s64_from_s32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| - { id: 2, class: gpr } |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: anyext_s64_from_s32 |
| ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi |
| ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY [[COPY]].sub_32bit |
| ; ALL: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_32bit |
| ; ALL: $rax = COPY [[SUBREG_TO_REG]] |
| ; ALL: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s32) = G_TRUNC %0(s64) |
| %2(s64) = G_ANYEXT %1(s32) |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| ... |