| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL |
| --- | |
| |
| define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) { |
| %res = ashr i64 %arg1, %arg2 |
| ret i64 %res |
| } |
| |
| define i64 @test_ashr_i64_imm(i64 %arg1) { |
| %res = ashr i64 %arg1, 5 |
| ret i64 %res |
| } |
| |
| define i64 @test_ashr_i64_imm1(i64 %arg1) { |
| %res = ashr i64 %arg1, 1 |
| ret i64 %res |
| } |
| |
| define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) { |
| %res = ashr i32 %arg1, %arg2 |
| ret i32 %res |
| } |
| |
| define i32 @test_ashr_i32_imm(i32 %arg1) { |
| %res = ashr i32 %arg1, 5 |
| ret i32 %res |
| } |
| |
| define i32 @test_ashr_i32_imm1(i32 %arg1) { |
| %res = ashr i32 %arg1, 1 |
| ret i32 %res |
| } |
| |
| define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) { |
| %a = trunc i32 %arg1 to i16 |
| %a2 = trunc i32 %arg2 to i16 |
| %res = ashr i16 %a, %a2 |
| ret i16 %res |
| } |
| |
| define i16 @test_ashr_i16_imm(i32 %arg1) { |
| %a = trunc i32 %arg1 to i16 |
| %res = ashr i16 %a, 5 |
| ret i16 %res |
| } |
| |
| define i16 @test_ashr_i16_imm1(i32 %arg1) { |
| %a = trunc i32 %arg1 to i16 |
| %res = ashr i16 %a, 1 |
| ret i16 %res |
| } |
| |
| define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) { |
| %a = trunc i32 %arg1 to i8 |
| %a2 = trunc i32 %arg2 to i8 |
| %res = ashr i8 %a, %a2 |
| ret i8 %res |
| } |
| |
| define i8 @test_ashr_i8_imm(i32 %arg1) { |
| %a = trunc i32 %arg1 to i8 |
| %res = ashr i8 %a, 5 |
| ret i8 %res |
| } |
| |
| define i8 @test_ashr_i8_imm1(i32 %arg1) { |
| %a = trunc i32 %arg1 to i8 |
| %res = ashr i8 %a, 1 |
| ret i8 %res |
| } |
| ... |
| --- |
| name: test_ashr_i64 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $rdi, $rsi |
| |
| ; ALL-LABEL: name: test_ashr_i64 |
| ; ALL: liveins: $rdi, $rsi |
| ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi |
| ; ALL: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi |
| ; ALL: $rcx = COPY [[COPY1]] |
| ; ALL: $cl = KILL killed $rcx |
| ; ALL: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def $eflags, implicit $cl |
| ; ALL: $rax = COPY [[SAR64rCL]] |
| ; ALL: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s64) = COPY $rsi |
| %2(s64) = G_ASHR %0, %1 |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| |
| ... |
| --- |
| name: test_ashr_i64_imm |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $rdi |
| |
| ; ALL-LABEL: name: test_ashr_i64_imm |
| ; ALL: liveins: $rdi |
| ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi |
| ; ALL: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 5 |
| ; ALL: $rcx = COPY [[MOV64ri32_]] |
| ; ALL: $cl = KILL killed $rcx |
| ; ALL: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def $eflags, implicit $cl |
| ; ALL: $rax = COPY [[SAR64rCL]] |
| ; ALL: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s64) = G_CONSTANT i64 5 |
| %2(s64) = G_ASHR %0, %1 |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| |
| ... |
| --- |
| name: test_ashr_i64_imm1 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $rdi |
| |
| ; ALL-LABEL: name: test_ashr_i64_imm1 |
| ; ALL: liveins: $rdi |
| ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi |
| ; ALL: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 1 |
| ; ALL: $rcx = COPY [[MOV64ri32_]] |
| ; ALL: $cl = KILL killed $rcx |
| ; ALL: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def $eflags, implicit $cl |
| ; ALL: $rax = COPY [[SAR64rCL]] |
| ; ALL: RET 0, implicit $rax |
| %0(s64) = COPY $rdi |
| %1(s64) = G_CONSTANT i64 1 |
| %2(s64) = G_ASHR %0, %1 |
| $rax = COPY %2(s64) |
| RET 0, implicit $rax |
| |
| ... |
| --- |
| name: test_ashr_i32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi, $esi |
| |
| ; ALL-LABEL: name: test_ashr_i32 |
| ; ALL: liveins: $edi, $esi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi |
| ; ALL: $ecx = COPY [[COPY1]] |
| ; ALL: $cl = KILL killed $ecx |
| ; ALL: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def $eflags, implicit $cl |
| ; ALL: $eax = COPY [[SAR32rCL]] |
| ; ALL: RET 0, implicit $eax |
| %0(s32) = COPY $edi |
| %1(s32) = COPY $esi |
| %2(s32) = G_ASHR %0, %1 |
| $eax = COPY %2(s32) |
| RET 0, implicit $eax |
| |
| ... |
| --- |
| name: test_ashr_i32_imm |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_ashr_i32_imm |
| ; ALL: liveins: $edi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 5 |
| ; ALL: $ecx = COPY [[MOV32ri]] |
| ; ALL: $cl = KILL killed $ecx |
| ; ALL: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def $eflags, implicit $cl |
| ; ALL: $eax = COPY [[SAR32rCL]] |
| ; ALL: RET 0, implicit $eax |
| %0(s32) = COPY $edi |
| %1(s32) = G_CONSTANT i32 5 |
| %2(s32) = G_ASHR %0, %1 |
| $eax = COPY %2(s32) |
| RET 0, implicit $eax |
| |
| ... |
| --- |
| name: test_ashr_i32_imm1 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_ashr_i32_imm1 |
| ; ALL: liveins: $edi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 1 |
| ; ALL: $ecx = COPY [[MOV32ri]] |
| ; ALL: $cl = KILL killed $ecx |
| ; ALL: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def $eflags, implicit $cl |
| ; ALL: $eax = COPY [[SAR32rCL]] |
| ; ALL: RET 0, implicit $eax |
| %0(s32) = COPY $edi |
| %1(s32) = G_CONSTANT i32 1 |
| %2(s32) = G_ASHR %0, %1 |
| $eax = COPY %2(s32) |
| RET 0, implicit $eax |
| |
| ... |
| --- |
| name: test_ashr_i16 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| - { id: 3, class: gpr, preferred-register: '' } |
| - { id: 4, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi, $esi |
| |
| ; ALL-LABEL: name: test_ashr_i16 |
| ; ALL: liveins: $edi, $esi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi |
| ; ALL: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit |
| ; ALL: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY1]].sub_16bit |
| ; ALL: $cx = COPY [[COPY3]] |
| ; ALL: $cl = KILL killed $cx |
| ; ALL: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY2]], implicit-def $eflags, implicit $cl |
| ; ALL: $ax = COPY [[SAR16rCL]] |
| ; ALL: RET 0, implicit $ax |
| %0(s32) = COPY $edi |
| %1(s32) = COPY $esi |
| %2(s16) = G_TRUNC %0(s32) |
| %3(s16) = G_TRUNC %1(s32) |
| %4(s16) = G_ASHR %2, %3 |
| $ax = COPY %4(s16) |
| RET 0, implicit $ax |
| |
| ... |
| --- |
| name: test_ashr_i16_imm |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| - { id: 3, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_ashr_i16_imm |
| ; ALL: liveins: $edi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 5 |
| ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit |
| ; ALL: $cx = COPY [[MOV16ri]] |
| ; ALL: $cl = KILL killed $cx |
| ; ALL: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY1]], implicit-def $eflags, implicit $cl |
| ; ALL: $ax = COPY [[SAR16rCL]] |
| ; ALL: RET 0, implicit $ax |
| %0(s32) = COPY $edi |
| %2(s16) = G_CONSTANT i16 5 |
| %1(s16) = G_TRUNC %0(s32) |
| %3(s16) = G_ASHR %1, %2 |
| $ax = COPY %3(s16) |
| RET 0, implicit $ax |
| |
| ... |
| --- |
| name: test_ashr_i16_imm1 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| - { id: 3, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_ashr_i16_imm1 |
| ; ALL: liveins: $edi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 1 |
| ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit |
| ; ALL: $cx = COPY [[MOV16ri]] |
| ; ALL: $cl = KILL killed $cx |
| ; ALL: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY1]], implicit-def $eflags, implicit $cl |
| ; ALL: $ax = COPY [[SAR16rCL]] |
| ; ALL: RET 0, implicit $ax |
| %0(s32) = COPY $edi |
| %2(s16) = G_CONSTANT i16 1 |
| %1(s16) = G_TRUNC %0(s32) |
| %3(s16) = G_ASHR %1, %2 |
| $ax = COPY %3(s16) |
| RET 0, implicit $ax |
| |
| ... |
| --- |
| name: test_ashr_i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| - { id: 3, class: gpr, preferred-register: '' } |
| - { id: 4, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi, $esi |
| |
| ; ALL-LABEL: name: test_ashr_i8 |
| ; ALL: liveins: $edi, $esi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi |
| ; ALL: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit |
| ; ALL: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit |
| ; ALL: $cl = COPY [[COPY3]] |
| ; ALL: [[SAR8rCL:%[0-9]+]]:gr8 = SAR8rCL [[COPY2]], implicit-def $eflags, implicit $cl |
| ; ALL: $al = COPY [[SAR8rCL]] |
| ; ALL: RET 0, implicit $al |
| %0(s32) = COPY $edi |
| %1(s32) = COPY $esi |
| %2(s8) = G_TRUNC %0(s32) |
| %3(s8) = G_TRUNC %1(s32) |
| %4(s8) = G_ASHR %2, %3 |
| $al = COPY %4(s8) |
| RET 0, implicit $al |
| |
| ... |
| --- |
| name: test_ashr_i8_imm |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| - { id: 3, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_ashr_i8_imm |
| ; ALL: liveins: $edi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit |
| ; ALL: [[SAR8ri:%[0-9]+]]:gr8 = SAR8ri [[COPY1]], 5, implicit-def $eflags |
| ; ALL: $al = COPY [[SAR8ri]] |
| ; ALL: RET 0, implicit $al |
| %0(s32) = COPY $edi |
| %2(s8) = G_CONSTANT i8 5 |
| %1(s8) = G_TRUNC %0(s32) |
| %3(s8) = G_ASHR %1, %2 |
| $al = COPY %3(s8) |
| RET 0, implicit $al |
| |
| ... |
| --- |
| name: test_ashr_i8_imm1 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| registers: |
| - { id: 0, class: gpr, preferred-register: '' } |
| - { id: 1, class: gpr, preferred-register: '' } |
| - { id: 2, class: gpr, preferred-register: '' } |
| - { id: 3, class: gpr, preferred-register: '' } |
| liveins: |
| fixedStack: |
| stack: |
| constants: |
| body: | |
| bb.1 (%ir-block.0): |
| liveins: $edi |
| |
| ; ALL-LABEL: name: test_ashr_i8_imm1 |
| ; ALL: liveins: $edi |
| ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit |
| ; ALL: [[SAR8r1_:%[0-9]+]]:gr8 = SAR8r1 [[COPY1]], implicit-def $eflags |
| ; ALL: $al = COPY [[SAR8r1_]] |
| ; ALL: RET 0, implicit $al |
| %0(s32) = COPY $edi |
| %2(s8) = G_CONSTANT i8 1 |
| %1(s8) = G_TRUNC %0(s32) |
| %3(s8) = G_ASHR %1, %2 |
| $al = COPY %3(s8) |
| RET 0, implicit $al |
| |
| ... |