Eliminate support for the PNaCl ABI
PNaCl uses the ILP32 data model, even on x86-64 (cf. the x32 ABI).
Reactor instead always uses LP64 on 64-bit.
The main technical difference is the ILP32 on x86-64 used the address-
size override prefix (0x67) for every instruction that accesses
memory, which makes it look at only the lower 32-bit part of base and
index registers. Note this only works in a sandbox-like environment,
where memory is allocated in the lower 4 GiB range, such as PNaCl.
Bug: b/179832693
Change-Id: I068ddd12b1827e3babc49a06ddf26b932d2082c5
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/55468
Kokoro-Result: kokoro <noreply+kokoro@google.com>
Tested-by: Nicolas Capens <nicolascapens@google.com>
Reviewed-by: Alexis Hétu <sugoi@google.com>
diff --git a/src/Reactor/SubzeroReactor.cpp b/src/Reactor/SubzeroReactor.cpp
index 8799eb8..9127871 100644
--- a/src/Reactor/SubzeroReactor.cpp
+++ b/src/Reactor/SubzeroReactor.cpp
@@ -896,7 +896,6 @@
#endif
Flags.setOutFileType(Ice::FT_Elf);
Flags.setOptLevel(toIce(getDefaultConfig().getOptimization().getLevel()));
- Flags.setApplicationBinaryInterface(Ice::ABI_Platform);
Flags.setVerbose(subzeroDumpEnabled ? Ice::IceV_Most : Ice::IceV_None);
Flags.setDisableHybridAssembly(true);
diff --git a/third_party/subzero/src/IceAssemblerX86Base.h b/third_party/subzero/src/IceAssemblerX86Base.h
index 86a93fc..c6dda23 100644
--- a/third_party/subzero/src/IceAssemblerX86Base.h
+++ b/third_party/subzero/src/IceAssemblerX86Base.h
@@ -44,12 +44,7 @@
AssemblerX86Base &operator=(const AssemblerX86Base &) = delete;
protected:
- explicit AssemblerX86Base(
- bool EmitAddrSizeOverridePrefix = TraitsType::Is64Bit)
- : Assembler(Traits::AsmKind),
- EmitAddrSizeOverridePrefix(EmitAddrSizeOverridePrefix) {
- assert(Traits::Is64Bit || !EmitAddrSizeOverridePrefix);
- }
+ explicit AssemblerX86Base() : Assembler(Traits::AsmKind) {}
public:
using Traits = TraitsType;
@@ -741,11 +736,6 @@
private:
ENABLE_MAKE_UNIQUE;
- // EmidAddrSizeOverridePrefix directs the emission of the 0x67 prefix to
- // force 32-bit registers when accessing memory. This is only used in native
- // 64-bit.
- const bool EmitAddrSizeOverridePrefix;
-
static constexpr Type RexTypeIrrelevant = IceType_i32;
static constexpr Type RexTypeForceRexW = IceType_i64;
static constexpr GPRRegister RexRegIrrelevant =
@@ -780,14 +770,6 @@
Label *getOrCreateLabel(SizeT Number, LabelVector &Labels);
- void emitAddrSizeOverridePrefix() {
- if (!Traits::Is64Bit || !EmitAddrSizeOverridePrefix) {
- return;
- }
- static constexpr uint8_t AddrSizeOverridePrefix = 0x67;
- emitUint8(AddrSizeOverridePrefix);
- }
-
// The arith_int() methods factor out the commonality between the encodings
// of add(), Or(), adc(), sbb(), And(), sub(), Xor(), and cmp(). The Tag
// parameter is statically asserted to be less than 8.
@@ -858,10 +840,10 @@
const uint8_t X = (Addr != nullptr)
? (typename T::Operand::RexBits)Addr->rexX()
: T::Operand::RexNone;
- const uint8_t B =
- (Addr != nullptr)
- ? (typename T::Operand::RexBits)Addr->rexB()
- : (Rm & 0x08) ? T::Operand::RexB : T::Operand::RexNone;
+ const uint8_t B = (Addr != nullptr)
+ ? (typename T::Operand::RexBits)Addr->rexB()
+ : (Rm & 0x08) ? T::Operand::RexB
+ : T::Operand::RexNone;
const uint8_t Prefix = W | R | X | B;
if (Prefix != T::Operand::RexNone) {
emitUint8(Prefix);
diff --git a/third_party/subzero/src/IceAssemblerX86BaseImpl.h b/third_party/subzero/src/IceAssemblerX86BaseImpl.h
index 1646496..aa3da61 100644
--- a/third_party/subzero/src/IceAssemblerX86BaseImpl.h
+++ b/third_party/subzero/src/IceAssemblerX86BaseImpl.h
@@ -116,7 +116,6 @@
template <typename TraitsType>
void AssemblerX86Base<TraitsType>::call(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
emitUint8(0xFF);
emitOperand(2, address);
@@ -186,7 +185,6 @@
template <typename TraitsType>
void AssemblerX86Base<TraitsType>::popl(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
emitUint8(0x8F);
emitOperand(0, address);
@@ -219,7 +217,6 @@
void AssemblerX86Base<TraitsType>::setcc(BrCond condition,
const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
emitUint8(0x0F);
emitUint8(0x90 + condition);
@@ -266,7 +263,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, src, dst);
if (isByteSizedType(Ty)) {
emitUint8(0x8A);
@@ -282,7 +278,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, dst, src);
if (isByteSizedType(Ty)) {
emitUint8(0x88);
@@ -298,7 +293,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, dst, RexRegIrrelevant);
if (isByteSizedType(Ty)) {
emitUint8(0xC6);
@@ -362,7 +356,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
bool ByteSized = isByteSizedType(SrcTy);
assert(ByteSized || SrcTy == IceType_i16);
- emitAddrSizeOverridePrefix();
emitRex(SrcTy, src, RexTypeIrrelevant, dst);
emitUint8(0x0F);
emitUint8(ByteSized ? 0xB6 : 0xB7);
@@ -390,7 +383,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
bool ByteSized = isByteSizedType(SrcTy);
- emitAddrSizeOverridePrefix();
emitRex(SrcTy, src, RexTypeForceRexW, dst);
if (ByteSized || SrcTy == IceType_i16) {
emitUint8(0x0F);
@@ -410,7 +402,6 @@
(Traits::Is64Bit && Ty == IceType_i64));
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, src, dst);
emitUint8(0x8D);
emitOperand(gprEncoding(dst), src);
@@ -438,7 +429,6 @@
emitOperandSizeOverride();
else
assert(Ty == IceType_i32 || (Traits::Is64Bit && Ty == IceType_i64));
- emitAddrSizeOverridePrefix();
emitRex(Ty, src, dst);
emitUint8(0x0F);
emitUint8(0x40 + cond);
@@ -456,7 +446,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x10);
@@ -468,7 +457,6 @@
XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0x11);
@@ -502,7 +490,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(SrcTy, src, dst);
emitUint8(0x0F);
emitUint8(0x6E);
@@ -525,7 +512,6 @@
XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(DestTy, dst, src);
emitUint8(0x0F);
emitUint8(0x7E);
@@ -546,7 +532,6 @@
void AssemblerX86Base<TraitsType>::movq(const Address &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0xD6);
@@ -557,7 +542,6 @@
void AssemblerX86Base<TraitsType>::movq(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xF3);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x7E);
@@ -580,7 +564,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x58);
@@ -603,7 +586,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5C);
@@ -626,7 +608,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x59);
@@ -649,7 +630,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5E);
@@ -661,7 +641,6 @@
void AssemblerX86Base<TraitsType>::fld(Type Ty,
const typename T::Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
emitOperand(0, src);
}
@@ -671,7 +650,6 @@
void AssemblerX86Base<TraitsType>::fstp(Type Ty,
const typename T::Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
emitOperand(3, dst);
}
@@ -705,7 +683,6 @@
template <typename TraitsType>
void AssemblerX86Base<TraitsType>::movups(XmmRegister dst, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x10);
@@ -715,7 +692,6 @@
template <typename TraitsType>
void AssemblerX86Base<TraitsType>::movups(const Address &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0x11);
@@ -744,7 +720,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -779,7 +754,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -814,7 +788,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -843,7 +816,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xDB);
@@ -866,7 +838,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xDF);
@@ -895,7 +866,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (Ty == IceType_i16) {
@@ -926,7 +896,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
assert(Ty == IceType_v8i16);
@@ -953,7 +922,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
assert(Ty == IceType_v8i16);
@@ -980,7 +948,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
assert(Ty == IceType_v8i16);
@@ -1005,7 +972,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xF4);
@@ -1028,7 +994,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xEB);
@@ -1057,7 +1022,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -1092,7 +1056,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -1126,7 +1089,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -1155,7 +1117,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xEF);
@@ -1183,7 +1144,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (Ty == IceType_i16) {
@@ -1234,7 +1194,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (Ty == IceType_i16) {
@@ -1287,7 +1246,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (Ty == IceType_i16) {
@@ -1338,7 +1296,6 @@
void AssemblerX86Base<TraitsType>::addps(Type /* Ty */, XmmRegister dst,
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x58);
@@ -1359,7 +1316,6 @@
void AssemblerX86Base<TraitsType>::subps(Type /* Ty */, XmmRegister dst,
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5C);
@@ -1380,7 +1336,6 @@
void AssemblerX86Base<TraitsType>::divps(Type /* Ty */, XmmRegister dst,
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5E);
@@ -1401,7 +1356,6 @@
void AssemblerX86Base<TraitsType>::mulps(Type /* Ty */, XmmRegister dst,
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x59);
@@ -1426,7 +1380,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5D);
@@ -1449,7 +1402,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5D);
@@ -1474,7 +1426,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5F);
@@ -1497,7 +1448,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5F);
@@ -1522,7 +1472,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x55);
@@ -1547,7 +1496,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x54);
@@ -1572,7 +1520,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x56);
@@ -1596,7 +1543,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x38);
@@ -1621,7 +1567,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x38);
@@ -1650,7 +1595,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_f64)
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xC2);
@@ -1770,7 +1714,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x38);
@@ -1798,7 +1741,6 @@
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x70);
@@ -1832,7 +1774,6 @@
const Address &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, Src, Dst);
emitUint8(0x0F);
if (Ty == IceType_v4i32 || Ty == IceType_v4f32) {
@@ -1871,7 +1812,6 @@
const Address &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, Src, Dst);
emitUint8(0x0F);
if (Ty == IceType_v4i32 || Ty == IceType_v4f32) {
@@ -1908,7 +1848,6 @@
const Address &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, Src, Dst);
emitUint8(0x0F);
if (Ty == IceType_v4i32 || Ty == IceType_v4f32) {
@@ -1944,7 +1883,6 @@
const Address &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, Src, Dst);
emitUint8(0x0F);
if (Ty == IceType_v4i32 || Ty == IceType_v4f32) {
@@ -1976,7 +1914,6 @@
const Address &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xC6);
@@ -2010,7 +1947,6 @@
void AssemblerX86Base<TraitsType>::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5B);
@@ -2033,7 +1969,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xF3);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5B);
@@ -2056,7 +1991,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5B);
@@ -2079,7 +2013,6 @@
Type SrcTy, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(SrcTy, src, dst);
emitUint8(0x0F);
emitUint8(0x2A);
@@ -2103,7 +2036,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x5A);
@@ -2126,7 +2058,6 @@
Type SrcTy, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(DestTy, src, dst);
emitUint8(0x0F);
emitUint8(0x2C);
@@ -2149,7 +2080,6 @@
Type SrcTy, const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(DestTy, src, dst);
emitUint8(0x0F);
emitUint8(0x2D);
@@ -2174,7 +2104,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_f64)
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, b, a);
emitUint8(0x0F);
emitUint8(0x2E);
@@ -2210,7 +2139,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (isScalarFloatingType(Ty))
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x51);
@@ -2235,7 +2163,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x57);
@@ -2280,7 +2207,6 @@
assert(isVectorFloatingType(Ty));
(void)Ty;
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x3A);
@@ -2316,7 +2242,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(imm.is_uint8());
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (Ty == IceType_i16) {
@@ -2389,7 +2314,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -2424,7 +2348,6 @@
const Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
if (isByteSizedArithType(Ty)) {
@@ -2470,7 +2393,6 @@
const Immediate &mode) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
- emitAddrSizeOverridePrefix();
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x3A);
@@ -2496,7 +2418,6 @@
template <typename T, typename>
void AssemblerX86Base<TraitsType>::fnstcw(const typename T::Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(0xD9);
emitOperand(7, dst);
}
@@ -2505,7 +2426,6 @@
template <typename T, typename>
void AssemblerX86Base<TraitsType>::fldcw(const typename T::Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(0xD9);
emitOperand(5, src);
}
@@ -2514,7 +2434,6 @@
template <typename T, typename>
void AssemblerX86Base<TraitsType>::fistpl(const typename T::Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(0xDF);
emitOperand(7, dst);
}
@@ -2523,7 +2442,6 @@
template <typename T, typename>
void AssemblerX86Base<TraitsType>::fistps(const typename T::Address &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(0xDB);
emitOperand(3, dst);
}
@@ -2532,7 +2450,6 @@
template <typename T, typename>
void AssemblerX86Base<TraitsType>::fildl(const typename T::Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(0xDF);
emitOperand(5, src);
}
@@ -2541,7 +2458,6 @@
template <typename T, typename>
void AssemblerX86Base<TraitsType>::filds(const typename T::Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitUint8(0xDB);
emitOperand(0, src);
}
@@ -2594,7 +2510,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, reg);
if (isByteSizedType(Ty))
emitUint8(Tag * 8 + 2);
@@ -2611,7 +2526,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, reg);
if (isByteSizedType(Ty))
emitUint8(Tag * 8 + 0);
@@ -2628,7 +2542,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, RexRegIrrelevant);
if (isByteSizedType(Ty)) {
emitComplexI8(Tag, address, imm);
@@ -2687,7 +2600,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, reg);
if (isByteSizedType(Ty))
emitUint8(0x84);
@@ -2739,7 +2651,6 @@
// short.
if (immediate.is_uint8()) {
// Use zero-extended 8-bit immediate.
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, RexRegIrrelevant);
emitUint8(0xF6);
static constexpr RelocOffsetT OffsetFromNextInstruction = 1;
@@ -2748,7 +2659,6 @@
} else {
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, RexRegIrrelevant);
emitUint8(0xF7);
const uint8_t OffsetFromNextInstruction = Ty == IceType_i16 ? 2 : 4;
@@ -3011,7 +2921,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, RexRegIrrelevant);
if (isByteSizedArithType(Ty))
emitUint8(0xF6);
@@ -3038,7 +2947,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, RexRegIrrelevant);
if (isByteSizedArithType(Ty))
emitUint8(0xF6);
@@ -3069,7 +2977,6 @@
(Traits::Is64Bit && Ty == IceType_i64));
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, reg);
emitUint8(0x0F);
emitUint8(0xAF);
@@ -3113,7 +3020,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, RexRegIrrelevant);
if (isByteSizedArithType(Ty))
emitUint8(0xF6);
@@ -3149,7 +3055,6 @@
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, dst);
if (imm.is_int8()) {
emitUint8(0x6B);
@@ -3182,7 +3087,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, RexRegIrrelevant);
if (isByteSizedArithType(Ty))
emitUint8(0xF6);
@@ -3201,7 +3105,6 @@
template <typename TraitsType>
void AssemblerX86Base<TraitsType>::incl(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(IceType_i32, address, RexRegIrrelevant);
emitUint8(0xFF);
emitOperand(0, address);
@@ -3217,7 +3120,6 @@
template <typename TraitsType>
void AssemblerX86Base<TraitsType>::decl(const Address &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitAddrSizeOverridePrefix();
emitRex(IceType_i32, address, RexRegIrrelevant);
emitUint8(0xFF);
emitOperand(1, address);
@@ -3330,7 +3232,6 @@
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, operand, src);
emitUint8(0x0F);
emitUint8(0xA5);
@@ -3372,7 +3273,6 @@
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, dst, src);
emitUint8(0x0F);
emitUint8(0xAD);
@@ -3397,7 +3297,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, RexRegIrrelevant);
if (isByteSizedArithType(Ty))
emitUint8(0xF6);
@@ -3445,7 +3344,6 @@
(Traits::Is64Bit && Ty == IceType_i64));
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, src, dst);
emitUint8(0x0F);
emitUint8(0xBC);
@@ -3474,7 +3372,6 @@
(Traits::Is64Bit && Ty == IceType_i64));
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, src, dst);
emitUint8(0x0F);
emitUint8(0xBD);
@@ -3703,7 +3600,6 @@
emitOperandSizeOverride();
if (Locked)
emitUint8(0xF0);
- emitAddrSizeOverridePrefix();
emitRex(Ty, address, reg);
emitUint8(0x0F);
if (isByteSizedArithType(Ty))
@@ -3719,7 +3615,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Locked)
emitUint8(0xF0);
- emitAddrSizeOverridePrefix();
emitRex(IceType_i32, address, RexRegIrrelevant);
emitUint8(0x0F);
emitUint8(0xC7);
@@ -3734,7 +3629,6 @@
emitOperandSizeOverride();
if (Locked)
emitUint8(0xF0);
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, reg);
emitUint8(0x0F);
if (isByteSizedArithType(Ty))
@@ -3773,7 +3667,6 @@
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
- emitAddrSizeOverridePrefix();
emitRex(Ty, addr, reg);
if (isByteSizedArithType(Ty))
emitUint8(0x86);
diff --git a/third_party/subzero/src/IceClFlags.def b/third_party/subzero/src/IceClFlags.def
index 690669e..02469de 100644
--- a/third_party/subzero/src/IceClFlags.def
+++ b/third_party/subzero/src/IceClFlags.def
@@ -226,15 +226,7 @@
clEnumValN(Ice::FT_Elf, "obj", "Native ELF object ('.o') file"), \
clEnumValN(Ice::FT_Asm, "asm", "Assembly ('.s') file"), \
clEnumValN(Ice::FT_Iasm, "iasm", \
- "Low-level integrated assembly ('.s') file") \
- CLENUMVALEND)) \
- \
- X(ApplicationBinaryInterface, Ice::ABI, dev_opt_flag, "abi", \
- cl::desc("ABI type"), cl::init(Ice::ABI_PNaCl), \
- cl::values( \
- clEnumValN(Ice::ABI_PNaCl, "pnacl", "x32 for unsandboxed 64-bit x86"), \
- clEnumValN(Ice::ABI_Platform, "platform", "Native executable ABI") \
- CLENUMVALEND)) \
+ "Low-level integrated assembly ('.s') file") CLENUMVALEND)) \
\
X(ParseParallel, bool, dev_opt_flag, "parse-parallel", \
cl::desc("Parse function blocks in parallel"), cl::init(true)) \
diff --git a/third_party/subzero/src/IceDefs.h b/third_party/subzero/src/IceDefs.h
index 01a8f35..c4cf0ee 100644
--- a/third_party/subzero/src/IceDefs.h
+++ b/third_party/subzero/src/IceDefs.h
@@ -302,7 +302,6 @@
__attribute__((aligned(MaxCacheLineSize + 0))) int : 0
#endif // !defined(_MSC_VER)
-/// PNaCl is ILP32, so theoretically we should only need 32-bit offsets.
using RelocOffsetT = int32_t;
enum { RelocAddrSize = 4 };
@@ -371,11 +370,6 @@
FT_Iasm /// "Integrated assembler" .byte-style .s file
};
-enum ABI {
- ABI_PNaCl, /// x32 for unsandboxed 64-bit x86
- ABI_Platform /// Native executable ABI
-};
-
using Ostream = llvm::raw_ostream;
using Fdstream = llvm::raw_fd_ostream;
diff --git a/third_party/subzero/src/IceELFObjectWriter.cpp b/third_party/subzero/src/IceELFObjectWriter.cpp
index 9f41af6..1643397 100644
--- a/third_party/subzero/src/IceELFObjectWriter.cpp
+++ b/third_party/subzero/src/IceELFObjectWriter.cpp
@@ -48,12 +48,6 @@
return false;
}
- if (Flags.getApplicationBinaryInterface() == ABI_PNaCl &&
- !Flags.getUseSandboxing()) {
- // Unsandboxed PNaCl code is always ELF32 (pexes are ILP32.)
- return false;
- }
-
return ELFTargetInfo[Arch].IsELF64;
}
diff --git a/third_party/subzero/src/IceInstX8664.cpp b/third_party/subzero/src/IceInstX8664.cpp
index da9e9f6..1a330e1 100644
--- a/third_party/subzero/src/IceInstX8664.cpp
+++ b/third_party/subzero/src/IceInstX8664.cpp
@@ -150,25 +150,7 @@
Str << "(";
if (Base != nullptr) {
- const Variable *B = Base;
- if (!NeedSandboxing) {
- // TODO(jpp): stop abusing the operand's type to identify LEAs.
- const Type MemType = getType();
- if (Base->getType() != IceType_i32 && MemType != IceType_void &&
- !isVectorType(MemType)) {
- // X86-64 is ILP32, but %rsp and %rbp are accessed as 64-bit registers.
- // For filetype=asm, they need to be emitted as their 32-bit siblings.
- assert(Base->getType() == IceType_i64);
- assert(getEncodedGPR(Base->getRegNum()) == RegX8664::Encoded_Reg_rsp ||
- getEncodedGPR(Base->getRegNum()) == RegX8664::Encoded_Reg_rbp ||
- getType() == IceType_void);
- B = B->asType(
- Func, IceType_i32,
- X8664::Traits::getGprForType(IceType_i32, Base->getRegNum()));
- }
- }
-
- B->emit(Func);
+ Base->emit(Func);
}
if (Index != nullptr) {
diff --git a/third_party/subzero/src/IceTargetLoweringARM32.cpp b/third_party/subzero/src/IceTargetLoweringARM32.cpp
index 750374e..c479feb 100644
--- a/third_party/subzero/src/IceTargetLoweringARM32.cpp
+++ b/third_party/subzero/src/IceTargetLoweringARM32.cpp
@@ -5296,8 +5296,6 @@
llvm::report_fatal_error("setjmp should have been prelowered.");
}
case Intrinsics::Sqrt: {
- assert(isScalarFloatingType(Dest->getType()) ||
- getFlags().getApplicationBinaryInterface() != ::Ice::ABI_PNaCl);
Variable *Src = legalizeToReg(Instr->getArg(0));
Variable *T = makeReg(DestTy);
_vsqrt(T, Src);
diff --git a/third_party/subzero/src/IceTargetLoweringMIPS32.cpp b/third_party/subzero/src/IceTargetLoweringMIPS32.cpp
index 0f22385..0ceb41e 100644
--- a/third_party/subzero/src/IceTargetLoweringMIPS32.cpp
+++ b/third_party/subzero/src/IceTargetLoweringMIPS32.cpp
@@ -5155,8 +5155,7 @@
}
_mov(Dest, T);
} else {
- assert(getFlags().getApplicationBinaryInterface() != ::Ice::ABI_PNaCl);
- UnimplementedLoweringError(this, Instr); // Not required for PNaCl
+ UnimplementedLoweringError(this, Instr);
}
return;
}
@@ -5176,11 +5175,11 @@
return;
}
case Intrinsics::LoadSubVector: {
- UnimplementedLoweringError(this, Instr); // Not required for PNaCl
+ UnimplementedLoweringError(this, Instr);
return;
}
case Intrinsics::StoreSubVector: {
- UnimplementedLoweringError(this, Instr); // Not required for PNaCl
+ UnimplementedLoweringError(this, Instr);
return;
}
default: // UnknownIntrinsic
diff --git a/third_party/subzero/src/IceTargetLoweringX8664.cpp b/third_party/subzero/src/IceTargetLoweringX8664.cpp
index e7407b1..13884ea 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664.cpp
+++ b/third_party/subzero/src/IceTargetLoweringX8664.cpp
@@ -708,14 +708,7 @@
Context.insert(ReturnAddress);
} else {
- if (CallTargetR != nullptr && CallTarget->getType() == IceType_i32) {
- // x86-64 in PNaCl is ILP32. Therefore, CallTarget is i32, but the
- // emitted call needs an i64 register (for textual asm.)
- Variable *T = makeReg(IceType_i64);
- _movzx(T, CallTargetR);
- CallTarget = T;
-
- } else if (CallTarget->getType() == IceType_i64) {
+ if (CallTarget->getType() == IceType_i64) {
// x86-64 does not support 64-bit direct calls, so write the value to a
// register and make an indirect call for Constant call targets.
RegNumT TargetReg = {};
diff --git a/third_party/subzero/src/IceTargetLoweringX8664.h b/third_party/subzero/src/IceTargetLoweringX8664.h
index 96afb42..a56c1a4 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664.h
+++ b/third_party/subzero/src/IceTargetLoweringX8664.h
@@ -42,10 +42,7 @@
}
std::unique_ptr<::Ice::Assembler> createAssembler() const override {
- const bool EmitAddrSizeOverridePrefix =
- !NeedSandboxing &&
- getFlags().getApplicationBinaryInterface() == ABI_PNaCl;
- return makeUnique<X8664::AssemblerX8664>(EmitAddrSizeOverridePrefix);
+ return makeUnique<X8664::AssemblerX8664>();
}
protected:
diff --git a/third_party/subzero/src/IceTargetLoweringX86BaseImpl.h b/third_party/subzero/src/IceTargetLoweringX86BaseImpl.h
index 37ab794..f6885bc 100644
--- a/third_party/subzero/src/IceTargetLoweringX86BaseImpl.h
+++ b/third_party/subzero/src/IceTargetLoweringX86BaseImpl.h
@@ -444,11 +444,7 @@
template <typename TraitsType>
::Ice::Type TargetX86Base<TraitsType>::getPointerType() {
- if (!Traits::Is64Bit ||
- ::Ice::getFlags().getApplicationBinaryInterface() == ::Ice::ABI_PNaCl) {
- return ::Ice::IceType_i32;
- }
- return ::Ice::IceType_i64;
+ return Traits::Is64Bit ? IceType_i64 : IceType_i32;
}
template <typename TraitsType> void TargetX86Base<TraitsType>::translateO2() {
@@ -3297,8 +3293,6 @@
// Bitcast requires equal type sizes, which isn't strictly the case
// between scalars and vectors, but to emulate v4i8 vectors one has to
// use v16i8 vectors.
- assert(getFlags().getApplicationBinaryInterface() != ABI_PNaCl &&
- "PNaCl only supports real 128-bit vectors");
Operand *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem);
Variable *T = makeReg(DestTy);
_movd(T, Src0RM);
@@ -4442,8 +4436,6 @@
return;
}
case Intrinsics::Sqrt: {
- assert(isScalarFloatingType(Instr->getDest()->getType()) ||
- getFlags().getApplicationBinaryInterface() != ::Ice::ABI_PNaCl);
Operand *Src = legalize(Instr->getArg(0));
Variable *Dest = Instr->getDest();
Variable *T = makeReg(Dest->getType());
@@ -8256,9 +8248,8 @@
<< typeWidthInBytes(getPointerType()) << "\n"
<< JumpTable->getName() << ":";
- // On X86 ILP32 pointers are 32-bit hence the use of .long
for (SizeT I = 0; I < JumpTable->getNumTargets(); ++I)
- Str << "\n\t.long\t" << JumpTable->getTarget(I)->getAsmName();
+ Str << "\n\t.val\t" << JumpTable->getTarget(I)->getAsmName();
Str << "\n";
}
@@ -8353,9 +8344,8 @@
<< typeWidthInBytes(getPointerType()) << "\n"
<< JT.getName().toString() << ":";
- // On X8664 ILP32 pointers are 32-bit hence the use of .long
for (intptr_t TargetOffset : JT.getTargetOffsets())
- Str << "\n\t.long\t" << JT.getFunctionName() << "+" << TargetOffset;
+ Str << "\n\t.val\t" << JT.getFunctionName() << "+" << TargetOffset;
Str << "\n";
}
} break;
