| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| |
| --- | |
| target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" |
| |
| define void @anyext_s64_from_s32() { ret void } |
| define void @anyext_s32_from_s8() { ret void } |
| |
| define void @zext_s64_from_s32() { ret void } |
| define void @zext_s32_from_s16() { ret void } |
| define void @zext_s32_from_s8() { ret void } |
| define void @zext_s16_from_s8() { ret void } |
| |
| define void @sext_s64_from_s32() { ret void } |
| define void @sext_s32_from_s16() { ret void } |
| define void @sext_s32_from_s8() { ret void } |
| define void @sext_s16_from_s8() { ret void } |
| ... |
| |
| --- |
| name: anyext_s64_from_s32 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: anyext_s64_from_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32all = COPY $w0 |
| ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64all = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32 |
| ; CHECK: $x0 = COPY [[SUBREG_TO_REG]] |
| %0(s32) = COPY $w0 |
| %1(s64) = G_ANYEXT %0 |
| $x0 = COPY %1(s64) |
| ... |
| |
| --- |
| name: anyext_s32_from_s8 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: anyext_s32_from_s8 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY]] |
| ; CHECK: $w0 = COPY [[COPY2]] |
| %2:gpr(s32) = COPY $w0 |
| %0(s8) = G_TRUNC %2 |
| %1(s32) = G_ANYEXT %0 |
| $w0 = COPY %1(s32) |
| ... |
| |
| --- |
| name: zext_s64_from_s32 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: zext_s64_from_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32 |
| ; CHECK: [[UBFMXri:%[0-9]+]]:gpr64 = UBFMXri [[SUBREG_TO_REG]], 0, 31 |
| ; CHECK: $x0 = COPY [[UBFMXri]] |
| %0(s32) = COPY $w0 |
| %1(s64) = G_ZEXT %0 |
| $x0 = COPY %1(s64) |
| ... |
| |
| --- |
| name: zext_s32_from_s16 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: zext_s32_from_s16 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[COPY]], 0, 15 |
| ; CHECK: $w0 = COPY [[UBFMWri]] |
| %2:gpr(s32) = COPY $w0 |
| %0(s16) = G_TRUNC %2 |
| %1(s32) = G_ZEXT %0 |
| $w0 = COPY %1 |
| ... |
| |
| --- |
| name: zext_s32_from_s8 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: zext_s32_from_s8 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[COPY]], 0, 15 |
| ; CHECK: $w0 = COPY [[UBFMWri]] |
| %2:gpr(s32) = COPY $w0 |
| %0(s16) = G_TRUNC %2 |
| %1(s32) = G_ZEXT %0 |
| $w0 = COPY %1(s32) |
| ... |
| |
| --- |
| name: zext_s16_from_s8 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: zext_s16_from_s8 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[UBFMWri:%[0-9]+]]:gpr32 = UBFMWri [[COPY]], 0, 7 |
| ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[UBFMWri]] |
| ; CHECK: $w0 = COPY [[COPY2]] |
| %2:gpr(s32) = COPY $w0 |
| %0(s8) = G_TRUNC %2 |
| %1(s16) = G_ZEXT %0 |
| %3:gpr(s32) = G_ANYEXT %1 |
| $w0 = COPY %3(s32) |
| ... |
| |
| --- |
| name: sext_s64_from_s32 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: sext_s64_from_s32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[COPY]], %subreg.sub_32 |
| ; CHECK: [[SBFMXri:%[0-9]+]]:gpr64 = SBFMXri [[SUBREG_TO_REG]], 0, 31 |
| ; CHECK: $x0 = COPY [[SBFMXri]] |
| %0(s32) = COPY $w0 |
| %1(s64) = G_SEXT %0 |
| $x0 = COPY %1(s64) |
| ... |
| |
| --- |
| name: sext_s32_from_s16 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: sext_s32_from_s16 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[SBFMWri:%[0-9]+]]:gpr32 = SBFMWri [[COPY]], 0, 15 |
| ; CHECK: $w0 = COPY [[SBFMWri]] |
| %2:gpr(s32) = COPY $w0 |
| %0(s16) = G_TRUNC %2 |
| %1(s32) = G_SEXT %0 |
| $w0 = COPY %1 |
| ... |
| |
| --- |
| name: sext_s32_from_s8 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: sext_s32_from_s8 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[SBFMWri:%[0-9]+]]:gpr32 = SBFMWri [[COPY]], 0, 7 |
| ; CHECK: $w0 = COPY [[SBFMWri]] |
| %2:gpr(s32) = COPY $w0 |
| %0(s8) = G_TRUNC %2 |
| %1(s32) = G_SEXT %0 |
| $w0 = COPY %1(s32) |
| ... |
| |
| --- |
| name: sext_s16_from_s8 |
| legalized: true |
| regBankSelected: true |
| |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| |
| body: | |
| bb.0: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: sext_s16_from_s8 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 |
| ; CHECK: [[SBFMWri:%[0-9]+]]:gpr32 = SBFMWri [[COPY]], 0, 7 |
| ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SBFMWri]] |
| ; CHECK: $w0 = COPY [[COPY2]] |
| %2:gpr(s32) = COPY $w0 |
| %0(s8) = G_TRUNC %2 |
| %1(s16) = G_SEXT %0 |
| %3:gpr(s32) = G_ANYEXT %1 |
| $w0 = COPY %3(s32) |
| ... |