Squashed 'third_party/SPIRV-Headers/' changes from 70ff9d939cd..aa331ab0ffc
aa331ab0ffc Merge pull request #299 from qingyuanzNV/add_nonsemantic_debugbreak
503026592be Merge pull request #315 from bashbaug/fix-SPV_KHR_shader_clock
36c7694279d Merge pull request #291 from broxigarchen/kernelArgProperties
98cc580e34d decouple SPV_KHR_shader_clock from the Shader capability
4dd2cc4d3c4 Merge branch 'master' of https://github.com/broxigarchen/SPIRV-Headers into kernelArgProperties
a4608a6af02 remove MMHostInterfaceAlignment and added parameters
d13b52222c3 Merge pull request #312 from alan-baker/clspv-optional-operands
30a41a43be6 Make operands to Kernel added in v5 optional
c16439f4268 Update ClspvReflection non-semantic instruction set (#308)
34d04647d38 Merge pull request #311 from dneto0/issue-303
66ebc285103 Add operator^
355f4518799 C++ headers: Define & and ~ bitwise operators for mask enums
88e0805c013 added extension name
ba70a9523ae added SPRIV_INTEL_argument_interfaces
ff67f521e3c NonSemantic.DebugBreak
git-subtree-dir: third_party/SPIRV-Headers
git-subtree-split: aa331ab0ffcb3a67021caa1a0c1c9017712f2f31
Change-Id: Id7322611dd92f69fb1bc88d027a7fab74f424c83
diff --git a/include/spirv/unified1/NonSemanticClspvReflection.h b/include/spirv/unified1/NonSemanticClspvReflection.h
index 0cdf29d..1a31549 100644
--- a/include/spirv/unified1/NonSemanticClspvReflection.h
+++ b/include/spirv/unified1/NonSemanticClspvReflection.h
@@ -33,7 +33,7 @@
#endif
enum {
- NonSemanticClspvReflectionRevision = 4,
+ NonSemanticClspvReflectionRevision = 5,
NonSemanticClspvReflectionRevision_BitWidthPadding = 0x7fffffff
};
@@ -73,10 +73,22 @@
NonSemanticClspvReflectionImageArgumentInfoChannelDataTypeUniform = 33,
NonSemanticClspvReflectionArgumentStorageTexelBuffer = 34,
NonSemanticClspvReflectionArgumentUniformTexelBuffer = 35,
+ NonSemanticClspvReflectionConstantDataPointerPushConstant = 36,
+ NonSemanticClspvReflectionProgramScopeVariablePointerPushConstant = 37,
+ NonSemanticClspvReflectionPrintfInfo = 38,
+ NonSemanticClspvReflectionPrintfBufferStorageBuffer = 39,
+ NonSemanticClspvReflectionPrintfBufferPointerPushConstant = 40,
NonSemanticClspvReflectionInstructionsMax = 0x7fffffff
};
+enum NonSemanticClspvReflectionKernelPropertyFlags {
+ NonSemanticClspvReflectionNone = 0x0,
+ NonSemanticClspvReflectionMayUsePrintf = 0x1,
+ NonSemanticClspvReflectionKernelPropertyFlagsMax = 0x7fffffff
+};
+
+
#ifdef __cplusplus
}
#endif
diff --git a/include/spirv/unified1/NonSemanticDebugBreak.h b/include/spirv/unified1/NonSemanticDebugBreak.h
new file mode 100644
index 0000000..6ec2b5b
--- /dev/null
+++ b/include/spirv/unified1/NonSemanticDebugBreak.h
@@ -0,0 +1,50 @@
+// Copyright (c) 2020 The Khronos Group Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and/or associated documentation files (the
+// "Materials"), to deal in the Materials without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Materials, and to
+// permit persons to whom the Materials are furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Materials.
+//
+// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
+// KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
+// SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
+// https://www.khronos.org/registry/
+//
+// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
+//
+
+#ifndef SPIRV_UNIFIED1_NonSemanticDebugBreak_H_
+#define SPIRV_UNIFIED1_NonSemanticDebugBreak_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum {
+ NonSemanticDebugBreakRevision = 1,
+ NonSemanticDebugBreakRevision_BitWidthPadding = 0x7fffffff
+};
+
+enum NonSemanticDebugBreakInstructions {
+ NonSemanticDebugBreakDebugBreak = 1,
+ NonSemanticDebugBreakInstructionsMax = 0x7fffffff
+};
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // SPIRV_UNIFIED1_NonSemanticDebugBreak_H_
diff --git a/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json b/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
index b5a6637..d6499cc 100644
--- a/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
+++ b/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
@@ -1,12 +1,15 @@
{
- "revision" : 4,
+ "revision" : 5,
"instructions" : [
{
"opname" : "Kernel",
"opcode" : 1,
"operands" : [
{ "kind" : "IdRef", "name" : "Kernel" },
- { "kind" : "IdRef", "name" : "Name" }
+ { "kind" : "IdRef", "name" : "Name" },
+ { "kind" : "IdRef", "name" : "NumArguments", "quantifier" : "?" },
+ { "kind" : "IdRef", "name" : "Flags", "quantifier" : "?" },
+ { "kind" : "IdRef", "name" : "Attributes", "quantifier" : "?" }
]
},
{
@@ -347,6 +350,67 @@
{ "kind" : "IdRef", "name" : "Binding" },
{ "kind" : "IdRef", "name" : "ArgInfo", "quantifier" : "?" }
]
+ },
+ {
+ "opname" : "ConstantDataPointerPushConstant",
+ "opcode" : 36,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset"},
+ { "kind" : "IdRef", "name" : "Size"},
+ { "kind" : "IdRef", "name" : "Data" }
+ ]
+ },
+ {
+ "opname" : "ProgramScopeVariablePointerPushConstant",
+ "opcode" : 37,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset"},
+ { "kind" : "IdRef", "name" : "Size"},
+ { "kind" : "IdRef", "name" : "Data" }
+ ]
+ },
+ {
+ "opname" : "PrintfInfo",
+ "opcode" : 38,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "PrintfID" },
+ { "kind" : "IdRef", "name" : "FormatString" },
+ { "kind" : "IdRef", "quantifier" : "*", "name" : "ArgumentSizes"}
+ ]
+ },
+ {
+ "opname" : "PrintfBufferStorageBuffer",
+ "opcode" : 39,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "DescriptorSet" },
+ { "kind" : "IdRef", "name" : "Binding" },
+ { "kind" : "IdRef", "name" : "BufferSize"}
+ ]
+ },
+ {
+ "opname" : "PrintfBufferPointerPushConstant",
+ "opcode" : 40,
+ "operands" : [
+ { "kind" : "IdRef", "name" : "Offset" },
+ { "kind" : "IdRef", "name" : "Size"},
+ { "kind" : "IdRef", "name" : "BufferSize"}
+ ]
+ }
+ ],
+ "operand_kinds" : [
+ {
+ "category" : "BitEnum",
+ "kind" : "KernelPropertyFlags",
+ "enumerants" : [
+ {
+ "enumerant" : "None",
+ "value" : "0x0"
+ },
+ {
+ "enumerant" : "MayUsePrintf",
+ "value" : "0x1"
+ }
+ ]
}
]
}
diff --git a/include/spirv/unified1/extinst.nonsemantic.debugbreak.grammar.json b/include/spirv/unified1/extinst.nonsemantic.debugbreak.grammar.json
new file mode 100644
index 0000000..ae28883
--- /dev/null
+++ b/include/spirv/unified1/extinst.nonsemantic.debugbreak.grammar.json
@@ -0,0 +1,9 @@
+{
+ "revision" : 1,
+ "instructions" : [
+ {
+ "opname" : "DebugBreak",
+ "opcode" : 1
+ }
+ ]
+}
diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
index 15eafab..ae17120 100644
--- a/include/spirv/unified1/spirv.bf
+++ b/include/spirv/unified1/spirv.bf
@@ -575,6 +575,15 @@
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ ConduitKernelArgumentINTEL = 6175,
+ RegisterMapKernelArgumentINTEL = 6176,
+ MMHostInterfaceAddressWidthINTEL = 6177,
+ MMHostInterfaceDataWidthINTEL = 6178,
+ MMHostInterfaceLatencyINTEL = 6179,
+ MMHostInterfaceReadWriteModeINTEL = 6180,
+ MMHostInterfaceMaxBurstINTEL = 6181,
+ MMHostInterfaceWaitRequestINTEL = 6182,
+ StableKernelArgumentINTEL = 6183,
}
[AllowDuplicates, CRepr] public enum BuiltIn
@@ -1138,6 +1147,7 @@
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
}
diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index b23d8a8..3e4f81e 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -4751,7 +4751,6 @@
{ "kind" : "IdScope", "name" : "'Scope'" }
],
"capabilities" : [ "ShaderClockKHR" ],
- "extensions" : [ "SPV_KHR_shader_clock" ],
"version" : "None"
},
{
@@ -12517,6 +12516,78 @@
"value" : 6140,
"capabilities" : [ "VectorComputeINTEL" ],
"version" : "None"
+ },
+ {
+ "enumerant" : "ConduitKernelArgumentINTEL",
+ "value" : 6175,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "RegisterMapKernelArgumentINTEL",
+ "value" : 6176,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "MMHostInterfaceAddressWidthINTEL",
+ "value" : 6177,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'AddressWidth'" }
+ ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "MMHostInterfaceDataWidthINTEL",
+ "value" : 6178,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'DataWidth'" }
+ ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "MMHostInterfaceLatencyINTEL",
+ "value" : 6179,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'Latency'" }
+ ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "MMHostInterfaceReadWriteModeINTEL",
+ "value" : 6180,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "parameters" : [
+ { "kind" : "AccessQualifier", "name" : "'ReadWriteMode'" }
+ ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "MMHostInterfaceMaxBurstINTEL",
+ "value" : 6181,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'MaxBurstCount'" }
+ ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "MMHostInterfaceWaitRequestINTEL",
+ "value" : 6182,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "parameters" : [
+ { "kind" : "LiteralInteger", "name" : "'Waitrequest'" }
+ ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "StableKernelArgumentINTEL",
+ "value" : 6183,
+ "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
+ "version" : "None"
}
]
},
@@ -14056,7 +14127,6 @@
{
"enumerant" : "ShaderClockKHR",
"value" : 5055,
- "capabilities" : [ "Shader" ],
"extensions" : [ "SPV_KHR_shader_clock" ],
"version" : "None"
},
@@ -14824,6 +14894,12 @@
"version" : "None"
},
{
+ "enumerant" : "FPGAArgumentInterfacesINTEL",
+ "value" : 6174,
+ "extensions" : [ "SPV_INTEL_fpga_argument_interfaces" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "GroupUniformArithmeticKHR",
"value" : 6400,
"extensions" : [ "SPV_KHR_uniform_group_instructions"],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index f836fc9..4f203a9 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -574,6 +574,15 @@
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ ConduitKernelArgumentINTEL = 6175,
+ RegisterMapKernelArgumentINTEL = 6176,
+ MMHostInterfaceAddressWidthINTEL = 6177,
+ MMHostInterfaceDataWidthINTEL = 6178,
+ MMHostInterfaceLatencyINTEL = 6179,
+ MMHostInterfaceReadWriteModeINTEL = 6180,
+ MMHostInterfaceMaxBurstINTEL = 6181,
+ MMHostInterfaceWaitRequestINTEL = 6182,
+ StableKernelArgumentINTEL = 6183,
}
public enum BuiltIn
@@ -1137,6 +1146,7 @@
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
}
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index 366b556..f6b77ae 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -580,6 +580,15 @@
SpvDecorationSingleElementVectorINTEL = 6085,
SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
SpvDecorationMediaBlockIOINTEL = 6140,
+ SpvDecorationConduitKernelArgumentINTEL = 6175,
+ SpvDecorationRegisterMapKernelArgumentINTEL = 6176,
+ SpvDecorationMMHostInterfaceAddressWidthINTEL = 6177,
+ SpvDecorationMMHostInterfaceDataWidthINTEL = 6178,
+ SpvDecorationMMHostInterfaceLatencyINTEL = 6179,
+ SpvDecorationMMHostInterfaceReadWriteModeINTEL = 6180,
+ SpvDecorationMMHostInterfaceMaxBurstINTEL = 6181,
+ SpvDecorationMMHostInterfaceWaitRequestINTEL = 6182,
+ SpvDecorationStableKernelArgumentINTEL = 6183,
SpvDecorationMax = 0x7fffffff,
} SpvDecoration;
@@ -1137,6 +1146,7 @@
SpvCapabilityAtomicFloat16AddEXT = 6095,
SpvCapabilityDebugInfoModuleINTEL = 6114,
SpvCapabilitySplitBarrierINTEL = 6141,
+ SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
SpvCapabilityGroupUniformArithmeticKHR = 6400,
SpvCapabilityMax = 0x7fffffff,
} SpvCapability;
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index 2e2878b..1a901db 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -576,6 +576,15 @@
DecorationSingleElementVectorINTEL = 6085,
DecorationVectorComputeCallableFunctionINTEL = 6087,
DecorationMediaBlockIOINTEL = 6140,
+ DecorationConduitKernelArgumentINTEL = 6175,
+ DecorationRegisterMapKernelArgumentINTEL = 6176,
+ DecorationMMHostInterfaceAddressWidthINTEL = 6177,
+ DecorationMMHostInterfaceDataWidthINTEL = 6178,
+ DecorationMMHostInterfaceLatencyINTEL = 6179,
+ DecorationMMHostInterfaceReadWriteModeINTEL = 6180,
+ DecorationMMHostInterfaceMaxBurstINTEL = 6181,
+ DecorationMMHostInterfaceWaitRequestINTEL = 6182,
+ DecorationStableKernelArgumentINTEL = 6183,
DecorationMax = 0x7fffffff,
};
@@ -1133,6 +1142,7 @@
CapabilityAtomicFloat16AddEXT = 6095,
CapabilityDebugInfoModuleINTEL = 6114,
CapabilitySplitBarrierINTEL = 6141,
+ CapabilityFPGAArgumentInterfacesINTEL = 6174,
CapabilityGroupUniformArithmeticKHR = 6400,
CapabilityMax = 0x7fffffff,
};
@@ -2651,18 +2661,48 @@
}
#endif /* SPV_ENABLE_UTILITY_CODE */
-// Overload operator| for mask bit combining
+// Overload bitwise operators for mask bit combining
inline ImageOperandsMask operator|(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) | unsigned(b)); }
+inline ImageOperandsMask operator&(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) & unsigned(b)); }
+inline ImageOperandsMask operator^(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) ^ unsigned(b)); }
+inline ImageOperandsMask operator~(ImageOperandsMask a) { return ImageOperandsMask(~unsigned(a)); }
inline FPFastMathModeMask operator|(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) | unsigned(b)); }
+inline FPFastMathModeMask operator&(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) & unsigned(b)); }
+inline FPFastMathModeMask operator^(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) ^ unsigned(b)); }
+inline FPFastMathModeMask operator~(FPFastMathModeMask a) { return FPFastMathModeMask(~unsigned(a)); }
inline SelectionControlMask operator|(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) | unsigned(b)); }
+inline SelectionControlMask operator&(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) & unsigned(b)); }
+inline SelectionControlMask operator^(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) ^ unsigned(b)); }
+inline SelectionControlMask operator~(SelectionControlMask a) { return SelectionControlMask(~unsigned(a)); }
inline LoopControlMask operator|(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) | unsigned(b)); }
+inline LoopControlMask operator&(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) & unsigned(b)); }
+inline LoopControlMask operator^(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) ^ unsigned(b)); }
+inline LoopControlMask operator~(LoopControlMask a) { return LoopControlMask(~unsigned(a)); }
inline FunctionControlMask operator|(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) | unsigned(b)); }
+inline FunctionControlMask operator&(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) & unsigned(b)); }
+inline FunctionControlMask operator^(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) ^ unsigned(b)); }
+inline FunctionControlMask operator~(FunctionControlMask a) { return FunctionControlMask(~unsigned(a)); }
inline MemorySemanticsMask operator|(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) | unsigned(b)); }
+inline MemorySemanticsMask operator&(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) & unsigned(b)); }
+inline MemorySemanticsMask operator^(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) ^ unsigned(b)); }
+inline MemorySemanticsMask operator~(MemorySemanticsMask a) { return MemorySemanticsMask(~unsigned(a)); }
inline MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); }
+inline MemoryAccessMask operator&(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) & unsigned(b)); }
+inline MemoryAccessMask operator^(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) ^ unsigned(b)); }
+inline MemoryAccessMask operator~(MemoryAccessMask a) { return MemoryAccessMask(~unsigned(a)); }
inline KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); }
+inline KernelProfilingInfoMask operator&(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) & unsigned(b)); }
+inline KernelProfilingInfoMask operator^(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) ^ unsigned(b)); }
+inline KernelProfilingInfoMask operator~(KernelProfilingInfoMask a) { return KernelProfilingInfoMask(~unsigned(a)); }
inline RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); }
+inline RayFlagsMask operator&(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) & unsigned(b)); }
+inline RayFlagsMask operator^(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) ^ unsigned(b)); }
+inline RayFlagsMask operator~(RayFlagsMask a) { return RayFlagsMask(~unsigned(a)); }
inline FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); }
+inline FragmentShadingRateMask operator&(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) & unsigned(b)); }
+inline FragmentShadingRateMask operator^(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) ^ unsigned(b)); }
+inline FragmentShadingRateMask operator~(FragmentShadingRateMask a) { return FragmentShadingRateMask(~unsigned(a)); }
} // end namespace spv
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index d452c53..b7d041a 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -576,6 +576,15 @@
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ ConduitKernelArgumentINTEL = 6175,
+ RegisterMapKernelArgumentINTEL = 6176,
+ MMHostInterfaceAddressWidthINTEL = 6177,
+ MMHostInterfaceDataWidthINTEL = 6178,
+ MMHostInterfaceLatencyINTEL = 6179,
+ MMHostInterfaceReadWriteModeINTEL = 6180,
+ MMHostInterfaceMaxBurstINTEL = 6181,
+ MMHostInterfaceWaitRequestINTEL = 6182,
+ StableKernelArgumentINTEL = 6183,
Max = 0x7fffffff,
};
@@ -1133,6 +1142,7 @@
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
Max = 0x7fffffff,
};
@@ -2651,18 +2661,48 @@
}
#endif /* SPV_ENABLE_UTILITY_CODE */
-// Overload operator| for mask bit combining
+// Overload bitwise operators for mask bit combining
inline ImageOperandsMask operator|(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) | unsigned(b)); }
+inline ImageOperandsMask operator&(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) & unsigned(b)); }
+inline ImageOperandsMask operator^(ImageOperandsMask a, ImageOperandsMask b) { return ImageOperandsMask(unsigned(a) ^ unsigned(b)); }
+inline ImageOperandsMask operator~(ImageOperandsMask a) { return ImageOperandsMask(~unsigned(a)); }
inline FPFastMathModeMask operator|(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) | unsigned(b)); }
+inline FPFastMathModeMask operator&(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) & unsigned(b)); }
+inline FPFastMathModeMask operator^(FPFastMathModeMask a, FPFastMathModeMask b) { return FPFastMathModeMask(unsigned(a) ^ unsigned(b)); }
+inline FPFastMathModeMask operator~(FPFastMathModeMask a) { return FPFastMathModeMask(~unsigned(a)); }
inline SelectionControlMask operator|(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) | unsigned(b)); }
+inline SelectionControlMask operator&(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) & unsigned(b)); }
+inline SelectionControlMask operator^(SelectionControlMask a, SelectionControlMask b) { return SelectionControlMask(unsigned(a) ^ unsigned(b)); }
+inline SelectionControlMask operator~(SelectionControlMask a) { return SelectionControlMask(~unsigned(a)); }
inline LoopControlMask operator|(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) | unsigned(b)); }
+inline LoopControlMask operator&(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) & unsigned(b)); }
+inline LoopControlMask operator^(LoopControlMask a, LoopControlMask b) { return LoopControlMask(unsigned(a) ^ unsigned(b)); }
+inline LoopControlMask operator~(LoopControlMask a) { return LoopControlMask(~unsigned(a)); }
inline FunctionControlMask operator|(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) | unsigned(b)); }
+inline FunctionControlMask operator&(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) & unsigned(b)); }
+inline FunctionControlMask operator^(FunctionControlMask a, FunctionControlMask b) { return FunctionControlMask(unsigned(a) ^ unsigned(b)); }
+inline FunctionControlMask operator~(FunctionControlMask a) { return FunctionControlMask(~unsigned(a)); }
inline MemorySemanticsMask operator|(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) | unsigned(b)); }
+inline MemorySemanticsMask operator&(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) & unsigned(b)); }
+inline MemorySemanticsMask operator^(MemorySemanticsMask a, MemorySemanticsMask b) { return MemorySemanticsMask(unsigned(a) ^ unsigned(b)); }
+inline MemorySemanticsMask operator~(MemorySemanticsMask a) { return MemorySemanticsMask(~unsigned(a)); }
inline MemoryAccessMask operator|(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) | unsigned(b)); }
+inline MemoryAccessMask operator&(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) & unsigned(b)); }
+inline MemoryAccessMask operator^(MemoryAccessMask a, MemoryAccessMask b) { return MemoryAccessMask(unsigned(a) ^ unsigned(b)); }
+inline MemoryAccessMask operator~(MemoryAccessMask a) { return MemoryAccessMask(~unsigned(a)); }
inline KernelProfilingInfoMask operator|(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) | unsigned(b)); }
+inline KernelProfilingInfoMask operator&(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) & unsigned(b)); }
+inline KernelProfilingInfoMask operator^(KernelProfilingInfoMask a, KernelProfilingInfoMask b) { return KernelProfilingInfoMask(unsigned(a) ^ unsigned(b)); }
+inline KernelProfilingInfoMask operator~(KernelProfilingInfoMask a) { return KernelProfilingInfoMask(~unsigned(a)); }
inline RayFlagsMask operator|(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) | unsigned(b)); }
+inline RayFlagsMask operator&(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) & unsigned(b)); }
+inline RayFlagsMask operator^(RayFlagsMask a, RayFlagsMask b) { return RayFlagsMask(unsigned(a) ^ unsigned(b)); }
+inline RayFlagsMask operator~(RayFlagsMask a) { return RayFlagsMask(~unsigned(a)); }
inline FragmentShadingRateMask operator|(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) | unsigned(b)); }
+inline FragmentShadingRateMask operator&(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) & unsigned(b)); }
+inline FragmentShadingRateMask operator^(FragmentShadingRateMask a, FragmentShadingRateMask b) { return FragmentShadingRateMask(unsigned(a) ^ unsigned(b)); }
+inline FragmentShadingRateMask operator~(FragmentShadingRateMask a) { return FragmentShadingRateMask(~unsigned(a)); }
} // end namespace spv
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index 4cd00db..06e3a90 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -601,7 +601,16 @@
"FunctionFloatingPointModeINTEL": 6080,
"SingleElementVectorINTEL": 6085,
"VectorComputeCallableFunctionINTEL": 6087,
- "MediaBlockIOINTEL": 6140
+ "MediaBlockIOINTEL": 6140,
+ "ConduitKernelArgumentINTEL": 6175,
+ "RegisterMapKernelArgumentINTEL": 6176,
+ "MMHostInterfaceAddressWidthINTEL": 6177,
+ "MMHostInterfaceDataWidthINTEL": 6178,
+ "MMHostInterfaceLatencyINTEL": 6179,
+ "MMHostInterfaceReadWriteModeINTEL": 6180,
+ "MMHostInterfaceMaxBurstINTEL": 6181,
+ "MMHostInterfaceWaitRequestINTEL": 6182,
+ "StableKernelArgumentINTEL": 6183
}
},
{
@@ -1113,6 +1122,7 @@
"AtomicFloat16AddEXT": 6095,
"DebugInfoModuleINTEL": 6114,
"SplitBarrierINTEL": 6141,
+ "FPGAArgumentInterfacesINTEL": 6174,
"GroupUniformArithmeticKHR": 6400
}
},
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index a755d04..42e295f 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -549,6 +549,15 @@
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ ConduitKernelArgumentINTEL = 6175,
+ RegisterMapKernelArgumentINTEL = 6176,
+ MMHostInterfaceAddressWidthINTEL = 6177,
+ MMHostInterfaceDataWidthINTEL = 6178,
+ MMHostInterfaceLatencyINTEL = 6179,
+ MMHostInterfaceReadWriteModeINTEL = 6180,
+ MMHostInterfaceMaxBurstINTEL = 6181,
+ MMHostInterfaceWaitRequestINTEL = 6182,
+ StableKernelArgumentINTEL = 6183,
},
BuiltIn = {
@@ -1095,6 +1104,7 @@
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
},
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index 8a8b979..f032cc9 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -549,6 +549,15 @@
'SingleElementVectorINTEL' : 6085,
'VectorComputeCallableFunctionINTEL' : 6087,
'MediaBlockIOINTEL' : 6140,
+ 'ConduitKernelArgumentINTEL' : 6175,
+ 'RegisterMapKernelArgumentINTEL' : 6176,
+ 'MMHostInterfaceAddressWidthINTEL' : 6177,
+ 'MMHostInterfaceDataWidthINTEL' : 6178,
+ 'MMHostInterfaceLatencyINTEL' : 6179,
+ 'MMHostInterfaceReadWriteModeINTEL' : 6180,
+ 'MMHostInterfaceMaxBurstINTEL' : 6181,
+ 'MMHostInterfaceWaitRequestINTEL' : 6182,
+ 'StableKernelArgumentINTEL' : 6183,
},
'BuiltIn' : {
@@ -1095,6 +1104,7 @@
'AtomicFloat16AddEXT' : 6095,
'DebugInfoModuleINTEL' : 6114,
'SplitBarrierINTEL' : 6141,
+ 'FPGAArgumentInterfacesINTEL' : 6174,
'GroupUniformArithmeticKHR' : 6400,
},
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index 7b5f89f..9a79c2f 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -577,6 +577,15 @@
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
+ ConduitKernelArgumentINTEL = 6175,
+ RegisterMapKernelArgumentINTEL = 6176,
+ MMHostInterfaceAddressWidthINTEL = 6177,
+ MMHostInterfaceDataWidthINTEL = 6178,
+ MMHostInterfaceLatencyINTEL = 6179,
+ MMHostInterfaceReadWriteModeINTEL = 6180,
+ MMHostInterfaceMaxBurstINTEL = 6181,
+ MMHostInterfaceWaitRequestINTEL = 6182,
+ StableKernelArgumentINTEL = 6183,
}
enum BuiltIn : uint
@@ -1140,6 +1149,7 @@
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
+ FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
}
diff --git a/tools/buildHeaders/bin/makeExtinstHeaders.py b/tools/buildHeaders/bin/makeExtinstHeaders.py
index 9359747..8852d19 100755
--- a/tools/buildHeaders/bin/makeExtinstHeaders.py
+++ b/tools/buildHeaders/bin/makeExtinstHeaders.py
@@ -26,3 +26,4 @@
mk_extinst('AMD_shader_trinary_minmax', 'extinst.spv-amd-shader-trinary-minmax.grammar.json')
mk_extinst('NonSemanticDebugPrintf', 'extinst.nonsemantic.debugprintf.grammar.json')
mk_extinst('NonSemanticClspvReflection', 'extinst.nonsemantic.clspvreflection.grammar.json')
+mk_extinst('NonSemanticDebugBreak', 'extinst.nonsemantic.debugbreak.grammar.json')
diff --git a/tools/buildHeaders/header.cpp b/tools/buildHeaders/header.cpp
index f9e06fb..fbae044 100644
--- a/tools/buildHeaders/header.cpp
+++ b/tools/buildHeaders/header.cpp
@@ -583,8 +583,7 @@
void printEpilogue(std::ostream& out) const override {
const Json::Value& enums = spvRoot["spv"]["enum"];
- // Create overloaded operator| for mask types
- out << "// Overload operator| for mask bit combining\n\n";
+ out << "// Overload bitwise operators for mask bit combining\n\n";
for (auto opClass = enums.begin(); opClass != enums.end(); ++opClass) {
const bool isMask = (*opClass)["Type"].asString() == "Bit";
@@ -593,8 +592,18 @@
if (isMask) {
const auto typeName = opName + styleStr(enumMask);
- out << "inline " + typeName + " operator|(" + typeName + " a, " + typeName + " b) { return " +
- typeName + "(unsigned(a) | unsigned(b)); }\n";
+ // Overload operator|
+ out << "inline " << typeName << " operator|(" << typeName << " a, " << typeName << " b) { return " <<
+ typeName << "(unsigned(a) | unsigned(b)); }\n";
+ // Overload operator&
+ out << "inline " << typeName << " operator&(" << typeName << " a, " << typeName << " b) { return " <<
+ typeName << "(unsigned(a) & unsigned(b)); }\n";
+ // Overload operator^
+ out << "inline " << typeName << " operator^(" << typeName << " a, " << typeName << " b) { return " <<
+ typeName << "(unsigned(a) ^ unsigned(b)); }\n";
+ // Overload operator~
+ out << "inline " << typeName << " operator~(" << typeName << " a) { return " <<
+ typeName << "(~unsigned(a)); }\n";
}
}
