| //===- TableGen'erated file -------------------------------------*- C++ -*-===// | |
| // | |
| // Assembly Writer Source Fragment | |
| // | |
| // Automatically generated file, do not edit! | |
| // | |
| //===----------------------------------------------------------------------===// | |
| /// printInstruction - This method is automatically generated by tablegen | |
| /// from the instruction set description. | |
| void X86ATTInstPrinter::printInstruction(const MCInst *MI, raw_ostream &O) { | |
| static const unsigned OpInfo[] = { | |
| 0U, // PHI | |
| 0U, // INLINEASM | |
| 0U, // PROLOG_LABEL | |
| 0U, // EH_LABEL | |
| 0U, // GC_LABEL | |
| 0U, // KILL | |
| 0U, // EXTRACT_SUBREG | |
| 0U, // INSERT_SUBREG | |
| 0U, // IMPLICIT_DEF | |
| 0U, // SUBREG_TO_REG | |
| 0U, // COPY_TO_REGCLASS | |
| 1U, // DBG_VALUE | |
| 0U, // REG_SEQUENCE | |
| 0U, // COPY | |
| 11U, // AAA | |
| 67108879U, // AAD8i8 | |
| 67108884U, // AAM8i8 | |
| 25U, // AAS | |
| 29U, // ABS_F | |
| 0U, // ABS_Fp32 | |
| 0U, // ABS_Fp64 | |
| 0U, // ABS_Fp80 | |
| 34U, // ACQUIRE_MOV16rm | |
| 34U, // ACQUIRE_MOV32rm | |
| 34U, // ACQUIRE_MOV64rm | |
| 34U, // ACQUIRE_MOV8rm | |
| 68157495U, // ADC16i16 | |
| 136314935U, // ADC16mi | |
| 136314935U, // ADC16mi8 | |
| 136314935U, // ADC16mr | |
| 204472375U, // ADC16ri | |
| 204472375U, // ADC16ri8 | |
| 271581239U, // ADC16rm | |
| 204472375U, // ADC16rr | |
| 205520951U, // ADC16rr_REV | |
| 72351805U, // ADC32i32 | |
| 140509245U, // ADC32mi | |
| 140509245U, // ADC32mi8 | |
| 140509245U, // ADC32mr | |
| 204472381U, // ADC32ri | |
| 204472381U, // ADC32ri8 | |
| 338690109U, // ADC32rm | |
| 204472381U, // ADC32rr | |
| 205520957U, // ADC32rr_REV | |
| 74448963U, // ADC64i32 | |
| 142606403U, // ADC64mi32 | |
| 142606403U, // ADC64mi8 | |
| 142606403U, // ADC64mr | |
| 204472387U, // ADC64ri32 | |
| 204472387U, // ADC64ri8 | |
| 405798979U, // ADC64rm | |
| 204472387U, // ADC64rr | |
| 205520963U, // ADC64rr_REV | |
| 76546121U, // ADC8i8 | |
| 144703561U, // ADC8mi | |
| 144703561U, // ADC8mr | |
| 204472393U, // ADC8ri | |
| 469762121U, // ADC8rm | |
| 204472393U, // ADC8rr | |
| 205520969U, // ADC8rr_REV | |
| 68157519U, // ADD16i16 | |
| 136314959U, // ADD16mi | |
| 136314959U, // ADD16mi8 | |
| 136314959U, // ADD16mr | |
| 204472399U, // ADD16ri | |
| 204472399U, // ADD16ri8 | |
| 0U, // ADD16ri8_DB | |
| 0U, // ADD16ri_DB | |
| 271581263U, // ADD16rm | |
| 204472399U, // ADD16rr | |
| 0U, // ADD16rr_DB | |
| 205520975U, // ADD16rr_REV | |
| 72351829U, // ADD32i32 | |
| 140509269U, // ADD32mi | |
| 140509269U, // ADD32mi8 | |
| 140509269U, // ADD32mr | |
| 204472405U, // ADD32ri | |
| 204472405U, // ADD32ri8 | |
| 0U, // ADD32ri8_DB | |
| 0U, // ADD32ri_DB | |
| 338690133U, // ADD32rm | |
| 204472405U, // ADD32rr | |
| 0U, // ADD32rr_DB | |
| 205520981U, // ADD32rr_REV | |
| 74448987U, // ADD64i32 | |
| 142606427U, // ADD64mi32 | |
| 142606427U, // ADD64mi8 | |
| 142606427U, // ADD64mr | |
| 204472411U, // ADD64ri32 | |
| 0U, // ADD64ri32_DB | |
| 204472411U, // ADD64ri8 | |
| 0U, // ADD64ri8_DB | |
| 405799003U, // ADD64rm | |
| 204472411U, // ADD64rr | |
| 0U, // ADD64rr_DB | |
| 205520987U, // ADD64rr_REV | |
| 76546145U, // ADD8i8 | |
| 144703585U, // ADD8mi | |
| 144703585U, // ADD8mr | |
| 204472417U, // ADD8ri | |
| 469762145U, // ADD8rm | |
| 204472417U, // ADD8rr | |
| 205520993U, // ADD8rr_REV | |
| 541065319U, // ADDPDrm | |
| 205520999U, // ADDPDrr | |
| 541065326U, // ADDPSrm | |
| 205521006U, // ADDPSrr | |
| 608174197U, // ADDSDrm | |
| 608174197U, // ADDSDrm_Int | |
| 205521013U, // ADDSDrr | |
| 205521013U, // ADDSDrr_Int | |
| 675283068U, // ADDSSrm | |
| 675283068U, // ADDSSrm_Int | |
| 205521020U, // ADDSSrr | |
| 205521020U, // ADDSSrr_Int | |
| 541065347U, // ADDSUBPDrm | |
| 205521027U, // ADDSUBPDrr | |
| 541065357U, // ADDSUBPSrm | |
| 205521037U, // ADDSUBPSrr | |
| 738197655U, // ADD_F32m | |
| 805306526U, // ADD_F64m | |
| 872415397U, // ADD_FI16m | |
| 939524269U, // ADD_FI32m | |
| 67109045U, // ADD_FPrST0 | |
| 67109052U, // ADD_FST0r | |
| 0U, // ADD_Fp32 | |
| 0U, // ADD_Fp32m | |
| 0U, // ADD_Fp64 | |
| 0U, // ADD_Fp64m | |
| 0U, // ADD_Fp64m32 | |
| 0U, // ADD_Fp80 | |
| 0U, // ADD_Fp80m32 | |
| 0U, // ADD_Fp80m64 | |
| 0U, // ADD_FpI16m32 | |
| 0U, // ADD_FpI16m64 | |
| 0U, // ADD_FpI16m80 | |
| 0U, // ADD_FpI32m32 | |
| 0U, // ADD_FpI32m64 | |
| 0U, // ADD_FpI32m80 | |
| 67109058U, // ADD_FrST0 | |
| 208U, // ADJCALLSTACKDOWN32 | |
| 208U, // ADJCALLSTACKDOWN64 | |
| 226U, // ADJCALLSTACKUP32 | |
| 226U, // ADJCALLSTACKUP64 | |
| 1010827506U, // AESDECLASTrm | |
| 205521138U, // AESDECLASTrr | |
| 1010827518U, // AESDECrm | |
| 205521150U, // AESDECrr | |
| 1010827526U, // AESENCLASTrm | |
| 205521158U, // AESENCLASTrr | |
| 1010827538U, // AESENCrm | |
| 205521170U, // AESENCrr | |
| 1073742106U, // AESIMCrm | |
| 1145045274U, // AESIMCrr | |
| 1219494178U, // AESKEYGENASSIST128rm | |
| 204505378U, // AESKEYGENASSIST128rr | |
| 68157747U, // AND16i16 | |
| 136315187U, // AND16mi | |
| 136315187U, // AND16mi8 | |
| 136315187U, // AND16mr | |
| 204472627U, // AND16ri | |
| 204472627U, // AND16ri8 | |
| 271581491U, // AND16rm | |
| 204472627U, // AND16rr | |
| 205521203U, // AND16rr_REV | |
| 72352057U, // AND32i32 | |
| 140509497U, // AND32mi | |
| 140509497U, // AND32mi8 | |
| 140509497U, // AND32mr | |
| 204472633U, // AND32ri | |
| 204472633U, // AND32ri8 | |
| 338690361U, // AND32rm | |
| 204472633U, // AND32rr | |
| 205521209U, // AND32rr_REV | |
| 74449215U, // AND64i32 | |
| 142606655U, // AND64mi32 | |
| 142606655U, // AND64mi8 | |
| 142606655U, // AND64mr | |
| 204472639U, // AND64ri32 | |
| 204472639U, // AND64ri8 | |
| 405799231U, // AND64rm | |
| 204472639U, // AND64rr | |
| 205521215U, // AND64rr_REV | |
| 76546373U, // AND8i8 | |
| 144703813U, // AND8mi | |
| 144703813U, // AND8mr | |
| 204472645U, // AND8ri | |
| 469762373U, // AND8rm | |
| 204472645U, // AND8rr | |
| 205521221U, // AND8rr_REV | |
| 338723147U, // ANDN32rm | |
| 204505419U, // ANDN32rr | |
| 405832018U, // ANDN64rm | |
| 204505426U, // ANDN64rr | |
| 541065561U, // ANDNPDrm | |
| 205521241U, // ANDNPDrr | |
| 541065569U, // ANDNPSrm | |
| 205521249U, // ANDNPSrr | |
| 541065577U, // ANDPDrm | |
| 205521257U, // ANDPDrr | |
| 541065584U, // ANDPSrm | |
| 205521264U, // ANDPSrr | |
| 79757687U, // ARPL16mr | |
| 79790455U, // ARPL16rr | |
| 381U, // ATOMADD6432 | |
| 402U, // ATOMAND16 | |
| 421U, // ATOMAND32 | |
| 440U, // ATOMAND64 | |
| 459U, // ATOMAND6432 | |
| 480U, // ATOMAND8 | |
| 498U, // ATOMMAX16 | |
| 517U, // ATOMMAX32 | |
| 536U, // ATOMMAX64 | |
| 555U, // ATOMMIN16 | |
| 574U, // ATOMMIN32 | |
| 593U, // ATOMMIN64 | |
| 612U, // ATOMNAND16 | |
| 632U, // ATOMNAND32 | |
| 652U, // ATOMNAND64 | |
| 672U, // ATOMNAND6432 | |
| 694U, // ATOMNAND8 | |
| 713U, // ATOMOR16 | |
| 731U, // ATOMOR32 | |
| 749U, // ATOMOR64 | |
| 767U, // ATOMOR6432 | |
| 787U, // ATOMOR8 | |
| 804U, // ATOMSUB6432 | |
| 825U, // ATOMSWAP6432 | |
| 847U, // ATOMUMAX16 | |
| 867U, // ATOMUMAX32 | |
| 887U, // ATOMUMAX64 | |
| 907U, // ATOMUMIN16 | |
| 927U, // ATOMUMIN32 | |
| 947U, // ATOMUMIN64 | |
| 967U, // ATOMXOR16 | |
| 986U, // ATOMXOR32 | |
| 1005U, // ATOMXOR64 | |
| 1024U, // ATOMXOR6432 | |
| 1045U, // ATOMXOR8 | |
| 0U, // AVX_SET0PDY | |
| 0U, // AVX_SET0PSY | |
| 0U, // AVX_SETALLONES | |
| 1288832039U, // BLENDPDrmi | |
| 1346372647U, // BLENDPDrri | |
| 1288832048U, // BLENDPSrmi | |
| 1346372656U, // BLENDPSrri | |
| 1010828345U, // BLENDVPDrm0 | |
| 205521977U, // BLENDVPDrr0 | |
| 1010828355U, // BLENDVPSrm0 | |
| 205521987U, // BLENDVPSrr0 | |
| 1409287245U, // BOUNDS16rm | |
| 1476396109U, // BOUNDS32rm | |
| 1409287252U, // BSF16rm | |
| 1145046100U, // BSF16rr | |
| 1476396122U, // BSF32rm | |
| 1145046106U, // BSF32rr | |
| 1543504992U, // BSF64rm | |
| 1145046112U, // BSF64rr | |
| 1409287270U, // BSR16rm | |
| 1145046118U, // BSR16rr | |
| 1476396140U, // BSR32rm | |
| 1145046124U, // BSR32rr | |
| 1543505010U, // BSR64rm | |
| 1145046130U, // BSR64rr | |
| 67110008U, // BSWAP32r | |
| 67110016U, // BSWAP64r | |
| 136316040U, // BT16mi8 | |
| 136316040U, // BT16mr | |
| 1145046152U, // BT16ri8 | |
| 1145046152U, // BT16rr | |
| 140510349U, // BT32mi8 | |
| 140510349U, // BT32mr | |
| 1145046157U, // BT32ri8 | |
| 1145046157U, // BT32rr | |
| 142607506U, // BT64mi8 | |
| 142607506U, // BT64mr | |
| 1145046162U, // BT64ri8 | |
| 1145046162U, // BT64rr | |
| 136316055U, // BTC16mi8 | |
| 136316055U, // BTC16mr | |
| 1145046167U, // BTC16ri8 | |
| 1145046167U, // BTC16rr | |
| 140510365U, // BTC32mi8 | |
| 140510365U, // BTC32mr | |
| 1145046173U, // BTC32ri8 | |
| 1145046173U, // BTC32rr | |
| 142607523U, // BTC64mi8 | |
| 142607523U, // BTC64mr | |
| 1145046179U, // BTC64ri8 | |
| 1145046179U, // BTC64rr | |
| 136316073U, // BTR16mi8 | |
| 136316073U, // BTR16mr | |
| 1145046185U, // BTR16ri8 | |
| 1145046185U, // BTR16rr | |
| 140510383U, // BTR32mi8 | |
| 140510383U, // BTR32mr | |
| 1145046191U, // BTR32ri8 | |
| 1145046191U, // BTR32rr | |
| 142607541U, // BTR64mi8 | |
| 142607541U, // BTR64mr | |
| 1145046197U, // BTR64ri8 | |
| 1145046197U, // BTR64rr | |
| 136316091U, // BTS16mi8 | |
| 136316091U, // BTS16mr | |
| 1145046203U, // BTS16ri8 | |
| 1145046203U, // BTS16rr | |
| 140510401U, // BTS32mi8 | |
| 140510401U, // BTS32mr | |
| 1145046209U, // BTS32ri8 | |
| 1145046209U, // BTS32rr | |
| 142607559U, // BTS64mi8 | |
| 142607559U, // BTS64mr | |
| 1145046215U, // BTS64ri8 | |
| 1145046215U, // BTS64rr | |
| 939525325U, // CALL32m | |
| 67110093U, // CALL32r | |
| 1610613973U, // CALL64m | |
| 1677722845U, // CALL64pcrel32 | |
| 67110101U, // CALL64r | |
| 1677722852U, // CALLpcrel16 | |
| 1677722859U, // CALLpcrel32 | |
| 1266U, // CBW | |
| 1271U, // CDQ | |
| 1276U, // CDQE | |
| 1281U, // CHS_F | |
| 0U, // CHS_Fp32 | |
| 0U, // CHS_Fp64 | |
| 0U, // CHS_Fp80 | |
| 1286U, // CLC | |
| 1290U, // CLD | |
| 1744831758U, // CLFLUSH | |
| 1303U, // CLI | |
| 1307U, // CLTS | |
| 1312U, // CMC | |
| 272631076U, // CMOVA16rm | |
| 205522212U, // CMOVA16rr | |
| 339739948U, // CMOVA32rm | |
| 205522220U, // CMOVA32rr | |
| 406848820U, // CMOVA64rm | |
| 205522228U, // CMOVA64rr | |
| 272631100U, // CMOVAE16rm | |
| 205522236U, // CMOVAE16rr | |
| 339739973U, // CMOVAE32rm | |
| 205522245U, // CMOVAE32rr | |
| 406848846U, // CMOVAE64rm | |
| 205522254U, // CMOVAE64rr | |
| 272631127U, // CMOVB16rm | |
| 205522263U, // CMOVB16rr | |
| 339739999U, // CMOVB32rm | |
| 205522271U, // CMOVB32rr | |
| 406848871U, // CMOVB64rm | |
| 205522279U, // CMOVB64rr | |
| 272631151U, // CMOVBE16rm | |
| 205522287U, // CMOVBE16rr | |
| 339740024U, // CMOVBE32rm | |
| 205522296U, // CMOVBE32rr | |
| 406848897U, // CMOVBE64rm | |
| 205522305U, // CMOVBE64rr | |
| 81790346U, // CMOVBE_F | |
| 0U, // CMOVBE_Fp32 | |
| 0U, // CMOVBE_Fp64 | |
| 0U, // CMOVBE_Fp80 | |
| 81790355U, // CMOVB_F | |
| 0U, // CMOVB_Fp32 | |
| 0U, // CMOVB_Fp64 | |
| 0U, // CMOVB_Fp80 | |
| 272631195U, // CMOVE16rm | |
| 205522331U, // CMOVE16rr | |
| 339740067U, // CMOVE32rm | |
| 205522339U, // CMOVE32rr | |
| 406848939U, // CMOVE64rm | |
| 205522347U, // CMOVE64rr | |
| 81790387U, // CMOVE_F | |
| 0U, // CMOVE_Fp32 | |
| 0U, // CMOVE_Fp64 | |
| 0U, // CMOVE_Fp80 | |
| 272631227U, // CMOVG16rm | |
| 205522363U, // CMOVG16rr | |
| 339740099U, // CMOVG32rm | |
| 205522371U, // CMOVG32rr | |
| 406848971U, // CMOVG64rm | |
| 205522379U, // CMOVG64rr | |
| 272631251U, // CMOVGE16rm | |
| 205522387U, // CMOVGE16rr | |
| 339740124U, // CMOVGE32rm | |
| 205522396U, // CMOVGE32rr | |
| 406848997U, // CMOVGE64rm | |
| 205522405U, // CMOVGE64rr | |
| 272631278U, // CMOVL16rm | |
| 205522414U, // CMOVL16rr | |
| 339740150U, // CMOVL32rm | |
| 205522422U, // CMOVL32rr | |
| 406849022U, // CMOVL64rm | |
| 205522430U, // CMOVL64rr | |
| 272631302U, // CMOVLE16rm | |
| 205522438U, // CMOVLE16rr | |
| 339740175U, // CMOVLE32rm | |
| 205522447U, // CMOVLE32rr | |
| 406849048U, // CMOVLE64rm | |
| 205522456U, // CMOVLE64rr | |
| 81790497U, // CMOVNBE_F | |
| 0U, // CMOVNBE_Fp32 | |
| 0U, // CMOVNBE_Fp64 | |
| 0U, // CMOVNBE_Fp80 | |
| 81790507U, // CMOVNB_F | |
| 0U, // CMOVNB_Fp32 | |
| 0U, // CMOVNB_Fp64 | |
| 0U, // CMOVNB_Fp80 | |
| 272631348U, // CMOVNE16rm | |
| 205522484U, // CMOVNE16rr | |
| 339740221U, // CMOVNE32rm | |
| 205522493U, // CMOVNE32rr | |
| 406849094U, // CMOVNE64rm | |
| 205522502U, // CMOVNE64rr | |
| 81790543U, // CMOVNE_F | |
| 0U, // CMOVNE_Fp32 | |
| 0U, // CMOVNE_Fp64 | |
| 0U, // CMOVNE_Fp80 | |
| 272631384U, // CMOVNO16rm | |
| 205522520U, // CMOVNO16rr | |
| 339740257U, // CMOVNO32rm | |
| 205522529U, // CMOVNO32rr | |
| 406849130U, // CMOVNO64rm | |
| 205522538U, // CMOVNO64rr | |
| 272631411U, // CMOVNP16rm | |
| 205522547U, // CMOVNP16rr | |
| 339740284U, // CMOVNP32rm | |
| 205522556U, // CMOVNP32rr | |
| 406849157U, // CMOVNP64rm | |
| 205522565U, // CMOVNP64rr | |
| 81790606U, // CMOVNP_F | |
| 0U, // CMOVNP_Fp32 | |
| 0U, // CMOVNP_Fp64 | |
| 0U, // CMOVNP_Fp80 | |
| 272631447U, // CMOVNS16rm | |
| 205522583U, // CMOVNS16rr | |
| 339740320U, // CMOVNS32rm | |
| 205522592U, // CMOVNS32rr | |
| 406849193U, // CMOVNS64rm | |
| 205522601U, // CMOVNS64rr | |
| 272631474U, // CMOVO16rm | |
| 205522610U, // CMOVO16rr | |
| 339740346U, // CMOVO32rm | |
| 205522618U, // CMOVO32rr | |
| 406849218U, // CMOVO64rm | |
| 205522626U, // CMOVO64rr | |
| 272631498U, // CMOVP16rm | |
| 205522634U, // CMOVP16rr | |
| 339740370U, // CMOVP32rm | |
| 205522642U, // CMOVP32rr | |
| 406849242U, // CMOVP64rm | |
| 205522650U, // CMOVP64rr | |
| 81790690U, // CMOVP_F | |
| 0U, // CMOVP_Fp32 | |
| 0U, // CMOVP_Fp64 | |
| 0U, // CMOVP_Fp80 | |
| 272631531U, // CMOVS16rm | |
| 205522667U, // CMOVS16rr | |
| 339740403U, // CMOVS32rm | |
| 205522675U, // CMOVS32rr | |
| 406849275U, // CMOVS64rm | |
| 205522683U, // CMOVS64rr | |
| 1795U, // CMOV_FR32 | |
| 1814U, // CMOV_FR64 | |
| 1833U, // CMOV_GR16 | |
| 1853U, // CMOV_GR32 | |
| 1873U, // CMOV_GR8 | |
| 1891U, // CMOV_RFP32 | |
| 1911U, // CMOV_RFP64 | |
| 1931U, // CMOV_RFP80 | |
| 1951U, // CMOV_V2F64 | |
| 1971U, // CMOV_V2I64 | |
| 1991U, // CMOV_V4F32 | |
| 2011U, // CMOV_V4F64 | |
| 2031U, // CMOV_V4I64 | |
| 2051U, // CMOV_V8F32 | |
| 68159511U, // CMP16i16 | |
| 136316951U, // CMP16mi | |
| 136316951U, // CMP16mi8 | |
| 136316951U, // CMP16mr | |
| 1145047063U, // CMP16ri | |
| 1145047063U, // CMP16ri8 | |
| 1409288215U, // CMP16rm | |
| 1145047063U, // CMP16rr | |
| 1145047063U, // CMP16rr_REV | |
| 72353821U, // CMP32i32 | |
| 140511261U, // CMP32mi | |
| 140511261U, // CMP32mi8 | |
| 140511261U, // CMP32mr | |
| 1145047069U, // CMP32ri | |
| 1145047069U, // CMP32ri8 | |
| 1476397085U, // CMP32rm | |
| 1145047069U, // CMP32rr | |
| 1145047069U, // CMP32rr_REV | |
| 74450979U, // CMP64i32 | |
| 142608419U, // CMP64mi32 | |
| 142608419U, // CMP64mi8 | |
| 142608419U, // CMP64mr | |
| 1145047075U, // CMP64ri32 | |
| 1145047075U, // CMP64ri8 | |
| 1543505955U, // CMP64rm | |
| 1145047075U, // CMP64rr | |
| 1145047075U, // CMP64rr_REV | |
| 76548137U, // CMP8i8 | |
| 144705577U, // CMP8mi | |
| 144705577U, // CMP8mr | |
| 1145047081U, // CMP8ri | |
| 1811941417U, // CMP8rm | |
| 1145047081U, // CMP8rr | |
| 1145047081U, // CMP8rr_REV | |
| 1894942767U, // CMPPDrmi | |
| 1291978803U, // CMPPDrmi_alt | |
| 1962084399U, // CMPPDrri | |
| 1346373683U, // CMPPDrri_alt | |
| 1897039919U, // CMPPSrmi | |
| 1291978810U, // CMPPSrmi_alt | |
| 1964181551U, // CMPPSrri | |
| 1346373690U, // CMPPSrri_alt | |
| 2113U, // CMPS16 | |
| 2119U, // CMPS32 | |
| 2125U, // CMPS64 | |
| 2131U, // CMPS8 | |
| 1898154031U, // CMPSDrm | |
| 1295124569U, // CMPSDrm_alt | |
| 1965230127U, // CMPSDrr | |
| 1346373721U, // CMPSDrr_alt | |
| 1900283951U, // CMPSSrm | |
| 1297221728U, // CMPSSrm_alt | |
| 1967327279U, // CMPSSrr | |
| 1346373728U, // CMPSSrr_alt | |
| 2013268071U, // CMPXCHG16B | |
| 136317043U, // CMPXCHG16rm | |
| 1145047155U, // CMPXCHG16rr | |
| 140511357U, // CMPXCHG32rm | |
| 1145047165U, // CMPXCHG32rr | |
| 142608519U, // CMPXCHG64rm | |
| 1145047175U, // CMPXCHG64rr | |
| 1610614929U, // CMPXCHG8B | |
| 144705692U, // CMPXCHG8rm | |
| 1145047196U, // CMPXCHG8rr | |
| 2080376998U, // COMISDrm | |
| 1145047206U, // COMISDrr | |
| 2080377006U, // COMISSrm | |
| 1145047214U, // COMISSrr | |
| 67111094U, // COMP_FST0r | |
| 67111101U, // COM_FIPr | |
| 67111109U, // COM_FIr | |
| 67111116U, // COM_FST0r | |
| 2258U, // COS_F | |
| 0U, // COS_Fp32 | |
| 0U, // COS_Fp64 | |
| 0U, // COS_Fp80 | |
| 2263U, // CPUID | |
| 2269U, // CQO | |
| 271583458U, // CRC32r32m16 | |
| 338692331U, // CRC32r32m32 | |
| 469764340U, // CRC32r32m8 | |
| 204474594U, // CRC32r32r16 | |
| 204474603U, // CRC32r32r32 | |
| 204474612U, // CRC32r32r8 | |
| 405801213U, // CRC32r64m64 | |
| 469764340U, // CRC32r64m8 | |
| 204474621U, // CRC32r64r64 | |
| 204474612U, // CRC32r64r8 | |
| 2310U, // CS_PREFIX | |
| 2080377097U, // CVTDQ2PDrm | |
| 1145047305U, // CVTDQ2PDrr | |
| 1073744147U, // CVTDQ2PSrm | |
| 1145047315U, // CVTDQ2PSrr | |
| 2080377117U, // CVTPD2DQrm | |
| 1145047325U, // CVTPD2DQrr | |
| 2080377127U, // CVTPD2PSrm | |
| 1145047335U, // CVTPD2PSrr | |
| 2080377137U, // CVTPS2DQrm | |
| 1145047345U, // CVTPS2DQrr | |
| 2147486011U, // CVTPS2PDrm | |
| 1145047355U, // CVTPS2PDrr | |
| 2080377157U, // CVTSD2SI64rm | |
| 1145047365U, // CVTSD2SI64rr | |
| 2080377168U, // CVTSD2SIrm | |
| 1145047376U, // CVTSD2SIrr | |
| 2147486043U, // CVTSD2SSrm | |
| 1145047387U, // CVTSD2SSrr | |
| 1543506277U, // CVTSI2SD64rm | |
| 1145047397U, // CVTSI2SD64rr | |
| 1476397424U, // CVTSI2SDrm | |
| 1145047408U, // CVTSI2SDrr | |
| 1543506298U, // CVTSI2SS64rm | |
| 1145047418U, // CVTSI2SS64rr | |
| 1476397445U, // CVTSI2SSrm | |
| 1145047429U, // CVTSI2SSrr | |
| 2214594959U, // CVTSS2SDrm | |
| 1145047439U, // CVTSS2SDrr | |
| 2214594969U, // CVTSS2SI64rm | |
| 1145047449U, // CVTSS2SI64rr | |
| 2214594980U, // CVTSS2SIrm | |
| 1145047460U, // CVTSS2SIrr | |
| 2080377263U, // CVTTPD2DQrm | |
| 1145047471U, // CVTTPD2DQrr | |
| 2080377274U, // CVTTPS2DQrm | |
| 1145047482U, // CVTTPS2DQrr | |
| 2147486149U, // CVTTSD2SI64rm | |
| 1145047493U, // CVTTSD2SI64rr | |
| 2147486161U, // CVTTSD2SIrm | |
| 1145047505U, // CVTTSD2SIrr | |
| 2214595036U, // CVTTSS2SI64rm | |
| 1145047516U, // CVTTSS2SI64rr | |
| 2214595048U, // CVTTSS2SIrm | |
| 1145047528U, // CVTTSS2SIrr | |
| 2547U, // CWD | |
| 2552U, // CWDE | |
| 2557U, // DAA | |
| 2561U, // DAS | |
| 2565U, // DATA16_PREFIX | |
| 872417804U, // DEC16m | |
| 67111436U, // DEC16r | |
| 939526674U, // DEC32m | |
| 67111442U, // DEC32r | |
| 872417804U, // DEC64_16m | |
| 67111436U, // DEC64_16r | |
| 939526674U, // DEC64_32m | |
| 67111442U, // DEC64_32r | |
| 1610615320U, // DEC64m | |
| 67111448U, // DEC64r | |
| 1744833054U, // DEC8m | |
| 67111454U, // DEC8r | |
| 872417828U, // DIV16m | |
| 67111460U, // DIV16r | |
| 939526698U, // DIV32m | |
| 67111466U, // DIV32r | |
| 1610615344U, // DIV64m | |
| 67111472U, // DIV64r | |
| 1744833078U, // DIV8m | |
| 67111478U, // DIV8r | |
| 541067836U, // DIVPDrm | |
| 205523516U, // DIVPDrr | |
| 541067843U, // DIVPSrm | |
| 205523523U, // DIVPSrr | |
| 738200138U, // DIVR_F32m | |
| 805309010U, // DIVR_F64m | |
| 872417882U, // DIVR_FI16m | |
| 939526755U, // DIVR_FI32m | |
| 67111532U, // DIVR_FPrST0 | |
| 67111539U, // DIVR_FST0r | |
| 0U, // DIVR_Fp32m | |
| 0U, // DIVR_Fp64m | |
| 0U, // DIVR_Fp64m32 | |
| 0U, // DIVR_Fp80m32 | |
| 0U, // DIVR_Fp80m64 | |
| 0U, // DIVR_FpI16m32 | |
| 0U, // DIVR_FpI16m64 | |
| 0U, // DIVR_FpI16m80 | |
| 0U, // DIVR_FpI32m32 | |
| 0U, // DIVR_FpI32m64 | |
| 0U, // DIVR_FpI32m80 | |
| 67111546U, // DIVR_FrST0 | |
| 608176776U, // DIVSDrm | |
| 608176776U, // DIVSDrm_Int | |
| 205523592U, // DIVSDrr | |
| 205523592U, // DIVSDrr_Int | |
| 675285647U, // DIVSSrm | |
| 675285647U, // DIVSSrm_Int | |
| 205523599U, // DIVSSrr | |
| 205523599U, // DIVSSrr_Int | |
| 738200214U, // DIV_F32m | |
| 805309085U, // DIV_F64m | |
| 872417956U, // DIV_FI16m | |
| 939526828U, // DIV_FI32m | |
| 67111604U, // DIV_FPrST0 | |
| 67111612U, // DIV_FST0r | |
| 0U, // DIV_Fp32 | |
| 0U, // DIV_Fp32m | |
| 0U, // DIV_Fp64 | |
| 0U, // DIV_Fp64m | |
| 0U, // DIV_Fp64m32 | |
| 0U, // DIV_Fp80 | |
| 0U, // DIV_Fp80m32 | |
| 0U, // DIV_Fp80m64 | |
| 0U, // DIV_FpI16m32 | |
| 0U, // DIV_FpI16m64 | |
| 0U, // DIV_FpI16m80 | |
| 0U, // DIV_FpI32m32 | |
| 0U, // DIV_FpI32m64 | |
| 0U, // DIV_FpI32m80 | |
| 67111618U, // DIV_FrST0 | |
| 1288833745U, // DPPDrmi | |
| 1346374353U, // DPPDrri | |
| 1288833751U, // DPPSrmi | |
| 1346374359U, // DPPSrri | |
| 2781U, // DS_PREFIX | |
| 67111648U, // EH_RETURN | |
| 67111648U, // EH_RETURN64 | |
| 79792887U, // ENTER | |
| 2814U, // ES_PREFIX | |
| 1231325953U, // EXTRACTPSmr | |
| 204507905U, // EXTRACTPSrr | |
| 2828U, // F2XM1 | |
| 1145047826U, // FARCALL16i | |
| 2281704218U, // FARCALL16m | |
| 1145047843U, // FARCALL32i | |
| 2281704235U, // FARCALL32m | |
| 2281704244U, // FARCALL64 | |
| 1145047869U, // FARJMP16i | |
| 2281704260U, // FARJMP16m | |
| 1145047884U, // FARJMP32i | |
| 2281704275U, // FARJMP32m | |
| 2281704283U, // FARJMP64 | |
| 738200419U, // FBLDm | |
| 738200425U, // FBSTPm | |
| 738200432U, // FCOM32m | |
| 805309303U, // FCOM64m | |
| 738200446U, // FCOMP32m | |
| 805309318U, // FCOMP64m | |
| 2958U, // FCOMPP | |
| 2965U, // FDECSTP | |
| 2973U, // FEMMS | |
| 67111843U, // FFREE | |
| 872418218U, // FICOM16m | |
| 939527090U, // FICOM32m | |
| 872418234U, // FICOMP16m | |
| 939527107U, // FICOMP32m | |
| 3020U, // FINCSTP | |
| 872418260U, // FLDCW16m | |
| 738200539U, // FLDENVm | |
| 3043U, // FLDL2E | |
| 3050U, // FLDL2T | |
| 3057U, // FLDLG2 | |
| 3064U, // FLDLN2 | |
| 3071U, // FLDPI | |
| 3077U, // FNCLEX | |
| 3084U, // FNINIT | |
| 3091U, // FNOP | |
| 872418328U, // FNSTCW16m | |
| 3104U, // FNSTSW8r | |
| 738200619U, // FNSTSWm | |
| 0U, // FP32_TO_INT16_IN_MEM | |
| 0U, // FP32_TO_INT32_IN_MEM | |
| 0U, // FP32_TO_INT64_IN_MEM | |
| 0U, // FP64_TO_INT16_IN_MEM | |
| 0U, // FP64_TO_INT32_IN_MEM | |
| 0U, // FP64_TO_INT64_IN_MEM | |
| 0U, // FP80_TO_INT16_IN_MEM | |
| 0U, // FP80_TO_INT32_IN_MEM | |
| 0U, // FP80_TO_INT64_IN_MEM | |
| 3123U, // FPATAN | |
| 3130U, // FPREM | |
| 3136U, // FPREM1 | |
| 3143U, // FPTAN | |
| 3149U, // FRNDINT | |
| 738200661U, // FRSTORm | |
| 738200669U, // FSAVEm | |
| 3173U, // FSCALE | |
| 3180U, // FSINCOS | |
| 738200692U, // FSTENVm | |
| 3197U, // FS_PREFIX | |
| 3200U, // FXAM | |
| 2281704581U, // FXRSTOR | |
| 2281704590U, // FXRSTOR64 | |
| 2281704600U, // FXSAVE | |
| 2281704608U, // FXSAVE64 | |
| 3241U, // FXTRACT | |
| 3249U, // FYL2X | |
| 3255U, // FYL2XP1 | |
| 0U, // FpPOP_RETVAL | |
| 541065561U, // FsANDNPDrm | |
| 205521241U, // FsANDNPDrr | |
| 541065569U, // FsANDNPSrm | |
| 205521249U, // FsANDNPSrr | |
| 541065577U, // FsANDPDrm | |
| 205521257U, // FsANDPDrr | |
| 541065584U, // FsANDPSrm | |
| 205521264U, // FsANDPSrr | |
| 0U, // FsFLD0SD | |
| 0U, // FsFLD0SS | |
| 2080378047U, // FsMOVAPDrm | |
| 1145048255U, // FsMOVAPDrr | |
| 2080378055U, // FsMOVAPSrm | |
| 1145048263U, // FsMOVAPSrr | |
| 541068495U, // FsORPDrm | |
| 205524175U, // FsORPDrr | |
| 541068501U, // FsORPSrm | |
| 205524181U, // FsORPSrr | |
| 2080378075U, // FsVMOVAPDrm | |
| 1145048283U, // FsVMOVAPDrr | |
| 2080378084U, // FsVMOVAPSrm | |
| 1145048292U, // FsVMOVAPSrr | |
| 541068525U, // FsXORPDrm | |
| 205524205U, // FsXORPDrr | |
| 541068532U, // FsXORPSrm | |
| 205524212U, // FsXORPSrr | |
| 3323U, // GS_PREFIX | |
| 541068542U, // HADDPDrm | |
| 205524222U, // HADDPDrr | |
| 541068550U, // HADDPSrm | |
| 205524230U, // HADDPSrr | |
| 3342U, // HLT | |
| 541068562U, // HSUBPDrm | |
| 205524242U, // HSUBPDrr | |
| 541068570U, // HSUBPSrm | |
| 205524250U, // HSUBPSrr | |
| 872418594U, // IDIV16m | |
| 67112226U, // IDIV16r | |
| 939527465U, // IDIV32m | |
| 67112233U, // IDIV32r | |
| 1610616112U, // IDIV64m | |
| 67112240U, // IDIV64r | |
| 1744833847U, // IDIV8m | |
| 67112247U, // IDIV8r | |
| 872418622U, // ILD_F16m | |
| 939527493U, // ILD_F32m | |
| 1610616140U, // ILD_F64m | |
| 0U, // ILD_Fp16m32 | |
| 0U, // ILD_Fp16m64 | |
| 0U, // ILD_Fp16m80 | |
| 0U, // ILD_Fp32m32 | |
| 0U, // ILD_Fp32m64 | |
| 0U, // ILD_Fp32m80 | |
| 0U, // ILD_Fp64m32 | |
| 0U, // ILD_Fp64m64 | |
| 0U, // ILD_Fp64m80 | |
| 872418644U, // IMUL16m | |
| 67112276U, // IMUL16r | |
| 272633172U, // IMUL16rm | |
| 1232080212U, // IMUL16rmi | |
| 1232080212U, // IMUL16rmi8 | |
| 205524308U, // IMUL16rr | |
| 204508500U, // IMUL16rri | |
| 204508500U, // IMUL16rri8 | |
| 939527515U, // IMUL32m | |
| 67112283U, // IMUL32r | |
| 339742043U, // IMUL32rm | |
| 1233128795U, // IMUL32rmi | |
| 1233128795U, // IMUL32rmi8 | |
| 205524315U, // IMUL32rr | |
| 204508507U, // IMUL32rri | |
| 204508507U, // IMUL32rri8 | |
| 1610616162U, // IMUL64m | |
| 67112290U, // IMUL64r | |
| 406850914U, // IMUL64rm | |
| 1234177378U, // IMUL64rmi32 | |
| 1234177378U, // IMUL64rmi8 | |
| 205524322U, // IMUL64rr | |
| 204508514U, // IMUL64rri32 | |
| 204508514U, // IMUL64rri8 | |
| 1744833897U, // IMUL8m | |
| 67112297U, // IMUL8r | |
| 3440U, // IN16 | |
| 68160885U, // IN16ri | |
| 3450U, // IN16rr | |
| 3463U, // IN32 | |
| 72355212U, // IN32ri | |
| 3473U, // IN32rr | |
| 3487U, // IN8 | |
| 76549540U, // IN8ri | |
| 3497U, // IN8rr | |
| 872418742U, // INC16m | |
| 67112374U, // INC16r | |
| 939527612U, // INC32m | |
| 67112380U, // INC32r | |
| 872418742U, // INC64_16m | |
| 67112374U, // INC64_16r | |
| 939527612U, // INC64_32m | |
| 67112380U, // INC64_32r | |
| 1610616258U, // INC64m | |
| 67112386U, // INC64r | |
| 1744833992U, // INC8m | |
| 67112392U, // INC8r | |
| 1297223118U, // INSERTPSrm | |
| 1346375118U, // INSERTPSrr | |
| 67112408U, // INT | |
| 3549U, // INT3 | |
| 3554U, // INTO | |
| 3559U, // INVD | |
| 1073745388U, // INVEPT32 | |
| 1073745388U, // INVEPT64 | |
| 1744834036U, // INVLPG | |
| 1073745404U, // INVVPID32 | |
| 1073745404U, // INVVPID64 | |
| 3589U, // IRET16 | |
| 3595U, // IRET32 | |
| 3601U, // IRET64 | |
| 872418839U, // ISTT_FP16m | |
| 939527712U, // ISTT_FP32m | |
| 1610616361U, // ISTT_FP64m | |
| 0U, // ISTT_Fp16m32 | |
| 0U, // ISTT_Fp16m64 | |
| 0U, // ISTT_Fp16m80 | |
| 0U, // ISTT_Fp32m32 | |
| 0U, // ISTT_Fp32m64 | |
| 0U, // ISTT_Fp32m80 | |
| 0U, // ISTT_Fp64m32 | |
| 0U, // ISTT_Fp64m64 | |
| 0U, // ISTT_Fp64m80 | |
| 872418867U, // IST_F16m | |
| 939527738U, // IST_F32m | |
| 872418881U, // IST_FP16m | |
| 939527753U, // IST_FP32m | |
| 1610616401U, // IST_FP64m | |
| 0U, // IST_Fp16m32 | |
| 0U, // IST_Fp16m64 | |
| 0U, // IST_Fp16m80 | |
| 0U, // IST_Fp32m32 | |
| 0U, // IST_Fp32m64 | |
| 0U, // IST_Fp32m80 | |
| 0U, // IST_Fp64m32 | |
| 0U, // IST_Fp64m64 | |
| 0U, // IST_Fp64m80 | |
| 1898186799U, // Int_CMPSDrm | |
| 1965230127U, // Int_CMPSDrr | |
| 1900283951U, // Int_CMPSSrm | |
| 1967327279U, // Int_CMPSSrr | |
| 2080376998U, // Int_COMISDrm | |
| 1145047206U, // Int_COMISDrr | |
| 2080377006U, // Int_COMISSrm | |
| 1145047214U, // Int_COMISSrr | |
| 1543506185U, // Int_CVTDQ2PDrm | |
| 1145047305U, // Int_CVTDQ2PDrr | |
| 1073744147U, // Int_CVTDQ2PSrm | |
| 1145047315U, // Int_CVTDQ2PSrr | |
| 2080377117U, // Int_CVTPD2DQrm | |
| 1145047325U, // Int_CVTPD2DQrr | |
| 2080377127U, // Int_CVTPD2PSrm | |
| 1145047335U, // Int_CVTPD2PSrr | |
| 2080377137U, // Int_CVTPS2DQrm | |
| 1145047345U, // Int_CVTPS2DQrr | |
| 2147486011U, // Int_CVTPS2PDrm | |
| 1145047355U, // Int_CVTPS2PDrr | |
| 608176475U, // Int_CVTSD2SSrm | |
| 205523291U, // Int_CVTSD2SSrr | |
| 406849904U, // Int_CVTSI2SD64rm | |
| 205523312U, // Int_CVTSI2SD64rr | |
| 339741040U, // Int_CVTSI2SDrm | |
| 205523312U, // Int_CVTSI2SDrr | |
| 406849914U, // Int_CVTSI2SS64rm | |
| 205523322U, // Int_CVTSI2SS64rr | |
| 339741061U, // Int_CVTSI2SSrm | |
| 205523333U, // Int_CVTSI2SSrr | |
| 675285391U, // Int_CVTSS2SDrm | |
| 205523343U, // Int_CVTSS2SDrr | |
| 2080377285U, // Int_CVTTSD2SI64rm | |
| 1145047493U, // Int_CVTTSD2SI64rr | |
| 2080377297U, // Int_CVTTSD2SIrm | |
| 1145047505U, // Int_CVTTSD2SIrr | |
| 2214595036U, // Int_CVTTSS2SI64rm | |
| 1145047516U, // Int_CVTTSS2SI64rr | |
| 2214595048U, // Int_CVTTSS2SIrm | |
| 1145047528U, // Int_CVTTSS2SIrr | |
| 3674U, // Int_MemBarrier | |
| 94375526U, // Int_MemBarrierNoSSE64 | |
| 2080378481U, // Int_UCOMISDrm | |
| 1145048689U, // Int_UCOMISDrr | |
| 2080378490U, // Int_UCOMISSrm | |
| 1145048698U, // Int_UCOMISSrr | |
| 1898188419U, // Int_VCMPSDrm | |
| 1965231747U, // Int_VCMPSDrr | |
| 1900285571U, // Int_VCMPSSrm | |
| 1967328899U, // Int_VCMPSSrr | |
| 2080378504U, // Int_VCOMISDrm | |
| 1145048712U, // Int_VCOMISDrr | |
| 2080378513U, // Int_VCOMISSrm | |
| 1145048721U, // Int_VCOMISSrr | |
| 1543507610U, // Int_VCVTDQ2PDrm | |
| 1145048730U, // Int_VCVTDQ2PDrr | |
| 1073745573U, // Int_VCVTDQ2PSrm | |
| 1145048741U, // Int_VCVTDQ2PSrr | |
| 2080378544U, // Int_VCVTPD2DQrm | |
| 1145048752U, // Int_VCVTPD2DQrr | |
| 2080378555U, // Int_VCVTPD2PSrm | |
| 1145048763U, // Int_VCVTPD2PSrr | |
| 2080378566U, // Int_VCVTPS2DQrm | |
| 1145048774U, // Int_VCVTPS2DQrr | |
| 2147487441U, // Int_VCVTPS2PDrm | |
| 1145048785U, // Int_VCVTPS2PDrr | |
| 2080378588U, // Int_VCVTSD2SI64rm | |
| 1145048796U, // Int_VCVTSD2SI64rr | |
| 2080378588U, // Int_VCVTSD2SIrm | |
| 1145048796U, // Int_VCVTSD2SIrr | |
| 607162087U, // Int_VCVTSD2SSrm | |
| 204508903U, // Int_VCVTSD2SSrr | |
| 405835506U, // Int_VCVTSI2SD64rm | |
| 204508914U, // Int_VCVTSI2SD64rr | |
| 338726642U, // Int_VCVTSI2SDrm | |
| 204508914U, // Int_VCVTSI2SDrr | |
| 405835517U, // Int_VCVTSI2SS64rm | |
| 204508925U, // Int_VCVTSI2SS64rr | |
| 338726653U, // Int_VCVTSI2SSrm | |
| 204508925U, // Int_VCVTSI2SSrr | |
| 674270984U, // Int_VCVTSS2SDrm | |
| 204508936U, // Int_VCVTSS2SDrr | |
| 2080378643U, // Int_VCVTTPS2DQrm | |
| 1145048851U, // Int_VCVTTPS2DQrr | |
| 2080378655U, // Int_VCVTTSD2SI64rm | |
| 1145048863U, // Int_VCVTTSD2SI64rr | |
| 2080378655U, // Int_VCVTTSD2SIrm | |
| 1145048863U, // Int_VCVTTSD2SIrr | |
| 2214596395U, // Int_VCVTTSS2SI64rm | |
| 1145048875U, // Int_VCVTTSS2SI64rr | |
| 2214596395U, // Int_VCVTTSS2SIrm | |
| 1145048875U, // Int_VCVTTSS2SIrr | |
| 2080378679U, // Int_VUCOMISDrm | |
| 1145048887U, // Int_VUCOMISDrr | |
| 2080378689U, // Int_VUCOMISSrm | |
| 1145048897U, // Int_VUCOMISSrr | |
| 1677725515U, // JAE_1 | |
| 1677725515U, // JAE_4 | |
| 1677725520U, // JA_1 | |
| 1677725520U, // JA_4 | |
| 1677725524U, // JBE_1 | |
| 1677725524U, // JBE_4 | |
| 1677725529U, // JB_1 | |
| 1677725529U, // JB_4 | |
| 1677725533U, // JCXZ | |
| 1677725539U, // JECXZ_32 | |
| 1677725539U, // JECXZ_64 | |
| 1677725546U, // JE_1 | |
| 1677725546U, // JE_4 | |
| 1677725550U, // JGE_1 | |
| 1677725550U, // JGE_4 | |
| 1677725555U, // JG_1 | |
| 1677725555U, // JG_4 | |
| 1677725559U, // JLE_1 | |
| 1677725559U, // JLE_4 | |
| 1677725564U, // JL_1 | |
| 1677725564U, // JL_4 | |
| 939528064U, // JMP32m | |
| 67112832U, // JMP32r | |
| 1610616711U, // JMP64m | |
| 1677725582U, // JMP64pcrel32 | |
| 67112839U, // JMP64r | |
| 1677725588U, // JMP_1 | |
| 1677725588U, // JMP_4 | |
| 1677725593U, // JNE_1 | |
| 1677725593U, // JNE_4 | |
| 1677725598U, // JNO_1 | |
| 1677725598U, // JNO_4 | |
| 1677725603U, // JNP_1 | |
| 1677725603U, // JNP_4 | |
| 1677725608U, // JNS_1 | |
| 1677725608U, // JNS_4 | |
| 1677725613U, // JO_1 | |
| 1677725613U, // JO_4 | |
| 1677725617U, // JP_1 | |
| 1677725617U, // JP_4 | |
| 1677725621U, // JRCXZ | |
| 1677725628U, // JS_1 | |
| 1677725628U, // JS_4 | |
| 4032U, // LAHF | |
| 1409290181U, // LAR16rm | |
| 1145049029U, // LAR16rr | |
| 1409290187U, // LAR32rm | |
| 1145049035U, // LAR32rr | |
| 1409290193U, // LAR64rm | |
| 1145049041U, // LAR64rr | |
| 136318935U, // LCMPXCHG16 | |
| 2013269991U, // LCMPXCHG16B | |
| 140513273U, // LCMPXCHG32 | |
| 142610441U, // LCMPXCHG64 | |
| 144707609U, // LCMPXCHG8 | |
| 1610616873U, // LCMPXCHG8B | |
| 1073745978U, // LDDQUrm | |
| 939528257U, // LDMXCSR | |
| 2348814410U, // LDS16rm | |
| 2348814416U, // LDS32rm | |
| 4182U, // LD_F0 | |
| 4187U, // LD_F1 | |
| 738201696U, // LD_F32m | |
| 805310566U, // LD_F64m | |
| 2415923308U, // LD_F80m | |
| 0U, // LD_Fp032 | |
| 0U, // LD_Fp064 | |
| 0U, // LD_Fp080 | |
| 0U, // LD_Fp132 | |
| 0U, // LD_Fp164 | |
| 0U, // LD_Fp180 | |
| 0U, // LD_Fp32m | |
| 0U, // LD_Fp32m64 | |
| 0U, // LD_Fp32m80 | |
| 0U, // LD_Fp64m | |
| 0U, // LD_Fp64m80 | |
| 0U, // LD_Fp80m | |
| 67113074U, // LD_Frr | |
| 1476399223U, // LEA16r | |
| 1476399229U, // LEA32r | |
| 1476399229U, // LEA64_32r | |
| 1543508099U, // LEA64r | |
| 4233U, // LEAVE | |
| 4233U, // LEAVE64 | |
| 2348814479U, // LES16rm | |
| 2348814485U, // LES32rm | |
| 4251U, // LFENCE | |
| 2348814498U, // LFS16rm | |
| 2348814504U, // LFS32rm | |
| 2348814510U, // LFS64rm | |
| 2281705652U, // LGDT16m | |
| 2281705659U, // LGDTm | |
| 2348814529U, // LGS16rm | |
| 2348814535U, // LGS32rm | |
| 2348814541U, // LGS64rm | |
| 2281705683U, // LIDT16m | |
| 2281705690U, // LIDTm | |
| 872419552U, // LLDT16m | |
| 67113184U, // LLDT16r | |
| 872419559U, // LMSW16m | |
| 67113191U, // LMSW16r | |
| 136319214U, // LOCK_ADD16mi | |
| 136319214U, // LOCK_ADD16mi8 | |
| 136319214U, // LOCK_ADD16mr | |
| 140513530U, // LOCK_ADD32mi | |
| 140513530U, // LOCK_ADD32mi8 | |
| 140513530U, // LOCK_ADD32mr | |
| 142610694U, // LOCK_ADD64mi32 | |
| 142610694U, // LOCK_ADD64mi8 | |
| 142610694U, // LOCK_ADD64mr | |
| 144707858U, // LOCK_ADD8mi | |
| 144707858U, // LOCK_ADD8mr | |
| 136319262U, // LOCK_AND16mi | |
| 136319262U, // LOCK_AND16mi8 | |
| 136319262U, // LOCK_AND16mr | |
| 140513578U, // LOCK_AND32mi | |
| 140513578U, // LOCK_AND32mi8 | |
| 140513578U, // LOCK_AND32mr | |
| 142610742U, // LOCK_AND64mi32 | |
| 142610742U, // LOCK_AND64mi8 | |
| 142610742U, // LOCK_AND64mr | |
| 144707906U, // LOCK_AND8mi | |
| 144707906U, // LOCK_AND8mr | |
| 872419662U, // LOCK_DEC16m | |
| 939528538U, // LOCK_DEC32m | |
| 1610617190U, // LOCK_DEC64m | |
| 1744834930U, // LOCK_DEC8m | |
| 872419710U, // LOCK_INC16m | |
| 939528586U, // LOCK_INC32m | |
| 1610617238U, // LOCK_INC64m | |
| 1744834978U, // LOCK_INC8m | |
| 136319406U, // LOCK_OR16mi | |
| 136319406U, // LOCK_OR16mi8 | |
| 136319406U, // LOCK_OR16mr | |
| 140513721U, // LOCK_OR32mi | |
| 140513721U, // LOCK_OR32mi8 | |
| 140513721U, // LOCK_OR32mr | |
| 142610022U, // LOCK_OR64mi32 | |
| 142610022U, // LOCK_OR64mi8 | |
| 142610022U, // LOCK_OR64mr | |
| 144708036U, // LOCK_OR8mi | |
| 144708036U, // LOCK_OR8mr | |
| 4559U, // LOCK_PREFIX | |
| 136319444U, // LOCK_SUB16mi | |
| 136319444U, // LOCK_SUB16mi8 | |
| 136319444U, // LOCK_SUB16mr | |
| 140513760U, // LOCK_SUB32mi | |
| 140513760U, // LOCK_SUB32mi8 | |
| 140513760U, // LOCK_SUB32mr | |
| 142610924U, // LOCK_SUB64mi32 | |
| 142610924U, // LOCK_SUB64mi8 | |
| 142610924U, // LOCK_SUB64mr | |
| 144708088U, // LOCK_SUB8mi | |
| 144708088U, // LOCK_SUB8mr | |
| 136319492U, // LOCK_XOR16mi | |
| 136319492U, // LOCK_XOR16mi8 | |
| 136319492U, // LOCK_XOR16mr | |
| 140513808U, // LOCK_XOR32mi | |
| 140513808U, // LOCK_XOR32mi8 | |
| 140513808U, // LOCK_XOR32mr | |
| 142610972U, // LOCK_XOR64mi32 | |
| 142610972U, // LOCK_XOR64mi8 | |
| 142610972U, // LOCK_XOR64mr | |
| 144708136U, // LOCK_XOR8mi | |
| 144708136U, // LOCK_XOR8mr | |
| 4660U, // LODSB | |
| 4666U, // LODSD | |
| 4672U, // LODSQ | |
| 4678U, // LODSW | |
| 1677726284U, // LOOP | |
| 1677726290U, // LOOPE | |
| 1677726297U, // LOOPNE | |
| 67113569U, // LRETI | |
| 67113575U, // LRETIW | |
| 4718U, // LRETL | |
| 4724U, // LRETQ | |
| 1409290874U, // LSL16rm | |
| 1145049722U, // LSL16rr | |
| 1476399744U, // LSL32rm | |
| 1145049728U, // LSL32rr | |
| 1543508614U, // LSL64rm | |
| 1145049734U, // LSL64rr | |
| 2348814988U, // LSS16rm | |
| 2348814994U, // LSS32rm | |
| 2348815000U, // LSS64rm | |
| 872419998U, // LTRm | |
| 67113630U, // LTRr | |
| 1169167012U, // LXADD16 | |
| 1170215601U, // LXADD32 | |
| 1171264190U, // LXADD64 | |
| 1172312779U, // LXADD8 | |
| 1409290968U, // LZCNT16rm | |
| 1145049816U, // LZCNT16rr | |
| 1476399840U, // LZCNT32rm | |
| 1145049824U, // LZCNT32rr | |
| 1543508712U, // LZCNT64rm | |
| 1145049832U, // LZCNT64rr | |
| 1145049840U, // MASKMOVDQU | |
| 1145049840U, // MASKMOVDQU64 | |
| 541070076U, // MAXPDrm | |
| 541070076U, // MAXPDrm_Int | |
| 205525756U, // MAXPDrr | |
| 205525756U, // MAXPDrr_Int | |
| 541070083U, // MAXPSrm | |
| 541070083U, // MAXPSrm_Int | |
| 205525763U, // MAXPSrr | |
| 205525763U, // MAXPSrr_Int | |
| 608178954U, // MAXSDrm | |
| 608178954U, // MAXSDrm_Int | |
| 205525770U, // MAXSDrr | |
| 205525770U, // MAXSDrr_Int | |
| 675287825U, // MAXSSrm | |
| 675287825U, // MAXSSrm_Int | |
| 205525777U, // MAXSSrr | |
| 205525777U, // MAXSSrr_Int | |
| 4888U, // MFENCE | |
| 541070111U, // MINPDrm | |
| 541070111U, // MINPDrm_Int | |
| 205525791U, // MINPDrr | |
| 205525791U, // MINPDrr_Int | |
| 541070118U, // MINPSrm | |
| 541070118U, // MINPSrm_Int | |
| 205525798U, // MINPSrr | |
| 205525798U, // MINPSrr_Int | |
| 608178989U, // MINSDrm | |
| 608178989U, // MINSDrm_Int | |
| 205525805U, // MINSDrr | |
| 205525805U, // MINSDrr_Int | |
| 675287860U, // MINSSrm | |
| 675287860U, // MINSSrm_Int | |
| 205525812U, // MINSSrr | |
| 205525812U, // MINSSrr_Int | |
| 2080379707U, // MMX_CVTPD2PIirm | |
| 1145049915U, // MMX_CVTPD2PIirr | |
| 1543508805U, // MMX_CVTPI2PDirm | |
| 1145049925U, // MMX_CVTPI2PDirr | |
| 406852431U, // MMX_CVTPI2PSirm | |
| 205525839U, // MMX_CVTPI2PSirr | |
| 2147488601U, // MMX_CVTPS2PIirm | |
| 1145049945U, // MMX_CVTPS2PIirr | |
| 2080379747U, // MMX_CVTTPD2PIirm | |
| 1145049955U, // MMX_CVTTPD2PIirr | |
| 2147488622U, // MMX_CVTTPS2PIirm | |
| 1145049966U, // MMX_CVTTPS2PIirr | |
| 4985U, // MMX_EMMS | |
| 1145049982U, // MMX_MASKMOVQ | |
| 1145049982U, // MMX_MASKMOVQ64 | |
| 1145049992U, // MMX_MOVD64from64rr | |
| 1145049992U, // MMX_MOVD64grr | |
| 140514184U, // MMX_MOVD64mr | |
| 1476400008U, // MMX_MOVD64rm | |
| 1145049992U, // MMX_MOVD64rr | |
| 1145049992U, // MMX_MOVD64rrv164 | |
| 1145049992U, // MMX_MOVD64to64rr | |
| 1145049998U, // MMX_MOVDQ2Qrr | |
| 1145049998U, // MMX_MOVFR642Qrr | |
| 142611351U, // MMX_MOVNTQmr | |
| 1145050015U, // MMX_MOVQ2DQrr | |
| 1145050015U, // MMX_MOVQ2FR64rr | |
| 142611368U, // MMX_MOVQ64mr | |
| 1543508904U, // MMX_MOVQ64rm | |
| 1145050024U, // MMX_MOVQ64rr | |
| 1476400008U, // MMX_MOVZDI2PDIrm | |
| 1145049992U, // MMX_MOVZDI2PDIrr | |
| 1543508910U, // MMX_PABSBrm64 | |
| 1145050030U, // MMX_PABSBrr64 | |
| 1543508917U, // MMX_PABSDrm64 | |
| 1145050037U, // MMX_PABSDrr64 | |
| 1543508924U, // MMX_PABSWrm64 | |
| 1145050044U, // MMX_PABSWrr64 | |
| 406852547U, // MMX_PACKSSDWirm | |
| 205525955U, // MMX_PACKSSDWirr | |
| 406852557U, // MMX_PACKSSWBirm | |
| 205525965U, // MMX_PACKSSWBirr | |
| 406852567U, // MMX_PACKUSWBirm | |
| 205525975U, // MMX_PACKUSWBirr | |
| 406852577U, // MMX_PADDBirm | |
| 205525985U, // MMX_PADDBirr | |
| 406852584U, // MMX_PADDDirm | |
| 205525992U, // MMX_PADDDirr | |
| 406852591U, // MMX_PADDQirm | |
| 205525999U, // MMX_PADDQirr | |
| 406852598U, // MMX_PADDSBirm | |
| 205526006U, // MMX_PADDSBirr | |
| 406852606U, // MMX_PADDSWirm | |
| 205526014U, // MMX_PADDSWirr | |
| 406852614U, // MMX_PADDUSBirm | |
| 205526022U, // MMX_PADDUSBirr | |
| 406852623U, // MMX_PADDUSWirm | |
| 205526031U, // MMX_PADDUSWirr | |
| 406852632U, // MMX_PADDWirm | |
| 205526040U, // MMX_PADDWirr | |
| 1305515039U, // MMX_PALIGNR64irm | |
| 1346376735U, // MMX_PALIGNR64irr | |
| 406852648U, // MMX_PANDNirm | |
| 205526056U, // MMX_PANDNirr | |
| 406852655U, // MMX_PANDirm | |
| 205526063U, // MMX_PANDirr | |
| 406852661U, // MMX_PAVGBirm | |
| 205526069U, // MMX_PAVGBirr | |
| 406852668U, // MMX_PAVGWirm | |
| 205526076U, // MMX_PAVGWirr | |
| 406852675U, // MMX_PCMPEQBirm | |
| 205526083U, // MMX_PCMPEQBirr | |
| 406852684U, // MMX_PCMPEQDirm | |
| 205526092U, // MMX_PCMPEQDirr | |
| 406852693U, // MMX_PCMPEQWirm | |
| 205526101U, // MMX_PCMPEQWirr | |
| 406852702U, // MMX_PCMPGTBirm | |
| 205526110U, // MMX_PCMPGTBirr | |
| 406852711U, // MMX_PCMPGTDirm | |
| 205526119U, // MMX_PCMPGTDirr | |
| 406852720U, // MMX_PCMPGTWirm | |
| 205526128U, // MMX_PCMPGTWirr | |
| 204510329U, // MMX_PEXTRWirri | |
| 406852737U, // MMX_PHADDSWrm64 | |
| 205526145U, // MMX_PHADDSWrr64 | |
| 406852746U, // MMX_PHADDWrm64 | |
| 205526154U, // MMX_PHADDWrr64 | |
| 406852754U, // MMX_PHADDrm64 | |
| 205526162U, // MMX_PHADDrr64 | |
| 406852762U, // MMX_PHSUBDrm64 | |
| 205526170U, // MMX_PHSUBDrr64 | |
| 406852770U, // MMX_PHSUBSWrm64 | |
| 205526178U, // MMX_PHSUBSWrr64 | |
| 406852779U, // MMX_PHSUBWrm64 | |
| 205526187U, // MMX_PHSUBWrr64 | |
| 1303418035U, // MMX_PINSRWirmi | |
| 1346376883U, // MMX_PINSRWirri | |
| 406852795U, // MMX_PMADDUBSWrm64 | |
| 205526203U, // MMX_PMADDUBSWrr64 | |
| 406852806U, // MMX_PMADDWDirm | |
| 205526214U, // MMX_PMADDWDirr | |
| 406852815U, // MMX_PMAXSWirm | |
| 205526223U, // MMX_PMAXSWirr | |
| 406852823U, // MMX_PMAXUBirm | |
| 205526231U, // MMX_PMAXUBirr | |
| 406852831U, // MMX_PMINSWirm | |
| 205526239U, // MMX_PMINSWirr | |
| 406852839U, // MMX_PMINUBirm | |
| 205526247U, // MMX_PMINUBirr | |
| 1145050351U, // MMX_PMOVMSKBrr | |
| 406852857U, // MMX_PMULHRSWrm64 | |
| 205526265U, // MMX_PMULHRSWrr64 | |
| 406852867U, // MMX_PMULHUWirm | |
| 205526275U, // MMX_PMULHUWirr | |
| 406852876U, // MMX_PMULHWirm | |
| 205526284U, // MMX_PMULHWirr | |
| 406852884U, // MMX_PMULLWirm | |
| 205526292U, // MMX_PMULLWirr | |
| 406852892U, // MMX_PMULUDQirm | |
| 205526300U, // MMX_PMULUDQirr | |
| 406852901U, // MMX_PORirm | |
| 205526309U, // MMX_PORirr | |
| 406852906U, // MMX_PSADBWirm | |
| 205526314U, // MMX_PSADBWirr | |
| 406852914U, // MMX_PSHUFBrm64 | |
| 205526322U, // MMX_PSHUFBrr64 | |
| 1234179386U, // MMX_PSHUFWmi | |
| 204510522U, // MMX_PSHUFWri | |
| 406852930U, // MMX_PSIGNBrm64 | |
| 205526338U, // MMX_PSIGNBrr64 | |
| 406852938U, // MMX_PSIGNDrm64 | |
| 205526346U, // MMX_PSIGNDrr64 | |
| 406852946U, // MMX_PSIGNWrm64 | |
| 205526354U, // MMX_PSIGNWrr64 | |
| 205526362U, // MMX_PSLLDri | |
| 406852954U, // MMX_PSLLDrm | |
| 205526362U, // MMX_PSLLDrr | |
| 205526369U, // MMX_PSLLQri | |
| 406852961U, // MMX_PSLLQrm | |
| 205526369U, // MMX_PSLLQrr | |
| 205526376U, // MMX_PSLLWri | |
| 406852968U, // MMX_PSLLWrm | |
| 205526376U, // MMX_PSLLWrr | |
| 205526383U, // MMX_PSRADri | |
| 406852975U, // MMX_PSRADrm | |
| 205526383U, // MMX_PSRADrr | |
| 205526390U, // MMX_PSRAWri | |
| 406852982U, // MMX_PSRAWrm | |
| 205526390U, // MMX_PSRAWrr | |
| 205526397U, // MMX_PSRLDri | |
| 406852989U, // MMX_PSRLDrm | |
| 205526397U, // MMX_PSRLDrr | |
| 205526404U, // MMX_PSRLQri | |
| 406852996U, // MMX_PSRLQrm | |
| 205526404U, // MMX_PSRLQrr | |
| 205526411U, // MMX_PSRLWri | |
| 406853003U, // MMX_PSRLWrm | |
| 205526411U, // MMX_PSRLWrr | |
| 406853010U, // MMX_PSUBBirm | |
| 205526418U, // MMX_PSUBBirr | |
| 406853017U, // MMX_PSUBDirm | |
| 205526425U, // MMX_PSUBDirr | |
| 406853024U, // MMX_PSUBQirm | |
| 205526432U, // MMX_PSUBQirr | |
| 406853031U, // MMX_PSUBSBirm | |
| 205526439U, // MMX_PSUBSBirr | |
| 406853039U, // MMX_PSUBSWirm | |
| 205526447U, // MMX_PSUBSWirr | |
| 406853047U, // MMX_PSUBUSBirm | |
| 205526455U, // MMX_PSUBUSBirr | |
| 406853056U, // MMX_PSUBUSWirm | |
| 205526464U, // MMX_PSUBUSWirr | |
| 406853065U, // MMX_PSUBWirm | |
| 205526473U, // MMX_PSUBWirr | |
| 406853072U, // MMX_PUNPCKHBWirm | |
| 205526480U, // MMX_PUNPCKHBWirr | |
| 406853083U, // MMX_PUNPCKHDQirm | |
| 205526491U, // MMX_PUNPCKHDQirr | |
| 406853094U, // MMX_PUNPCKHWDirm | |
| 205526502U, // MMX_PUNPCKHWDirr | |
| 406853105U, // MMX_PUNPCKLBWirm | |
| 205526513U, // MMX_PUNPCKLBWirr | |
| 406853116U, // MMX_PUNPCKLDQirm | |
| 205526524U, // MMX_PUNPCKLDQirr | |
| 406853127U, // MMX_PUNPCKLWDirm | |
| 205526535U, // MMX_PUNPCKLWDirr | |
| 406853138U, // MMX_PXORirm | |
| 205526546U, // MMX_PXORirr | |
| 0U, // MONITOR | |
| 5656U, // MONITORrrr | |
| 5664U, // MONTMUL | |
| 1677727272U, // MOV16ao16 | |
| 136320563U, // MOV16mi | |
| 136320563U, // MOV16mr | |
| 136320563U, // MOV16ms | |
| 1678775859U, // MOV16o16a | |
| 0U, // MOV16r0 | |
| 1145050675U, // MOV16ri | |
| 1409291827U, // MOV16rm | |
| 1145050675U, // MOV16rr | |
| 1145050675U, // MOV16rr_REV | |
| 1145050675U, // MOV16rs | |
| 1409291827U, // MOV16sm | |
| 1145050675U, // MOV16sr | |
| 1677727289U, // MOV32ao32 | |
| 1145050693U, // MOV32cr | |
| 1145050693U, // MOV32dr | |
| 140514885U, // MOV32mi | |
| 140514885U, // MOV32mr | |
| 140514885U, // MOV32ms | |
| 1682970181U, // MOV32o32a | |
| 0U, // MOV32r0 | |
| 1145050693U, // MOV32rc | |
| 1145050693U, // MOV32rd | |
| 1145050693U, // MOV32ri | |
| 1476400709U, // MOV32rm | |
| 1145050693U, // MOV32rr | |
| 1145050693U, // MOV32rr_REV | |
| 1145050693U, // MOV32rs | |
| 1476400709U, // MOV32sm | |
| 1145050693U, // MOV32sr | |
| 1145050024U, // MOV64cr | |
| 1145050024U, // MOV64dr | |
| 142611368U, // MOV64mi32 | |
| 142611368U, // MOV64mr | |
| 142611368U, // MOV64ms | |
| 0U, // MOV64r0 | |
| 1145050024U, // MOV64rc | |
| 1145050024U, // MOV64rd | |
| 1145050699U, // MOV64ri | |
| 1145050024U, // MOV64ri32 | |
| 0U, // MOV64ri64i32 | |
| 1543508904U, // MOV64rm | |
| 1145050024U, // MOV64rr | |
| 1145050024U, // MOV64rr_REV | |
| 1145050024U, // MOV64rs | |
| 1543508904U, // MOV64sm | |
| 1145050024U, // MOV64sr | |
| 1145049992U, // MOV64toPQIrr | |
| 1543508904U, // MOV64toSDrm | |
| 1145049992U, // MOV64toSDrr | |
| 1677727316U, // MOV8ao8 | |
| 144709215U, // MOV8mi | |
| 144709215U, // MOV8mr | |
| 145036895U, // MOV8mr_NOREX | |
| 1687164511U, // MOV8o8a | |
| 0U, // MOV8r0 | |
| 1145050719U, // MOV8ri | |
| 1811945055U, // MOV8rm | |
| 1844450911U, // MOV8rm_NOREX | |
| 1145050719U, // MOV8rr | |
| 1145378399U, // MOV8rr_NOREX | |
| 1145050719U, // MOV8rr_REV | |
| 167775423U, // MOVAPDmr | |
| 2080378047U, // MOVAPDrm | |
| 1145048255U, // MOVAPDrr | |
| 1145048255U, // MOVAPDrr_REV | |
| 167775431U, // MOVAPSmr | |
| 2080378055U, // MOVAPSrm | |
| 1145048263U, // MOVAPSrr | |
| 1145048263U, // MOVAPSrr_REV | |
| 136320613U, // MOVBE16mr | |
| 1409291877U, // MOVBE16rm | |
| 140514925U, // MOVBE32mr | |
| 1476400749U, // MOVBE32rm | |
| 142612085U, // MOVBE64mr | |
| 1543509621U, // MOVBE64rm | |
| 2147489405U, // MOVDDUPrm | |
| 1145050749U, // MOVDDUPrr | |
| 1476400008U, // MOVDI2PDIrm | |
| 1145049992U, // MOVDI2PDIrr | |
| 1476400008U, // MOVDI2SSrm | |
| 1145049992U, // MOVDI2SSrr | |
| 168826502U, // MOVDQAmr | |
| 1073747590U, // MOVDQArm | |
| 1145050758U, // MOVDQArr | |
| 1145050758U, // MOVDQArr_REV | |
| 168826510U, // MOVDQUmr | |
| 168826510U, // MOVDQUmr_Int | |
| 1073747598U, // MOVDQUrm | |
| 1145050766U, // MOVDQUrr | |
| 1145050766U, // MOVDQUrr_REV | |
| 205526678U, // MOVHLPSrr | |
| 169875103U, // MOVHPDmr | |
| 608179871U, // MOVHPDrm | |
| 169875111U, // MOVHPSmr | |
| 608179879U, // MOVHPSrm | |
| 205526703U, // MOVLHPSrr | |
| 169875128U, // MOVLPDmr | |
| 608179896U, // MOVLPDrm | |
| 169875136U, // MOVLPSmr | |
| 608179904U, // MOVLPSrm | |
| 142611368U, // MOVLQ128mr | |
| 1145050824U, // MOVMSKPDrr32 | |
| 1145050824U, // MOVMSKPDrr64 | |
| 1145050834U, // MOVMSKPSrr32 | |
| 1145050834U, // MOVMSKPSrr64 | |
| 1073747676U, // MOVNTDQArm | |
| 167778022U, // MOVNTDQ_64mr | |
| 167778022U, // MOVNTDQmr | |
| 142612207U, // MOVNTI_64mr | |
| 140515064U, // MOVNTImr | |
| 167778049U, // MOVNTPDmr | |
| 167778058U, // MOVNTPSmr | |
| 0U, // MOVPC32r | |
| 140514184U, // MOVPDI2DImr | |
| 1145049992U, // MOVPDI2DIrr | |
| 142611368U, // MOVPQI2QImr | |
| 1145049992U, // MOVPQIto64rr | |
| 1543508904U, // MOVQI2PQIrm | |
| 1145050024U, // MOVQxrxr | |
| 5907U, // MOVSB | |
| 5913U, // MOVSD | |
| 169875231U, // MOVSDmr | |
| 2147489567U, // MOVSDrm | |
| 205526815U, // MOVSDrr | |
| 205526815U, // MOVSDrr_REV | |
| 142611368U, // MOVSDto64mr | |
| 1145049992U, // MOVSDto64rr | |
| 2080380710U, // MOVSHDUPrm | |
| 1145050918U, // MOVSHDUPrr | |
| 2080380720U, // MOVSLDUPrm | |
| 1145050928U, // MOVSLDUPrr | |
| 5946U, // MOVSQ | |
| 140514184U, // MOVSS2DImr | |
| 1145049992U, // MOVSS2DIrr | |
| 170923840U, // MOVSSmr | |
| 2214598464U, // MOVSSrm | |
| 205526848U, // MOVSSrr | |
| 205526848U, // MOVSSrr_REV | |
| 5959U, // MOVSW | |
| 1811945293U, // MOVSX16rm8 | |
| 1145050957U, // MOVSX16rr8 | |
| 1409292117U, // MOVSX32rm16 | |
| 1811945309U, // MOVSX32rm8 | |
| 1145050965U, // MOVSX32rr16 | |
| 1145050973U, // MOVSX32rr8 | |
| 1409292133U, // MOVSX64rm16 | |
| 1476401005U, // MOVSX64rm32 | |
| 1811945333U, // MOVSX64rm8 | |
| 1145050981U, // MOVSX64rr16 | |
| 1145050989U, // MOVSX64rr32 | |
| 1145050997U, // MOVSX64rr8 | |
| 167778173U, // MOVUPDmr | |
| 2080380797U, // MOVUPDrm | |
| 1145051005U, // MOVUPDrr | |
| 1145051005U, // MOVUPDrr_REV | |
| 167778181U, // MOVUPSmr | |
| 2080380805U, // MOVUPSrm | |
| 1145051013U, // MOVUPSrr | |
| 1145051013U, // MOVUPSrr_REV | |
| 1476400008U, // MOVZDI2PDIrm | |
| 1145049992U, // MOVZDI2PDIrr | |
| 1073746856U, // MOVZPQILo2PQIrm | |
| 1145050024U, // MOVZPQILo2PQIrr | |
| 1543508904U, // MOVZQI2PQIrm | |
| 1145049992U, // MOVZQI2PQIrr | |
| 1811945357U, // MOVZX16rm8 | |
| 1145051021U, // MOVZX16rr8 | |
| 1811945365U, // MOVZX32_NOREXrm8 | |
| 1145051029U, // MOVZX32_NOREXrr8 | |
| 1409292189U, // MOVZX32rm16 | |
| 1811945365U, // MOVZX32rm8 | |
| 1145051037U, // MOVZX32rr16 | |
| 1145051029U, // MOVZX32rr8 | |
| 0U, // MOVZX64rm16 | |
| 1409292197U, // MOVZX64rm16_Q | |
| 0U, // MOVZX64rm32 | |
| 0U, // MOVZX64rm8 | |
| 1811945389U, // MOVZX64rm8_Q | |
| 0U, // MOVZX64rr16 | |
| 1145051045U, // MOVZX64rr16_Q | |
| 0U, // MOVZX64rr32 | |
| 0U, // MOVZX64rr8 | |
| 1145051053U, // MOVZX64rr8_Q | |
| 1288837045U, // MPSADBWrmi | |
| 1346377653U, // MPSADBWrri | |
| 872421310U, // MUL16m | |
| 67114942U, // MUL16r | |
| 939530180U, // MUL32m | |
| 67114948U, // MUL32r | |
| 1610618826U, // MUL64m | |
| 67114954U, // MUL64r | |
| 1744836560U, // MUL8m | |
| 67114960U, // MUL8r | |
| 541071318U, // MULPDrm | |
| 205526998U, // MULPDrr | |
| 541071325U, // MULPSrm | |
| 205527005U, // MULPSrr | |
| 608180196U, // MULSDrm | |
| 608180196U, // MULSDrm_Int | |
| 205527012U, // MULSDrr | |
| 205527012U, // MULSDrr_Int | |
| 675289067U, // MULSSrm | |
| 675289067U, // MULSSrm_Int | |
| 205527019U, // MULSSrr | |
| 205527019U, // MULSSrr_Int | |
| 738203634U, // MUL_F32m | |
| 805312505U, // MUL_F64m | |
| 872421376U, // MUL_FI16m | |
| 939530248U, // MUL_FI32m | |
| 67115024U, // MUL_FPrST0 | |
| 67115031U, // MUL_FST0r | |
| 0U, // MUL_Fp32 | |
| 0U, // MUL_Fp32m | |
| 0U, // MUL_Fp64 | |
| 0U, // MUL_Fp64m | |
| 0U, // MUL_Fp64m32 | |
| 0U, // MUL_Fp80 | |
| 0U, // MUL_Fp80m32 | |
| 0U, // MUL_Fp80m64 | |
| 0U, // MUL_FpI16m32 | |
| 0U, // MUL_FpI16m64 | |
| 0U, // MUL_FpI16m80 | |
| 0U, // MUL_FpI32m32 | |
| 0U, // MUL_FpI32m64 | |
| 0U, // MUL_FpI32m80 | |
| 67115037U, // MUL_FrST0 | |
| 0U, // MWAIT | |
| 6187U, // MWAITrr | |
| 872421425U, // NEG16m | |
| 67115057U, // NEG16r | |
| 939530295U, // NEG32m | |
| 67115063U, // NEG32r | |
| 1610618941U, // NEG64m | |
| 67115069U, // NEG64r | |
| 1744836675U, // NEG8m | |
| 67115075U, // NEG8r | |
| 6217U, // NOOP | |
| 939530317U, // NOOPL | |
| 872421459U, // NOOPW | |
| 872421465U, // NOT16m | |
| 67115097U, // NOT16r | |
| 939530335U, // NOT32m | |
| 67115103U, // NOT32r | |
| 1610618981U, // NOT64m | |
| 67115109U, // NOT64r | |
| 1744836715U, // NOT8m | |
| 67115115U, // NOT8r | |
| 68163697U, // OR16i16 | |
| 136321137U, // OR16mi | |
| 136321137U, // OR16mi8 | |
| 136321137U, // OR16mr | |
| 204478577U, // OR16ri | |
| 204478577U, // OR16ri8 | |
| 271587441U, // OR16rm | |
| 204478577U, // OR16rr | |
| 205527153U, // OR16rr_REV | |
| 72358006U, // OR32i32 | |
| 140515446U, // OR32mi | |
| 140515446U, // OR32mi8 | |
| 140515446U, // OR32mr | |
| 140513721U, // OR32mrLocked | |
| 204478582U, // OR32ri | |
| 204478582U, // OR32ri8 | |
| 338696310U, // OR32rm | |
| 204478582U, // OR32rr | |
| 205527158U, // OR32rr_REV | |
| 74455163U, // OR64i32 | |
| 142612603U, // OR64mi32 | |
| 142612603U, // OR64mi8 | |
| 142612603U, // OR64mr | |
| 204478587U, // OR64ri32 | |
| 204478587U, // OR64ri8 | |
| 405805179U, // OR64rm | |
| 204478587U, // OR64rr | |
| 205527163U, // OR64rr_REV | |
| 76552320U, // OR8i8 | |
| 144709760U, // OR8mi | |
| 144709760U, // OR8mr | |
| 204478592U, // OR8ri | |
| 469768320U, // OR8rm | |
| 204478592U, // OR8rr | |
| 205527168U, // OR8rr_REV | |
| 541068495U, // ORPDrm | |
| 205524175U, // ORPDrr | |
| 541068501U, // ORPSrm | |
| 205524181U, // ORPSrr | |
| 67115141U, // OUT16ir | |
| 6288U, // OUT16rr | |
| 67115166U, // OUT32ir | |
| 6314U, // OUT32rr | |
| 67115193U, // OUT8ir | |
| 6340U, // OUT8rr | |
| 6354U, // OUTSB | |
| 6360U, // OUTSD | |
| 6366U, // OUTSW | |
| 1073746862U, // PABSBrm128 | |
| 1145050030U, // PABSBrr128 | |
| 1073746869U, // PABSDrm128 | |
| 1145050037U, // PABSDrr128 | |
| 1073746876U, // PABSWrm128 | |
| 1145050044U, // PABSWrr128 | |
| 1010832323U, // PACKSSDWrm | |
| 205525955U, // PACKSSDWrr | |
| 1010832333U, // PACKSSWBrm | |
| 205525965U, // PACKSSWBrr | |
| 1010833636U, // PACKUSDWrm | |
| 205527268U, // PACKUSDWrr | |
| 1010832343U, // PACKUSWBrm | |
| 205525975U, // PACKUSWBrr | |
| 1010832353U, // PADDBrm | |
| 205525985U, // PADDBrr | |
| 1010832360U, // PADDDrm | |
| 205525992U, // PADDDrr | |
| 1010832367U, // PADDQrm | |
| 205525999U, // PADDQrr | |
| 1010832374U, // PADDSBrm | |
| 205526006U, // PADDSBrr | |
| 1010832382U, // PADDSWrm | |
| 205526014U, // PADDSWrr | |
| 1010832390U, // PADDUSBrm | |
| 205526022U, // PADDUSBrr | |
| 1010832399U, // PADDUSWrm | |
| 205526031U, // PADDUSWrr | |
| 1010832408U, // PADDWrm | |
| 205526040U, // PADDWrr | |
| 1288836127U, // PALIGNR128rm | |
| 1346376735U, // PALIGNR128rr | |
| 1010832424U, // PANDNrm | |
| 205526056U, // PANDNrr | |
| 1010832431U, // PANDrm | |
| 205526063U, // PANDrr | |
| 6382U, // PAUSE | |
| 1010832437U, // PAVGBrm | |
| 205526069U, // PAVGBrr | |
| 406853876U, // PAVGUSBrm | |
| 205527284U, // PAVGUSBrr | |
| 1010832444U, // PAVGWrm | |
| 205526076U, // PAVGWrr | |
| 1010833661U, // PBLENDVBrm0 | |
| 205527293U, // PBLENDVBrr0 | |
| 1288837383U, // PBLENDWrmi | |
| 1346377991U, // PBLENDWrri | |
| 1288837392U, // PCLMULQDQrm | |
| 1346378000U, // PCLMULQDQrr | |
| 1010832451U, // PCMPEQBrm | |
| 205526083U, // PCMPEQBrr | |
| 1010832460U, // PCMPEQDrm | |
| 205526092U, // PCMPEQDrr | |
| 1010833691U, // PCMPEQQrm | |
| 205527323U, // PCMPEQQrr | |
| 1010832469U, // PCMPEQWrm | |
| 205526101U, // PCMPEQWrr | |
| 1219500324U, // PCMPESTRIArm | |
| 204511524U, // PCMPESTRIArr | |
| 1219500324U, // PCMPESTRICrm | |
| 204511524U, // PCMPESTRICrr | |
| 1219500324U, // PCMPESTRIOrm | |
| 204511524U, // PCMPESTRIOrr | |
| 1219500324U, // PCMPESTRISrm | |
| 204511524U, // PCMPESTRISrr | |
| 1219500324U, // PCMPESTRIZrm | |
| 204511524U, // PCMPESTRIZrr | |
| 1219500324U, // PCMPESTRIrm | |
| 204511524U, // PCMPESTRIrr | |
| 0U, // PCMPESTRM128MEM | |
| 0U, // PCMPESTRM128REG | |
| 1219500335U, // PCMPESTRM128rm | |
| 204511535U, // PCMPESTRM128rr | |
| 1010832478U, // PCMPGTBrm | |
| 205526110U, // PCMPGTBrr | |
| 1010832487U, // PCMPGTDrm | |
| 205526119U, // PCMPGTDrr | |
| 1010833722U, // PCMPGTQrm | |
| 205527354U, // PCMPGTQrr | |
| 1010832496U, // PCMPGTWrm | |
| 205526128U, // PCMPGTWrr | |
| 1219500355U, // PCMPISTRIArm | |
| 204511555U, // PCMPISTRIArr | |
| 1219500355U, // PCMPISTRICrm | |
| 204511555U, // PCMPISTRICrr | |
| 1219500355U, // PCMPISTRIOrm | |
| 204511555U, // PCMPISTRIOrr | |
| 1219500355U, // PCMPISTRISrm | |
| 204511555U, // PCMPISTRISrr | |
| 1219500355U, // PCMPISTRIZrm | |
| 204511555U, // PCMPISTRIZrr | |
| 1219500355U, // PCMPISTRIrm | |
| 204511555U, // PCMPISTRIrr | |
| 0U, // PCMPISTRM128MEM | |
| 0U, // PCMPISTRM128REG | |
| 1219500366U, // PCMPISTRM128rm | |
| 204511566U, // PCMPISTRM128rr | |
| 1231395161U, // PEXTRBmr | |
| 204511577U, // PEXTRBrr | |
| 1231427937U, // PEXTRDmr | |
| 204511585U, // PEXTRDrr | |
| 1231460713U, // PEXTRQmr | |
| 204511593U, // PEXTRQrr | |
| 1231492217U, // PEXTRWmr | |
| 204510329U, // PEXTRWri | |
| 1543510385U, // PF2IDrm | |
| 1145051505U, // PF2IDrr | |
| 1543510392U, // PF2IWrm | |
| 1145051512U, // PF2IWrr | |
| 406854015U, // PFACCrm | |
| 205527423U, // PFACCrr | |
| 406854022U, // PFADDrm | |
| 205527430U, // PFADDrr | |
| 406854029U, // PFCMPEQrm | |
| 205527437U, // PFCMPEQrr | |
| 406854038U, // PFCMPGErm | |
| 205527446U, // PFCMPGErr | |
| 406854047U, // PFCMPGTrm | |
| 205527455U, // PFCMPGTrr | |
| 406854056U, // PFMAXrm | |
| 205527464U, // PFMAXrr | |
| 406854063U, // PFMINrm | |
| 205527471U, // PFMINrr | |
| 406854070U, // PFMULrm | |
| 205527478U, // PFMULrr | |
| 406854077U, // PFNACCrm | |
| 205527485U, // PFNACCrr | |
| 406854085U, // PFPNACCrm | |
| 205527493U, // PFPNACCrr | |
| 406854094U, // PFRCPIT1rm | |
| 205527502U, // PFRCPIT1rr | |
| 406854104U, // PFRCPIT2rm | |
| 205527512U, // PFRCPIT2rr | |
| 1543510498U, // PFRCPrm | |
| 1145051618U, // PFRCPrr | |
| 406854121U, // PFRSQIT1rm | |
| 205527529U, // PFRSQIT1rr | |
| 1543510515U, // PFRSQRTrm | |
| 1145051635U, // PFRSQRTrr | |
| 406854140U, // PFSUBRrm | |
| 205527548U, // PFSUBRrr | |
| 406854148U, // PFSUBrm | |
| 205527556U, // PFSUBrr | |
| 1010832530U, // PHADDDrm128 | |
| 205526162U, // PHADDDrr128 | |
| 1010832513U, // PHADDSWrm128 | |
| 205526145U, // PHADDSWrr128 | |
| 1010832522U, // PHADDWrm128 | |
| 205526154U, // PHADDWrr128 | |
| 1073748491U, // PHMINPOSUWrm128 | |
| 1145051659U, // PHMINPOSUWrr128 | |
| 1010832538U, // PHSUBDrm128 | |
| 205526170U, // PHSUBDrr128 | |
| 1010832546U, // PHSUBSWrm128 | |
| 205526178U, // PHSUBSWrr128 | |
| 1010832555U, // PHSUBWrm128 | |
| 205526187U, // PHSUBWrr128 | |
| 1543510551U, // PI2FDrm | |
| 1145051671U, // PI2FDrr | |
| 1543510558U, // PI2FWrm | |
| 1145051678U, // PI2FWrr | |
| 1306565157U, // PINSRBrm | |
| 1346378277U, // PINSRBrr | |
| 1304468013U, // PINSRDrm | |
| 1346378285U, // PINSRDrr | |
| 1305516597U, // PINSRQrm | |
| 1346378293U, // PINSRQrr | |
| 1303418035U, // PINSRWrmi | |
| 1346376883U, // PINSRWrri | |
| 1010832571U, // PMADDUBSWrm128 | |
| 205526203U, // PMADDUBSWrr128 | |
| 1010832582U, // PMADDWDrm | |
| 205526214U, // PMADDWDrr | |
| 1010833981U, // PMAXSBrm | |
| 205527613U, // PMAXSBrr | |
| 1010833989U, // PMAXSDrm | |
| 205527621U, // PMAXSDrr | |
| 1010832591U, // PMAXSWrm | |
| 205526223U, // PMAXSWrr | |
| 1010832599U, // PMAXUBrm | |
| 205526231U, // PMAXUBrr | |
| 1010833997U, // PMAXUDrm | |
| 205527629U, // PMAXUDrr | |
| 1010834005U, // PMAXUWrm | |
| 205527637U, // PMAXUWrr | |
| 1010834013U, // PMINSBrm | |
| 205527645U, // PMINSBrr | |
| 1010834021U, // PMINSDrm | |
| 205527653U, // PMINSDrr | |
| 1010832607U, // PMINSWrm | |
| 205526239U, // PMINSWrr | |
| 1010832615U, // PMINUBrm | |
| 205526247U, // PMINUBrr | |
| 1010834029U, // PMINUDrm | |
| 205527661U, // PMINUDrr | |
| 1010834037U, // PMINUWrm | |
| 205527669U, // PMINUWrr | |
| 1145050351U, // PMOVMSKBrr | |
| 1476401789U, // PMOVSXBDrm | |
| 1145051773U, // PMOVSXBDrr | |
| 1409292935U, // PMOVSXBQrm | |
| 1145051783U, // PMOVSXBQrr | |
| 1543510673U, // PMOVSXBWrm | |
| 1145051793U, // PMOVSXBWrr | |
| 1543510683U, // PMOVSXDQrm | |
| 1145051803U, // PMOVSXDQrr | |
| 1543510693U, // PMOVSXWDrm | |
| 1145051813U, // PMOVSXWDrr | |
| 1476401839U, // PMOVSXWQrm | |
| 1145051823U, // PMOVSXWQrr | |
| 1476401849U, // PMOVZXBDrm | |
| 1145051833U, // PMOVZXBDrr | |
| 1409292995U, // PMOVZXBQrm | |
| 1145051843U, // PMOVZXBQrr | |
| 1543510733U, // PMOVZXBWrm | |
| 1145051853U, // PMOVZXBWrr | |
| 1543510743U, // PMOVZXDQrm | |
| 1145051863U, // PMOVZXDQrr | |
| 1543510753U, // PMOVZXWDrm | |
| 1145051873U, // PMOVZXWDrr | |
| 1476401899U, // PMOVZXWQrm | |
| 1145051883U, // PMOVZXWQrr | |
| 1010834165U, // PMULDQrm | |
| 205527797U, // PMULDQrr | |
| 1010832633U, // PMULHRSWrm128 | |
| 205526265U, // PMULHRSWrr128 | |
| 406854397U, // PMULHRWrm | |
| 205527805U, // PMULHRWrr | |
| 1010832643U, // PMULHUWrm | |
| 205526275U, // PMULHUWrr | |
| 1010832652U, // PMULHWrm | |
| 205526284U, // PMULHWrr | |
| 1010834182U, // PMULLDrm | |
| 205527814U, // PMULLDrr | |
| 1010832660U, // PMULLWrm | |
| 205526292U, // PMULLWrr | |
| 1010832668U, // PMULUDQrm | |
| 205526300U, // PMULUDQrr | |
| 67115790U, // POP16r | |
| 872422158U, // POP16rmm | |
| 67115790U, // POP16rmr | |
| 67115796U, // POP32r | |
| 939531028U, // POP32rmm | |
| 67115796U, // POP32rmr | |
| 67115802U, // POP64r | |
| 1610619674U, // POP64rmm | |
| 67115802U, // POP64rmr | |
| 6944U, // POPA32 | |
| 1409293094U, // POPCNT16rm | |
| 1145051942U, // POPCNT16rr | |
| 1476401967U, // POPCNT32rm | |
| 1145051951U, // POPCNT32rr | |
| 1543510840U, // POPCNT64rm | |
| 1145051960U, // POPCNT64rr | |
| 6977U, // POPDS16 | |
| 6986U, // POPDS32 | |
| 6995U, // POPES16 | |
| 7004U, // POPES32 | |
| 7013U, // POPF16 | |
| 7019U, // POPF32 | |
| 7025U, // POPF64 | |
| 7031U, // POPFS16 | |
| 7040U, // POPFS32 | |
| 7049U, // POPFS64 | |
| 7058U, // POPGS16 | |
| 7067U, // POPGS32 | |
| 7076U, // POPGS64 | |
| 7085U, // POPSS16 | |
| 7094U, // POPSS32 | |
| 1010832677U, // PORrm | |
| 205526309U, // PORrr | |
| 939531199U, // PREFETCH | |
| 1744837577U, // PREFETCHNTA | |
| 1744837590U, // PREFETCHT0 | |
| 1744837602U, // PREFETCHT1 | |
| 1744837614U, // PREFETCHT2 | |
| 872422394U, // PREFETCHW | |
| 1010832682U, // PSADBWrm | |
| 205526314U, // PSADBWrr | |
| 1010832690U, // PSHUFBrm128 | |
| 205526322U, // PSHUFBrr128 | |
| 1219501061U, // PSHUFDmi | |
| 204512261U, // PSHUFDri | |
| 1219501069U, // PSHUFHWmi | |
| 204512269U, // PSHUFHWri | |
| 1219501078U, // PSHUFLWmi | |
| 204512278U, // PSHUFLWri | |
| 1010832706U, // PSIGNBrm128 | |
| 205526338U, // PSIGNBrr128 | |
| 1010832714U, // PSIGNDrm128 | |
| 205526346U, // PSIGNDrr128 | |
| 1010832722U, // PSIGNWrm128 | |
| 205526354U, // PSIGNWrr128 | |
| 205528095U, // PSLLDQri | |
| 205526362U, // PSLLDri | |
| 1010832730U, // PSLLDrm | |
| 205526362U, // PSLLDrr | |
| 205526369U, // PSLLQri | |
| 1010832737U, // PSLLQrm | |
| 205526369U, // PSLLQrr | |
| 205526376U, // PSLLWri | |
| 1010832744U, // PSLLWrm | |
| 205526376U, // PSLLWrr | |
| 205526383U, // PSRADri | |
| 1010832751U, // PSRADrm | |
| 205526383U, // PSRADrr | |
| 205526390U, // PSRAWri | |
| 1010832758U, // PSRAWrm | |
| 205526390U, // PSRAWrr | |
| 205528103U, // PSRLDQri | |
| 205526397U, // PSRLDri | |
| 1010832765U, // PSRLDrm | |
| 205526397U, // PSRLDrr | |
| 205526404U, // PSRLQri | |
| 1010832772U, // PSRLQrm | |
| 205526404U, // PSRLQrr | |
| 205526411U, // PSRLWri | |
| 1010832779U, // PSRLWrm | |
| 205526411U, // PSRLWrr | |
| 1010832786U, // PSUBBrm | |
| 205526418U, // PSUBBrr | |
| 1010832793U, // PSUBDrm | |
| 205526425U, // PSUBDrr | |
| 1010832800U, // PSUBQrm | |
| 205526432U, // PSUBQrr | |
| 1010832807U, // PSUBSBrm | |
| 205526439U, // PSUBSBrr | |
| 1010832815U, // PSUBSWrm | |
| 205526447U, // PSUBSWrr | |
| 1010832823U, // PSUBUSBrm | |
| 205526455U, // PSUBUSBrr | |
| 1010832832U, // PSUBUSWrm | |
| 205526464U, // PSUBUSWrr | |
| 1010832841U, // PSUBWrm | |
| 205526473U, // PSUBWrr | |
| 1543511087U, // PSWAPDrm | |
| 1145052207U, // PSWAPDrr | |
| 2080382007U, // PTESTrm | |
| 1145052215U, // PTESTrr | |
| 1010832848U, // PUNPCKHBWrm | |
| 205526480U, // PUNPCKHBWrr | |
| 1010832859U, // PUNPCKHDQrm | |
| 205526491U, // PUNPCKHDQrr | |
| 1010834495U, // PUNPCKHQDQrm | |
| 205528127U, // PUNPCKHQDQrr | |
| 1010832870U, // PUNPCKHWDrm | |
| 205526502U, // PUNPCKHWDrr | |
| 1010832881U, // PUNPCKLBWrm | |
| 205526513U, // PUNPCKLBWrr | |
| 1010832892U, // PUNPCKLDQrm | |
| 205526524U, // PUNPCKLDQrr | |
| 1010834507U, // PUNPCKLQDQrm | |
| 205528139U, // PUNPCKLQDQrr | |
| 1010832903U, // PUNPCKLWDrm | |
| 205526535U, // PUNPCKLWDrr | |
| 67116119U, // PUSH16r | |
| 872422487U, // PUSH16rmm | |
| 67116119U, // PUSH16rmr | |
| 67116126U, // PUSH32r | |
| 939531358U, // PUSH32rmm | |
| 67116126U, // PUSH32rmr | |
| 67116133U, // PUSH64i16 | |
| 67116133U, // PUSH64i32 | |
| 67116133U, // PUSH64i8 | |
| 67116133U, // PUSH64r | |
| 1610620005U, // PUSH64rmm | |
| 67116133U, // PUSH64rmr | |
| 7276U, // PUSHA32 | |
| 7283U, // PUSHCS16 | |
| 7293U, // PUSHCS32 | |
| 7303U, // PUSHDS16 | |
| 7313U, // PUSHDS32 | |
| 7323U, // PUSHES16 | |
| 7333U, // PUSHES32 | |
| 7343U, // PUSHF16 | |
| 7350U, // PUSHF32 | |
| 7357U, // PUSHF64 | |
| 7364U, // PUSHFS16 | |
| 7374U, // PUSHFS32 | |
| 7384U, // PUSHFS64 | |
| 7394U, // PUSHGS16 | |
| 7404U, // PUSHGS32 | |
| 7414U, // PUSHGS64 | |
| 7424U, // PUSHSS16 | |
| 7434U, // PUSHSS32 | |
| 67116119U, // PUSHi16 | |
| 67116126U, // PUSHi32 | |
| 67116126U, // PUSHi8 | |
| 1010832914U, // PXORrm | |
| 205526546U, // PXORrr | |
| 872422676U, // RCL16m1 | |
| 872422682U, // RCL16mCL | |
| 136322324U, // RCL16mi | |
| 67116308U, // RCL16r1 | |
| 67116314U, // RCL16rCL | |
| 205528340U, // RCL16ri | |
| 939531557U, // RCL32m1 | |
| 939531563U, // RCL32mCL | |
| 140516645U, // RCL32mi | |
| 67116325U, // RCL32r1 | |
| 67116331U, // RCL32rCL | |
| 205528357U, // RCL32ri | |
| 1610620214U, // RCL64m1 | |
| 1610620220U, // RCL64mCL | |
| 142613814U, // RCL64mi | |
| 67116342U, // RCL64r1 | |
| 67116348U, // RCL64rCL | |
| 205528374U, // RCL64ri | |
| 1744837959U, // RCL8m1 | |
| 1744837965U, // RCL8mCL | |
| 144710983U, // RCL8mi | |
| 67116359U, // RCL8r1 | |
| 67116365U, // RCL8rCL | |
| 205528391U, // RCL8ri | |
| 2080382296U, // RCPPSm | |
| 2080382296U, // RCPPSm_Int | |
| 1145052504U, // RCPPSr | |
| 1145052504U, // RCPPSr_Int | |
| 2214600031U, // RCPSSm | |
| 2214600031U, // RCPSSm_Int | |
| 1145052511U, // RCPSSr | |
| 1145052511U, // RCPSSr_Int | |
| 872422758U, // RCR16m1 | |
| 872422764U, // RCR16mCL | |
| 136322406U, // RCR16mi | |
| 67116390U, // RCR16r1 | |
| 67116396U, // RCR16rCL | |
| 205528422U, // RCR16ri | |
| 939531639U, // RCR32m1 | |
| 939531645U, // RCR32mCL | |
| 140516727U, // RCR32mi | |
| 67116407U, // RCR32r1 | |
| 67116413U, // RCR32rCL | |
| 205528439U, // RCR32ri | |
| 1610620296U, // RCR64m1 | |
| 1610620302U, // RCR64mCL | |
| 142613896U, // RCR64mi | |
| 67116424U, // RCR64r1 | |
| 67116430U, // RCR64rCL | |
| 205528456U, // RCR64ri | |
| 1744838041U, // RCR8m1 | |
| 1744838047U, // RCR8mCL | |
| 144711065U, // RCR8mi | |
| 67116441U, // RCR8r1 | |
| 67116447U, // RCR8rCL | |
| 205528473U, // RCR8ri | |
| 67116458U, // RDFSBASE | |
| 67116469U, // RDFSBASE64 | |
| 67116480U, // RDGSBASE | |
| 67116491U, // RDGSBASE64 | |
| 7638U, // RDMSR | |
| 7644U, // RDPMC | |
| 67116514U, // RDRAND16r | |
| 67116523U, // RDRAND32r | |
| 67116532U, // RDRAND64r | |
| 7677U, // RDTSC | |
| 7683U, // RDTSCP | |
| 7690U, // RELEASE_MOV16mr | |
| 7690U, // RELEASE_MOV32mr | |
| 7690U, // RELEASE_MOV64mr | |
| 7690U, // RELEASE_MOV8mr | |
| 7711U, // REPNE_PREFIX | |
| 7717U, // REP_MOVSB | |
| 7727U, // REP_MOVSD | |
| 7737U, // REP_MOVSQ | |
| 7747U, // REP_MOVSW | |
| 7757U, // REP_PREFIX | |
| 7761U, // REP_STOSB | |
| 7771U, // REP_STOSD | |
| 7781U, // REP_STOSQ | |
| 7791U, // REP_STOSW | |
| 7801U, // RET | |
| 67116669U, // RETI | |
| 67116674U, // RETIW | |
| 7816U, // REX64_PREFIX | |
| 872423054U, // ROL16m1 | |
| 872423060U, // ROL16mCL | |
| 136322702U, // ROL16mi | |
| 67116686U, // ROL16r1 | |
| 67116692U, // ROL16rCL | |
| 205528718U, // ROL16ri | |
| 939531935U, // ROL32m1 | |
| 939531941U, // ROL32mCL | |
| 140517023U, // ROL32mi | |
| 67116703U, // ROL32r1 | |
| 67116709U, // ROL32rCL | |
| 205528735U, // ROL32ri | |
| 1610620592U, // ROL64m1 | |
| 1610620598U, // ROL64mCL | |
| 142614192U, // ROL64mi | |
| 67116720U, // ROL64r1 | |
| 67116726U, // ROL64rCL | |
| 205528752U, // ROL64ri | |
| 1744838337U, // ROL8m1 | |
| 1744838343U, // ROL8mCL | |
| 144711361U, // ROL8mi | |
| 67116737U, // ROL8r1 | |
| 67116743U, // ROL8rCL | |
| 205528769U, // ROL8ri | |
| 872423122U, // ROR16m1 | |
| 872423128U, // ROR16mCL | |
| 136322770U, // ROR16mi | |
| 67116754U, // ROR16r1 | |
| 67116760U, // ROR16rCL | |
| 205528786U, // ROR16ri | |
| 939532003U, // ROR32m1 | |
| 939532009U, // ROR32mCL | |
| 140517091U, // ROR32mi | |
| 67116771U, // ROR32r1 | |
| 67116777U, // ROR32rCL | |
| 205528803U, // ROR32ri | |
| 1610620660U, // ROR64m1 | |
| 1610620666U, // ROR64mCL | |
| 142614260U, // ROR64mi | |
| 67116788U, // ROR64r1 | |
| 67116794U, // ROR64rCL | |
| 205528820U, // ROR64ri | |
| 1744838405U, // ROR8m1 | |
| 1744838411U, // ROR8mCL | |
| 144711429U, // ROR8mi | |
| 67116805U, // ROR8r1 | |
| 67116811U, // ROR8rCL | |
| 205528837U, // ROR8ri | |
| 1245716246U, // ROUNDPDm | |
| 204513046U, // ROUNDPDr | |
| 1245716255U, // ROUNDPSm | |
| 204513055U, // ROUNDPSr | |
| 1295130408U, // ROUNDSDm | |
| 1346379560U, // ROUNDSDr | |
| 1297227569U, // ROUNDSSm | |
| 1346379569U, // ROUNDSSr | |
| 7994U, // RSM | |
| 2080382782U, // RSQRTPSm | |
| 2080382782U, // RSQRTPSm_Int | |
| 1145052990U, // RSQRTPSr | |
| 1145052990U, // RSQRTPSr_Int | |
| 2214600519U, // RSQRTSSm | |
| 2214600519U, // RSQRTSSm_Int | |
| 1145052999U, // RSQRTSSr | |
| 1145052999U, // RSQRTSSr_Int | |
| 8016U, // SAHF | |
| 872423253U, // SAR16m1 | |
| 872423259U, // SAR16mCL | |
| 136322901U, // SAR16mi | |
| 67116885U, // SAR16r1 | |
| 67116891U, // SAR16rCL | |
| 205528917U, // SAR16ri | |
| 939532134U, // SAR32m1 | |
| 939532140U, // SAR32mCL | |
| 140517222U, // SAR32mi | |
| 67116902U, // SAR32r1 | |
| 67116908U, // SAR32rCL | |
| 205528934U, // SAR32ri | |
| 1610620791U, // SAR64m1 | |
| 1610620797U, // SAR64mCL | |
| 142614391U, // SAR64mi | |
| 67116919U, // SAR64r1 | |
| 67116925U, // SAR64rCL | |
| 205528951U, // SAR64ri | |
| 1744838536U, // SAR8m1 | |
| 1744838542U, // SAR8mCL | |
| 144711560U, // SAR8mi | |
| 67116936U, // SAR8r1 | |
| 67116942U, // SAR8rCL | |
| 205528968U, // SAR8ri | |
| 68165529U, // SBB16i16 | |
| 136322969U, // SBB16mi | |
| 136322969U, // SBB16mi8 | |
| 136322969U, // SBB16mr | |
| 204480409U, // SBB16ri | |
| 204480409U, // SBB16ri8 | |
| 271589273U, // SBB16rm | |
| 204480409U, // SBB16rr | |
| 205528985U, // SBB16rr_REV | |
| 72359839U, // SBB32i32 | |
| 140517279U, // SBB32mi | |
| 140517279U, // SBB32mi8 | |
| 140517279U, // SBB32mr | |
| 204480415U, // SBB32ri | |
| 204480415U, // SBB32ri8 | |
| 338698143U, // SBB32rm | |
| 204480415U, // SBB32rr | |
| 205528991U, // SBB32rr_REV | |
| 74456997U, // SBB64i32 | |
| 142614437U, // SBB64mi32 | |
| 142614437U, // SBB64mi8 | |
| 142614437U, // SBB64mr | |
| 204480421U, // SBB64ri32 | |
| 204480421U, // SBB64ri8 | |
| 405807013U, // SBB64rm | |
| 204480421U, // SBB64rr | |
| 205528997U, // SBB64rr_REV | |
| 76554155U, // SBB8i8 | |
| 144711595U, // SBB8mi | |
| 144711595U, // SBB8mr | |
| 204480427U, // SBB8ri | |
| 469770155U, // SBB8rm | |
| 204480427U, // SBB8rr | |
| 205529003U, // SBB8rr_REV | |
| 8113U, // SCAS16 | |
| 8119U, // SCAS32 | |
| 8125U, // SCAS64 | |
| 8131U, // SCAS8 | |
| 8137U, // SEG_ALLOCA_32 | |
| 8137U, // SEG_ALLOCA_64 | |
| 1744838646U, // SETAEm | |
| 67117046U, // SETAEr | |
| 1744838653U, // SETAm | |
| 67117053U, // SETAr | |
| 1744838659U, // SETBEm | |
| 67117059U, // SETBEr | |
| 0U, // SETB_C16r | |
| 0U, // SETB_C32r | |
| 0U, // SETB_C64r | |
| 0U, // SETB_C8r | |
| 1744838666U, // SETBm | |
| 67117066U, // SETBr | |
| 1744838672U, // SETEm | |
| 67117072U, // SETEr | |
| 1744838678U, // SETGEm | |
| 67117078U, // SETGEr | |
| 1744838685U, // SETGm | |
| 67117085U, // SETGr | |
| 1744838691U, // SETLEm | |
| 67117091U, // SETLEr | |
| 1744838698U, // SETLm | |
| 67117098U, // SETLr | |
| 1744838704U, // SETNEm | |
| 67117104U, // SETNEr | |
| 1744838711U, // SETNOm | |
| 67117111U, // SETNOr | |
| 1744838718U, // SETNPm | |
| 67117118U, // SETNPr | |
| 1744838725U, // SETNSm | |
| 67117125U, // SETNSr | |
| 1744838732U, // SETOm | |
| 67117132U, // SETOr | |
| 1744838738U, // SETPm | |
| 67117138U, // SETPr | |
| 1744838744U, // SETSm | |
| 67117144U, // SETSr | |
| 8286U, // SFENCE | |
| 2281709669U, // SGDT16m | |
| 2281709676U, // SGDTm | |
| 872423538U, // SHL16m1 | |
| 872423544U, // SHL16mCL | |
| 136323186U, // SHL16mi | |
| 67117170U, // SHL16r1 | |
| 67117176U, // SHL16rCL | |
| 205529202U, // SHL16ri | |
| 939532419U, // SHL32m1 | |
| 939532425U, // SHL32mCL | |
| 140517507U, // SHL32mi | |
| 67117187U, // SHL32r1 | |
| 67117193U, // SHL32rCL | |
| 205529219U, // SHL32ri | |
| 1610621076U, // SHL64m1 | |
| 1610621082U, // SHL64mCL | |
| 142614676U, // SHL64mi | |
| 67117204U, // SHL64r1 | |
| 67117210U, // SHL64rCL | |
| 205529236U, // SHL64ri | |
| 1744838821U, // SHL8m1 | |
| 1744838827U, // SHL8mCL | |
| 144711845U, // SHL8mi | |
| 67117221U, // SHL8r1 | |
| 67117227U, // SHL8rCL | |
| 205529253U, // SHL8ri | |
| 136323254U, // SHLD16mrCL | |
| 1231495362U, // SHLD16mri8 | |
| 205529270U, // SHLD16rrCL | |
| 1346379970U, // SHLD16rri8 | |
| 140517577U, // SHLD32mrCL | |
| 1231429845U, // SHLD32mri8 | |
| 205529289U, // SHLD32rrCL | |
| 1346379989U, // SHLD32rri8 | |
| 142614748U, // SHLD64mrCL | |
| 1231462632U, // SHLD64mri8 | |
| 205529308U, // SHLD64rrCL | |
| 1346380008U, // SHLD64rri8 | |
| 872423663U, // SHR16m1 | |
| 872423669U, // SHR16mCL | |
| 136323311U, // SHR16mi | |
| 67117295U, // SHR16r1 | |
| 67117301U, // SHR16rCL | |
| 205529327U, // SHR16ri | |
| 939532544U, // SHR32m1 | |
| 939532550U, // SHR32mCL | |
| 140517632U, // SHR32mi | |
| 67117312U, // SHR32r1 | |
| 67117318U, // SHR32rCL | |
| 205529344U, // SHR32ri | |
| 1610621201U, // SHR64m1 | |
| 1610621207U, // SHR64mCL | |
| 142614801U, // SHR64mi | |
| 67117329U, // SHR64r1 | |
| 67117335U, // SHR64rCL | |
| 205529361U, // SHR64ri | |
| 1744838946U, // SHR8m1 | |
| 1744838952U, // SHR8mCL | |
| 144711970U, // SHR8mi | |
| 67117346U, // SHR8r1 | |
| 67117352U, // SHR8rCL | |
| 205529378U, // SHR8ri | |
| 136323379U, // SHRD16mrCL | |
| 1231495487U, // SHRD16mri8 | |
| 205529395U, // SHRD16rrCL | |
| 1346380095U, // SHRD16rri8 | |
| 140517702U, // SHRD32mrCL | |
| 1231429970U, // SHRD32mri8 | |
| 205529414U, // SHRD32rrCL | |
| 1346380114U, // SHRD32rri8 | |
| 142614873U, // SHRD64mrCL | |
| 1231462757U, // SHRD64mri8 | |
| 205529433U, // SHRD64rrCL | |
| 1346380133U, // SHRD64rri8 | |
| 1291985260U, // SHUFPDrmi | |
| 1346380140U, // SHUFPDrri | |
| 1291985268U, // SHUFPSrmi | |
| 1346380148U, // SHUFPSrri | |
| 2281709948U, // SIDT16m | |
| 2281709955U, // SIDTm | |
| 8585U, // SIN_F | |
| 0U, // SIN_Fp32 | |
| 0U, // SIN_Fp64 | |
| 0U, // SIN_Fp80 | |
| 872423822U, // SLDT16m | |
| 67117454U, // SLDT16r | |
| 67117461U, // SLDT32r | |
| 872423836U, // SLDT64m | |
| 67117468U, // SLDT64r | |
| 872423843U, // SMSW16m | |
| 67117475U, // SMSW16r | |
| 67117482U, // SMSW32r | |
| 67117489U, // SMSW64r | |
| 2080383416U, // SQRTPDm | |
| 2080383416U, // SQRTPDm_Int | |
| 1145053624U, // SQRTPDr | |
| 1145053624U, // SQRTPDr_Int | |
| 2080383424U, // SQRTPSm | |
| 2080383424U, // SQRTPSm_Int | |
| 1145053632U, // SQRTPSr | |
| 1145053632U, // SQRTPSr_Int | |
| 2147492296U, // SQRTSDm | |
| 2147492296U, // SQRTSDm_Int | |
| 1145053640U, // SQRTSDr | |
| 1145053640U, // SQRTSDr_Int | |
| 2214601168U, // SQRTSSm | |
| 2214601168U, // SQRTSSm_Int | |
| 1145053648U, // SQRTSSr | |
| 1145053648U, // SQRTSSr_Int | |
| 8664U, // SQRT_F | |
| 0U, // SQRT_Fp32 | |
| 0U, // SQRT_Fp64 | |
| 0U, // SQRT_Fp80 | |
| 8670U, // SS_PREFIX | |
| 8673U, // STC | |
| 8677U, // STD | |
| 8681U, // STI | |
| 939532781U, // STMXCSR | |
| 8694U, // STOSB | |
| 8700U, // STOSD | |
| 8706U, // STOSQ | |
| 8712U, // STOSW | |
| 67117582U, // STR16r | |
| 67117588U, // STR32r | |
| 67117594U, // STR64r | |
| 872423950U, // STRm | |
| 738206240U, // ST_F32m | |
| 805315110U, // ST_F64m | |
| 738206252U, // ST_FP32m | |
| 805315123U, // ST_FP64m | |
| 2415927866U, // ST_FP80m | |
| 67117633U, // ST_FPrr | |
| 0U, // ST_Fp32m | |
| 0U, // ST_Fp64m | |
| 0U, // ST_Fp64m32 | |
| 0U, // ST_Fp80m32 | |
| 0U, // ST_Fp80m64 | |
| 0U, // ST_FpP32m | |
| 0U, // ST_FpP64m | |
| 0U, // ST_FpP64m32 | |
| 0U, // ST_FpP80m | |
| 0U, // ST_FpP80m32 | |
| 0U, // ST_FpP80m64 | |
| 67117639U, // ST_Frr | |
| 68166220U, // SUB16i16 | |
| 136323660U, // SUB16mi | |
| 136323660U, // SUB16mi8 | |
| 136323660U, // SUB16mr | |
| 204481100U, // SUB16ri | |
| 204481100U, // SUB16ri8 | |
| 271589964U, // SUB16rm | |
| 204481100U, // SUB16rr | |
| 205529676U, // SUB16rr_REV | |
| 72360530U, // SUB32i32 | |
| 140517970U, // SUB32mi | |
| 140517970U, // SUB32mi8 | |
| 140517970U, // SUB32mr | |
| 204481106U, // SUB32ri | |
| 204481106U, // SUB32ri8 | |
| 338698834U, // SUB32rm | |
| 204481106U, // SUB32rr | |
| 205529682U, // SUB32rr_REV | |
| 74457688U, // SUB64i32 | |
| 142615128U, // SUB64mi32 | |
| 142615128U, // SUB64mi8 | |
| 142615128U, // SUB64mr | |
| 204481112U, // SUB64ri32 | |
| 204481112U, // SUB64ri8 | |
| 405807704U, // SUB64rm | |
| 204481112U, // SUB64rr | |
| 205529688U, // SUB64rr_REV | |
| 76554846U, // SUB8i8 | |
| 144712286U, // SUB8mi | |
| 144712286U, // SUB8mr | |
| 204481118U, // SUB8ri | |
| 469770846U, // SUB8rm | |
| 204481118U, // SUB8rr | |
| 205529694U, // SUB8rr_REV | |
| 541074020U, // SUBPDrm | |
| 205529700U, // SUBPDrr | |
| 541074027U, // SUBPSrm | |
| 205529707U, // SUBPSrr | |
| 738206322U, // SUBR_F32m | |
| 805315194U, // SUBR_F64m | |
| 872424066U, // SUBR_FI16m | |
| 939532939U, // SUBR_FI32m | |
| 67117716U, // SUBR_FPrST0 | |
| 67117723U, // SUBR_FST0r | |
| 0U, // SUBR_Fp32m | |
| 0U, // SUBR_Fp64m | |
| 0U, // SUBR_Fp64m32 | |
| 0U, // SUBR_Fp80m32 | |
| 0U, // SUBR_Fp80m64 | |
| 0U, // SUBR_FpI16m32 | |
| 0U, // SUBR_FpI16m64 | |
| 0U, // SUBR_FpI16m80 | |
| 0U, // SUBR_FpI32m32 | |
| 0U, // SUBR_FpI32m64 | |
| 0U, // SUBR_FpI32m80 | |
| 67117730U, // SUBR_FrST0 | |
| 608182960U, // SUBSDrm | |
| 608182960U, // SUBSDrm_Int | |
| 205529776U, // SUBSDrr | |
| 205529776U, // SUBSDrr_Int | |
| 675291831U, // SUBSSrm | |
| 675291831U, // SUBSSrm_Int | |
| 205529783U, // SUBSSrr | |
| 205529783U, // SUBSSrr_Int | |
| 738206398U, // SUB_F32m | |
| 805315269U, // SUB_F64m | |
| 872424140U, // SUB_FI16m | |
| 939533012U, // SUB_FI32m | |
| 67117788U, // SUB_FPrST0 | |
| 67117796U, // SUB_FST0r | |
| 0U, // SUB_Fp32 | |
| 0U, // SUB_Fp32m | |
| 0U, // SUB_Fp64 | |
| 0U, // SUB_Fp64m | |
| 0U, // SUB_Fp64m32 | |
| 0U, // SUB_Fp80 | |
| 0U, // SUB_Fp80m32 | |
| 0U, // SUB_Fp80m64 | |
| 0U, // SUB_FpI16m32 | |
| 0U, // SUB_FpI16m64 | |
| 0U, // SUB_FpI16m80 | |
| 0U, // SUB_FpI32m32 | |
| 0U, // SUB_FpI32m64 | |
| 0U, // SUB_FpI32m80 | |
| 67117802U, // SUB_FrST0 | |
| 8953U, // SWAPGS | |
| 8960U, // SYSCALL | |
| 8968U, // SYSENTER | |
| 8977U, // SYSEXIT | |
| 8977U, // SYSEXIT64 | |
| 8985U, // SYSRETL | |
| 8993U, // SYSRETQ | |
| 1716522900U, // TAILJMPd | |
| 1716522900U, // TAILJMPd64 | |
| 978325376U, // TAILJMPm | |
| 1649414023U, // TAILJMPm64 | |
| 0U, // TAILJMPr | |
| 105910151U, // TAILJMPr64 | |
| 0U, // TCRETURNdi | |
| 0U, // TCRETURNdi64 | |
| 0U, // TCRETURNmi | |
| 0U, // TCRETURNmi64 | |
| 0U, // TCRETURNri | |
| 0U, // TCRETURNri64 | |
| 68166441U, // TEST16i16 | |
| 136323881U, // TEST16mi | |
| 1145053993U, // TEST16ri | |
| 1409295145U, // TEST16rm | |
| 1145053993U, // TEST16rr | |
| 72360752U, // TEST32i32 | |
| 140518192U, // TEST32mi | |
| 1145054000U, // TEST32ri | |
| 1476404016U, // TEST32rm | |
| 1145054000U, // TEST32rr | |
| 74457911U, // TEST64i32 | |
| 142615351U, // TEST64mi32 | |
| 1145054007U, // TEST64ri32 | |
| 1543512887U, // TEST64rm | |
| 1145054007U, // TEST64rr | |
| 76555070U, // TEST8i8 | |
| 144712510U, // TEST8mi | |
| 1145054014U, // TEST8ri | |
| 0U, // TEST8ri_NOREX | |
| 1811948350U, // TEST8rm | |
| 1145054014U, // TEST8rr | |
| 9029U, // TLSCall_32 | |
| 9042U, // TLSCall_64 | |
| 9055U, // TLS_addr32 | |
| 9068U, // TLS_addr64 | |
| 9081U, // TRAP | |
| 9085U, // TST_F | |
| 0U, // TST_Fp32 | |
| 0U, // TST_Fp64 | |
| 0U, // TST_Fp80 | |
| 1409295234U, // TZCNT16rm | |
| 1145054082U, // TZCNT16rr | |
| 1476404106U, // TZCNT32rm | |
| 1145054090U, // TZCNT32rr | |
| 1543512978U, // TZCNT64rm | |
| 1145054098U, // TZCNT64rr | |
| 2147487345U, // UCOMISDrm | |
| 1145048689U, // UCOMISDrr | |
| 2214596218U, // UCOMISSrm | |
| 1145048698U, // UCOMISSrr | |
| 67117978U, // UCOM_FIPr | |
| 67117987U, // UCOM_FIr | |
| 9131U, // UCOM_FPPr | |
| 67118003U, // UCOM_FPr | |
| 0U, // UCOM_FpIr32 | |
| 0U, // UCOM_FpIr64 | |
| 0U, // UCOM_FpIr80 | |
| 0U, // UCOM_Fpr32 | |
| 0U, // UCOM_Fpr64 | |
| 0U, // UCOM_Fpr80 | |
| 67118011U, // UCOM_Fr | |
| 9154U, // UD2B | |
| 541074375U, // UNPCKHPDrm | |
| 205530055U, // UNPCKHPDrr | |
| 541074385U, // UNPCKHPSrm | |
| 205530065U, // UNPCKHPSrr | |
| 541074395U, // UNPCKLPDrm | |
| 205530075U, // UNPCKLPDrr | |
| 541074405U, // UNPCKLPSrm | |
| 205530085U, // UNPCKLPSrr | |
| 80192495U, // VAARG_64 | |
| 2483037178U, // VADDPDYrm | |
| 204514298U, // VADDPDYrr | |
| 540058618U, // VADDPDrm | |
| 204514298U, // VADDPDrr | |
| 2483037186U, // VADDPSYrm | |
| 204514306U, // VADDPSYrr | |
| 540058626U, // VADDPSrm | |
| 204514306U, // VADDPSrr | |
| 607167498U, // VADDSDrm | |
| 607167498U, // VADDSDrm_Int | |
| 204514314U, // VADDSDrr | |
| 204514314U, // VADDSDrr_Int | |
| 674276370U, // VADDSSrm | |
| 674276370U, // VADDSSrm_Int | |
| 204514322U, // VADDSSrr | |
| 204514322U, // VADDSSrr_Int | |
| 2483037210U, // VADDSUBPDYrm | |
| 204514330U, // VADDSUBPDYrr | |
| 540058650U, // VADDSUBPDrm | |
| 204514330U, // VADDSUBPDrr | |
| 2483037221U, // VADDSUBPSYrm | |
| 204514341U, // VADDSUBPSYrr | |
| 540058661U, // VADDSUBPSrm | |
| 204514341U, // VADDSUBPSrr | |
| 1009820720U, // VAESDECLASTrm | |
| 204514352U, // VAESDECLASTrr | |
| 1009820733U, // VAESDECrm | |
| 204514365U, // VAESDECrr | |
| 1009820742U, // VAESENCLASTrm | |
| 204514374U, // VAESENCLASTrr | |
| 1009820755U, // VAESENCrm | |
| 204514387U, // VAESENCrr | |
| 1073751132U, // VAESIMCrm | |
| 1145054300U, // VAESIMCrr | |
| 1219503205U, // VAESKEYGENASSIST128rm | |
| 204514405U, // VAESKEYGENASSIST128rr | |
| 2483037303U, // VANDNPDYrm | |
| 204514423U, // VANDNPDYrr | |
| 540058743U, // VANDNPDrm | |
| 204514423U, // VANDNPDrr | |
| 2483037312U, // VANDNPSYrm | |
| 204514432U, // VANDNPSYrr | |
| 540058752U, // VANDNPSrm | |
| 204514432U, // VANDNPSrr | |
| 2483037321U, // VANDPDYrm | |
| 204514441U, // VANDPDYrr | |
| 540058761U, // VANDPDrm | |
| 204514441U, // VANDPDrr | |
| 2483037329U, // VANDPSYrm | |
| 204514449U, // VANDPSYrr | |
| 540058769U, // VANDPSrm | |
| 204514449U, // VANDPSrr | |
| 79799449U, // VASTART_SAVE_XMM_REGS | |
| 1314923697U, // VBLENDPDYrmi | |
| 1345365169U, // VBLENDPDYrri | |
| 1288807601U, // VBLENDPDrmi | |
| 1345365169U, // VBLENDPDrri | |
| 1314923707U, // VBLENDPSYrmi | |
| 1345365179U, // VBLENDPSYrri | |
| 1288807611U, // VBLENDPSrmi | |
| 1345365179U, // VBLENDPSrri | |
| 1314923717U, // VBLENDVPDYrm | |
| 1345365189U, // VBLENDVPDYrr | |
| 1288807621U, // VBLENDVPDrm | |
| 1345365189U, // VBLENDVPDrr | |
| 1314923728U, // VBLENDVPSYrm | |
| 1345365200U, // VBLENDVPSYrr | |
| 1288807632U, // VBLENDVPSrm | |
| 1345365200U, // VBLENDVPSrr | |
| 2080384219U, // VBROADCASTF128 | |
| 2147493099U, // VBROADCASTSD | |
| 2214601977U, // VBROADCASTSS | |
| 2214601977U, // VBROADCASTSSY | |
| 1894944387U, // VCMPPDYrmi | |
| 1291953415U, // VCMPPDYrmi_alt | |
| 1962086019U, // VCMPPDYrri | |
| 1345365255U, // VCMPPDYrri_alt | |
| 1894944387U, // VCMPPDrmi | |
| 1291953415U, // VCMPPDrmi_alt | |
| 1962086019U, // VCMPPDrri | |
| 1345365255U, // VCMPPDrri_alt | |
| 1897041539U, // VCMPPSYrmi | |
| 1291953423U, // VCMPPSYrmi_alt | |
| 1964183171U, // VCMPPSYrri | |
| 1345365263U, // VCMPPSYrri_alt | |
| 1897041539U, // VCMPPSrmi | |
| 1291953423U, // VCMPPSrmi_alt | |
| 1964183171U, // VCMPPSrri | |
| 1345365263U, // VCMPPSrri_alt | |
| 1898155651U, // VCMPSDrm | |
| 1295099159U, // VCMPSDrm_alt | |
| 1965231747U, // VCMPSDrr | |
| 1345365271U, // VCMPSDrr_alt | |
| 1900285571U, // VCMPSSrm | |
| 1297196319U, // VCMPSSrm_alt | |
| 1967328899U, // VCMPSSrr | |
| 1345365279U, // VCMPSSrr_alt | |
| 2080378504U, // VCOMISDrm | |
| 1145048712U, // VCOMISDrr | |
| 2080378513U, // VCOMISSrm | |
| 1145048721U, // VCOMISSrr | |
| 2080378522U, // VCVTDQ2PDYrm | |
| 1145048730U, // VCVTDQ2PDYrr | |
| 2080378522U, // VCVTDQ2PDrm | |
| 1145048730U, // VCVTDQ2PDrr | |
| 2550140581U, // VCVTDQ2PSYrm | |
| 1145048741U, // VCVTDQ2PSYrr | |
| 1073745573U, // VCVTDQ2PSrm | |
| 1145048741U, // VCVTDQ2PSrr | |
| 1145048752U, // VCVTPD2DQXrYr | |
| 2080384295U, // VCVTPD2DQXrm | |
| 1145054503U, // VCVTPD2DQXrr | |
| 2617255219U, // VCVTPD2DQYrm | |
| 1145054515U, // VCVTPD2DQYrr | |
| 1145048752U, // VCVTPD2DQrr | |
| 1145048763U, // VCVTPD2PSXrYr | |
| 2080384319U, // VCVTPD2PSXrm | |
| 1145054527U, // VCVTPD2PSXrr | |
| 2617255243U, // VCVTPD2PSYrm | |
| 1145054539U, // VCVTPD2PSYrr | |
| 1145048763U, // VCVTPD2PSrr | |
| 2080384343U, // VCVTPH2PSYrm | |
| 1145054551U, // VCVTPH2PSYrr | |
| 2147493207U, // VCVTPH2PSrm | |
| 1145054551U, // VCVTPH2PSrr | |
| 2617249478U, // VCVTPS2DQYrm | |
| 1145048774U, // VCVTPS2DQYrr | |
| 2080378566U, // VCVTPS2DQrm | |
| 1145048774U, // VCVTPS2DQrr | |
| 2080378577U, // VCVTPS2PDYrm | |
| 1145048785U, // VCVTPS2PDYrr | |
| 2147487441U, // VCVTPS2PDrm | |
| 1145048785U, // VCVTPS2PDrr | |
| 1231562082U, // VCVTPS2PHYmr | |
| 204514658U, // VCVTPS2PHYrr | |
| 1231594850U, // VCVTPS2PHmr | |
| 204514658U, // VCVTPS2PHrr | |
| 2147487452U, // VCVTSD2SI64rm | |
| 1145048796U, // VCVTSD2SI64rr | |
| 2147487452U, // VCVTSD2SIrm | |
| 1145048796U, // VCVTSD2SIrr | |
| 607162087U, // VCVTSD2SSrm | |
| 204508903U, // VCVTSD2SSrr | |
| 405841261U, // VCVTSI2SD64rm | |
| 204514669U, // VCVTSI2SD64rr | |
| 338732409U, // VCVTSI2SDLrm | |
| 204514681U, // VCVTSI2SDLrr | |
| 338726642U, // VCVTSI2SDrm | |
| 204508914U, // VCVTSI2SDrr | |
| 405841285U, // VCVTSI2SS64rm | |
| 204514693U, // VCVTSI2SS64rr | |
| 338726653U, // VCVTSI2SSrm | |
| 204508925U, // VCVTSI2SSrr | |
| 674270984U, // VCVTSS2SDrm | |
| 204508936U, // VCVTSS2SDrr | |
| 2214602129U, // VCVTSS2SI64rm | |
| 1145054609U, // VCVTSS2SI64rr | |
| 2214602140U, // VCVTSS2SIrm | |
| 1145054620U, // VCVTSS2SIrr | |
| 1145054632U, // VCVTTPD2DQXrYr | |
| 2080384436U, // VCVTTPD2DQXrm | |
| 1145054644U, // VCVTTPD2DQXrr | |
| 2617255361U, // VCVTTPD2DQYrm | |
| 1145054657U, // VCVTTPD2DQYrr | |
| 2080384424U, // VCVTTPD2DQrm | |
| 1145054632U, // VCVTTPD2DQrr | |
| 2617249555U, // VCVTTPS2DQYrm | |
| 1145048851U, // VCVTTPS2DQYrr | |
| 2080378643U, // VCVTTPS2DQrm | |
| 1145048851U, // VCVTTPS2DQrr | |
| 2147487519U, // VCVTTSD2SI64rm | |
| 1145048863U, // VCVTTSD2SI64rr | |
| 2147487519U, // VCVTTSD2SIrm | |
| 1145048863U, // VCVTTSD2SIrr | |
| 2214596395U, // VCVTTSS2SI64rm | |
| 1145048875U, // VCVTTSS2SI64rr | |
| 2214596395U, // VCVTTSS2SIrm | |
| 1145048875U, // VCVTTSS2SIrr | |
| 2483037646U, // VDIVPDYrm | |
| 204514766U, // VDIVPDYrr | |
| 540059086U, // VDIVPDrm | |
| 204514766U, // VDIVPDrr | |
| 2483037654U, // VDIVPSYrm | |
| 204514774U, // VDIVPSYrr | |
| 540059094U, // VDIVPSrm | |
| 204514774U, // VDIVPSrr | |
| 607167966U, // VDIVSDrm | |
| 607167966U, // VDIVSDrm_Int | |
| 204514782U, // VDIVSDrr | |
| 204514782U, // VDIVSDrr_Int | |
| 674276838U, // VDIVSSrm | |
| 674276838U, // VDIVSSrm_Int | |
| 204514790U, // VDIVSSrr | |
| 204514790U, // VDIVSSrr_Int | |
| 1288807918U, // VDPPDrmi | |
| 1345365486U, // VDPPDrri | |
| 1314924021U, // VDPPSYrmi | |
| 1345365493U, // VDPPSYrri | |
| 1288807925U, // VDPPSrmi | |
| 1345365493U, // VDPPSrri | |
| 872424956U, // VERRm | |
| 67118588U, // VERRr | |
| 872424962U, // VERWm | |
| 67118594U, // VERWr | |
| 1231562248U, // VEXTRACTF128mr | |
| 204514824U, // VEXTRACTF128rr | |
| 1231332886U, // VEXTRACTPSmr | |
| 204514838U, // VEXTRACTPSrr | |
| 204514850U, // VEXTRACTPSrr64 | |
| 540059183U, // VFMADDPDr132m | |
| 2483037743U, // VFMADDPDr132mY | |
| 204514863U, // VFMADDPDr132r | |
| 204514863U, // VFMADDPDr132rY | |
| 540059196U, // VFMADDPDr213m | |
| 2483037756U, // VFMADDPDr213mY | |
| 204514876U, // VFMADDPDr213r | |
| 204514876U, // VFMADDPDr213rY | |
| 540059209U, // VFMADDPDr231m | |
| 2483037769U, // VFMADDPDr231mY | |
| 204514889U, // VFMADDPDr231r | |
| 204514889U, // VFMADDPDr231rY | |
| 540059222U, // VFMADDPSr132m | |
| 2483037782U, // VFMADDPSr132mY | |
| 204514902U, // VFMADDPSr132r | |
| 204514902U, // VFMADDPSr132rY | |
| 540059235U, // VFMADDPSr213m | |
| 2483037795U, // VFMADDPSr213mY | |
| 204514915U, // VFMADDPSr213r | |
| 204514915U, // VFMADDPSr213rY | |
| 540059248U, // VFMADDPSr231m | |
| 2483037808U, // VFMADDPSr231mY | |
| 204514928U, // VFMADDPSr231r | |
| 204514928U, // VFMADDPSr231rY | |
| 540059261U, // VFMADDSUBPDr132m | |
| 2483037821U, // VFMADDSUBPDr132mY | |
| 204514941U, // VFMADDSUBPDr132r | |
| 204514941U, // VFMADDSUBPDr132rY | |
| 540059277U, // VFMADDSUBPDr213m | |
| 2483037837U, // VFMADDSUBPDr213mY | |
| 204514957U, // VFMADDSUBPDr213r | |
| 204514957U, // VFMADDSUBPDr213rY | |
| 540059293U, // VFMADDSUBPDr231m | |
| 2483037853U, // VFMADDSUBPDr231mY | |
| 204514973U, // VFMADDSUBPDr231r | |
| 204514973U, // VFMADDSUBPDr231rY | |
| 540059309U, // VFMADDSUBPSr132m | |
| 2483037869U, // VFMADDSUBPSr132mY | |
| 204514989U, // VFMADDSUBPSr132r | |
| 204514989U, // VFMADDSUBPSr132rY | |
| 540059325U, // VFMADDSUBPSr213m | |
| 2483037885U, // VFMADDSUBPSr213mY | |
| 204515005U, // VFMADDSUBPSr213r | |
| 204515005U, // VFMADDSUBPSr213rY | |
| 540059341U, // VFMADDSUBPSr231m | |
| 2483037901U, // VFMADDSUBPSr231mY | |
| 204515021U, // VFMADDSUBPSr231r | |
| 204515021U, // VFMADDSUBPSr231rY | |
| 540059357U, // VFMSUBADDPDr132m | |
| 2483037917U, // VFMSUBADDPDr132mY | |
| 204515037U, // VFMSUBADDPDr132r | |
| 204515037U, // VFMSUBADDPDr132rY | |
| 540059373U, // VFMSUBADDPDr213m | |
| 2483037933U, // VFMSUBADDPDr213mY | |
| 204515053U, // VFMSUBADDPDr213r | |
| 204515053U, // VFMSUBADDPDr213rY | |
| 540059389U, // VFMSUBADDPDr231m | |
| 2483037949U, // VFMSUBADDPDr231mY | |
| 204515069U, // VFMSUBADDPDr231r | |
| 204515069U, // VFMSUBADDPDr231rY | |
| 540059405U, // VFMSUBADDPSr132m | |
| 2483037965U, // VFMSUBADDPSr132mY | |
| 204515085U, // VFMSUBADDPSr132r | |
| 204515085U, // VFMSUBADDPSr132rY | |
| 540059421U, // VFMSUBADDPSr213m | |
| 2483037981U, // VFMSUBADDPSr213mY | |
| 204515101U, // VFMSUBADDPSr213r | |
| 204515101U, // VFMSUBADDPSr213rY | |
| 540059437U, // VFMSUBADDPSr231m | |
| 2483037997U, // VFMSUBADDPSr231mY | |
| 204515117U, // VFMSUBADDPSr231r | |
| 204515117U, // VFMSUBADDPSr231rY | |
| 540059453U, // VFMSUBPDr132m | |
| 2483038013U, // VFMSUBPDr132mY | |
| 204515133U, // VFMSUBPDr132r | |
| 204515133U, // VFMSUBPDr132rY | |
| 540059466U, // VFMSUBPDr213m | |
| 2483038026U, // VFMSUBPDr213mY | |
| 204515146U, // VFMSUBPDr213r | |
| 204515146U, // VFMSUBPDr213rY | |
| 540059479U, // VFMSUBPDr231m | |
| 2483038039U, // VFMSUBPDr231mY | |
| 204515159U, // VFMSUBPDr231r | |
| 204515159U, // VFMSUBPDr231rY | |
| 540059492U, // VFMSUBPSr132m | |
| 2483038052U, // VFMSUBPSr132mY | |
| 204515172U, // VFMSUBPSr132r | |
| 204515172U, // VFMSUBPSr132rY | |
| 540059505U, // VFMSUBPSr213m | |
| 2483038065U, // VFMSUBPSr213mY | |
| 204515185U, // VFMSUBPSr213r | |
| 204515185U, // VFMSUBPSr213rY | |
| 540059518U, // VFMSUBPSr231m | |
| 2483038078U, // VFMSUBPSr231mY | |
| 204515198U, // VFMSUBPSr231r | |
| 204515198U, // VFMSUBPSr231rY | |
| 540059531U, // VFNMADDPDr132m | |
| 2483038091U, // VFNMADDPDr132mY | |
| 204515211U, // VFNMADDPDr132r | |
| 204515211U, // VFNMADDPDr132rY | |
| 540059545U, // VFNMADDPDr213m | |
| 2483038105U, // VFNMADDPDr213mY | |
| 204515225U, // VFNMADDPDr213r | |
| 204515225U, // VFNMADDPDr213rY | |
| 540059559U, // VFNMADDPDr231m | |
| 2483038119U, // VFNMADDPDr231mY | |
| 204515239U, // VFNMADDPDr231r | |
| 204515239U, // VFNMADDPDr231rY | |
| 540059573U, // VFNMADDPSr132m | |
| 2483038133U, // VFNMADDPSr132mY | |
| 204515253U, // VFNMADDPSr132r | |
| 204515253U, // VFNMADDPSr132rY | |
| 540059587U, // VFNMADDPSr213m | |
| 2483038147U, // VFNMADDPSr213mY | |
| 204515267U, // VFNMADDPSr213r | |
| 204515267U, // VFNMADDPSr213rY | |
| 540059601U, // VFNMADDPSr231m | |
| 2483038161U, // VFNMADDPSr231mY | |
| 204515281U, // VFNMADDPSr231r | |
| 204515281U, // VFNMADDPSr231rY | |
| 540059615U, // VFNMSUBPDr132m | |
| 2483038175U, // VFNMSUBPDr132mY | |
| 204515295U, // VFNMSUBPDr132r | |
| 204515295U, // VFNMSUBPDr132rY | |
| 540059629U, // VFNMSUBPDr213m | |
| 2483038189U, // VFNMSUBPDr213mY | |
| 204515309U, // VFNMSUBPDr213r | |
| 204515309U, // VFNMSUBPDr213rY | |
| 540059643U, // VFNMSUBPDr231m | |
| 2483038203U, // VFNMSUBPDr231mY | |
| 204515323U, // VFNMSUBPDr231r | |
| 204515323U, // VFNMSUBPDr231rY | |
| 540059657U, // VFNMSUBPSr132m | |
| 2483038217U, // VFNMSUBPSr132mY | |
| 204515337U, // VFNMSUBPSr132r | |
| 204515337U, // VFNMSUBPSr132rY | |
| 540059671U, // VFNMSUBPSr213m | |
| 2483038231U, // VFNMSUBPSr213mY | |
| 204515351U, // VFNMSUBPSr213r | |
| 204515351U, // VFNMSUBPSr213rY | |
| 540059685U, // VFNMSUBPSr231m | |
| 2483038245U, // VFNMSUBPSr231mY | |
| 204515365U, // VFNMSUBPSr231r | |
| 204515365U, // VFNMSUBPSr231rY | |
| 540058743U, // VFsANDNPDrm | |
| 204514423U, // VFsANDNPDrr | |
| 540058752U, // VFsANDNPSrm | |
| 204514432U, // VFsANDNPSrr | |
| 540058761U, // VFsANDPDrm | |
| 204514441U, // VFsANDPDrr | |
| 540058769U, // VFsANDPSrm | |
| 204514449U, // VFsANDPSrr | |
| 540059699U, // VFsORPDrm | |
| 204515379U, // VFsORPDrr | |
| 540059706U, // VFsORPSrm | |
| 204515386U, // VFsORPSrr | |
| 540059713U, // VFsXORPDrm | |
| 204515393U, // VFsXORPDrr | |
| 540059721U, // VFsXORPSrm | |
| 204515401U, // VFsXORPSrr | |
| 2483038289U, // VHADDPDYrm | |
| 204515409U, // VHADDPDYrr | |
| 540059729U, // VHADDPDrm | |
| 204515409U, // VHADDPDrr | |
| 2483038298U, // VHADDPSYrm | |
| 204515418U, // VHADDPSYrr | |
| 540059738U, // VHADDPSrm | |
| 204515418U, // VHADDPSrr | |
| 2483038307U, // VHSUBPDYrm | |
| 204515427U, // VHSUBPDYrr | |
| 540059747U, // VHSUBPDrm | |
| 204515427U, // VHSUBPDrr | |
| 2483038316U, // VHSUBPSYrm | |
| 204515436U, // VHSUBPSYrr | |
| 540059756U, // VHSUBPSrm | |
| 204515436U, // VHSUBPSrr | |
| 1291954293U, // VINSERTF128rm | |
| 1345366133U, // VINSERTF128rr | |
| 1297197186U, // VINSERTPSrm | |
| 1345366146U, // VINSERTPSrr | |
| 2550147213U, // VLDDQUYrm | |
| 1073752205U, // VLDDQUrm | |
| 939534485U, // VLDMXCSR | |
| 1145055391U, // VMASKMOVDQU | |
| 1145055391U, // VMASKMOVDQU64 | |
| 1231628460U, // VMASKMOVPDYmr | |
| 2483038380U, // VMASKMOVPDYrm | |
| 1231562924U, // VMASKMOVPDmr | |
| 540059820U, // VMASKMOVPDrm | |
| 1231628472U, // VMASKMOVPSYmr | |
| 2483038392U, // VMASKMOVPSYrm | |
| 1231562936U, // VMASKMOVPSmr | |
| 540059832U, // VMASKMOVPSrm | |
| 2483038404U, // VMAXPDYrm | |
| 2483038404U, // VMAXPDYrm_Int | |
| 204515524U, // VMAXPDYrr | |
| 204515524U, // VMAXPDYrr_Int | |
| 540059844U, // VMAXPDrm | |
| 540059844U, // VMAXPDrm_Int | |
| 204515524U, // VMAXPDrr | |
| 204515524U, // VMAXPDrr_Int | |
| 2483038412U, // VMAXPSYrm | |
| 2483038412U, // VMAXPSYrm_Int | |
| 204515532U, // VMAXPSYrr | |
| 204515532U, // VMAXPSYrr_Int | |
| 540059852U, // VMAXPSrm | |
| 540059852U, // VMAXPSrm_Int | |
| 204515532U, // VMAXPSrr | |
| 204515532U, // VMAXPSrr_Int | |
| 607168724U, // VMAXSDrm | |
| 607168724U, // VMAXSDrm_Int | |
| 204515540U, // VMAXSDrr | |
| 204515540U, // VMAXSDrr_Int | |
| 674277596U, // VMAXSSrm | |
| 674277596U, // VMAXSSrm_Int | |
| 204515548U, // VMAXSSrr | |
| 204515548U, // VMAXSSrr_Int | |
| 10468U, // VMCALL | |
| 1610623211U, // VMCLEARm | |
| 2483038452U, // VMINPDYrm | |
| 2483038452U, // VMINPDYrm_Int | |
| 204515572U, // VMINPDYrr | |
| 204515572U, // VMINPDYrr_Int | |
| 540059892U, // VMINPDrm | |
| 540059892U, // VMINPDrm_Int | |
| 204515572U, // VMINPDrr | |
| 204515572U, // VMINPDrr_Int | |
| 2483038460U, // VMINPSYrm | |
| 2483038460U, // VMINPSYrm_Int | |
| 204515580U, // VMINPSYrr | |
| 204515580U, // VMINPSYrr_Int | |
| 540059900U, // VMINPSrm | |
| 540059900U, // VMINPSrm_Int | |
| 204515580U, // VMINPSrr | |
| 204515580U, // VMINPSrr_Int | |
| 607168772U, // VMINSDrm | |
| 607168772U, // VMINSDrm_Int | |
| 204515588U, // VMINSDrr | |
| 204515588U, // VMINSDrr_Int | |
| 674277644U, // VMINSSrm | |
| 674277644U, // VMINSSrm_Int | |
| 204515596U, // VMINSSrr | |
| 204515596U, // VMINSSrr_Int | |
| 10516U, // VMLAUNCH | |
| 1145055517U, // VMOV64toPQIrr | |
| 1543514404U, // VMOV64toSDrm | |
| 1145055517U, // VMOV64toSDrr | |
| 175115483U, // VMOVAPDYmr | |
| 2617248987U, // VMOVAPDYrm | |
| 1145048283U, // VMOVAPDYrr | |
| 1145048283U, // VMOVAPDYrr_REV | |
| 167775451U, // VMOVAPDmr | |
| 2080378075U, // VMOVAPDrm | |
| 1145048283U, // VMOVAPDrr | |
| 1145048283U, // VMOVAPDrr_REV | |
| 175115492U, // VMOVAPSYmr | |
| 2617248996U, // VMOVAPSYrm | |
| 1145048292U, // VMOVAPSYrr | |
| 1145048292U, // VMOVAPSYrr_REV | |
| 167775460U, // VMOVAPSmr | |
| 2080378084U, // VMOVAPSrm | |
| 1145048292U, // VMOVAPSrr | |
| 1145048292U, // VMOVAPSrr_REV | |
| 2617256235U, // VMOVDDUPYrm | |
| 1145055531U, // VMOVDDUPYrr | |
| 2147494187U, // VMOVDDUPrm | |
| 1145055531U, // VMOVDDUPrr | |
| 1476405533U, // VMOVDI2PDIrm | |
| 1145055517U, // VMOVDI2PDIrr | |
| 1476405533U, // VMOVDI2SSrm | |
| 1145055517U, // VMOVDI2SSrr | |
| 176171317U, // VMOVDQAYmr | |
| 2550147381U, // VMOVDQAYrm | |
| 1145055541U, // VMOVDQAYrr | |
| 1145055541U, // VMOVDQAYrr_REV | |
| 168831285U, // VMOVDQAmr | |
| 1073752373U, // VMOVDQArm | |
| 1145055541U, // VMOVDQArr | |
| 1145055541U, // VMOVDQArr_REV | |
| 176171326U, // VMOVDQUYmr | |
| 2550147390U, // VMOVDQUYrm | |
| 1145055550U, // VMOVDQUYrr | |
| 1145055550U, // VMOVDQUYrr_REV | |
| 168831294U, // VMOVDQUmr | |
| 168831294U, // VMOVDQUmr_Int | |
| 1073752382U, // VMOVDQUrm | |
| 1145055550U, // VMOVDQUrr | |
| 1145055550U, // VMOVDQUrr_REV | |
| 204515655U, // VMOVHLPSrr | |
| 169879889U, // VMOVHPDmr | |
| 607168849U, // VMOVHPDrm | |
| 169879898U, // VMOVHPSmr | |
| 607168858U, // VMOVHPSrm | |
| 204515683U, // VMOVLHPSrr | |
| 169879917U, // VMOVLPDmr | |
| 607168877U, // VMOVLPDrm | |
| 169879926U, // VMOVLPSmr | |
| 607168886U, // VMOVLPSrm | |
| 142616868U, // VMOVLQ128mr | |
| 1145055615U, // VMOVMSKPDYr64r | |
| 1145055615U, // VMOVMSKPDYrr32 | |
| 1145055615U, // VMOVMSKPDYrr64 | |
| 1145055615U, // VMOVMSKPDr64r | |
| 1145055615U, // VMOVMSKPDrr32 | |
| 1145055615U, // VMOVMSKPDrr64 | |
| 1145055626U, // VMOVMSKPSYr64r | |
| 1145055626U, // VMOVMSKPSYrr32 | |
| 1145055626U, // VMOVMSKPSYrr64 | |
| 1145055626U, // VMOVMSKPSr64r | |
| 1145055626U, // VMOVMSKPSrr32 | |
| 1145055626U, // VMOVMSKPSrr64 | |
| 1073752469U, // VMOVNTDQArm | |
| 175122848U, // VMOVNTDQY_64mr | |
| 175122848U, // VMOVNTDQYmr | |
| 167782816U, // VMOVNTDQ_64mr | |
| 167782816U, // VMOVNTDQmr | |
| 175122858U, // VMOVNTPDYmr | |
| 167782826U, // VMOVNTPDmr | |
| 175122868U, // VMOVNTPSYmr | |
| 167782836U, // VMOVNTPSmr | |
| 140519709U, // VMOVPDI2DImr | |
| 1145055517U, // VMOVPDI2DIrr | |
| 142616868U, // VMOVPQI2QImr | |
| 1145049992U, // VMOVPQIto64rr | |
| 1543514404U, // VMOVQI2PQIrm | |
| 1145055524U, // VMOVQd64rr | |
| 1145055517U, // VMOVQd64rr_alt | |
| 1145055524U, // VMOVQs64rr | |
| 1145055524U, // VMOVQxrxr | |
| 169879998U, // VMOVSDmr | |
| 2147494334U, // VMOVSDrm | |
| 204515774U, // VMOVSDrr | |
| 204515774U, // VMOVSDrr_REV | |
| 142616868U, // VMOVSDto64mr | |
| 1145055517U, // VMOVSDto64rr | |
| 2617256390U, // VMOVSHDUPYrm | |
| 1145055686U, // VMOVSHDUPYrr | |
| 2080385478U, // VMOVSHDUPrm | |
| 1145055686U, // VMOVSHDUPrr | |
| 2617256401U, // VMOVSLDUPYrm | |
| 1145055697U, // VMOVSLDUPYrr | |
| 2080385489U, // VMOVSLDUPrm | |
| 1145055697U, // VMOVSLDUPrr | |
| 140519709U, // VMOVSS2DImr | |
| 1145055517U, // VMOVSS2DIrr | |
| 170928604U, // VMOVSSmr | |
| 2214603228U, // VMOVSSrm | |
| 204515804U, // VMOVSSrr | |
| 204515804U, // VMOVSSrr_REV | |
| 175122916U, // VMOVUPDYmr | |
| 2617256420U, // VMOVUPDYrm | |
| 1145055716U, // VMOVUPDYrr | |
| 1145055716U, // VMOVUPDYrr_REV | |
| 167782884U, // VMOVUPDmr | |
| 2080385508U, // VMOVUPDrm | |
| 1145055716U, // VMOVUPDrr | |
| 1145055716U, // VMOVUPDrr_REV | |
| 175122925U, // VMOVUPSYmr | |
| 2617256429U, // VMOVUPSYrm | |
| 1145055725U, // VMOVUPSYrr | |
| 1145055725U, // VMOVUPSYrr_REV | |
| 167782893U, // VMOVUPSmr | |
| 2080385517U, // VMOVUPSrm | |
| 1145055725U, // VMOVUPSrr | |
| 1145055725U, // VMOVUPSrr_REV | |
| 1476405533U, // VMOVZDI2PDIrm | |
| 1145055517U, // VMOVZDI2PDIrr | |
| 1073752356U, // VMOVZPQILo2PQIrm | |
| 1145055524U, // VMOVZPQILo2PQIrr | |
| 1543514404U, // VMOVZQI2PQIrm | |
| 1145055517U, // VMOVZQI2PQIrr | |
| 1288808950U, // VMPSADBWrmi | |
| 1345366518U, // VMPSADBWrri | |
| 1610623488U, // VMPTRLDm | |
| 1610623497U, // VMPTRSTm | |
| 140519954U, // VMREAD32rm | |
| 1145055762U, // VMREAD32rr | |
| 142617115U, // VMREAD64rm | |
| 1145055771U, // VMREAD64rr | |
| 10788U, // VMRESUME | |
| 2483038765U, // VMULPDYrm | |
| 204515885U, // VMULPDYrr | |
| 540060205U, // VMULPDrm | |
| 204515885U, // VMULPDrr | |
| 2483038773U, // VMULPSYrm | |
| 204515893U, // VMULPSYrr | |
| 540060213U, // VMULPSrm | |
| 204515893U, // VMULPSrr | |
| 607169085U, // VMULSDrm | |
| 607169085U, // VMULSDrm_Int | |
| 204515901U, // VMULSDrr | |
| 204515901U, // VMULSDrr_Int | |
| 674277957U, // VMULSSrm | |
| 674277957U, // VMULSSrm_Int | |
| 204515909U, // VMULSSrr | |
| 204515909U, // VMULSSrr_Int | |
| 1476405837U, // VMWRITE32rm | |
| 1145055821U, // VMWRITE32rr | |
| 1543514711U, // VMWRITE64rm | |
| 1145055831U, // VMWRITE64rr | |
| 10849U, // VMXOFF | |
| 1610623592U, // VMXON | |
| 2483038259U, // VORPDYrm | |
| 204515379U, // VORPDYrr | |
| 540059699U, // VORPDrm | |
| 204515379U, // VORPDrr | |
| 2483038266U, // VORPSYrm | |
| 204515386U, // VORPSYrr | |
| 540059706U, // VORPSrm | |
| 204515386U, // VORPSrr | |
| 1073752687U, // VPABSBrm128 | |
| 1145055855U, // VPABSBrr128 | |
| 1073752695U, // VPABSDrm128 | |
| 1145055863U, // VPABSDrr128 | |
| 1073752703U, // VPABSWrm128 | |
| 1145055871U, // VPABSWrr128 | |
| 1009822343U, // VPACKSSDWrm | |
| 204515975U, // VPACKSSDWrr | |
| 1009822354U, // VPACKSSWBrm | |
| 204515986U, // VPACKSSWBrr | |
| 1009822365U, // VPACKUSDWrm | |
| 204515997U, // VPACKUSDWrr | |
| 1009822376U, // VPACKUSWBrm | |
| 204516008U, // VPACKUSWBrr | |
| 1009822387U, // VPADDBrm | |
| 204516019U, // VPADDBrr | |
| 1009822395U, // VPADDDrm | |
| 204516027U, // VPADDDrr | |
| 1009822403U, // VPADDQrm | |
| 204516035U, // VPADDQrr | |
| 1009822411U, // VPADDSBrm | |
| 204516043U, // VPADDSBrr | |
| 1009822420U, // VPADDSWrm | |
| 204516052U, // VPADDSWrr | |
| 1009822429U, // VPADDUSBrm | |
| 204516061U, // VPADDUSBrr | |
| 1009822439U, // VPADDUSWrm | |
| 204516071U, // VPADDUSWrr | |
| 1009822449U, // VPADDWrm | |
| 204516081U, // VPADDWrr | |
| 1288809209U, // VPALIGNR128rm | |
| 1345366777U, // VPALIGNR128rr | |
| 1009822467U, // VPANDNrm | |
| 204516099U, // VPANDNrr | |
| 1009822475U, // VPANDrm | |
| 204516107U, // VPANDrr | |
| 1009822482U, // VPAVGBrm | |
| 204516114U, // VPAVGBrr | |
| 1009822490U, // VPAVGWrm | |
| 204516122U, // VPAVGWrr | |
| 1288809250U, // VPBLENDVBrm | |
| 1345366818U, // VPBLENDVBrr | |
| 1288809261U, // VPBLENDWrmi | |
| 1345366829U, // VPBLENDWrri | |
| 1288809271U, // VPCLMULQDQrm | |
| 1345366839U, // VPCLMULQDQrr | |
| 1009822531U, // VPCMPEQBrm | |
| 204516163U, // VPCMPEQBrr | |
| 1009822541U, // VPCMPEQDrm | |
| 204516173U, // VPCMPEQDrr | |
| 1009822551U, // VPCMPEQQrm | |
| 204516183U, // VPCMPEQQrr | |
| 1009822561U, // VPCMPEQWrm | |
| 204516193U, // VPCMPEQWrr | |
| 1219505003U, // VPCMPESTRIArm | |
| 204516203U, // VPCMPESTRIArr | |
| 1219505003U, // VPCMPESTRICrm | |
| 204516203U, // VPCMPESTRICrr | |
| 1219505003U, // VPCMPESTRIOrm | |
| 204516203U, // VPCMPESTRIOrr | |
| 1219505003U, // VPCMPESTRISrm | |
| 204516203U, // VPCMPESTRISrr | |
| 1219505003U, // VPCMPESTRIZrm | |
| 204516203U, // VPCMPESTRIZrr | |
| 1219505003U, // VPCMPESTRIrm | |
| 204516203U, // VPCMPESTRIrr | |
| 0U, // VPCMPESTRM128MEM | |
| 0U, // VPCMPESTRM128REG | |
| 1219505015U, // VPCMPESTRM128rm | |
| 204516215U, // VPCMPESTRM128rr | |
| 1009822595U, // VPCMPGTBrm | |
| 204516227U, // VPCMPGTBrr | |
| 1009822605U, // VPCMPGTDrm | |
| 204516237U, // VPCMPGTDrr | |
| 1009822615U, // VPCMPGTQrm | |
| 204516247U, // VPCMPGTQrr | |
| 1009822625U, // VPCMPGTWrm | |
| 204516257U, // VPCMPGTWrr | |
| 1219505067U, // VPCMPISTRIArm | |
| 204516267U, // VPCMPISTRIArr | |
| 1219505067U, // VPCMPISTRICrm | |
| 204516267U, // VPCMPISTRICrr | |
| 1219505067U, // VPCMPISTRIOrm | |
| 204516267U, // VPCMPISTRIOrr | |
| 1219505067U, // VPCMPISTRISrm | |
| 204516267U, // VPCMPISTRISrr | |
| 1219505067U, // VPCMPISTRIZrm | |
| 204516267U, // VPCMPISTRIZrr | |
| 1219505067U, // VPCMPISTRIrm | |
| 204516267U, // VPCMPISTRIrr | |
| 0U, // VPCMPISTRM128MEM | |
| 0U, // VPCMPISTRM128REG | |
| 1219505079U, // VPCMPISTRM128rm | |
| 204516279U, // VPCMPISTRM128rr | |
| 1318071235U, // VPERM2F128rm | |
| 1345366979U, // VPERM2F128rr | |
| 1252010959U, // VPERMILPDYmi | |
| 204516303U, // VPERMILPDYri | |
| 2684365775U, // VPERMILPDYrm | |
| 204516303U, // VPERMILPDYrr | |
| 1245719503U, // VPERMILPDmi | |
| 204516303U, // VPERMILPDri | |
| 1009822671U, // VPERMILPDrm | |
| 204516303U, // VPERMILPDrr | |
| 1252010970U, // VPERMILPSYmi | |
| 204516314U, // VPERMILPSYri | |
| 2684365786U, // VPERMILPSYrm | |
| 204516314U, // VPERMILPSYrr | |
| 1245719514U, // VPERMILPSmi | |
| 204516314U, // VPERMILPSri | |
| 1009822682U, // VPERMILPSrm | |
| 204516314U, // VPERMILPSrr | |
| 1231399909U, // VPEXTRBmr | |
| 204516325U, // VPEXTRBrr | |
| 204516325U, // VPEXTRBrr64 | |
| 1231432686U, // VPEXTRDmr | |
| 204516334U, // VPEXTRDrr | |
| 1231465463U, // VPEXTRQmr | |
| 204516343U, // VPEXTRQrr | |
| 1231498240U, // VPEXTRWmr | |
| 204516352U, // VPEXTRWri | |
| 1009822729U, // VPHADDDrm128 | |
| 204516361U, // VPHADDDrr128 | |
| 1009822738U, // VPHADDSWrm128 | |
| 204516370U, // VPHADDSWrr128 | |
| 1009822748U, // VPHADDWrm128 | |
| 204516380U, // VPHADDWrr128 | |
| 1073753125U, // VPHMINPOSUWrm128 | |
| 1145056293U, // VPHMINPOSUWrr128 | |
| 1009822770U, // VPHSUBDrm128 | |
| 204516402U, // VPHSUBDrr128 | |
| 1009822779U, // VPHSUBSWrm128 | |
| 204516411U, // VPHSUBSWrr128 | |
| 1009822789U, // VPHSUBWrm128 | |
| 204516421U, // VPHSUBWrr128 | |
| 1306569806U, // VPINSRBrm | |
| 1345367118U, // VPINSRBrr | |
| 1304472663U, // VPINSRDrm | |
| 1345367127U, // VPINSRDrr | |
| 1305521248U, // VPINSRQrm | |
| 1345367136U, // VPINSRQrr | |
| 1303424105U, // VPINSRWrmi | |
| 1345367145U, // VPINSRWrr64i | |
| 1345367145U, // VPINSRWrri | |
| 1009822834U, // VPMADDUBSWrm128 | |
| 204516466U, // VPMADDUBSWrr128 | |
| 1009822846U, // VPMADDWDrm | |
| 204516478U, // VPMADDWDrr | |
| 1009822856U, // VPMAXSBrm | |
| 204516488U, // VPMAXSBrr | |
| 1009822865U, // VPMAXSDrm | |
| 204516497U, // VPMAXSDrr | |
| 1009822874U, // VPMAXSWrm | |
| 204516506U, // VPMAXSWrr | |
| 1009822883U, // VPMAXUBrm | |
| 204516515U, // VPMAXUBrr | |
| 1009822892U, // VPMAXUDrm | |
| 204516524U, // VPMAXUDrr | |
| 1009822901U, // VPMAXUWrm | |
| 204516533U, // VPMAXUWrr | |
| 1009822910U, // VPMINSBrm | |
| 204516542U, // VPMINSBrr | |
| 1009822919U, // VPMINSDrm | |
| 204516551U, // VPMINSDrr | |
| 1009822928U, // VPMINSWrm | |
| 204516560U, // VPMINSWrr | |
| 1009822937U, // VPMINUBrm | |
| 204516569U, // VPMINUBrr | |
| 1009822946U, // VPMINUDrm | |
| 204516578U, // VPMINUDrr | |
| 1009822955U, // VPMINUWrm | |
| 204516587U, // VPMINUWrr | |
| 1145056500U, // VPMOVMSKBr64r | |
| 1145056500U, // VPMOVMSKBrr | |
| 1476406527U, // VPMOVSXBDrm | |
| 1145056511U, // VPMOVSXBDrr | |
| 1409297674U, // VPMOVSXBQrm | |
| 1145056522U, // VPMOVSXBQrr | |
| 1543515413U, // VPMOVSXBWrm | |
| 1145056533U, // VPMOVSXBWrr | |
| 1543515424U, // VPMOVSXDQrm | |
| 1145056544U, // VPMOVSXDQrr | |
| 1543515435U, // VPMOVSXWDrm | |
| 1145056555U, // VPMOVSXWDrr | |
| 1476406582U, // VPMOVSXWQrm | |
| 1145056566U, // VPMOVSXWQrr | |
| 1476406593U, // VPMOVZXBDrm | |
| 1145056577U, // VPMOVZXBDrr | |
| 1409297740U, // VPMOVZXBQrm | |
| 1145056588U, // VPMOVZXBQrr | |
| 1543515479U, // VPMOVZXBWrm | |
| 1145056599U, // VPMOVZXBWrr | |
| 1543515490U, // VPMOVZXDQrm | |
| 1145056610U, // VPMOVZXDQrr | |
| 1543515501U, // VPMOVZXWDrm | |
| 1145056621U, // VPMOVZXWDrr | |
| 1476406648U, // VPMOVZXWQrm | |
| 1145056632U, // VPMOVZXWQrr | |
| 1009823107U, // VPMULDQrm | |
| 204516739U, // VPMULDQrr | |
| 1009823116U, // VPMULHRSWrm128 | |
| 204516748U, // VPMULHRSWrr128 | |
| 1009823127U, // VPMULHUWrm | |
| 204516759U, // VPMULHUWrr | |
| 1009823137U, // VPMULHWrm | |
| 204516769U, // VPMULHWrr | |
| 1009823146U, // VPMULLDrm | |
| 204516778U, // VPMULLDrr | |
| 1009823155U, // VPMULLWrm | |
| 204516787U, // VPMULLWrr | |
| 1009823164U, // VPMULUDQrm | |
| 204516796U, // VPMULUDQrr | |
| 1009823174U, // VPORrm | |
| 204516806U, // VPORrr | |
| 1009823180U, // VPSADBWrm | |
| 204516812U, // VPSADBWrr | |
| 1009823189U, // VPSHUFBrm128 | |
| 204516821U, // VPSHUFBrr128 | |
| 1219505630U, // VPSHUFDmi | |
| 204516830U, // VPSHUFDri | |
| 1219505639U, // VPSHUFHWmi | |
| 204516839U, // VPSHUFHWri | |
| 1219505649U, // VPSHUFLWmi | |
| 204516849U, // VPSHUFLWri | |
| 1009823227U, // VPSIGNBrm128 | |
| 204516859U, // VPSIGNBrr128 | |
| 1009823236U, // VPSIGNDrm128 | |
| 204516868U, // VPSIGNDrr128 | |
| 1009823245U, // VPSIGNWrm128 | |
| 204516877U, // VPSIGNWrr128 | |
| 204516886U, // VPSLLDQri | |
| 204516895U, // VPSLLDri | |
| 1009823263U, // VPSLLDrm | |
| 204516895U, // VPSLLDrr | |
| 204516903U, // VPSLLQri | |
| 1009823271U, // VPSLLQrm | |
| 204516903U, // VPSLLQrr | |
| 204516911U, // VPSLLWri | |
| 1009823279U, // VPSLLWrm | |
| 204516911U, // VPSLLWrr | |
| 204516919U, // VPSRADri | |
| 1009823287U, // VPSRADrm | |
| 204516919U, // VPSRADrr | |
| 204516927U, // VPSRAWri | |
| 1009823295U, // VPSRAWrm | |
| 204516927U, // VPSRAWrr | |
| 204516935U, // VPSRLDQri | |
| 204516944U, // VPSRLDri | |
| 1009823312U, // VPSRLDrm | |
| 204516944U, // VPSRLDrr | |
| 204516952U, // VPSRLQri | |
| 1009823320U, // VPSRLQrm | |
| 204516952U, // VPSRLQrr | |
| 204516960U, // VPSRLWri | |
| 1009823328U, // VPSRLWrm | |
| 204516960U, // VPSRLWrr | |
| 1009823336U, // VPSUBBrm | |
| 204516968U, // VPSUBBrr | |
| 1009823344U, // VPSUBDrm | |
| 204516976U, // VPSUBDrr | |
| 1009823352U, // VPSUBQrm | |
| 204516984U, // VPSUBQrr | |
| 1009823360U, // VPSUBSBrm | |
| 204516992U, // VPSUBSBrr | |
| 1009823369U, // VPSUBSWrm | |
| 204517001U, // VPSUBSWrr | |
| 1009823378U, // VPSUBUSBrm | |
| 204517010U, // VPSUBUSBrr | |
| 1009823388U, // VPSUBUSWrm | |
| 204517020U, // VPSUBUSWrr | |
| 1009823398U, // VPSUBWrm | |
| 204517030U, // VPSUBWrr | |
| 2550148782U, // VPTESTYrm | |
| 1145056942U, // VPTESTYrr | |
| 2080386734U, // VPTESTrm | |
| 1145056942U, // VPTESTrr | |
| 1009823414U, // VPUNPCKHBWrm | |
| 204517046U, // VPUNPCKHBWrr | |
| 1009823426U, // VPUNPCKHDQrm | |
| 204517058U, // VPUNPCKHDQrr | |
| 1009823438U, // VPUNPCKHQDQrm | |
| 204517070U, // VPUNPCKHQDQrr | |
| 1009823451U, // VPUNPCKHWDrm | |
| 204517083U, // VPUNPCKHWDrr | |
| 1009823463U, // VPUNPCKLBWrm | |
| 204517095U, // VPUNPCKLBWrr | |
| 1009823475U, // VPUNPCKLDQrm | |
| 204517107U, // VPUNPCKLDQrr | |
| 1009823487U, // VPUNPCKLQDQrm | |
| 204517119U, // VPUNPCKLQDQrr | |
| 1009823500U, // VPUNPCKLWDrm | |
| 204517132U, // VPUNPCKLWDrr | |
| 1009823512U, // VPXORrm | |
| 204517144U, // VPXORrr | |
| 2617257759U, // VRCPPSYm | |
| 2617257759U, // VRCPPSYm_Int | |
| 1145057055U, // VRCPPSYr | |
| 1145057055U, // VRCPPSYr_Int | |
| 2080386847U, // VRCPPSm | |
| 2080386847U, // VRCPPSm_Int | |
| 1145057055U, // VRCPPSr | |
| 1145057055U, // VRCPPSr_Int | |
| 674279207U, // VRCPSSm | |
| 1253060391U, // VRCPSSm_Int | |
| 204517159U, // VRCPSSr | |
| 1245720367U, // VROUNDPDm | |
| 1245720367U, // VROUNDPDm_AVX | |
| 204517167U, // VROUNDPDr | |
| 204517167U, // VROUNDPDr_AVX | |
| 1245720377U, // VROUNDPSm | |
| 1245720377U, // VROUNDPSm_AVX | |
| 204517177U, // VROUNDPSr | |
| 204517177U, // VROUNDPSr_AVX | |
| 1295101763U, // VROUNDSDm | |
| 1295101763U, // VROUNDSDm_AVX | |
| 1345367875U, // VROUNDSDr | |
| 1345367875U, // VROUNDSDr_AVX | |
| 1297198925U, // VROUNDSSm | |
| 1297198925U, // VROUNDSSm_AVX | |
| 1345367885U, // VROUNDSSr | |
| 1345367885U, // VROUNDSSr_AVX | |
| 1252011823U, // VROUNDYPDm | |
| 1252011823U, // VROUNDYPDm_AVX | |
| 204517167U, // VROUNDYPDr | |
| 204517167U, // VROUNDYPDr_AVX | |
| 1252011833U, // VROUNDYPSm | |
| 1252011833U, // VROUNDYPSm_AVX | |
| 204517177U, // VROUNDYPSr | |
| 204517177U, // VROUNDYPSr_AVX | |
| 2617257815U, // VRSQRTPSYm | |
| 2617257815U, // VRSQRTPSYm_Int | |
| 1145057111U, // VRSQRTPSYr | |
| 1145057111U, // VRSQRTPSYr_Int | |
| 2080386903U, // VRSQRTPSm | |
| 2080386903U, // VRSQRTPSm_Int | |
| 1145057111U, // VRSQRTPSr | |
| 1145057111U, // VRSQRTPSr_Int | |
| 674279265U, // VRSQRTSSm | |
| 1253060449U, // VRSQRTSSm_Int | |
| 204517217U, // VRSQRTSSr | |
| 1291956075U, // VSHUFPDYrmi | |
| 1345367915U, // VSHUFPDYrri | |
| 1291956075U, // VSHUFPDrmi | |
| 1345367915U, // VSHUFPDrri | |
| 1291956084U, // VSHUFPSYrmi | |
| 1345367924U, // VSHUFPSYrri | |
| 1291956084U, // VSHUFPSrmi | |
| 1345367924U, // VSHUFPSrri | |
| 2617257853U, // VSQRTPDYm | |
| 2617257853U, // VSQRTPDYm_Int | |
| 1145057149U, // VSQRTPDYr | |
| 1145057149U, // VSQRTPDYr_Int | |
| 2080386941U, // VSQRTPDm | |
| 2080386941U, // VSQRTPDm_Int | |
| 1145057149U, // VSQRTPDr | |
| 1145057149U, // VSQRTPDr_Int | |
| 2617257862U, // VSQRTPSYm | |
| 2617257862U, // VSQRTPSYm_Int | |
| 1145057158U, // VSQRTPSYr | |
| 1145057158U, // VSQRTPSYr_Int | |
| 2080386950U, // VSQRTPSm | |
| 2080386950U, // VSQRTPSm_Int | |
| 1145057158U, // VSQRTPSr | |
| 1145057158U, // VSQRTPSr_Int | |
| 607170447U, // VSQRTSDm | |
| 607170447U, // VSQRTSDm_Int | |
| 204517263U, // VSQRTSDr | |
| 674279320U, // VSQRTSSm | |
| 1253060504U, // VSQRTSSm_Int | |
| 204517272U, // VSQRTSSr | |
| 939536289U, // VSTMXCSR | |
| 2483040171U, // VSUBPDYrm | |
| 204517291U, // VSUBPDYrr | |
| 540061611U, // VSUBPDrm | |
| 204517291U, // VSUBPDrr | |
| 2483040179U, // VSUBPSYrm | |
| 204517299U, // VSUBPSYrr | |
| 540061619U, // VSUBPSrm | |
| 204517299U, // VSUBPSrr | |
| 607170491U, // VSUBSDrm | |
| 607170491U, // VSUBSDrm_Int | |
| 204517307U, // VSUBSDrr | |
| 204517307U, // VSUBSDrr_Int | |
| 674279363U, // VSUBSSrm | |
| 674279363U, // VSUBSSrm_Int | |
| 204517315U, // VSUBSSrr | |
| 204517315U, // VSUBSSrr_Int | |
| 2617257931U, // VTESTPDYrm | |
| 1145057227U, // VTESTPDYrr | |
| 2080387019U, // VTESTPDrm | |
| 1145057227U, // VTESTPDrr | |
| 2617257940U, // VTESTPSYrm | |
| 1145057236U, // VTESTPSYrr | |
| 2080387028U, // VTESTPSrm | |
| 1145057236U, // VTESTPSrr | |
| 2147487543U, // VUCOMISDrm | |
| 1145048887U, // VUCOMISDrr | |
| 2214596417U, // VUCOMISSrm | |
| 1145048897U, // VUCOMISSrr | |
| 2483040221U, // VUNPCKHPDYrm | |
| 204517341U, // VUNPCKHPDYrr | |
| 540061661U, // VUNPCKHPDrm | |
| 204517341U, // VUNPCKHPDrr | |
| 2483040232U, // VUNPCKHPSYrm | |
| 204517352U, // VUNPCKHPSYrr | |
| 540061672U, // VUNPCKHPSrm | |
| 204517352U, // VUNPCKHPSrr | |
| 2483040243U, // VUNPCKLPDYrm | |
| 204517363U, // VUNPCKLPDYrr | |
| 540061683U, // VUNPCKLPDrm | |
| 204517363U, // VUNPCKLPDrr | |
| 2483040254U, // VUNPCKLPSYrm | |
| 204517374U, // VUNPCKLPSYrr | |
| 540061694U, // VUNPCKLPSrm | |
| 204517374U, // VUNPCKLPSrr | |
| 2483038273U, // VXORPDYrm | |
| 204515393U, // VXORPDYrr | |
| 540059713U, // VXORPDrm | |
| 204515393U, // VXORPDrr | |
| 2483038281U, // VXORPSYrm | |
| 204515401U, // VXORPSYrr | |
| 540059721U, // VXORPSrm | |
| 204515401U, // VXORPSrr | |
| 12297U, // VZEROALL | |
| 12306U, // VZEROUPPER | |
| 0U, // V_SET0 | |
| 0U, // V_SETALLONES | |
| 1677722845U, // W64ALLOCA | |
| 12317U, // WAIT | |
| 12322U, // WBINVD | |
| 1610613973U, // WINCALL64m | |
| 1677722845U, // WINCALL64pcrel32 | |
| 67110101U, // WINCALL64r | |
| 12329U, // WIN_ALLOCA | |
| 67121220U, // WRFSBASE | |
| 67121231U, // WRFSBASE64 | |
| 67121242U, // WRGSBASE | |
| 67121253U, // WRGSBASE64 | |
| 12400U, // WRMSR | |
| 136327286U, // XADD16rm | |
| 1145057398U, // XADD16rr | |
| 140521597U, // XADD32rm | |
| 1145057405U, // XADD32rr | |
| 142618756U, // XADD64rm | |
| 1145057412U, // XADD64rr | |
| 144715915U, // XADD8rm | |
| 1145057419U, // XADD8rr | |
| 68169874U, // XCHG16ar | |
| 1169174674U, // XCHG16rm | |
| 1187000466U, // XCHG16rr | |
| 72364185U, // XCHG32ar | |
| 72364185U, // XCHG32ar64 | |
| 1170223257U, // XCHG32rm | |
| 1187000473U, // XCHG32rr | |
| 74461344U, // XCHG64ar | |
| 1171271840U, // XCHG64rm | |
| 1187000480U, // XCHG64rr | |
| 1172320423U, // XCHG8rm | |
| 1187000487U, // XCHG8rr | |
| 67121326U, // XCH_F | |
| 12468U, // XCRYPTCBC | |
| 12478U, // XCRYPTCFB | |
| 12488U, // XCRYPTCTR | |
| 12498U, // XCRYPTECB | |
| 12508U, // XCRYPTOFB | |
| 12518U, // XGETBV | |
| 12525U, // XLAT | |
| 68169971U, // XOR16i16 | |
| 136327411U, // XOR16mi | |
| 136327411U, // XOR16mi8 | |
| 136327411U, // XOR16mr | |
| 204484851U, // XOR16ri | |
| 204484851U, // XOR16ri8 | |
| 271593715U, // XOR16rm | |
| 204484851U, // XOR16rr | |
| 205533427U, // XOR16rr_REV | |
| 72364281U, // XOR32i32 | |
| 140521721U, // XOR32mi | |
| 140521721U, // XOR32mi8 | |
| 140521721U, // XOR32mr | |
| 204484857U, // XOR32ri | |
| 204484857U, // XOR32ri8 | |
| 338702585U, // XOR32rm | |
| 204484857U, // XOR32rr | |
| 205533433U, // XOR32rr_REV | |
| 74461439U, // XOR64i32 | |
| 142618879U, // XOR64mi32 | |
| 142618879U, // XOR64mi8 | |
| 142618879U, // XOR64mr | |
| 204484863U, // XOR64ri32 | |
| 204484863U, // XOR64ri8 | |
| 405811455U, // XOR64rm | |
| 204484863U, // XOR64rr | |
| 205533439U, // XOR64rr_REV | |
| 76558597U, // XOR8i8 | |
| 144716037U, // XOR8mi | |
| 144716037U, // XOR8mr | |
| 204484869U, // XOR8ri | |
| 469774597U, // XOR8rm | |
| 204484869U, // XOR8rr | |
| 205533445U, // XOR8rr_REV | |
| 541068525U, // XORPDrm | |
| 205524205U, // XORPDrr | |
| 541068532U, // XORPSrm | |
| 205524212U, // XORPSrr | |
| 2281713931U, // XRSTOR | |
| 2281713939U, // XRSTOR64 | |
| 2281713948U, // XSAVE | |
| 2281713955U, // XSAVE64 | |
| 2281713963U, // XSAVEOPT | |
| 2281713973U, // XSAVEOPT64 | |
| 12608U, // XSETBV | |
| 12615U, // XSHA1 | |
| 12621U, // XSHA256 | |
| 12629U, // XSTORE | |
| 0U | |
| }; | |
| const char *AsmStrs = | |
| "DBG_VALUE\000aaa\000aad\t\000aam\t\000aas\000fabs\000#ACQUIRE_MOV PSEUD" | |
| "O!\000adcw\t\000adcl\t\000adcq\t\000adcb\t\000addw\t\000addl\t\000addq\t" | |
| "\000addb\t\000addpd\t\000addps\t\000addsd\t\000addss\t\000addsubpd\t\000" | |
| "addsubps\t\000fadds\t\000faddl\t\000fiadds\t\000fiaddl\t\000faddp\t\000" | |
| "fadd\t\000fadd\t%st(0), \000#ADJCALLSTACKDOWN\000#ADJCALLSTACKUP\000aes" | |
| "declast\t\000aesdec\t\000aesenclast\t\000aesenc\t\000aesimc\t\000aeskey" | |
| "genassist\t\000andw\t\000andl\t\000andq\t\000andb\t\000andnl\t\000andnq" | |
| "\t\000andnpd\t\000andnps\t\000andpd\t\000andps\t\000arpl\t\000#ATOMADD6" | |
| "432 PSEUDO!\000#ATOMAND16 PSEUDO!\000#ATOMAND32 PSEUDO!\000#ATOMAND64 P" | |
| "SEUDO!\000#ATOMAND6432 PSEUDO!\000#ATOMAND8 PSEUDO!\000#ATOMMAX16 PSEUD" | |
| "O!\000#ATOMMAX32 PSEUDO!\000#ATOMMAX64 PSEUDO!\000#ATOMMIN16 PSEUDO!\000" | |
| "#ATOMMIN32 PSEUDO!\000#ATOMMIN64 PSEUDO!\000#ATOMNAND16 PSEUDO!\000#ATO" | |
| "MNAND32 PSEUDO!\000#ATOMNAND64 PSEUDO!\000#ATOMNAND6432 PSEUDO!\000#ATO" | |
| "MNAND8 PSEUDO!\000#ATOMOR16 PSEUDO!\000#ATOMOR32 PSEUDO!\000#ATOMOR64 P" | |
| "SEUDO!\000#ATOMOR6432 PSEUDO!\000#ATOMOR8 PSEUDO!\000#ATOMSUB6432 PSEUD" | |
| "O!\000#ATOMSWAP6432 PSEUDO!\000#ATOMUMAX16 PSEUDO!\000#ATOMUMAX32 PSEUD" | |
| "O!\000#ATOMUMAX64 PSEUDO!\000#ATOMUMIN16 PSEUDO!\000#ATOMUMIN32 PSEUDO!" | |
| "\000#ATOMUMIN64 PSEUDO!\000#ATOMXOR16 PSEUDO!\000#ATOMXOR32 PSEUDO!\000" | |
| "#ATOMXOR64 PSEUDO!\000#ATOMXOR6432 PSEUDO!\000#ATOMXOR8 PSEUDO!\000blen" | |
| "dpd\t\000blendps\t\000blendvpd\t\000blendvps\t\000bound\t\000bsfw\t\000" | |
| "bsfl\t\000bsfq\t\000bsrw\t\000bsrl\t\000bsrq\t\000bswapl\t\000bswapq\t\000" | |
| "btw\t\000btl\t\000btq\t\000btcw\t\000btcl\t\000btcq\t\000btrw\t\000btrl" | |
| "\t\000btrq\t\000btsw\t\000btsl\t\000btsq\t\000calll\t*\000callq\t*\000c" | |
| "allq\t\000callw\t\000calll\t\000cbtw\000cltd\000cltq\000fchs\000clc\000" | |
| "cld\000clflush\t\000cli\000clts\000cmc\000cmovaw\t\000cmoval\t\000cmova" | |
| "q\t\000cmovaew\t\000cmovael\t\000cmovaeq\t\000cmovbw\t\000cmovbl\t\000c" | |
| "movbq\t\000cmovbew\t\000cmovbel\t\000cmovbeq\t\000fcmovbe\t\000fcmovb\t" | |
| "\000cmovew\t\000cmovel\t\000cmoveq\t\000fcmove\t\000cmovgw\t\000cmovgl\t" | |
| "\000cmovgq\t\000cmovgew\t\000cmovgel\t\000cmovgeq\t\000cmovlw\t\000cmov" | |
| "ll\t\000cmovlq\t\000cmovlew\t\000cmovlel\t\000cmovleq\t\000fcmovnbe\t\000" | |
| "fcmovnb\t\000cmovnew\t\000cmovnel\t\000cmovneq\t\000fcmovne\t\000cmovno" | |
| "w\t\000cmovnol\t\000cmovnoq\t\000cmovnpw\t\000cmovnpl\t\000cmovnpq\t\000" | |
| "fcmovnu\t\000cmovnsw\t\000cmovnsl\t\000cmovnsq\t\000cmovow\t\000cmovol\t" | |
| "\000cmovoq\t\000cmovpw\t\000cmovpl\t\000cmovpq\t\000fcmovu\t \000cmovsw" | |
| "\t\000cmovsl\t\000cmovsq\t\000#CMOV_FR32 PSEUDO!\000#CMOV_FR64 PSEUDO!\000" | |
| "#CMOV_GR16* PSEUDO!\000#CMOV_GR32* PSEUDO!\000#CMOV_GR8 PSEUDO!\000#CMO" | |
| "V_RFP32 PSEUDO!\000#CMOV_RFP64 PSEUDO!\000#CMOV_RFP80 PSEUDO!\000#CMOV_" | |
| "V2F64 PSEUDO!\000#CMOV_V2I64 PSEUDO!\000#CMOV_V4F32 PSEUDO!\000#CMOV_V4" | |
| "F64 PSEUDO!\000#CMOV_V4I64 PSEUDO!\000#CMOV_V8F32 PSEUDO!\000cmpw\t\000" | |
| "cmpl\t\000cmpq\t\000cmpb\t\000cmp\000cmppd\t\000cmpps\t\000cmpsw\000cmp" | |
| "sl\000cmpsq\000cmpsb\000cmpsd\t\000cmpss\t\000cmpxchg16b\t\000cmpxchgw\t" | |
| "\000cmpxchgl\t\000cmpxchgq\t\000cmpxchg8b\t\000cmpxchgb\t\000comisd\t\000" | |
| "comiss\t\000fcomp\t\000fcompi\t\000fcomi\t\000fcom\t\000fcos\000cpuid\000" | |
| "cqto\000crc32w \t\000crc32l \t\000crc32b \t\000crc32q \t\000cs\000cvtdq" | |
| "2pd\t\000cvtdq2ps\t\000cvtpd2dq\t\000cvtpd2ps\t\000cvtps2dq\t\000cvtps2" | |
| "pd\t\000cvtsd2siq\t\000cvtsd2sil\t\000cvtsd2ss\t\000cvtsi2sdq\t\000cvts" | |
| "i2sd\t\000cvtsi2ssq\t\000cvtsi2ss\t\000cvtss2sd\t\000cvtss2siq\t\000cvt" | |
| "ss2sil\t\000cvttpd2dq\t\000cvttps2dq\t\000cvttsd2siq\t\000cvttsd2si\t\000" | |
| "cvttss2siq\t\000cvttss2si\t\000cwtd\000cwtl\000daa\000das\000data16\000" | |
| "decw\t\000decl\t\000decq\t\000decb\t\000divw\t\000divl\t\000divq\t\000d" | |
| "ivb\t\000divpd\t\000divps\t\000fdivrs\t\000fdivrl\t\000fidivrs\t\000fid" | |
| "ivrl\t\000fdivp\t\000fdivr\t\000fdiv\t%st(0), \000divsd\t\000divss\t\000" | |
| "fdivs\t\000fdivl\t\000fidivs\t\000fidivl\t\000fdivrp\t\000fdiv\t\000fdi" | |
| "vr\t%st(0), \000dppd\t\000dpps\t\000ds\000ret\t#eh_return, addr: \000en" | |
| "ter\t\000es\000extractps\t\000f2xm1\000lcallw\t\000lcallw\t*\000lcalll\t" | |
| "\000lcalll\t*\000lcallq\t*\000ljmpw\t\000ljmpw\t*\000ljmpl\t\000ljmpl\t" | |
| "*\000ljmpq\t*\000fbld\t\000fbstp\t\000fcoms\t\000fcoml\t\000fcomps\t\000" | |
| "fcompl\t\000fcompp\000fdecstp\000femms\000ffree\t\000ficoms\t\000ficoml" | |
| "\t\000ficomps\t\000ficompl\t\000fincstp\000fldcw\t\000fldenv\t\000fldl2" | |
| "e\000fldl2t\000fldlg2\000fldln2\000fldpi\000fnclex\000fninit\000fnop\000" | |
| "fnstcw\t\000fnstsw %ax\000fnstsw\t\000fpatan\000fprem\000fprem1\000fpta" | |
| "n\000frndint\000frstor\t\000fnsave\t\000fscale\000fsincos\000fnstenv\t\000" | |
| "fs\000fxam\000fxrstor\t\000fxrstorq\t\000fxsave\t\000fxsaveq\t\000fxtra" | |
| "ct\000fyl2x\000fyl2xp1\000movapd\t\000movaps\t\000orpd\t\000orps\t\000v" | |
| "movapd\t\000vmovaps\t\000xorpd\t\000xorps\t\000gs\000haddpd\t\000haddps" | |
| "\t\000hlt\000hsubpd\t\000hsubps\t\000idivw\t\000idivl\t\000idivq\t\000i" | |
| "divb\t\000filds\t\000fildl\t\000fildll\t\000imulw\t\000imull\t\000imulq" | |
| "\t\000imulb\t\000insw\000inw\t\000inw\t%dx, %ax\000insl\000inl\t\000inl" | |
| "\t%dx, %eax\000insb\000inb\t\000inb\t%dx, %al\000incw\t\000incl\t\000in" | |
| "cq\t\000incb\t\000insertps\t\000int\t\000int3\000into\000invd\000invept" | |
| " \000invlpg\t\000invvpid \000iretw\000iretl\000iretq\000fisttps\t\000fi" | |
| "sttpl\t\000fisttpll\t\000fists\t\000fistl\t\000fistps\t\000fistpl\t\000" | |
| "fistpll\t\000#MEMBARRIER\000lock\n\torq\t\000ucomisd\t\000ucomiss\t\000" | |
| "vcmp\000vcomisd\t\000vcomiss\t\000vcvtdq2pd\t\000vcvtdq2ps\t\000vcvtpd2" | |
| "dq\t\000vcvtpd2ps\t\000vcvtps2dq\t\000vcvtps2pd\t\000vcvtsd2si\t\000vcv" | |
| "tsd2ss\t\000vcvtsi2sd\t\000vcvtsi2ss\t\000vcvtss2sd\t\000vcvttps2dq\t\000" | |
| "vcvttsd2si\t\000vcvttss2si\t\000vucomisd\t\000vucomiss\t\000jae\t\000ja" | |
| "\t\000jbe\t\000jb\t\000jcxz\t\000jecxz\t\000je\t\000jge\t\000jg\t\000jl" | |
| "e\t\000jl\t\000jmpl\t*\000jmpq\t*\000jmpq\t\000jmp\t\000jne\t\000jno\t\000" | |
| "jnp\t\000jns\t\000jo\t\000jp\t\000jrcxz\t\000js\t\000lahf\000larw\t\000" | |
| "larl\t\000larq\t\000lock\n\tcmpxchgw\t\000lock\n\tcmpxchg16b\t\000lock\n" | |
| "\tcmpxchgl\t\000lock\n\tcmpxchgq\t\000lock\n\tcmpxchgb\t\000lock\n\tcmp" | |
| "xchg8b\t\000lddqu\t\000ldmxcsr\t\000ldsw\t\000ldsl\t\000fldz\000fld1\000" | |
| "flds\t\000fldl\t\000fldt\t\000fld\t\000leaw\t\000leal\t\000leaq\t\000le" | |
| "ave\000lesw\t\000lesl\t\000lfence\000lfsw\t\000lfsl\t\000lfsq\t\000lgdt" | |
| "w\t\000lgdt\t\000lgsw\t\000lgsl\t\000lgsq\t\000lidtw\t\000lidt\t\000lld" | |
| "tw\t\000lmsww\t\000lock\n\taddw\t\000lock\n\taddl\t\000lock\n\taddq\t\000" | |
| "lock\n\taddb\t\000lock\n\tandw\t\000lock\n\tandl\t\000lock\n\tandq\t\000" | |
| "lock\n\tandb\t\000lock\n\tdecw\t\000lock\n\tdecl\t\000lock\n\tdecq\t\000" | |
| "lock\n\tdecb\t\000lock\n\tincw\t\000lock\n\tincl\t\000lock\n\tincq\t\000" | |
| "lock\n\tincb\t\000lock\n\torw\t\000lock\n\torl\t\000lock\n\torb\t\000lo" | |
| "ck\000lock\n\tsubw\t\000lock\n\tsubl\t\000lock\n\tsubq\t\000lock\n\tsub" | |
| "b\t\000lock\n\txorw\t\000lock\n\txorl\t\000lock\n\txorq\t\000lock\n\txo" | |
| "rb\t\000lodsb\000lodsl\000lodsq\000lodsw\000loop\t\000loope\t\000loopne" | |
| "\t\000lret\t\000lretw\t\000lretl\000lretq\000lslw\t\000lsll\t\000lslq\t" | |
| "\000lssw\t\000lssl\t\000lssq\t\000ltrw\t\000lock\n\txaddw\t\000lock\n\t" | |
| "xaddl\t\000lock\n\txaddq\t\000lock\n\txaddb\t\000lzcntw\t\000lzcntl\t\000" | |
| "lzcntq\t\000maskmovdqu\t\000maxpd\t\000maxps\t\000maxsd\t\000maxss\t\000" | |
| "mfence\000minpd\t\000minps\t\000minsd\t\000minss\t\000cvtpd2pi\t\000cvt" | |
| "pi2pd\t\000cvtpi2ps\t\000cvtps2pi\t\000cvttpd2pi\t\000cvttps2pi\t\000em" | |
| "ms\000maskmovq\t\000movd\t\000movdq2q\t\000movntq\t\000movq2dq\t\000mov" | |
| "q\t\000pabsb\t\000pabsd\t\000pabsw\t\000packssdw\t\000packsswb\t\000pac" | |
| "kuswb\t\000paddb\t\000paddd\t\000paddq\t\000paddsb\t\000paddsw\t\000pad" | |
| "dusb\t\000paddusw\t\000paddw\t\000palignr\t\000pandn\t\000pand\t\000pav" | |
| "gb\t\000pavgw\t\000pcmpeqb\t\000pcmpeqd\t\000pcmpeqw\t\000pcmpgtb\t\000" | |
| "pcmpgtd\t\000pcmpgtw\t\000pextrw\t\000phaddsw\t\000phaddw\t\000phaddd\t" | |
| "\000phsubd\t\000phsubsw\t\000phsubw\t\000pinsrw\t\000pmaddubsw\t\000pma" | |
| "ddwd\t\000pmaxsw\t\000pmaxub\t\000pminsw\t\000pminub\t\000pmovmskb\t\000" | |
| "pmulhrsw\t\000pmulhuw\t\000pmulhw\t\000pmullw\t\000pmuludq\t\000por\t\000" | |
| "psadbw\t\000pshufb\t\000pshufw\t\000psignb\t\000psignd\t\000psignw\t\000" | |
| "pslld\t\000psllq\t\000psllw\t\000psrad\t\000psraw\t\000psrld\t\000psrlq" | |
| "\t\000psrlw\t\000psubb\t\000psubd\t\000psubq\t\000psubsb\t\000psubsw\t\000" | |
| "psubusb\t\000psubusw\t\000psubw\t\000punpckhbw\t\000punpckhdq\t\000punp" | |
| "ckhwd\t\000punpcklbw\t\000punpckldq\t\000punpcklwd\t\000pxor\t\000monit" | |
| "or\000montmul\000movw\t%ax, \000movw\t\000movl\t%eax, \000movl\t\000mov" | |
| "absq\t\000movb\t%al, \000movb\t\000movbew\t\000movbel\t\000movbeq\t\000" | |
| "movddup\t\000movdqa\t\000movdqu\t\000movhlps\t\000movhpd\t\000movhps\t\000" | |
| "movlhps\t\000movlpd\t\000movlps\t\000movmskpd\t\000movmskps\t\000movntd" | |
| "qa\t\000movntdq\t\000movntiq\t\000movntil\t\000movntpd\t\000movntps\t\000" | |
| "movsb\000movsl\000movsd\t\000movshdup\t\000movsldup\t\000movsq\000movss" | |
| "\t\000movsw\000movsbw\t\000movswl\t\000movsbl\t\000movswq\t\000movslq\t" | |
| "\000movsbq\t\000movupd\t\000movups\t\000movzbw\t\000movzbl\t\000movzwl\t" | |
| "\000movzwq\t\000movzbq\t\000mpsadbw\t\000mulw\t\000mull\t\000mulq\t\000" | |
| "mulb\t\000mulpd\t\000mulps\t\000mulsd\t\000mulss\t\000fmuls\t\000fmull\t" | |
| "\000fimuls\t\000fimull\t\000fmulp\t\000fmul\t\000fmul\t%st(0), \000mwai" | |
| "t\000negw\t\000negl\t\000negq\t\000negb\t\000nop\000nopl\t\000nopw\t\000" | |
| "notw\t\000notl\t\000notq\t\000notb\t\000orw\t\000orl\t\000orq\t\000orb\t" | |
| "\000outw\t%ax, \000outw\t%ax, %dx\000outl\t%eax, \000outl\t%eax, %dx\000" | |
| "outb\t%al, \000outb\t%al, %dx\000outsb\000outsl\000outsw\000packusdw\t\000" | |
| "pause\000pavgusb\t\000pblendvb\t\000pblendw\t\000pclmulqdq\t\000pcmpeqq" | |
| "\t\000pcmpestri\t\000pcmpestrm\t\000pcmpgtq\t\000pcmpistri\t\000pcmpist" | |
| "rm\t\000pextrb\t\000pextrd\t\000pextrq\t\000pf2id\t\000pf2iw\t\000pfacc" | |
| "\t\000pfadd\t\000pfcmpeq\t\000pfcmpge\t\000pfcmpgt\t\000pfmax\t\000pfmi" | |
| "n\t\000pfmul\t\000pfnacc\t\000pfpnacc\t\000pfrcpit1\t\000pfrcpit2\t\000" | |
| "pfrcp\t\000pfrsqit1\t\000pfrsqrt\t\000pfsubr\t\000pfsub\t\000phminposuw" | |
| "\t\000pi2fd\t\000pi2fw\t\000pinsrb\t\000pinsrd\t\000pinsrq\t\000pmaxsb\t" | |
| "\000pmaxsd\t\000pmaxud\t\000pmaxuw\t\000pminsb\t\000pminsd\t\000pminud\t" | |
| "\000pminuw\t\000pmovsxbd\t\000pmovsxbq\t\000pmovsxbw\t\000pmovsxdq\t\000" | |
| "pmovsxwd\t\000pmovsxwq\t\000pmovzxbd\t\000pmovzxbq\t\000pmovzxbw\t\000p" | |
| "movzxdq\t\000pmovzxwd\t\000pmovzxwq\t\000pmuldq\t\000pmulhrw\t\000pmull" | |
| "d\t\000popw\t\000popl\t\000popq\t\000popal\000popcntw\t\000popcntl\t\000" | |
| "popcntq\t\000popw\t%ds\000popl\t%ds\000popw\t%es\000popl\t%es\000popfw\000" | |
| "popfl\000popfq\000popw\t%fs\000popl\t%fs\000popq\t%fs\000popw\t%gs\000p" | |
| "opl\t%gs\000popq\t%gs\000popw\t%ss\000popl\t%ss\000prefetch \000prefetc" | |
| "hnta\t\000prefetcht0\t\000prefetcht1\t\000prefetcht2\t\000prefetchw \000" | |
| "pshufd\t\000pshufhw\t\000pshuflw\t\000pslldq\t\000psrldq\t\000pswapd\t\000" | |
| "ptest \t\000punpckhqdq\t\000punpcklqdq\t\000pushw\t\000pushl\t\000pushq" | |
| "\t\000pushal\000pushw\t%cs\000pushl\t%cs\000pushw\t%ds\000pushl\t%ds\000" | |
| "pushw\t%es\000pushl\t%es\000pushfw\000pushfl\000pushfq\000pushw\t%fs\000" | |
| "pushl\t%fs\000pushq\t%fs\000pushw\t%gs\000pushl\t%gs\000pushq\t%gs\000p" | |
| "ushw\t%ss\000pushl\t%ss\000rclw\t\000rclw\t%cl, \000rcll\t\000rcll\t%cl" | |
| ", \000rclq\t\000rclq\t%cl, \000rclb\t\000rclb\t%cl, \000rcpps\t\000rcps" | |
| "s\t\000rcrw\t\000rcrw\t%cl, \000rcrl\t\000rcrl\t%cl, \000rcrq\t\000rcrq" | |
| "\t%cl, \000rcrb\t\000rcrb\t%cl, \000rdfsbasel\t\000rdfsbaseq\t\000rdgsb" | |
| "asel\t\000rdgsbaseq\t\000rdmsr\000rdpmc\000rdrandw\t\000rdrandl\t\000rd" | |
| "randq\t\000rdtsc\000rdtscp\000#RELEASE_MOV PSEUDO!\000repne\000rep;movs" | |
| "b\000rep;movsl\000rep;movsq\000rep;movsw\000rep\000rep;stosb\000rep;sto" | |
| "sl\000rep;stosq\000rep;stosw\000ret\000ret\t\000retw\t\000rex64\000rolw" | |
| "\t\000rolw\t%cl, \000roll\t\000roll\t%cl, \000rolq\t\000rolq\t%cl, \000" | |
| "rolb\t\000rolb\t%cl, \000rorw\t\000rorw\t%cl, \000rorl\t\000rorl\t%cl, " | |
| "\000rorq\t\000rorq\t%cl, \000rorb\t\000rorb\t%cl, \000roundpd\t\000roun" | |
| "dps\t\000roundsd\t\000roundss\t\000rsm\000rsqrtps\t\000rsqrtss\t\000sah" | |
| "f\000sarw\t\000sarw\t%cl, \000sarl\t\000sarl\t%cl, \000sarq\t\000sarq\t" | |
| "%cl, \000sarb\t\000sarb\t%cl, \000sbbw\t\000sbbl\t\000sbbq\t\000sbbb\t\000" | |
| "scasw\000scasl\000scasq\000scasb\000# variable sized alloca for segment" | |
| "ed stacks\000setae\t\000seta\t\000setbe\t\000setb\t\000sete\t\000setge\t" | |
| "\000setg\t\000setle\t\000setl\t\000setne\t\000setno\t\000setnp\t\000set" | |
| "ns\t\000seto\t\000setp\t\000sets\t\000sfence\000sgdtw\t\000sgdt\t\000sh" | |
| "lw\t\000shlw\t%cl, \000shll\t\000shll\t%cl, \000shlq\t\000shlq\t%cl, \000" | |
| "shlb\t\000shlb\t%cl, \000shldw\t%cl, \000shldw\t\000shldl\t%cl, \000shl" | |
| "dl\t\000shldq\t%cl, \000shldq\t\000shrw\t\000shrw\t%cl, \000shrl\t\000s" | |
| "hrl\t%cl, \000shrq\t\000shrq\t%cl, \000shrb\t\000shrb\t%cl, \000shrdw\t" | |
| "%cl, \000shrdw\t\000shrdl\t%cl, \000shrdl\t\000shrdq\t%cl, \000shrdq\t\000" | |
| "shufpd\t\000shufps\t\000sidtw\t\000sidt\t\000fsin\000sldtw\t\000sldtl\t" | |
| "\000sldtq\t\000smsww\t\000smswl\t\000smswq\t\000sqrtpd\t\000sqrtps\t\000" | |
| "sqrtsd\t\000sqrtss\t\000fsqrt\000ss\000stc\000std\000sti\000stmxcsr\t\000" | |
| "stosb\000stosl\000stosq\000stosw\000strw\t\000strl\t\000strq\t\000fsts\t" | |
| "\000fstl\t\000fstps\t\000fstpl\t\000fstpt\t\000fstp\t\000fst\t\000subw\t" | |
| "\000subl\t\000subq\t\000subb\t\000subpd\t\000subps\t\000fsubrs\t\000fsu" | |
| "brl\t\000fisubrs\t\000fisubrl\t\000fsubp\t\000fsubr\t\000fsub\t%st(0), " | |
| "\000subsd\t\000subss\t\000fsubs\t\000fsubl\t\000fisubs\t\000fisubl\t\000" | |
| "fsubrp\t\000fsub\t\000fsubr\t%st(0), \000swapgs\000syscall\000sysenter\000" | |
| "sysexit\000sysretl\000sysretq\000testw\t\000testl\t\000testq\t\000testb" | |
| "\t\000# TLSCall_32\000# TLSCall_64\000# TLS_addr32\000# TLS_addr64\000u" | |
| "d2\000ftst\000tzcntw\t\000tzcntl\t\000tzcntq\t\000fucompi\t\000fucomi\t" | |
| "\000fucompp\000fucomp\t\000fucom\t\000ud2b\000unpckhpd\t\000unpckhps\t\000" | |
| "unpcklpd\t\000unpcklps\t\000#VAARG_64 \000vaddpd\t\000vaddps\t\000vadds" | |
| "d\t\000vaddss\t\000vaddsubpd\t\000vaddsubps\t\000vaesdeclast\t\000vaesd" | |
| "ec\t\000vaesenclast\t\000vaesenc\t\000vaesimc\t\000vaeskeygenassist\t\000" | |
| "vandnpd\t\000vandnps\t\000vandpd\t\000vandps\t\000#VASTART_SAVE_XMM_REG" | |
| "S \000vblendpd\t\000vblendps\t\000vblendvpd\t\000vblendvps\t\000vbroadc" | |
| "astf128\t\000vbroadcastsd\t\000vbroadcastss\t\000vcmppd\t\000vcmpps\t\000" | |
| "vcmpsd\t\000vcmpss\t\000vcvtpd2dqx\t\000vcvtpd2dqy\t\000vcvtpd2psx\t\000" | |
| "vcvtpd2psy\t\000vcvtph2ps\t\000vcvtps2ph\t\000vcvtsi2sdq\t\000vcvtsi2sd" | |
| "l\t\000vcvtsi2ssq\t\000vcvtss2si\t\000vcvtss2sil\t\000vcvttpd2dq\t\000v" | |
| "cvttpd2dqx\t\000vcvttpd2dqy\t\000vdivpd\t\000vdivps\t\000vdivsd\t\000vd" | |
| "ivss\t\000vdppd\t\000vdpps\t\000verr\t\000verw\t\000vextractf128\t\000v" | |
| "extractps\t\000vextractps \t\000vfmadd132pd\t\000vfmadd213pd\t\000vfmad" | |
| "d231pd\t\000vfmadd132ps\t\000vfmadd213ps\t\000vfmadd231ps\t\000vfmaddsu" | |
| "b132pd\t\000vfmaddsub213pd\t\000vfmaddsub231pd\t\000vfmaddsub132ps\t\000" | |
| "vfmaddsub213ps\t\000vfmaddsub231ps\t\000vfmsubadd132pd\t\000vfmsubadd21" | |
| "3pd\t\000vfmsubadd231pd\t\000vfmsubadd132ps\t\000vfmsubadd213ps\t\000vf" | |
| "msubadd231ps\t\000vfmsub132pd\t\000vfmsub213pd\t\000vfmsub231pd\t\000vf" | |
| "msub132ps\t\000vfmsub213ps\t\000vfmsub231ps\t\000vfnmadd132pd\t\000vfnm" | |
| "add213pd\t\000vfnmadd231pd\t\000vfnmadd132ps\t\000vfnmadd213ps\t\000vfn" | |
| "madd231ps\t\000vfnmsub132pd\t\000vfnmsub213pd\t\000vfnmsub231pd\t\000vf" | |
| "nmsub132ps\t\000vfnmsub213ps\t\000vfnmsub231ps\t\000vorpd\t\000vorps\t\000" | |
| "vxorpd\t\000vxorps\t\000vhaddpd\t\000vhaddps\t\000vhsubpd\t\000vhsubps\t" | |
| "\000vinsertf128\t\000vinsertps\t\000vlddqu\t\000vldmxcsr\t\000vmaskmovd" | |
| "qu\t\000vmaskmovpd\t\000vmaskmovps\t\000vmaxpd\t\000vmaxps\t\000vmaxsd\t" | |
| "\000vmaxss\t\000vmcall\000vmclear\t\000vminpd\t\000vminps\t\000vminsd\t" | |
| "\000vminss\t\000vmlaunch\000vmovd\t\000vmovq\t\000vmovddup\t\000vmovdqa" | |
| "\t\000vmovdqu\t\000vmovhlps\t\000vmovhpd\t\000vmovhps\t\000vmovlhps\t\000" | |
| "vmovlpd\t\000vmovlps\t\000vmovmskpd\t\000vmovmskps\t\000vmovntdqa\t\000" | |
| "vmovntdq\t\000vmovntpd\t\000vmovntps\t\000vmovsd\t\000vmovshdup\t\000vm" | |
| "ovsldup\t\000vmovss\t\000vmovupd\t\000vmovups\t\000vmpsadbw\t\000vmptrl" | |
| "d\t\000vmptrst\t\000vmreadl\t\000vmreadq\t\000vmresume\000vmulpd\t\000v" | |
| "mulps\t\000vmulsd\t\000vmulss\t\000vmwritel\t\000vmwriteq\t\000vmxoff\000" | |
| "vmxon\t\000vpabsb\t\000vpabsd\t\000vpabsw\t\000vpackssdw\t\000vpacksswb" | |
| "\t\000vpackusdw\t\000vpackuswb\t\000vpaddb\t\000vpaddd\t\000vpaddq\t\000" | |
| "vpaddsb\t\000vpaddsw\t\000vpaddusb\t\000vpaddusw\t\000vpaddw\t\000vpali" | |
| "gnr\t\000vpandn\t\000vpand\t\000vpavgb\t\000vpavgw\t\000vpblendvb\t\000" | |
| "vpblendw\t\000vpclmulqdq\t\000vpcmpeqb\t\000vpcmpeqd\t\000vpcmpeqq\t\000" | |
| "vpcmpeqw\t\000vpcmpestri\t\000vpcmpestrm\t\000vpcmpgtb\t\000vpcmpgtd\t\000" | |
| "vpcmpgtq\t\000vpcmpgtw\t\000vpcmpistri\t\000vpcmpistrm\t\000vperm2f128\t" | |
| "\000vpermilpd\t\000vpermilps\t\000vpextrb\t\000vpextrd\t\000vpextrq\t\000" | |
| "vpextrw\t\000vphaddd\t\000vphaddsw\t\000vphaddw\t\000vphminposuw\t\000v" | |
| "phsubd\t\000vphsubsw\t\000vphsubw\t\000vpinsrb\t\000vpinsrd\t\000vpinsr" | |
| "q\t\000vpinsrw\t\000vpmaddubsw\t\000vpmaddwd\t\000vpmaxsb\t\000vpmaxsd\t" | |
| "\000vpmaxsw\t\000vpmaxub\t\000vpmaxud\t\000vpmaxuw\t\000vpminsb\t\000vp" | |
| "minsd\t\000vpminsw\t\000vpminub\t\000vpminud\t\000vpminuw\t\000vpmovmsk" | |
| "b\t\000vpmovsxbd\t\000vpmovsxbq\t\000vpmovsxbw\t\000vpmovsxdq\t\000vpmo" | |
| "vsxwd\t\000vpmovsxwq\t\000vpmovzxbd\t\000vpmovzxbq\t\000vpmovzxbw\t\000" | |
| "vpmovzxdq\t\000vpmovzxwd\t\000vpmovzxwq\t\000vpmuldq\t\000vpmulhrsw\t\000" | |
| "vpmulhuw\t\000vpmulhw\t\000vpmulld\t\000vpmullw\t\000vpmuludq\t\000vpor" | |
| "\t\000vpsadbw\t\000vpshufb\t\000vpshufd\t\000vpshufhw\t\000vpshuflw\t\000" | |
| "vpsignb\t\000vpsignd\t\000vpsignw\t\000vpslldq\t\000vpslld\t\000vpsllq\t" | |
| "\000vpsllw\t\000vpsrad\t\000vpsraw\t\000vpsrldq\t\000vpsrld\t\000vpsrlq" | |
| "\t\000vpsrlw\t\000vpsubb\t\000vpsubd\t\000vpsubq\t\000vpsubsb\t\000vpsu" | |
| "bsw\t\000vpsubusb\t\000vpsubusw\t\000vpsubw\t\000vptest\t\000vpunpckhbw" | |
| "\t\000vpunpckhdq\t\000vpunpckhqdq\t\000vpunpckhwd\t\000vpunpcklbw\t\000" | |
| "vpunpckldq\t\000vpunpcklqdq\t\000vpunpcklwd\t\000vpxor\t\000vrcpps\t\000" | |
| "vrcpss\t\000vroundpd\t\000vroundps\t\000vroundsd\t\000vroundss\t\000vrs" | |
| "qrtps\t\000vrsqrtss\t\000vshufpd\t\000vshufps\t\000vsqrtpd\t\000vsqrtps" | |
| "\t\000vsqrtsd\t\000vsqrtss\t\000vstmxcsr\t\000vsubpd\t\000vsubps\t\000v" | |
| "subsd\t\000vsubss\t\000vtestpd\t\000vtestps\t\000vunpckhpd\t\000vunpckh" | |
| "ps\t\000vunpcklpd\t\000vunpcklps\t\000vzeroall\000vzeroupper\000wait\000" | |
| "wbinvd\000# dynamic stack allocation\000wrfsbasel\t\000wrfsbaseq\t\000w" | |
| "rgsbasel\t\000wrgsbaseq\t\000wrmsr\000xaddw\t\000xaddl\t\000xaddq\t\000" | |
| "xaddb\t\000xchgw\t\000xchgl\t\000xchgq\t\000xchgb\t\000fxch\t\000xcrypt" | |
| "cbc\000xcryptcfb\000xcryptctr\000xcryptecb\000xcryptofb\000xgetbv\000xl" | |
| "atb\000xorw\t\000xorl\t\000xorq\t\000xorb\t\000xrstor\t\000xrstorq\t\000" | |
| "xsave\t\000xsaveq\t\000xsaveopt\t\000xsaveoptq\t\000xsetbv\000xsha1\000" | |
| "xsha256\000xstore\000"; | |
| O << "\t"; | |
| // Emit the opcode for the instruction. | |
| unsigned Bits = OpInfo[MI->getOpcode()]; | |
| assert(Bits != 0 && "Cannot print this instruction."); | |
| O << AsmStrs+(Bits & 16383)-1; | |
| // Fragment 0 encoded into 6 bits for 41 unique commands. | |
| switch ((Bits >> 26) & 63) { | |
| default: // unreachable. | |
| case 0: | |
| // DBG_VALUE, AAA, AAS, ABS_F, ACQUIRE_MOV16rm, ACQUIRE_MOV32rm, ACQUIRE_... | |
| return; | |
| break; | |
| case 1: | |
| // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i... | |
| printOperand(MI, 0, O); | |
| break; | |
| case 2: | |
| // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC... | |
| printOperand(MI, 5, O); | |
| O << ", "; | |
| break; | |
| case 3: | |
| // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A... | |
| printOperand(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 4: | |
| // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r... | |
| printi16mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 5: | |
| // ADC32rm, ADD32rm, AND32rm, ANDN32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm,... | |
| printi32mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 6: | |
| // ADC64rm, ADD64rm, AND64rm, ANDN64rm, CMOVA64rm, CMOVAE64rm, CMOVB64rm,... | |
| printi64mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 7: | |
| // ADC8rm, ADD8rm, AND8rm, CRC32r32m8, CRC32r64m8, OR8rm, SBB8rm, SUB8rm,... | |
| printi8mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| return; | |
| break; | |
| case 8: | |
| // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,... | |
| printf128mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 9: | |
| // ADDSDrm, ADDSDrm_Int, DIVSDrm, DIVSDrm_Int, Int_CVTSD2SSrm, Int_VCVTSD... | |
| printf64mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 10: | |
| // ADDSSrm, ADDSSrm_Int, DIVSSrm, DIVSSrm_Int, Int_CVTSS2SDrm, Int_VCVTSS... | |
| printf32mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 11: | |
| // ADD_F32m, DIVR_F32m, DIV_F32m, FBLDm, FBSTPm, FCOM32m, FCOMP32m, FLDEN... | |
| printf32mem(MI, 0, O); | |
| return; | |
| break; | |
| case 12: | |
| // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MUL_F64m, S... | |
| printf64mem(MI, 0, O); | |
| return; | |
| break; | |
| case 13: | |
| // ADD_FI16m, DEC16m, DEC64_16m, DIV16m, DIVR_FI16m, DIV_FI16m, FICOM16m,... | |
| printi16mem(MI, 0, O); | |
| return; | |
| break; | |
| case 14: | |
| // ADD_FI32m, CALL32m, DEC32m, DEC64_32m, DIV32m, DIVR_FI32m, DIV_FI32m, ... | |
| printi32mem(MI, 0, O); | |
| break; | |
| case 15: | |
| // AESDECLASTrm, AESDECrm, AESENCLASTrm, AESENCrm, BLENDVPDrm0, BLENDVPSr... | |
| printi128mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 16: | |
| // AESIMCrm, CVTDQ2PSrm, INVEPT32, INVEPT64, INVVPID32, INVVPID64, Int_CV... | |
| printi128mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 17: | |
| // AESIMCrr, BSF16rr, BSF32rr, BSF64rr, BSR16rr, BSR32rr, BSR64rr, BT16ri... | |
| printOperand(MI, 1, O); | |
| O << ", "; | |
| break; | |
| case 18: | |
| // AESKEYGENASSIST128rm, EXTRACTPSmr, IMUL16rmi, IMUL16rmi8, IMUL32rmi, I... | |
| printOperand(MI, 6, O); | |
| O << ", "; | |
| break; | |
| case 19: | |
| // BLENDPDrmi, BLENDPSrmi, CMPPDrmi_alt, CMPPSrmi_alt, CMPSDrm_alt, CMPSS... | |
| printOperand(MI, 7, O); | |
| O << ", "; | |
| break; | |
| case 20: | |
| // BLENDPDrri, BLENDPSrri, CMPPDrri_alt, CMPPSrri_alt, CMPSDrr_alt, CMPSS... | |
| printOperand(MI, 3, O); | |
| O << ", "; | |
| printOperand(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 21: | |
| // BOUNDS16rm, BSF16rm, BSR16rm, CMP16rm, LAR16rm, LAR32rm, LAR64rm, LSL1... | |
| printi16mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 22: | |
| // BOUNDS32rm, BSF32rm, BSR32rm, CMP32rm, CVTSI2SDrm, CVTSI2SSrm, LEA16r,... | |
| printi32mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 23: | |
| // BSF64rm, BSR64rm, CMP64rm, CVTSI2SD64rm, CVTSI2SS64rm, Int_CVTDQ2PDrm,... | |
| printi64mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 24: | |
| // CALL64m, CMPXCHG8B, DEC64m, DIV64m, IDIV64m, ILD_F64m, IMUL64m, INC64m... | |
| printi64mem(MI, 0, O); | |
| break; | |
| case 25: | |
| // CALL64pcrel32, CALLpcrel16, CALLpcrel32, JAE_1, JAE_4, JA_1, JA_4, JBE... | |
| print_pcrel_imm(MI, 0, O); | |
| break; | |
| case 26: | |
| // CLFLUSH, DEC8m, DIV8m, IDIV8m, IMUL8m, INC8m, INVLPG, LOCK_DEC8m, LOCK... | |
| printi8mem(MI, 0, O); | |
| return; | |
| break; | |
| case 27: | |
| // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32rm8, MOVSX64rm8, MOVZ... | |
| printi8mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| break; | |
| case 28: | |
| // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm, Int_VC... | |
| printSSECC(MI, 7, O); | |
| break; | |
| case 29: | |
| // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr, Int_VC... | |
| printSSECC(MI, 3, O); | |
| break; | |
| case 30: | |
| // CMPXCHG16B, LCMPXCHG16B | |
| printi128mem(MI, 0, O); | |
| return; | |
| break; | |
| case 31: | |
| // COMISDrm, COMISSrm, CVTDQ2PDrm, CVTPD2DQrm, CVTPD2PSrm, CVTPS2DQrm, CV... | |
| printf128mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 32: | |
| // CVTPS2PDrm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTSD2SIrm, Int_CVTPS2PDrm, In... | |
| printf64mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 33: | |
| // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_... | |
| printf32mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 34: | |
| // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR... | |
| printopaquemem(MI, 0, O); | |
| return; | |
| break; | |
| case 35: | |
| // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm... | |
| printopaquemem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 36: | |
| // LD_F80m, ST_FP80m | |
| printf80mem(MI, 0, O); | |
| return; | |
| break; | |
| case 37: | |
| // VADDPDYrm, VADDPSYrm, VADDSUBPDYrm, VADDSUBPSYrm, VANDNPDYrm, VANDNPSY... | |
| printf256mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 38: | |
| // VCVTDQ2PSYrm, VLDDQUYrm, VMOVDQAYrm, VMOVDQUYrm, VPTESTYrm | |
| printi256mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 39: | |
| // VCVTPD2DQYrm, VCVTPD2PSYrm, VCVTPS2DQYrm, VCVTTPD2DQYrm, VCVTTPS2DQYrm... | |
| printf256mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 40: | |
| // VPERMILPDYrm, VPERMILPSYrm | |
| printi256mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| } | |
| // Fragment 1 encoded into 6 bits for 45 unique commands. | |
| switch ((Bits >> 20) & 63) { | |
| default: // unreachable. | |
| case 0: | |
| // AAD8i8, AAM8i8, ADD_FI32m, ADD_FPrST0, ADD_FST0r, ADD_FrST0, BSWAP32r,... | |
| return; | |
| break; | |
| case 1: | |
| // ADC16i16, ADD16i16, AND16i16, CMP16i16, IN16ri, MOV16o16a, OR16i16, SB... | |
| O << ", %ax"; | |
| return; | |
| break; | |
| case 2: | |
| // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, AND16mi, AND16... | |
| printi16mem(MI, 0, O); | |
| return; | |
| break; | |
| case 3: | |
| // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32... | |
| printOperand(MI, 1, O); | |
| break; | |
| case 4: | |
| // ADC16rr_REV, ADC32rr_REV, ADC64rr_REV, ADC8rr_REV, ADD16rr_REV, ADD32r... | |
| printOperand(MI, 0, O); | |
| break; | |
| case 5: | |
| // ADC32i32, ADD32i32, AND32i32, CMP32i32, IN32ri, MOV32o32a, OR32i32, SB... | |
| O << ", %eax"; | |
| return; | |
| break; | |
| case 6: | |
| // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, AND32mi, AND32... | |
| printi32mem(MI, 0, O); | |
| return; | |
| break; | |
| case 7: | |
| // ADC64i32, ADD64i32, AND64i32, CMP64i32, OR64i32, SBB64i32, SUB64i32, T... | |
| O << ", %rax"; | |
| return; | |
| break; | |
| case 8: | |
| // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,... | |
| printi64mem(MI, 0, O); | |
| return; | |
| break; | |
| case 9: | |
| // ADC8i8, ADD8i8, AND8i8, CMP8i8, IN8ri, MOV8o8a, OR8i8, SBB8i8, SUB8i8,... | |
| O << ", %al"; | |
| return; | |
| break; | |
| case 10: | |
| // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CMP8mi, CMP8mr, CMPXCH... | |
| printi8mem(MI, 0, O); | |
| break; | |
| case 11: | |
| // AESKEYGENASSIST128rm, PCMPESTRIArm, PCMPESTRICrm, PCMPESTRIOrm, PCMPES... | |
| printi128mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 12: | |
| // ARPL16mr, ARPL16rr, ENTER, VAARG_64, VASTART_SAVE_XMM_REGS | |
| O << ", "; | |
| break; | |
| case 13: | |
| // BLENDPDrmi, BLENDPSrmi, DPPDrmi, DPPSrmi, MPSADBWrmi, PALIGNR128rm, PB... | |
| printi128mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 14: | |
| // CMOVBE_F, CMOVB_F, CMOVE_F, CMOVNBE_F, CMOVNB_F, CMOVNE_F, CMOVNP_F, C... | |
| O << ", %st(0)"; | |
| return; | |
| break; | |
| case 15: | |
| // CMPPDrmi, CMPPDrri, VCMPPDYrmi, VCMPPDYrri, VCMPPDrmi, VCMPPDrri | |
| O << "pd\t"; | |
| break; | |
| case 16: | |
| // CMPPDrmi_alt, CMPPSrmi_alt, SHUFPDrmi, SHUFPSrmi, VCMPPDYrmi_alt, VCMP... | |
| printf128mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 17: | |
| // CMPPSrmi, CMPPSrri, VCMPPSYrmi, VCMPPSYrri, VCMPPSrmi, VCMPPSrri | |
| O << "ps\t"; | |
| break; | |
| case 18: | |
| // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr, Int_VCMPSDrm, Int_VCMPSDrr... | |
| O << "sd\t"; | |
| break; | |
| case 19: | |
| // CMPSDrm_alt, ROUNDSDm, VCMPSDrm_alt, VROUNDSDm, VROUNDSDm_AVX | |
| printf64mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 20: | |
| // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr, Int_VCMPSSrm, Int_VCMPSSrr... | |
| O << "ss\t"; | |
| break; | |
| case 21: | |
| // CMPSSrm_alt, INSERTPSrm, ROUNDSSm, VCMPSSrm_alt, VINSERTPSrm, VROUNDSS... | |
| printf32mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 22: | |
| // EXTRACTPSmr, PEXTRBmr, PEXTRDmr, PEXTRQmr, PEXTRWmr, SHLD16mri8, SHLD3... | |
| printOperand(MI, 5, O); | |
| O << ", "; | |
| break; | |
| case 23: | |
| // IMUL16rmi, IMUL16rmi8 | |
| printi16mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 24: | |
| // IMUL32rmi, IMUL32rmi8 | |
| printi32mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 25: | |
| // IMUL64rmi32, IMUL64rmi8, MMX_PSHUFWmi | |
| printi64mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 26: | |
| // Int_MemBarrierNoSSE64 | |
| O << ", (%rsp)"; | |
| return; | |
| break; | |
| case 27: | |
| // LXADD16, MMX_PINSRWirmi, PINSRWrmi, VPINSRWrmi, XCHG16rm | |
| printi16mem(MI, 2, O); | |
| break; | |
| case 28: | |
| // LXADD32, PINSRDrm, VPINSRDrm, XCHG32rm | |
| printi32mem(MI, 2, O); | |
| break; | |
| case 29: | |
| // LXADD64, MMX_PALIGNR64irm, PINSRQrm, VPINSRQrm, XCHG64rm | |
| printi64mem(MI, 2, O); | |
| break; | |
| case 30: | |
| // LXADD8, PINSRBrm, VPINSRBrm, XCHG8rm | |
| printi8mem(MI, 2, O); | |
| break; | |
| case 31: | |
| // MOV8rm_NOREX | |
| O << " # NOREX"; | |
| return; | |
| break; | |
| case 32: | |
| // MOVAPDmr, MOVAPSmr, MOVNTDQ_64mr, MOVNTDQmr, MOVNTPDmr, MOVNTPSmr, MOV... | |
| printf128mem(MI, 0, O); | |
| return; | |
| break; | |
| case 33: | |
| // MOVDQAmr, MOVDQUmr, MOVDQUmr_Int, VMOVDQAmr, VMOVDQUmr, VMOVDQUmr_Int | |
| printi128mem(MI, 0, O); | |
| return; | |
| break; | |
| case 34: | |
| // MOVHPDmr, MOVHPSmr, MOVLPDmr, MOVLPSmr, MOVSDmr, VMOVHPDmr, VMOVHPSmr,... | |
| printf64mem(MI, 0, O); | |
| return; | |
| break; | |
| case 35: | |
| // MOVSSmr, VMOVSSmr | |
| printf32mem(MI, 0, O); | |
| return; | |
| break; | |
| case 36: | |
| // ROUNDPDm, ROUNDPSm, VPERMILPDmi, VPERMILPSmi, VROUNDPDm, VROUNDPDm_AVX... | |
| printf128mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 37: | |
| // TAILJMPd, TAILJMPd64, TAILJMPm, TAILJMPm64, TAILJMPr64 | |
| O << " # TAILCALL"; | |
| return; | |
| break; | |
| case 38: | |
| // VBLENDPDYrmi, VBLENDPSYrmi, VBLENDVPDYrm, VBLENDVPSYrm, VDPPSYrmi | |
| printi256mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 39: | |
| // VMOVAPDYmr, VMOVAPSYmr, VMOVNTDQY_64mr, VMOVNTDQYmr, VMOVNTPDYmr, VMOV... | |
| printf256mem(MI, 0, O); | |
| return; | |
| break; | |
| case 40: | |
| // VMOVDQAYmr, VMOVDQUYmr | |
| printi256mem(MI, 0, O); | |
| return; | |
| break; | |
| case 41: | |
| // VPERM2F128rm | |
| printf256mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 42: | |
| // VPERMILPDYmi, VPERMILPSYmi, VROUNDYPDm, VROUNDYPDm_AVX, VROUNDYPSm, VR... | |
| printf256mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 43: | |
| // VRCPSSm_Int, VRSQRTSSm_Int, VSQRTSSm_Int | |
| printf32mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 44: | |
| // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr | |
| printOperand(MI, 2, O); | |
| return; | |
| break; | |
| } | |
| // Fragment 2 encoded into 5 bits for 19 unique commands. | |
| switch ((Bits >> 15) & 31) { | |
| default: // unreachable. | |
| case 0: | |
| // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, A... | |
| return; | |
| break; | |
| case 1: | |
| // AESKEYGENASSIST128rr, ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, EXTRACTP... | |
| O << ", "; | |
| break; | |
| case 2: | |
| // ARPL16mr | |
| printi16mem(MI, 1, O); | |
| return; | |
| break; | |
| case 3: | |
| // ARPL16rr, ENTER, VASTART_SAVE_XMM_REGS, VBLENDPDrmi, VBLENDPSrmi, VBLE... | |
| printOperand(MI, 1, O); | |
| break; | |
| case 4: | |
| // BLENDPDrmi, BLENDPSrmi, CMPPDrmi_alt, CMPPSrmi_alt, CMPSDrm_alt, CMPSS... | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 5: | |
| // CMPPDrmi, CMPPSrmi, VCMPPDYrmi, VCMPPDrmi, VCMPPSYrmi, VCMPPSrmi | |
| printf128mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 6: | |
| // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr, Int_VC... | |
| printOperand(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 7: | |
| // CMPSDrm, VCMPSDrm | |
| printf64mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 8: | |
| // CMPSSrm, Int_CMPSDrm, Int_CMPSSrm, Int_VCMPSDrm, Int_VCMPSSrm, VCMPSSr... | |
| printf32mem(MI, 2, O); | |
| O << ", "; | |
| break; | |
| case 9: | |
| // EXTRACTPSmr, VEXTRACTPSmr | |
| printf32mem(MI, 0, O); | |
| return; | |
| break; | |
| case 10: | |
| // MOV8mr_NOREX, MOV8rr_NOREX | |
| O << " # NOREX"; | |
| return; | |
| break; | |
| case 11: | |
| // PEXTRBmr, VPEXTRBmr | |
| printi8mem(MI, 0, O); | |
| return; | |
| break; | |
| case 12: | |
| // PEXTRDmr, SHLD32mri8, SHRD32mri8, VPEXTRDmr | |
| printi32mem(MI, 0, O); | |
| return; | |
| break; | |
| case 13: | |
| // PEXTRQmr, SHLD64mri8, SHRD64mri8, VPEXTRQmr | |
| printi64mem(MI, 0, O); | |
| return; | |
| break; | |
| case 14: | |
| // PEXTRWmr, SHLD16mri8, SHRD16mri8, VPEXTRWmr | |
| printi16mem(MI, 0, O); | |
| return; | |
| break; | |
| case 15: | |
| // VAARG_64 | |
| printi8mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 6, O); | |
| O << ", "; | |
| printOperand(MI, 7, O); | |
| O << ", "; | |
| printOperand(MI, 8, O); | |
| return; | |
| break; | |
| case 16: | |
| // VCVTPS2PHYmr, VEXTRACTF128mr, VMASKMOVPDmr, VMASKMOVPSmr | |
| printf128mem(MI, 0, O); | |
| return; | |
| break; | |
| case 17: | |
| // VCVTPS2PHmr | |
| printf64mem(MI, 0, O); | |
| return; | |
| break; | |
| case 18: | |
| // VMASKMOVPDYmr, VMASKMOVPSYmr | |
| printf256mem(MI, 0, O); | |
| return; | |
| break; | |
| } | |
| switch (MI->getOpcode()) { | |
| case X86::AESKEYGENASSIST128rr: | |
| case X86::ANDN32rm: | |
| case X86::ANDN32rr: | |
| case X86::ANDN64rm: | |
| case X86::ANDN64rr: | |
| case X86::CMPPDrmi: | |
| case X86::CMPPDrri: | |
| case X86::CMPPSrmi: | |
| case X86::CMPPSrri: | |
| case X86::CMPSDrm: | |
| case X86::CMPSDrr: | |
| case X86::CMPSSrm: | |
| case X86::CMPSSrr: | |
| case X86::EXTRACTPSrr: | |
| case X86::IMUL16rri: | |
| case X86::IMUL16rri8: | |
| case X86::IMUL32rri: | |
| case X86::IMUL32rri8: | |
| case X86::IMUL64rri32: | |
| case X86::IMUL64rri8: | |
| case X86::Int_CMPSDrm: | |
| case X86::Int_CMPSDrr: | |
| case X86::Int_CMPSSrm: | |
| case X86::Int_CMPSSrr: | |
| case X86::Int_VCVTSD2SSrm: | |
| case X86::Int_VCVTSD2SSrr: | |
| case X86::Int_VCVTSI2SD64rm: | |
| case X86::Int_VCVTSI2SD64rr: | |
| case X86::Int_VCVTSI2SDrm: | |
| case X86::Int_VCVTSI2SDrr: | |
| case X86::Int_VCVTSI2SS64rm: | |
| case X86::Int_VCVTSI2SS64rr: | |
| case X86::Int_VCVTSI2SSrm: | |
| case X86::Int_VCVTSI2SSrr: | |
| case X86::Int_VCVTSS2SDrm: | |
| case X86::Int_VCVTSS2SDrr: | |
| case X86::MMX_PALIGNR64irm: | |
| case X86::MMX_PEXTRWirri: | |
| case X86::MMX_PINSRWirmi: | |
| case X86::MMX_PSHUFWri: | |
| case X86::PCMPESTRIArr: | |
| case X86::PCMPESTRICrr: | |
| case X86::PCMPESTRIOrr: | |
| case X86::PCMPESTRISrr: | |
| case X86::PCMPESTRIZrr: | |
| case X86::PCMPESTRIrr: | |
| case X86::PCMPESTRM128rr: | |
| case X86::PCMPISTRIArr: | |
| case X86::PCMPISTRICrr: | |
| case X86::PCMPISTRIOrr: | |
| case X86::PCMPISTRISrr: | |
| case X86::PCMPISTRIZrr: | |
| case X86::PCMPISTRIrr: | |
| case X86::PCMPISTRM128rr: | |
| case X86::PEXTRBrr: | |
| case X86::PEXTRDrr: | |
| case X86::PEXTRQrr: | |
| case X86::PEXTRWri: | |
| case X86::PINSRBrm: | |
| case X86::PINSRDrm: | |
| case X86::PINSRQrm: | |
| case X86::PINSRWrmi: | |
| case X86::PSHUFDri: | |
| case X86::PSHUFHWri: | |
| case X86::PSHUFLWri: | |
| case X86::ROUNDPDr: | |
| case X86::ROUNDPSr: | |
| case X86::VADDPDYrr: | |
| case X86::VADDPDrm: | |
| case X86::VADDPDrr: | |
| case X86::VADDPSYrr: | |
| case X86::VADDPSrm: | |
| case X86::VADDPSrr: | |
| case X86::VADDSDrm: | |
| case X86::VADDSDrm_Int: | |
| case X86::VADDSDrr: | |
| case X86::VADDSDrr_Int: | |
| case X86::VADDSSrm: | |
| case X86::VADDSSrm_Int: | |
| case X86::VADDSSrr: | |
| case X86::VADDSSrr_Int: | |
| case X86::VADDSUBPDYrr: | |
| case X86::VADDSUBPDrm: | |
| case X86::VADDSUBPDrr: | |
| case X86::VADDSUBPSYrr: | |
| case X86::VADDSUBPSrm: | |
| case X86::VADDSUBPSrr: | |
| case X86::VAESDECLASTrm: | |
| case X86::VAESDECLASTrr: | |
| case X86::VAESDECrm: | |
| case X86::VAESDECrr: | |
| case X86::VAESENCLASTrm: | |
| case X86::VAESENCLASTrr: | |
| case X86::VAESENCrm: | |
| case X86::VAESENCrr: | |
| case X86::VAESKEYGENASSIST128rr: | |
| case X86::VANDNPDYrr: | |
| case X86::VANDNPDrm: | |
| case X86::VANDNPDrr: | |
| case X86::VANDNPSYrr: | |
| case X86::VANDNPSrm: | |
| case X86::VANDNPSrr: | |
| case X86::VANDPDYrr: | |
| case X86::VANDPDrm: | |
| case X86::VANDPDrr: | |
| case X86::VANDPSYrr: | |
| case X86::VANDPSrm: | |
| case X86::VANDPSrr: | |
| case X86::VBLENDPDYrri: | |
| case X86::VBLENDPDrri: | |
| case X86::VBLENDPSYrri: | |
| case X86::VBLENDPSrri: | |
| case X86::VBLENDVPDYrr: | |
| case X86::VBLENDVPDrr: | |
| case X86::VBLENDVPSYrr: | |
| case X86::VBLENDVPSrr: | |
| case X86::VCMPPDYrri_alt: | |
| case X86::VCMPPDrri_alt: | |
| case X86::VCMPPSYrri_alt: | |
| case X86::VCMPPSrri_alt: | |
| case X86::VCMPSDrr_alt: | |
| case X86::VCMPSSrr_alt: | |
| case X86::VCVTPS2PHYrr: | |
| case X86::VCVTPS2PHrr: | |
| case X86::VCVTSD2SSrm: | |
| case X86::VCVTSD2SSrr: | |
| case X86::VCVTSI2SD64rm: | |
| case X86::VCVTSI2SD64rr: | |
| case X86::VCVTSI2SDLrm: | |
| case X86::VCVTSI2SDLrr: | |
| case X86::VCVTSI2SDrm: | |
| case X86::VCVTSI2SDrr: | |
| case X86::VCVTSI2SS64rm: | |
| case X86::VCVTSI2SS64rr: | |
| case X86::VCVTSI2SSrm: | |
| case X86::VCVTSI2SSrr: | |
| case X86::VCVTSS2SDrm: | |
| case X86::VCVTSS2SDrr: | |
| case X86::VDIVPDYrr: | |
| case X86::VDIVPDrm: | |
| case X86::VDIVPDrr: | |
| case X86::VDIVPSYrr: | |
| case X86::VDIVPSrm: | |
| case X86::VDIVPSrr: | |
| case X86::VDIVSDrm: | |
| case X86::VDIVSDrm_Int: | |
| case X86::VDIVSDrr: | |
| case X86::VDIVSDrr_Int: | |
| case X86::VDIVSSrm: | |
| case X86::VDIVSSrm_Int: | |
| case X86::VDIVSSrr: | |
| case X86::VDIVSSrr_Int: | |
| case X86::VDPPDrri: | |
| case X86::VDPPSYrri: | |
| case X86::VDPPSrri: | |
| case X86::VEXTRACTF128rr: | |
| case X86::VEXTRACTPSrr: | |
| case X86::VEXTRACTPSrr64: | |
| case X86::VFMADDPDr132m: | |
| case X86::VFMADDPDr132r: | |
| case X86::VFMADDPDr132rY: | |
| case X86::VFMADDPDr213m: | |
| case X86::VFMADDPDr213r: | |
| case X86::VFMADDPDr213rY: | |
| case X86::VFMADDPDr231m: | |
| case X86::VFMADDPDr231r: | |
| case X86::VFMADDPDr231rY: | |
| case X86::VFMADDPSr132m: | |
| case X86::VFMADDPSr132r: | |
| case X86::VFMADDPSr132rY: | |
| case X86::VFMADDPSr213m: | |
| case X86::VFMADDPSr213r: | |
| case X86::VFMADDPSr213rY: | |
| case X86::VFMADDPSr231m: | |
| case X86::VFMADDPSr231r: | |
| case X86::VFMADDPSr231rY: | |
| case X86::VFMADDSUBPDr132m: | |
| case X86::VFMADDSUBPDr132r: | |
| case X86::VFMADDSUBPDr132rY: | |
| case X86::VFMADDSUBPDr213m: | |
| case X86::VFMADDSUBPDr213r: | |
| case X86::VFMADDSUBPDr213rY: | |
| case X86::VFMADDSUBPDr231m: | |
| case X86::VFMADDSUBPDr231r: | |
| case X86::VFMADDSUBPDr231rY: | |
| case X86::VFMADDSUBPSr132m: | |
| case X86::VFMADDSUBPSr132r: | |
| case X86::VFMADDSUBPSr132rY: | |
| case X86::VFMADDSUBPSr213m: | |
| case X86::VFMADDSUBPSr213r: | |
| case X86::VFMADDSUBPSr213rY: | |
| case X86::VFMADDSUBPSr231m: | |
| case X86::VFMADDSUBPSr231r: | |
| case X86::VFMADDSUBPSr231rY: | |
| case X86::VFMSUBADDPDr132m: | |
| case X86::VFMSUBADDPDr132r: | |
| case X86::VFMSUBADDPDr132rY: | |
| case X86::VFMSUBADDPDr213m: | |
| case X86::VFMSUBADDPDr213r: | |
| case X86::VFMSUBADDPDr213rY: | |
| case X86::VFMSUBADDPDr231m: | |
| case X86::VFMSUBADDPDr231r: | |
| case X86::VFMSUBADDPDr231rY: | |
| case X86::VFMSUBADDPSr132m: | |
| case X86::VFMSUBADDPSr132r: | |
| case X86::VFMSUBADDPSr132rY: | |
| case X86::VFMSUBADDPSr213m: | |
| case X86::VFMSUBADDPSr213r: | |
| case X86::VFMSUBADDPSr213rY: | |
| case X86::VFMSUBADDPSr231m: | |
| case X86::VFMSUBADDPSr231r: | |
| case X86::VFMSUBADDPSr231rY: | |
| case X86::VFMSUBPDr132m: | |
| case X86::VFMSUBPDr132r: | |
| case X86::VFMSUBPDr132rY: | |
| case X86::VFMSUBPDr213m: | |
| case X86::VFMSUBPDr213r: | |
| case X86::VFMSUBPDr213rY: | |
| case X86::VFMSUBPDr231m: | |
| case X86::VFMSUBPDr231r: | |
| case X86::VFMSUBPDr231rY: | |
| case X86::VFMSUBPSr132m: | |
| case X86::VFMSUBPSr132r: | |
| case X86::VFMSUBPSr132rY: | |
| case X86::VFMSUBPSr213m: | |
| case X86::VFMSUBPSr213r: | |
| case X86::VFMSUBPSr213rY: | |
| case X86::VFMSUBPSr231m: | |
| case X86::VFMSUBPSr231r: | |
| case X86::VFMSUBPSr231rY: | |
| case X86::VFNMADDPDr132m: | |
| case X86::VFNMADDPDr132r: | |
| case X86::VFNMADDPDr132rY: | |
| case X86::VFNMADDPDr213m: | |
| case X86::VFNMADDPDr213r: | |
| case X86::VFNMADDPDr213rY: | |
| case X86::VFNMADDPDr231m: | |
| case X86::VFNMADDPDr231r: | |
| case X86::VFNMADDPDr231rY: | |
| case X86::VFNMADDPSr132m: | |
| case X86::VFNMADDPSr132r: | |
| case X86::VFNMADDPSr132rY: | |
| case X86::VFNMADDPSr213m: | |
| case X86::VFNMADDPSr213r: | |
| case X86::VFNMADDPSr213rY: | |
| case X86::VFNMADDPSr231m: | |
| case X86::VFNMADDPSr231r: | |
| case X86::VFNMADDPSr231rY: | |
| case X86::VFNMSUBPDr132m: | |
| case X86::VFNMSUBPDr132r: | |
| case X86::VFNMSUBPDr132rY: | |
| case X86::VFNMSUBPDr213m: | |
| case X86::VFNMSUBPDr213r: | |
| case X86::VFNMSUBPDr213rY: | |
| case X86::VFNMSUBPDr231m: | |
| case X86::VFNMSUBPDr231r: | |
| case X86::VFNMSUBPDr231rY: | |
| case X86::VFNMSUBPSr132m: | |
| case X86::VFNMSUBPSr132r: | |
| case X86::VFNMSUBPSr132rY: | |
| case X86::VFNMSUBPSr213m: | |
| case X86::VFNMSUBPSr213r: | |
| case X86::VFNMSUBPSr213rY: | |
| case X86::VFNMSUBPSr231m: | |
| case X86::VFNMSUBPSr231r: | |
| case X86::VFNMSUBPSr231rY: | |
| case X86::VFsANDNPDrm: | |
| case X86::VFsANDNPDrr: | |
| case X86::VFsANDNPSrm: | |
| case X86::VFsANDNPSrr: | |
| case X86::VFsANDPDrm: | |
| case X86::VFsANDPDrr: | |
| case X86::VFsANDPSrm: | |
| case X86::VFsANDPSrr: | |
| case X86::VFsORPDrm: | |
| case X86::VFsORPDrr: | |
| case X86::VFsORPSrm: | |
| case X86::VFsORPSrr: | |
| case X86::VFsXORPDrm: | |
| case X86::VFsXORPDrr: | |
| case X86::VFsXORPSrm: | |
| case X86::VFsXORPSrr: | |
| case X86::VHADDPDYrr: | |
| case X86::VHADDPDrm: | |
| case X86::VHADDPDrr: | |
| case X86::VHADDPSYrr: | |
| case X86::VHADDPSrm: | |
| case X86::VHADDPSrr: | |
| case X86::VHSUBPDYrr: | |
| case X86::VHSUBPDrm: | |
| case X86::VHSUBPDrr: | |
| case X86::VHSUBPSYrr: | |
| case X86::VHSUBPSrm: | |
| case X86::VHSUBPSrr: | |
| case X86::VINSERTF128rr: | |
| case X86::VINSERTPSrr: | |
| case X86::VMASKMOVPDrm: | |
| case X86::VMASKMOVPSrm: | |
| case X86::VMAXPDYrr: | |
| case X86::VMAXPDYrr_Int: | |
| case X86::VMAXPDrm: | |
| case X86::VMAXPDrm_Int: | |
| case X86::VMAXPDrr: | |
| case X86::VMAXPDrr_Int: | |
| case X86::VMAXPSYrr: | |
| case X86::VMAXPSYrr_Int: | |
| case X86::VMAXPSrm: | |
| case X86::VMAXPSrm_Int: | |
| case X86::VMAXPSrr: | |
| case X86::VMAXPSrr_Int: | |
| case X86::VMAXSDrm: | |
| case X86::VMAXSDrm_Int: | |
| case X86::VMAXSDrr: | |
| case X86::VMAXSDrr_Int: | |
| case X86::VMAXSSrm: | |
| case X86::VMAXSSrm_Int: | |
| case X86::VMAXSSrr: | |
| case X86::VMAXSSrr_Int: | |
| case X86::VMINPDYrr: | |
| case X86::VMINPDYrr_Int: | |
| case X86::VMINPDrm: | |
| case X86::VMINPDrm_Int: | |
| case X86::VMINPDrr: | |
| case X86::VMINPDrr_Int: | |
| case X86::VMINPSYrr: | |
| case X86::VMINPSYrr_Int: | |
| case X86::VMINPSrm: | |
| case X86::VMINPSrm_Int: | |
| case X86::VMINPSrr: | |
| case X86::VMINPSrr_Int: | |
| case X86::VMINSDrm: | |
| case X86::VMINSDrm_Int: | |
| case X86::VMINSDrr: | |
| case X86::VMINSDrr_Int: | |
| case X86::VMINSSrm: | |
| case X86::VMINSSrm_Int: | |
| case X86::VMINSSrr: | |
| case X86::VMINSSrr_Int: | |
| case X86::VMOVHLPSrr: | |
| case X86::VMOVHPDrm: | |
| case X86::VMOVHPSrm: | |
| case X86::VMOVLHPSrr: | |
| case X86::VMOVLPDrm: | |
| case X86::VMOVLPSrm: | |
| case X86::VMOVSDrr: | |
| case X86::VMOVSDrr_REV: | |
| case X86::VMOVSSrr: | |
| case X86::VMOVSSrr_REV: | |
| case X86::VMPSADBWrri: | |
| case X86::VMULPDYrr: | |
| case X86::VMULPDrm: | |
| case X86::VMULPDrr: | |
| case X86::VMULPSYrr: | |
| case X86::VMULPSrm: | |
| case X86::VMULPSrr: | |
| case X86::VMULSDrm: | |
| case X86::VMULSDrm_Int: | |
| case X86::VMULSDrr: | |
| case X86::VMULSDrr_Int: | |
| case X86::VMULSSrm: | |
| case X86::VMULSSrm_Int: | |
| case X86::VMULSSrr: | |
| case X86::VMULSSrr_Int: | |
| case X86::VORPDYrr: | |
| case X86::VORPDrm: | |
| case X86::VORPDrr: | |
| case X86::VORPSYrr: | |
| case X86::VORPSrm: | |
| case X86::VORPSrr: | |
| case X86::VPACKSSDWrm: | |
| case X86::VPACKSSDWrr: | |
| case X86::VPACKSSWBrm: | |
| case X86::VPACKSSWBrr: | |
| case X86::VPACKUSDWrm: | |
| case X86::VPACKUSDWrr: | |
| case X86::VPACKUSWBrm: | |
| case X86::VPACKUSWBrr: | |
| case X86::VPADDBrm: | |
| case X86::VPADDBrr: | |
| case X86::VPADDDrm: | |
| case X86::VPADDDrr: | |
| case X86::VPADDQrm: | |
| case X86::VPADDQrr: | |
| case X86::VPADDSBrm: | |
| case X86::VPADDSBrr: | |
| case X86::VPADDSWrm: | |
| case X86::VPADDSWrr: | |
| case X86::VPADDUSBrm: | |
| case X86::VPADDUSBrr: | |
| case X86::VPADDUSWrm: | |
| case X86::VPADDUSWrr: | |
| case X86::VPADDWrm: | |
| case X86::VPADDWrr: | |
| case X86::VPALIGNR128rr: | |
| case X86::VPANDNrm: | |
| case X86::VPANDNrr: | |
| case X86::VPANDrm: | |
| case X86::VPANDrr: | |
| case X86::VPAVGBrm: | |
| case X86::VPAVGBrr: | |
| case X86::VPAVGWrm: | |
| case X86::VPAVGWrr: | |
| case X86::VPBLENDVBrr: | |
| case X86::VPBLENDWrri: | |
| case X86::VPCLMULQDQrr: | |
| case X86::VPCMPEQBrm: | |
| case X86::VPCMPEQBrr: | |
| case X86::VPCMPEQDrm: | |
| case X86::VPCMPEQDrr: | |
| case X86::VPCMPEQQrm: | |
| case X86::VPCMPEQQrr: | |
| case X86::VPCMPEQWrm: | |
| case X86::VPCMPEQWrr: | |
| case X86::VPCMPESTRIArr: | |
| case X86::VPCMPESTRICrr: | |
| case X86::VPCMPESTRIOrr: | |
| case X86::VPCMPESTRISrr: | |
| case X86::VPCMPESTRIZrr: | |
| case X86::VPCMPESTRIrr: | |
| case X86::VPCMPESTRM128rr: | |
| case X86::VPCMPGTBrm: | |
| case X86::VPCMPGTBrr: | |
| case X86::VPCMPGTDrm: | |
| case X86::VPCMPGTDrr: | |
| case X86::VPCMPGTQrm: | |
| case X86::VPCMPGTQrr: | |
| case X86::VPCMPGTWrm: | |
| case X86::VPCMPGTWrr: | |
| case X86::VPCMPISTRIArr: | |
| case X86::VPCMPISTRICrr: | |
| case X86::VPCMPISTRIOrr: | |
| case X86::VPCMPISTRISrr: | |
| case X86::VPCMPISTRIZrr: | |
| case X86::VPCMPISTRIrr: | |
| case X86::VPCMPISTRM128rr: | |
| case X86::VPERM2F128rr: | |
| case X86::VPERMILPDYri: | |
| case X86::VPERMILPDYrr: | |
| case X86::VPERMILPDri: | |
| case X86::VPERMILPDrm: | |
| case X86::VPERMILPDrr: | |
| case X86::VPERMILPSYri: | |
| case X86::VPERMILPSYrr: | |
| case X86::VPERMILPSri: | |
| case X86::VPERMILPSrm: | |
| case X86::VPERMILPSrr: | |
| case X86::VPEXTRBrr: | |
| case X86::VPEXTRBrr64: | |
| case X86::VPEXTRDrr: | |
| case X86::VPEXTRQrr: | |
| case X86::VPEXTRWri: | |
| case X86::VPHADDDrm128: | |
| case X86::VPHADDDrr128: | |
| case X86::VPHADDSWrm128: | |
| case X86::VPHADDSWrr128: | |
| case X86::VPHADDWrm128: | |
| case X86::VPHADDWrr128: | |
| case X86::VPHSUBDrm128: | |
| case X86::VPHSUBDrr128: | |
| case X86::VPHSUBSWrm128: | |
| case X86::VPHSUBSWrr128: | |
| case X86::VPHSUBWrm128: | |
| case X86::VPHSUBWrr128: | |
| case X86::VPINSRBrr: | |
| case X86::VPINSRDrr: | |
| case X86::VPINSRQrr: | |
| case X86::VPINSRWrr64i: | |
| case X86::VPINSRWrri: | |
| case X86::VPMADDUBSWrm128: | |
| case X86::VPMADDUBSWrr128: | |
| case X86::VPMADDWDrm: | |
| case X86::VPMADDWDrr: | |
| case X86::VPMAXSBrm: | |
| case X86::VPMAXSBrr: | |
| case X86::VPMAXSDrm: | |
| case X86::VPMAXSDrr: | |
| case X86::VPMAXSWrm: | |
| case X86::VPMAXSWrr: | |
| case X86::VPMAXUBrm: | |
| case X86::VPMAXUBrr: | |
| case X86::VPMAXUDrm: | |
| case X86::VPMAXUDrr: | |
| case X86::VPMAXUWrm: | |
| case X86::VPMAXUWrr: | |
| case X86::VPMINSBrm: | |
| case X86::VPMINSBrr: | |
| case X86::VPMINSDrm: | |
| case X86::VPMINSDrr: | |
| case X86::VPMINSWrm: | |
| case X86::VPMINSWrr: | |
| case X86::VPMINUBrm: | |
| case X86::VPMINUBrr: | |
| case X86::VPMINUDrm: | |
| case X86::VPMINUDrr: | |
| case X86::VPMINUWrm: | |
| case X86::VPMINUWrr: | |
| case X86::VPMULDQrm: | |
| case X86::VPMULDQrr: | |
| case X86::VPMULHRSWrm128: | |
| case X86::VPMULHRSWrr128: | |
| case X86::VPMULHUWrm: | |
| case X86::VPMULHUWrr: | |
| case X86::VPMULHWrm: | |
| case X86::VPMULHWrr: | |
| case X86::VPMULLDrm: | |
| case X86::VPMULLDrr: | |
| case X86::VPMULLWrm: | |
| case X86::VPMULLWrr: | |
| case X86::VPMULUDQrm: | |
| case X86::VPMULUDQrr: | |
| case X86::VPORrm: | |
| case X86::VPORrr: | |
| case X86::VPSADBWrm: | |
| case X86::VPSADBWrr: | |
| case X86::VPSHUFBrm128: | |
| case X86::VPSHUFBrr128: | |
| case X86::VPSHUFDri: | |
| case X86::VPSHUFHWri: | |
| case X86::VPSHUFLWri: | |
| case X86::VPSIGNBrm128: | |
| case X86::VPSIGNBrr128: | |
| case X86::VPSIGNDrm128: | |
| case X86::VPSIGNDrr128: | |
| case X86::VPSIGNWrm128: | |
| case X86::VPSIGNWrr128: | |
| case X86::VPSLLDQri: | |
| case X86::VPSLLDri: | |
| case X86::VPSLLDrm: | |
| case X86::VPSLLDrr: | |
| case X86::VPSLLQri: | |
| case X86::VPSLLQrm: | |
| case X86::VPSLLQrr: | |
| case X86::VPSLLWri: | |
| case X86::VPSLLWrm: | |
| case X86::VPSLLWrr: | |
| case X86::VPSRADri: | |
| case X86::VPSRADrm: | |
| case X86::VPSRADrr: | |
| case X86::VPSRAWri: | |
| case X86::VPSRAWrm: | |
| case X86::VPSRAWrr: | |
| case X86::VPSRLDQri: | |
| case X86::VPSRLDri: | |
| case X86::VPSRLDrm: | |
| case X86::VPSRLDrr: | |
| case X86::VPSRLQri: | |
| case X86::VPSRLQrm: | |
| case X86::VPSRLQrr: | |
| case X86::VPSRLWri: | |
| case X86::VPSRLWrm: | |
| case X86::VPSRLWrr: | |
| case X86::VPSUBBrm: | |
| case X86::VPSUBBrr: | |
| case X86::VPSUBDrm: | |
| case X86::VPSUBDrr: | |
| case X86::VPSUBQrm: | |
| case X86::VPSUBQrr: | |
| case X86::VPSUBSBrm: | |
| case X86::VPSUBSBrr: | |
| case X86::VPSUBSWrm: | |
| case X86::VPSUBSWrr: | |
| case X86::VPSUBUSBrm: | |
| case X86::VPSUBUSBrr: | |
| case X86::VPSUBUSWrm: | |
| case X86::VPSUBUSWrr: | |
| case X86::VPSUBWrm: | |
| case X86::VPSUBWrr: | |
| case X86::VPUNPCKHBWrm: | |
| case X86::VPUNPCKHBWrr: | |
| case X86::VPUNPCKHDQrm: | |
| case X86::VPUNPCKHDQrr: | |
| case X86::VPUNPCKHQDQrm: | |
| case X86::VPUNPCKHQDQrr: | |
| case X86::VPUNPCKHWDrm: | |
| case X86::VPUNPCKHWDrr: | |
| case X86::VPUNPCKLBWrm: | |
| case X86::VPUNPCKLBWrr: | |
| case X86::VPUNPCKLDQrm: | |
| case X86::VPUNPCKLDQrr: | |
| case X86::VPUNPCKLQDQrm: | |
| case X86::VPUNPCKLQDQrr: | |
| case X86::VPUNPCKLWDrm: | |
| case X86::VPUNPCKLWDrr: | |
| case X86::VPXORrm: | |
| case X86::VPXORrr: | |
| case X86::VRCPSSm: | |
| case X86::VRCPSSr: | |
| case X86::VROUNDPDr: | |
| case X86::VROUNDPDr_AVX: | |
| case X86::VROUNDPSr: | |
| case X86::VROUNDPSr_AVX: | |
| case X86::VROUNDSDr: | |
| case X86::VROUNDSDr_AVX: | |
| case X86::VROUNDSSr: | |
| case X86::VROUNDSSr_AVX: | |
| case X86::VROUNDYPDr: | |
| case X86::VROUNDYPDr_AVX: | |
| case X86::VROUNDYPSr: | |
| case X86::VROUNDYPSr_AVX: | |
| case X86::VRSQRTSSm: | |
| case X86::VRSQRTSSr: | |
| case X86::VSHUFPDYrri: | |
| case X86::VSHUFPDrri: | |
| case X86::VSHUFPSYrri: | |
| case X86::VSHUFPSrri: | |
| case X86::VSQRTSDm: | |
| case X86::VSQRTSDm_Int: | |
| case X86::VSQRTSDr: | |
| case X86::VSQRTSSm: | |
| case X86::VSQRTSSr: | |
| case X86::VSUBPDYrr: | |
| case X86::VSUBPDrm: | |
| case X86::VSUBPDrr: | |
| case X86::VSUBPSYrr: | |
| case X86::VSUBPSrm: | |
| case X86::VSUBPSrr: | |
| case X86::VSUBSDrm: | |
| case X86::VSUBSDrm_Int: | |
| case X86::VSUBSDrr: | |
| case X86::VSUBSDrr_Int: | |
| case X86::VSUBSSrm: | |
| case X86::VSUBSSrm_Int: | |
| case X86::VSUBSSrr: | |
| case X86::VSUBSSrr_Int: | |
| case X86::VUNPCKHPDYrr: | |
| case X86::VUNPCKHPDrm: | |
| case X86::VUNPCKHPDrr: | |
| case X86::VUNPCKHPSYrr: | |
| case X86::VUNPCKHPSrm: | |
| case X86::VUNPCKHPSrr: | |
| case X86::VUNPCKLPDYrr: | |
| case X86::VUNPCKLPDrm: | |
| case X86::VUNPCKLPDrr: | |
| case X86::VUNPCKLPSYrr: | |
| case X86::VUNPCKLPSrm: | |
| case X86::VUNPCKLPSrr: | |
| case X86::VXORPDYrr: | |
| case X86::VXORPDrm: | |
| case X86::VXORPDrr: | |
| case X86::VXORPSYrr: | |
| case X86::VXORPSrm: | |
| case X86::VXORPSrr: | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case X86::ARPL16rr: | |
| case X86::ENTER: | |
| return; | |
| break; | |
| case X86::Int_VCMPSDrm: | |
| case X86::Int_VCMPSDrr: | |
| case X86::Int_VCMPSSrm: | |
| case X86::Int_VCMPSSrr: | |
| case X86::VCMPPDYrmi: | |
| case X86::VCMPPDYrri: | |
| case X86::VCMPPDrmi: | |
| case X86::VCMPPDrri: | |
| case X86::VCMPPSYrmi: | |
| case X86::VCMPPSYrri: | |
| case X86::VCMPPSrmi: | |
| case X86::VCMPPSrri: | |
| case X86::VCMPSDrm: | |
| case X86::VCMPSDrr: | |
| case X86::VCMPSSrm: | |
| case X86::VCMPSSrr: | |
| case X86::VPINSRBrm: | |
| case X86::VPINSRDrm: | |
| case X86::VPINSRQrm: | |
| case X86::VPINSRWrmi: | |
| printOperand(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case X86::VASTART_SAVE_XMM_REGS: | |
| case X86::VBLENDPDrmi: | |
| case X86::VBLENDPSrmi: | |
| case X86::VBLENDVPDrm: | |
| case X86::VBLENDVPSrm: | |
| case X86::VCMPPDYrmi_alt: | |
| case X86::VCMPPDrmi_alt: | |
| case X86::VCMPPSYrmi_alt: | |
| case X86::VCMPPSrmi_alt: | |
| case X86::VCMPSDrm_alt: | |
| case X86::VCMPSSrm_alt: | |
| case X86::VDPPDrmi: | |
| case X86::VDPPSrmi: | |
| case X86::VINSERTF128rm: | |
| case X86::VINSERTPSrm: | |
| case X86::VMPSADBWrmi: | |
| case X86::VPALIGNR128rm: | |
| case X86::VPBLENDVBrm: | |
| case X86::VPBLENDWrmi: | |
| case X86::VPCLMULQDQrm: | |
| case X86::VROUNDSDm: | |
| case X86::VROUNDSDm_AVX: | |
| case X86::VROUNDSSm: | |
| case X86::VROUNDSSm_AVX: | |
| case X86::VSHUFPDYrmi: | |
| case X86::VSHUFPDrmi: | |
| case X86::VSHUFPSYrmi: | |
| case X86::VSHUFPSrmi: | |
| O << ", "; | |
| switch (MI->getOpcode()) { | |
| case X86::VASTART_SAVE_XMM_REGS: printOperand(MI, 2, O); break; | |
| case X86::VBLENDPDrmi: | |
| case X86::VBLENDPSrmi: | |
| case X86::VBLENDVPDrm: | |
| case X86::VBLENDVPSrm: | |
| case X86::VCMPPDYrmi_alt: | |
| case X86::VCMPPDrmi_alt: | |
| case X86::VCMPPSYrmi_alt: | |
| case X86::VCMPPSrmi_alt: | |
| case X86::VCMPSDrm_alt: | |
| case X86::VCMPSSrm_alt: | |
| case X86::VDPPDrmi: | |
| case X86::VDPPSrmi: | |
| case X86::VINSERTF128rm: | |
| case X86::VINSERTPSrm: | |
| case X86::VMPSADBWrmi: | |
| case X86::VPALIGNR128rm: | |
| case X86::VPBLENDVBrm: | |
| case X86::VPBLENDWrmi: | |
| case X86::VPCLMULQDQrm: | |
| case X86::VROUNDSDm: | |
| case X86::VROUNDSDm_AVX: | |
| case X86::VROUNDSSm: | |
| case X86::VROUNDSSm_AVX: | |
| case X86::VSHUFPDYrmi: | |
| case X86::VSHUFPDrmi: | |
| case X86::VSHUFPSYrmi: | |
| case X86::VSHUFPSrmi: printOperand(MI, 0, O); break; | |
| } | |
| return; | |
| break; | |
| } | |
| return; | |
| } | |
| /// getRegisterName - This method is automatically generated by tblgen | |
| /// from the register set description. This returns the assembler name | |
| /// for the specified register. | |
| const char *X86ATTInstPrinter::getRegisterName(unsigned RegNo) { | |
| assert(RegNo && RegNo < 160 && "Invalid register number!"); | |
| static const unsigned RegAsmOffset[] = { | |
| 0, 3, 6, 9, 12, 15, 18, 22, 25, 28, 31, 35, 39, 43, | |
| 47, 51, 55, 59, 63, 67, 71, 76, 81, 86, 91, 96, 101, 104, | |
| 107, 110, 113, 117, 120, 124, 128, 132, 136, 140, 144, 148, 152, 155, | |
| 158, 162, 166, 170, 174, 178, 182, 188, 192, 196, 199, 203, 207, 211, | |
| 215, 219, 223, 227, 231, 235, 238, 241, 244, 248, 252, 256, 260, 264, | |
| 268, 272, 276, 279, 283, 287, 291, 294, 298, 302, 306, 310, 315, 320, | |
| 325, 329, 334, 339, 344, 348, 353, 358, 363, 367, 372, 377, 382, 386, | |
| 391, 396, 401, 405, 410, 415, 420, 424, 428, 432, 436, 440, 444, 448, | |
| 452, 456, 460, 463, 467, 470, 474, 477, 483, 489, 495, 501, 507, 513, | |
| 519, 525, 530, 535, 540, 545, 550, 555, 560, 565, 570, 575, 581, 587, | |
| 593, 599, 605, 611, 616, 621, 626, 631, 636, 641, 646, 651, 656, 661, | |
| 667, 673, 679, 685, 691, 0 | |
| }; | |
| const char *AsmStrs = | |
| "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cr0\000cr1" | |
| "\000cr2\000cr3\000cr4\000cr5\000cr6\000cr7\000cr8\000cr9\000cr10\000cr1" | |
| "1\000cr12\000cr13\000cr14\000cr15\000cs\000cx\000dh\000di\000dil\000dl\000" | |
| "dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000dr7\000ds\000dx\000eax" | |
| "\000ebp\000ebx\000ecx\000edi\000edx\000flags\000eip\000eiz\000es\000esi" | |
| "\000esp\000fp0\000fp1\000fp2\000fp3\000fp4\000fp5\000fp6\000fs\000gs\000" | |
| "ip\000mm0\000mm1\000mm2\000mm3\000mm4\000mm5\000mm6\000mm7\000r8\000r8b" | |
| "\000r8d\000r8w\000r9\000r9b\000r9d\000r9w\000r10\000r10b\000r10d\000r10" | |
| "w\000r11\000r11b\000r11d\000r11w\000r12\000r12b\000r12d\000r12w\000r13\000" | |
| "r13b\000r13d\000r13w\000r14\000r14b\000r14d\000r14w\000r15\000r15b\000r" | |
| "15d\000r15w\000rax\000rbp\000rbx\000rcx\000rdi\000rdx\000rip\000riz\000" | |
| "rsi\000rsp\000si\000sil\000sp\000spl\000ss\000st(0)\000st(1)\000st(2)\000" | |
| "st(3)\000st(4)\000st(5)\000st(6)\000st(7)\000xmm0\000xmm1\000xmm2\000xm" | |
| "m3\000xmm4\000xmm5\000xmm6\000xmm7\000xmm8\000xmm9\000xmm10\000xmm11\000" | |
| "xmm12\000xmm13\000xmm14\000xmm15\000ymm0\000ymm1\000ymm2\000ymm3\000ymm" | |
| "4\000ymm5\000ymm6\000ymm7\000ymm8\000ymm9\000ymm10\000ymm11\000ymm12\000" | |
| "ymm13\000ymm14\000ymm15\000"; | |
| assert (*(AsmStrs+RegAsmOffset[RegNo-1]) && | |
| "Invalid alt name index for register!"); | |
| return AsmStrs+RegAsmOffset[RegNo-1]; | |
| } | |
| #ifdef GET_INSTRUCTION_NAME | |
| #undef GET_INSTRUCTION_NAME | |
| /// getInstructionName: This method is automatically generated by tblgen | |
| /// from the instruction set description. This returns the enum name of the | |
| /// specified instruction. | |
| const char *X86ATTInstPrinter::getInstructionName(unsigned Opcode) { | |
| assert(Opcode < 3807 && "Invalid instruction number!"); | |
| static const unsigned InstAsmOffset[] = { | |
| 0, 4, 14, 27, 36, 45, 50, 65, 79, 92, 106, 123, 133, 146, | |
| 151, 155, 162, 169, 173, 179, 188, 197, 206, 222, 238, 254, 269, 278, | |
| 286, 295, 303, 311, 320, 328, 336, 348, 357, 365, 374, 382, 390, 399, | |
| 407, 415, 427, 436, 446, 455, 463, 473, 482, 490, 498, 510, 517, 524, | |
| 531, 538, 545, 552, 563, 572, 580, 589, 597, 605, 614, 626, 637, 645, | |
| 653, 664, 676, 685, 693, 702, 710, 718, 727, 739, 750, 758, 766, 777, | |
| 789, 798, 808, 817, 825, 835, 848, 857, 869, 877, 885, 896, 908, 915, | |
| 922, 929, 936, 943, 950, 961, 969, 977, 985, 993, 1001, 1013, 1021, 1033, | |
| 1041, 1053, 1061, 1073, 1084, 1095, 1106, 1117, 1126, 1135, 1145, 1155, 1166, 1176, | |
| 1185, 1195, 1204, 1214, 1226, 1235, 1247, 1259, 1272, 1285, 1298, 1311, 1324, 1337, | |
| 1347, 1366, 1385, 1402, 1419, 1432, 1445, 1454, 1463, 1476, 1489, 1498, 1507, 1516, | |
| 1525, 1546, 1567, 1576, 1584, 1593, 1601, 1609, 1618, 1626, 1634, 1646, 1655, 1663, | |
| 1672, 1680, 1688, 1697, 1705, 1713, 1725, 1734, 1744, 1753, 1761, 1771, 1780, 1788, | |
| 1796, 1808, 1815, 1822, 1829, 1836, 1843, 1850, 1861, 1870, 1879, 1888, 1897, 1906, | |
| 1915, 1924, 1933, 1941, 1949, 1957, 1965, 1974, 1983, 1995, 2005, 2015, 2025, 2037, | |
| 2046, 2056, 2066, 2076, 2086, 2096, 2106, 2117, 2128, 2139, 2152, 2162, 2171, 2180, | |
| 2189, 2200, 2208, 2220, 2233, 2244, 2255, 2266, 2277, 2288, 2299, 2309, 2319, 2329, | |
| 2341, 2350, 2362, 2374, 2389, 2400, 2411, 2422, 2433, 2445, 2457, 2469, 2481, 2492, | |
| 2503, 2511, 2519, 2527, 2535, 2543, 2551, 2559, 2567, 2575, 2583, 2591, 2599, 2608, | |
| 2617, 2625, 2632, 2640, 2647, 2655, 2662, 2670, 2677, 2685, 2692, 2700, 2707, 2716, | |
| 2724, 2733, 2741, 2750, 2758, 2767, 2775, 2784, 2792, 2801, 2809, 2818, 2826, 2835, | |
| 2843, 2852, 2860, 2869, 2877, 2886, 2894, 2903, 2911, 2920, 2928, 2937, 2945, 2954, | |
| 2962, 2971, 2979, 2988, 2996, 3005, 3013, 3021, 3029, 3037, 3051, 3059, 3071, 3083, | |
| 3087, 3091, 3096, 3102, 3111, 3120, 3129, 3133, 3137, 3145, 3149, 3154, 3158, 3168, | |
| 3178, 3188, 3198, 3208, 3218, 3229, 3240, 3251, 3262, 3273, 3284, 3294, 3304, 3314, | |
| 3324, 3334, 3344, 3355, 3366, 3377, 3388, 3399, 3410, 3419, 3431, 3443, 3455, 3463, | |
| 3474, 3485, 3496, 3506, 3516, 3526, 3536, 3546, 3556, 3564, 3575, 3586, 3597, 3607, | |
| 3617, 3627, 3637, 3647, 3657, 3668, 3679, 3690, 3701, 3712, 3723, 3733, 3743, 3753, | |
| 3763, 3773, 3783, 3794, 3805, 3816, 3827, 3838, 3849, 3859, 3872, 3885, 3898, 3907, | |
| 3919, 3931, 3943, 3954, 3965, 3976, 3987, 3998, 4009, 4018, 4030, 4042, 4054, 4065, | |
| 4076, 4087, 4098, 4109, 4120, 4131, 4142, 4153, 4164, 4175, 4186, 4195, 4207, 4219, | |
| 4231, 4242, 4253, 4264, 4275, 4286, 4297, 4307, 4317, 4327, 4337, 4347, 4357, 4367, | |
| 4377, 4387, 4397, 4407, 4417, 4425, 4436, 4447, 4458, 4468, 4478, 4488, 4498, 4508, | |
| 4518, 4528, 4538, 4548, 4558, 4567, 4578, 4589, 4600, 4611, 4622, 4633, 4644, 4655, | |
| 4666, 4675, 4683, 4692, 4700, 4708, 4717, 4725, 4733, 4745, 4754, 4762, 4771, 4779, | |
| 4787, 4796, 4804, 4812, 4824, 4833, 4843, 4852, 4860, 4870, 4879, 4887, 4895, 4907, | |
| 4914, 4921, 4928, 4935, 4942, 4949, 4960, 4969, 4982, 4991, 5004, 5013, 5026, 5035, | |
| 5048, 5055, 5062, 5069, 5075, 5083, 5095, 5103, 5115, 5123, 5135, 5143, 5155, 5166, | |
| 5178, 5190, 5202, 5214, 5226, 5238, 5248, 5259, 5270, 5279, 5288, 5297, 5306, 5317, | |
| 5326, 5334, 5344, 5350, 5359, 5368, 5377, 5383, 5387, 5399, 5411, 5422, 5434, 5446, | |
| 5457, 5469, 5480, 5492, 5503, 5513, 5524, 5535, 5546, 5557, 5568, 5579, 5590, 5601, | |
| 5612, 5623, 5634, 5645, 5658, 5671, 5682, 5693, 5704, 5715, 5728, 5741, 5752, 5763, | |
| 5776, 5789, 5800, 5811, 5822, 5833, 5846, 5859, 5870, 5881, 5893, 5905, 5917, 5929, | |
| 5943, 5957, 5969, 5981, 5995, 6009, 6021, 6033, 6037, 6042, 6046, 6050, 6064, 6071, | |
| 6078, 6085, 6092, 6102, 6112, 6122, 6132, 6139, 6146, 6152, 6158, 6165, 6172, 6179, | |
| 6186, 6193, 6200, 6206, 6212, 6220, 6228, 6236, 6244, 6254, 6264, 6275, 6286, 6298, | |
| 6309, 6320, 6331, 6344, 6357, 6370, 6384, 6398, 6412, 6426, 6440, 6454, 6465, 6473, | |
| 6485, 6493, 6505, 6513, 6525, 6533, 6545, 6554, 6563, 6573, 6583, 6594, 6604, 6613, | |
| 6623, 6632, 6642, 6654, 6663, 6675, 6687, 6700, 6713, 6726, 6739, 6752, 6765, 6775, | |
| 6783, 6791, 6799, 6807, 6817, 6827, 6839, 6845, 6855, 6867, 6879, 6885, 6896, 6907, | |
| 6918, 6929, 6939, 6949, 6959, 6969, 6979, 6988, 6994, 7001, 7009, 7017, 7026, 7035, | |
| 7042, 7050, 7056, 7062, 7071, 7080, 7090, 7100, 7108, 7117, 7125, 7132, 7139, 7146, | |
| 7153, 7159, 7166, 7173, 7178, 7188, 7197, 7205, 7226, 7247, 7268, 7289, 7310, 7331, | |
| 7352, 7373, 7394, 7401, 7407, 7414, 7420, 7428, 7436, 7443, 7450, 7458, 7466, 7476, | |
| 7481, 7489, 7499, 7506, 7515, 7523, 7529, 7537, 7550, 7561, 7572, 7583, 7594, 7604, | |
| 7614, 7624, 7634, 7643, 7652, 7663, 7674, 7685, 7696, 7705, 7714, 7723, 7732, 7744, | |
| 7756, 7768, 7780, 7790, 7800, 7810, 7820, 7830, 7839, 7848, 7857, 7866, 7870, 7879, | |
| 7888, 7897, 7906, 7914, 7922, 7930, 7938, 7946, 7954, 7961, 7968, 7977, 7986, 7995, | |
| 8007, 8019, 8031, 8043, 8055, 8067, 8079, 8091, 8103, 8111, 8119, 8128, 8138, 8149, | |
| 8158, 8168, 8179, 8187, 8195, 8204, 8214, 8225, 8234, 8244, 8255, 8263, 8271, 8280, | |
| 8292, 8303, 8312, 8324, 8335, 8342, 8349, 8354, 8361, 8368, 8373, 8380, 8387, 8391, | |
| 8397, 8403, 8410, 8417, 8424, 8431, 8441, 8451, 8461, 8471, 8478, 8485, 8491, 8497, | |
| 8508, 8519, 8523, 8528, 8533, 8538, 8547, 8556, 8563, 8573, 8583, 8590, 8597, 8604, | |
| 8615, 8626, 8637, 8650, 8663, 8676, 8689, 8702, 8715, 8728, 8741, 8754, 8763, 8772, | |
| 8782, 8792, 8802, 8814, 8826, 8838, 8850, 8862, 8874, 8886, 8898, 8910, 8922, 8934, | |
| 8946, 8958, 8971, 8984, 8997, 9010, 9025, 9040, 9055, 9070, 9085, 9100, 9115, 9130, | |
| 9145, 9160, 9175, 9190, 9205, 9220, 9237, 9254, 9269, 9284, 9301, 9318, 9333, 9348, | |
| 9363, 9378, 9396, 9414, 9430, 9446, 9464, 9482, 9498, 9514, 9529, 9551, 9565, 9579, | |
| 9593, 9607, 9620, 9633, 9646, 9659, 9673, 9687, 9701, 9715, 9731, 9747, 9763, 9779, | |
| 9795, 9811, 9827, 9843, 9859, 9875, 9891, 9907, 9925, 9943, 9959, 9975, 9991, 10007, | |
| 10025, 10043, 10059, 10075, 10093, 10111, 10127, 10143, 10159, 10175, 10192, 10209, 10228, 10247, | |
| 10264, 10281, 10300, 10319, 10336, 10353, 10368, 10383, 10398, 10413, 10419, 10425, 10430, 10435, | |
| 10441, 10447, 10452, 10457, 10462, 10471, 10480, 10485, 10490, 10496, 10502, 10507, 10512, 10518, | |
| 10524, 10529, 10534, 10541, 10548, 10555, 10568, 10575, 10581, 10587, 10593, 10599, 10605, 10611, | |
| 10617, 10623, 10629, 10635, 10640, 10645, 10650, 10655, 10661, 10666, 10671, 10676, 10684, 10692, | |
| 10700, 10708, 10716, 10724, 10735, 10747, 10758, 10769, 10779, 10790, 10798, 10806, 10814, 10822, | |
| 10828, 10834, 10842, 10850, 10858, 10867, 10876, 10885, 10894, 10903, 10912, 10921, 10932, 10943, | |
| 10952, 10963, 10972, 10979, 10986, 10993, 11003, 11010, 11016, 11024, 11032, 11040, 11047, 11055, | |
| 11063, 11071, 11079, 11085, 11093, 11101, 11109, 11117, 11123, 11131, 11139, 11147, 11155, 11168, | |
| 11182, 11195, 11208, 11222, 11235, 11250, 11264, 11277, 11289, 11301, 11314, 11328, 11341, 11354, | |
| 11368, 11381, 11396, 11410, 11423, 11435, 11447, 11459, 11471, 11483, 11494, 11506, 11518, 11530, | |
| 11541, 11553, 11566, 11578, 11590, 11603, 11615, 11629, 11642, 11654, 11665, 11676, 11688, 11701, | |
| 11715, 11728, 11741, 11755, 11768, 11783, 11797, 11810, 11822, 11834, 11847, 11861, 11874, 11887, | |
| 11901, 11914, 11929, 11943, 11956, 11968, 11980, 11986, 11992, 11998, 12004, 12009, 12015, 12022, | |
| 12028, 12035, 12041, 12047, 12055, 12063, 12071, 12079, 12087, 12095, 12103, 12111, 12119, 12124, | |
| 12129, 12137, 12145, 12153, 12160, 12170, 12180, 12190, 12200, 12210, 12220, 12231, 12244, 12252, | |
| 12264, 12272, 12284, 12292, 12304, 12312, 12324, 12332, 12344, 12352, 12364, 12372, 12384, 12392, | |
| 12404, 12411, 12419, 12431, 12439, 12451, 12459, 12471, 12479, 12491, 12499, 12511, 12519, 12531, | |
| 12539, 12551, 12559, 12571, 12587, 12603, 12619, 12635, 12651, 12667, 12683, 12699, 12716, 12733, | |
| 12750, 12767, 12776, 12789, 12804, 12823, 12837, 12850, 12863, 12876, 12893, 12910, 12924, 12940, | |
| 12953, 12967, 12983, 12996, 13009, 13022, 13039, 13056, 13070, 13084, 13098, 13112, 13126, 13140, | |
| 13156, 13172, 13188, 13204, 13220, 13236, 13249, 13262, 13275, 13288, 13301, 13314, 13328, 13342, | |
| 13356, 13370, 13385, 13400, 13415, 13430, 13443, 13456, 13473, 13490, 13503, 13516, 13528, 13540, | |
| 13553, 13566, 13579, 13592, 13607, 13622, 13637, 13652, 13667, 13682, 13697, 13712, 13727, 13742, | |
| 13757, 13772, 13787, 13803, 13819, 13834, 13849, 13863, 13877, 13892, 13907, 13923, 13939, 13954, | |
| 13969, 13984, 13999, 14017, 14035, 14050, 14065, 14079, 14093, 14107, 14121, 14135, 14149, 14163, | |
| 14177, 14192, 14209, 14226, 14241, 14256, 14270, 14284, 14298, 14312, 14327, 14342, 14353, 14364, | |
| 14378, 14392, 14407, 14422, 14435, 14448, 14463, 14478, 14493, 14508, 14523, 14538, 14550, 14562, | |
| 14574, 14586, 14598, 14610, 14622, 14634, 14646, 14658, 14670, 14682, 14694, 14706, 14718, 14730, | |
| 14742, 14754, 14766, 14778, 14790, 14802, 14814, 14826, 14839, 14852, 14865, 14878, 14891, 14904, | |
| 14918, 14932, 14946, 14960, 14975, 14990, 15005, 15020, 15033, 15046, 15063, 15080, 15097, 15114, | |
| 15131, 15148, 15165, 15182, 15199, 15216, 15233, 15250, 15262, 15274, 15282, 15293, 15301, 15311, | |
| 15319, 15327, 15335, 15345, 15353, 15361, 15369, 15377, 15389, 15397, 15405, 15413, 15423, 15431, | |
| 15439, 15447, 15455, 15463, 15473, 15481, 15489, 15497, 15505, 15513, 15521, 15533, 15541, 15549, | |
| 15557, 15565, 15573, 15583, 15591, 15599, 15607, 15615, 15623, 15631, 15641, 15654, 15662, 15670, | |
| 15682, 15690, 15698, 15706, 15719, 15731, 15743, 15751, 15758, 15765, 15778, 15786, 15793, 15800, | |
| 15807, 15820, 15827, 15840, 15851, 15860, 15869, 15878, 15891, 15900, 15909, 15918, 15931, 15941, | |
| 15951, 15961, 15971, 15981, 15991, 16001, 16011, 16023, 16035, 16046, 16057, 16066, 16075, 16084, | |
| 16097, 16106, 16119, 16128, 16137, 16150, 16160, 16169, 16178, 16187, 16196, 16206, 16215, 16224, | |
| 16233, 16242, 16253, 16266, 16279, 16292, 16305, 16316, 16329, 16339, 16351, 16360, 16370, 16380, | |
| 16389, 16401, 16413, 16425, 16438, 16450, 16459, 16465, 16471, 16479, 16487, 16495, 16507, 16519, | |
| 16531, 16542, 16553, 16564, 16575, 16581, 16592, 16603, 16611, 16619, 16627, 16639, 16645, 16656, | |
| 16667, 16679, 16690, 16702, 16713, 16725, 16737, 16748, 16760, 16772, 16783, 16792, 16801, 16810, | |
| 16823, 16832, 16841, 16850, 16863, 16876, 16889, 16905, 16921, 16934, 16947, 16958, 16969, 16986, | |
| 17003, 17015, 17026, 17038, 17049, 17061, 17075, 17087, 17098, 17111, 17123, 17137, 17149, 17160, | |
| 17173, 17184, 17195, 17202, 17209, 17216, 17223, 17230, 17237, 17243, 17249, 17257, 17265, 17273, | |
| 17281, 17289, 17301, 17309, 17321, 17329, 17341, 17349, 17361, 17370, 17379, 17389, 17399, 17410, | |
| 17420, 17429, 17439, 17448, 17458, 17470, 17479, 17491, 17503, 17516, 17529, 17542, 17555, 17568, | |
| 17581, 17591, 17597, 17605, 17612, 17619, 17626, 17633, 17640, 17647, 17653, 17659, 17664, 17670, | |
| 17676, 17683, 17690, 17697, 17704, 17711, 17718, 17724, 17730, 17738, 17745, 17753, 17760, 17767, | |
| 17775, 17782, 17789, 17800, 17808, 17815, 17823, 17830, 17843, 17850, 17858, 17865, 17872, 17883, | |
| 17891, 17900, 17908, 17915, 17924, 17932, 17939, 17946, 17957, 17963, 17969, 17975, 17981, 17987, | |
| 17993, 18003, 18010, 18017, 18024, 18031, 18039, 18047, 18055, 18063, 18070, 18077, 18083, 18089, | |
| 18095, 18106, 18117, 18128, 18139, 18150, 18161, 18172, 18183, 18194, 18205, 18216, 18227, 18238, | |
| 18249, 18257, 18265, 18273, 18281, 18289, 18297, 18306, 18315, 18324, 18333, 18343, 18353, 18363, | |
| 18373, 18381, 18389, 18402, 18415, 18423, 18431, 18438, 18445, 18451, 18459, 18467, 18477, 18487, | |
| 18495, 18503, 18515, 18527, 18538, 18549, 18561, 18573, 18583, 18593, 18603, 18613, 18623, 18633, | |
| 18643, 18653, 18666, 18679, 18692, 18705, 18718, 18731, 18744, 18757, 18770, 18783, 18795, 18807, | |
| 18823, 18839, 18854, 18869, 18879, 18889, 18899, 18909, 18919, 18929, 18939, 18949, 18962, 18975, | |
| 18988, 19001, 19014, 19027, 19040, 19053, 19066, 19079, 19091, 19103, 19119, 19135, 19150, 19165, | |
| 19174, 19183, 19192, 19201, 19210, 19219, 19228, 19237, 19245, 19253, 19261, 19269, 19277, 19285, | |
| 19293, 19301, 19311, 19321, 19331, 19341, 19351, 19361, 19369, 19377, 19385, 19393, 19401, 19409, | |
| 19418, 19427, 19437, 19447, 19458, 19469, 19480, 19491, 19499, 19507, 19518, 19529, 19539, 19549, | |
| 19558, 19567, 19575, 19583, 19595, 19607, 19620, 19633, 19645, 19657, 19673, 19689, 19701, 19713, | |
| 19726, 19739, 19751, 19763, 19771, 19779, 19787, 19795, 19804, 19813, 19822, 19831, 19840, 19849, | |
| 19859, 19869, 19884, 19899, 19909, 19919, 19928, 19937, 19946, 19955, 19964, 19973, 19982, 19991, | |
| 20000, 20009, 20018, 20027, 20036, 20045, 20054, 20063, 20072, 20081, 20090, 20099, 20108, 20117, | |
| 20126, 20135, 20146, 20157, 20168, 20179, 20190, 20201, 20212, 20223, 20234, 20245, 20256, 20267, | |
| 20278, 20289, 20300, 20311, 20322, 20333, 20344, 20355, 20366, 20377, 20388, 20399, 20410, 20419, | |
| 20428, 20442, 20456, 20466, 20476, 20486, 20496, 20505, 20514, 20523, 20532, 20541, 20550, 20560, | |
| 20570, 20577, 20586, 20595, 20602, 20611, 20620, 20627, 20636, 20645, 20652, 20663, 20674, 20685, | |
| 20696, 20707, 20718, 20726, 20734, 20742, 20750, 20757, 20764, 20771, 20779, 20787, 20795, 20803, | |
| 20811, 20819, 20827, 20835, 20841, 20847, 20856, 20868, 20879, 20890, 20901, 20911, 20920, 20929, | |
| 20941, 20953, 20962, 20971, 20981, 20991, 21001, 21011, 21023, 21035, 21047, 21059, 21071, 21083, | |
| 21092, 21100, 21108, 21116, 21124, 21132, 21140, 21148, 21156, 21164, 21172, 21180, 21188, 21196, | |
| 21204, 21212, 21221, 21229, 21237, 21245, 21253, 21261, 21269, 21277, 21285, 21293, 21301, 21309, | |
| 21317, 21325, 21333, 21341, 21350, 21359, 21368, 21377, 21387, 21397, 21407, 21417, 21425, 21433, | |
| 21442, 21451, 21459, 21467, 21479, 21491, 21503, 21515, 21528, 21541, 21553, 21565, 21577, 21589, | |
| 21601, 21613, 21626, 21639, 21651, 21663, 21671, 21681, 21691, 21699, 21709, 21719, 21729, 21739, | |
| 21748, 21756, 21766, 21776, 21784, 21793, 21802, 21811, 21820, 21829, 21838, 21846, 21854, 21862, | |
| 21871, 21880, 21889, 21898, 21907, 21916, 21925, 21934, 21942, 21950, 21957, 21964, 21971, 21979, | |
| 21988, 21996, 22004, 22013, 22021, 22029, 22038, 22046, 22054, 22063, 22071, 22079, 22088, 22096, | |
| 22104, 22113, 22121, 22128, 22136, 22143, 22150, 22158, 22165, 22172, 22183, 22190, 22201, 22208, | |
| 22219, 22226, 22237, 22245, 22254, 22262, 22270, 22279, 22287, 22295, 22304, 22312, 22320, 22329, | |
| 22337, 22345, 22354, 22362, 22370, 22379, 22387, 22394, 22402, 22409, 22416, 22424, 22431, 22440, | |
| 22451, 22460, 22471, 22477, 22483, 22493, 22503, 22513, 22519, 22526, 22542, 22558, 22574, 22589, | |
| 22602, 22612, 22622, 22632, 22642, 22653, 22663, 22673, 22683, 22693, 22697, 22702, 22708, 22721, | |
| 22729, 22738, 22746, 22754, 22763, 22771, 22779, 22788, 22796, 22804, 22813, 22821, 22829, 22838, | |
| 22846, 22854, 22863, 22871, 22878, 22886, 22893, 22900, 22908, 22915, 22923, 22932, 22940, 22948, | |
| 22957, 22965, 22973, 22982, 22990, 22998, 23007, 23015, 23023, 23032, 23040, 23048, 23057, 23065, | |
| 23072, 23080, 23087, 23094, 23102, 23109, 23118, 23127, 23136, 23145, 23154, 23163, 23172, 23181, | |
| 23185, 23194, 23207, 23216, 23229, 23238, 23251, 23260, 23273, 23278, 23286, 23295, 23303, 23311, | |
| 23320, 23328, 23336, 23345, 23353, 23361, 23370, 23378, 23386, 23395, 23403, 23411, 23420, 23428, | |
| 23435, 23443, 23450, 23457, 23465, 23472, 23481, 23489, 23498, 23506, 23514, 23523, 23531, 23539, | |
| 23551, 23560, 23568, 23577, 23585, 23593, 23602, 23610, 23618, 23630, 23639, 23649, 23658, 23666, | |
| 23676, 23685, 23693, 23701, 23713, 23720, 23727, 23734, 23741, 23748, 23755, 23766, 23773, 23780, | |
| 23787, 23793, 23807, 23821, 23828, 23835, 23841, 23847, 23854, 23861, 23871, 23881, 23891, 23900, | |
| 23906, 23912, 23918, 23924, 23931, 23938, 23944, 23950, 23957, 23964, 23970, 23976, 23983, 23990, | |
| 23997, 24004, 24011, 24018, 24025, 24032, 24038, 24044, 24050, 24056, 24062, 24068, 24075, 24083, | |
| 24089, 24097, 24106, 24114, 24122, 24131, 24139, 24147, 24156, 24164, 24172, 24181, 24189, 24197, | |
| 24206, 24214, 24222, 24231, 24239, 24246, 24254, 24261, 24268, 24276, 24283, 24294, 24305, 24316, | |
| 24327, 24338, 24349, 24360, 24371, 24382, 24393, 24404, 24415, 24423, 24432, 24440, 24448, 24457, | |
| 24465, 24473, 24482, 24490, 24498, 24507, 24515, 24523, 24532, 24540, 24548, 24557, 24565, 24572, | |
| 24580, 24587, 24594, 24602, 24609, 24620, 24631, 24642, 24653, 24664, 24675, 24686, 24697, 24708, | |
| 24719, 24730, 24741, 24751, 24761, 24771, 24781, 24789, 24795, 24801, 24810, 24819, 24828, 24836, | |
| 24844, 24852, 24860, 24868, 24876, 24884, 24892, 24900, 24908, 24920, 24928, 24940, 24948, 24960, | |
| 24968, 24980, 24988, 25000, 25008, 25020, 25028, 25040, 25048, 25060, 25067, 25077, 25087, 25097, | |
| 25107, 25111, 25115, 25119, 25127, 25133, 25139, 25145, 25151, 25158, 25165, 25172, 25177, 25185, | |
| 25193, 25202, 25211, 25220, 25228, 25237, 25246, 25257, 25268, 25279, 25289, 25299, 25311, 25321, | |
| 25333, 25345, 25352, 25361, 25369, 25378, 25386, 25394, 25403, 25411, 25419, 25431, 25440, 25448, | |
| 25457, 25465, 25473, 25482, 25490, 25498, 25510, 25519, 25529, 25538, 25546, 25556, 25565, 25573, | |
| 25581, 25593, 25600, 25607, 25614, 25621, 25628, 25635, 25646, 25654, 25662, 25670, 25678, 25688, | |
| 25698, 25709, 25720, 25732, 25743, 25754, 25765, 25778, 25791, 25804, 25818, 25832, 25846, 25860, | |
| 25874, 25888, 25899, 25907, 25919, 25927, 25939, 25947, 25959, 25967, 25979, 25988, 25997, 26007, | |
| 26017, 26028, 26038, 26047, 26057, 26066, 26076, 26088, 26097, 26109, 26121, 26134, 26147, 26160, | |
| 26173, 26186, 26199, 26209, 26216, 26224, 26233, 26241, 26251, 26259, 26267, 26276, 26287, 26296, | |
| 26307, 26316, 26327, 26338, 26351, 26362, 26375, 26386, 26399, 26409, 26418, 26427, 26436, 26445, | |
| 26455, 26464, 26473, 26482, 26491, 26501, 26512, 26523, 26532, 26541, 26549, 26557, 26565, 26579, | |
| 26587, 26595, 26606, 26617, 26628, 26639, 26644, 26650, 26659, 26668, 26677, 26687, 26697, 26707, | |
| 26717, 26727, 26737, 26747, 26757, 26767, 26777, 26787, 26796, 26806, 26815, 26827, 26839, 26851, | |
| 26862, 26873, 26884, 26892, 26897, 26908, 26919, 26930, 26941, 26952, 26963, 26974, 26985, 26994, | |
| 27004, 27014, 27023, 27032, 27042, 27052, 27061, 27070, 27079, 27092, 27101, 27114, 27123, 27136, | |
| 27145, 27158, 27171, 27184, 27196, 27208, 27221, 27234, 27246, 27258, 27272, 27286, 27296, 27306, | |
| 27320, 27334, 27344, 27354, 27364, 27374, 27396, 27418, 27429, 27440, 27450, 27460, 27471, 27482, | |
| 27492, 27502, 27512, 27522, 27531, 27540, 27550, 27560, 27569, 27578, 27600, 27613, 27626, 27638, | |
| 27650, 27663, 27676, 27688, 27700, 27713, 27726, 27738, 27750, 27763, 27776, 27788, 27800, 27815, | |
| 27828, 27841, 27855, 27866, 27881, 27892, 27907, 27917, 27931, 27941, 27955, 27966, 27981, 27992, | |
| 28007, 28017, 28031, 28041, 28055, 28064, 28077, 28086, 28099, 28108, 28121, 28130, 28143, 28153, | |
| 28163, 28173, 28183, 28196, 28209, 28221, 28233, 28246, 28259, 28271, 28283, 28297, 28310, 28323, | |
| 28336, 28349, 28361, 28375, 28388, 28401, 28414, 28427, 28439, 28452, 28465, 28477, 28489, 28502, | |
| 28515, 28527, 28539, 28552, 28565, 28577, 28589, 28602, 28615, 28627, 28639, 28653, 28667, 28679, | |
| 28691, 28703, 28715, 28729, 28743, 28756, 28769, 28781, 28793, 28807, 28821, 28833, 28845, 28857, | |
| 28869, 28883, 28897, 28909, 28921, 28936, 28950, 28964, 28978, 28992, 29005, 29018, 29032, 29046, | |
| 29059, 29072, 29087, 29102, 29115, 29128, 29143, 29158, 29171, 29184, 29194, 29204, 29213, 29222, | |
| 29232, 29242, 29251, 29260, 29269, 29282, 29291, 29304, 29313, 29326, 29335, 29348, 29357, 29366, | |
| 29376, 29386, 29395, 29404, 29410, 29416, 29422, 29428, 29443, 29458, 29471, 29484, 29499, 29513, | |
| 29528, 29542, 29557, 29571, 29586, 29600, 29615, 29629, 29644, 29658, 29673, 29687, 29702, 29716, | |
| 29731, 29745, 29760, 29774, 29789, 29803, 29818, 29832, 29847, 29864, 29882, 29899, 29917, 29934, | |
| 29952, 29969, 29987, 30004, 30022, 30039, 30057, 30074, 30092, 30109, 30127, 30144, 30162, 30179, | |
| 30197, 30214, 30232, 30249, 30267, 30284, 30302, 30319, 30337, 30354, 30372, 30389, 30407, 30424, | |
| 30442, 30459, 30477, 30494, 30512, 30529, 30547, 30564, 30582, 30599, 30617, 30634, 30652, 30669, | |
| 30687, 30701, 30716, 30730, 30745, 30759, 30774, 30788, 30803, 30817, 30832, 30846, 30861, 30875, | |
| 30890, 30904, 30919, 30933, 30948, 30962, 30977, 30991, 31006, 31020, 31035, 31050, 31066, 31081, | |
| 31097, 31112, 31128, 31143, 31159, 31174, 31190, 31205, 31221, 31236, 31252, 31267, 31283, 31298, | |
| 31314, 31329, 31345, 31360, 31376, 31391, 31407, 31422, 31438, 31453, 31469, 31484, 31500, 31515, | |
| 31531, 31546, 31562, 31577, 31593, 31608, 31624, 31639, 31655, 31670, 31686, 31701, 31717, 31732, | |
| 31748, 31763, 31779, 31791, 31803, 31815, 31827, 31838, 31849, 31860, 31871, 31881, 31891, 31901, | |
| 31911, 31922, 31933, 31944, 31955, 31966, 31977, 31987, 31997, 32008, 32019, 32029, 32039, 32050, | |
| 32061, 32071, 32081, 32092, 32103, 32113, 32123, 32137, 32151, 32163, 32175, 32185, 32194, 32203, | |
| 32215, 32229, 32243, 32257, 32270, 32283, 32297, 32311, 32324, 32337, 32347, 32361, 32371, 32385, | |
| 32394, 32407, 32416, 32429, 32439, 32453, 32463, 32477, 32486, 32499, 32508, 32521, 32530, 32543, | |
| 32552, 32565, 32574, 32587, 32596, 32609, 32616, 32625, 32635, 32649, 32659, 32673, 32682, 32695, | |
| 32704, 32717, 32727, 32741, 32751, 32765, 32774, 32787, 32796, 32809, 32818, 32831, 32840, 32853, | |
| 32862, 32875, 32884, 32897, 32906, 32920, 32933, 32946, 32957, 32968, 32979, 32994, 33004, 33014, | |
| 33024, 33038, 33049, 33060, 33071, 33086, 33096, 33106, 33116, 33130, 33142, 33154, 33165, 33176, | |
| 33189, 33202, 33214, 33226, 33237, 33248, 33259, 33274, 33284, 33294, 33304, 33318, 33329, 33340, | |
| 33351, 33366, 33376, 33390, 33400, 33410, 33424, 33435, 33445, 33455, 33465, 33475, 33486, 33496, | |
| 33506, 33516, 33526, 33538, 33553, 33568, 33583, 33597, 33611, 33625, 33640, 33655, 33670, 33684, | |
| 33698, 33712, 33724, 33739, 33751, 33765, 33776, 33788, 33799, 33811, 33822, 33835, 33848, 33861, | |
| 33875, 33888, 33899, 33914, 33925, 33935, 33944, 33953, 33962, 33975, 33988, 34001, 34014, 34027, | |
| 34039, 34051, 34064, 34077, 34089, 34101, 34113, 34125, 34134, 34143, 34152, 34165, 34176, 34187, | |
| 34198, 34213, 34223, 34233, 34243, 34257, 34268, 34279, 34290, 34305, 34315, 34325, 34335, 34349, | |
| 34363, 34377, 34394, 34411, 34425, 34439, 34451, 34463, 34472, 34481, 34492, 34503, 34514, 34525, | |
| 34534, 34544, 34554, 34563, 34572, 34582, 34592, 34601, 34610, 34619, 34632, 34641, 34654, 34663, | |
| 34676, 34685, 34698, 34710, 34722, 34734, 34746, 34753, 34759, 34768, 34777, 34785, 34793, 34802, | |
| 34811, 34819, 34827, 34839, 34851, 34863, 34875, 34887, 34899, 34911, 34923, 34935, 34947, 34959, | |
| 34971, 34983, 34995, 35004, 35013, 35022, 35031, 35040, 35049, 35059, 35069, 35079, 35089, 35100, | |
| 35111, 35122, 35133, 35142, 35151, 35165, 35179, 35188, 35197, 35205, 35213, 35222, 35231, 35240, | |
| 35249, 35261, 35273, 35285, 35297, 35310, 35323, 35334, 35345, 35356, 35367, 35378, 35389, 35400, | |
| 35411, 35425, 35439, 35453, 35467, 35481, 35495, 35509, 35523, 35537, 35551, 35564, 35577, 35594, | |
| 35611, 35627, 35643, 35654, 35665, 35676, 35687, 35698, 35709, 35720, 35731, 35745, 35759, 35773, | |
| 35787, 35801, 35815, 35829, 35843, 35857, 35871, 35884, 35897, 35914, 35931, 35947, 35963, 35976, | |
| 35989, 36002, 36015, 36028, 36041, 36053, 36065, 36077, 36089, 36102, 36115, 36128, 36141, 36153, | |
| 36165, 36177, 36189, 36199, 36209, 36221, 36231, 36241, 36251, 36261, 36271, 36281, 36294, 36307, | |
| 36321, 36335, 36348, 36361, 36378, 36395, 36408, 36421, 36435, 36449, 36462, 36475, 36485, 36495, | |
| 36505, 36515, 36525, 36535, 36546, 36559, 36570, 36586, 36602, 36613, 36624, 36634, 36644, 36654, | |
| 36664, 36674, 36684, 36694, 36704, 36714, 36724, 36734, 36744, 36754, 36764, 36774, 36784, 36794, | |
| 36804, 36814, 36824, 36834, 36844, 36854, 36864, 36878, 36890, 36902, 36914, 36926, 36938, 36950, | |
| 36962, 36974, 36986, 36998, 37010, 37022, 37034, 37046, 37058, 37070, 37082, 37094, 37106, 37118, | |
| 37130, 37142, 37154, 37166, 37178, 37188, 37198, 37213, 37228, 37239, 37250, 37260, 37270, 37280, | |
| 37290, 37300, 37310, 37321, 37332, 37339, 37346, 37356, 37366, 37379, 37392, 37402, 37412, 37423, | |
| 37434, 37445, 37456, 37469, 37482, 37495, 37508, 37521, 37534, 37544, 37553, 37562, 37571, 37580, | |
| 37589, 37598, 37607, 37616, 37625, 37634, 37643, 37652, 37661, 37670, 37679, 37689, 37698, 37707, | |
| 37716, 37725, 37734, 37743, 37752, 37761, 37770, 37779, 37788, 37797, 37806, 37815, 37824, 37834, | |
| 37844, 37854, 37864, 37875, 37886, 37897, 37908, 37917, 37926, 37936, 37946, 37955, 37964, 37977, | |
| 37990, 38003, 38016, 38030, 38044, 38057, 38070, 38083, 38096, 38109, 38122, 38136, 38150, 38163, | |
| 38176, 38184, 38192, 38201, 38214, 38223, 38236, 38244, 38256, 38264, 38276, 38284, 38296, 38304, | |
| 38314, 38328, 38338, 38352, 38362, 38376, 38386, 38400, 38410, 38424, 38434, 38448, 38458, 38472, | |
| 38482, 38496, 38507, 38522, 38533, 38548, 38559, 38574, 38585, 38600, 38611, 38626, 38637, 38652, | |
| 38662, 38676, 38686, 38700, 38710, 38724, 38734, 38746, 38758, 38769, 38780, 38792, 38804, 38815, | |
| 38826, 38836, 38850, 38860, 38874, 38883, 38896, 38905, 38918, 38928, 38942, 38952, 38966, 38975, | |
| 38988, 38997, 39010, 39019, 39032, 39041, 39050, 39063, 39072, 39081, 39091, 39101, 39110, 39119, | |
| 39129, 39139, 39148, 39157, 39166, 39179, 39188, 39201, 39210, 39223, 39232, 39245, 39256, 39267, | |
| 39277, 39287, 39298, 39309, 39319, 39329, 39340, 39351, 39362, 39373, 39386, 39399, 39411, 39423, | |
| 39436, 39449, 39461, 39473, 39486, 39499, 39511, 39523, 39536, 39549, 39561, 39573, 39583, 39593, | |
| 39602, 39611, 39621, 39631, 39640, 39649, 39658, 39669, 39676, 39689, 39699, 39704, 39711, 39722, | |
| 39739, 39750, 39761, 39770, 39781, 39790, 39801, 39807, 39816, 39825, 39834, 39843, 39852, 39861, | |
| 39869, 39877, 39886, 39895, 39904, 39913, 39924, 39933, 39942, 39951, 39960, 39969, 39977, 39985, | |
| 39991, 40001, 40011, 40021, 40031, 40041, 40048, 40053, 40062, 40070, 40079, 40087, 40095, 40104, | |
| 40112, 40120, 40132, 40141, 40149, 40158, 40166, 40174, 40183, 40191, 40199, 40211, 40220, 40230, | |
| 40239, 40247, 40257, 40266, 40274, 40282, 40294, 40301, 40308, 40315, 40322, 40329, 40336, 40347, | |
| 40355, 40363, 40371, 40379, 40386, 40395, 40401, 40409, 40418, 40429, 40436, 40442, 40450, 0 | |
| }; | |
| const char *Strs = | |
| "PHI\000INLINEASM\000PROLOG_LABEL\000EH_LABEL\000GC_LABEL\000KILL\000EXT" | |
| "RACT_SUBREG\000INSERT_SUBREG\000IMPLICIT_DEF\000SUBREG_TO_REG\000COPY_T" | |
| "O_REGCLASS\000DBG_VALUE\000REG_SEQUENCE\000COPY\000AAA\000AAD8i8\000AAM" | |
| "8i8\000AAS\000ABS_F\000ABS_Fp32\000ABS_Fp64\000ABS_Fp80\000ACQUIRE_MOV1" | |
| "6rm\000ACQUIRE_MOV32rm\000ACQUIRE_MOV64rm\000ACQUIRE_MOV8rm\000ADC16i16" | |
| "\000ADC16mi\000ADC16mi8\000ADC16mr\000ADC16ri\000ADC16ri8\000ADC16rm\000" | |
| "ADC16rr\000ADC16rr_REV\000ADC32i32\000ADC32mi\000ADC32mi8\000ADC32mr\000" | |
| "ADC32ri\000ADC32ri8\000ADC32rm\000ADC32rr\000ADC32rr_REV\000ADC64i32\000" | |
| "ADC64mi32\000ADC64mi8\000ADC64mr\000ADC64ri32\000ADC64ri8\000ADC64rm\000" | |
| "ADC64rr\000ADC64rr_REV\000ADC8i8\000ADC8mi\000ADC8mr\000ADC8ri\000ADC8r" | |
| "m\000ADC8rr\000ADC8rr_REV\000ADD16i16\000ADD16mi\000ADD16mi8\000ADD16mr" | |
| "\000ADD16ri\000ADD16ri8\000ADD16ri8_DB\000ADD16ri_DB\000ADD16rm\000ADD1" | |
| "6rr\000ADD16rr_DB\000ADD16rr_REV\000ADD32i32\000ADD32mi\000ADD32mi8\000" | |
| "ADD32mr\000ADD32ri\000ADD32ri8\000ADD32ri8_DB\000ADD32ri_DB\000ADD32rm\000" | |
| "ADD32rr\000ADD32rr_DB\000ADD32rr_REV\000ADD64i32\000ADD64mi32\000ADD64m" | |
| "i8\000ADD64mr\000ADD64ri32\000ADD64ri32_DB\000ADD64ri8\000ADD64ri8_DB\000" | |
| "ADD64rm\000ADD64rr\000ADD64rr_DB\000ADD64rr_REV\000ADD8i8\000ADD8mi\000" | |
| "ADD8mr\000ADD8ri\000ADD8rm\000ADD8rr\000ADD8rr_REV\000ADDPDrm\000ADDPDr" | |
| "r\000ADDPSrm\000ADDPSrr\000ADDSDrm\000ADDSDrm_Int\000ADDSDrr\000ADDSDrr" | |
| "_Int\000ADDSSrm\000ADDSSrm_Int\000ADDSSrr\000ADDSSrr_Int\000ADDSUBPDrm\000" | |
| "ADDSUBPDrr\000ADDSUBPSrm\000ADDSUBPSrr\000ADD_F32m\000ADD_F64m\000ADD_F" | |
| "I16m\000ADD_FI32m\000ADD_FPrST0\000ADD_FST0r\000ADD_Fp32\000ADD_Fp32m\000" | |
| "ADD_Fp64\000ADD_Fp64m\000ADD_Fp64m32\000ADD_Fp80\000ADD_Fp80m32\000ADD_" | |
| "Fp80m64\000ADD_FpI16m32\000ADD_FpI16m64\000ADD_FpI16m80\000ADD_FpI32m32" | |
| "\000ADD_FpI32m64\000ADD_FpI32m80\000ADD_FrST0\000ADJCALLSTACKDOWN32\000" | |
| "ADJCALLSTACKDOWN64\000ADJCALLSTACKUP32\000ADJCALLSTACKUP64\000AESDECLAS" | |
| "Trm\000AESDECLASTrr\000AESDECrm\000AESDECrr\000AESENCLASTrm\000AESENCLA" | |
| "STrr\000AESENCrm\000AESENCrr\000AESIMCrm\000AESIMCrr\000AESKEYGENASSIST" | |
| "128rm\000AESKEYGENASSIST128rr\000AND16i16\000AND16mi\000AND16mi8\000AND" | |
| "16mr\000AND16ri\000AND16ri8\000AND16rm\000AND16rr\000AND16rr_REV\000AND" | |
| "32i32\000AND32mi\000AND32mi8\000AND32mr\000AND32ri\000AND32ri8\000AND32" | |
| "rm\000AND32rr\000AND32rr_REV\000AND64i32\000AND64mi32\000AND64mi8\000AN" | |
| "D64mr\000AND64ri32\000AND64ri8\000AND64rm\000AND64rr\000AND64rr_REV\000" | |
| "AND8i8\000AND8mi\000AND8mr\000AND8ri\000AND8rm\000AND8rr\000AND8rr_REV\000" | |
| "ANDN32rm\000ANDN32rr\000ANDN64rm\000ANDN64rr\000ANDNPDrm\000ANDNPDrr\000" | |
| "ANDNPSrm\000ANDNPSrr\000ANDPDrm\000ANDPDrr\000ANDPSrm\000ANDPSrr\000ARP" | |
| "L16mr\000ARPL16rr\000ATOMADD6432\000ATOMAND16\000ATOMAND32\000ATOMAND64" | |
| "\000ATOMAND6432\000ATOMAND8\000ATOMMAX16\000ATOMMAX32\000ATOMMAX64\000A" | |
| "TOMMIN16\000ATOMMIN32\000ATOMMIN64\000ATOMNAND16\000ATOMNAND32\000ATOMN" | |
| "AND64\000ATOMNAND6432\000ATOMNAND8\000ATOMOR16\000ATOMOR32\000ATOMOR64\000" | |
| "ATOMOR6432\000ATOMOR8\000ATOMSUB6432\000ATOMSWAP6432\000ATOMUMAX16\000A" | |
| "TOMUMAX32\000ATOMUMAX64\000ATOMUMIN16\000ATOMUMIN32\000ATOMUMIN64\000AT" | |
| "OMXOR16\000ATOMXOR32\000ATOMXOR64\000ATOMXOR6432\000ATOMXOR8\000AVX_SET" | |
| "0PDY\000AVX_SET0PSY\000AVX_SETALLONES\000BLENDPDrmi\000BLENDPDrri\000BL" | |
| "ENDPSrmi\000BLENDPSrri\000BLENDVPDrm0\000BLENDVPDrr0\000BLENDVPSrm0\000" | |
| "BLENDVPSrr0\000BOUNDS16rm\000BOUNDS32rm\000BSF16rm\000BSF16rr\000BSF32r" | |
| "m\000BSF32rr\000BSF64rm\000BSF64rr\000BSR16rm\000BSR16rr\000BSR32rm\000" | |
| "BSR32rr\000BSR64rm\000BSR64rr\000BSWAP32r\000BSWAP64r\000BT16mi8\000BT1" | |
| "6mr\000BT16ri8\000BT16rr\000BT32mi8\000BT32mr\000BT32ri8\000BT32rr\000B" | |
| "T64mi8\000BT64mr\000BT64ri8\000BT64rr\000BTC16mi8\000BTC16mr\000BTC16ri" | |
| "8\000BTC16rr\000BTC32mi8\000BTC32mr\000BTC32ri8\000BTC32rr\000BTC64mi8\000" | |
| "BTC64mr\000BTC64ri8\000BTC64rr\000BTR16mi8\000BTR16mr\000BTR16ri8\000BT" | |
| "R16rr\000BTR32mi8\000BTR32mr\000BTR32ri8\000BTR32rr\000BTR64mi8\000BTR6" | |
| "4mr\000BTR64ri8\000BTR64rr\000BTS16mi8\000BTS16mr\000BTS16ri8\000BTS16r" | |
| "r\000BTS32mi8\000BTS32mr\000BTS32ri8\000BTS32rr\000BTS64mi8\000BTS64mr\000" | |
| "BTS64ri8\000BTS64rr\000CALL32m\000CALL32r\000CALL64m\000CALL64pcrel32\000" | |
| "CALL64r\000CALLpcrel16\000CALLpcrel32\000CBW\000CDQ\000CDQE\000CHS_F\000" | |
| "CHS_Fp32\000CHS_Fp64\000CHS_Fp80\000CLC\000CLD\000CLFLUSH\000CLI\000CLT" | |
| "S\000CMC\000CMOVA16rm\000CMOVA16rr\000CMOVA32rm\000CMOVA32rr\000CMOVA64" | |
| "rm\000CMOVA64rr\000CMOVAE16rm\000CMOVAE16rr\000CMOVAE32rm\000CMOVAE32rr" | |
| "\000CMOVAE64rm\000CMOVAE64rr\000CMOVB16rm\000CMOVB16rr\000CMOVB32rm\000" | |
| "CMOVB32rr\000CMOVB64rm\000CMOVB64rr\000CMOVBE16rm\000CMOVBE16rr\000CMOV" | |
| "BE32rm\000CMOVBE32rr\000CMOVBE64rm\000CMOVBE64rr\000CMOVBE_F\000CMOVBE_" | |
| "Fp32\000CMOVBE_Fp64\000CMOVBE_Fp80\000CMOVB_F\000CMOVB_Fp32\000CMOVB_Fp" | |
| "64\000CMOVB_Fp80\000CMOVE16rm\000CMOVE16rr\000CMOVE32rm\000CMOVE32rr\000" | |
| "CMOVE64rm\000CMOVE64rr\000CMOVE_F\000CMOVE_Fp32\000CMOVE_Fp64\000CMOVE_" | |
| "Fp80\000CMOVG16rm\000CMOVG16rr\000CMOVG32rm\000CMOVG32rr\000CMOVG64rm\000" | |
| "CMOVG64rr\000CMOVGE16rm\000CMOVGE16rr\000CMOVGE32rm\000CMOVGE32rr\000CM" | |
| "OVGE64rm\000CMOVGE64rr\000CMOVL16rm\000CMOVL16rr\000CMOVL32rm\000CMOVL3" | |
| "2rr\000CMOVL64rm\000CMOVL64rr\000CMOVLE16rm\000CMOVLE16rr\000CMOVLE32rm" | |
| "\000CMOVLE32rr\000CMOVLE64rm\000CMOVLE64rr\000CMOVNBE_F\000CMOVNBE_Fp32" | |
| "\000CMOVNBE_Fp64\000CMOVNBE_Fp80\000CMOVNB_F\000CMOVNB_Fp32\000CMOVNB_F" | |
| "p64\000CMOVNB_Fp80\000CMOVNE16rm\000CMOVNE16rr\000CMOVNE32rm\000CMOVNE3" | |
| "2rr\000CMOVNE64rm\000CMOVNE64rr\000CMOVNE_F\000CMOVNE_Fp32\000CMOVNE_Fp" | |
| "64\000CMOVNE_Fp80\000CMOVNO16rm\000CMOVNO16rr\000CMOVNO32rm\000CMOVNO32" | |
| "rr\000CMOVNO64rm\000CMOVNO64rr\000CMOVNP16rm\000CMOVNP16rr\000CMOVNP32r" | |
| "m\000CMOVNP32rr\000CMOVNP64rm\000CMOVNP64rr\000CMOVNP_F\000CMOVNP_Fp32\000" | |
| "CMOVNP_Fp64\000CMOVNP_Fp80\000CMOVNS16rm\000CMOVNS16rr\000CMOVNS32rm\000" | |
| "CMOVNS32rr\000CMOVNS64rm\000CMOVNS64rr\000CMOVO16rm\000CMOVO16rr\000CMO" | |
| "VO32rm\000CMOVO32rr\000CMOVO64rm\000CMOVO64rr\000CMOVP16rm\000CMOVP16rr" | |
| "\000CMOVP32rm\000CMOVP32rr\000CMOVP64rm\000CMOVP64rr\000CMOVP_F\000CMOV" | |
| "P_Fp32\000CMOVP_Fp64\000CMOVP_Fp80\000CMOVS16rm\000CMOVS16rr\000CMOVS32" | |
| "rm\000CMOVS32rr\000CMOVS64rm\000CMOVS64rr\000CMOV_FR32\000CMOV_FR64\000" | |
| "CMOV_GR16\000CMOV_GR32\000CMOV_GR8\000CMOV_RFP32\000CMOV_RFP64\000CMOV_" | |
| "RFP80\000CMOV_V2F64\000CMOV_V2I64\000CMOV_V4F32\000CMOV_V4F64\000CMOV_V" | |
| "4I64\000CMOV_V8F32\000CMP16i16\000CMP16mi\000CMP16mi8\000CMP16mr\000CMP" | |
| "16ri\000CMP16ri8\000CMP16rm\000CMP16rr\000CMP16rr_REV\000CMP32i32\000CM" | |
| "P32mi\000CMP32mi8\000CMP32mr\000CMP32ri\000CMP32ri8\000CMP32rm\000CMP32" | |
| "rr\000CMP32rr_REV\000CMP64i32\000CMP64mi32\000CMP64mi8\000CMP64mr\000CM" | |
| "P64ri32\000CMP64ri8\000CMP64rm\000CMP64rr\000CMP64rr_REV\000CMP8i8\000C" | |
| "MP8mi\000CMP8mr\000CMP8ri\000CMP8rm\000CMP8rr\000CMP8rr_REV\000CMPPDrmi" | |
| "\000CMPPDrmi_alt\000CMPPDrri\000CMPPDrri_alt\000CMPPSrmi\000CMPPSrmi_al" | |
| "t\000CMPPSrri\000CMPPSrri_alt\000CMPS16\000CMPS32\000CMPS64\000CMPS8\000" | |
| "CMPSDrm\000CMPSDrm_alt\000CMPSDrr\000CMPSDrr_alt\000CMPSSrm\000CMPSSrm_" | |
| "alt\000CMPSSrr\000CMPSSrr_alt\000CMPXCHG16B\000CMPXCHG16rm\000CMPXCHG16" | |
| "rr\000CMPXCHG32rm\000CMPXCHG32rr\000CMPXCHG64rm\000CMPXCHG64rr\000CMPXC" | |
| "HG8B\000CMPXCHG8rm\000CMPXCHG8rr\000COMISDrm\000COMISDrr\000COMISSrm\000" | |
| "COMISSrr\000COMP_FST0r\000COM_FIPr\000COM_FIr\000COM_FST0r\000COS_F\000" | |
| "COS_Fp32\000COS_Fp64\000COS_Fp80\000CPUID\000CQO\000CRC32r32m16\000CRC3" | |
| "2r32m32\000CRC32r32m8\000CRC32r32r16\000CRC32r32r32\000CRC32r32r8\000CR" | |
| "C32r64m64\000CRC32r64m8\000CRC32r64r64\000CRC32r64r8\000CS_PREFIX\000CV" | |
| "TDQ2PDrm\000CVTDQ2PDrr\000CVTDQ2PSrm\000CVTDQ2PSrr\000CVTPD2DQrm\000CVT" | |
| "PD2DQrr\000CVTPD2PSrm\000CVTPD2PSrr\000CVTPS2DQrm\000CVTPS2DQrr\000CVTP" | |
| "S2PDrm\000CVTPS2PDrr\000CVTSD2SI64rm\000CVTSD2SI64rr\000CVTSD2SIrm\000C" | |
| "VTSD2SIrr\000CVTSD2SSrm\000CVTSD2SSrr\000CVTSI2SD64rm\000CVTSI2SD64rr\000" | |
| "CVTSI2SDrm\000CVTSI2SDrr\000CVTSI2SS64rm\000CVTSI2SS64rr\000CVTSI2SSrm\000" | |
| "CVTSI2SSrr\000CVTSS2SDrm\000CVTSS2SDrr\000CVTSS2SI64rm\000CVTSS2SI64rr\000" | |
| "CVTSS2SIrm\000CVTSS2SIrr\000CVTTPD2DQrm\000CVTTPD2DQrr\000CVTTPS2DQrm\000" | |
| "CVTTPS2DQrr\000CVTTSD2SI64rm\000CVTTSD2SI64rr\000CVTTSD2SIrm\000CVTTSD2" | |
| "SIrr\000CVTTSS2SI64rm\000CVTTSS2SI64rr\000CVTTSS2SIrm\000CVTTSS2SIrr\000" | |
| "CWD\000CWDE\000DAA\000DAS\000DATA16_PREFIX\000DEC16m\000DEC16r\000DEC32" | |
| "m\000DEC32r\000DEC64_16m\000DEC64_16r\000DEC64_32m\000DEC64_32r\000DEC6" | |
| "4m\000DEC64r\000DEC8m\000DEC8r\000DIV16m\000DIV16r\000DIV32m\000DIV32r\000" | |
| "DIV64m\000DIV64r\000DIV8m\000DIV8r\000DIVPDrm\000DIVPDrr\000DIVPSrm\000" | |
| "DIVPSrr\000DIVR_F32m\000DIVR_F64m\000DIVR_FI16m\000DIVR_FI32m\000DIVR_F" | |
| "PrST0\000DIVR_FST0r\000DIVR_Fp32m\000DIVR_Fp64m\000DIVR_Fp64m32\000DIVR" | |
| "_Fp80m32\000DIVR_Fp80m64\000DIVR_FpI16m32\000DIVR_FpI16m64\000DIVR_FpI1" | |
| "6m80\000DIVR_FpI32m32\000DIVR_FpI32m64\000DIVR_FpI32m80\000DIVR_FrST0\000" | |
| "DIVSDrm\000DIVSDrm_Int\000DIVSDrr\000DIVSDrr_Int\000DIVSSrm\000DIVSSrm_" | |
| "Int\000DIVSSrr\000DIVSSrr_Int\000DIV_F32m\000DIV_F64m\000DIV_FI16m\000D" | |
| "IV_FI32m\000DIV_FPrST0\000DIV_FST0r\000DIV_Fp32\000DIV_Fp32m\000DIV_Fp6" | |
| "4\000DIV_Fp64m\000DIV_Fp64m32\000DIV_Fp80\000DIV_Fp80m32\000DIV_Fp80m64" | |
| "\000DIV_FpI16m32\000DIV_FpI16m64\000DIV_FpI16m80\000DIV_FpI32m32\000DIV" | |
| "_FpI32m64\000DIV_FpI32m80\000DIV_FrST0\000DPPDrmi\000DPPDrri\000DPPSrmi" | |
| "\000DPPSrri\000DS_PREFIX\000EH_RETURN\000EH_RETURN64\000ENTER\000ES_PRE" | |
| "FIX\000EXTRACTPSmr\000EXTRACTPSrr\000F2XM1\000FARCALL16i\000FARCALL16m\000" | |
| "FARCALL32i\000FARCALL32m\000FARCALL64\000FARJMP16i\000FARJMP16m\000FARJ" | |
| "MP32i\000FARJMP32m\000FARJMP64\000FBLDm\000FBSTPm\000FCOM32m\000FCOM64m" | |
| "\000FCOMP32m\000FCOMP64m\000FCOMPP\000FDECSTP\000FEMMS\000FFREE\000FICO" | |
| "M16m\000FICOM32m\000FICOMP16m\000FICOMP32m\000FINCSTP\000FLDCW16m\000FL" | |
| "DENVm\000FLDL2E\000FLDL2T\000FLDLG2\000FLDLN2\000FLDPI\000FNCLEX\000FNI" | |
| "NIT\000FNOP\000FNSTCW16m\000FNSTSW8r\000FNSTSWm\000FP32_TO_INT16_IN_MEM" | |
| "\000FP32_TO_INT32_IN_MEM\000FP32_TO_INT64_IN_MEM\000FP64_TO_INT16_IN_ME" | |
| "M\000FP64_TO_INT32_IN_MEM\000FP64_TO_INT64_IN_MEM\000FP80_TO_INT16_IN_M" | |
| "EM\000FP80_TO_INT32_IN_MEM\000FP80_TO_INT64_IN_MEM\000FPATAN\000FPREM\000" | |
| "FPREM1\000FPTAN\000FRNDINT\000FRSTORm\000FSAVEm\000FSCALE\000FSINCOS\000" | |
| "FSTENVm\000FS_PREFIX\000FXAM\000FXRSTOR\000FXRSTOR64\000FXSAVE\000FXSAV" | |
| "E64\000FXTRACT\000FYL2X\000FYL2XP1\000FpPOP_RETVAL\000FsANDNPDrm\000FsA" | |
| "NDNPDrr\000FsANDNPSrm\000FsANDNPSrr\000FsANDPDrm\000FsANDPDrr\000FsANDP" | |
| "Srm\000FsANDPSrr\000FsFLD0SD\000FsFLD0SS\000FsMOVAPDrm\000FsMOVAPDrr\000" | |
| "FsMOVAPSrm\000FsMOVAPSrr\000FsORPDrm\000FsORPDrr\000FsORPSrm\000FsORPSr" | |
| "r\000FsVMOVAPDrm\000FsVMOVAPDrr\000FsVMOVAPSrm\000FsVMOVAPSrr\000FsXORP" | |
| "Drm\000FsXORPDrr\000FsXORPSrm\000FsXORPSrr\000GS_PREFIX\000HADDPDrm\000" | |
| "HADDPDrr\000HADDPSrm\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUB" | |
| "PSrm\000HSUBPSrr\000IDIV16m\000IDIV16r\000IDIV32m\000IDIV32r\000IDIV64m" | |
| "\000IDIV64r\000IDIV8m\000IDIV8r\000ILD_F16m\000ILD_F32m\000ILD_F64m\000" | |
| "ILD_Fp16m32\000ILD_Fp16m64\000ILD_Fp16m80\000ILD_Fp32m32\000ILD_Fp32m64" | |
| "\000ILD_Fp32m80\000ILD_Fp64m32\000ILD_Fp64m64\000ILD_Fp64m80\000IMUL16m" | |
| "\000IMUL16r\000IMUL16rm\000IMUL16rmi\000IMUL16rmi8\000IMUL16rr\000IMUL1" | |
| "6rri\000IMUL16rri8\000IMUL32m\000IMUL32r\000IMUL32rm\000IMUL32rmi\000IM" | |
| "UL32rmi8\000IMUL32rr\000IMUL32rri\000IMUL32rri8\000IMUL64m\000IMUL64r\000" | |
| "IMUL64rm\000IMUL64rmi32\000IMUL64rmi8\000IMUL64rr\000IMUL64rri32\000IMU" | |
| "L64rri8\000IMUL8m\000IMUL8r\000IN16\000IN16ri\000IN16rr\000IN32\000IN32" | |
| "ri\000IN32rr\000IN8\000IN8ri\000IN8rr\000INC16m\000INC16r\000INC32m\000" | |
| "INC32r\000INC64_16m\000INC64_16r\000INC64_32m\000INC64_32r\000INC64m\000" | |
| "INC64r\000INC8m\000INC8r\000INSERTPSrm\000INSERTPSrr\000INT\000INT3\000" | |
| "INTO\000INVD\000INVEPT32\000INVEPT64\000INVLPG\000INVVPID32\000INVVPID6" | |
| "4\000IRET16\000IRET32\000IRET64\000ISTT_FP16m\000ISTT_FP32m\000ISTT_FP6" | |
| "4m\000ISTT_Fp16m32\000ISTT_Fp16m64\000ISTT_Fp16m80\000ISTT_Fp32m32\000I" | |
| "STT_Fp32m64\000ISTT_Fp32m80\000ISTT_Fp64m32\000ISTT_Fp64m64\000ISTT_Fp6" | |
| "4m80\000IST_F16m\000IST_F32m\000IST_FP16m\000IST_FP32m\000IST_FP64m\000" | |
| "IST_Fp16m32\000IST_Fp16m64\000IST_Fp16m80\000IST_Fp32m32\000IST_Fp32m64" | |
| "\000IST_Fp32m80\000IST_Fp64m32\000IST_Fp64m64\000IST_Fp64m80\000Int_CMP" | |
| "SDrm\000Int_CMPSDrr\000Int_CMPSSrm\000Int_CMPSSrr\000Int_COMISDrm\000In" | |
| "t_COMISDrr\000Int_COMISSrm\000Int_COMISSrr\000Int_CVTDQ2PDrm\000Int_CVT" | |
| "DQ2PDrr\000Int_CVTDQ2PSrm\000Int_CVTDQ2PSrr\000Int_CVTPD2DQrm\000Int_CV" | |
| "TPD2DQrr\000Int_CVTPD2PSrm\000Int_CVTPD2PSrr\000Int_CVTPS2DQrm\000Int_C" | |
| "VTPS2DQrr\000Int_CVTPS2PDrm\000Int_CVTPS2PDrr\000Int_CVTSD2SSrm\000Int_" | |
| "CVTSD2SSrr\000Int_CVTSI2SD64rm\000Int_CVTSI2SD64rr\000Int_CVTSI2SDrm\000" | |
| "Int_CVTSI2SDrr\000Int_CVTSI2SS64rm\000Int_CVTSI2SS64rr\000Int_CVTSI2SSr" | |
| "m\000Int_CVTSI2SSrr\000Int_CVTSS2SDrm\000Int_CVTSS2SDrr\000Int_CVTTSD2S" | |
| "I64rm\000Int_CVTTSD2SI64rr\000Int_CVTTSD2SIrm\000Int_CVTTSD2SIrr\000Int" | |
| "_CVTTSS2SI64rm\000Int_CVTTSS2SI64rr\000Int_CVTTSS2SIrm\000Int_CVTTSS2SI" | |
| "rr\000Int_MemBarrier\000Int_MemBarrierNoSSE64\000Int_UCOMISDrm\000Int_U" | |
| "COMISDrr\000Int_UCOMISSrm\000Int_UCOMISSrr\000Int_VCMPSDrm\000Int_VCMPS" | |
| "Drr\000Int_VCMPSSrm\000Int_VCMPSSrr\000Int_VCOMISDrm\000Int_VCOMISDrr\000" | |
| "Int_VCOMISSrm\000Int_VCOMISSrr\000Int_VCVTDQ2PDrm\000Int_VCVTDQ2PDrr\000" | |
| "Int_VCVTDQ2PSrm\000Int_VCVTDQ2PSrr\000Int_VCVTPD2DQrm\000Int_VCVTPD2DQr" | |
| "r\000Int_VCVTPD2PSrm\000Int_VCVTPD2PSrr\000Int_VCVTPS2DQrm\000Int_VCVTP" | |
| "S2DQrr\000Int_VCVTPS2PDrm\000Int_VCVTPS2PDrr\000Int_VCVTSD2SI64rm\000In" | |
| "t_VCVTSD2SI64rr\000Int_VCVTSD2SIrm\000Int_VCVTSD2SIrr\000Int_VCVTSD2SSr" | |
| "m\000Int_VCVTSD2SSrr\000Int_VCVTSI2SD64rm\000Int_VCVTSI2SD64rr\000Int_V" | |
| "CVTSI2SDrm\000Int_VCVTSI2SDrr\000Int_VCVTSI2SS64rm\000Int_VCVTSI2SS64rr" | |
| "\000Int_VCVTSI2SSrm\000Int_VCVTSI2SSrr\000Int_VCVTSS2SDrm\000Int_VCVTSS" | |
| "2SDrr\000Int_VCVTTPS2DQrm\000Int_VCVTTPS2DQrr\000Int_VCVTTSD2SI64rm\000" | |
| "Int_VCVTTSD2SI64rr\000Int_VCVTTSD2SIrm\000Int_VCVTTSD2SIrr\000Int_VCVTT" | |
| "SS2SI64rm\000Int_VCVTTSS2SI64rr\000Int_VCVTTSS2SIrm\000Int_VCVTTSS2SIrr" | |
| "\000Int_VUCOMISDrm\000Int_VUCOMISDrr\000Int_VUCOMISSrm\000Int_VUCOMISSr" | |
| "r\000JAE_1\000JAE_4\000JA_1\000JA_4\000JBE_1\000JBE_4\000JB_1\000JB_4\000" | |
| "JCXZ\000JECXZ_32\000JECXZ_64\000JE_1\000JE_4\000JGE_1\000JGE_4\000JG_1\000" | |
| "JG_4\000JLE_1\000JLE_4\000JL_1\000JL_4\000JMP32m\000JMP32r\000JMP64m\000" | |
| "JMP64pcrel32\000JMP64r\000JMP_1\000JMP_4\000JNE_1\000JNE_4\000JNO_1\000" | |
| "JNO_4\000JNP_1\000JNP_4\000JNS_1\000JNS_4\000JO_1\000JO_4\000JP_1\000JP" | |
| "_4\000JRCXZ\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR16rr\000LAR32rm\000" | |
| "LAR32rr\000LAR64rm\000LAR64rr\000LCMPXCHG16\000LCMPXCHG16B\000LCMPXCHG3" | |
| "2\000LCMPXCHG64\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000LDS" | |
| "16rm\000LDS32rm\000LD_F0\000LD_F1\000LD_F32m\000LD_F64m\000LD_F80m\000L" | |
| "D_Fp032\000LD_Fp064\000LD_Fp080\000LD_Fp132\000LD_Fp164\000LD_Fp180\000" | |
| "LD_Fp32m\000LD_Fp32m64\000LD_Fp32m80\000LD_Fp64m\000LD_Fp64m80\000LD_Fp" | |
| "80m\000LD_Frr\000LEA16r\000LEA32r\000LEA64_32r\000LEA64r\000LEAVE\000LE" | |
| "AVE64\000LES16rm\000LES32rm\000LFENCE\000LFS16rm\000LFS32rm\000LFS64rm\000" | |
| "LGDT16m\000LGDTm\000LGS16rm\000LGS32rm\000LGS64rm\000LIDT16m\000LIDTm\000" | |
| "LLDT16m\000LLDT16r\000LMSW16m\000LMSW16r\000LOCK_ADD16mi\000LOCK_ADD16m" | |
| "i8\000LOCK_ADD16mr\000LOCK_ADD32mi\000LOCK_ADD32mi8\000LOCK_ADD32mr\000" | |
| "LOCK_ADD64mi32\000LOCK_ADD64mi8\000LOCK_ADD64mr\000LOCK_ADD8mi\000LOCK_" | |
| "ADD8mr\000LOCK_AND16mi\000LOCK_AND16mi8\000LOCK_AND16mr\000LOCK_AND32mi" | |
| "\000LOCK_AND32mi8\000LOCK_AND32mr\000LOCK_AND64mi32\000LOCK_AND64mi8\000" | |
| "LOCK_AND64mr\000LOCK_AND8mi\000LOCK_AND8mr\000LOCK_DEC16m\000LOCK_DEC32" | |
| "m\000LOCK_DEC64m\000LOCK_DEC8m\000LOCK_INC16m\000LOCK_INC32m\000LOCK_IN" | |
| "C64m\000LOCK_INC8m\000LOCK_OR16mi\000LOCK_OR16mi8\000LOCK_OR16mr\000LOC" | |
| "K_OR32mi\000LOCK_OR32mi8\000LOCK_OR32mr\000LOCK_OR64mi32\000LOCK_OR64mi" | |
| "8\000LOCK_OR64mr\000LOCK_OR8mi\000LOCK_OR8mr\000LOCK_PREFIX\000LOCK_SUB" | |
| "16mi\000LOCK_SUB16mi8\000LOCK_SUB16mr\000LOCK_SUB32mi\000LOCK_SUB32mi8\000" | |
| "LOCK_SUB32mr\000LOCK_SUB64mi32\000LOCK_SUB64mi8\000LOCK_SUB64mr\000LOCK" | |
| "_SUB8mi\000LOCK_SUB8mr\000LOCK_XOR16mi\000LOCK_XOR16mi8\000LOCK_XOR16mr" | |
| "\000LOCK_XOR32mi\000LOCK_XOR32mi8\000LOCK_XOR32mr\000LOCK_XOR64mi32\000" | |
| "LOCK_XOR64mi8\000LOCK_XOR64mr\000LOCK_XOR8mi\000LOCK_XOR8mr\000LODSB\000" | |
| "LODSD\000LODSQ\000LODSW\000LOOP\000LOOPE\000LOOPNE\000LRETI\000LRETIW\000" | |
| "LRETL\000LRETQ\000LSL16rm\000LSL16rr\000LSL32rm\000LSL32rr\000LSL64rm\000" | |
| "LSL64rr\000LSS16rm\000LSS32rm\000LSS64rm\000LTRm\000LTRr\000LXADD16\000" | |
| "LXADD32\000LXADD64\000LXADD8\000LZCNT16rm\000LZCNT16rr\000LZCNT32rm\000" | |
| "LZCNT32rr\000LZCNT64rm\000LZCNT64rr\000MASKMOVDQU\000MASKMOVDQU64\000MA" | |
| "XPDrm\000MAXPDrm_Int\000MAXPDrr\000MAXPDrr_Int\000MAXPSrm\000MAXPSrm_In" | |
| "t\000MAXPSrr\000MAXPSrr_Int\000MAXSDrm\000MAXSDrm_Int\000MAXSDrr\000MAX" | |
| "SDrr_Int\000MAXSSrm\000MAXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000" | |
| "MINPDrm\000MINPDrm_Int\000MINPDrr\000MINPDrr_Int\000MINPSrm\000MINPSrm_" | |
| "Int\000MINPSrr\000MINPSrr_Int\000MINSDrm\000MINSDrm_Int\000MINSDrr\000M" | |
| "INSDrr_Int\000MINSSrm\000MINSSrm_Int\000MINSSrr\000MINSSrr_Int\000MMX_C" | |
| "VTPD2PIirm\000MMX_CVTPD2PIirr\000MMX_CVTPI2PDirm\000MMX_CVTPI2PDirr\000" | |
| "MMX_CVTPI2PSirm\000MMX_CVTPI2PSirr\000MMX_CVTPS2PIirm\000MMX_CVTPS2PIir" | |
| "r\000MMX_CVTTPD2PIirm\000MMX_CVTTPD2PIirr\000MMX_CVTTPS2PIirm\000MMX_CV" | |
| "TTPS2PIirr\000MMX_EMMS\000MMX_MASKMOVQ\000MMX_MASKMOVQ64\000MMX_MOVD64f" | |
| "rom64rr\000MMX_MOVD64grr\000MMX_MOVD64mr\000MMX_MOVD64rm\000MMX_MOVD64r" | |
| "r\000MMX_MOVD64rrv164\000MMX_MOVD64to64rr\000MMX_MOVDQ2Qrr\000MMX_MOVFR" | |
| "642Qrr\000MMX_MOVNTQmr\000MMX_MOVQ2DQrr\000MMX_MOVQ2FR64rr\000MMX_MOVQ6" | |
| "4mr\000MMX_MOVQ64rm\000MMX_MOVQ64rr\000MMX_MOVZDI2PDIrm\000MMX_MOVZDI2P" | |
| "DIrr\000MMX_PABSBrm64\000MMX_PABSBrr64\000MMX_PABSDrm64\000MMX_PABSDrr6" | |
| "4\000MMX_PABSWrm64\000MMX_PABSWrr64\000MMX_PACKSSDWirm\000MMX_PACKSSDWi" | |
| "rr\000MMX_PACKSSWBirm\000MMX_PACKSSWBirr\000MMX_PACKUSWBirm\000MMX_PACK" | |
| "USWBirr\000MMX_PADDBirm\000MMX_PADDBirr\000MMX_PADDDirm\000MMX_PADDDirr" | |
| "\000MMX_PADDQirm\000MMX_PADDQirr\000MMX_PADDSBirm\000MMX_PADDSBirr\000M" | |
| "MX_PADDSWirm\000MMX_PADDSWirr\000MMX_PADDUSBirm\000MMX_PADDUSBirr\000MM" | |
| "X_PADDUSWirm\000MMX_PADDUSWirr\000MMX_PADDWirm\000MMX_PADDWirr\000MMX_P" | |
| "ALIGNR64irm\000MMX_PALIGNR64irr\000MMX_PANDNirm\000MMX_PANDNirr\000MMX_" | |
| "PANDirm\000MMX_PANDirr\000MMX_PAVGBirm\000MMX_PAVGBirr\000MMX_PAVGWirm\000" | |
| "MMX_PAVGWirr\000MMX_PCMPEQBirm\000MMX_PCMPEQBirr\000MMX_PCMPEQDirm\000M" | |
| "MX_PCMPEQDirr\000MMX_PCMPEQWirm\000MMX_PCMPEQWirr\000MMX_PCMPGTBirm\000" | |
| "MMX_PCMPGTBirr\000MMX_PCMPGTDirm\000MMX_PCMPGTDirr\000MMX_PCMPGTWirm\000" | |
| "MMX_PCMPGTWirr\000MMX_PEXTRWirri\000MMX_PHADDSWrm64\000MMX_PHADDSWrr64\000" | |
| "MMX_PHADDWrm64\000MMX_PHADDWrr64\000MMX_PHADDrm64\000MMX_PHADDrr64\000M" | |
| "MX_PHSUBDrm64\000MMX_PHSUBDrr64\000MMX_PHSUBSWrm64\000MMX_PHSUBSWrr64\000" | |
| "MMX_PHSUBWrm64\000MMX_PHSUBWrr64\000MMX_PINSRWirmi\000MMX_PINSRWirri\000" | |
| "MMX_PMADDUBSWrm64\000MMX_PMADDUBSWrr64\000MMX_PMADDWDirm\000MMX_PMADDWD" | |
| "irr\000MMX_PMAXSWirm\000MMX_PMAXSWirr\000MMX_PMAXUBirm\000MMX_PMAXUBirr" | |
| "\000MMX_PMINSWirm\000MMX_PMINSWirr\000MMX_PMINUBirm\000MMX_PMINUBirr\000" | |
| "MMX_PMOVMSKBrr\000MMX_PMULHRSWrm64\000MMX_PMULHRSWrr64\000MMX_PMULHUWir" | |
| "m\000MMX_PMULHUWirr\000MMX_PMULHWirm\000MMX_PMULHWirr\000MMX_PMULLWirm\000" | |
| "MMX_PMULLWirr\000MMX_PMULUDQirm\000MMX_PMULUDQirr\000MMX_PORirm\000MMX_" | |
| "PORirr\000MMX_PSADBWirm\000MMX_PSADBWirr\000MMX_PSHUFBrm64\000MMX_PSHUF" | |
| "Brr64\000MMX_PSHUFWmi\000MMX_PSHUFWri\000MMX_PSIGNBrm64\000MMX_PSIGNBrr" | |
| "64\000MMX_PSIGNDrm64\000MMX_PSIGNDrr64\000MMX_PSIGNWrm64\000MMX_PSIGNWr" | |
| "r64\000MMX_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_" | |
| "PSLLQrm\000MMX_PSLLQrr\000MMX_PSLLWri\000MMX_PSLLWrm\000MMX_PSLLWrr\000" | |
| "MMX_PSRADri\000MMX_PSRADrm\000MMX_PSRADrr\000MMX_PSRAWri\000MMX_PSRAWrm" | |
| "\000MMX_PSRAWrr\000MMX_PSRLDri\000MMX_PSRLDrm\000MMX_PSRLDrr\000MMX_PSR" | |
| "LQri\000MMX_PSRLQrm\000MMX_PSRLQrr\000MMX_PSRLWri\000MMX_PSRLWrm\000MMX" | |
| "_PSRLWrr\000MMX_PSUBBirm\000MMX_PSUBBirr\000MMX_PSUBDirm\000MMX_PSUBDir" | |
| "r\000MMX_PSUBQirm\000MMX_PSUBQirr\000MMX_PSUBSBirm\000MMX_PSUBSBirr\000" | |
| "MMX_PSUBSWirm\000MMX_PSUBSWirr\000MMX_PSUBUSBirm\000MMX_PSUBUSBirr\000M" | |
| "MX_PSUBUSWirm\000MMX_PSUBUSWirr\000MMX_PSUBWirm\000MMX_PSUBWirr\000MMX_" | |
| "PUNPCKHBWirm\000MMX_PUNPCKHBWirr\000MMX_PUNPCKHDQirm\000MMX_PUNPCKHDQir" | |
| "r\000MMX_PUNPCKHWDirm\000MMX_PUNPCKHWDirr\000MMX_PUNPCKLBWirm\000MMX_PU" | |
| "NPCKLBWirr\000MMX_PUNPCKLDQirm\000MMX_PUNPCKLDQirr\000MMX_PUNPCKLWDirm\000" | |
| "MMX_PUNPCKLWDirr\000MMX_PXORirm\000MMX_PXORirr\000MONITOR\000MONITORrrr" | |
| "\000MONTMUL\000MOV16ao16\000MOV16mi\000MOV16mr\000MOV16ms\000MOV16o16a\000" | |
| "MOV16r0\000MOV16ri\000MOV16rm\000MOV16rr\000MOV16rr_REV\000MOV16rs\000M" | |
| "OV16sm\000MOV16sr\000MOV32ao32\000MOV32cr\000MOV32dr\000MOV32mi\000MOV3" | |
| "2mr\000MOV32ms\000MOV32o32a\000MOV32r0\000MOV32rc\000MOV32rd\000MOV32ri" | |
| "\000MOV32rm\000MOV32rr\000MOV32rr_REV\000MOV32rs\000MOV32sm\000MOV32sr\000" | |
| "MOV64cr\000MOV64dr\000MOV64mi32\000MOV64mr\000MOV64ms\000MOV64r0\000MOV" | |
| "64rc\000MOV64rd\000MOV64ri\000MOV64ri32\000MOV64ri64i32\000MOV64rm\000M" | |
| "OV64rr\000MOV64rr_REV\000MOV64rs\000MOV64sm\000MOV64sr\000MOV64toPQIrr\000" | |
| "MOV64toSDrm\000MOV64toSDrr\000MOV8ao8\000MOV8mi\000MOV8mr\000MOV8mr_NOR" | |
| "EX\000MOV8o8a\000MOV8r0\000MOV8ri\000MOV8rm\000MOV8rm_NOREX\000MOV8rr\000" | |
| "MOV8rr_NOREX\000MOV8rr_REV\000MOVAPDmr\000MOVAPDrm\000MOVAPDrr\000MOVAP" | |
| "Drr_REV\000MOVAPSmr\000MOVAPSrm\000MOVAPSrr\000MOVAPSrr_REV\000MOVBE16m" | |
| "r\000MOVBE16rm\000MOVBE32mr\000MOVBE32rm\000MOVBE64mr\000MOVBE64rm\000M" | |
| "OVDDUPrm\000MOVDDUPrr\000MOVDI2PDIrm\000MOVDI2PDIrr\000MOVDI2SSrm\000MO" | |
| "VDI2SSrr\000MOVDQAmr\000MOVDQArm\000MOVDQArr\000MOVDQArr_REV\000MOVDQUm" | |
| "r\000MOVDQUmr_Int\000MOVDQUrm\000MOVDQUrr\000MOVDQUrr_REV\000MOVHLPSrr\000" | |
| "MOVHPDmr\000MOVHPDrm\000MOVHPSmr\000MOVHPSrm\000MOVLHPSrr\000MOVLPDmr\000" | |
| "MOVLPDrm\000MOVLPSmr\000MOVLPSrm\000MOVLQ128mr\000MOVMSKPDrr32\000MOVMS" | |
| "KPDrr64\000MOVMSKPSrr32\000MOVMSKPSrr64\000MOVNTDQArm\000MOVNTDQ_64mr\000" | |
| "MOVNTDQmr\000MOVNTI_64mr\000MOVNTImr\000MOVNTPDmr\000MOVNTPSmr\000MOVPC" | |
| "32r\000MOVPDI2DImr\000MOVPDI2DIrr\000MOVPQI2QImr\000MOVPQIto64rr\000MOV" | |
| "QI2PQIrm\000MOVQxrxr\000MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr" | |
| "\000MOVSDrr_REV\000MOVSDto64mr\000MOVSDto64rr\000MOVSHDUPrm\000MOVSHDUP" | |
| "rr\000MOVSLDUPrm\000MOVSLDUPrr\000MOVSQ\000MOVSS2DImr\000MOVSS2DIrr\000" | |
| "MOVSSmr\000MOVSSrm\000MOVSSrr\000MOVSSrr_REV\000MOVSW\000MOVSX16rm8\000" | |
| "MOVSX16rr8\000MOVSX32rm16\000MOVSX32rm8\000MOVSX32rr16\000MOVSX32rr8\000" | |
| "MOVSX64rm16\000MOVSX64rm32\000MOVSX64rm8\000MOVSX64rr16\000MOVSX64rr32\000" | |
| "MOVSX64rr8\000MOVUPDmr\000MOVUPDrm\000MOVUPDrr\000MOVUPDrr_REV\000MOVUP" | |
| "Smr\000MOVUPSrm\000MOVUPSrr\000MOVUPSrr_REV\000MOVZDI2PDIrm\000MOVZDI2P" | |
| "DIrr\000MOVZPQILo2PQIrm\000MOVZPQILo2PQIrr\000MOVZQI2PQIrm\000MOVZQI2PQ" | |
| "Irr\000MOVZX16rm8\000MOVZX16rr8\000MOVZX32_NOREXrm8\000MOVZX32_NOREXrr8" | |
| "\000MOVZX32rm16\000MOVZX32rm8\000MOVZX32rr16\000MOVZX32rr8\000MOVZX64rm" | |
| "16\000MOVZX64rm16_Q\000MOVZX64rm32\000MOVZX64rm8\000MOVZX64rm8_Q\000MOV" | |
| "ZX64rr16\000MOVZX64rr16_Q\000MOVZX64rr32\000MOVZX64rr8\000MOVZX64rr8_Q\000" | |
| "MPSADBWrmi\000MPSADBWrri\000MUL16m\000MUL16r\000MUL32m\000MUL32r\000MUL" | |
| "64m\000MUL64r\000MUL8m\000MUL8r\000MULPDrm\000MULPDrr\000MULPSrm\000MUL" | |
| "PSrr\000MULSDrm\000MULSDrm_Int\000MULSDrr\000MULSDrr_Int\000MULSSrm\000" | |
| "MULSSrm_Int\000MULSSrr\000MULSSrr_Int\000MUL_F32m\000MUL_F64m\000MUL_FI" | |
| "16m\000MUL_FI32m\000MUL_FPrST0\000MUL_FST0r\000MUL_Fp32\000MUL_Fp32m\000" | |
| "MUL_Fp64\000MUL_Fp64m\000MUL_Fp64m32\000MUL_Fp80\000MUL_Fp80m32\000MUL_" | |
| "Fp80m64\000MUL_FpI16m32\000MUL_FpI16m64\000MUL_FpI16m80\000MUL_FpI32m32" | |
| "\000MUL_FpI32m64\000MUL_FpI32m80\000MUL_FrST0\000MWAIT\000MWAITrr\000NE" | |
| "G16m\000NEG16r\000NEG32m\000NEG32r\000NEG64m\000NEG64r\000NEG8m\000NEG8" | |
| "r\000NOOP\000NOOPL\000NOOPW\000NOT16m\000NOT16r\000NOT32m\000NOT32r\000" | |
| "NOT64m\000NOT64r\000NOT8m\000NOT8r\000OR16i16\000OR16mi\000OR16mi8\000O" | |
| "R16mr\000OR16ri\000OR16ri8\000OR16rm\000OR16rr\000OR16rr_REV\000OR32i32" | |
| "\000OR32mi\000OR32mi8\000OR32mr\000OR32mrLocked\000OR32ri\000OR32ri8\000" | |
| "OR32rm\000OR32rr\000OR32rr_REV\000OR64i32\000OR64mi32\000OR64mi8\000OR6" | |
| "4mr\000OR64ri32\000OR64ri8\000OR64rm\000OR64rr\000OR64rr_REV\000OR8i8\000" | |
| "OR8mi\000OR8mr\000OR8ri\000OR8rm\000OR8rr\000OR8rr_REV\000ORPDrm\000ORP" | |
| "Drr\000ORPSrm\000ORPSrr\000OUT16ir\000OUT16rr\000OUT32ir\000OUT32rr\000" | |
| "OUT8ir\000OUT8rr\000OUTSB\000OUTSD\000OUTSW\000PABSBrm128\000PABSBrr128" | |
| "\000PABSDrm128\000PABSDrr128\000PABSWrm128\000PABSWrr128\000PACKSSDWrm\000" | |
| "PACKSSDWrr\000PACKSSWBrm\000PACKSSWBrr\000PACKUSDWrm\000PACKUSDWrr\000P" | |
| "ACKUSWBrm\000PACKUSWBrr\000PADDBrm\000PADDBrr\000PADDDrm\000PADDDrr\000" | |
| "PADDQrm\000PADDQrr\000PADDSBrm\000PADDSBrr\000PADDSWrm\000PADDSWrr\000P" | |
| "ADDUSBrm\000PADDUSBrr\000PADDUSWrm\000PADDUSWrr\000PADDWrm\000PADDWrr\000" | |
| "PALIGNR128rm\000PALIGNR128rr\000PANDNrm\000PANDNrr\000PANDrm\000PANDrr\000" | |
| "PAUSE\000PAVGBrm\000PAVGBrr\000PAVGUSBrm\000PAVGUSBrr\000PAVGWrm\000PAV" | |
| "GWrr\000PBLENDVBrm0\000PBLENDVBrr0\000PBLENDWrmi\000PBLENDWrri\000PCLMU" | |
| "LQDQrm\000PCLMULQDQrr\000PCMPEQBrm\000PCMPEQBrr\000PCMPEQDrm\000PCMPEQD" | |
| "rr\000PCMPEQQrm\000PCMPEQQrr\000PCMPEQWrm\000PCMPEQWrr\000PCMPESTRIArm\000" | |
| "PCMPESTRIArr\000PCMPESTRICrm\000PCMPESTRICrr\000PCMPESTRIOrm\000PCMPEST" | |
| "RIOrr\000PCMPESTRISrm\000PCMPESTRISrr\000PCMPESTRIZrm\000PCMPESTRIZrr\000" | |
| "PCMPESTRIrm\000PCMPESTRIrr\000PCMPESTRM128MEM\000PCMPESTRM128REG\000PCM" | |
| "PESTRM128rm\000PCMPESTRM128rr\000PCMPGTBrm\000PCMPGTBrr\000PCMPGTDrm\000" | |
| "PCMPGTDrr\000PCMPGTQrm\000PCMPGTQrr\000PCMPGTWrm\000PCMPGTWrr\000PCMPIS" | |
| "TRIArm\000PCMPISTRIArr\000PCMPISTRICrm\000PCMPISTRICrr\000PCMPISTRIOrm\000" | |
| "PCMPISTRIOrr\000PCMPISTRISrm\000PCMPISTRISrr\000PCMPISTRIZrm\000PCMPIST" | |
| "RIZrr\000PCMPISTRIrm\000PCMPISTRIrr\000PCMPISTRM128MEM\000PCMPISTRM128R" | |
| "EG\000PCMPISTRM128rm\000PCMPISTRM128rr\000PEXTRBmr\000PEXTRBrr\000PEXTR" | |
| "Dmr\000PEXTRDrr\000PEXTRQmr\000PEXTRQrr\000PEXTRWmr\000PEXTRWri\000PF2I" | |
| "Drm\000PF2IDrr\000PF2IWrm\000PF2IWrr\000PFACCrm\000PFACCrr\000PFADDrm\000" | |
| "PFADDrr\000PFCMPEQrm\000PFCMPEQrr\000PFCMPGErm\000PFCMPGErr\000PFCMPGTr" | |
| "m\000PFCMPGTrr\000PFMAXrm\000PFMAXrr\000PFMINrm\000PFMINrr\000PFMULrm\000" | |
| "PFMULrr\000PFNACCrm\000PFNACCrr\000PFPNACCrm\000PFPNACCrr\000PFRCPIT1rm" | |
| "\000PFRCPIT1rr\000PFRCPIT2rm\000PFRCPIT2rr\000PFRCPrm\000PFRCPrr\000PFR" | |
| "SQIT1rm\000PFRSQIT1rr\000PFRSQRTrm\000PFRSQRTrr\000PFSUBRrm\000PFSUBRrr" | |
| "\000PFSUBrm\000PFSUBrr\000PHADDDrm128\000PHADDDrr128\000PHADDSWrm128\000" | |
| "PHADDSWrr128\000PHADDWrm128\000PHADDWrr128\000PHMINPOSUWrm128\000PHMINP" | |
| "OSUWrr128\000PHSUBDrm128\000PHSUBDrr128\000PHSUBSWrm128\000PHSUBSWrr128" | |
| "\000PHSUBWrm128\000PHSUBWrr128\000PI2FDrm\000PI2FDrr\000PI2FWrm\000PI2F" | |
| "Wrr\000PINSRBrm\000PINSRBrr\000PINSRDrm\000PINSRDrr\000PINSRQrm\000PINS" | |
| "RQrr\000PINSRWrmi\000PINSRWrri\000PMADDUBSWrm128\000PMADDUBSWrr128\000P" | |
| "MADDWDrm\000PMADDWDrr\000PMAXSBrm\000PMAXSBrr\000PMAXSDrm\000PMAXSDrr\000" | |
| "PMAXSWrm\000PMAXSWrr\000PMAXUBrm\000PMAXUBrr\000PMAXUDrm\000PMAXUDrr\000" | |
| "PMAXUWrm\000PMAXUWrr\000PMINSBrm\000PMINSBrr\000PMINSDrm\000PMINSDrr\000" | |
| "PMINSWrm\000PMINSWrr\000PMINUBrm\000PMINUBrr\000PMINUDrm\000PMINUDrr\000" | |
| "PMINUWrm\000PMINUWrr\000PMOVMSKBrr\000PMOVSXBDrm\000PMOVSXBDrr\000PMOVS" | |
| "XBQrm\000PMOVSXBQrr\000PMOVSXBWrm\000PMOVSXBWrr\000PMOVSXDQrm\000PMOVSX" | |
| "DQrr\000PMOVSXWDrm\000PMOVSXWDrr\000PMOVSXWQrm\000PMOVSXWQrr\000PMOVZXB" | |
| "Drm\000PMOVZXBDrr\000PMOVZXBQrm\000PMOVZXBQrr\000PMOVZXBWrm\000PMOVZXBW" | |
| "rr\000PMOVZXDQrm\000PMOVZXDQrr\000PMOVZXWDrm\000PMOVZXWDrr\000PMOVZXWQr" | |
| "m\000PMOVZXWQrr\000PMULDQrm\000PMULDQrr\000PMULHRSWrm128\000PMULHRSWrr1" | |
| "28\000PMULHRWrm\000PMULHRWrr\000PMULHUWrm\000PMULHUWrr\000PMULHWrm\000P" | |
| "MULHWrr\000PMULLDrm\000PMULLDrr\000PMULLWrm\000PMULLWrr\000PMULUDQrm\000" | |
| "PMULUDQrr\000POP16r\000POP16rmm\000POP16rmr\000POP32r\000POP32rmm\000PO" | |
| "P32rmr\000POP64r\000POP64rmm\000POP64rmr\000POPA32\000POPCNT16rm\000POP" | |
| "CNT16rr\000POPCNT32rm\000POPCNT32rr\000POPCNT64rm\000POPCNT64rr\000POPD" | |
| "S16\000POPDS32\000POPES16\000POPES32\000POPF16\000POPF32\000POPF64\000P" | |
| "OPFS16\000POPFS32\000POPFS64\000POPGS16\000POPGS32\000POPGS64\000POPSS1" | |
| "6\000POPSS32\000PORrm\000PORrr\000PREFETCH\000PREFETCHNTA\000PREFETCHT0" | |
| "\000PREFETCHT1\000PREFETCHT2\000PREFETCHW\000PSADBWrm\000PSADBWrr\000PS" | |
| "HUFBrm128\000PSHUFBrr128\000PSHUFDmi\000PSHUFDri\000PSHUFHWmi\000PSHUFH" | |
| "Wri\000PSHUFLWmi\000PSHUFLWri\000PSIGNBrm128\000PSIGNBrr128\000PSIGNDrm" | |
| "128\000PSIGNDrr128\000PSIGNWrm128\000PSIGNWrr128\000PSLLDQri\000PSLLDri" | |
| "\000PSLLDrm\000PSLLDrr\000PSLLQri\000PSLLQrm\000PSLLQrr\000PSLLWri\000P" | |
| "SLLWrm\000PSLLWrr\000PSRADri\000PSRADrm\000PSRADrr\000PSRAWri\000PSRAWr" | |
| "m\000PSRAWrr\000PSRLDQri\000PSRLDri\000PSRLDrm\000PSRLDrr\000PSRLQri\000" | |
| "PSRLQrm\000PSRLQrr\000PSRLWri\000PSRLWrm\000PSRLWrr\000PSUBBrm\000PSUBB" | |
| "rr\000PSUBDrm\000PSUBDrr\000PSUBQrm\000PSUBQrr\000PSUBSBrm\000PSUBSBrr\000" | |
| "PSUBSWrm\000PSUBSWrr\000PSUBUSBrm\000PSUBUSBrr\000PSUBUSWrm\000PSUBUSWr" | |
| "r\000PSUBWrm\000PSUBWrr\000PSWAPDrm\000PSWAPDrr\000PTESTrm\000PTESTrr\000" | |
| "PUNPCKHBWrm\000PUNPCKHBWrr\000PUNPCKHDQrm\000PUNPCKHDQrr\000PUNPCKHQDQr" | |
| "m\000PUNPCKHQDQrr\000PUNPCKHWDrm\000PUNPCKHWDrr\000PUNPCKLBWrm\000PUNPC" | |
| "KLBWrr\000PUNPCKLDQrm\000PUNPCKLDQrr\000PUNPCKLQDQrm\000PUNPCKLQDQrr\000" | |
| "PUNPCKLWDrm\000PUNPCKLWDrr\000PUSH16r\000PUSH16rmm\000PUSH16rmr\000PUSH" | |
| "32r\000PUSH32rmm\000PUSH32rmr\000PUSH64i16\000PUSH64i32\000PUSH64i8\000" | |
| "PUSH64r\000PUSH64rmm\000PUSH64rmr\000PUSHA32\000PUSHCS16\000PUSHCS32\000" | |
| "PUSHDS16\000PUSHDS32\000PUSHES16\000PUSHES32\000PUSHF16\000PUSHF32\000P" | |
| "USHF64\000PUSHFS16\000PUSHFS32\000PUSHFS64\000PUSHGS16\000PUSHGS32\000P" | |
| "USHGS64\000PUSHSS16\000PUSHSS32\000PUSHi16\000PUSHi32\000PUSHi8\000PXOR" | |
| "rm\000PXORrr\000RCL16m1\000RCL16mCL\000RCL16mi\000RCL16r1\000RCL16rCL\000" | |
| "RCL16ri\000RCL32m1\000RCL32mCL\000RCL32mi\000RCL32r1\000RCL32rCL\000RCL" | |
| "32ri\000RCL64m1\000RCL64mCL\000RCL64mi\000RCL64r1\000RCL64rCL\000RCL64r" | |
| "i\000RCL8m1\000RCL8mCL\000RCL8mi\000RCL8r1\000RCL8rCL\000RCL8ri\000RCPP" | |
| "Sm\000RCPPSm_Int\000RCPPSr\000RCPPSr_Int\000RCPSSm\000RCPSSm_Int\000RCP" | |
| "SSr\000RCPSSr_Int\000RCR16m1\000RCR16mCL\000RCR16mi\000RCR16r1\000RCR16" | |
| "rCL\000RCR16ri\000RCR32m1\000RCR32mCL\000RCR32mi\000RCR32r1\000RCR32rCL" | |
| "\000RCR32ri\000RCR64m1\000RCR64mCL\000RCR64mi\000RCR64r1\000RCR64rCL\000" | |
| "RCR64ri\000RCR8m1\000RCR8mCL\000RCR8mi\000RCR8r1\000RCR8rCL\000RCR8ri\000" | |
| "RDFSBASE\000RDFSBASE64\000RDGSBASE\000RDGSBASE64\000RDMSR\000RDPMC\000R" | |
| "DRAND16r\000RDRAND32r\000RDRAND64r\000RDTSC\000RDTSCP\000RELEASE_MOV16m" | |
| "r\000RELEASE_MOV32mr\000RELEASE_MOV64mr\000RELEASE_MOV8mr\000REPNE_PREF" | |
| "IX\000REP_MOVSB\000REP_MOVSD\000REP_MOVSQ\000REP_MOVSW\000REP_PREFIX\000" | |
| "REP_STOSB\000REP_STOSD\000REP_STOSQ\000REP_STOSW\000RET\000RETI\000RETI" | |
| "W\000REX64_PREFIX\000ROL16m1\000ROL16mCL\000ROL16mi\000ROL16r1\000ROL16" | |
| "rCL\000ROL16ri\000ROL32m1\000ROL32mCL\000ROL32mi\000ROL32r1\000ROL32rCL" | |
| "\000ROL32ri\000ROL64m1\000ROL64mCL\000ROL64mi\000ROL64r1\000ROL64rCL\000" | |
| "ROL64ri\000ROL8m1\000ROL8mCL\000ROL8mi\000ROL8r1\000ROL8rCL\000ROL8ri\000" | |
| "ROR16m1\000ROR16mCL\000ROR16mi\000ROR16r1\000ROR16rCL\000ROR16ri\000ROR" | |
| "32m1\000ROR32mCL\000ROR32mi\000ROR32r1\000ROR32rCL\000ROR32ri\000ROR64m" | |
| "1\000ROR64mCL\000ROR64mi\000ROR64r1\000ROR64rCL\000ROR64ri\000ROR8m1\000" | |
| "ROR8mCL\000ROR8mi\000ROR8r1\000ROR8rCL\000ROR8ri\000ROUNDPDm\000ROUNDPD" | |
| "r\000ROUNDPSm\000ROUNDPSr\000ROUNDSDm\000ROUNDSDr\000ROUNDSSm\000ROUNDS" | |
| "Sr\000RSM\000RSQRTPSm\000RSQRTPSm_Int\000RSQRTPSr\000RSQRTPSr_Int\000RS" | |
| "QRTSSm\000RSQRTSSm_Int\000RSQRTSSr\000RSQRTSSr_Int\000SAHF\000SAR16m1\000" | |
| "SAR16mCL\000SAR16mi\000SAR16r1\000SAR16rCL\000SAR16ri\000SAR32m1\000SAR" | |
| "32mCL\000SAR32mi\000SAR32r1\000SAR32rCL\000SAR32ri\000SAR64m1\000SAR64m" | |
| "CL\000SAR64mi\000SAR64r1\000SAR64rCL\000SAR64ri\000SAR8m1\000SAR8mCL\000" | |
| "SAR8mi\000SAR8r1\000SAR8rCL\000SAR8ri\000SBB16i16\000SBB16mi\000SBB16mi" | |
| "8\000SBB16mr\000SBB16ri\000SBB16ri8\000SBB16rm\000SBB16rr\000SBB16rr_RE" | |
| "V\000SBB32i32\000SBB32mi\000SBB32mi8\000SBB32mr\000SBB32ri\000SBB32ri8\000" | |
| "SBB32rm\000SBB32rr\000SBB32rr_REV\000SBB64i32\000SBB64mi32\000SBB64mi8\000" | |
| "SBB64mr\000SBB64ri32\000SBB64ri8\000SBB64rm\000SBB64rr\000SBB64rr_REV\000" | |
| "SBB8i8\000SBB8mi\000SBB8mr\000SBB8ri\000SBB8rm\000SBB8rr\000SBB8rr_REV\000" | |
| "SCAS16\000SCAS32\000SCAS64\000SCAS8\000SEG_ALLOCA_32\000SEG_ALLOCA_64\000" | |
| "SETAEm\000SETAEr\000SETAm\000SETAr\000SETBEm\000SETBEr\000SETB_C16r\000" | |
| "SETB_C32r\000SETB_C64r\000SETB_C8r\000SETBm\000SETBr\000SETEm\000SETEr\000" | |
| "SETGEm\000SETGEr\000SETGm\000SETGr\000SETLEm\000SETLEr\000SETLm\000SETL" | |
| "r\000SETNEm\000SETNEr\000SETNOm\000SETNOr\000SETNPm\000SETNPr\000SETNSm" | |
| "\000SETNSr\000SETOm\000SETOr\000SETPm\000SETPr\000SETSm\000SETSr\000SFE" | |
| "NCE\000SGDT16m\000SGDTm\000SHL16m1\000SHL16mCL\000SHL16mi\000SHL16r1\000" | |
| "SHL16rCL\000SHL16ri\000SHL32m1\000SHL32mCL\000SHL32mi\000SHL32r1\000SHL" | |
| "32rCL\000SHL32ri\000SHL64m1\000SHL64mCL\000SHL64mi\000SHL64r1\000SHL64r" | |
| "CL\000SHL64ri\000SHL8m1\000SHL8mCL\000SHL8mi\000SHL8r1\000SHL8rCL\000SH" | |
| "L8ri\000SHLD16mrCL\000SHLD16mri8\000SHLD16rrCL\000SHLD16rri8\000SHLD32m" | |
| "rCL\000SHLD32mri8\000SHLD32rrCL\000SHLD32rri8\000SHLD64mrCL\000SHLD64mr" | |
| "i8\000SHLD64rrCL\000SHLD64rri8\000SHR16m1\000SHR16mCL\000SHR16mi\000SHR" | |
| "16r1\000SHR16rCL\000SHR16ri\000SHR32m1\000SHR32mCL\000SHR32mi\000SHR32r" | |
| "1\000SHR32rCL\000SHR32ri\000SHR64m1\000SHR64mCL\000SHR64mi\000SHR64r1\000" | |
| "SHR64rCL\000SHR64ri\000SHR8m1\000SHR8mCL\000SHR8mi\000SHR8r1\000SHR8rCL" | |
| "\000SHR8ri\000SHRD16mrCL\000SHRD16mri8\000SHRD16rrCL\000SHRD16rri8\000S" | |
| "HRD32mrCL\000SHRD32mri8\000SHRD32rrCL\000SHRD32rri8\000SHRD64mrCL\000SH" | |
| "RD64mri8\000SHRD64rrCL\000SHRD64rri8\000SHUFPDrmi\000SHUFPDrri\000SHUFP" | |
| "Srmi\000SHUFPSrri\000SIDT16m\000SIDTm\000SIN_F\000SIN_Fp32\000SIN_Fp64\000" | |
| "SIN_Fp80\000SLDT16m\000SLDT16r\000SLDT32r\000SLDT64m\000SLDT64r\000SMSW" | |
| "16m\000SMSW16r\000SMSW32r\000SMSW64r\000SQRTPDm\000SQRTPDm_Int\000SQRTP" | |
| "Dr\000SQRTPDr_Int\000SQRTPSm\000SQRTPSm_Int\000SQRTPSr\000SQRTPSr_Int\000" | |
| "SQRTSDm\000SQRTSDm_Int\000SQRTSDr\000SQRTSDr_Int\000SQRTSSm\000SQRTSSm_" | |
| "Int\000SQRTSSr\000SQRTSSr_Int\000SQRT_F\000SQRT_Fp32\000SQRT_Fp64\000SQ" | |
| "RT_Fp80\000SS_PREFIX\000STC\000STD\000STI\000STMXCSR\000STOSB\000STOSD\000" | |
| "STOSQ\000STOSW\000STR16r\000STR32r\000STR64r\000STRm\000ST_F32m\000ST_F" | |
| "64m\000ST_FP32m\000ST_FP64m\000ST_FP80m\000ST_FPrr\000ST_Fp32m\000ST_Fp" | |
| "64m\000ST_Fp64m32\000ST_Fp80m32\000ST_Fp80m64\000ST_FpP32m\000ST_FpP64m" | |
| "\000ST_FpP64m32\000ST_FpP80m\000ST_FpP80m32\000ST_FpP80m64\000ST_Frr\000" | |
| "SUB16i16\000SUB16mi\000SUB16mi8\000SUB16mr\000SUB16ri\000SUB16ri8\000SU" | |
| "B16rm\000SUB16rr\000SUB16rr_REV\000SUB32i32\000SUB32mi\000SUB32mi8\000S" | |
| "UB32mr\000SUB32ri\000SUB32ri8\000SUB32rm\000SUB32rr\000SUB32rr_REV\000S" | |
| "UB64i32\000SUB64mi32\000SUB64mi8\000SUB64mr\000SUB64ri32\000SUB64ri8\000" | |
| "SUB64rm\000SUB64rr\000SUB64rr_REV\000SUB8i8\000SUB8mi\000SUB8mr\000SUB8" | |
| "ri\000SUB8rm\000SUB8rr\000SUB8rr_REV\000SUBPDrm\000SUBPDrr\000SUBPSrm\000" | |
| "SUBPSrr\000SUBR_F32m\000SUBR_F64m\000SUBR_FI16m\000SUBR_FI32m\000SUBR_F" | |
| "PrST0\000SUBR_FST0r\000SUBR_Fp32m\000SUBR_Fp64m\000SUBR_Fp64m32\000SUBR" | |
| "_Fp80m32\000SUBR_Fp80m64\000SUBR_FpI16m32\000SUBR_FpI16m64\000SUBR_FpI1" | |
| "6m80\000SUBR_FpI32m32\000SUBR_FpI32m64\000SUBR_FpI32m80\000SUBR_FrST0\000" | |
| "SUBSDrm\000SUBSDrm_Int\000SUBSDrr\000SUBSDrr_Int\000SUBSSrm\000SUBSSrm_" | |
| "Int\000SUBSSrr\000SUBSSrr_Int\000SUB_F32m\000SUB_F64m\000SUB_FI16m\000S" | |
| "UB_FI32m\000SUB_FPrST0\000SUB_FST0r\000SUB_Fp32\000SUB_Fp32m\000SUB_Fp6" | |
| "4\000SUB_Fp64m\000SUB_Fp64m32\000SUB_Fp80\000SUB_Fp80m32\000SUB_Fp80m64" | |
| "\000SUB_FpI16m32\000SUB_FpI16m64\000SUB_FpI16m80\000SUB_FpI32m32\000SUB" | |
| "_FpI32m64\000SUB_FpI32m80\000SUB_FrST0\000SWAPGS\000SYSCALL\000SYSENTER" | |
| "\000SYSEXIT\000SYSEXIT64\000SYSRETL\000SYSRETQ\000TAILJMPd\000TAILJMPd6" | |
| "4\000TAILJMPm\000TAILJMPm64\000TAILJMPr\000TAILJMPr64\000TCRETURNdi\000" | |
| "TCRETURNdi64\000TCRETURNmi\000TCRETURNmi64\000TCRETURNri\000TCRETURNri6" | |
| "4\000TEST16i16\000TEST16mi\000TEST16ri\000TEST16rm\000TEST16rr\000TEST3" | |
| "2i32\000TEST32mi\000TEST32ri\000TEST32rm\000TEST32rr\000TEST64i32\000TE" | |
| "ST64mi32\000TEST64ri32\000TEST64rm\000TEST64rr\000TEST8i8\000TEST8mi\000" | |
| "TEST8ri\000TEST8ri_NOREX\000TEST8rm\000TEST8rr\000TLSCall_32\000TLSCall" | |
| "_64\000TLS_addr32\000TLS_addr64\000TRAP\000TST_F\000TST_Fp32\000TST_Fp6" | |
| "4\000TST_Fp80\000TZCNT16rm\000TZCNT16rr\000TZCNT32rm\000TZCNT32rr\000TZ" | |
| "CNT64rm\000TZCNT64rr\000UCOMISDrm\000UCOMISDrr\000UCOMISSrm\000UCOMISSr" | |
| "r\000UCOM_FIPr\000UCOM_FIr\000UCOM_FPPr\000UCOM_FPr\000UCOM_FpIr32\000U" | |
| "COM_FpIr64\000UCOM_FpIr80\000UCOM_Fpr32\000UCOM_Fpr64\000UCOM_Fpr80\000" | |
| "UCOM_Fr\000UD2B\000UNPCKHPDrm\000UNPCKHPDrr\000UNPCKHPSrm\000UNPCKHPSrr" | |
| "\000UNPCKLPDrm\000UNPCKLPDrr\000UNPCKLPSrm\000UNPCKLPSrr\000VAARG_64\000" | |
| "VADDPDYrm\000VADDPDYrr\000VADDPDrm\000VADDPDrr\000VADDPSYrm\000VADDPSYr" | |
| "r\000VADDPSrm\000VADDPSrr\000VADDSDrm\000VADDSDrm_Int\000VADDSDrr\000VA" | |
| "DDSDrr_Int\000VADDSSrm\000VADDSSrm_Int\000VADDSSrr\000VADDSSrr_Int\000V" | |
| "ADDSUBPDYrm\000VADDSUBPDYrr\000VADDSUBPDrm\000VADDSUBPDrr\000VADDSUBPSY" | |
| "rm\000VADDSUBPSYrr\000VADDSUBPSrm\000VADDSUBPSrr\000VAESDECLASTrm\000VA" | |
| "ESDECLASTrr\000VAESDECrm\000VAESDECrr\000VAESENCLASTrm\000VAESENCLASTrr" | |
| "\000VAESENCrm\000VAESENCrr\000VAESIMCrm\000VAESIMCrr\000VAESKEYGENASSIS" | |
| "T128rm\000VAESKEYGENASSIST128rr\000VANDNPDYrm\000VANDNPDYrr\000VANDNPDr" | |
| "m\000VANDNPDrr\000VANDNPSYrm\000VANDNPSYrr\000VANDNPSrm\000VANDNPSrr\000" | |
| "VANDPDYrm\000VANDPDYrr\000VANDPDrm\000VANDPDrr\000VANDPSYrm\000VANDPSYr" | |
| "r\000VANDPSrm\000VANDPSrr\000VASTART_SAVE_XMM_REGS\000VBLENDPDYrmi\000V" | |
| "BLENDPDYrri\000VBLENDPDrmi\000VBLENDPDrri\000VBLENDPSYrmi\000VBLENDPSYr" | |
| "ri\000VBLENDPSrmi\000VBLENDPSrri\000VBLENDVPDYrm\000VBLENDVPDYrr\000VBL" | |
| "ENDVPDrm\000VBLENDVPDrr\000VBLENDVPSYrm\000VBLENDVPSYrr\000VBLENDVPSrm\000" | |
| "VBLENDVPSrr\000VBROADCASTF128\000VBROADCASTSD\000VBROADCASTSS\000VBROAD" | |
| "CASTSSY\000VCMPPDYrmi\000VCMPPDYrmi_alt\000VCMPPDYrri\000VCMPPDYrri_alt" | |
| "\000VCMPPDrmi\000VCMPPDrmi_alt\000VCMPPDrri\000VCMPPDrri_alt\000VCMPPSY" | |
| "rmi\000VCMPPSYrmi_alt\000VCMPPSYrri\000VCMPPSYrri_alt\000VCMPPSrmi\000V" | |
| "CMPPSrmi_alt\000VCMPPSrri\000VCMPPSrri_alt\000VCMPSDrm\000VCMPSDrm_alt\000" | |
| "VCMPSDrr\000VCMPSDrr_alt\000VCMPSSrm\000VCMPSSrm_alt\000VCMPSSrr\000VCM" | |
| "PSSrr_alt\000VCOMISDrm\000VCOMISDrr\000VCOMISSrm\000VCOMISSrr\000VCVTDQ" | |
| "2PDYrm\000VCVTDQ2PDYrr\000VCVTDQ2PDrm\000VCVTDQ2PDrr\000VCVTDQ2PSYrm\000" | |
| "VCVTDQ2PSYrr\000VCVTDQ2PSrm\000VCVTDQ2PSrr\000VCVTPD2DQXrYr\000VCVTPD2D" | |
| "QXrm\000VCVTPD2DQXrr\000VCVTPD2DQYrm\000VCVTPD2DQYrr\000VCVTPD2DQrr\000" | |
| "VCVTPD2PSXrYr\000VCVTPD2PSXrm\000VCVTPD2PSXrr\000VCVTPD2PSYrm\000VCVTPD" | |
| "2PSYrr\000VCVTPD2PSrr\000VCVTPH2PSYrm\000VCVTPH2PSYrr\000VCVTPH2PSrm\000" | |
| "VCVTPH2PSrr\000VCVTPS2DQYrm\000VCVTPS2DQYrr\000VCVTPS2DQrm\000VCVTPS2DQ" | |
| "rr\000VCVTPS2PDYrm\000VCVTPS2PDYrr\000VCVTPS2PDrm\000VCVTPS2PDrr\000VCV" | |
| "TPS2PHYmr\000VCVTPS2PHYrr\000VCVTPS2PHmr\000VCVTPS2PHrr\000VCVTSD2SI64r" | |
| "m\000VCVTSD2SI64rr\000VCVTSD2SIrm\000VCVTSD2SIrr\000VCVTSD2SSrm\000VCVT" | |
| "SD2SSrr\000VCVTSI2SD64rm\000VCVTSI2SD64rr\000VCVTSI2SDLrm\000VCVTSI2SDL" | |
| "rr\000VCVTSI2SDrm\000VCVTSI2SDrr\000VCVTSI2SS64rm\000VCVTSI2SS64rr\000V" | |
| "CVTSI2SSrm\000VCVTSI2SSrr\000VCVTSS2SDrm\000VCVTSS2SDrr\000VCVTSS2SI64r" | |
| "m\000VCVTSS2SI64rr\000VCVTSS2SIrm\000VCVTSS2SIrr\000VCVTTPD2DQXrYr\000V" | |
| "CVTTPD2DQXrm\000VCVTTPD2DQXrr\000VCVTTPD2DQYrm\000VCVTTPD2DQYrr\000VCVT" | |
| "TPD2DQrm\000VCVTTPD2DQrr\000VCVTTPS2DQYrm\000VCVTTPS2DQYrr\000VCVTTPS2D" | |
| "Qrm\000VCVTTPS2DQrr\000VCVTTSD2SI64rm\000VCVTTSD2SI64rr\000VCVTTSD2SIrm" | |
| "\000VCVTTSD2SIrr\000VCVTTSS2SI64rm\000VCVTTSS2SI64rr\000VCVTTSS2SIrm\000" | |
| "VCVTTSS2SIrr\000VDIVPDYrm\000VDIVPDYrr\000VDIVPDrm\000VDIVPDrr\000VDIVP" | |
| "SYrm\000VDIVPSYrr\000VDIVPSrm\000VDIVPSrr\000VDIVSDrm\000VDIVSDrm_Int\000" | |
| "VDIVSDrr\000VDIVSDrr_Int\000VDIVSSrm\000VDIVSSrm_Int\000VDIVSSrr\000VDI" | |
| "VSSrr_Int\000VDPPDrmi\000VDPPDrri\000VDPPSYrmi\000VDPPSYrri\000VDPPSrmi" | |
| "\000VDPPSrri\000VERRm\000VERRr\000VERWm\000VERWr\000VEXTRACTF128mr\000V" | |
| "EXTRACTF128rr\000VEXTRACTPSmr\000VEXTRACTPSrr\000VEXTRACTPSrr64\000VFMA" | |
| "DDPDr132m\000VFMADDPDr132mY\000VFMADDPDr132r\000VFMADDPDr132rY\000VFMAD" | |
| "DPDr213m\000VFMADDPDr213mY\000VFMADDPDr213r\000VFMADDPDr213rY\000VFMADD" | |
| "PDr231m\000VFMADDPDr231mY\000VFMADDPDr231r\000VFMADDPDr231rY\000VFMADDP" | |
| "Sr132m\000VFMADDPSr132mY\000VFMADDPSr132r\000VFMADDPSr132rY\000VFMADDPS" | |
| "r213m\000VFMADDPSr213mY\000VFMADDPSr213r\000VFMADDPSr213rY\000VFMADDPSr" | |
| "231m\000VFMADDPSr231mY\000VFMADDPSr231r\000VFMADDPSr231rY\000VFMADDSUBP" | |
| "Dr132m\000VFMADDSUBPDr132mY\000VFMADDSUBPDr132r\000VFMADDSUBPDr132rY\000" | |
| "VFMADDSUBPDr213m\000VFMADDSUBPDr213mY\000VFMADDSUBPDr213r\000VFMADDSUBP" | |
| "Dr213rY\000VFMADDSUBPDr231m\000VFMADDSUBPDr231mY\000VFMADDSUBPDr231r\000" | |
| "VFMADDSUBPDr231rY\000VFMADDSUBPSr132m\000VFMADDSUBPSr132mY\000VFMADDSUB" | |
| "PSr132r\000VFMADDSUBPSr132rY\000VFMADDSUBPSr213m\000VFMADDSUBPSr213mY\000" | |
| "VFMADDSUBPSr213r\000VFMADDSUBPSr213rY\000VFMADDSUBPSr231m\000VFMADDSUBP" | |
| "Sr231mY\000VFMADDSUBPSr231r\000VFMADDSUBPSr231rY\000VFMSUBADDPDr132m\000" | |
| "VFMSUBADDPDr132mY\000VFMSUBADDPDr132r\000VFMSUBADDPDr132rY\000VFMSUBADD" | |
| "PDr213m\000VFMSUBADDPDr213mY\000VFMSUBADDPDr213r\000VFMSUBADDPDr213rY\000" | |
| "VFMSUBADDPDr231m\000VFMSUBADDPDr231mY\000VFMSUBADDPDr231r\000VFMSUBADDP" | |
| "Dr231rY\000VFMSUBADDPSr132m\000VFMSUBADDPSr132mY\000VFMSUBADDPSr132r\000" | |
| "VFMSUBADDPSr132rY\000VFMSUBADDPSr213m\000VFMSUBADDPSr213mY\000VFMSUBADD" | |
| "PSr213r\000VFMSUBADDPSr213rY\000VFMSUBADDPSr231m\000VFMSUBADDPSr231mY\000" | |
| "VFMSUBADDPSr231r\000VFMSUBADDPSr231rY\000VFMSUBPDr132m\000VFMSUBPDr132m" | |
| "Y\000VFMSUBPDr132r\000VFMSUBPDr132rY\000VFMSUBPDr213m\000VFMSUBPDr213mY" | |
| "\000VFMSUBPDr213r\000VFMSUBPDr213rY\000VFMSUBPDr231m\000VFMSUBPDr231mY\000" | |
| "VFMSUBPDr231r\000VFMSUBPDr231rY\000VFMSUBPSr132m\000VFMSUBPSr132mY\000V" | |
| "FMSUBPSr132r\000VFMSUBPSr132rY\000VFMSUBPSr213m\000VFMSUBPSr213mY\000VF" | |
| "MSUBPSr213r\000VFMSUBPSr213rY\000VFMSUBPSr231m\000VFMSUBPSr231mY\000VFM" | |
| "SUBPSr231r\000VFMSUBPSr231rY\000VFNMADDPDr132m\000VFNMADDPDr132mY\000VF" | |
| "NMADDPDr132r\000VFNMADDPDr132rY\000VFNMADDPDr213m\000VFNMADDPDr213mY\000" | |
| "VFNMADDPDr213r\000VFNMADDPDr213rY\000VFNMADDPDr231m\000VFNMADDPDr231mY\000" | |
| "VFNMADDPDr231r\000VFNMADDPDr231rY\000VFNMADDPSr132m\000VFNMADDPSr132mY\000" | |
| "VFNMADDPSr132r\000VFNMADDPSr132rY\000VFNMADDPSr213m\000VFNMADDPSr213mY\000" | |
| "VFNMADDPSr213r\000VFNMADDPSr213rY\000VFNMADDPSr231m\000VFNMADDPSr231mY\000" | |
| "VFNMADDPSr231r\000VFNMADDPSr231rY\000VFNMSUBPDr132m\000VFNMSUBPDr132mY\000" | |
| "VFNMSUBPDr132r\000VFNMSUBPDr132rY\000VFNMSUBPDr213m\000VFNMSUBPDr213mY\000" | |
| "VFNMSUBPDr213r\000VFNMSUBPDr213rY\000VFNMSUBPDr231m\000VFNMSUBPDr231mY\000" | |
| "VFNMSUBPDr231r\000VFNMSUBPDr231rY\000VFNMSUBPSr132m\000VFNMSUBPSr132mY\000" | |
| "VFNMSUBPSr132r\000VFNMSUBPSr132rY\000VFNMSUBPSr213m\000VFNMSUBPSr213mY\000" | |
| "VFNMSUBPSr213r\000VFNMSUBPSr213rY\000VFNMSUBPSr231m\000VFNMSUBPSr231mY\000" | |
| "VFNMSUBPSr231r\000VFNMSUBPSr231rY\000VFsANDNPDrm\000VFsANDNPDrr\000VFsA" | |
| "NDNPSrm\000VFsANDNPSrr\000VFsANDPDrm\000VFsANDPDrr\000VFsANDPSrm\000VFs" | |
| "ANDPSrr\000VFsORPDrm\000VFsORPDrr\000VFsORPSrm\000VFsORPSrr\000VFsXORPD" | |
| "rm\000VFsXORPDrr\000VFsXORPSrm\000VFsXORPSrr\000VHADDPDYrm\000VHADDPDYr" | |
| "r\000VHADDPDrm\000VHADDPDrr\000VHADDPSYrm\000VHADDPSYrr\000VHADDPSrm\000" | |
| "VHADDPSrr\000VHSUBPDYrm\000VHSUBPDYrr\000VHSUBPDrm\000VHSUBPDrr\000VHSU" | |
| "BPSYrm\000VHSUBPSYrr\000VHSUBPSrm\000VHSUBPSrr\000VINSERTF128rm\000VINS" | |
| "ERTF128rr\000VINSERTPSrm\000VINSERTPSrr\000VLDDQUYrm\000VLDDQUrm\000VLD" | |
| "MXCSR\000VMASKMOVDQU\000VMASKMOVDQU64\000VMASKMOVPDYmr\000VMASKMOVPDYrm" | |
| "\000VMASKMOVPDmr\000VMASKMOVPDrm\000VMASKMOVPSYmr\000VMASKMOVPSYrm\000V" | |
| "MASKMOVPSmr\000VMASKMOVPSrm\000VMAXPDYrm\000VMAXPDYrm_Int\000VMAXPDYrr\000" | |
| "VMAXPDYrr_Int\000VMAXPDrm\000VMAXPDrm_Int\000VMAXPDrr\000VMAXPDrr_Int\000" | |
| "VMAXPSYrm\000VMAXPSYrm_Int\000VMAXPSYrr\000VMAXPSYrr_Int\000VMAXPSrm\000" | |
| "VMAXPSrm_Int\000VMAXPSrr\000VMAXPSrr_Int\000VMAXSDrm\000VMAXSDrm_Int\000" | |
| "VMAXSDrr\000VMAXSDrr_Int\000VMAXSSrm\000VMAXSSrm_Int\000VMAXSSrr\000VMA" | |
| "XSSrr_Int\000VMCALL\000VMCLEARm\000VMINPDYrm\000VMINPDYrm_Int\000VMINPD" | |
| "Yrr\000VMINPDYrr_Int\000VMINPDrm\000VMINPDrm_Int\000VMINPDrr\000VMINPDr" | |
| "r_Int\000VMINPSYrm\000VMINPSYrm_Int\000VMINPSYrr\000VMINPSYrr_Int\000VM" | |
| "INPSrm\000VMINPSrm_Int\000VMINPSrr\000VMINPSrr_Int\000VMINSDrm\000VMINS" | |
| "Drm_Int\000VMINSDrr\000VMINSDrr_Int\000VMINSSrm\000VMINSSrm_Int\000VMIN" | |
| "SSrr\000VMINSSrr_Int\000VMLAUNCH\000VMOV64toPQIrr\000VMOV64toSDrm\000VM" | |
| "OV64toSDrr\000VMOVAPDYmr\000VMOVAPDYrm\000VMOVAPDYrr\000VMOVAPDYrr_REV\000" | |
| "VMOVAPDmr\000VMOVAPDrm\000VMOVAPDrr\000VMOVAPDrr_REV\000VMOVAPSYmr\000V" | |
| "MOVAPSYrm\000VMOVAPSYrr\000VMOVAPSYrr_REV\000VMOVAPSmr\000VMOVAPSrm\000" | |
| "VMOVAPSrr\000VMOVAPSrr_REV\000VMOVDDUPYrm\000VMOVDDUPYrr\000VMOVDDUPrm\000" | |
| "VMOVDDUPrr\000VMOVDI2PDIrm\000VMOVDI2PDIrr\000VMOVDI2SSrm\000VMOVDI2SSr" | |
| "r\000VMOVDQAYmr\000VMOVDQAYrm\000VMOVDQAYrr\000VMOVDQAYrr_REV\000VMOVDQ" | |
| "Amr\000VMOVDQArm\000VMOVDQArr\000VMOVDQArr_REV\000VMOVDQUYmr\000VMOVDQU" | |
| "Yrm\000VMOVDQUYrr\000VMOVDQUYrr_REV\000VMOVDQUmr\000VMOVDQUmr_Int\000VM" | |
| "OVDQUrm\000VMOVDQUrr\000VMOVDQUrr_REV\000VMOVHLPSrr\000VMOVHPDmr\000VMO" | |
| "VHPDrm\000VMOVHPSmr\000VMOVHPSrm\000VMOVLHPSrr\000VMOVLPDmr\000VMOVLPDr" | |
| "m\000VMOVLPSmr\000VMOVLPSrm\000VMOVLQ128mr\000VMOVMSKPDYr64r\000VMOVMSK" | |
| "PDYrr32\000VMOVMSKPDYrr64\000VMOVMSKPDr64r\000VMOVMSKPDrr32\000VMOVMSKP" | |
| "Drr64\000VMOVMSKPSYr64r\000VMOVMSKPSYrr32\000VMOVMSKPSYrr64\000VMOVMSKP" | |
| "Sr64r\000VMOVMSKPSrr32\000VMOVMSKPSrr64\000VMOVNTDQArm\000VMOVNTDQY_64m" | |
| "r\000VMOVNTDQYmr\000VMOVNTDQ_64mr\000VMOVNTDQmr\000VMOVNTPDYmr\000VMOVN" | |
| "TPDmr\000VMOVNTPSYmr\000VMOVNTPSmr\000VMOVPDI2DImr\000VMOVPDI2DIrr\000V" | |
| "MOVPQI2QImr\000VMOVPQIto64rr\000VMOVQI2PQIrm\000VMOVQd64rr\000VMOVQd64r" | |
| "r_alt\000VMOVQs64rr\000VMOVQxrxr\000VMOVSDmr\000VMOVSDrm\000VMOVSDrr\000" | |
| "VMOVSDrr_REV\000VMOVSDto64mr\000VMOVSDto64rr\000VMOVSHDUPYrm\000VMOVSHD" | |
| "UPYrr\000VMOVSHDUPrm\000VMOVSHDUPrr\000VMOVSLDUPYrm\000VMOVSLDUPYrr\000" | |
| "VMOVSLDUPrm\000VMOVSLDUPrr\000VMOVSS2DImr\000VMOVSS2DIrr\000VMOVSSmr\000" | |
| "VMOVSSrm\000VMOVSSrr\000VMOVSSrr_REV\000VMOVUPDYmr\000VMOVUPDYrm\000VMO" | |
| "VUPDYrr\000VMOVUPDYrr_REV\000VMOVUPDmr\000VMOVUPDrm\000VMOVUPDrr\000VMO" | |
| "VUPDrr_REV\000VMOVUPSYmr\000VMOVUPSYrm\000VMOVUPSYrr\000VMOVUPSYrr_REV\000" | |
| "VMOVUPSmr\000VMOVUPSrm\000VMOVUPSrr\000VMOVUPSrr_REV\000VMOVZDI2PDIrm\000" | |
| "VMOVZDI2PDIrr\000VMOVZPQILo2PQIrm\000VMOVZPQILo2PQIrr\000VMOVZQI2PQIrm\000" | |
| "VMOVZQI2PQIrr\000VMPSADBWrmi\000VMPSADBWrri\000VMPTRLDm\000VMPTRSTm\000" | |
| "VMREAD32rm\000VMREAD32rr\000VMREAD64rm\000VMREAD64rr\000VMRESUME\000VMU" | |
| "LPDYrm\000VMULPDYrr\000VMULPDrm\000VMULPDrr\000VMULPSYrm\000VMULPSYrr\000" | |
| "VMULPSrm\000VMULPSrr\000VMULSDrm\000VMULSDrm_Int\000VMULSDrr\000VMULSDr" | |
| "r_Int\000VMULSSrm\000VMULSSrm_Int\000VMULSSrr\000VMULSSrr_Int\000VMWRIT" | |
| "E32rm\000VMWRITE32rr\000VMWRITE64rm\000VMWRITE64rr\000VMXOFF\000VMXON\000" | |
| "VORPDYrm\000VORPDYrr\000VORPDrm\000VORPDrr\000VORPSYrm\000VORPSYrr\000V" | |
| "ORPSrm\000VORPSrr\000VPABSBrm128\000VPABSBrr128\000VPABSDrm128\000VPABS" | |
| "Drr128\000VPABSWrm128\000VPABSWrr128\000VPACKSSDWrm\000VPACKSSDWrr\000V" | |
| "PACKSSWBrm\000VPACKSSWBrr\000VPACKUSDWrm\000VPACKUSDWrr\000VPACKUSWBrm\000" | |
| "VPACKUSWBrr\000VPADDBrm\000VPADDBrr\000VPADDDrm\000VPADDDrr\000VPADDQrm" | |
| "\000VPADDQrr\000VPADDSBrm\000VPADDSBrr\000VPADDSWrm\000VPADDSWrr\000VPA" | |
| "DDUSBrm\000VPADDUSBrr\000VPADDUSWrm\000VPADDUSWrr\000VPADDWrm\000VPADDW" | |
| "rr\000VPALIGNR128rm\000VPALIGNR128rr\000VPANDNrm\000VPANDNrr\000VPANDrm" | |
| "\000VPANDrr\000VPAVGBrm\000VPAVGBrr\000VPAVGWrm\000VPAVGWrr\000VPBLENDV" | |
| "Brm\000VPBLENDVBrr\000VPBLENDWrmi\000VPBLENDWrri\000VPCLMULQDQrm\000VPC" | |
| "LMULQDQrr\000VPCMPEQBrm\000VPCMPEQBrr\000VPCMPEQDrm\000VPCMPEQDrr\000VP" | |
| "CMPEQQrm\000VPCMPEQQrr\000VPCMPEQWrm\000VPCMPEQWrr\000VPCMPESTRIArm\000" | |
| "VPCMPESTRIArr\000VPCMPESTRICrm\000VPCMPESTRICrr\000VPCMPESTRIOrm\000VPC" | |
| "MPESTRIOrr\000VPCMPESTRISrm\000VPCMPESTRISrr\000VPCMPESTRIZrm\000VPCMPE" | |
| "STRIZrr\000VPCMPESTRIrm\000VPCMPESTRIrr\000VPCMPESTRM128MEM\000VPCMPEST" | |
| "RM128REG\000VPCMPESTRM128rm\000VPCMPESTRM128rr\000VPCMPGTBrm\000VPCMPGT" | |
| "Brr\000VPCMPGTDrm\000VPCMPGTDrr\000VPCMPGTQrm\000VPCMPGTQrr\000VPCMPGTW" | |
| "rm\000VPCMPGTWrr\000VPCMPISTRIArm\000VPCMPISTRIArr\000VPCMPISTRICrm\000" | |
| "VPCMPISTRICrr\000VPCMPISTRIOrm\000VPCMPISTRIOrr\000VPCMPISTRISrm\000VPC" | |
| "MPISTRISrr\000VPCMPISTRIZrm\000VPCMPISTRIZrr\000VPCMPISTRIrm\000VPCMPIS" | |
| "TRIrr\000VPCMPISTRM128MEM\000VPCMPISTRM128REG\000VPCMPISTRM128rm\000VPC" | |
| "MPISTRM128rr\000VPERM2F128rm\000VPERM2F128rr\000VPERMILPDYmi\000VPERMIL" | |
| "PDYri\000VPERMILPDYrm\000VPERMILPDYrr\000VPERMILPDmi\000VPERMILPDri\000" | |
| "VPERMILPDrm\000VPERMILPDrr\000VPERMILPSYmi\000VPERMILPSYri\000VPERMILPS" | |
| "Yrm\000VPERMILPSYrr\000VPERMILPSmi\000VPERMILPSri\000VPERMILPSrm\000VPE" | |
| "RMILPSrr\000VPEXTRBmr\000VPEXTRBrr\000VPEXTRBrr64\000VPEXTRDmr\000VPEXT" | |
| "RDrr\000VPEXTRQmr\000VPEXTRQrr\000VPEXTRWmr\000VPEXTRWri\000VPHADDDrm12" | |
| "8\000VPHADDDrr128\000VPHADDSWrm128\000VPHADDSWrr128\000VPHADDWrm128\000" | |
| "VPHADDWrr128\000VPHMINPOSUWrm128\000VPHMINPOSUWrr128\000VPHSUBDrm128\000" | |
| "VPHSUBDrr128\000VPHSUBSWrm128\000VPHSUBSWrr128\000VPHSUBWrm128\000VPHSU" | |
| "BWrr128\000VPINSRBrm\000VPINSRBrr\000VPINSRDrm\000VPINSRDrr\000VPINSRQr" | |
| "m\000VPINSRQrr\000VPINSRWrmi\000VPINSRWrr64i\000VPINSRWrri\000VPMADDUBS" | |
| "Wrm128\000VPMADDUBSWrr128\000VPMADDWDrm\000VPMADDWDrr\000VPMAXSBrm\000V" | |
| "PMAXSBrr\000VPMAXSDrm\000VPMAXSDrr\000VPMAXSWrm\000VPMAXSWrr\000VPMAXUB" | |
| "rm\000VPMAXUBrr\000VPMAXUDrm\000VPMAXUDrr\000VPMAXUWrm\000VPMAXUWrr\000" | |
| "VPMINSBrm\000VPMINSBrr\000VPMINSDrm\000VPMINSDrr\000VPMINSWrm\000VPMINS" | |
| "Wrr\000VPMINUBrm\000VPMINUBrr\000VPMINUDrm\000VPMINUDrr\000VPMINUWrm\000" | |
| "VPMINUWrr\000VPMOVMSKBr64r\000VPMOVMSKBrr\000VPMOVSXBDrm\000VPMOVSXBDrr" | |
| "\000VPMOVSXBQrm\000VPMOVSXBQrr\000VPMOVSXBWrm\000VPMOVSXBWrr\000VPMOVSX" | |
| "DQrm\000VPMOVSXDQrr\000VPMOVSXWDrm\000VPMOVSXWDrr\000VPMOVSXWQrm\000VPM" | |
| "OVSXWQrr\000VPMOVZXBDrm\000VPMOVZXBDrr\000VPMOVZXBQrm\000VPMOVZXBQrr\000" | |
| "VPMOVZXBWrm\000VPMOVZXBWrr\000VPMOVZXDQrm\000VPMOVZXDQrr\000VPMOVZXWDrm" | |
| "\000VPMOVZXWDrr\000VPMOVZXWQrm\000VPMOVZXWQrr\000VPMULDQrm\000VPMULDQrr" | |
| "\000VPMULHRSWrm128\000VPMULHRSWrr128\000VPMULHUWrm\000VPMULHUWrr\000VPM" | |
| "ULHWrm\000VPMULHWrr\000VPMULLDrm\000VPMULLDrr\000VPMULLWrm\000VPMULLWrr" | |
| "\000VPMULUDQrm\000VPMULUDQrr\000VPORrm\000VPORrr\000VPSADBWrm\000VPSADB" | |
| "Wrr\000VPSHUFBrm128\000VPSHUFBrr128\000VPSHUFDmi\000VPSHUFDri\000VPSHUF" | |
| "HWmi\000VPSHUFHWri\000VPSHUFLWmi\000VPSHUFLWri\000VPSIGNBrm128\000VPSIG" | |
| "NBrr128\000VPSIGNDrm128\000VPSIGNDrr128\000VPSIGNWrm128\000VPSIGNWrr128" | |
| "\000VPSLLDQri\000VPSLLDri\000VPSLLDrm\000VPSLLDrr\000VPSLLQri\000VPSLLQ" | |
| "rm\000VPSLLQrr\000VPSLLWri\000VPSLLWrm\000VPSLLWrr\000VPSRADri\000VPSRA" | |
| "Drm\000VPSRADrr\000VPSRAWri\000VPSRAWrm\000VPSRAWrr\000VPSRLDQri\000VPS" | |
| "RLDri\000VPSRLDrm\000VPSRLDrr\000VPSRLQri\000VPSRLQrm\000VPSRLQrr\000VP" | |
| "SRLWri\000VPSRLWrm\000VPSRLWrr\000VPSUBBrm\000VPSUBBrr\000VPSUBDrm\000V" | |
| "PSUBDrr\000VPSUBQrm\000VPSUBQrr\000VPSUBSBrm\000VPSUBSBrr\000VPSUBSWrm\000" | |
| "VPSUBSWrr\000VPSUBUSBrm\000VPSUBUSBrr\000VPSUBUSWrm\000VPSUBUSWrr\000VP" | |
| "SUBWrm\000VPSUBWrr\000VPTESTYrm\000VPTESTYrr\000VPTESTrm\000VPTESTrr\000" | |
| "VPUNPCKHBWrm\000VPUNPCKHBWrr\000VPUNPCKHDQrm\000VPUNPCKHDQrr\000VPUNPCK" | |
| "HQDQrm\000VPUNPCKHQDQrr\000VPUNPCKHWDrm\000VPUNPCKHWDrr\000VPUNPCKLBWrm" | |
| "\000VPUNPCKLBWrr\000VPUNPCKLDQrm\000VPUNPCKLDQrr\000VPUNPCKLQDQrm\000VP" | |
| "UNPCKLQDQrr\000VPUNPCKLWDrm\000VPUNPCKLWDrr\000VPXORrm\000VPXORrr\000VR" | |
| "CPPSYm\000VRCPPSYm_Int\000VRCPPSYr\000VRCPPSYr_Int\000VRCPPSm\000VRCPPS" | |
| "m_Int\000VRCPPSr\000VRCPPSr_Int\000VRCPSSm\000VRCPSSm_Int\000VRCPSSr\000" | |
| "VROUNDPDm\000VROUNDPDm_AVX\000VROUNDPDr\000VROUNDPDr_AVX\000VROUNDPSm\000" | |
| "VROUNDPSm_AVX\000VROUNDPSr\000VROUNDPSr_AVX\000VROUNDSDm\000VROUNDSDm_A" | |
| "VX\000VROUNDSDr\000VROUNDSDr_AVX\000VROUNDSSm\000VROUNDSSm_AVX\000VROUN" | |
| "DSSr\000VROUNDSSr_AVX\000VROUNDYPDm\000VROUNDYPDm_AVX\000VROUNDYPDr\000" | |
| "VROUNDYPDr_AVX\000VROUNDYPSm\000VROUNDYPSm_AVX\000VROUNDYPSr\000VROUNDY" | |
| "PSr_AVX\000VRSQRTPSYm\000VRSQRTPSYm_Int\000VRSQRTPSYr\000VRSQRTPSYr_Int" | |
| "\000VRSQRTPSm\000VRSQRTPSm_Int\000VRSQRTPSr\000VRSQRTPSr_Int\000VRSQRTS" | |
| "Sm\000VRSQRTSSm_Int\000VRSQRTSSr\000VSHUFPDYrmi\000VSHUFPDYrri\000VSHUF" | |
| "PDrmi\000VSHUFPDrri\000VSHUFPSYrmi\000VSHUFPSYrri\000VSHUFPSrmi\000VSHU" | |
| "FPSrri\000VSQRTPDYm\000VSQRTPDYm_Int\000VSQRTPDYr\000VSQRTPDYr_Int\000V" | |
| "SQRTPDm\000VSQRTPDm_Int\000VSQRTPDr\000VSQRTPDr_Int\000VSQRTPSYm\000VSQ" | |
| "RTPSYm_Int\000VSQRTPSYr\000VSQRTPSYr_Int\000VSQRTPSm\000VSQRTPSm_Int\000" | |
| "VSQRTPSr\000VSQRTPSr_Int\000VSQRTSDm\000VSQRTSDm_Int\000VSQRTSDr\000VSQ" | |
| "RTSSm\000VSQRTSSm_Int\000VSQRTSSr\000VSTMXCSR\000VSUBPDYrm\000VSUBPDYrr" | |
| "\000VSUBPDrm\000VSUBPDrr\000VSUBPSYrm\000VSUBPSYrr\000VSUBPSrm\000VSUBP" | |
| "Srr\000VSUBSDrm\000VSUBSDrm_Int\000VSUBSDrr\000VSUBSDrr_Int\000VSUBSSrm" | |
| "\000VSUBSSrm_Int\000VSUBSSrr\000VSUBSSrr_Int\000VTESTPDYrm\000VTESTPDYr" | |
| "r\000VTESTPDrm\000VTESTPDrr\000VTESTPSYrm\000VTESTPSYrr\000VTESTPSrm\000" | |
| "VTESTPSrr\000VUCOMISDrm\000VUCOMISDrr\000VUCOMISSrm\000VUCOMISSrr\000VU" | |
| "NPCKHPDYrm\000VUNPCKHPDYrr\000VUNPCKHPDrm\000VUNPCKHPDrr\000VUNPCKHPSYr" | |
| "m\000VUNPCKHPSYrr\000VUNPCKHPSrm\000VUNPCKHPSrr\000VUNPCKLPDYrm\000VUNP" | |
| "CKLPDYrr\000VUNPCKLPDrm\000VUNPCKLPDrr\000VUNPCKLPSYrm\000VUNPCKLPSYrr\000" | |
| "VUNPCKLPSrm\000VUNPCKLPSrr\000VXORPDYrm\000VXORPDYrr\000VXORPDrm\000VXO" | |
| "RPDrr\000VXORPSYrm\000VXORPSYrr\000VXORPSrm\000VXORPSrr\000VZEROALL\000" | |
| "VZEROUPPER\000V_SET0\000V_SETALLONES\000W64ALLOCA\000WAIT\000WBINVD\000" | |
| "WINCALL64m\000WINCALL64pcrel32\000WINCALL64r\000WIN_ALLOCA\000WRFSBASE\000" | |
| "WRFSBASE64\000WRGSBASE\000WRGSBASE64\000WRMSR\000XADD16rm\000XADD16rr\000" | |
| "XADD32rm\000XADD32rr\000XADD64rm\000XADD64rr\000XADD8rm\000XADD8rr\000X" | |
| "CHG16ar\000XCHG16rm\000XCHG16rr\000XCHG32ar\000XCHG32ar64\000XCHG32rm\000" | |
| "XCHG32rr\000XCHG64ar\000XCHG64rm\000XCHG64rr\000XCHG8rm\000XCHG8rr\000X" | |
| "CH_F\000XCRYPTCBC\000XCRYPTCFB\000XCRYPTCTR\000XCRYPTECB\000XCRYPTOFB\000" | |
| "XGETBV\000XLAT\000XOR16i16\000XOR16mi\000XOR16mi8\000XOR16mr\000XOR16ri" | |
| "\000XOR16ri8\000XOR16rm\000XOR16rr\000XOR16rr_REV\000XOR32i32\000XOR32m" | |
| "i\000XOR32mi8\000XOR32mr\000XOR32ri\000XOR32ri8\000XOR32rm\000XOR32rr\000" | |
| "XOR32rr_REV\000XOR64i32\000XOR64mi32\000XOR64mi8\000XOR64mr\000XOR64ri3" | |
| "2\000XOR64ri8\000XOR64rm\000XOR64rr\000XOR64rr_REV\000XOR8i8\000XOR8mi\000" | |
| "XOR8mr\000XOR8ri\000XOR8rm\000XOR8rr\000XOR8rr_REV\000XORPDrm\000XORPDr" | |
| "r\000XORPSrm\000XORPSrr\000XRSTOR\000XRSTOR64\000XSAVE\000XSAVE64\000XS" | |
| "AVEOPT\000XSAVEOPT64\000XSETBV\000XSHA1\000XSHA256\000XSTORE\000"; | |
| return Strs+InstAsmOffset[Opcode]; | |
| } | |
| #endif | |
| #ifdef PRINT_ALIAS_INSTR | |
| #undef PRINT_ALIAS_INSTR | |
| namespace { // Register classes | |
| enum RegClass { | |
| RC_GR8, | |
| RC_GR64, | |
| RC_GR16, | |
| RC_GR32, | |
| RC_FR32, | |
| RC_GR64_with_sub_8bit, | |
| RC_FR64, | |
| RC_CONTROL_REG, | |
| RC_VR128, | |
| RC_VR256, | |
| RC_GR32_NOSP, | |
| RC_GR32_NOAX, | |
| RC_GR64_NOSP, | |
| RC_GR64_TC, | |
| RC_GR64_NOREX, | |
| RC_GR8_NOREX, | |
| RC_GR16_NOREX, | |
| RC_GR32_NOREX, | |
| RC_DEBUG_REG, | |
| RC_VR64, | |
| RC_GR64_TC_with_sub_8bit, | |
| RC_GR64_NOREX_with_sub_8bit, | |
| RC_RST, | |
| RC_RFP32, | |
| RC_GR32_NOREX_NOSP, | |
| RC_RFP64, | |
| RC_GR64_NOREX_NOSP, | |
| RC_RFP80, | |
| RC_SEGMENT_REG, | |
| RC_GR64_TCW64, | |
| RC_GR8_ABCD_L, | |
| RC_GR8_ABCD_H, | |
| RC_GR16_ABCD, | |
| RC_GR32_ABCD, | |
| RC_GR64_ABCD, | |
| RC_GR32_TC, | |
| RC_GR32_NOAX_with_sub_8bit_hi, | |
| RC_GR64_TC_with_sub_8bit_hi, | |
| RC_GR32_AD, | |
| RC_CCR | |
| }; | |
| } // end anonymous namespace | |
| static bool regIsInRegisterClass(unsigned RegClass, unsigned Reg) { | |
| switch (RegClass) { | |
| default: break; | |
| case RC_GR8: | |
| switch (Reg) { | |
| default: break; | |
| case X86::AL: | |
| case X86::CL: | |
| case X86::DL: | |
| case X86::AH: | |
| case X86::CH: | |
| case X86::DH: | |
| case X86::BL: | |
| case X86::BH: | |
| case X86::SIL: | |
| case X86::DIL: | |
| case X86::BPL: | |
| case X86::SPL: | |
| case X86::R8B: | |
| case X86::R9B: | |
| case X86::R10B: | |
| case X86::R11B: | |
| case X86::R14B: | |
| case X86::R15B: | |
| case X86::R12B: | |
| case X86::R13B: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::R8: | |
| case X86::R9: | |
| case X86::R10: | |
| case X86::R11: | |
| case X86::RBX: | |
| case X86::R14: | |
| case X86::R15: | |
| case X86::R12: | |
| case X86::R13: | |
| case X86::RBP: | |
| case X86::RSP: | |
| case X86::RIP: | |
| return true; | |
| } | |
| break; | |
| case RC_GR16: | |
| switch (Reg) { | |
| default: break; | |
| case X86::AX: | |
| case X86::CX: | |
| case X86::DX: | |
| case X86::SI: | |
| case X86::DI: | |
| case X86::BX: | |
| case X86::BP: | |
| case X86::SP: | |
| case X86::R8W: | |
| case X86::R9W: | |
| case X86::R10W: | |
| case X86::R11W: | |
| case X86::R14W: | |
| case X86::R15W: | |
| case X86::R12W: | |
| case X86::R13W: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32: | |
| switch (Reg) { | |
| default: break; | |
| case X86::EAX: | |
| case X86::ECX: | |
| case X86::EDX: | |
| case X86::ESI: | |
| case X86::EDI: | |
| case X86::EBX: | |
| case X86::EBP: | |
| case X86::ESP: | |
| case X86::R8D: | |
| case X86::R9D: | |
| case X86::R10D: | |
| case X86::R11D: | |
| case X86::R14D: | |
| case X86::R15D: | |
| case X86::R12D: | |
| case X86::R13D: | |
| return true; | |
| } | |
| break; | |
| case RC_FR32: | |
| switch (Reg) { | |
| default: break; | |
| case X86::XMM0: | |
| case X86::XMM1: | |
| case X86::XMM2: | |
| case X86::XMM3: | |
| case X86::XMM4: | |
| case X86::XMM5: | |
| case X86::XMM6: | |
| case X86::XMM7: | |
| case X86::XMM8: | |
| case X86::XMM9: | |
| case X86::XMM10: | |
| case X86::XMM11: | |
| case X86::XMM12: | |
| case X86::XMM13: | |
| case X86::XMM14: | |
| case X86::XMM15: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_with_sub_8bit: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::R8: | |
| case X86::R9: | |
| case X86::R10: | |
| case X86::R11: | |
| case X86::RBX: | |
| case X86::R14: | |
| case X86::R15: | |
| case X86::R12: | |
| case X86::R13: | |
| case X86::RBP: | |
| case X86::RSP: | |
| return true; | |
| } | |
| break; | |
| case RC_FR64: | |
| switch (Reg) { | |
| default: break; | |
| case X86::XMM0: | |
| case X86::XMM1: | |
| case X86::XMM2: | |
| case X86::XMM3: | |
| case X86::XMM4: | |
| case X86::XMM5: | |
| case X86::XMM6: | |
| case X86::XMM7: | |
| case X86::XMM8: | |
| case X86::XMM9: | |
| case X86::XMM10: | |
| case X86::XMM11: | |
| case X86::XMM12: | |
| case X86::XMM13: | |
| case X86::XMM14: | |
| case X86::XMM15: | |
| return true; | |
| } | |
| break; | |
| case RC_CONTROL_REG: | |
| switch (Reg) { | |
| default: break; | |
| case X86::CR0: | |
| case X86::CR1: | |
| case X86::CR2: | |
| case X86::CR3: | |
| case X86::CR4: | |
| case X86::CR5: | |
| case X86::CR6: | |
| case X86::CR7: | |
| case X86::CR8: | |
| case X86::CR9: | |
| case X86::CR10: | |
| case X86::CR11: | |
| case X86::CR12: | |
| case X86::CR13: | |
| case X86::CR14: | |
| case X86::CR15: | |
| return true; | |
| } | |
| break; | |
| case RC_VR128: | |
| switch (Reg) { | |
| default: break; | |
| case X86::XMM0: | |
| case X86::XMM1: | |
| case X86::XMM2: | |
| case X86::XMM3: | |
| case X86::XMM4: | |
| case X86::XMM5: | |
| case X86::XMM6: | |
| case X86::XMM7: | |
| case X86::XMM8: | |
| case X86::XMM9: | |
| case X86::XMM10: | |
| case X86::XMM11: | |
| case X86::XMM12: | |
| case X86::XMM13: | |
| case X86::XMM14: | |
| case X86::XMM15: | |
| return true; | |
| } | |
| break; | |
| case RC_VR256: | |
| switch (Reg) { | |
| default: break; | |
| case X86::YMM0: | |
| case X86::YMM1: | |
| case X86::YMM2: | |
| case X86::YMM3: | |
| case X86::YMM4: | |
| case X86::YMM5: | |
| case X86::YMM6: | |
| case X86::YMM7: | |
| case X86::YMM8: | |
| case X86::YMM9: | |
| case X86::YMM10: | |
| case X86::YMM11: | |
| case X86::YMM12: | |
| case X86::YMM13: | |
| case X86::YMM14: | |
| case X86::YMM15: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_NOSP: | |
| switch (Reg) { | |
| default: break; | |
| case X86::EAX: | |
| case X86::ECX: | |
| case X86::EDX: | |
| case X86::ESI: | |
| case X86::EDI: | |
| case X86::EBX: | |
| case X86::EBP: | |
| case X86::R8D: | |
| case X86::R9D: | |
| case X86::R10D: | |
| case X86::R11D: | |
| case X86::R14D: | |
| case X86::R15D: | |
| case X86::R12D: | |
| case X86::R13D: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_NOAX: | |
| switch (Reg) { | |
| default: break; | |
| case X86::ECX: | |
| case X86::EDX: | |
| case X86::ESI: | |
| case X86::EDI: | |
| case X86::EBX: | |
| case X86::EBP: | |
| case X86::ESP: | |
| case X86::R8D: | |
| case X86::R9D: | |
| case X86::R10D: | |
| case X86::R11D: | |
| case X86::R14D: | |
| case X86::R15D: | |
| case X86::R12D: | |
| case X86::R13D: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_NOSP: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::R8: | |
| case X86::R9: | |
| case X86::R10: | |
| case X86::R11: | |
| case X86::RBX: | |
| case X86::R14: | |
| case X86::R15: | |
| case X86::R12: | |
| case X86::R13: | |
| case X86::RBP: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_TC: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::R8: | |
| case X86::R9: | |
| case X86::R11: | |
| case X86::RIP: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_NOREX: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::RBX: | |
| case X86::RBP: | |
| case X86::RSP: | |
| case X86::RIP: | |
| return true; | |
| } | |
| break; | |
| case RC_GR8_NOREX: | |
| switch (Reg) { | |
| default: break; | |
| case X86::AL: | |
| case X86::CL: | |
| case X86::DL: | |
| case X86::AH: | |
| case X86::CH: | |
| case X86::DH: | |
| case X86::BL: | |
| case X86::BH: | |
| return true; | |
| } | |
| break; | |
| case RC_GR16_NOREX: | |
| switch (Reg) { | |
| default: break; | |
| case X86::AX: | |
| case X86::CX: | |
| case X86::DX: | |
| case X86::SI: | |
| case X86::DI: | |
| case X86::BX: | |
| case X86::BP: | |
| case X86::SP: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_NOREX: | |
| switch (Reg) { | |
| default: break; | |
| case X86::EAX: | |
| case X86::ECX: | |
| case X86::EDX: | |
| case X86::ESI: | |
| case X86::EDI: | |
| case X86::EBX: | |
| case X86::EBP: | |
| case X86::ESP: | |
| return true; | |
| } | |
| break; | |
| case RC_DEBUG_REG: | |
| switch (Reg) { | |
| default: break; | |
| case X86::DR0: | |
| case X86::DR1: | |
| case X86::DR2: | |
| case X86::DR3: | |
| case X86::DR4: | |
| case X86::DR5: | |
| case X86::DR6: | |
| case X86::DR7: | |
| return true; | |
| } | |
| break; | |
| case RC_VR64: | |
| switch (Reg) { | |
| default: break; | |
| case X86::MM0: | |
| case X86::MM1: | |
| case X86::MM2: | |
| case X86::MM3: | |
| case X86::MM4: | |
| case X86::MM5: | |
| case X86::MM6: | |
| case X86::MM7: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_TC_with_sub_8bit: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::R8: | |
| case X86::R9: | |
| case X86::R11: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_NOREX_with_sub_8bit: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::RBX: | |
| case X86::RBP: | |
| case X86::RSP: | |
| return true; | |
| } | |
| break; | |
| case RC_RST: | |
| switch (Reg) { | |
| default: break; | |
| case X86::ST0: | |
| case X86::ST1: | |
| case X86::ST2: | |
| case X86::ST3: | |
| case X86::ST4: | |
| case X86::ST5: | |
| case X86::ST6: | |
| case X86::ST7: | |
| return true; | |
| } | |
| break; | |
| case RC_RFP32: | |
| switch (Reg) { | |
| default: break; | |
| case X86::FP0: | |
| case X86::FP1: | |
| case X86::FP2: | |
| case X86::FP3: | |
| case X86::FP4: | |
| case X86::FP5: | |
| case X86::FP6: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_NOREX_NOSP: | |
| switch (Reg) { | |
| default: break; | |
| case X86::EAX: | |
| case X86::ECX: | |
| case X86::EDX: | |
| case X86::ESI: | |
| case X86::EDI: | |
| case X86::EBX: | |
| case X86::EBP: | |
| return true; | |
| } | |
| break; | |
| case RC_RFP64: | |
| switch (Reg) { | |
| default: break; | |
| case X86::FP0: | |
| case X86::FP1: | |
| case X86::FP2: | |
| case X86::FP3: | |
| case X86::FP4: | |
| case X86::FP5: | |
| case X86::FP6: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_NOREX_NOSP: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RSI: | |
| case X86::RDI: | |
| case X86::RBX: | |
| case X86::RBP: | |
| return true; | |
| } | |
| break; | |
| case RC_RFP80: | |
| switch (Reg) { | |
| default: break; | |
| case X86::FP0: | |
| case X86::FP1: | |
| case X86::FP2: | |
| case X86::FP3: | |
| case X86::FP4: | |
| case X86::FP5: | |
| case X86::FP6: | |
| return true; | |
| } | |
| break; | |
| case RC_SEGMENT_REG: | |
| switch (Reg) { | |
| default: break; | |
| case X86::CS: | |
| case X86::DS: | |
| case X86::SS: | |
| case X86::ES: | |
| case X86::FS: | |
| case X86::GS: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_TCW64: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::R8: | |
| case X86::R9: | |
| case X86::R11: | |
| return true; | |
| } | |
| break; | |
| case RC_GR8_ABCD_L: | |
| switch (Reg) { | |
| default: break; | |
| case X86::AL: | |
| case X86::CL: | |
| case X86::DL: | |
| case X86::BL: | |
| return true; | |
| } | |
| break; | |
| case RC_GR8_ABCD_H: | |
| switch (Reg) { | |
| default: break; | |
| case X86::AH: | |
| case X86::CH: | |
| case X86::DH: | |
| case X86::BH: | |
| return true; | |
| } | |
| break; | |
| case RC_GR16_ABCD: | |
| switch (Reg) { | |
| default: break; | |
| case X86::AX: | |
| case X86::CX: | |
| case X86::DX: | |
| case X86::BX: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_ABCD: | |
| switch (Reg) { | |
| default: break; | |
| case X86::EAX: | |
| case X86::ECX: | |
| case X86::EDX: | |
| case X86::EBX: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_ABCD: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| case X86::RBX: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_TC: | |
| switch (Reg) { | |
| default: break; | |
| case X86::EAX: | |
| case X86::ECX: | |
| case X86::EDX: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_NOAX_with_sub_8bit_hi: | |
| switch (Reg) { | |
| default: break; | |
| case X86::ECX: | |
| case X86::EDX: | |
| case X86::EBX: | |
| return true; | |
| } | |
| break; | |
| case RC_GR64_TC_with_sub_8bit_hi: | |
| switch (Reg) { | |
| default: break; | |
| case X86::RAX: | |
| case X86::RCX: | |
| case X86::RDX: | |
| return true; | |
| } | |
| break; | |
| case RC_GR32_AD: | |
| switch (Reg) { | |
| default: break; | |
| case X86::EAX: | |
| case X86::EDX: | |
| return true; | |
| } | |
| break; | |
| case RC_CCR: | |
| if (Reg == X86::EFLAGS) | |
| return true; | |
| break; | |
| } | |
| return false; | |
| } | |
| static unsigned getMapOperandNumber(const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap, | |
| StringRef Name) { | |
| for (SmallVectorImpl<std::pair<StringRef, unsigned> >::const_iterator | |
| I = OpMap.begin(), E = OpMap.end(); I != E; ++I) | |
| if (I->first == Name) | |
| return I->second; | |
| assert(false && "Operand not in map!"); | |
| return 0; | |
| } | |
| bool X86ATTInstPrinter::printAliasInstr(const MCInst *MI, raw_ostream &OS) { | |
| StringRef AsmString; | |
| SmallVector<std::pair<StringRef, unsigned>, 4> OpMap; | |
| switch (MI->getOpcode()) { | |
| default: return false; | |
| case X86::AAD8i8: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getImm() == 10) { | |
| // (AAD8i8 10) | |
| AsmString = "aad"; | |
| break; | |
| } | |
| return false; | |
| case X86::AAM8i8: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getImm() == 10) { | |
| // (AAM8i8 10) | |
| AsmString = "aam"; | |
| break; | |
| } | |
| return false; | |
| case X86::COM_FIPr: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (COM_FIPr ST1) | |
| AsmString = "fcompi"; | |
| break; | |
| } | |
| return false; | |
| case X86::COM_FIr: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (COM_FIr ST1) | |
| AsmString = "fcomi"; | |
| break; | |
| } | |
| return false; | |
| case X86::DIVR_FPrST0: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (DIVR_FPrST0 ST1) | |
| AsmString = "fdivp"; | |
| break; | |
| } | |
| return false; | |
| case X86::DIV_FPrST0: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (DIV_FPrST0 ST1) | |
| AsmString = "fdivrp"; | |
| break; | |
| } | |
| return false; | |
| case X86::FNSTSW8r: | |
| if (MI->getNumOperands() == 0) { | |
| // (FNSTSW8r) | |
| AsmString = "fnstsw"; | |
| break; | |
| } | |
| return false; | |
| case X86::IN16rr: | |
| if (MI->getNumOperands() == 0) { | |
| // (IN16rr) | |
| AsmString = "inw %dx"; | |
| break; | |
| } | |
| return false; | |
| case X86::IN32rr: | |
| if (MI->getNumOperands() == 0) { | |
| // (IN32rr) | |
| AsmString = "inl %dx"; | |
| break; | |
| } | |
| return false; | |
| case X86::IN8rr: | |
| if (MI->getNumOperands() == 0) { | |
| // (IN8rr) | |
| AsmString = "inb %dx"; | |
| break; | |
| } | |
| return false; | |
| case X86::MOVSD: | |
| if (MI->getNumOperands() == 0) { | |
| // (MOVSD) | |
| AsmString = "movsd"; | |
| break; | |
| } | |
| return false; | |
| case X86::MUL_FPrST0: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (MUL_FPrST0 ST1) | |
| AsmString = "fmulp"; | |
| break; | |
| } | |
| return false; | |
| case X86::OUT16rr: | |
| if (MI->getNumOperands() == 0) { | |
| // (OUT16rr) | |
| AsmString = "outw %dx"; | |
| break; | |
| } | |
| return false; | |
| case X86::OUT32rr: | |
| if (MI->getNumOperands() == 0) { | |
| // (OUT32rr) | |
| AsmString = "outl %dx"; | |
| break; | |
| } | |
| return false; | |
| case X86::OUT8rr: | |
| if (MI->getNumOperands() == 0) { | |
| // (OUT8rr) | |
| AsmString = "outb %dx"; | |
| break; | |
| } | |
| return false; | |
| case X86::SHLD16rri8: | |
| if (MI->getNumOperands() == 3 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| regIsInRegisterClass(RC_GR16, MI->getOperand(1).getReg()) && | |
| MI->getOperand(2).getImm() == 1) { | |
| // (SHLD16rri8 GR16:$r1, GR16:$r2, 1) | |
| AsmString = "shldw $r1, $r2"; | |
| OpMap.push_back(std::make_pair("r1", 0)); | |
| OpMap.push_back(std::make_pair("r2", 1)); | |
| break; | |
| } | |
| return false; | |
| case X86::SHLD32rri8: | |
| if (MI->getNumOperands() == 3 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| regIsInRegisterClass(RC_GR32, MI->getOperand(1).getReg()) && | |
| MI->getOperand(2).getImm() == 1) { | |
| // (SHLD32rri8 GR32:$r1, GR32:$r2, 1) | |
| AsmString = "shldl $r1, $r2"; | |
| OpMap.push_back(std::make_pair("r1", 0)); | |
| OpMap.push_back(std::make_pair("r2", 1)); | |
| break; | |
| } | |
| return false; | |
| case X86::SHLD64rri8: | |
| if (MI->getNumOperands() == 3 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| regIsInRegisterClass(RC_GR64, MI->getOperand(1).getReg()) && | |
| MI->getOperand(2).getImm() == 1) { | |
| // (SHLD64rri8 GR64:$r1, GR64:$r2, 1) | |
| AsmString = "shldq $r1, $r2"; | |
| OpMap.push_back(std::make_pair("r1", 0)); | |
| OpMap.push_back(std::make_pair("r2", 1)); | |
| break; | |
| } | |
| return false; | |
| case X86::SHRD16rri8: | |
| if (MI->getNumOperands() == 3 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| regIsInRegisterClass(RC_GR16, MI->getOperand(1).getReg()) && | |
| MI->getOperand(2).getImm() == 1) { | |
| // (SHRD16rri8 GR16:$r1, GR16:$r2, 1) | |
| AsmString = "shrdw $r1, $r2"; | |
| OpMap.push_back(std::make_pair("r1", 0)); | |
| OpMap.push_back(std::make_pair("r2", 1)); | |
| break; | |
| } | |
| return false; | |
| case X86::SHRD32rri8: | |
| if (MI->getNumOperands() == 3 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| regIsInRegisterClass(RC_GR32, MI->getOperand(1).getReg()) && | |
| MI->getOperand(2).getImm() == 1) { | |
| // (SHRD32rri8 GR32:$r1, GR32:$r2, 1) | |
| AsmString = "shrdl $r1, $r2"; | |
| OpMap.push_back(std::make_pair("r1", 0)); | |
| OpMap.push_back(std::make_pair("r2", 1)); | |
| break; | |
| } | |
| return false; | |
| case X86::SHRD64rri8: | |
| if (MI->getNumOperands() == 3 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| regIsInRegisterClass(RC_GR64, MI->getOperand(1).getReg()) && | |
| MI->getOperand(2).getImm() == 1) { | |
| // (SHRD64rri8 GR64:$r1, GR64:$r2, 1) | |
| AsmString = "shrdq $r1, $r2"; | |
| OpMap.push_back(std::make_pair("r1", 0)); | |
| OpMap.push_back(std::make_pair("r2", 1)); | |
| break; | |
| } | |
| return false; | |
| case X86::SUBR_FPrST0: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (SUBR_FPrST0 ST1) | |
| AsmString = "fsubp"; | |
| break; | |
| } | |
| return false; | |
| case X86::SUB_FPrST0: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (SUB_FPrST0 ST1) | |
| AsmString = "fsubrp"; | |
| break; | |
| } | |
| return false; | |
| case X86::UCOM_FIPr: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (UCOM_FIPr ST1) | |
| AsmString = "fucompi"; | |
| break; | |
| } | |
| return false; | |
| case X86::UCOM_FIr: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (UCOM_FIr ST1) | |
| AsmString = "fucomi"; | |
| break; | |
| } | |
| return false; | |
| case X86::UCOM_FPr: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (UCOM_FPr ST1) | |
| AsmString = "fucomp"; | |
| break; | |
| } | |
| return false; | |
| case X86::UCOM_Fr: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (UCOM_Fr ST1) | |
| AsmString = "fucom"; | |
| break; | |
| } | |
| return false; | |
| case X86::XCH_F: | |
| if (MI->getNumOperands() == 1 && | |
| MI->getOperand(0).getReg() == X86::ST1) { | |
| // (XCH_F ST1) | |
| AsmString = "fxch"; | |
| break; | |
| } | |
| return false; | |
| case X86::XOR16rr: | |
| if (MI->getNumOperands() == 2 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) { | |
| // (XOR16rr GR16:$reg, GR16:$reg) | |
| AsmString = "clrw $reg"; | |
| OpMap.push_back(std::make_pair("reg", 0)); | |
| break; | |
| } | |
| return false; | |
| case X86::XOR32rr: | |
| if (MI->getNumOperands() == 2 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) { | |
| // (XOR32rr GR32:$reg, GR32:$reg) | |
| AsmString = "clrl $reg"; | |
| OpMap.push_back(std::make_pair("reg", 0)); | |
| break; | |
| } | |
| return false; | |
| case X86::XOR64rr: | |
| if (MI->getNumOperands() == 2 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) { | |
| // (XOR64rr GR64:$reg, GR64:$reg) | |
| AsmString = "clrq $reg"; | |
| OpMap.push_back(std::make_pair("reg", 0)); | |
| break; | |
| } | |
| return false; | |
| case X86::XOR8rr: | |
| if (MI->getNumOperands() == 2 && | |
| MI->getOperand(0).isReg() && | |
| regIsInRegisterClass(RC_GR8, MI->getOperand(0).getReg()) && | |
| MI->getOperand(1).isReg() && | |
| MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) { | |
| // (XOR8rr GR8:$reg, GR8:$reg) | |
| AsmString = "clrb $reg"; | |
| OpMap.push_back(std::make_pair("reg", 0)); | |
| break; | |
| } | |
| return false; | |
| case X86::XSTORE: | |
| if (MI->getNumOperands() == 0) { | |
| // (XSTORE) | |
| AsmString = "xstorerng"; | |
| break; | |
| } | |
| return false; | |
| } | |
| std::pair<StringRef, StringRef> ASM = AsmString.split(' '); | |
| OS << '\t' << ASM.first; | |
| if (!ASM.second.empty()) { | |
| OS << '\t'; | |
| for (StringRef::iterator | |
| I = ASM.second.begin(), E = ASM.second.end(); I != E; ) { | |
| if (*I == '$') { | |
| StringRef::iterator Start = ++I; | |
| while (I != E && | |
| ((*I >= 'a' && *I <= 'z') || | |
| (*I >= 'A' && *I <= 'Z') || | |
| (*I >= '0' && *I <= '9') || | |
| *I == '_')) | |
| ++I; | |
| StringRef Name(Start, I - Start); | |
| printOperand(MI, getMapOperandNumber(OpMap, Name), OS); | |
| } else { | |
| OS << *I++; | |
| } | |
| } | |
| } | |
| return true; | |
| } | |
| #endif // PRINT_ALIAS_INSTR |