| //===- TableGen'erated file -------------------------------------*- C++ -*-===// | |
| // | |
| // Assembly Writer Source Fragment | |
| // | |
| // Automatically generated file, do not edit! | |
| // | |
| //===----------------------------------------------------------------------===// | |
| /// printInstruction - This method is automatically generated by tablegen | |
| /// from the instruction set description. | |
| void X86IntelInstPrinter::printInstruction(const MachineInstr *MI, raw_ostream &O) { | |
| static const unsigned OpInfo[] = { | |
| 0U, // PHI | |
| 0U, // INLINEASM | |
| 0U, // PROLOG_LABEL | |
| 0U, // EH_LABEL | |
| 0U, // GC_LABEL | |
| 0U, // KILL | |
| 0U, // EXTRACT_SUBREG | |
| 0U, // INSERT_SUBREG | |
| 0U, // IMPLICIT_DEF | |
| 0U, // SUBREG_TO_REG | |
| 0U, // COPY_TO_REGCLASS | |
| 1U, // DBG_VALUE | |
| 0U, // REG_SEQUENCE | |
| 0U, // COPY | |
| 11U, // ABS_F | |
| 0U, // ABS_Fp32 | |
| 0U, // ABS_Fp64 | |
| 0U, // ABS_Fp80 | |
| 134217744U, // ADC16i16 | |
| 272629786U, // ADC16mi | |
| 272629786U, // ADC16mi8 | |
| 272629786U, // ADC16mr | |
| 138543130U, // ADC16ri | |
| 138543130U, // ADC16ri8 | |
| 138674202U, // ADC16rm | |
| 138543130U, // ADC16rr | |
| 138543130U, // ADC16rr_REV | |
| 134217759U, // ADC32i32 | |
| 406847514U, // ADC32mi | |
| 406847514U, // ADC32mi8 | |
| 406847514U, // ADC32mr | |
| 138543130U, // ADC32ri | |
| 138543130U, // ADC32ri8 | |
| 138805274U, // ADC32rm | |
| 138543130U, // ADC32rr | |
| 138543130U, // ADC32rr_REV | |
| 134217770U, // ADC64i32 | |
| 541065242U, // ADC64mi32 | |
| 541065242U, // ADC64mi8 | |
| 541065242U, // ADC64mr | |
| 138543130U, // ADC64ri32 | |
| 138543130U, // ADC64ri8 | |
| 138936346U, // ADC64rm | |
| 138543130U, // ADC64rr | |
| 138543130U, // ADC64rr_REV | |
| 134217781U, // ADC8i8 | |
| 675282970U, // ADC8mi | |
| 675282970U, // ADC8mr | |
| 138543130U, // ADC8ri | |
| 139067418U, // ADC8rm | |
| 138543130U, // ADC8rr | |
| 138543130U, // ADC8rr_REV | |
| 134217791U, // ADD16i16 | |
| 272629833U, // ADD16mi | |
| 272629833U, // ADD16mi8 | |
| 272629833U, // ADD16mr | |
| 138543177U, // ADD16ri | |
| 138543177U, // ADD16ri8 | |
| 138674249U, // ADD16rm | |
| 138543177U, // ADD16rr | |
| 138543177U, // ADD16rr_alt | |
| 134217806U, // ADD32i32 | |
| 406847561U, // ADD32mi | |
| 406847561U, // ADD32mi8 | |
| 406847561U, // ADD32mr | |
| 138543177U, // ADD32ri | |
| 138543177U, // ADD32ri8 | |
| 138805321U, // ADD32rm | |
| 138543177U, // ADD32rr | |
| 138543177U, // ADD32rr_alt | |
| 134217817U, // ADD64i32 | |
| 541065289U, // ADD64mi32 | |
| 541065289U, // ADD64mi8 | |
| 541065289U, // ADD64mr | |
| 138543177U, // ADD64ri32 | |
| 138543177U, // ADD64ri8 | |
| 138936393U, // ADD64rm | |
| 138543177U, // ADD64rr | |
| 138543177U, // ADD64rr_alt | |
| 134217828U, // ADD8i8 | |
| 675283017U, // ADD8mi | |
| 675283017U, // ADD8mr | |
| 138543177U, // ADD8ri | |
| 139067465U, // ADD8rm | |
| 138543177U, // ADD8rr | |
| 138543177U, // ADD8rr_alt | |
| 139198574U, // ADDPDrm | |
| 138543214U, // ADDPDrr | |
| 139198581U, // ADDPSrm | |
| 138543221U, // ADDPSrr | |
| 139329660U, // ADDSDrm | |
| 139329660U, // ADDSDrm_Int | |
| 138543228U, // ADDSDrr | |
| 138543228U, // ADDSDrr_Int | |
| 139460739U, // ADDSSrm | |
| 139460739U, // ADDSSrm_Int | |
| 138543235U, // ADDSSrr | |
| 138543235U, // ADDSSrr_Int | |
| 139198602U, // ADDSUBPDrm | |
| 138543242U, // ADDSUBPDrr | |
| 139198612U, // ADDSUBPSrm | |
| 138543252U, // ADDSUBPSrr | |
| 805306526U, // ADD_F32m | |
| 939524254U, // ADD_F64m | |
| 268435620U, // ADD_FI16m | |
| 402653348U, // ADD_FI32m | |
| 134217899U, // ADD_FPrST0 | |
| 134217886U, // ADD_FST0r | |
| 0U, // ADD_Fp32 | |
| 0U, // ADD_Fp32m | |
| 0U, // ADD_Fp64 | |
| 0U, // ADD_Fp64m | |
| 0U, // ADD_Fp64m32 | |
| 0U, // ADD_Fp80 | |
| 0U, // ADD_Fp80m32 | |
| 0U, // ADD_Fp80m64 | |
| 0U, // ADD_FpI16m32 | |
| 0U, // ADD_FpI16m64 | |
| 0U, // ADD_FpI16m80 | |
| 0U, // ADD_FpI32m32 | |
| 0U, // ADD_FpI32m64 | |
| 0U, // ADD_FpI32m80 | |
| 142606494U, // ADD_FrST0 | |
| 178U, // ADJCALLSTACKDOWN32 | |
| 178U, // ADJCALLSTACKDOWN64 | |
| 196U, // ADJCALLSTACKUP32 | |
| 196U, // ADJCALLSTACKUP64 | |
| 139591892U, // AESDECLASTrm | |
| 138543316U, // AESDECLASTrr | |
| 139591904U, // AESDECrm | |
| 138543328U, // AESDECrr | |
| 139591912U, // AESENCLASTrm | |
| 138543336U, // AESENCLASTrr | |
| 139591924U, // AESENCrm | |
| 138543348U, // AESENCrr | |
| 139723004U, // AESIMCrm | |
| 139854076U, // AESIMCrr | |
| 139723012U, // AESKEYGENASSIST128rm | |
| 139854084U, // AESKEYGENASSIST128rr | |
| 134218005U, // AND16i16 | |
| 272630047U, // AND16mi | |
| 272630047U, // AND16mi8 | |
| 272630047U, // AND16mr | |
| 138543391U, // AND16ri | |
| 138543391U, // AND16ri8 | |
| 138674463U, // AND16rm | |
| 138543391U, // AND16rr | |
| 138543391U, // AND16rr_REV | |
| 134218020U, // AND32i32 | |
| 406847775U, // AND32mi | |
| 406847775U, // AND32mi8 | |
| 406847775U, // AND32mr | |
| 138543391U, // AND32ri | |
| 138543391U, // AND32ri8 | |
| 138805535U, // AND32rm | |
| 138543391U, // AND32rr | |
| 138543391U, // AND32rr_REV | |
| 134218031U, // AND64i32 | |
| 541065503U, // AND64mi32 | |
| 541065503U, // AND64mi8 | |
| 541065503U, // AND64mr | |
| 138543391U, // AND64ri32 | |
| 138543391U, // AND64ri8 | |
| 138936607U, // AND64rm | |
| 138543391U, // AND64rr | |
| 138543391U, // AND64rr_REV | |
| 134218042U, // AND8i8 | |
| 675283231U, // AND8mi | |
| 675283231U, // AND8mr | |
| 138543391U, // AND8ri | |
| 139067679U, // AND8rm | |
| 138543391U, // AND8rr | |
| 138543391U, // AND8rr_REV | |
| 139198788U, // ANDNPDrm | |
| 138543428U, // ANDNPDrr | |
| 139198796U, // ANDNPSrm | |
| 138543436U, // ANDNPSrr | |
| 139198804U, // ANDPDrm | |
| 138543444U, // ANDPDrr | |
| 139198811U, // ANDPSrm | |
| 138543451U, // ANDPSrr | |
| 354U, // ATOMADD6432 | |
| 375U, // ATOMAND16 | |
| 394U, // ATOMAND32 | |
| 413U, // ATOMAND64 | |
| 432U, // ATOMAND6432 | |
| 453U, // ATOMAND8 | |
| 471U, // ATOMMAX16 | |
| 490U, // ATOMMAX32 | |
| 509U, // ATOMMAX64 | |
| 528U, // ATOMMIN16 | |
| 547U, // ATOMMIN32 | |
| 566U, // ATOMMIN64 | |
| 585U, // ATOMNAND16 | |
| 605U, // ATOMNAND32 | |
| 625U, // ATOMNAND64 | |
| 645U, // ATOMNAND6432 | |
| 667U, // ATOMNAND8 | |
| 686U, // ATOMOR16 | |
| 704U, // ATOMOR32 | |
| 722U, // ATOMOR64 | |
| 740U, // ATOMOR6432 | |
| 760U, // ATOMOR8 | |
| 777U, // ATOMSUB6432 | |
| 798U, // ATOMSWAP6432 | |
| 820U, // ATOMUMAX16 | |
| 840U, // ATOMUMAX32 | |
| 860U, // ATOMUMAX64 | |
| 880U, // ATOMUMIN16 | |
| 900U, // ATOMUMIN32 | |
| 920U, // ATOMUMIN64 | |
| 940U, // ATOMXOR16 | |
| 959U, // ATOMXOR32 | |
| 978U, // ATOMXOR64 | |
| 997U, // ATOMXOR6432 | |
| 1018U, // ATOMXOR8 | |
| 139592716U, // BLENDPDrmi | |
| 138544140U, // BLENDPDrri | |
| 139592725U, // BLENDPSrmi | |
| 138544149U, // BLENDPSrri | |
| 139592734U, // BLENDVPDrm0 | |
| 138544158U, // BLENDVPDrr0 | |
| 139592744U, // BLENDVPSrm0 | |
| 138544168U, // BLENDVPSrr0 | |
| 139985970U, // BSF16rm | |
| 139854898U, // BSF16rr | |
| 140117042U, // BSF32rm | |
| 139854898U, // BSF32rr | |
| 140248114U, // BSF64rm | |
| 139854898U, // BSF64rr | |
| 139985975U, // BSR16rm | |
| 139854903U, // BSR16rr | |
| 140117047U, // BSR32rm | |
| 139854903U, // BSR32rr | |
| 140248119U, // BSR64rm | |
| 139854903U, // BSR64rr | |
| 134218812U, // BSWAP32r | |
| 134218812U, // BSWAP64r | |
| 272630851U, // BT16mi8 | |
| 272630851U, // BT16mr | |
| 139854915U, // BT16ri8 | |
| 139854915U, // BT16rr | |
| 406848579U, // BT32mi8 | |
| 406848579U, // BT32mr | |
| 139854915U, // BT32ri8 | |
| 139854915U, // BT32rr | |
| 541066307U, // BT64mi8 | |
| 541066307U, // BT64mr | |
| 139854915U, // BT64ri8 | |
| 139854915U, // BT64rr | |
| 272630855U, // BTC16mi8 | |
| 272630855U, // BTC16mr | |
| 139854919U, // BTC16ri8 | |
| 139854919U, // BTC16rr | |
| 406848583U, // BTC32mi8 | |
| 406848583U, // BTC32mr | |
| 139854919U, // BTC32ri8 | |
| 139854919U, // BTC32rr | |
| 541066311U, // BTC64mi8 | |
| 541066311U, // BTC64mr | |
| 139854919U, // BTC64ri8 | |
| 139854919U, // BTC64rr | |
| 272630860U, // BTR16mi8 | |
| 272630860U, // BTR16mr | |
| 139854924U, // BTR16ri8 | |
| 139854924U, // BTR16rr | |
| 406848588U, // BTR32mi8 | |
| 406848588U, // BTR32mr | |
| 139854924U, // BTR32ri8 | |
| 139854924U, // BTR32rr | |
| 541066316U, // BTR64mi8 | |
| 541066316U, // BTR64mr | |
| 139854924U, // BTR64ri8 | |
| 139854924U, // BTR64rr | |
| 272630865U, // BTS16mi8 | |
| 272630865U, // BTS16mr | |
| 139854929U, // BTS16ri8 | |
| 139854929U, // BTS16rr | |
| 406848593U, // BTS32mi8 | |
| 406848593U, // BTS32mr | |
| 139854929U, // BTS32ri8 | |
| 139854929U, // BTS32rr | |
| 541066321U, // BTS64mi8 | |
| 541066321U, // BTS64mr | |
| 139854929U, // BTS64ri8 | |
| 139854929U, // BTS64rr | |
| 402654294U, // CALL32m | |
| 134218838U, // CALL32r | |
| 536872022U, // CALL64m | |
| 1073742934U, // CALL64pcrel32 | |
| 134218838U, // CALL64r | |
| 1073742940U, // CALLpcrel16 | |
| 1073742934U, // CALLpcrel32 | |
| 1123U, // CBW | |
| 1127U, // CDQ | |
| 1131U, // CDQE | |
| 1136U, // CHS_F | |
| 0U, // CHS_Fp32 | |
| 0U, // CHS_Fp64 | |
| 0U, // CHS_Fp80 | |
| 1141U, // CLC | |
| 1145U, // CLD | |
| 671089789U, // CLFLUSH | |
| 1158U, // CLI | |
| 1162U, // CLTS | |
| 1167U, // CMC | |
| 138675347U, // CMOVA16rm | |
| 138544275U, // CMOVA16rr | |
| 138806419U, // CMOVA32rm | |
| 138544275U, // CMOVA32rr | |
| 138937491U, // CMOVA64rm | |
| 138544275U, // CMOVA64rr | |
| 138675354U, // CMOVAE16rm | |
| 138544282U, // CMOVAE16rr | |
| 138806426U, // CMOVAE32rm | |
| 138544282U, // CMOVAE32rr | |
| 138937498U, // CMOVAE64rm | |
| 138544282U, // CMOVAE64rr | |
| 138675362U, // CMOVB16rm | |
| 138544290U, // CMOVB16rr | |
| 138806434U, // CMOVB32rm | |
| 138544290U, // CMOVB32rr | |
| 138937506U, // CMOVB64rm | |
| 138544290U, // CMOVB64rr | |
| 138675369U, // CMOVBE16rm | |
| 138544297U, // CMOVBE16rr | |
| 138806441U, // CMOVBE32rm | |
| 138544297U, // CMOVBE32rr | |
| 138937513U, // CMOVBE64rm | |
| 138544297U, // CMOVBE64rr | |
| 134218929U, // CMOVBE_F | |
| 0U, // CMOVBE_Fp32 | |
| 0U, // CMOVBE_Fp64 | |
| 0U, // CMOVBE_Fp80 | |
| 134218946U, // CMOVB_F | |
| 0U, // CMOVB_Fp32 | |
| 0U, // CMOVB_Fp64 | |
| 0U, // CMOVB_Fp80 | |
| 138675410U, // CMOVE16rm | |
| 138544338U, // CMOVE16rr | |
| 138806482U, // CMOVE32rm | |
| 138544338U, // CMOVE32rr | |
| 138937554U, // CMOVE64rm | |
| 138544338U, // CMOVE64rr | |
| 134218969U, // CMOVE_F | |
| 0U, // CMOVE_Fp32 | |
| 0U, // CMOVE_Fp64 | |
| 0U, // CMOVE_Fp80 | |
| 138675433U, // CMOVG16rm | |
| 138544361U, // CMOVG16rr | |
| 138806505U, // CMOVG32rm | |
| 138544361U, // CMOVG32rr | |
| 138937577U, // CMOVG64rm | |
| 138544361U, // CMOVG64rr | |
| 138675440U, // CMOVGE16rm | |
| 138544368U, // CMOVGE16rr | |
| 138806512U, // CMOVGE32rm | |
| 138544368U, // CMOVGE32rr | |
| 138937584U, // CMOVGE64rm | |
| 138544368U, // CMOVGE64rr | |
| 138675448U, // CMOVL16rm | |
| 138544376U, // CMOVL16rr | |
| 138806520U, // CMOVL32rm | |
| 138544376U, // CMOVL32rr | |
| 138937592U, // CMOVL64rm | |
| 138544376U, // CMOVL64rr | |
| 138675455U, // CMOVLE16rm | |
| 138544383U, // CMOVLE16rr | |
| 138806527U, // CMOVLE32rm | |
| 138544383U, // CMOVLE32rr | |
| 138937599U, // CMOVLE64rm | |
| 138544383U, // CMOVLE64rr | |
| 134219015U, // CMOVNBE_F | |
| 0U, // CMOVNBE_Fp32 | |
| 0U, // CMOVNBE_Fp64 | |
| 0U, // CMOVNBE_Fp80 | |
| 134219033U, // CMOVNB_F | |
| 0U, // CMOVNB_Fp32 | |
| 0U, // CMOVNB_Fp64 | |
| 0U, // CMOVNB_Fp80 | |
| 138675498U, // CMOVNE16rm | |
| 138544426U, // CMOVNE16rr | |
| 138806570U, // CMOVNE32rm | |
| 138544426U, // CMOVNE32rr | |
| 138937642U, // CMOVNE64rm | |
| 138544426U, // CMOVNE64rr | |
| 134219058U, // CMOVNE_F | |
| 0U, // CMOVNE_Fp32 | |
| 0U, // CMOVNE_Fp64 | |
| 0U, // CMOVNE_Fp80 | |
| 138675523U, // CMOVNO16rm | |
| 138544451U, // CMOVNO16rr | |
| 138806595U, // CMOVNO32rm | |
| 138544451U, // CMOVNO32rr | |
| 138937667U, // CMOVNO64rm | |
| 138544451U, // CMOVNO64rr | |
| 138675531U, // CMOVNP16rm | |
| 138544459U, // CMOVNP16rr | |
| 138806603U, // CMOVNP32rm | |
| 138544459U, // CMOVNP32rr | |
| 138937675U, // CMOVNP64rm | |
| 138544459U, // CMOVNP64rr | |
| 134219091U, // CMOVNP_F | |
| 0U, // CMOVNP_Fp32 | |
| 0U, // CMOVNP_Fp64 | |
| 0U, // CMOVNP_Fp80 | |
| 138675556U, // CMOVNS16rm | |
| 138544484U, // CMOVNS16rr | |
| 138806628U, // CMOVNS32rm | |
| 138544484U, // CMOVNS32rr | |
| 138937700U, // CMOVNS64rm | |
| 138544484U, // CMOVNS64rr | |
| 138675564U, // CMOVO16rm | |
| 138544492U, // CMOVO16rr | |
| 138806636U, // CMOVO32rm | |
| 138544492U, // CMOVO32rr | |
| 138937708U, // CMOVO64rm | |
| 138544492U, // CMOVO64rr | |
| 138675571U, // CMOVP16rm | |
| 138544499U, // CMOVP16rr | |
| 138806643U, // CMOVP32rm | |
| 138544499U, // CMOVP32rr | |
| 138937715U, // CMOVP64rm | |
| 138544499U, // CMOVP64rr | |
| 134219130U, // CMOVP_F | |
| 0U, // CMOVP_Fp32 | |
| 0U, // CMOVP_Fp64 | |
| 0U, // CMOVP_Fp80 | |
| 138675595U, // CMOVS16rm | |
| 138544523U, // CMOVS16rr | |
| 138806667U, // CMOVS32rm | |
| 138544523U, // CMOVS32rr | |
| 138937739U, // CMOVS64rm | |
| 138544523U, // CMOVS64rr | |
| 1426U, // CMOV_FR32 | |
| 1445U, // CMOV_FR64 | |
| 1464U, // CMOV_GR16 | |
| 1484U, // CMOV_GR32 | |
| 1504U, // CMOV_GR8 | |
| 1522U, // CMOV_RFP32 | |
| 1542U, // CMOV_RFP64 | |
| 1562U, // CMOV_RFP80 | |
| 1582U, // CMOV_V1I64 | |
| 1602U, // CMOV_V2F64 | |
| 1622U, // CMOV_V2I64 | |
| 1642U, // CMOV_V4F32 | |
| 134219390U, // CMP16i16 | |
| 272631432U, // CMP16mi | |
| 272631432U, // CMP16mi8 | |
| 272631432U, // CMP16mr | |
| 139855496U, // CMP16ri | |
| 139855496U, // CMP16ri8 | |
| 139986568U, // CMP16rm | |
| 139855496U, // CMP16rr | |
| 139855496U, // CMP16rr_alt | |
| 134219405U, // CMP32i32 | |
| 406849160U, // CMP32mi | |
| 406849160U, // CMP32mi8 | |
| 406849160U, // CMP32mr | |
| 139855496U, // CMP32ri | |
| 139855496U, // CMP32ri8 | |
| 140117640U, // CMP32rm | |
| 139855496U, // CMP32rr | |
| 139855496U, // CMP32rr_alt | |
| 134219416U, // CMP64i32 | |
| 541066888U, // CMP64mi32 | |
| 541066888U, // CMP64mi8 | |
| 541066888U, // CMP64mr | |
| 139855496U, // CMP64mrmrr | |
| 139855496U, // CMP64ri32 | |
| 139855496U, // CMP64ri8 | |
| 140248712U, // CMP64rm | |
| 139855496U, // CMP64rr | |
| 134219427U, // CMP8i8 | |
| 675284616U, // CMP8mi | |
| 675284616U, // CMP8mr | |
| 139855496U, // CMP8ri | |
| 140379784U, // CMP8rm | |
| 139855496U, // CMP8rr | |
| 139855496U, // CMP8rr_alt | |
| 1221330605U, // CMPPDrmi | |
| 139200177U, // CMPPDrmi_alt | |
| 1354892973U, // CMPPDrri | |
| 138544817U, // CMPPDrri_alt | |
| 1225524909U, // CMPPSrmi | |
| 139200184U, // CMPPSrmi_alt | |
| 1359087277U, // CMPPSrri | |
| 138544824U, // CMPPSrri_alt | |
| 1727U, // CMPS16 | |
| 1727U, // CMPS32 | |
| 1732U, // CMPS64 | |
| 1727U, // CMPS8 | |
| 1229850285U, // CMPSDrm | |
| 139331274U, // CMPSDrm_alt | |
| 1363281581U, // CMPSDrr | |
| 138544842U, // CMPSDrr_alt | |
| 1234175661U, // CMPSSrm | |
| 139462353U, // CMPSSrm_alt | |
| 1367475885U, // CMPSSrr | |
| 138544849U, // CMPSSrr_alt | |
| 1476396760U, // CMPXCHG16B | |
| 272631524U, // CMPXCHG16rm | |
| 139855588U, // CMPXCHG16rr | |
| 406849252U, // CMPXCHG32rm | |
| 139855588U, // CMPXCHG32rr | |
| 541066980U, // CMPXCHG64rm | |
| 139855588U, // CMPXCHG64rr | |
| 536872685U, // CMPXCHG8B | |
| 675284708U, // CMPXCHG8rm | |
| 139855588U, // CMPXCHG8rr | |
| 140510968U, // COMISDrm | |
| 139855608U, // COMISDrr | |
| 140510976U, // COMISSrm | |
| 139855616U, // COMISSrr | |
| 134219528U, // COMP_FST0r | |
| 134219535U, // COM_FIPr | |
| 134219551U, // COM_FIr | |
| 134219566U, // COM_FST0r | |
| 1844U, // COS_F | |
| 0U, // COS_Fp32 | |
| 0U, // COS_Fp64 | |
| 0U, // COS_Fp80 | |
| 1849U, // CPUID | |
| 1855U, // CQO | |
| 1639974723U, // CRC32m16 | |
| 1644169027U, // CRC32m32 | |
| 1648363331U, // CRC32m8 | |
| 1652557635U, // CRC32r16 | |
| 1652557635U, // CRC32r32 | |
| 1652557635U, // CRC32r8 | |
| 1656751939U, // CRC64m64 | |
| 1648363331U, // CRC64m8 | |
| 1652557635U, // CRC64r64 | |
| 1652557635U, // CRC64r8 | |
| 1867U, // CS_PREFIX | |
| 140511054U, // CVTDQ2PDrm | |
| 139855694U, // CVTDQ2PDrr | |
| 139724632U, // CVTDQ2PSrm | |
| 139855704U, // CVTDQ2PSrr | |
| 140511074U, // CVTPD2DQrm | |
| 139855714U, // CVTPD2DQrr | |
| 140511084U, // CVTPD2PSrm | |
| 139855724U, // CVTPD2PSrr | |
| 140511094U, // CVTPS2DQrm | |
| 139855734U, // CVTPS2DQrr | |
| 140642176U, // CVTPS2PDrm | |
| 139855744U, // CVTPS2PDrr | |
| 1930U, // CVTSD2SI64rm | |
| 1930U, // CVTSD2SI64rr | |
| 140642195U, // CVTSD2SSrm | |
| 139855763U, // CVTSD2SSrr | |
| 140248989U, // CVTSI2SD64rm | |
| 139855773U, // CVTSI2SD64rr | |
| 140117917U, // CVTSI2SDrm | |
| 139855773U, // CVTSI2SDrr | |
| 140248999U, // CVTSI2SS64rm | |
| 139855783U, // CVTSI2SS64rr | |
| 140117927U, // CVTSI2SSrm | |
| 139855783U, // CVTSI2SSrr | |
| 140773297U, // CVTSS2SDrm | |
| 139855793U, // CVTSS2SDrr | |
| 140773307U, // CVTSS2SI64rm | |
| 139855803U, // CVTSS2SI64rr | |
| 140773307U, // CVTSS2SIrm | |
| 139855803U, // CVTSS2SIrr | |
| 140511173U, // CVTTPS2DQrm | |
| 139855813U, // CVTTPS2DQrr | |
| 140642256U, // CVTTSD2SI64rm | |
| 139855824U, // CVTTSD2SI64rr | |
| 140642256U, // CVTTSD2SIrm | |
| 139855824U, // CVTTSD2SIrr | |
| 140773339U, // CVTTSS2SI64rm | |
| 139855835U, // CVTTSS2SI64rr | |
| 140773339U, // CVTTSS2SIrm | |
| 139855835U, // CVTTSS2SIrr | |
| 2022U, // CWD | |
| 2026U, // CWDE | |
| 268437487U, // DEC16m | |
| 134219759U, // DEC16r | |
| 402655215U, // DEC32m | |
| 134219759U, // DEC32r | |
| 268437487U, // DEC64_16m | |
| 134219759U, // DEC64_16r | |
| 402655215U, // DEC64_32m | |
| 134219759U, // DEC64_32r | |
| 536872943U, // DEC64m | |
| 134219759U, // DEC64r | |
| 671090671U, // DEC8m | |
| 134219759U, // DEC8r | |
| 268437492U, // DIV16m | |
| 134219764U, // DIV16r | |
| 402655220U, // DIV32m | |
| 134219764U, // DIV32r | |
| 536872948U, // DIV64m | |
| 134219764U, // DIV64r | |
| 671090676U, // DIV8m | |
| 134219764U, // DIV8r | |
| 139200505U, // DIVPDrm | |
| 138545145U, // DIVPDrr | |
| 139200512U, // DIVPSrm | |
| 138545152U, // DIVPSrr | |
| 805308423U, // DIVR_F32m | |
| 939526151U, // DIVR_F64m | |
| 268437518U, // DIVR_FI16m | |
| 402655246U, // DIVR_FI32m | |
| 134219798U, // DIVR_FPrST0 | |
| 134219783U, // DIVR_FST0r | |
| 0U, // DIVR_Fp32m | |
| 0U, // DIVR_Fp64m | |
| 0U, // DIVR_Fp64m32 | |
| 0U, // DIVR_Fp80m32 | |
| 0U, // DIVR_Fp80m64 | |
| 0U, // DIVR_FpI16m32 | |
| 0U, // DIVR_FpI16m64 | |
| 0U, // DIVR_FpI16m80 | |
| 0U, // DIVR_FpI32m32 | |
| 0U, // DIVR_FpI32m64 | |
| 0U, // DIVR_FpI32m80 | |
| 142608391U, // DIVR_FrST0 | |
| 139331614U, // DIVSDrm | |
| 139331614U, // DIVSDrm_Int | |
| 138545182U, // DIVSDrr | |
| 138545182U, // DIVSDrr_Int | |
| 139462693U, // DIVSSrm | |
| 139462693U, // DIVSSrm_Int | |
| 138545189U, // DIVSSrr | |
| 138545189U, // DIVSSrr_Int | |
| 805308460U, // DIV_F32m | |
| 939526188U, // DIV_F64m | |
| 268437554U, // DIV_FI16m | |
| 402655282U, // DIV_FI32m | |
| 134219833U, // DIV_FPrST0 | |
| 134219820U, // DIV_FST0r | |
| 0U, // DIV_Fp32 | |
| 0U, // DIV_Fp32m | |
| 0U, // DIV_Fp64 | |
| 0U, // DIV_Fp64m | |
| 0U, // DIV_Fp64m32 | |
| 0U, // DIV_Fp80 | |
| 0U, // DIV_Fp80m32 | |
| 0U, // DIV_Fp80m64 | |
| 0U, // DIV_FpI16m32 | |
| 0U, // DIV_FpI16m64 | |
| 0U, // DIV_FpI16m80 | |
| 0U, // DIV_FpI32m32 | |
| 0U, // DIV_FpI32m64 | |
| 0U, // DIV_FpI32m80 | |
| 142608428U, // DIV_FrST0 | |
| 139593792U, // DPPDrmi | |
| 138545216U, // DPPDrri | |
| 139593798U, // DPPSrmi | |
| 138545222U, // DPPSrri | |
| 2124U, // DS_PREFIX | |
| 134219855U, // EH_RETURN | |
| 134219855U, // EH_RETURN64 | |
| 139855974U, // ENTER | |
| 2157U, // ES_PREFIX | |
| 809502832U, // EXTRACTPSmr | |
| 139855984U, // EXTRACTPSrr | |
| 2171U, // F2XM1 | |
| 139856001U, // FARCALL16i | |
| 1744832641U, // FARCALL16m | |
| 139856001U, // FARCALL32i | |
| 1744832641U, // FARCALL32m | |
| 1744832641U, // FARCALL64 | |
| 139856008U, // FARJMP16i | |
| 1744832648U, // FARJMP16m | |
| 139856008U, // FARJMP32i | |
| 1744832648U, // FARJMP32m | |
| 1744832648U, // FARJMP64 | |
| 805308558U, // FBLDm | |
| 805308564U, // FBSTPm | |
| 805308206U, // FCOM32m | |
| 939525934U, // FCOM64m | |
| 805308168U, // FCOMP32m | |
| 939525896U, // FCOMP64m | |
| 2203U, // FCOMPP | |
| 2210U, // FDECSTP | |
| 134219946U, // FFREE | |
| 268437681U, // FICOM16m | |
| 402655409U, // FICOM32m | |
| 268437688U, // FICOMP16m | |
| 402655416U, // FICOMP32m | |
| 2240U, // FINCSTP | |
| 268437704U, // FLDCW16m | |
| 805308623U, // FLDENVm | |
| 2263U, // FLDL2E | |
| 2270U, // FLDL2T | |
| 2277U, // FLDLG2 | |
| 2284U, // FLDLN2 | |
| 2291U, // FLDPI | |
| 2297U, // FNCLEX | |
| 2304U, // FNINIT | |
| 2311U, // FNOP | |
| 268437772U, // FNSTCW16m | |
| 2324U, // FNSTSW8r | |
| 805308703U, // FNSTSWm | |
| 2343U, // FP32_TO_INT16_IN_MEM | |
| 2374U, // FP32_TO_INT32_IN_MEM | |
| 2405U, // FP32_TO_INT64_IN_MEM | |
| 2436U, // FP64_TO_INT16_IN_MEM | |
| 2467U, // FP64_TO_INT32_IN_MEM | |
| 2498U, // FP64_TO_INT64_IN_MEM | |
| 2529U, // FP80_TO_INT16_IN_MEM | |
| 2560U, // FP80_TO_INT32_IN_MEM | |
| 2591U, // FP80_TO_INT64_IN_MEM | |
| 2622U, // FPATAN | |
| 2629U, // FPREM | |
| 2635U, // FPREM1 | |
| 2642U, // FPTAN | |
| 2648U, // FRNDINT | |
| 805309024U, // FRSTORm | |
| 805309032U, // FSAVEm | |
| 2672U, // FSCALE | |
| 2679U, // FSINCOS | |
| 805309055U, // FSTENVm | |
| 1879050888U, // FS_MOV32rm | |
| 2706U, // FS_PREFIX | |
| 2709U, // FXAM | |
| 1744833178U, // FXRSTOR | |
| 1744833187U, // FXSAVE | |
| 2731U, // FXTRACT | |
| 2739U, // FYL2X | |
| 2745U, // FYL2XP1 | |
| 0U, // FpGET_ST0_32 | |
| 0U, // FpGET_ST0_64 | |
| 0U, // FpGET_ST0_80 | |
| 0U, // FpGET_ST1_32 | |
| 0U, // FpGET_ST1_64 | |
| 0U, // FpGET_ST1_80 | |
| 0U, // FpSET_ST0_32 | |
| 0U, // FpSET_ST0_64 | |
| 0U, // FpSET_ST0_80 | |
| 0U, // FpSET_ST1_32 | |
| 0U, // FpSET_ST1_64 | |
| 0U, // FpSET_ST1_80 | |
| 139198788U, // FsANDNPDrm | |
| 138543428U, // FsANDNPDrr | |
| 139198796U, // FsANDNPSrm | |
| 138543436U, // FsANDNPSrr | |
| 139198804U, // FsANDPDrm | |
| 138543444U, // FsANDPDrr | |
| 139198811U, // FsANDPSrm | |
| 138543451U, // FsANDPSrr | |
| 0U, // FsFLD0SD | |
| 0U, // FsFLD0SS | |
| 140511937U, // FsMOVAPDrm | |
| 139856577U, // FsMOVAPDrr | |
| 140511945U, // FsMOVAPSrm | |
| 139856585U, // FsMOVAPSrr | |
| 139201233U, // FsORPDrm | |
| 138545873U, // FsORPDrr | |
| 139201239U, // FsORPSrm | |
| 138545879U, // FsORPSrr | |
| 139201245U, // FsXORPDrm | |
| 138545885U, // FsXORPDrr | |
| 139201252U, // FsXORPSrm | |
| 138545892U, // FsXORPSrr | |
| 1879050987U, // GS_MOV32rm | |
| 2805U, // GS_PREFIX | |
| 139201272U, // HADDPDrm | |
| 138545912U, // HADDPDrr | |
| 139201280U, // HADDPSrm | |
| 138545920U, // HADDPSrr | |
| 2824U, // HLT | |
| 139201292U, // HSUBPDrm | |
| 138545932U, // HSUBPDrr | |
| 139201300U, // HSUBPSrm | |
| 138545940U, // HSUBPSrr | |
| 268438300U, // IDIV16m | |
| 134220572U, // IDIV16r | |
| 402656028U, // IDIV32m | |
| 134220572U, // IDIV32r | |
| 536873756U, // IDIV64m | |
| 134220572U, // IDIV64r | |
| 671091484U, // IDIV8m | |
| 134220572U, // IDIV8r | |
| 268438306U, // ILD_F16m | |
| 402656034U, // ILD_F32m | |
| 536873762U, // ILD_F64m | |
| 0U, // ILD_Fp16m32 | |
| 0U, // ILD_Fp16m64 | |
| 0U, // ILD_Fp16m80 | |
| 0U, // ILD_Fp32m32 | |
| 0U, // ILD_Fp32m64 | |
| 0U, // ILD_Fp32m80 | |
| 0U, // ILD_Fp64m32 | |
| 0U, // ILD_Fp64m64 | |
| 0U, // ILD_Fp64m80 | |
| 268438312U, // IMUL16m | |
| 134220584U, // IMUL16r | |
| 138677032U, // IMUL16rm | |
| 139987752U, // IMUL16rmi | |
| 139987752U, // IMUL16rmi8 | |
| 138545960U, // IMUL16rr | |
| 139856680U, // IMUL16rri | |
| 139856680U, // IMUL16rri8 | |
| 402656040U, // IMUL32m | |
| 134220584U, // IMUL32r | |
| 138808104U, // IMUL32rm | |
| 140118824U, // IMUL32rmi | |
| 140118824U, // IMUL32rmi8 | |
| 138545960U, // IMUL32rr | |
| 139856680U, // IMUL32rri | |
| 139856680U, // IMUL32rri8 | |
| 536873768U, // IMUL64m | |
| 134220584U, // IMUL64r | |
| 138939176U, // IMUL64rm | |
| 140249896U, // IMUL64rmi32 | |
| 140249896U, // IMUL64rmi8 | |
| 138545960U, // IMUL64rr | |
| 139856680U, // IMUL64rri32 | |
| 139856680U, // IMUL64rri8 | |
| 671091496U, // IMUL8m | |
| 134220584U, // IMUL8r | |
| 2862U, // IN16 | |
| 134220594U, // IN16ri | |
| 2875U, // IN16rr | |
| 2862U, // IN32 | |
| 134220615U, // IN32ri | |
| 2897U, // IN32rr | |
| 2862U, // IN8 | |
| 134220638U, // IN8ri | |
| 2919U, // IN8rr | |
| 268438387U, // INC16m | |
| 134220659U, // INC16r | |
| 402656115U, // INC32m | |
| 134220659U, // INC32r | |
| 268438387U, // INC64_16m | |
| 134220659U, // INC64_16r | |
| 402656115U, // INC64_32m | |
| 134220659U, // INC64_32r | |
| 536873843U, // INC64m | |
| 134220659U, // INC64r | |
| 671091571U, // INC8m | |
| 134220659U, // INC8r | |
| 139463544U, // INSERTPSrm | |
| 138546040U, // INSERTPSrr | |
| 134220674U, // INT | |
| 2951U, // INT3 | |
| 2956U, // INTO | |
| 2961U, // INVD | |
| 2966U, // INVEPT | |
| 671091613U, // INVLPG | |
| 2981U, // INVVPID | |
| 2989U, // IRET16 | |
| 2989U, // IRET32 | |
| 2989U, // IRET64 | |
| 268438450U, // ISTT_FP16m | |
| 402656178U, // ISTT_FP32m | |
| 536873906U, // ISTT_FP64m | |
| 0U, // ISTT_Fp16m32 | |
| 0U, // ISTT_Fp16m64 | |
| 0U, // ISTT_Fp16m80 | |
| 0U, // ISTT_Fp32m32 | |
| 0U, // ISTT_Fp32m64 | |
| 0U, // ISTT_Fp32m80 | |
| 0U, // ISTT_Fp64m32 | |
| 0U, // ISTT_Fp64m64 | |
| 0U, // ISTT_Fp64m80 | |
| 268438458U, // IST_F16m | |
| 402656186U, // IST_F32m | |
| 268438464U, // IST_FP16m | |
| 402656192U, // IST_FP32m | |
| 536873920U, // IST_FP64m | |
| 0U, // IST_Fp16m32 | |
| 0U, // IST_Fp16m64 | |
| 0U, // IST_Fp16m80 | |
| 0U, // IST_Fp32m32 | |
| 0U, // IST_Fp32m64 | |
| 0U, // IST_Fp32m80 | |
| 0U, // IST_Fp64m32 | |
| 0U, // IST_Fp64m64 | |
| 0U, // IST_Fp64m80 | |
| 1229850285U, // Int_CMPSDrm | |
| 1363281581U, // Int_CMPSDrr | |
| 1234175661U, // Int_CMPSSrm | |
| 1367475885U, // Int_CMPSSrr | |
| 140510968U, // Int_COMISDrm | |
| 139855608U, // Int_COMISDrr | |
| 140510976U, // Int_COMISSrm | |
| 139855616U, // Int_COMISSrr | |
| 140248910U, // Int_CVTDQ2PDrm | |
| 139855694U, // Int_CVTDQ2PDrr | |
| 139724632U, // Int_CVTDQ2PSrm | |
| 139855704U, // Int_CVTDQ2PSrr | |
| 140511074U, // Int_CVTPD2DQrm | |
| 139855714U, // Int_CVTPD2DQrr | |
| 140512199U, // Int_CVTPD2PIrm | |
| 139856839U, // Int_CVTPD2PIrr | |
| 140511084U, // Int_CVTPD2PSrm | |
| 139855724U, // Int_CVTPD2PSrr | |
| 140250065U, // Int_CVTPI2PDrm | |
| 139856849U, // Int_CVTPI2PDrr | |
| 138939355U, // Int_CVTPI2PSrm | |
| 138546139U, // Int_CVTPI2PSrr | |
| 140511094U, // Int_CVTPS2DQrm | |
| 139855734U, // Int_CVTPS2DQrr | |
| 140642176U, // Int_CVTPS2PDrm | |
| 139855744U, // Int_CVTPS2PDrr | |
| 140643301U, // Int_CVTPS2PIrm | |
| 139856869U, // Int_CVTPS2PIrr | |
| 140512239U, // Int_CVTSD2SI64rm | |
| 139856879U, // Int_CVTSD2SI64rr | |
| 140512239U, // Int_CVTSD2SIrm | |
| 139856879U, // Int_CVTSD2SIrr | |
| 139331475U, // Int_CVTSD2SSrm | |
| 138545043U, // Int_CVTSD2SSrr | |
| 138938269U, // Int_CVTSI2SD64rm | |
| 138545053U, // Int_CVTSI2SD64rr | |
| 138807197U, // Int_CVTSI2SDrm | |
| 138545053U, // Int_CVTSI2SDrr | |
| 138938279U, // Int_CVTSI2SS64rm | |
| 138545063U, // Int_CVTSI2SS64rr | |
| 138807207U, // Int_CVTSI2SSrm | |
| 138545063U, // Int_CVTSI2SSrr | |
| 139462577U, // Int_CVTSS2SDrm | |
| 138545073U, // Int_CVTSS2SDrr | |
| 140773307U, // Int_CVTSS2SI64rm | |
| 139855803U, // Int_CVTSS2SI64rr | |
| 140773307U, // Int_CVTSS2SIrm | |
| 139855803U, // Int_CVTSS2SIrr | |
| 140512249U, // Int_CVTTPD2DQrm | |
| 139856889U, // Int_CVTTPD2DQrr | |
| 140512260U, // Int_CVTTPD2PIrm | |
| 139856900U, // Int_CVTTPD2PIrr | |
| 140511173U, // Int_CVTTPS2DQrm | |
| 139855813U, // Int_CVTTPS2DQrr | |
| 140643343U, // Int_CVTTPS2PIrm | |
| 139856911U, // Int_CVTTPS2PIrr | |
| 140511195U, // Int_CVTTSD2SI64rm | |
| 139855835U, // Int_CVTTSD2SI64rr | |
| 140511195U, // Int_CVTTSD2SIrm | |
| 139855835U, // Int_CVTTSD2SIrr | |
| 140773339U, // Int_CVTTSS2SI64rm | |
| 139855835U, // Int_CVTTSS2SI64rr | |
| 140773339U, // Int_CVTTSS2SIrm | |
| 139855835U, // Int_CVTTSS2SIrr | |
| 3098U, // Int_MemBarrier | |
| 134220838U, // Int_MemBarrierNoSSE | |
| 134220856U, // Int_MemBarrierNoSSE64 | |
| 140512330U, // Int_UCOMISDrm | |
| 139856970U, // Int_UCOMISDrr | |
| 140512339U, // Int_UCOMISSrm | |
| 139856979U, // Int_UCOMISSrr | |
| 1230376028U, // Int_VCMPSDrm | |
| 1364593756U, // Int_VCMPSDrr | |
| 1234570332U, // Int_VCMPSSrm | |
| 1368788060U, // Int_VCMPSSrr | |
| 140512353U, // Int_VCOMISDrm | |
| 139856993U, // Int_VCOMISDrr | |
| 140512362U, // Int_VCOMISSrm | |
| 139857002U, // Int_VCOMISSrr | |
| 140250227U, // Int_VCVTDQ2PDrm | |
| 139857011U, // Int_VCVTDQ2PDrr | |
| 139725950U, // Int_VCVTDQ2PSrm | |
| 139857022U, // Int_VCVTDQ2PSrr | |
| 140512393U, // Int_VCVTPD2DQrm | |
| 139857033U, // Int_VCVTPD2DQrr | |
| 140512404U, // Int_VCVTPD2PSrm | |
| 139857044U, // Int_VCVTPD2PSrr | |
| 140512415U, // Int_VCVTPS2DQrm | |
| 139857055U, // Int_VCVTPS2DQrr | |
| 140643498U, // Int_VCVTPS2PDrm | |
| 139857066U, // Int_VCVTPS2PDrr | |
| 140512437U, // Int_VCVTSD2SI64rm | |
| 139857077U, // Int_VCVTSD2SI64rr | |
| 140512437U, // Int_VCVTSD2SIrm | |
| 139857077U, // Int_VCVTSD2SIrr | |
| 139857088U, // Int_VCVTSD2SSrm | |
| 139857088U, // Int_VCVTSD2SSrr | |
| 139857099U, // Int_VCVTSI2SD64rm | |
| 139857099U, // Int_VCVTSI2SD64rr | |
| 139857099U, // Int_VCVTSI2SDrm | |
| 139857099U, // Int_VCVTSI2SDrr | |
| 139857110U, // Int_VCVTSI2SS64rm | |
| 139857110U, // Int_VCVTSI2SS64rr | |
| 139857110U, // Int_VCVTSI2SSrm | |
| 139857110U, // Int_VCVTSI2SSrr | |
| 139857121U, // Int_VCVTSS2SDrm | |
| 139857121U, // Int_VCVTSS2SDrr | |
| 140774636U, // Int_VCVTSS2SI64rm | |
| 139857132U, // Int_VCVTSS2SI64rr | |
| 140774636U, // Int_VCVTSS2SIrm | |
| 139857132U, // Int_VCVTSS2SIrr | |
| 140512503U, // Int_VCVTTPD2DQrm | |
| 139857143U, // Int_VCVTTPD2DQrr | |
| 140512515U, // Int_VCVTTPS2DQrm | |
| 139857155U, // Int_VCVTTPS2DQrr | |
| 140512527U, // Int_VCVTTSD2SI64rm | |
| 139857167U, // Int_VCVTTSD2SI64rr | |
| 140512527U, // Int_VCVTTSD2SIrm | |
| 139857167U, // Int_VCVTTSD2SIrr | |
| 140774671U, // Int_VCVTTSS2SI64rm | |
| 139857167U, // Int_VCVTTSS2SI64rr | |
| 140774671U, // Int_VCVTTSS2SIrm | |
| 139857167U, // Int_VCVTTSS2SIrr | |
| 140512539U, // Int_VUCOMISDrm | |
| 139857179U, // Int_VUCOMISDrr | |
| 140512549U, // Int_VUCOMISSrm | |
| 139857189U, // Int_VUCOMISSrr | |
| 1073745199U, // JAE_1 | |
| 1073745199U, // JAE_4 | |
| 1073745204U, // JA_1 | |
| 1073745204U, // JA_4 | |
| 1073745208U, // JBE_1 | |
| 1073745208U, // JBE_4 | |
| 1073745213U, // JB_1 | |
| 1073745213U, // JB_4 | |
| 1073745217U, // JCXZ8 | |
| 1073745223U, // JE_1 | |
| 1073745223U, // JE_4 | |
| 1073745227U, // JGE_1 | |
| 1073745227U, // JGE_4 | |
| 1073745232U, // JG_1 | |
| 1073745232U, // JG_4 | |
| 1073745236U, // JLE_1 | |
| 1073745236U, // JLE_4 | |
| 1073745241U, // JL_1 | |
| 1073745241U, // JL_4 | |
| 402656605U, // JMP32m | |
| 134221149U, // JMP32r | |
| 536874333U, // JMP64m | |
| 1073745245U, // JMP64pcrel32 | |
| 134221149U, // JMP64r | |
| 1073745245U, // JMP_1 | |
| 1073745245U, // JMP_4 | |
| 1073745250U, // JNE_1 | |
| 1073745250U, // JNE_4 | |
| 1073745255U, // JNO_1 | |
| 1073745255U, // JNO_4 | |
| 1073745260U, // JNP_1 | |
| 1073745260U, // JNP_4 | |
| 1073745265U, // JNS_1 | |
| 1073745265U, // JNS_4 | |
| 1073745270U, // JO_1 | |
| 1073745270U, // JO_4 | |
| 1073745274U, // JP_1 | |
| 1073745274U, // JP_4 | |
| 1073745278U, // JS_1 | |
| 1073745278U, // JS_4 | |
| 3458U, // LAHF | |
| 139988359U, // LAR16rm | |
| 139857287U, // LAR16rr | |
| 139988359U, // LAR32rm | |
| 139857287U, // LAR32rr | |
| 139988359U, // LAR64rm | |
| 139857287U, // LAR64rr | |
| 272633228U, // LCMPXCHG16 | |
| 406850956U, // LCMPXCHG32 | |
| 2013269403U, // LCMPXCHG64 | |
| 675286412U, // LCMPXCHG8 | |
| 536874411U, // LCMPXCHG8B | |
| 139726268U, // LDDQUrm | |
| 402656707U, // LDMXCSR | |
| 140905932U, // LDS16rm | |
| 140905932U, // LDS32rm | |
| 3537U, // LD_F0 | |
| 3542U, // LD_F1 | |
| 805309915U, // LD_F32m | |
| 939527643U, // LD_F64m | |
| 2147487195U, // LD_F80m | |
| 0U, // LD_Fp032 | |
| 0U, // LD_Fp064 | |
| 0U, // LD_Fp080 | |
| 0U, // LD_Fp132 | |
| 0U, // LD_Fp164 | |
| 0U, // LD_Fp180 | |
| 0U, // LD_Fp32m | |
| 0U, // LD_Fp32m64 | |
| 0U, // LD_Fp32m80 | |
| 0U, // LD_Fp64m | |
| 0U, // LD_Fp64m80 | |
| 0U, // LD_Fp80m | |
| 134221275U, // LD_Frr | |
| 140119520U, // LEA16r | |
| 140119520U, // LEA32r | |
| 140119520U, // LEA64_32r | |
| 140250592U, // LEA64r | |
| 3557U, // LEAVE | |
| 3557U, // LEAVE64 | |
| 140905963U, // LES16rm | |
| 140905963U, // LES32rm | |
| 3568U, // LFENCE | |
| 140905975U, // LFS16rm | |
| 140905975U, // LFS32rm | |
| 140905975U, // LFS64rm | |
| 1744834044U, // LGDTm | |
| 140905986U, // LGS16rm | |
| 140905986U, // LGS32rm | |
| 140905986U, // LGS64rm | |
| 1744834055U, // LIDTm | |
| 268439053U, // LLDT16m | |
| 134221325U, // LLDT16r | |
| 268439059U, // LMSW16m | |
| 134221331U, // LMSW16r | |
| 272633369U, // LOCK_ADD16mi | |
| 272633369U, // LOCK_ADD16mi8 | |
| 272633369U, // LOCK_ADD16mr | |
| 406851097U, // LOCK_ADD32mi | |
| 406851097U, // LOCK_ADD32mi8 | |
| 406851097U, // LOCK_ADD32mr | |
| 541068825U, // LOCK_ADD64mi32 | |
| 541068825U, // LOCK_ADD64mi8 | |
| 541068825U, // LOCK_ADD64mr | |
| 675286553U, // LOCK_ADD8mi | |
| 675286553U, // LOCK_ADD8mr | |
| 268439076U, // LOCK_DEC16m | |
| 402656804U, // LOCK_DEC32m | |
| 536874532U, // LOCK_DEC64m | |
| 671092260U, // LOCK_DEC8m | |
| 268439087U, // LOCK_INC16m | |
| 402656815U, // LOCK_INC32m | |
| 536874543U, // LOCK_INC64m | |
| 671092271U, // LOCK_INC8m | |
| 3642U, // LOCK_PREFIX | |
| 272633407U, // LOCK_SUB16mi | |
| 272633407U, // LOCK_SUB16mi8 | |
| 272633407U, // LOCK_SUB16mr | |
| 406851135U, // LOCK_SUB32mi | |
| 406851135U, // LOCK_SUB32mi8 | |
| 406851135U, // LOCK_SUB32mr | |
| 541068863U, // LOCK_SUB64mi32 | |
| 541068863U, // LOCK_SUB64mi8 | |
| 541068863U, // LOCK_SUB64mr | |
| 675286591U, // LOCK_SUB8mi | |
| 675286591U, // LOCK_SUB8mr | |
| 3658U, // LODSB | |
| 3664U, // LODSD | |
| 3670U, // LODSQ | |
| 3676U, // LODSW | |
| 1073745506U, // LOOP | |
| 1073745512U, // LOOPE | |
| 1073745519U, // LOOPNE | |
| 3703U, // LRET | |
| 134221436U, // LRETI | |
| 139988610U, // LSL16rm | |
| 139857538U, // LSL16rr | |
| 140119682U, // LSL32rm | |
| 139857538U, // LSL32rr | |
| 140250754U, // LSL64rm | |
| 139857538U, // LSL64rr | |
| 140906119U, // LSS16rm | |
| 140906119U, // LSS32rm | |
| 140906119U, // LSS64rm | |
| 3724U, // LTRm | |
| 3724U, // LTRr | |
| 2281705105U, // LXADD16 | |
| 2415922833U, // LXADD32 | |
| 1656753809U, // LXADD64 | |
| 2550140561U, // LXADD8 | |
| 139857565U, // MASKMOVDQU | |
| 139857565U, // MASKMOVDQU64 | |
| 139202217U, // MAXPDrm | |
| 139202217U, // MAXPDrm_Int | |
| 138546857U, // MAXPDrr | |
| 138546857U, // MAXPDrr_Int | |
| 139202224U, // MAXPSrm | |
| 139202224U, // MAXPSrm_Int | |
| 138546864U, // MAXPSrr | |
| 138546864U, // MAXPSrr_Int | |
| 139333303U, // MAXSDrm | |
| 139333303U, // MAXSDrm_Int | |
| 138546871U, // MAXSDrr | |
| 138546871U, // MAXSDrr_Int | |
| 139464382U, // MAXSSrm | |
| 139464382U, // MAXSSrm_Int | |
| 138546878U, // MAXSSrr | |
| 138546878U, // MAXSSrr_Int | |
| 3781U, // MFENCE | |
| 3788U, // MINGW_ALLOCA | |
| 139202279U, // MINPDrm | |
| 139202279U, // MINPDrm_Int | |
| 138546919U, // MINPDrr | |
| 138546919U, // MINPDrr_Int | |
| 139202286U, // MINPSrm | |
| 139202286U, // MINPSrm_Int | |
| 138546926U, // MINPSrr | |
| 138546926U, // MINPSrr_Int | |
| 139333365U, // MINSDrm | |
| 139333365U, // MINSDrm_Int | |
| 138546933U, // MINSDrr | |
| 138546933U, // MINSDrr_Int | |
| 139464444U, // MINSSrm | |
| 139464444U, // MINSSrm_Int | |
| 138546940U, // MINSSrr | |
| 138546940U, // MINSSrr_Int | |
| 140512199U, // MMX_CVTPD2PIrm | |
| 139856839U, // MMX_CVTPD2PIrr | |
| 140250065U, // MMX_CVTPI2PDrm | |
| 139856849U, // MMX_CVTPI2PDrr | |
| 140250075U, // MMX_CVTPI2PSrm | |
| 139856859U, // MMX_CVTPI2PSrr | |
| 140643301U, // MMX_CVTPS2PIrm | |
| 139856869U, // MMX_CVTPS2PIrr | |
| 140512260U, // MMX_CVTTPD2PIrm | |
| 139856900U, // MMX_CVTTPD2PIrr | |
| 140643343U, // MMX_CVTTPS2PIrm | |
| 139856911U, // MMX_CVTTPS2PIrr | |
| 3843U, // MMX_EMMS | |
| 3848U, // MMX_FEMMS | |
| 139857678U, // MMX_MASKMOVQ | |
| 139857678U, // MMX_MASKMOVQ64 | |
| 139857688U, // MMX_MOVD64from64rr | |
| 139857688U, // MMX_MOVD64grr | |
| 406851352U, // MMX_MOVD64mr | |
| 140119832U, // MMX_MOVD64rm | |
| 139857688U, // MMX_MOVD64rr | |
| 139857688U, // MMX_MOVD64rrv164 | |
| 139857688U, // MMX_MOVD64to64rr | |
| 139857694U, // MMX_MOVDQ2Qrr | |
| 139857694U, // MMX_MOVFR642Qrr | |
| 541069095U, // MMX_MOVNTQmr | |
| 139857711U, // MMX_MOVQ2DQrr | |
| 139857711U, // MMX_MOVQ2FR64rr | |
| 541069112U, // MMX_MOVQ64mr | |
| 140250936U, // MMX_MOVQ64rm | |
| 139857720U, // MMX_MOVQ64rr | |
| 140119832U, // MMX_MOVZDI2PDIrm | |
| 139857688U, // MMX_MOVZDI2PDIrr | |
| 138940222U, // MMX_PACKSSDWrm | |
| 138547006U, // MMX_PACKSSDWrr | |
| 138940232U, // MMX_PACKSSWBrm | |
| 138547016U, // MMX_PACKSSWBrr | |
| 138940242U, // MMX_PACKUSWBrm | |
| 138547026U, // MMX_PACKUSWBrr | |
| 138940252U, // MMX_PADDBrm | |
| 138547036U, // MMX_PADDBrr | |
| 138940259U, // MMX_PADDDrm | |
| 138547043U, // MMX_PADDDrr | |
| 138940266U, // MMX_PADDQrm | |
| 138547050U, // MMX_PADDQrr | |
| 138940273U, // MMX_PADDSBrm | |
| 138547057U, // MMX_PADDSBrr | |
| 138940281U, // MMX_PADDSWrm | |
| 138547065U, // MMX_PADDSWrr | |
| 138940289U, // MMX_PADDUSBrm | |
| 138547073U, // MMX_PADDUSBrr | |
| 138940298U, // MMX_PADDUSWrm | |
| 138547082U, // MMX_PADDUSWrr | |
| 138940307U, // MMX_PADDWrm | |
| 138547091U, // MMX_PADDWrr | |
| 138940314U, // MMX_PANDNrm | |
| 138547098U, // MMX_PANDNrr | |
| 138940321U, // MMX_PANDrm | |
| 138547105U, // MMX_PANDrr | |
| 138940327U, // MMX_PAVGBrm | |
| 138547111U, // MMX_PAVGBrr | |
| 138940334U, // MMX_PAVGWrm | |
| 138547118U, // MMX_PAVGWrr | |
| 138940341U, // MMX_PCMPEQBrm | |
| 138547125U, // MMX_PCMPEQBrr | |
| 138940350U, // MMX_PCMPEQDrm | |
| 138547134U, // MMX_PCMPEQDrr | |
| 138940359U, // MMX_PCMPEQWrm | |
| 138547143U, // MMX_PCMPEQWrr | |
| 138940368U, // MMX_PCMPGTBrm | |
| 138547152U, // MMX_PCMPGTBrr | |
| 138940377U, // MMX_PCMPGTDrm | |
| 138547161U, // MMX_PCMPGTDrr | |
| 138940386U, // MMX_PCMPGTWrm | |
| 138547170U, // MMX_PCMPGTWrr | |
| 139857899U, // MMX_PEXTRWri | |
| 138678259U, // MMX_PINSRWrmi | |
| 138547187U, // MMX_PINSRWrri | |
| 138940411U, // MMX_PMADDWDrm | |
| 138547195U, // MMX_PMADDWDrr | |
| 138940420U, // MMX_PMAXSWrm | |
| 138547204U, // MMX_PMAXSWrr | |
| 138940428U, // MMX_PMAXUBrm | |
| 138547212U, // MMX_PMAXUBrr | |
| 138940436U, // MMX_PMINSWrm | |
| 138547220U, // MMX_PMINSWrr | |
| 138940444U, // MMX_PMINUBrm | |
| 138547228U, // MMX_PMINUBrr | |
| 139857956U, // MMX_PMOVMSKBrr | |
| 138940462U, // MMX_PMULHUWrm | |
| 138547246U, // MMX_PMULHUWrr | |
| 138940471U, // MMX_PMULHWrm | |
| 138547255U, // MMX_PMULHWrr | |
| 138940479U, // MMX_PMULLWrm | |
| 138547263U, // MMX_PMULLWrr | |
| 138940487U, // MMX_PMULUDQrm | |
| 138547271U, // MMX_PMULUDQrr | |
| 138940496U, // MMX_PORrm | |
| 138547280U, // MMX_PORrr | |
| 138940501U, // MMX_PSADBWrm | |
| 138547285U, // MMX_PSADBWrr | |
| 140251229U, // MMX_PSHUFWmi | |
| 139858013U, // MMX_PSHUFWri | |
| 138547301U, // MMX_PSLLDri | |
| 138940517U, // MMX_PSLLDrm | |
| 138547301U, // MMX_PSLLDrr | |
| 138547308U, // MMX_PSLLQri | |
| 138940524U, // MMX_PSLLQrm | |
| 138547308U, // MMX_PSLLQrr | |
| 138547315U, // MMX_PSLLWri | |
| 138940531U, // MMX_PSLLWrm | |
| 138547315U, // MMX_PSLLWrr | |
| 138547322U, // MMX_PSRADri | |
| 138940538U, // MMX_PSRADrm | |
| 138547322U, // MMX_PSRADrr | |
| 138547329U, // MMX_PSRAWri | |
| 138940545U, // MMX_PSRAWrm | |
| 138547329U, // MMX_PSRAWrr | |
| 138547336U, // MMX_PSRLDri | |
| 138940552U, // MMX_PSRLDrm | |
| 138547336U, // MMX_PSRLDrr | |
| 138547343U, // MMX_PSRLQri | |
| 138940559U, // MMX_PSRLQrm | |
| 138547343U, // MMX_PSRLQrr | |
| 138547350U, // MMX_PSRLWri | |
| 138940566U, // MMX_PSRLWrm | |
| 138547350U, // MMX_PSRLWrr | |
| 138940573U, // MMX_PSUBBrm | |
| 138547357U, // MMX_PSUBBrr | |
| 138940580U, // MMX_PSUBDrm | |
| 138547364U, // MMX_PSUBDrr | |
| 138940587U, // MMX_PSUBQrm | |
| 138547371U, // MMX_PSUBQrr | |
| 138940594U, // MMX_PSUBSBrm | |
| 138547378U, // MMX_PSUBSBrr | |
| 138940602U, // MMX_PSUBSWrm | |
| 138547386U, // MMX_PSUBSWrr | |
| 138940610U, // MMX_PSUBUSBrm | |
| 138547394U, // MMX_PSUBUSBrr | |
| 138940619U, // MMX_PSUBUSWrm | |
| 138547403U, // MMX_PSUBUSWrr | |
| 138940628U, // MMX_PSUBWrm | |
| 138547412U, // MMX_PSUBWrr | |
| 138940635U, // MMX_PUNPCKHBWrm | |
| 138547419U, // MMX_PUNPCKHBWrr | |
| 138940646U, // MMX_PUNPCKHDQrm | |
| 138547430U, // MMX_PUNPCKHDQrr | |
| 138940657U, // MMX_PUNPCKHWDrm | |
| 138547441U, // MMX_PUNPCKHWDrr | |
| 138940668U, // MMX_PUNPCKLBWrm | |
| 138547452U, // MMX_PUNPCKLBWrr | |
| 138940679U, // MMX_PUNPCKLDQrm | |
| 138547463U, // MMX_PUNPCKLDQrr | |
| 138940690U, // MMX_PUNPCKLWDrm | |
| 138547474U, // MMX_PUNPCKLWDrr | |
| 138940701U, // MMX_PXORrm | |
| 138547485U, // MMX_PXORrr | |
| 0U, // MMX_V_SET0 | |
| 0U, // MMX_V_SETALLONES | |
| 4387U, // MONITOR | |
| 1124077867U, // MOV16ao16 | |
| 272634155U, // MOV16mi | |
| 272634155U, // MOV16mr | |
| 272634155U, // MOV16ms | |
| 1073746224U, // MOV16o16a | |
| 0U, // MOV16r0 | |
| 139858219U, // MOV16ri | |
| 139989291U, // MOV16rm | |
| 139858219U, // MOV16rr | |
| 139858219U, // MOV16rr_REV | |
| 139858219U, // MOV16rs | |
| 139989291U, // MOV16sm | |
| 139858219U, // MOV16sr | |
| 1128272171U, // MOV32ao32 | |
| 139858219U, // MOV32cr | |
| 139858219U, // MOV32dr | |
| 406851883U, // MOV32mi | |
| 406851883U, // MOV32mr | |
| 406851883U, // MOV32mr_TC | |
| 406851883U, // MOV32ms | |
| 1073746234U, // MOV32o32a | |
| 0U, // MOV32r0 | |
| 139858219U, // MOV32rc | |
| 139858219U, // MOV32rd | |
| 139858219U, // MOV32ri | |
| 140120363U, // MOV32rm | |
| 140120363U, // MOV32rm_TC | |
| 139858219U, // MOV32rr | |
| 139858219U, // MOV32rr_REV | |
| 139858219U, // MOV32rr_TC | |
| 139858219U, // MOV32rs | |
| 140120363U, // MOV32sm | |
| 139858219U, // MOV32sr | |
| 2684358981U, // MOV64FSrm | |
| 2684358991U, // MOV64GSrm | |
| 1132466475U, // MOV64ao64 | |
| 1132466475U, // MOV64ao8 | |
| 139858219U, // MOV64cr | |
| 139858219U, // MOV64dr | |
| 541069611U, // MOV64mi32 | |
| 541069611U, // MOV64mr | |
| 541069611U, // MOV64mr_TC | |
| 541069611U, // MOV64ms | |
| 1073746265U, // MOV64o64a | |
| 1073746265U, // MOV64o8a | |
| 0U, // MOV64r0 | |
| 139858219U, // MOV64rc | |
| 139858219U, // MOV64rd | |
| 139858276U, // MOV64ri | |
| 139858219U, // MOV64ri32 | |
| 0U, // MOV64ri64i32 | |
| 139858219U, // MOV64ri_alt | |
| 140251435U, // MOV64rm | |
| 140251435U, // MOV64rm_TC | |
| 139858219U, // MOV64rr | |
| 139858219U, // MOV64rr_REV | |
| 139858219U, // MOV64rr_TC | |
| 139858219U, // MOV64rs | |
| 140251435U, // MOV64sm | |
| 139858219U, // MOV64sr | |
| 139857720U, // MOV64toPQIrr | |
| 140250936U, // MOV64toSDrm | |
| 139857720U, // MOV64toSDrr | |
| 1136660779U, // MOV8ao8 | |
| 675287339U, // MOV8mi | |
| 675287339U, // MOV8mr | |
| 675287339U, // MOV8mr_NOREX | |
| 1073746284U, // MOV8o8a | |
| 0U, // MOV8r0 | |
| 139858219U, // MOV8ri | |
| 140382507U, // MOV8rm | |
| 140382507U, // MOV8rm_NOREX | |
| 139858219U, // MOV8rr | |
| 139858219U, // MOV8rr_NOREX | |
| 139858219U, // MOV8rr_REV | |
| 2818575041U, // MOVAPDmr | |
| 140511937U, // MOVAPDrm | |
| 139856577U, // MOVAPDrr | |
| 2818575049U, // MOVAPSmr | |
| 140511945U, // MOVAPSrm | |
| 139856585U, // MOVAPSrr | |
| 140644726U, // MOVDDUPrm | |
| 139858294U, // MOVDDUPrr | |
| 140119832U, // MOVDI2PDIrm | |
| 139857688U, // MOVDI2PDIrr | |
| 140119832U, // MOVDI2SSrm | |
| 139857688U, // MOVDI2SSrr | |
| 1480593791U, // MOVDQAmr | |
| 139727231U, // MOVDQArm | |
| 139858303U, // MOVDQArr | |
| 1480593799U, // MOVDQUmr | |
| 1480593799U, // MOVDQUmr_Int | |
| 139727239U, // MOVDQUrm | |
| 139727239U, // MOVDQUrm_Int | |
| 138547599U, // MOVHLPSrr | |
| 943722904U, // MOVHPDmr | |
| 139334040U, // MOVHPDrm | |
| 943722912U, // MOVHPSmr | |
| 139334048U, // MOVHPSrm | |
| 138547624U, // MOVLHPSrr | |
| 943722929U, // MOVLPDmr | |
| 139334065U, // MOVLPDrm | |
| 943722937U, // MOVLPSmr | |
| 139334073U, // MOVLPSrm | |
| 541069112U, // MOVLQ128mr | |
| 139858369U, // MOVMSKPDrr | |
| 139858379U, // MOVMSKPSrr | |
| 139727317U, // MOVNTDQArm | |
| 2818576863U, // MOVNTDQ_64mr | |
| 2818576863U, // MOVNTDQmr | |
| 2818576863U, // MOVNTDQmr_Int | |
| 541069800U, // MOVNTI_64mr | |
| 406852072U, // MOVNTImr | |
| 406852072U, // MOVNTImr_Int | |
| 2818576880U, // MOVNTPDmr | |
| 1480593904U, // MOVNTPDmr_Int | |
| 2818576889U, // MOVNTPSmr | |
| 1480593913U, // MOVNTPSmr_Int | |
| 0U, // MOVPC32r | |
| 406851352U, // MOVPDI2DImr | |
| 139857688U, // MOVPDI2DIrr | |
| 541069112U, // MOVPQI2QImr | |
| 139857720U, // MOVPQIto64rr | |
| 140250936U, // MOVQI2PQIrm | |
| 139857720U, // MOVQxrxr | |
| 4610U, // MOVSB | |
| 4611U, // MOVSD | |
| 943723017U, // MOVSDmr | |
| 140644873U, // MOVSDrm | |
| 138547721U, // MOVSDrr | |
| 541069112U, // MOVSDto64mr | |
| 139857720U, // MOVSDto64rr | |
| 140513808U, // MOVSHDUPrm | |
| 139858448U, // MOVSHDUPrr | |
| 140513818U, // MOVSLDUPrm | |
| 139858458U, // MOVSLDUPrr | |
| 4644U, // MOVSQ | |
| 406851352U, // MOVSS2DImr | |
| 139857688U, // MOVSS2DIrr | |
| 809505322U, // MOVSSmr | |
| 140775978U, // MOVSSrm | |
| 138547754U, // MOVSSrr | |
| 4610U, // MOVSW | |
| 0U, // MOVSX16rm8 | |
| 140382769U, // MOVSX16rm8W | |
| 0U, // MOVSX16rr8 | |
| 139858481U, // MOVSX16rr8W | |
| 139989553U, // MOVSX32rm16 | |
| 140382769U, // MOVSX32rm8 | |
| 139858481U, // MOVSX32rr16 | |
| 139858481U, // MOVSX32rr8 | |
| 139989553U, // MOVSX64rm16 | |
| 140120632U, // MOVSX64rm32 | |
| 140382769U, // MOVSX64rm8 | |
| 139858481U, // MOVSX64rr16 | |
| 139858488U, // MOVSX64rr32 | |
| 139858481U, // MOVSX64rr8 | |
| 2818576960U, // MOVUPDmr | |
| 2818576960U, // MOVUPDmr_Int | |
| 140513856U, // MOVUPDrm | |
| 140513856U, // MOVUPDrm_Int | |
| 139858496U, // MOVUPDrr | |
| 2818576968U, // MOVUPSmr | |
| 2818576968U, // MOVUPSmr_Int | |
| 140513864U, // MOVUPSrm | |
| 140513864U, // MOVUPSrm_Int | |
| 139858504U, // MOVUPSrr | |
| 140119832U, // MOVZDI2PDIrm | |
| 139857688U, // MOVZDI2PDIrr | |
| 139726648U, // MOVZPQILo2PQIrm | |
| 139857720U, // MOVZPQILo2PQIrr | |
| 140250936U, // MOVZQI2PQIrm | |
| 139857720U, // MOVZQI2PQIrr | |
| 0U, // MOVZX16rm8 | |
| 140382800U, // MOVZX16rm8W | |
| 0U, // MOVZX16rr8 | |
| 139858512U, // MOVZX16rr8W | |
| 140382800U, // MOVZX32_NOREXrm8 | |
| 139858512U, // MOVZX32_NOREXrr8 | |
| 139989584U, // MOVZX32rm16 | |
| 140382800U, // MOVZX32rm8 | |
| 139858512U, // MOVZX32rr16 | |
| 139858512U, // MOVZX32rr8 | |
| 0U, // MOVZX64rm16 | |
| 139989584U, // MOVZX64rm16_Q | |
| 0U, // MOVZX64rm32 | |
| 0U, // MOVZX64rm8 | |
| 140382800U, // MOVZX64rm8_Q | |
| 0U, // MOVZX64rr16 | |
| 139858512U, // MOVZX64rr16_Q | |
| 0U, // MOVZX64rr32 | |
| 0U, // MOVZX64rr8 | |
| 139858512U, // MOVZX64rr8_Q | |
| 0U, // MOV_Fp3232 | |
| 0U, // MOV_Fp3264 | |
| 0U, // MOV_Fp3280 | |
| 0U, // MOV_Fp6432 | |
| 0U, // MOV_Fp6464 | |
| 0U, // MOV_Fp6480 | |
| 0U, // MOV_Fp8032 | |
| 0U, // MOV_Fp8064 | |
| 0U, // MOV_Fp8080 | |
| 139596375U, // MPSADBWrmi | |
| 138547799U, // MPSADBWrri | |
| 268440160U, // MUL16m | |
| 134222432U, // MUL16r | |
| 402657888U, // MUL32m | |
| 134222432U, // MUL32r | |
| 536875616U, // MUL64m | |
| 134222432U, // MUL64r | |
| 671093344U, // MUL8m | |
| 134222432U, // MUL8r | |
| 139203173U, // MULPDrm | |
| 138547813U, // MULPDrr | |
| 139203180U, // MULPSrm | |
| 138547820U, // MULPSrr | |
| 139334259U, // MULSDrm | |
| 139334259U, // MULSDrm_Int | |
| 138547827U, // MULSDrr | |
| 138547827U, // MULSDrr_Int | |
| 139465338U, // MULSSrm | |
| 139465338U, // MULSSrm_Int | |
| 138547834U, // MULSSrr | |
| 138547834U, // MULSSrr_Int | |
| 805311105U, // MUL_F32m | |
| 939528833U, // MUL_F64m | |
| 268440199U, // MUL_FI16m | |
| 402657927U, // MUL_FI32m | |
| 134222478U, // MUL_FPrST0 | |
| 134222465U, // MUL_FST0r | |
| 0U, // MUL_Fp32 | |
| 0U, // MUL_Fp32m | |
| 0U, // MUL_Fp64 | |
| 0U, // MUL_Fp64m | |
| 0U, // MUL_Fp64m32 | |
| 0U, // MUL_Fp80 | |
| 0U, // MUL_Fp80m32 | |
| 0U, // MUL_Fp80m64 | |
| 0U, // MUL_FpI16m32 | |
| 0U, // MUL_FpI16m64 | |
| 0U, // MUL_FpI16m80 | |
| 0U, // MUL_FpI32m32 | |
| 0U, // MUL_FpI32m64 | |
| 0U, // MUL_FpI32m80 | |
| 142611073U, // MUL_FrST0 | |
| 4757U, // MWAIT | |
| 268440219U, // NEG16m | |
| 134222491U, // NEG16r | |
| 402657947U, // NEG32m | |
| 134222491U, // NEG32r | |
| 536875675U, // NEG64m | |
| 134222491U, // NEG64r | |
| 671093403U, // NEG8m | |
| 134222491U, // NEG8r | |
| 4768U, // NOOP | |
| 402657956U, // NOOPL | |
| 268440228U, // NOOPW | |
| 268440233U, // NOT16m | |
| 134222505U, // NOT16r | |
| 402657961U, // NOT32m | |
| 134222505U, // NOT32r | |
| 536875689U, // NOT64m | |
| 134222505U, // NOT64r | |
| 671093417U, // NOT8m | |
| 134222505U, // NOT8r | |
| 134222510U, // OR16i16 | |
| 272634551U, // OR16mi | |
| 272634551U, // OR16mi8 | |
| 272634551U, // OR16mr | |
| 138547895U, // OR16ri | |
| 138547895U, // OR16ri8 | |
| 138678967U, // OR16rm | |
| 138547895U, // OR16rr | |
| 138547895U, // OR16rr_REV | |
| 134222523U, // OR32i32 | |
| 406852279U, // OR32mi | |
| 406852279U, // OR32mi8 | |
| 406852279U, // OR32mr | |
| 138547895U, // OR32ri | |
| 138547895U, // OR32ri8 | |
| 138810039U, // OR32rm | |
| 138547895U, // OR32rr | |
| 138547895U, // OR32rr_REV | |
| 134222533U, // OR64i32 | |
| 541070007U, // OR64mi32 | |
| 541070007U, // OR64mi8 | |
| 541070007U, // OR64mr | |
| 138547895U, // OR64ri32 | |
| 138547895U, // OR64ri8 | |
| 138941111U, // OR64rm | |
| 138547895U, // OR64rr | |
| 138547895U, // OR64rr_REV | |
| 134222543U, // OR8i8 | |
| 675287735U, // OR8mi | |
| 675287735U, // OR8mr | |
| 138547895U, // OR8ri | |
| 139072183U, // OR8rm | |
| 138547895U, // OR8rr | |
| 138547895U, // OR8rr_REV | |
| 139201233U, // ORPDrm | |
| 138545873U, // ORPDrr | |
| 139201239U, // ORPSrm | |
| 138545879U, // ORPSrr | |
| 201331416U, // OUT16ir | |
| 4829U, // OUT16rr | |
| 205525720U, // OUT32ir | |
| 4842U, // OUT32rr | |
| 209720024U, // OUT8ir | |
| 4856U, // OUT8rr | |
| 4869U, // OUTSB | |
| 4875U, // OUTSD | |
| 4881U, // OUTSW | |
| 139727639U, // PABSBrm128 | |
| 140251927U, // PABSBrm64 | |
| 139858711U, // PABSBrr128 | |
| 139858711U, // PABSBrr64 | |
| 139727646U, // PABSDrm128 | |
| 140251934U, // PABSDrm64 | |
| 139858718U, // PABSDrr128 | |
| 139858718U, // PABSDrr64 | |
| 139727653U, // PABSWrm128 | |
| 140251941U, // PABSWrm64 | |
| 139858725U, // PABSWrr128 | |
| 139858725U, // PABSWrr64 | |
| 139595582U, // PACKSSDWrm | |
| 138547006U, // PACKSSDWrr | |
| 139595592U, // PACKSSWBrm | |
| 138547016U, // PACKSSWBrr | |
| 139596588U, // PACKUSDWrm | |
| 138548012U, // PACKUSDWrr | |
| 139595602U, // PACKUSWBrm | |
| 138547026U, // PACKUSWBrr | |
| 139595612U, // PADDBrm | |
| 138547036U, // PADDBrr | |
| 139595619U, // PADDDrm | |
| 138547043U, // PADDDrr | |
| 139595626U, // PADDQrm | |
| 138547050U, // PADDQrr | |
| 139595633U, // PADDSBrm | |
| 138547057U, // PADDSBrr | |
| 139595641U, // PADDSWrm | |
| 138547065U, // PADDSWrr | |
| 139595649U, // PADDUSBrm | |
| 138547073U, // PADDUSBrr | |
| 139595658U, // PADDUSWrm | |
| 138547082U, // PADDUSWrr | |
| 139595667U, // PADDWrm | |
| 138547091U, // PADDWrr | |
| 139596598U, // PALIGNR128rm | |
| 138548022U, // PALIGNR128rr | |
| 138941238U, // PALIGNR64rm | |
| 138548022U, // PALIGNR64rr | |
| 139595674U, // PANDNrm | |
| 138547098U, // PANDNrr | |
| 139595681U, // PANDrm | |
| 138547105U, // PANDrr | |
| 4927U, // PAUSE | |
| 139595687U, // PAVGBrm | |
| 138547111U, // PAVGBrr | |
| 139595694U, // PAVGWrm | |
| 138547118U, // PAVGWrr | |
| 139596613U, // PBLENDVBrm0 | |
| 138548037U, // PBLENDVBrr0 | |
| 139596623U, // PBLENDWrmi | |
| 138548047U, // PBLENDWrri | |
| 139595701U, // PCMPEQBrm | |
| 138547125U, // PCMPEQBrr | |
| 139595710U, // PCMPEQDrm | |
| 138547134U, // PCMPEQDrr | |
| 139596632U, // PCMPEQQrm | |
| 138548056U, // PCMPEQQrr | |
| 139595719U, // PCMPEQWrm | |
| 138547143U, // PCMPEQWrr | |
| 139727713U, // PCMPESTRIArm | |
| 139858785U, // PCMPESTRIArr | |
| 139727713U, // PCMPESTRICrm | |
| 139858785U, // PCMPESTRICrr | |
| 139727713U, // PCMPESTRIOrm | |
| 139858785U, // PCMPESTRIOrr | |
| 139727713U, // PCMPESTRISrm | |
| 139858785U, // PCMPESTRISrr | |
| 139727713U, // PCMPESTRIZrm | |
| 139858785U, // PCMPESTRIZrr | |
| 139727713U, // PCMPESTRIrm | |
| 139858785U, // PCMPESTRIrr | |
| 4972U, // PCMPESTRM128MEM | |
| 4995U, // PCMPESTRM128REG | |
| 139727770U, // PCMPESTRM128rm | |
| 139858842U, // PCMPESTRM128rr | |
| 139595728U, // PCMPGTBrm | |
| 138547152U, // PCMPGTBrr | |
| 139595737U, // PCMPGTDrm | |
| 138547161U, // PCMPGTDrr | |
| 139596709U, // PCMPGTQrm | |
| 138548133U, // PCMPGTQrr | |
| 139595746U, // PCMPGTWrm | |
| 138547170U, // PCMPGTWrr | |
| 139727790U, // PCMPISTRIArm | |
| 139858862U, // PCMPISTRIArr | |
| 139727790U, // PCMPISTRICrm | |
| 139858862U, // PCMPISTRICrr | |
| 139727790U, // PCMPISTRIOrm | |
| 139858862U, // PCMPISTRIOrr | |
| 139727790U, // PCMPISTRISrm | |
| 139858862U, // PCMPISTRISrr | |
| 139727790U, // PCMPISTRIZrm | |
| 139858862U, // PCMPISTRIZrr | |
| 139727790U, // PCMPISTRIrm | |
| 139858862U, // PCMPISTRIrr | |
| 5049U, // PCMPISTRM128MEM | |
| 5072U, // PCMPISTRM128REG | |
| 139727847U, // PCMPISTRM128rm | |
| 139858919U, // PCMPISTRM128rr | |
| 675288050U, // PEXTRBmr | |
| 139858930U, // PEXTRBrr | |
| 406852602U, // PEXTRDmr | |
| 139858938U, // PEXTRDrr | |
| 541070338U, // PEXTRQmr | |
| 139858946U, // PEXTRQrr | |
| 272633835U, // PEXTRWmr | |
| 139857899U, // PEXTRWri | |
| 139596810U, // PHADDDrm128 | |
| 138941450U, // PHADDDrm64 | |
| 138548234U, // PHADDDrr128 | |
| 138548234U, // PHADDDrr64 | |
| 139596818U, // PHADDSWrm128 | |
| 138941458U, // PHADDSWrm64 | |
| 138548242U, // PHADDSWrr128 | |
| 138548242U, // PHADDSWrr64 | |
| 139596827U, // PHADDWrm128 | |
| 138941467U, // PHADDWrm64 | |
| 138548251U, // PHADDWrr128 | |
| 138548251U, // PHADDWrr64 | |
| 139727907U, // PHMINPOSUWrm128 | |
| 139858979U, // PHMINPOSUWrr128 | |
| 139596847U, // PHSUBDrm128 | |
| 138941487U, // PHSUBDrm64 | |
| 138548271U, // PHSUBDrr128 | |
| 138548271U, // PHSUBDrr64 | |
| 139596855U, // PHSUBSWrm128 | |
| 138941495U, // PHSUBSWrm64 | |
| 138548279U, // PHSUBSWrr128 | |
| 138548279U, // PHSUBSWrr64 | |
| 139596864U, // PHSUBWrm128 | |
| 138941504U, // PHSUBWrm64 | |
| 138548288U, // PHSUBWrr128 | |
| 138548288U, // PHSUBWrr64 | |
| 139072584U, // PINSRBrm | |
| 138548296U, // PINSRBrr | |
| 138810448U, // PINSRDrm | |
| 138548304U, // PINSRDrr | |
| 138941528U, // PINSRQrm | |
| 138548312U, // PINSRQrr | |
| 138678259U, // PINSRWrmi | |
| 138547187U, // PINSRWrri | |
| 139596896U, // PMADDUBSWrm128 | |
| 138941536U, // PMADDUBSWrm64 | |
| 138548320U, // PMADDUBSWrr128 | |
| 138548320U, // PMADDUBSWrr64 | |
| 139595771U, // PMADDWDrm | |
| 138547195U, // PMADDWDrr | |
| 139596907U, // PMAXSBrm | |
| 138548331U, // PMAXSBrr | |
| 139596915U, // PMAXSDrm | |
| 138548339U, // PMAXSDrr | |
| 139595780U, // PMAXSWrm | |
| 138547204U, // PMAXSWrr | |
| 139595788U, // PMAXUBrm | |
| 138547212U, // PMAXUBrr | |
| 139596923U, // PMAXUDrm | |
| 138548347U, // PMAXUDrr | |
| 139596931U, // PMAXUWrm | |
| 138548355U, // PMAXUWrr | |
| 139596939U, // PMINSBrm | |
| 138548363U, // PMINSBrr | |
| 139596947U, // PMINSDrm | |
| 138548371U, // PMINSDrr | |
| 139595796U, // PMINSWrm | |
| 138547220U, // PMINSWrr | |
| 139595804U, // PMINUBrm | |
| 138547228U, // PMINUBrr | |
| 139596955U, // PMINUDrm | |
| 138548379U, // PMINUDrr | |
| 139596963U, // PMINUWrm | |
| 138548387U, // PMINUWrr | |
| 139857956U, // PMOVMSKBrr | |
| 140121259U, // PMOVSXBDrm | |
| 139859115U, // PMOVSXBDrr | |
| 139990197U, // PMOVSXBQrm | |
| 139859125U, // PMOVSXBQrr | |
| 140252351U, // PMOVSXBWrm | |
| 139859135U, // PMOVSXBWrr | |
| 140252361U, // PMOVSXDQrm | |
| 139859145U, // PMOVSXDQrr | |
| 140252371U, // PMOVSXWDrm | |
| 139859155U, // PMOVSXWDrr | |
| 140121309U, // PMOVSXWQrm | |
| 139859165U, // PMOVSXWQrr | |
| 140121319U, // PMOVZXBDrm | |
| 139859175U, // PMOVZXBDrr | |
| 139990257U, // PMOVZXBQrm | |
| 139859185U, // PMOVZXBQrr | |
| 140252411U, // PMOVZXBWrm | |
| 139859195U, // PMOVZXBWrr | |
| 140252421U, // PMOVZXDQrm | |
| 139859205U, // PMOVZXDQrr | |
| 140252431U, // PMOVZXWDrm | |
| 139859215U, // PMOVZXWDrr | |
| 140121369U, // PMOVZXWQrm | |
| 139859225U, // PMOVZXWQrr | |
| 139597091U, // PMULDQrm | |
| 138548515U, // PMULDQrr | |
| 139597099U, // PMULHRSWrm128 | |
| 138941739U, // PMULHRSWrm64 | |
| 138548523U, // PMULHRSWrr128 | |
| 138548523U, // PMULHRSWrr64 | |
| 139595822U, // PMULHUWrm | |
| 138547246U, // PMULHUWrr | |
| 139595831U, // PMULHWrm | |
| 138547255U, // PMULHWrr | |
| 139597109U, // PMULLDrm | |
| 138548533U, // PMULLDrr | |
| 139595839U, // PMULLWrm | |
| 138547263U, // PMULLWrr | |
| 139595847U, // PMULUDQrm | |
| 138547271U, // PMULUDQrr | |
| 134223165U, // POP16r | |
| 268440893U, // POP16rmm | |
| 134223165U, // POP16rmr | |
| 134223165U, // POP32r | |
| 402658621U, // POP32rmm | |
| 134223165U, // POP32rmr | |
| 134223165U, // POP64r | |
| 536876349U, // POP64rmm | |
| 134223165U, // POP64rmr | |
| 5442U, // POPA32 | |
| 139990343U, // POPCNT16rm | |
| 139859271U, // POPCNT16rr | |
| 140121415U, // POPCNT32rm | |
| 139859271U, // POPCNT32rr | |
| 140252487U, // POPCNT64rm | |
| 139859271U, // POPCNT64rr | |
| 5455U, // POPF16 | |
| 5460U, // POPF32 | |
| 5466U, // POPF64 | |
| 5472U, // POPFS16 | |
| 5472U, // POPFS32 | |
| 5472U, // POPFS64 | |
| 5480U, // POPGS16 | |
| 5480U, // POPGS32 | |
| 5480U, // POPGS64 | |
| 139595856U, // PORrm | |
| 138547280U, // PORrr | |
| 671094128U, // PREFETCHNTA | |
| 671094141U, // PREFETCHT0 | |
| 671094153U, // PREFETCHT1 | |
| 671094165U, // PREFETCHT2 | |
| 139595861U, // PSADBWrm | |
| 138547285U, // PSADBWrr | |
| 139597217U, // PSHUFBrm128 | |
| 138941857U, // PSHUFBrm64 | |
| 138548641U, // PSHUFBrr128 | |
| 138548641U, // PSHUFBrr64 | |
| 139728297U, // PSHUFDmi | |
| 139859369U, // PSHUFDri | |
| 139728305U, // PSHUFHWmi | |
| 139859377U, // PSHUFHWri | |
| 139728314U, // PSHUFLWmi | |
| 139859386U, // PSHUFLWri | |
| 139597251U, // PSIGNBrm128 | |
| 138941891U, // PSIGNBrm64 | |
| 138548675U, // PSIGNBrr128 | |
| 138548675U, // PSIGNBrr64 | |
| 139597259U, // PSIGNDrm128 | |
| 138941899U, // PSIGNDrm64 | |
| 138548683U, // PSIGNDrr128 | |
| 138548683U, // PSIGNDrr64 | |
| 139597267U, // PSIGNWrm128 | |
| 138941907U, // PSIGNWrm64 | |
| 138548691U, // PSIGNWrr128 | |
| 138548691U, // PSIGNWrr64 | |
| 138548699U, // PSLLDQri | |
| 138547301U, // PSLLDri | |
| 139595877U, // PSLLDrm | |
| 138547301U, // PSLLDrr | |
| 138547308U, // PSLLQri | |
| 139595884U, // PSLLQrm | |
| 138547308U, // PSLLQrr | |
| 138547315U, // PSLLWri | |
| 139595891U, // PSLLWrm | |
| 138547315U, // PSLLWrr | |
| 138547322U, // PSRADri | |
| 139595898U, // PSRADrm | |
| 138547322U, // PSRADrr | |
| 138547329U, // PSRAWri | |
| 139595905U, // PSRAWrm | |
| 138547329U, // PSRAWrr | |
| 138548707U, // PSRLDQri | |
| 138547336U, // PSRLDri | |
| 139595912U, // PSRLDrm | |
| 138547336U, // PSRLDrr | |
| 138547343U, // PSRLQri | |
| 139595919U, // PSRLQrm | |
| 138547343U, // PSRLQrr | |
| 138547350U, // PSRLWri | |
| 139595926U, // PSRLWrm | |
| 138547350U, // PSRLWrr | |
| 139595933U, // PSUBBrm | |
| 138547357U, // PSUBBrr | |
| 139595940U, // PSUBDrm | |
| 138547364U, // PSUBDrr | |
| 139595947U, // PSUBQrm | |
| 138547371U, // PSUBQrr | |
| 139595954U, // PSUBSBrm | |
| 138547378U, // PSUBSBrr | |
| 139595962U, // PSUBSWrm | |
| 138547386U, // PSUBSWrr | |
| 139595970U, // PSUBUSBrm | |
| 138547394U, // PSUBUSBrr | |
| 139595979U, // PSUBUSWrm | |
| 138547403U, // PSUBUSWrr | |
| 139595988U, // PSUBWrm | |
| 138547412U, // PSUBWrr | |
| 140514795U, // PTESTrm | |
| 139859435U, // PTESTrr | |
| 139595995U, // PUNPCKHBWrm | |
| 138547419U, // PUNPCKHBWrr | |
| 139596006U, // PUNPCKHDQrm | |
| 138547430U, // PUNPCKHDQrr | |
| 139597299U, // PUNPCKHQDQrm | |
| 138548723U, // PUNPCKHQDQrr | |
| 139596017U, // PUNPCKHWDrm | |
| 138547441U, // PUNPCKHWDrr | |
| 139596028U, // PUNPCKLBWrm | |
| 138547452U, // PUNPCKLBWrr | |
| 139596039U, // PUNPCKLDQrm | |
| 138547463U, // PUNPCKLDQrr | |
| 139597311U, // PUNPCKLQDQrm | |
| 138548735U, // PUNPCKLQDQrr | |
| 139596050U, // PUNPCKLWDrm | |
| 138547474U, // PUNPCKLWDrr | |
| 134223371U, // PUSH16r | |
| 268441099U, // PUSH16rmm | |
| 134223371U, // PUSH16rmr | |
| 134223371U, // PUSH32r | |
| 402658827U, // PUSH32rmm | |
| 134223371U, // PUSH32rmr | |
| 134223371U, // PUSH64i16 | |
| 134223371U, // PUSH64i32 | |
| 134223371U, // PUSH64i8 | |
| 134223371U, // PUSH64r | |
| 536876555U, // PUSH64rmm | |
| 134223371U, // PUSH64rmr | |
| 5649U, // PUSHA32 | |
| 5655U, // PUSHF16 | |
| 5661U, // PUSHF32 | |
| 5668U, // PUSHF64 | |
| 5675U, // PUSHFS16 | |
| 5675U, // PUSHFS32 | |
| 5675U, // PUSHFS64 | |
| 5684U, // PUSHGS16 | |
| 5684U, // PUSHGS32 | |
| 5684U, // PUSHGS64 | |
| 134223371U, // PUSHi16 | |
| 134223371U, // PUSHi32 | |
| 134223371U, // PUSHi8 | |
| 139596061U, // PXORrm | |
| 138547485U, // PXORrr | |
| 348132925U, // RCL16m1 | |
| 352327229U, // RCL16mCL | |
| 272635453U, // RCL16mi | |
| 213915197U, // RCL16r1 | |
| 218109501U, // RCL16rCL | |
| 138548797U, // RCL16ri | |
| 482350653U, // RCL32m1 | |
| 486544957U, // RCL32mCL | |
| 406853181U, // RCL32mi | |
| 213915197U, // RCL32r1 | |
| 218109501U, // RCL32rCL | |
| 138548797U, // RCL32ri | |
| 616568381U, // RCL64m1 | |
| 620762685U, // RCL64mCL | |
| 541070909U, // RCL64mi | |
| 213915197U, // RCL64r1 | |
| 218109501U, // RCL64rCL | |
| 138548797U, // RCL64ri | |
| 750786109U, // RCL8m1 | |
| 754980413U, // RCL8mCL | |
| 675288637U, // RCL8mi | |
| 213915197U, // RCL8r1 | |
| 218109501U, // RCL8rCL | |
| 138548797U, // RCL8ri | |
| 140514882U, // RCPPSm | |
| 140514882U, // RCPPSm_Int | |
| 139859522U, // RCPPSr | |
| 139859522U, // RCPPSr_Int | |
| 140777033U, // RCPSSm | |
| 140777033U, // RCPSSm_Int | |
| 139859529U, // RCPSSr | |
| 139859529U, // RCPSSr_Int | |
| 348132944U, // RCR16m1 | |
| 352327248U, // RCR16mCL | |
| 272635472U, // RCR16mi | |
| 213915216U, // RCR16r1 | |
| 218109520U, // RCR16rCL | |
| 138548816U, // RCR16ri | |
| 482350672U, // RCR32m1 | |
| 486544976U, // RCR32mCL | |
| 406853200U, // RCR32mi | |
| 213915216U, // RCR32r1 | |
| 218109520U, // RCR32rCL | |
| 138548816U, // RCR32ri | |
| 616568400U, // RCR64m1 | |
| 620762704U, // RCR64mCL | |
| 541070928U, // RCR64mi | |
| 213915216U, // RCR64r1 | |
| 218109520U, // RCR64rCL | |
| 138548816U, // RCR64ri | |
| 750786128U, // RCR8m1 | |
| 754980432U, // RCR8mCL | |
| 675288656U, // RCR8mi | |
| 213915216U, // RCR8r1 | |
| 218109520U, // RCR8rCL | |
| 138548816U, // RCR8ri | |
| 5717U, // RDMSR | |
| 5723U, // RDPMC | |
| 5729U, // RDTSC | |
| 5735U, // RDTSCP | |
| 5742U, // REPNE_PREFIX | |
| 5748U, // REP_MOVSB | |
| 5758U, // REP_MOVSD | |
| 5768U, // REP_MOVSQ | |
| 5778U, // REP_MOVSW | |
| 5788U, // REP_PREFIX | |
| 5792U, // REP_STOSB | |
| 5802U, // REP_STOSD | |
| 5812U, // REP_STOSQ | |
| 5822U, // REP_STOSW | |
| 5832U, // RET | |
| 134223564U, // RETI | |
| 268441297U, // ROL16m1 | |
| 352327377U, // ROL16mCL | |
| 272635601U, // ROL16mi | |
| 134223569U, // ROL16r1 | |
| 218109649U, // ROL16rCL | |
| 138548945U, // ROL16ri | |
| 402659025U, // ROL32m1 | |
| 486545105U, // ROL32mCL | |
| 406853329U, // ROL32mi | |
| 134223569U, // ROL32r1 | |
| 218109649U, // ROL32rCL | |
| 138548945U, // ROL32ri | |
| 536876753U, // ROL64m1 | |
| 624957137U, // ROL64mCL | |
| 541071057U, // ROL64mi | |
| 134223569U, // ROL64r1 | |
| 222303953U, // ROL64rCL | |
| 138548945U, // ROL64ri | |
| 671094481U, // ROL8m1 | |
| 754980561U, // ROL8mCL | |
| 675288785U, // ROL8mi | |
| 134223569U, // ROL8r1 | |
| 218109649U, // ROL8rCL | |
| 138548945U, // ROL8ri | |
| 268441302U, // ROR16m1 | |
| 352327382U, // ROR16mCL | |
| 272635606U, // ROR16mi | |
| 134223574U, // ROR16r1 | |
| 218109654U, // ROR16rCL | |
| 138548950U, // ROR16ri | |
| 402659030U, // ROR32m1 | |
| 486545110U, // ROR32mCL | |
| 406853334U, // ROR32mi | |
| 134223574U, // ROR32r1 | |
| 218109654U, // ROR32rCL | |
| 138548950U, // ROR32ri | |
| 536876758U, // ROR64m1 | |
| 624957142U, // ROR64mCL | |
| 541071062U, // ROR64mi | |
| 134223574U, // ROR64r1 | |
| 222303958U, // ROR64rCL | |
| 138548950U, // ROR64ri | |
| 671094486U, // ROR8m1 | |
| 754980566U, // ROR8mCL | |
| 675288790U, // ROR8mi | |
| 134223574U, // ROR8r1 | |
| 218109654U, // ROR8rCL | |
| 138548950U, // ROR8ri | |
| 141039323U, // ROUNDPDm_Int | |
| 139859675U, // ROUNDPDr_Int | |
| 141039332U, // ROUNDPSm_Int | |
| 139859684U, // ROUNDPSr_Int | |
| 139335405U, // ROUNDSDm_Int | |
| 138548973U, // ROUNDSDr_Int | |
| 139466486U, // ROUNDSSm_Int | |
| 138548982U, // ROUNDSSr_Int | |
| 5887U, // RSM | |
| 140515075U, // RSQRTPSm | |
| 140515075U, // RSQRTPSm_Int | |
| 139859715U, // RSQRTPSr | |
| 139859715U, // RSQRTPSr_Int | |
| 140777228U, // RSQRTSSm | |
| 140777228U, // RSQRTSSm_Int | |
| 139859724U, // RSQRTSSr | |
| 139859724U, // RSQRTSSr_Int | |
| 5909U, // SAHF | |
| 268441370U, // SAR16m1 | |
| 352327450U, // SAR16mCL | |
| 272635674U, // SAR16mi | |
| 134223642U, // SAR16r1 | |
| 218109722U, // SAR16rCL | |
| 138549018U, // SAR16ri | |
| 402659098U, // SAR32m1 | |
| 486545178U, // SAR32mCL | |
| 406853402U, // SAR32mi | |
| 134223642U, // SAR32r1 | |
| 218109722U, // SAR32rCL | |
| 138549018U, // SAR32ri | |
| 536876826U, // SAR64m1 | |
| 624957210U, // SAR64mCL | |
| 541071130U, // SAR64mi | |
| 134223642U, // SAR64r1 | |
| 222304026U, // SAR64rCL | |
| 138549018U, // SAR64ri | |
| 671094554U, // SAR8m1 | |
| 754980634U, // SAR8mCL | |
| 675288858U, // SAR8mi | |
| 134223642U, // SAR8r1 | |
| 218109722U, // SAR8rCL | |
| 138549018U, // SAR8ri | |
| 134223647U, // SBB16i16 | |
| 272635689U, // SBB16mi | |
| 272635689U, // SBB16mi8 | |
| 272635689U, // SBB16mr | |
| 138549033U, // SBB16ri | |
| 138549033U, // SBB16ri8 | |
| 138680105U, // SBB16rm | |
| 138549033U, // SBB16rr | |
| 138549033U, // SBB16rr_REV | |
| 134223662U, // SBB32i32 | |
| 406853417U, // SBB32mi | |
| 406853417U, // SBB32mi8 | |
| 406853417U, // SBB32mr | |
| 138549033U, // SBB32ri | |
| 138549033U, // SBB32ri8 | |
| 138811177U, // SBB32rm | |
| 138549033U, // SBB32rr | |
| 138549033U, // SBB32rr_REV | |
| 134223673U, // SBB64i32 | |
| 541071145U, // SBB64mi32 | |
| 541071145U, // SBB64mi8 | |
| 541071145U, // SBB64mr | |
| 138549033U, // SBB64ri32 | |
| 138549033U, // SBB64ri8 | |
| 138942249U, // SBB64rm | |
| 138549033U, // SBB64rr | |
| 138549033U, // SBB64rr_REV | |
| 134223684U, // SBB8i8 | |
| 675288873U, // SBB8mi | |
| 675288873U, // SBB8mr | |
| 138549033U, // SBB8ri | |
| 139073321U, // SBB8rm | |
| 138549033U, // SBB8rr | |
| 138549033U, // SBB8rr_REV | |
| 5966U, // SCAS16 | |
| 5966U, // SCAS32 | |
| 5971U, // SCAS64 | |
| 5966U, // SCAS8 | |
| 671094617U, // SETAEm | |
| 134223705U, // SETAEr | |
| 671094624U, // SETAm | |
| 134223712U, // SETAr | |
| 671094630U, // SETBEm | |
| 134223718U, // SETBEr | |
| 0U, // SETB_C16r | |
| 0U, // SETB_C32r | |
| 0U, // SETB_C64r | |
| 0U, // SETB_C8r | |
| 671094637U, // SETBm | |
| 134223725U, // SETBr | |
| 671094643U, // SETEm | |
| 134223731U, // SETEr | |
| 671094649U, // SETGEm | |
| 134223737U, // SETGEr | |
| 671094656U, // SETGm | |
| 134223744U, // SETGr | |
| 671094662U, // SETLEm | |
| 134223750U, // SETLEr | |
| 671094669U, // SETLm | |
| 134223757U, // SETLr | |
| 671094675U, // SETNEm | |
| 134223763U, // SETNEr | |
| 671094682U, // SETNOm | |
| 134223770U, // SETNOr | |
| 671094689U, // SETNPm | |
| 134223777U, // SETNPr | |
| 671094696U, // SETNSm | |
| 134223784U, // SETNSr | |
| 671094703U, // SETOm | |
| 134223791U, // SETOr | |
| 671094709U, // SETPm | |
| 134223797U, // SETPr | |
| 671094715U, // SETSm | |
| 134223803U, // SETSr | |
| 6081U, // SFENCE | |
| 1744836552U, // SGDTm | |
| 268441550U, // SHL16m1 | |
| 352327630U, // SHL16mCL | |
| 272635854U, // SHL16mi | |
| 134223822U, // SHL16r1 | |
| 218109902U, // SHL16rCL | |
| 138549198U, // SHL16ri | |
| 402659278U, // SHL32m1 | |
| 486545358U, // SHL32mCL | |
| 406853582U, // SHL32mi | |
| 134223822U, // SHL32r1 | |
| 218109902U, // SHL32rCL | |
| 138549198U, // SHL32ri | |
| 536877006U, // SHL64m1 | |
| 624957390U, // SHL64mCL | |
| 541071310U, // SHL64mi | |
| 134223822U, // SHL64r1 | |
| 222304206U, // SHL64rCL | |
| 138549198U, // SHL64ri | |
| 671094734U, // SHL8m1 | |
| 754980814U, // SHL8mCL | |
| 675289038U, // SHL8mi | |
| 134223822U, // SHL8r1 | |
| 218109902U, // SHL8rCL | |
| 138549198U, // SHL8ri | |
| 272635859U, // SHLD16mrCL | |
| 272635859U, // SHLD16mri8 | |
| 138549203U, // SHLD16rrCL | |
| 138549203U, // SHLD16rri8 | |
| 406853587U, // SHLD32mrCL | |
| 406853587U, // SHLD32mri8 | |
| 138549203U, // SHLD32rrCL | |
| 138549203U, // SHLD32rri8 | |
| 541071315U, // SHLD64mrCL | |
| 541071315U, // SHLD64mri8 | |
| 138549203U, // SHLD64rrCL | |
| 138549203U, // SHLD64rri8 | |
| 268441561U, // SHR16m1 | |
| 352327641U, // SHR16mCL | |
| 272635865U, // SHR16mi | |
| 134223833U, // SHR16r1 | |
| 218109913U, // SHR16rCL | |
| 138549209U, // SHR16ri | |
| 402659289U, // SHR32m1 | |
| 486545369U, // SHR32mCL | |
| 406853593U, // SHR32mi | |
| 134223833U, // SHR32r1 | |
| 218109913U, // SHR32rCL | |
| 138549209U, // SHR32ri | |
| 536877017U, // SHR64m1 | |
| 624957401U, // SHR64mCL | |
| 541071321U, // SHR64mi | |
| 134223833U, // SHR64r1 | |
| 222304217U, // SHR64rCL | |
| 138549209U, // SHR64ri | |
| 671094745U, // SHR8m1 | |
| 754980825U, // SHR8mCL | |
| 675289049U, // SHR8mi | |
| 134223833U, // SHR8r1 | |
| 218109913U, // SHR8rCL | |
| 138549209U, // SHR8ri | |
| 272635870U, // SHRD16mrCL | |
| 272635870U, // SHRD16mri8 | |
| 138549214U, // SHRD16rrCL | |
| 138549214U, // SHRD16rri8 | |
| 406853598U, // SHRD32mrCL | |
| 406853598U, // SHRD32mri8 | |
| 138549214U, // SHRD32rrCL | |
| 138549214U, // SHRD32rri8 | |
| 541071326U, // SHRD64mrCL | |
| 541071326U, // SHRD64mri8 | |
| 138549214U, // SHRD64rrCL | |
| 138549214U, // SHRD64rri8 | |
| 139204580U, // SHUFPDrmi | |
| 138549220U, // SHUFPDrri | |
| 139204588U, // SHUFPSrmi | |
| 138549228U, // SHUFPSrri | |
| 1744836596U, // SIDTm | |
| 6138U, // SIN_F | |
| 0U, // SIN_Fp32 | |
| 0U, // SIN_Fp64 | |
| 0U, // SIN_Fp80 | |
| 268441599U, // SLDT16m | |
| 134223871U, // SLDT16r | |
| 268441599U, // SLDT64m | |
| 134223871U, // SLDT64r | |
| 268441605U, // SMSW16m | |
| 134223877U, // SMSW16r | |
| 134223877U, // SMSW32r | |
| 134223877U, // SMSW64r | |
| 140515339U, // SQRTPDm | |
| 140515339U, // SQRTPDm_Int | |
| 139859979U, // SQRTPDr | |
| 139859979U, // SQRTPDr_Int | |
| 140515347U, // SQRTPSm | |
| 140515347U, // SQRTPSm_Int | |
| 139859987U, // SQRTPSr | |
| 139859987U, // SQRTPSr_Int | |
| 140646427U, // SQRTSDm | |
| 140646427U, // SQRTSDm_Int | |
| 139859995U, // SQRTSDr | |
| 139859995U, // SQRTSDr_Int | |
| 140777507U, // SQRTSSm | |
| 140777507U, // SQRTSSm_Int | |
| 139860003U, // SQRTSSr | |
| 139860003U, // SQRTSSr_Int | |
| 6187U, // SQRT_F | |
| 0U, // SQRT_Fp32 | |
| 0U, // SQRT_Fp64 | |
| 0U, // SQRT_Fp80 | |
| 6193U, // SS_PREFIX | |
| 6196U, // STC | |
| 6200U, // STD | |
| 6204U, // STI | |
| 402659392U, // STMXCSR | |
| 4610U, // STOSB | |
| 6217U, // STOSD | |
| 6223U, // STOSQ | |
| 4610U, // STOSW | |
| 6229U, // STRm | |
| 6229U, // STRr | |
| 805312602U, // ST_F32m | |
| 939530330U, // ST_F64m | |
| 805312607U, // ST_FP32m | |
| 939530335U, // ST_FP64m | |
| 2147489887U, // ST_FP80m | |
| 134223967U, // ST_FPrr | |
| 0U, // ST_Fp32m | |
| 0U, // ST_Fp64m | |
| 0U, // ST_Fp64m32 | |
| 0U, // ST_Fp80m32 | |
| 0U, // ST_Fp80m64 | |
| 0U, // ST_FpP32m | |
| 0U, // ST_FpP64m | |
| 0U, // ST_FpP64m32 | |
| 0U, // ST_FpP80m | |
| 0U, // ST_FpP80m32 | |
| 0U, // ST_FpP80m64 | |
| 134223962U, // ST_Frr | |
| 134223973U, // SUB16i16 | |
| 272636015U, // SUB16mi | |
| 272636015U, // SUB16mi8 | |
| 272636015U, // SUB16mr | |
| 138549359U, // SUB16ri | |
| 138549359U, // SUB16ri8 | |
| 138680431U, // SUB16rm | |
| 138549359U, // SUB16rr | |
| 138549359U, // SUB16rr_REV | |
| 134223988U, // SUB32i32 | |
| 406853743U, // SUB32mi | |
| 406853743U, // SUB32mi8 | |
| 406853743U, // SUB32mr | |
| 138549359U, // SUB32ri | |
| 138549359U, // SUB32ri8 | |
| 138811503U, // SUB32rm | |
| 138549359U, // SUB32rr | |
| 138549359U, // SUB32rr_REV | |
| 134223999U, // SUB64i32 | |
| 541071471U, // SUB64mi32 | |
| 541071471U, // SUB64mi8 | |
| 541071471U, // SUB64mr | |
| 138549359U, // SUB64ri32 | |
| 138549359U, // SUB64ri8 | |
| 138942575U, // SUB64rm | |
| 138549359U, // SUB64rr | |
| 138549359U, // SUB64rr_REV | |
| 134224010U, // SUB8i8 | |
| 675289199U, // SUB8mi | |
| 675289199U, // SUB8mr | |
| 138549359U, // SUB8ri | |
| 139073647U, // SUB8rm | |
| 138549359U, // SUB8rr | |
| 138549359U, // SUB8rr_REV | |
| 139204756U, // SUBPDrm | |
| 138549396U, // SUBPDrr | |
| 139204763U, // SUBPSrm | |
| 138549403U, // SUBPSrr | |
| 805312674U, // SUBR_F32m | |
| 939530402U, // SUBR_F64m | |
| 268441769U, // SUBR_FI16m | |
| 402659497U, // SUBR_FI32m | |
| 134224049U, // SUBR_FPrST0 | |
| 134224034U, // SUBR_FST0r | |
| 0U, // SUBR_Fp32m | |
| 0U, // SUBR_Fp64m | |
| 0U, // SUBR_Fp64m32 | |
| 0U, // SUBR_Fp80m32 | |
| 0U, // SUBR_Fp80m64 | |
| 0U, // SUBR_FpI16m32 | |
| 0U, // SUBR_FpI16m64 | |
| 0U, // SUBR_FpI16m80 | |
| 0U, // SUBR_FpI32m32 | |
| 0U, // SUBR_FpI32m64 | |
| 0U, // SUBR_FpI32m80 | |
| 142612642U, // SUBR_FrST0 | |
| 139335865U, // SUBSDrm | |
| 139335865U, // SUBSDrm_Int | |
| 138549433U, // SUBSDrr | |
| 138549433U, // SUBSDrr_Int | |
| 139466944U, // SUBSSrm | |
| 139466944U, // SUBSSrm_Int | |
| 138549440U, // SUBSSrr | |
| 138549440U, // SUBSSrr_Int | |
| 805312711U, // SUB_F32m | |
| 939530439U, // SUB_F64m | |
| 268441805U, // SUB_FI16m | |
| 402659533U, // SUB_FI32m | |
| 134224084U, // SUB_FPrST0 | |
| 134224071U, // SUB_FST0r | |
| 0U, // SUB_Fp32 | |
| 0U, // SUB_Fp32m | |
| 0U, // SUB_Fp64 | |
| 0U, // SUB_Fp64m | |
| 0U, // SUB_Fp64m32 | |
| 0U, // SUB_Fp80 | |
| 0U, // SUB_Fp80m32 | |
| 0U, // SUB_Fp80m64 | |
| 0U, // SUB_FpI16m32 | |
| 0U, // SUB_FpI16m64 | |
| 0U, // SUB_FpI16m80 | |
| 0U, // SUB_FpI32m32 | |
| 0U, // SUB_FpI32m64 | |
| 0U, // SUB_FpI32m80 | |
| 142612679U, // SUB_FrST0 | |
| 6363U, // SWAPGS | |
| 6370U, // SYSCALL | |
| 6378U, // SYSENTER | |
| 6387U, // SYSEXIT | |
| 6387U, // SYSEXIT64 | |
| 6395U, // SYSRET | |
| 1166019933U, // TAILJMPd | |
| 1166019933U, // TAILJMPd64 | |
| 494931293U, // TAILJMPm | |
| 629149021U, // TAILJMPm64 | |
| 0U, // TAILJMPr | |
| 226495837U, // TAILJMPr64 | |
| 1171659010U, // TCRETURNdi | |
| 1171659010U, // TCRETURNdi64 | |
| 499128578U, // TCRETURNmi | |
| 633346306U, // TCRETURNmi64 | |
| 232134914U, // TCRETURNri | |
| 232134914U, // TCRETURNri64 | |
| 134224142U, // TEST16i16 | |
| 272636185U, // TEST16mi | |
| 139860249U, // TEST16ri | |
| 139991321U, // TEST16rm | |
| 139860249U, // TEST16rr | |
| 134224159U, // TEST32i32 | |
| 406853913U, // TEST32mi | |
| 139860249U, // TEST32ri | |
| 140122393U, // TEST32rm | |
| 139860249U, // TEST32rr | |
| 134224171U, // TEST64i32 | |
| 541071641U, // TEST64mi32 | |
| 139860249U, // TEST64ri32 | |
| 140253465U, // TEST64rm | |
| 139860249U, // TEST64rr | |
| 134224183U, // TEST8i8 | |
| 675289369U, // TEST8mi | |
| 139860249U, // TEST8ri | |
| 140384537U, // TEST8rm | |
| 139860249U, // TEST8rr | |
| 6466U, // TLSCall_32 | |
| 6479U, // TLSCall_64 | |
| 503322972U, // TLS_addr32 | |
| 641735010U, // TLS_addr64 | |
| 6516U, // TRAP | |
| 6520U, // TST_F | |
| 0U, // TST_Fp32 | |
| 0U, // TST_Fp64 | |
| 0U, // TST_Fp80 | |
| 140643402U, // UCOMISDrm | |
| 139856970U, // UCOMISDrr | |
| 140774483U, // UCOMISSrm | |
| 139856979U, // UCOMISSrr | |
| 134224253U, // UCOM_FIPr | |
| 134224270U, // UCOM_FIr | |
| 6558U, // UCOM_FPPr | |
| 134224294U, // UCOM_FPr | |
| 0U, // UCOM_FpIr32 | |
| 0U, // UCOM_FpIr64 | |
| 0U, // UCOM_FpIr80 | |
| 0U, // UCOM_Fpr32 | |
| 0U, // UCOM_Fpr64 | |
| 0U, // UCOM_Fpr80 | |
| 134224302U, // UCOM_Fr | |
| 139205045U, // UNPCKHPDrm | |
| 138549685U, // UNPCKHPDrr | |
| 139205055U, // UNPCKHPSrm | |
| 138549695U, // UNPCKHPSrr | |
| 139205065U, // UNPCKLPDrm | |
| 138549705U, // UNPCKLPDrr | |
| 139205075U, // UNPCKLPSrm | |
| 138549715U, // UNPCKLPSrr | |
| 139860445U, // VADDPDYrm | |
| 139860445U, // VADDPDYrr | |
| 139860445U, // VADDPDrm | |
| 139860445U, // VADDPDrr | |
| 139860453U, // VADDPSYrm | |
| 139860453U, // VADDPSYrr | |
| 139860453U, // VADDPSrm | |
| 139860453U, // VADDPSrr | |
| 139860461U, // VADDSDrm | |
| 139860461U, // VADDSDrm_Int | |
| 139860461U, // VADDSDrr | |
| 139860461U, // VADDSDrr_Int | |
| 139860469U, // VADDSSrm | |
| 139860469U, // VADDSSrm_Int | |
| 139860469U, // VADDSSrr | |
| 139860469U, // VADDSSrr_Int | |
| 139860477U, // VADDSUBPDYrm | |
| 139860477U, // VADDSUBPDYrr | |
| 139860477U, // VADDSUBPDrm | |
| 139860477U, // VADDSUBPDrr | |
| 139860488U, // VADDSUBPSYrm | |
| 139860488U, // VADDSUBPSYrr | |
| 139860488U, // VADDSUBPSrm | |
| 139860488U, // VADDSUBPSrr | |
| 139860499U, // VAESDECLASTrm | |
| 139860499U, // VAESDECLASTrr | |
| 139860512U, // VAESDECrm | |
| 139860512U, // VAESDECrr | |
| 139860521U, // VAESENCLASTrm | |
| 139860521U, // VAESENCLASTrr | |
| 139860534U, // VAESENCrm | |
| 139860534U, // VAESENCrr | |
| 139729471U, // VAESIMCrm | |
| 139860543U, // VAESIMCrr | |
| 139729480U, // VAESKEYGENASSIST128rm | |
| 139860552U, // VAESKEYGENASSIST128rr | |
| 139860570U, // VANDNPDYrm | |
| 139860570U, // VANDNPDYrr | |
| 139860570U, // VANDNPDrm | |
| 139860570U, // VANDNPDrr | |
| 139860579U, // VANDNPSYrm | |
| 139860579U, // VANDNPSYrr | |
| 139860579U, // VANDNPSrm | |
| 139860579U, // VANDNPSrr | |
| 139860588U, // VANDPDYrm | |
| 139860588U, // VANDPDYrr | |
| 139860588U, // VANDPDrm | |
| 139860588U, // VANDPDrr | |
| 139860596U, // VANDPSYrm | |
| 139860596U, // VANDPSYrr | |
| 139860596U, // VANDPSrm | |
| 139860596U, // VANDPSrr | |
| 139860604U, // VASTART_SAVE_XMM_REGS | |
| 139860628U, // VBLENDPDYrmi | |
| 139860628U, // VBLENDPDYrri | |
| 139860628U, // VBLENDPDrmi | |
| 139860628U, // VBLENDPDrri | |
| 139860638U, // VBLENDPSYrmi | |
| 139860638U, // VBLENDPSYrri | |
| 139860638U, // VBLENDPSrmi | |
| 139860638U, // VBLENDPSrri | |
| 139860648U, // VBLENDVPDYrm | |
| 139860648U, // VBLENDVPDYrr | |
| 139860648U, // VBLENDVPDrm | |
| 139860648U, // VBLENDVPDrr | |
| 139860659U, // VBLENDVPSYrm | |
| 139860659U, // VBLENDVPSYrr | |
| 139860659U, // VBLENDVPSrm | |
| 139860659U, // VBLENDVPSrr | |
| 140516030U, // VBROADCASTF128 | |
| 140647118U, // VBROADCASTSD | |
| 140778204U, // VBROADCASTSS | |
| 140778204U, // VBROADCASTSSY | |
| 1221987420U, // VCMPPDYrmi | |
| 139860714U, // VCMPPDYrmi_alt | |
| 1356205148U, // VCMPPDYrri | |
| 139860714U, // VCMPPDYrri_alt | |
| 1221987420U, // VCMPPDrmi | |
| 139860714U, // VCMPPDrmi_alt | |
| 1356205148U, // VCMPPDrri | |
| 139860714U, // VCMPPDrri_alt | |
| 1226181724U, // VCMPPSYrmi | |
| 139860722U, // VCMPPSYrmi_alt | |
| 1360399452U, // VCMPPSYrri | |
| 139860722U, // VCMPPSYrri_alt | |
| 1226181724U, // VCMPPSrmi | |
| 139860722U, // VCMPPSrmi_alt | |
| 1360399452U, // VCMPPSrri | |
| 139860722U, // VCMPPSrri_alt | |
| 1230376028U, // VCMPSDrm | |
| 139860730U, // VCMPSDrm_alt | |
| 1364593756U, // VCMPSDrr | |
| 139860730U, // VCMPSDrr_alt | |
| 1234570332U, // VCMPSSrm | |
| 139860738U, // VCMPSSrm_alt | |
| 1368788060U, // VCMPSSrr | |
| 139860738U, // VCMPSSrr_alt | |
| 140512353U, // VCOMISDrm | |
| 139856993U, // VCOMISDrr | |
| 140512362U, // VCOMISSrm | |
| 139857002U, // VCOMISSrr | |
| 140512371U, // VCVTDQ2PDYrm | |
| 139857011U, // VCVTDQ2PDYrr | |
| 140512371U, // VCVTDQ2PDrm | |
| 139857011U, // VCVTDQ2PDrr | |
| 141167742U, // VCVTDQ2PSYrm | |
| 139857022U, // VCVTDQ2PSYrr | |
| 139725950U, // VCVTDQ2PSrm | |
| 139857022U, // VCVTDQ2PSrr | |
| 139857033U, // VCVTPD2DQXrYr | |
| 140516106U, // VCVTPD2DQXrm | |
| 139860746U, // VCVTPD2DQXrr | |
| 141040406U, // VCVTPD2DQYrm | |
| 139860758U, // VCVTPD2DQYrr | |
| 139857033U, // VCVTPD2DQrr | |
| 139857044U, // VCVTPD2PSXrYr | |
| 140516130U, // VCVTPD2PSXrm | |
| 139860770U, // VCVTPD2PSXrr | |
| 141040430U, // VCVTPD2PSYrm | |
| 139860782U, // VCVTPD2PSYrr | |
| 139857044U, // VCVTPD2PSrr | |
| 141036703U, // VCVTPS2DQYrm | |
| 139857055U, // VCVTPS2DQYrr | |
| 140512415U, // VCVTPS2DQrm | |
| 139857055U, // VCVTPS2DQrr | |
| 140512426U, // VCVTPS2PDYrm | |
| 139857066U, // VCVTPS2PDYrr | |
| 140643498U, // VCVTPS2PDrm | |
| 139857066U, // VCVTPS2PDrr | |
| 140643509U, // VCVTSD2SI64rm | |
| 139857077U, // VCVTSD2SI64rr | |
| 140643509U, // VCVTSD2SI_altrm | |
| 139857077U, // VCVTSD2SI_altrr | |
| 139857088U, // VCVTSD2SSrm | |
| 139857088U, // VCVTSD2SSrr | |
| 139857099U, // VCVTSI2SD64rm | |
| 139857099U, // VCVTSI2SD64rr | |
| 139857099U, // VCVTSI2SDLrm | |
| 139857099U, // VCVTSI2SDLrr | |
| 139857099U, // VCVTSI2SDrm | |
| 139857099U, // VCVTSI2SDrr | |
| 139857110U, // VCVTSI2SS64rm | |
| 139857110U, // VCVTSI2SS64rr | |
| 139857110U, // VCVTSI2SSrm | |
| 139857110U, // VCVTSI2SSrr | |
| 139857121U, // VCVTSS2SDrm | |
| 139857121U, // VCVTSS2SDrr | |
| 140774636U, // VCVTSS2SI64rm | |
| 139857132U, // VCVTSS2SI64rr | |
| 140774636U, // VCVTSS2SIrm | |
| 139857132U, // VCVTSS2SIrr | |
| 139857143U, // VCVTTPD2DQXrYr | |
| 140516154U, // VCVTTPD2DQXrm | |
| 139860794U, // VCVTTPD2DQXrr | |
| 141040455U, // VCVTTPD2DQYrm | |
| 139860807U, // VCVTTPD2DQYrr | |
| 139857143U, // VCVTTPD2DQrr | |
| 141036803U, // VCVTTPS2DQYrm | |
| 139857155U, // VCVTTPS2DQYrr | |
| 140512515U, // VCVTTPS2DQrm | |
| 139857155U, // VCVTTPS2DQrr | |
| 140647252U, // VCVTTSD2SI64rm | |
| 139860820U, // VCVTTSD2SI64rr | |
| 140647252U, // VCVTTSD2SIrm | |
| 139860820U, // VCVTTSD2SIrr | |
| 140774671U, // VCVTTSS2SI64rm | |
| 139857167U, // VCVTTSS2SI64rr | |
| 140774671U, // VCVTTSS2SIrm | |
| 139857167U, // VCVTTSS2SIrr | |
| 139860832U, // VDIVPDYrm | |
| 139860832U, // VDIVPDYrr | |
| 139860832U, // VDIVPDrm | |
| 139860832U, // VDIVPDrr | |
| 139860840U, // VDIVPSYrm | |
| 139860840U, // VDIVPSYrr | |
| 139860840U, // VDIVPSrm | |
| 139860840U, // VDIVPSrr | |
| 139860848U, // VDIVSDrm | |
| 139860848U, // VDIVSDrm_Int | |
| 139860848U, // VDIVSDrr | |
| 139860848U, // VDIVSDrr_Int | |
| 139860856U, // VDIVSSrm | |
| 139860856U, // VDIVSSrm_Int | |
| 139860856U, // VDIVSSrr | |
| 139860856U, // VDIVSSrr_Int | |
| 139860864U, // VDPPDrmi | |
| 139860864U, // VDPPDrri | |
| 139860871U, // VDPPSYrmi | |
| 139860871U, // VDPPSYrri | |
| 139860871U, // VDPPSrmi | |
| 139860871U, // VDPPSrri | |
| 268442510U, // VERRm | |
| 134224782U, // VERRr | |
| 268442516U, // VERWm | |
| 134224788U, // VERWr | |
| 2825657242U, // VEXTRACTF128mr | |
| 139860890U, // VEXTRACTF128rr | |
| 809507752U, // VEXTRACTPSmr | |
| 139860904U, // VEXTRACTPSrr | |
| 139860916U, // VEXTRACTPSrr64 | |
| 139860929U, // VFMADDPDr132m | |
| 139860929U, // VFMADDPDr132mY | |
| 139860929U, // VFMADDPDr132r | |
| 139860929U, // VFMADDPDr132rY | |
| 139860942U, // VFMADDPDr213m | |
| 139860942U, // VFMADDPDr213mY | |
| 139860942U, // VFMADDPDr213r | |
| 139860942U, // VFMADDPDr213rY | |
| 139860955U, // VFMADDPDr231m | |
| 139860955U, // VFMADDPDr231mY | |
| 139860955U, // VFMADDPDr231r | |
| 139860955U, // VFMADDPDr231rY | |
| 139860968U, // VFMADDPSr132m | |
| 139860968U, // VFMADDPSr132mY | |
| 139860968U, // VFMADDPSr132r | |
| 139860968U, // VFMADDPSr132rY | |
| 139860981U, // VFMADDPSr213m | |
| 139860981U, // VFMADDPSr213mY | |
| 139860981U, // VFMADDPSr213r | |
| 139860981U, // VFMADDPSr213rY | |
| 139860994U, // VFMADDPSr231m | |
| 139860994U, // VFMADDPSr231mY | |
| 139860994U, // VFMADDPSr231r | |
| 139860994U, // VFMADDPSr231rY | |
| 139861007U, // VFMADDSUBPDr132m | |
| 139861007U, // VFMADDSUBPDr132mY | |
| 139861007U, // VFMADDSUBPDr132r | |
| 139861007U, // VFMADDSUBPDr132rY | |
| 139861023U, // VFMADDSUBPDr213m | |
| 139861023U, // VFMADDSUBPDr213mY | |
| 139861023U, // VFMADDSUBPDr213r | |
| 139861023U, // VFMADDSUBPDr213rY | |
| 139861039U, // VFMADDSUBPDr231m | |
| 139861039U, // VFMADDSUBPDr231mY | |
| 139861039U, // VFMADDSUBPDr231r | |
| 139861039U, // VFMADDSUBPDr231rY | |
| 139861055U, // VFMADDSUBPSr132m | |
| 139861055U, // VFMADDSUBPSr132mY | |
| 139861055U, // VFMADDSUBPSr132r | |
| 139861055U, // VFMADDSUBPSr132rY | |
| 139861071U, // VFMADDSUBPSr213m | |
| 139861071U, // VFMADDSUBPSr213mY | |
| 139861071U, // VFMADDSUBPSr213r | |
| 139861071U, // VFMADDSUBPSr213rY | |
| 139861087U, // VFMADDSUBPSr231m | |
| 139861087U, // VFMADDSUBPSr231mY | |
| 139861087U, // VFMADDSUBPSr231r | |
| 139861087U, // VFMADDSUBPSr231rY | |
| 139861103U, // VFMSUBADDPDr132m | |
| 139861103U, // VFMSUBADDPDr132mY | |
| 139861103U, // VFMSUBADDPDr132r | |
| 139861103U, // VFMSUBADDPDr132rY | |
| 139861119U, // VFMSUBADDPDr213m | |
| 139861119U, // VFMSUBADDPDr213mY | |
| 139861119U, // VFMSUBADDPDr213r | |
| 139861119U, // VFMSUBADDPDr213rY | |
| 139861135U, // VFMSUBADDPDr231m | |
| 139861135U, // VFMSUBADDPDr231mY | |
| 139861135U, // VFMSUBADDPDr231r | |
| 139861135U, // VFMSUBADDPDr231rY | |
| 139861151U, // VFMSUBADDPSr132m | |
| 139861151U, // VFMSUBADDPSr132mY | |
| 139861151U, // VFMSUBADDPSr132r | |
| 139861151U, // VFMSUBADDPSr132rY | |
| 139861167U, // VFMSUBADDPSr213m | |
| 139861167U, // VFMSUBADDPSr213mY | |
| 139861167U, // VFMSUBADDPSr213r | |
| 139861167U, // VFMSUBADDPSr213rY | |
| 139861183U, // VFMSUBADDPSr231m | |
| 139861183U, // VFMSUBADDPSr231mY | |
| 139861183U, // VFMSUBADDPSr231r | |
| 139861183U, // VFMSUBADDPSr231rY | |
| 139861199U, // VFMSUBPDr132m | |
| 139861199U, // VFMSUBPDr132mY | |
| 139861199U, // VFMSUBPDr132r | |
| 139861199U, // VFMSUBPDr132rY | |
| 139861212U, // VFMSUBPDr213m | |
| 139861212U, // VFMSUBPDr213mY | |
| 139861212U, // VFMSUBPDr213r | |
| 139861212U, // VFMSUBPDr213rY | |
| 139861225U, // VFMSUBPDr231m | |
| 139861225U, // VFMSUBPDr231mY | |
| 139861225U, // VFMSUBPDr231r | |
| 139861225U, // VFMSUBPDr231rY | |
| 139861238U, // VFMSUBPSr132m | |
| 139861238U, // VFMSUBPSr132mY | |
| 139861238U, // VFMSUBPSr132r | |
| 139861238U, // VFMSUBPSr132rY | |
| 139861251U, // VFMSUBPSr213m | |
| 139861251U, // VFMSUBPSr213mY | |
| 139861251U, // VFMSUBPSr213r | |
| 139861251U, // VFMSUBPSr213rY | |
| 139861264U, // VFMSUBPSr231m | |
| 139861264U, // VFMSUBPSr231mY | |
| 139861264U, // VFMSUBPSr231r | |
| 139861264U, // VFMSUBPSr231rY | |
| 139861277U, // VFNMADDPDr132m | |
| 139861277U, // VFNMADDPDr132mY | |
| 139861277U, // VFNMADDPDr132r | |
| 139861277U, // VFNMADDPDr132rY | |
| 139861291U, // VFNMADDPDr213m | |
| 139861291U, // VFNMADDPDr213mY | |
| 139861291U, // VFNMADDPDr213r | |
| 139861291U, // VFNMADDPDr213rY | |
| 139861305U, // VFNMADDPDr231m | |
| 139861305U, // VFNMADDPDr231mY | |
| 139861305U, // VFNMADDPDr231r | |
| 139861305U, // VFNMADDPDr231rY | |
| 139861319U, // VFNMADDPSr132m | |
| 139861319U, // VFNMADDPSr132mY | |
| 139861319U, // VFNMADDPSr132r | |
| 139861319U, // VFNMADDPSr132rY | |
| 139861333U, // VFNMADDPSr213m | |
| 139861333U, // VFNMADDPSr213mY | |
| 139861333U, // VFNMADDPSr213r | |
| 139861333U, // VFNMADDPSr213rY | |
| 139861347U, // VFNMADDPSr231m | |
| 139861347U, // VFNMADDPSr231mY | |
| 139861347U, // VFNMADDPSr231r | |
| 139861347U, // VFNMADDPSr231rY | |
| 139861361U, // VFNMSUBPDr132m | |
| 139861361U, // VFNMSUBPDr132mY | |
| 139861361U, // VFNMSUBPDr132r | |
| 139861361U, // VFNMSUBPDr132rY | |
| 139861375U, // VFNMSUBPDr213m | |
| 139861375U, // VFNMSUBPDr213mY | |
| 139861375U, // VFNMSUBPDr213r | |
| 139861375U, // VFNMSUBPDr213rY | |
| 139861389U, // VFNMSUBPDr231m | |
| 139861389U, // VFNMSUBPDr231mY | |
| 139861389U, // VFNMSUBPDr231r | |
| 139861389U, // VFNMSUBPDr231rY | |
| 139861403U, // VFNMSUBPSr132m | |
| 139861403U, // VFNMSUBPSr132mY | |
| 139861403U, // VFNMSUBPSr132r | |
| 139861403U, // VFNMSUBPSr132rY | |
| 139861417U, // VFNMSUBPSr213m | |
| 139861417U, // VFNMSUBPSr213mY | |
| 139861417U, // VFNMSUBPSr213r | |
| 139861417U, // VFNMSUBPSr213rY | |
| 139861431U, // VFNMSUBPSr231m | |
| 139861431U, // VFNMSUBPSr231mY | |
| 139861431U, // VFNMSUBPSr231r | |
| 139861431U, // VFNMSUBPSr231rY | |
| 139860570U, // VFsANDNPDrm | |
| 139860570U, // VFsANDNPDrr | |
| 139860579U, // VFsANDNPSrm | |
| 139860579U, // VFsANDNPSrr | |
| 139860588U, // VFsANDPDrm | |
| 139860588U, // VFsANDPDrr | |
| 139860596U, // VFsANDPSrm | |
| 139860596U, // VFsANDPSrr | |
| 139861445U, // VFsORPDrm | |
| 139861445U, // VFsORPDrr | |
| 139861452U, // VFsORPSrm | |
| 139861452U, // VFsORPSrr | |
| 139861459U, // VFsXORPDrm | |
| 139861459U, // VFsXORPDrr | |
| 139861467U, // VFsXORPSrm | |
| 139861467U, // VFsXORPSrr | |
| 139861475U, // VHADDPDYrm | |
| 139861475U, // VHADDPDYrr | |
| 139861475U, // VHADDPDrm | |
| 139861475U, // VHADDPDrr | |
| 139861484U, // VHADDPSYrm | |
| 139861484U, // VHADDPSYrr | |
| 139861484U, // VHADDPSrm | |
| 139861484U, // VHADDPSrr | |
| 139861493U, // VHSUBPDYrm | |
| 139861493U, // VHSUBPDYrr | |
| 139861493U, // VHSUBPDrm | |
| 139861493U, // VHSUBPDrr | |
| 139861502U, // VHSUBPSYrm | |
| 139861502U, // VHSUBPSYrr | |
| 139861502U, // VHSUBPSrm | |
| 139861502U, // VHSUBPSrr | |
| 139861511U, // VINSERTF128rm | |
| 139861511U, // VINSERTF128rr | |
| 139861524U, // VINSERTPSrm | |
| 139861524U, // VINSERTPSrr | |
| 141172255U, // VLDDQUYrm | |
| 139730463U, // VLDDQUrm | |
| 402660903U, // VLDMXCSR | |
| 139861553U, // VMASKMOVDQU | |
| 139861553U, // VMASKMOVDQU64 | |
| 2959875646U, // VMASKMOVPDYmr | |
| 139861566U, // VMASKMOVPDYrm | |
| 2825657918U, // VMASKMOVPDmr | |
| 139861566U, // VMASKMOVPDrm | |
| 2959875658U, // VMASKMOVPSYmr | |
| 139861578U, // VMASKMOVPSYrm | |
| 2825657930U, // VMASKMOVPSmr | |
| 139861578U, // VMASKMOVPSrm | |
| 139861590U, // VMAXPDYrm | |
| 139861590U, // VMAXPDYrm_Int | |
| 139861590U, // VMAXPDYrr | |
| 139861590U, // VMAXPDYrr_Int | |
| 139861590U, // VMAXPDrm | |
| 139861590U, // VMAXPDrm_Int | |
| 139861590U, // VMAXPDrr | |
| 139861590U, // VMAXPDrr_Int | |
| 139861598U, // VMAXPSYrm | |
| 139861598U, // VMAXPSYrm_Int | |
| 139861598U, // VMAXPSYrr | |
| 139861598U, // VMAXPSYrr_Int | |
| 139861598U, // VMAXPSrm | |
| 139861598U, // VMAXPSrm_Int | |
| 139861598U, // VMAXPSrr | |
| 139861598U, // VMAXPSrr_Int | |
| 139861606U, // VMAXSDrm | |
| 139861606U, // VMAXSDrm_Int | |
| 139861606U, // VMAXSDrr | |
| 139861606U, // VMAXSDrr_Int | |
| 139861614U, // VMAXSSrm | |
| 139861614U, // VMAXSSrm_Int | |
| 139861614U, // VMAXSSrr | |
| 139861614U, // VMAXSSrr_Int | |
| 7798U, // VMCALL | |
| 536878717U, // VMCLEARm | |
| 139861638U, // VMINPDYrm | |
| 139861638U, // VMINPDYrm_Int | |
| 139861638U, // VMINPDYrr | |
| 139861638U, // VMINPDYrr_Int | |
| 139861638U, // VMINPDrm | |
| 139861638U, // VMINPDrm_Int | |
| 139861638U, // VMINPDrr | |
| 139861638U, // VMINPDrr_Int | |
| 139861646U, // VMINPSYrm | |
| 139861646U, // VMINPSYrm_Int | |
| 139861646U, // VMINPSYrr | |
| 139861646U, // VMINPSYrr_Int | |
| 139861646U, // VMINPSrm | |
| 139861646U, // VMINPSrm_Int | |
| 139861646U, // VMINPSrr | |
| 139861646U, // VMINPSrr_Int | |
| 139861654U, // VMINSDrm | |
| 139861654U, // VMINSDrm_Int | |
| 139861654U, // VMINSDrr | |
| 139861654U, // VMINSDrr_Int | |
| 139861662U, // VMINSSrm | |
| 139861662U, // VMINSSrm_Int | |
| 139861662U, // VMINSSrr | |
| 139861662U, // VMINSSrr_Int | |
| 7846U, // VMLAUNCH | |
| 2952797871U, // VMOVAPDYmr | |
| 141041327U, // VMOVAPDYrm | |
| 139861679U, // VMOVAPDYrr | |
| 2818580143U, // VMOVAPDmr | |
| 140517039U, // VMOVAPDrm | |
| 139861679U, // VMOVAPDrr | |
| 2952797880U, // VMOVAPSYmr | |
| 141041336U, // VMOVAPSYrm | |
| 139861688U, // VMOVAPSYrr | |
| 2818580152U, // VMOVAPSmr | |
| 140517048U, // VMOVAPSrm | |
| 139861688U, // VMOVAPSrr | |
| 141041345U, // VMOVDDUPYrm | |
| 139861697U, // VMOVDDUPYrr | |
| 140648129U, // VMOVDDUPrm | |
| 139861697U, // VMOVDDUPrr | |
| 140123851U, // VMOVDI2PDIrm | |
| 139861707U, // VMOVDI2PDIrr | |
| 140123851U, // VMOVDI2SSrm | |
| 139861707U, // VMOVDI2SSrr | |
| 3087015634U, // VMOVDQAYmr | |
| 141172434U, // VMOVDQAYrm | |
| 139861714U, // VMOVDQAYrr | |
| 1480597202U, // VMOVDQAmr | |
| 139730642U, // VMOVDQArm | |
| 139861714U, // VMOVDQArr | |
| 3087015643U, // VMOVDQUYmr | |
| 141172443U, // VMOVDQUYrm | |
| 139861723U, // VMOVDQUYrr | |
| 1480597211U, // VMOVDQUmr | |
| 1480597211U, // VMOVDQUmr_Int | |
| 139730651U, // VMOVDQUrm | |
| 139730651U, // VMOVDQUrm_Int | |
| 139861723U, // VMOVDQUrr | |
| 139861732U, // VMOVHLPSrr | |
| 943726318U, // VMOVHPDmr | |
| 139861742U, // VMOVHPDrm | |
| 943726327U, // VMOVHPSmr | |
| 139861751U, // VMOVHPSrm | |
| 139861760U, // VMOVLHPSrr | |
| 943726346U, // VMOVLPDmr | |
| 139861770U, // VMOVLPDrm | |
| 943726355U, // VMOVLPSmr | |
| 139861779U, // VMOVLPSrm | |
| 541073180U, // VMOVLQ128mr | |
| 139861795U, // VMOVMSKPDYr64r | |
| 139861795U, // VMOVMSKPDYrr | |
| 139861795U, // VMOVMSKPDr64r | |
| 139861795U, // VMOVMSKPDrr | |
| 139861806U, // VMOVMSKPSYr64r | |
| 139861806U, // VMOVMSKPSYrr | |
| 139861806U, // VMOVMSKPSr64r | |
| 139861806U, // VMOVMSKPSrr | |
| 139730745U, // VMOVNTDQArm | |
| 2952798020U, // VMOVNTDQY_64mr | |
| 2952798020U, // VMOVNTDQYmr | |
| 2818580292U, // VMOVNTDQ_64mr | |
| 2818580292U, // VMOVNTDQmr | |
| 2818580292U, // VMOVNTDQmr_Int | |
| 2952798030U, // VMOVNTPDYmr | |
| 2818580302U, // VMOVNTPDmr | |
| 1480597326U, // VMOVNTPDmr_Int | |
| 2952798040U, // VMOVNTPSYmr | |
| 2818580312U, // VMOVNTPSmr | |
| 1480597336U, // VMOVNTPSmr_Int | |
| 406855371U, // VMOVPDI2DImr | |
| 139861707U, // VMOVPDI2DIrr | |
| 541073180U, // VMOVPQI2QImr | |
| 140255004U, // VMOVQI2PQIrm | |
| 139861788U, // VMOVQd64rr | |
| 139861707U, // VMOVQd64rr_alt | |
| 139861788U, // VMOVQs64rr | |
| 139861788U, // VMOVQxrxr | |
| 943726434U, // VMOVSDmr | |
| 140648290U, // VMOVSDrm | |
| 139861858U, // VMOVSDrr | |
| 141041514U, // VMOVSHDUPYrm | |
| 139861866U, // VMOVSHDUPYrr | |
| 140517226U, // VMOVSHDUPrm | |
| 139861866U, // VMOVSHDUPrr | |
| 141041525U, // VMOVSLDUPYrm | |
| 139861877U, // VMOVSLDUPYrr | |
| 140517237U, // VMOVSLDUPrm | |
| 139861877U, // VMOVSLDUPrr | |
| 406855371U, // VMOVSS2DImr | |
| 139861707U, // VMOVSS2DIrr | |
| 809508736U, // VMOVSSmr | |
| 140779392U, // VMOVSSrm | |
| 139861888U, // VMOVSSrr | |
| 2952798088U, // VMOVUPDYmr | |
| 141041544U, // VMOVUPDYrm | |
| 139861896U, // VMOVUPDYrr | |
| 2818580360U, // VMOVUPDmr | |
| 2818580360U, // VMOVUPDmr_Int | |
| 140517256U, // VMOVUPDrm | |
| 140517256U, // VMOVUPDrm_Int | |
| 139861896U, // VMOVUPDrr | |
| 2952798097U, // VMOVUPSYmr | |
| 141041553U, // VMOVUPSYrm | |
| 139861905U, // VMOVUPSYrr | |
| 2818580369U, // VMOVUPSmr | |
| 2818580369U, // VMOVUPSmr_Int | |
| 140517265U, // VMOVUPSrm | |
| 140517265U, // VMOVUPSrm_Int | |
| 139861905U, // VMOVUPSrr | |
| 140123851U, // VMOVZDI2PDIrm | |
| 139861707U, // VMOVZDI2PDIrr | |
| 139730716U, // VMOVZPQILo2PQIrm | |
| 139861788U, // VMOVZPQILo2PQIrr | |
| 140255004U, // VMOVZQI2PQIrm | |
| 139861788U, // VMOVZQI2PQIrr | |
| 139861914U, // VMPSADBWrmi | |
| 139861914U, // VMPSADBWrri | |
| 536879012U, // VMPTRLDm | |
| 536879021U, // VMPTRSTm | |
| 406855606U, // VMREAD32rm | |
| 139861942U, // VMREAD32rr | |
| 541073334U, // VMREAD64rm | |
| 139861942U, // VMREAD64rr | |
| 8126U, // VMRESUME | |
| 139861959U, // VMULPDYrm | |
| 139861959U, // VMULPDYrr | |
| 139861959U, // VMULPDrm | |
| 139861959U, // VMULPDrr | |
| 139861967U, // VMULPSYrm | |
| 139861967U, // VMULPSYrr | |
| 139861967U, // VMULPSrm | |
| 139861967U, // VMULPSrr | |
| 139861975U, // VMULSDrm | |
| 139861975U, // VMULSDrm_Int | |
| 139861975U, // VMULSDrr | |
| 139861975U, // VMULSDrr_Int | |
| 139861983U, // VMULSSrm | |
| 139861983U, // VMULSSrm_Int | |
| 139861983U, // VMULSSrr | |
| 139861983U, // VMULSSrr_Int | |
| 140124135U, // VMWRITE32rm | |
| 139861991U, // VMWRITE32rr | |
| 140255207U, // VMWRITE64rm | |
| 139861991U, // VMWRITE64rr | |
| 8176U, // VMXOFF | |
| 8183U, // VMXON | |
| 139861445U, // VORPDYrm | |
| 139861445U, // VORPDYrr | |
| 139861445U, // VORPDrm | |
| 139861445U, // VORPDrr | |
| 139861452U, // VORPSYrm | |
| 139861452U, // VORPSYrr | |
| 139861452U, // VORPSrm | |
| 139861452U, // VORPSrr | |
| 139730942U, // VPABSBrm128 | |
| 140255230U, // VPABSBrm64 | |
| 139862014U, // VPABSBrr128 | |
| 139862014U, // VPABSBrr64 | |
| 139730950U, // VPABSDrm128 | |
| 140255238U, // VPABSDrm64 | |
| 139862022U, // VPABSDrr128 | |
| 139862022U, // VPABSDrr64 | |
| 139730958U, // VPABSWrm128 | |
| 140255246U, // VPABSWrm64 | |
| 139862030U, // VPABSWrr128 | |
| 139862030U, // VPABSWrr64 | |
| 139862038U, // VPACKSSDWrm | |
| 139862038U, // VPACKSSDWrr | |
| 139862049U, // VPACKSSWBrm | |
| 139862049U, // VPACKSSWBrr | |
| 139862060U, // VPACKUSDWrm | |
| 139862060U, // VPACKUSDWrr | |
| 139862071U, // VPACKUSWBrm | |
| 139862071U, // VPACKUSWBrr | |
| 139862082U, // VPADDBrm | |
| 139862082U, // VPADDBrr | |
| 139862090U, // VPADDDrm | |
| 139862090U, // VPADDDrr | |
| 139862098U, // VPADDQrm | |
| 139862098U, // VPADDQrr | |
| 139862106U, // VPADDSBrm | |
| 139862106U, // VPADDSBrr | |
| 139862115U, // VPADDSWrm | |
| 139862115U, // VPADDSWrr | |
| 139862124U, // VPADDUSBrm | |
| 139862124U, // VPADDUSBrr | |
| 139862134U, // VPADDUSWrm | |
| 139862134U, // VPADDUSWrr | |
| 139862144U, // VPADDWrm | |
| 139862144U, // VPADDWrr | |
| 139862152U, // VPALIGNR128rm | |
| 139862152U, // VPALIGNR128rr | |
| 139862152U, // VPALIGNR64rm | |
| 139862152U, // VPALIGNR64rr | |
| 139862162U, // VPANDNrm | |
| 139862162U, // VPANDNrr | |
| 139862170U, // VPANDrm | |
| 139862170U, // VPANDrr | |
| 139862177U, // VPAVGBrm | |
| 139862177U, // VPAVGBrr | |
| 139862185U, // VPAVGWrm | |
| 139862185U, // VPAVGWrr | |
| 139862193U, // VPBLENDVBrm | |
| 139862193U, // VPBLENDVBrr | |
| 139862204U, // VPBLENDWrmi | |
| 139862204U, // VPBLENDWrri | |
| 139862214U, // VPCLMULHQHQDQrm | |
| 139862214U, // VPCLMULHQHQDQrr | |
| 139862229U, // VPCLMULHQLQDQrm | |
| 139862229U, // VPCLMULHQLQDQrr | |
| 139862244U, // VPCLMULLQHQDQrm | |
| 139862244U, // VPCLMULLQHQDQrr | |
| 139862259U, // VPCLMULLQLQDQrm | |
| 139862259U, // VPCLMULLQLQDQrr | |
| 139862274U, // VPCLMULQDQrm | |
| 139862274U, // VPCLMULQDQrr | |
| 139862286U, // VPCMPEQBrm | |
| 139862286U, // VPCMPEQBrr | |
| 139862296U, // VPCMPEQDrm | |
| 139862296U, // VPCMPEQDrr | |
| 139862306U, // VPCMPEQQrm | |
| 139862306U, // VPCMPEQQrr | |
| 139862316U, // VPCMPEQWrm | |
| 139862316U, // VPCMPEQWrr | |
| 139731254U, // VPCMPESTRIArm | |
| 139862326U, // VPCMPESTRIArr | |
| 139731254U, // VPCMPESTRICrm | |
| 139862326U, // VPCMPESTRICrr | |
| 139731254U, // VPCMPESTRIOrm | |
| 139862326U, // VPCMPESTRIOrr | |
| 139731254U, // VPCMPESTRISrm | |
| 139862326U, // VPCMPESTRISrr | |
| 139731254U, // VPCMPESTRIZrm | |
| 139862326U, // VPCMPESTRIZrr | |
| 139731254U, // VPCMPESTRIrm | |
| 139862326U, // VPCMPESTRIrr | |
| 8514U, // VPCMPESTRM128MEM | |
| 8538U, // VPCMPESTRM128REG | |
| 139731314U, // VPCMPESTRM128rm | |
| 139862386U, // VPCMPESTRM128rr | |
| 139862398U, // VPCMPGTBrm | |
| 139862398U, // VPCMPGTBrr | |
| 139862408U, // VPCMPGTDrm | |
| 139862408U, // VPCMPGTDrr | |
| 139862418U, // VPCMPGTQrm | |
| 139862418U, // VPCMPGTQrr | |
| 139862428U, // VPCMPGTWrm | |
| 139862428U, // VPCMPGTWrr | |
| 139731366U, // VPCMPISTRIArm | |
| 139862438U, // VPCMPISTRIArr | |
| 139731366U, // VPCMPISTRICrm | |
| 139862438U, // VPCMPISTRICrr | |
| 139731366U, // VPCMPISTRIOrm | |
| 139862438U, // VPCMPISTRIOrr | |
| 139731366U, // VPCMPISTRISrm | |
| 139862438U, // VPCMPISTRISrr | |
| 139731366U, // VPCMPISTRIZrm | |
| 139862438U, // VPCMPISTRIZrr | |
| 139731366U, // VPCMPISTRIrm | |
| 139862438U, // VPCMPISTRIrr | |
| 8626U, // VPCMPISTRM128MEM | |
| 8650U, // VPCMPISTRM128REG | |
| 139731426U, // VPCMPISTRM128rm | |
| 139862498U, // VPCMPISTRM128rr | |
| 139862510U, // VPERM2F128rm | |
| 139862510U, // VPERM2F128rr | |
| 141042170U, // VPERMILPDYmi | |
| 139862522U, // VPERMILPDYri | |
| 139862522U, // VPERMILPDYrm | |
| 139862522U, // VPERMILPDYrr | |
| 140517882U, // VPERMILPDmi | |
| 139862522U, // VPERMILPDri | |
| 139862522U, // VPERMILPDrm | |
| 139862522U, // VPERMILPDrr | |
| 141042181U, // VPERMILPSYmi | |
| 139862533U, // VPERMILPSYri | |
| 139862533U, // VPERMILPSYrm | |
| 139862533U, // VPERMILPSYrr | |
| 140517893U, // VPERMILPSmi | |
| 139862533U, // VPERMILPSri | |
| 139862533U, // VPERMILPSrm | |
| 139862533U, // VPERMILPSrr | |
| 675291664U, // VPEXTRBmr | |
| 139862544U, // VPEXTRBrr | |
| 139862544U, // VPEXTRBrr64 | |
| 406856217U, // VPEXTRDmr | |
| 139862553U, // VPEXTRDrr | |
| 541073954U, // VPEXTRQmr | |
| 139862562U, // VPEXTRQrr | |
| 272638507U, // VPEXTRWmr | |
| 139862571U, // VPEXTRWri | |
| 139862580U, // VPHADDDrm128 | |
| 139862580U, // VPHADDDrm64 | |
| 139862580U, // VPHADDDrr128 | |
| 139862580U, // VPHADDDrr64 | |
| 139862589U, // VPHADDSWrm128 | |
| 139862589U, // VPHADDSWrm64 | |
| 139862589U, // VPHADDSWrr128 | |
| 139862589U, // VPHADDSWrr64 | |
| 139862599U, // VPHADDWrm128 | |
| 139862599U, // VPHADDWrm64 | |
| 139862599U, // VPHADDWrr128 | |
| 139862599U, // VPHADDWrr64 | |
| 139731536U, // VPHMINPOSUWrm128 | |
| 139862608U, // VPHMINPOSUWrr128 | |
| 139862621U, // VPHSUBDrm128 | |
| 139862621U, // VPHSUBDrm64 | |
| 139862621U, // VPHSUBDrr128 | |
| 139862621U, // VPHSUBDrr64 | |
| 139862630U, // VPHSUBSWrm128 | |
| 139862630U, // VPHSUBSWrm64 | |
| 139862630U, // VPHSUBSWrr128 | |
| 139862630U, // VPHSUBSWrr64 | |
| 139862640U, // VPHSUBWrm128 | |
| 139862640U, // VPHSUBWrm64 | |
| 139862640U, // VPHSUBWrr128 | |
| 139862640U, // VPHSUBWrr64 | |
| 139862649U, // VPINSRBrm | |
| 139862649U, // VPINSRBrr | |
| 139862658U, // VPINSRDrm | |
| 139862658U, // VPINSRDrr | |
| 139862667U, // VPINSRQrm | |
| 139862667U, // VPINSRQrr | |
| 139862676U, // VPINSRWrmi | |
| 139862676U, // VPINSRWrr64i | |
| 139862676U, // VPINSRWrri | |
| 139862685U, // VPMADDUBSWrm128 | |
| 139862685U, // VPMADDUBSWrm64 | |
| 139862685U, // VPMADDUBSWrr128 | |
| 139862685U, // VPMADDUBSWrr64 | |
| 139862697U, // VPMADDWDrm | |
| 139862697U, // VPMADDWDrr | |
| 139862707U, // VPMAXSBrm | |
| 139862707U, // VPMAXSBrr | |
| 139862716U, // VPMAXSDrm | |
| 139862716U, // VPMAXSDrr | |
| 139862725U, // VPMAXSWrm | |
| 139862725U, // VPMAXSWrr | |
| 139862734U, // VPMAXUBrm | |
| 139862734U, // VPMAXUBrr | |
| 139862743U, // VPMAXUDrm | |
| 139862743U, // VPMAXUDrr | |
| 139862752U, // VPMAXUWrm | |
| 139862752U, // VPMAXUWrr | |
| 139862761U, // VPMINSBrm | |
| 139862761U, // VPMINSBrr | |
| 139862770U, // VPMINSDrm | |
| 139862770U, // VPMINSDrr | |
| 139862779U, // VPMINSWrm | |
| 139862779U, // VPMINSWrr | |
| 139862788U, // VPMINUBrm | |
| 139862788U, // VPMINUBrr | |
| 139862797U, // VPMINUDrm | |
| 139862797U, // VPMINUDrr | |
| 139862806U, // VPMINUWrm | |
| 139862806U, // VPMINUWrr | |
| 139862815U, // VPMOVMSKBr64r | |
| 139862815U, // VPMOVMSKBrr | |
| 140124970U, // VPMOVSXBDrm | |
| 139862826U, // VPMOVSXBDrr | |
| 139993909U, // VPMOVSXBQrm | |
| 139862837U, // VPMOVSXBQrr | |
| 140256064U, // VPMOVSXBWrm | |
| 139862848U, // VPMOVSXBWrr | |
| 140256075U, // VPMOVSXDQrm | |
| 139862859U, // VPMOVSXDQrr | |
| 140256086U, // VPMOVSXWDrm | |
| 139862870U, // VPMOVSXWDrr | |
| 140125025U, // VPMOVSXWQrm | |
| 139862881U, // VPMOVSXWQrr | |
| 140125036U, // VPMOVZXBDrm | |
| 139862892U, // VPMOVZXBDrr | |
| 139993975U, // VPMOVZXBQrm | |
| 139862903U, // VPMOVZXBQrr | |
| 140256130U, // VPMOVZXBWrm | |
| 139862914U, // VPMOVZXBWrr | |
| 140256141U, // VPMOVZXDQrm | |
| 139862925U, // VPMOVZXDQrr | |
| 140256152U, // VPMOVZXWDrm | |
| 139862936U, // VPMOVZXWDrr | |
| 140125091U, // VPMOVZXWQrm | |
| 139862947U, // VPMOVZXWQrr | |
| 139862958U, // VPMULDQrm | |
| 139862958U, // VPMULDQrr | |
| 139862967U, // VPMULHRSWrm128 | |
| 139862967U, // VPMULHRSWrm64 | |
| 139862967U, // VPMULHRSWrr128 | |
| 139862967U, // VPMULHRSWrr64 | |
| 139862978U, // VPMULHUWrm | |
| 139862978U, // VPMULHUWrr | |
| 139862988U, // VPMULHWrm | |
| 139862988U, // VPMULHWrr | |
| 139862997U, // VPMULLDrm | |
| 139862997U, // VPMULLDrr | |
| 139863006U, // VPMULLWrm | |
| 139863006U, // VPMULLWrr | |
| 139863015U, // VPMULUDQrm | |
| 139863015U, // VPMULUDQrr | |
| 139863025U, // VPORrm | |
| 139863025U, // VPORrr | |
| 139863031U, // VPSADBWrm | |
| 139863031U, // VPSADBWrr | |
| 139863040U, // VPSHUFBrm128 | |
| 139863040U, // VPSHUFBrm64 | |
| 139863040U, // VPSHUFBrr128 | |
| 139863040U, // VPSHUFBrr64 | |
| 139731977U, // VPSHUFDmi | |
| 139863049U, // VPSHUFDri | |
| 139731986U, // VPSHUFHWmi | |
| 139863058U, // VPSHUFHWri | |
| 139731996U, // VPSHUFLWmi | |
| 139863068U, // VPSHUFLWri | |
| 139863078U, // VPSIGNBrm128 | |
| 139863078U, // VPSIGNBrm64 | |
| 139863078U, // VPSIGNBrr128 | |
| 139863078U, // VPSIGNBrr64 | |
| 139863087U, // VPSIGNDrm128 | |
| 139863087U, // VPSIGNDrm64 | |
| 139863087U, // VPSIGNDrr128 | |
| 139863087U, // VPSIGNDrr64 | |
| 139863096U, // VPSIGNWrm128 | |
| 139863096U, // VPSIGNWrm64 | |
| 139863096U, // VPSIGNWrr128 | |
| 139863096U, // VPSIGNWrr64 | |
| 139863105U, // VPSLLDQri | |
| 139863114U, // VPSLLDri | |
| 139863114U, // VPSLLDrm | |
| 139863114U, // VPSLLDrr | |
| 139863122U, // VPSLLQri | |
| 139863122U, // VPSLLQrm | |
| 139863122U, // VPSLLQrr | |
| 139863130U, // VPSLLWri | |
| 139863130U, // VPSLLWrm | |
| 139863130U, // VPSLLWrr | |
| 139863138U, // VPSRADri | |
| 139863138U, // VPSRADrm | |
| 139863138U, // VPSRADrr | |
| 139863146U, // VPSRAWri | |
| 139863146U, // VPSRAWrm | |
| 139863146U, // VPSRAWrr | |
| 139863154U, // VPSRLDQri | |
| 139863163U, // VPSRLDri | |
| 139863163U, // VPSRLDrm | |
| 139863163U, // VPSRLDrr | |
| 139863171U, // VPSRLQri | |
| 139863171U, // VPSRLQrm | |
| 139863171U, // VPSRLQrr | |
| 139863179U, // VPSRLWri | |
| 139863179U, // VPSRLWrm | |
| 139863179U, // VPSRLWrr | |
| 139863187U, // VPSUBBrm | |
| 139863187U, // VPSUBBrr | |
| 139863195U, // VPSUBDrm | |
| 139863195U, // VPSUBDrr | |
| 139863203U, // VPSUBQrm | |
| 139863203U, // VPSUBQrr | |
| 139863211U, // VPSUBSBrm | |
| 139863211U, // VPSUBSBrr | |
| 139863220U, // VPSUBSWrm | |
| 139863220U, // VPSUBSWrr | |
| 139863229U, // VPSUBUSBrm | |
| 139863229U, // VPSUBUSBrr | |
| 139863239U, // VPSUBUSWrm | |
| 139863239U, // VPSUBUSWrr | |
| 139863249U, // VPSUBWrm | |
| 139863249U, // VPSUBWrr | |
| 141173977U, // VPTESTYrm | |
| 139863257U, // VPTESTYrr | |
| 140518617U, // VPTESTrm | |
| 139863257U, // VPTESTrr | |
| 139863265U, // VPUNPCKHBWrm | |
| 139863265U, // VPUNPCKHBWrr | |
| 139863277U, // VPUNPCKHDQrm | |
| 139863277U, // VPUNPCKHDQrr | |
| 139863289U, // VPUNPCKHQDQrm | |
| 139863289U, // VPUNPCKHQDQrr | |
| 139863302U, // VPUNPCKHWDrm | |
| 139863302U, // VPUNPCKHWDrr | |
| 139863314U, // VPUNPCKLBWrm | |
| 139863314U, // VPUNPCKLBWrr | |
| 139863326U, // VPUNPCKLDQrm | |
| 139863326U, // VPUNPCKLDQrr | |
| 139863338U, // VPUNPCKLQDQrm | |
| 139863338U, // VPUNPCKLQDQrr | |
| 139863351U, // VPUNPCKLWDrm | |
| 139863351U, // VPUNPCKLWDrr | |
| 139863363U, // VPXORrm | |
| 139863363U, // VPXORrr | |
| 141043018U, // VRCPPSYm | |
| 141043018U, // VRCPPSYm_Int | |
| 139863370U, // VRCPPSYr | |
| 139863370U, // VRCPPSYr_Int | |
| 140518730U, // VRCPPSm | |
| 140518730U, // VRCPPSm_Int | |
| 139863370U, // VRCPPSr | |
| 139863370U, // VRCPPSr_Int | |
| 139863378U, // VRCPSSm | |
| 141436242U, // VRCPSSm_Int | |
| 139863378U, // VRCPSSr | |
| 141436242U, // VRCPSSr_Int | |
| 140518746U, // VROUNDPDm | |
| 141043034U, // VROUNDPDm_Int | |
| 139863386U, // VROUNDPDr | |
| 139863386U, // VROUNDPDr_Int | |
| 140518756U, // VROUNDPSm | |
| 141043044U, // VROUNDPSm_Int | |
| 139863396U, // VROUNDPSr | |
| 139863396U, // VROUNDPSr_Int | |
| 139863406U, // VROUNDSDm | |
| 139863406U, // VROUNDSDm_Int | |
| 139863406U, // VROUNDSDr | |
| 139863406U, // VROUNDSDr_Int | |
| 139863416U, // VROUNDSSm | |
| 139863416U, // VROUNDSSm_Int | |
| 139863416U, // VROUNDSSr | |
| 139863416U, // VROUNDSSr_Int | |
| 141043034U, // VROUNDYPDm | |
| 141043034U, // VROUNDYPDm_Int | |
| 139863386U, // VROUNDYPDr | |
| 139863386U, // VROUNDYPDr_Int | |
| 141043044U, // VROUNDYPSm | |
| 141043044U, // VROUNDYPSm_Int | |
| 139863396U, // VROUNDYPSr | |
| 139863396U, // VROUNDYPSr_Int | |
| 141043074U, // VRSQRTPSYm | |
| 141043074U, // VRSQRTPSYm_Int | |
| 139863426U, // VRSQRTPSYr | |
| 139863426U, // VRSQRTPSYr_Int | |
| 140518786U, // VRSQRTPSm | |
| 140518786U, // VRSQRTPSm_Int | |
| 139863426U, // VRSQRTPSr | |
| 139863426U, // VRSQRTPSr_Int | |
| 139863436U, // VRSQRTSSm | |
| 141436300U, // VRSQRTSSm_Int | |
| 139863436U, // VRSQRTSSr | |
| 141436300U, // VRSQRTSSr_Int | |
| 139208086U, // VSHUFPDYrmi | |
| 138552726U, // VSHUFPDYrri | |
| 139208086U, // VSHUFPDrmi | |
| 138552726U, // VSHUFPDrri | |
| 139863455U, // VSHUFPSYrmi | |
| 139863455U, // VSHUFPSYrri | |
| 139863455U, // VSHUFPSrmi | |
| 139863455U, // VSHUFPSrri | |
| 141043112U, // VSQRTPDYm | |
| 141043112U, // VSQRTPDYm_Int | |
| 139863464U, // VSQRTPDYr | |
| 139863464U, // VSQRTPDYr_Int | |
| 140518824U, // VSQRTPDm | |
| 140518824U, // VSQRTPDm_Int | |
| 139863464U, // VSQRTPDr | |
| 139863464U, // VSQRTPDr_Int | |
| 141043121U, // VSQRTPSYm | |
| 141043121U, // VSQRTPSYm_Int | |
| 139863473U, // VSQRTPSYr | |
| 139863473U, // VSQRTPSYr_Int | |
| 140518833U, // VSQRTPSm | |
| 140518833U, // VSQRTPSm_Int | |
| 139863473U, // VSQRTPSr | |
| 139863473U, // VSQRTPSr_Int | |
| 139863482U, // VSQRTSDm | |
| 141436346U, // VSQRTSDm_Int | |
| 139863482U, // VSQRTSDr | |
| 141436346U, // VSQRTSDr_Int | |
| 139863491U, // VSQRTSSm | |
| 141436355U, // VSQRTSSm_Int | |
| 139863491U, // VSQRTSSr | |
| 141436355U, // VSQRTSSr_Int | |
| 402662860U, // VSTMXCSR | |
| 139863510U, // VSUBPDYrm | |
| 139863510U, // VSUBPDYrr | |
| 139863510U, // VSUBPDrm | |
| 139863510U, // VSUBPDrr | |
| 139863518U, // VSUBPSYrm | |
| 139863518U, // VSUBPSYrr | |
| 139863518U, // VSUBPSrm | |
| 139863518U, // VSUBPSrr | |
| 139863526U, // VSUBSDrm | |
| 139863526U, // VSUBSDrm_Int | |
| 139863526U, // VSUBSDrr | |
| 139863526U, // VSUBSDrr_Int | |
| 139863534U, // VSUBSSrm | |
| 139863534U, // VSUBSSrm_Int | |
| 139863534U, // VSUBSSrr | |
| 139863534U, // VSUBSSrr_Int | |
| 141043190U, // VTESTPDYrm | |
| 139863542U, // VTESTPDYrr | |
| 140518902U, // VTESTPDrm | |
| 139863542U, // VTESTPDrr | |
| 141043199U, // VTESTPSYrm | |
| 139863551U, // VTESTPSYrr | |
| 140518911U, // VTESTPSrm | |
| 139863551U, // VTESTPSrr | |
| 140643611U, // VUCOMISDrm | |
| 139857179U, // VUCOMISDrr | |
| 140774693U, // VUCOMISSrm | |
| 139857189U, // VUCOMISSrr | |
| 139863560U, // VUNPCKHPDYrm | |
| 139863560U, // VUNPCKHPDYrr | |
| 139863560U, // VUNPCKHPDrm | |
| 139863560U, // VUNPCKHPDrr | |
| 139863571U, // VUNPCKHPSYrm | |
| 139863571U, // VUNPCKHPSYrr | |
| 139863571U, // VUNPCKHPSrm | |
| 139863571U, // VUNPCKHPSrr | |
| 139863582U, // VUNPCKLPDYrm | |
| 139863582U, // VUNPCKLPDYrr | |
| 139863582U, // VUNPCKLPDrm | |
| 139863582U, // VUNPCKLPDrr | |
| 139863593U, // VUNPCKLPSYrm | |
| 139863593U, // VUNPCKLPSYrr | |
| 139863593U, // VUNPCKLPSrm | |
| 139863593U, // VUNPCKLPSrr | |
| 139861459U, // VXORPDYrm | |
| 139861459U, // VXORPDYrr | |
| 139861459U, // VXORPDrm | |
| 139861459U, // VXORPDrr | |
| 139861467U, // VXORPSYrm | |
| 139861467U, // VXORPSYrr | |
| 139861467U, // VXORPSrm | |
| 139861467U, // VXORPSrr | |
| 9780U, // VZEROALL | |
| 9789U, // VZEROUPPER | |
| 0U, // V_SET0PD | |
| 0U, // V_SET0PI | |
| 0U, // V_SET0PS | |
| 0U, // V_SETALLONES | |
| 9800U, // WAIT | |
| 9805U, // WBINVD | |
| 536872022U, // WINCALL64m | |
| 1073742934U, // WINCALL64pcrel32 | |
| 134218838U, // WINCALL64r | |
| 9812U, // WRMSR | |
| 272639578U, // XADD16rm | |
| 139863642U, // XADD16rr | |
| 406857306U, // XADD32rm | |
| 139863642U, // XADD32rr | |
| 541075034U, // XADD64rm | |
| 139863642U, // XADD64rr | |
| 675292762U, // XADD8rm | |
| 139863642U, // XADD8rr | |
| 134227552U, // XCHG16ar | |
| 2281711211U, // XCHG16rm | |
| 3221235307U, // XCHG16rr | |
| 134227569U, // XCHG32ar | |
| 2415928939U, // XCHG32rm | |
| 3221235307U, // XCHG32rr | |
| 134227581U, // XCHG64ar | |
| 3355453035U, // XCHG64rm | |
| 3221235307U, // XCHG64rr | |
| 2550146667U, // XCHG8rm | |
| 3221235307U, // XCHG8rr | |
| 134227593U, // XCH_F | |
| 9871U, // XLAT | |
| 134227605U, // XOR16i16 | |
| 272639647U, // XOR16mi | |
| 272639647U, // XOR16mi8 | |
| 272639647U, // XOR16mr | |
| 138552991U, // XOR16ri | |
| 138552991U, // XOR16ri8 | |
| 138684063U, // XOR16rm | |
| 138552991U, // XOR16rr | |
| 138552991U, // XOR16rr_REV | |
| 134227620U, // XOR32i32 | |
| 406857375U, // XOR32mi | |
| 406857375U, // XOR32mi8 | |
| 406857375U, // XOR32mr | |
| 138552991U, // XOR32ri | |
| 138552991U, // XOR32ri8 | |
| 138815135U, // XOR32rm | |
| 138552991U, // XOR32rr | |
| 138552991U, // XOR32rr_REV | |
| 134227631U, // XOR64i32 | |
| 541075103U, // XOR64mi32 | |
| 541075103U, // XOR64mi8 | |
| 541075103U, // XOR64mr | |
| 138552991U, // XOR64ri32 | |
| 138552991U, // XOR64ri8 | |
| 138946207U, // XOR64rm | |
| 138552991U, // XOR64rr | |
| 138552991U, // XOR64rr_REV | |
| 134227642U, // XOR8i8 | |
| 675292831U, // XOR8mi | |
| 675292831U, // XOR8mr | |
| 138552991U, // XOR8ri | |
| 139077279U, // XOR8rm | |
| 138552991U, // XOR8rr | |
| 138552991U, // XOR8rr_REV | |
| 139201245U, // XORPDrm | |
| 138545885U, // XORPDrr | |
| 139201252U, // XORPSrm | |
| 138545892U, // XORPSrr | |
| 0U | |
| }; | |
| const char *AsmStrs = | |
| "DBG_VALUE\000fabs\000adc\t%ax, \000adc\t\000adc\t%eax, \000adc\t%rax, \000" | |
| "adc\t%al, \000add\t%ax, \000add\t\000add\t%eax, \000add\t%rax, \000add\t" | |
| "%al, \000addpd\t\000addps\t\000addsd\t\000addss\t\000addsubpd\t\000adds" | |
| "ubps\t\000fadd\t\000fiadd\t\000faddp\t\000#ADJCALLSTACKDOWN\000#ADJCALL" | |
| "STACKUP\000aesdeclast\t\000aesdec\t\000aesenclast\t\000aesenc\t\000aesi" | |
| "mc\t\000aeskeygenassist\t\000and\t%ax, \000and\t\000and\t%eax, \000and\t" | |
| "%rax, \000and\t%al, \000andnpd\t\000andnps\t\000andpd\t\000andps\t\000#" | |
| "ATOMADD6432 PSEUDO!\000#ATOMAND16 PSEUDO!\000#ATOMAND32 PSEUDO!\000#ATO" | |
| "MAND64 PSEUDO!\000#ATOMAND6432 PSEUDO!\000#ATOMAND8 PSEUDO!\000#ATOMMAX" | |
| "16 PSEUDO!\000#ATOMMAX32 PSEUDO!\000#ATOMMAX64 PSEUDO!\000#ATOMMIN16 PS" | |
| "EUDO!\000#ATOMMIN32 PSEUDO!\000#ATOMMIN64 PSEUDO!\000#ATOMNAND16 PSEUDO" | |
| "!\000#ATOMNAND32 PSEUDO!\000#ATOMNAND64 PSEUDO!\000#ATOMNAND6432 PSEUDO" | |
| "!\000#ATOMNAND8 PSEUDO!\000#ATOMOR16 PSEUDO!\000#ATOMOR32 PSEUDO!\000#A" | |
| "TOMOR64 PSEUDO!\000#ATOMOR6432 PSEUDO!\000#ATOMOR8 PSEUDO!\000#ATOMSUB6" | |
| "432 PSEUDO!\000#ATOMSWAP6432 PSEUDO!\000#ATOMUMAX16 PSEUDO!\000#ATOMUMA" | |
| "X32 PSEUDO!\000#ATOMUMAX64 PSEUDO!\000#ATOMUMIN16 PSEUDO!\000#ATOMUMIN3" | |
| "2 PSEUDO!\000#ATOMUMIN64 PSEUDO!\000#ATOMXOR16 PSEUDO!\000#ATOMXOR32 PS" | |
| "EUDO!\000#ATOMXOR64 PSEUDO!\000#ATOMXOR6432 PSEUDO!\000#ATOMXOR8 PSEUDO" | |
| "!\000blendpd\t\000blendps\t\000blendvpd\t\000blendvps\t\000bsf\t\000bsr" | |
| "\t\000bswap\t\000bt\t\000btc\t\000btr\t\000bts\t\000call\t\000callw\t\000" | |
| "cbw\000cdq\000cdqe\000fchs\000clc\000cld\000clflush\t\000cli\000clts\000" | |
| "cmc\000cmova\t\000cmovae\t\000cmovb\t\000cmovbe\t\000fcmovbe\t%ST(0), \000" | |
| "fcmovb\t%ST(0), \000cmove\t\000fcmove\t%ST(0), \000cmovg\t\000cmovge\t\000" | |
| "cmovl\t\000cmovle\t\000fcmovnbe\t%ST(0), \000fcmovnb\t%ST(0), \000cmovn" | |
| "e\t\000fcmovne\t%ST(0), \000cmovno\t\000cmovnp\t\000fcmovnu\t%ST(0), \000" | |
| "cmovns\t\000cmovo\t\000cmovp\t\000fcmovu\t %ST(0), \000cmovs\t\000#CMOV" | |
| "_FR32 PSEUDO!\000#CMOV_FR64 PSEUDO!\000#CMOV_GR16* PSEUDO!\000#CMOV_GR3" | |
| "2* PSEUDO!\000#CMOV_GR8 PSEUDO!\000#CMOV_RFP32 PSEUDO!\000#CMOV_RFP64 P" | |
| "SEUDO!\000#CMOV_RFP80 PSEUDO!\000#CMOV_V1I64 PSEUDO!\000#CMOV_V2F64 PSE" | |
| "UDO!\000#CMOV_V2I64 PSEUDO!\000#CMOV_V4F32 PSEUDO!\000cmp\t%ax, \000cmp" | |
| "\t\000cmp\t%eax, \000cmp\t%rax, \000cmp\t%al, \000cmp\000cmppd\t\000cmp" | |
| "ps\t\000cmps\000cmpsq\000cmpsd\t\000cmpss\t\000cmpxchg16b\t\000cmpxchg\t" | |
| "\000cmpxchg8b\t\000comisd\t\000comiss\t\000fcomp\t\000fcomip\t%ST(0), \000" | |
| "fcomi\t%ST(0), \000fcom\t\000fcos\000cpuid\000cqo\000crc32 \t\000cs\000" | |
| "cvtdq2pd\t\000cvtdq2ps\t\000cvtpd2dq\t\000cvtpd2ps\t\000cvtps2dq\t\000c" | |
| "vtps2pd\t\000cvtsd2si\000cvtsd2ss\t\000cvtsi2sd\t\000cvtsi2ss\t\000cvts" | |
| "s2sd\t\000cvtss2si\t\000cvttps2dq\t\000cvttsd2si\t\000cvttss2si\t\000cw" | |
| "d\000cwde\000dec\t\000div\t\000divpd\t\000divps\t\000fdivr\t\000fidivr\t" | |
| "\000fdivrp\t\000divsd\t\000divss\t\000fdiv\t\000fidiv\t\000fdivp\t\000d" | |
| "ppd\t\000dpps\t\000ds\000ret\t#eh_return, addr: \000enter\t\000es\000ex" | |
| "tractps\t\000f2xm1\000lcall\t\000ljmp\t\000fbld\t\000fbstp\t\000fcompp\000" | |
| "fdecstp\000ffree\t\000ficom\t\000ficomp\t\000fincstp\000fldcw\t\000flde" | |
| "nv\t\000fldl2e\000fldl2t\000fldlg2\000fldln2\000fldpi\000fnclex\000fnin" | |
| "it\000fnop\000fnstcw\t\000fnstsw %ax\000fnstsw\t\000##FP32_TO_INT16_IN_" | |
| "MEM PSEUDO!\000##FP32_TO_INT32_IN_MEM PSEUDO!\000##FP32_TO_INT64_IN_MEM" | |
| " PSEUDO!\000##FP64_TO_INT16_IN_MEM PSEUDO!\000##FP64_TO_INT32_IN_MEM PS" | |
| "EUDO!\000##FP64_TO_INT64_IN_MEM PSEUDO!\000##FP80_TO_INT16_IN_MEM PSEUD" | |
| "O!\000##FP80_TO_INT32_IN_MEM PSEUDO!\000##FP80_TO_INT64_IN_MEM PSEUDO!\000" | |
| "fpatan\000fprem\000fprem1\000fptan\000frndint\000frstor\t\000fnsave\t\000" | |
| "fscale\000fsincos\000fnstenv\t\000movl\t%fs:\000fs\000fxam\000fxrstor\t" | |
| "\000fxsave\t\000fxtract\000fyl2x\000fyl2xp1\000movapd\t\000movaps\t\000" | |
| "orpd\t\000orps\t\000xorpd\t\000xorps\t\000movl\t%gs:\000gs\000haddpd\t\000" | |
| "haddps\t\000hlt\000hsubpd\t\000hsubps\t\000idiv\t\000fild\t\000imul\t\000" | |
| "ins\000in\t%AX, \000in\t%AX, %DX\000in\t%EAX, \000in\t%EAX, %DX\000in\t" | |
| "%AL, \000in\t%AL, %DX\000inc\t\000insertps\t\000int\t\000int3\000into\000" | |
| "invd\000invept\000invlpg\t\000invvpid\000iret\000fisttp\t\000fist\t\000" | |
| "fistp\t\000cvtpd2pi\t\000cvtpi2pd\t\000cvtpi2ps\t\000cvtps2pi\t\000cvts" | |
| "d2si\t\000cvttpd2dq\t\000cvttpd2pi\t\000cvttps2pi\t\000#MEMBARRIER\000l" | |
| "ock\n\tor\t(%esp), \000lock\n\tor\t(%rsp), \000ucomisd\t\000ucomiss\t\000" | |
| "vcmp\000vcomisd\t\000vcomiss\t\000vcvtdq2pd\t\000vcvtdq2ps\t\000vcvtpd2" | |
| "dq\t\000vcvtpd2ps\t\000vcvtps2dq\t\000vcvtps2pd\t\000vcvtsd2si\t\000vcv" | |
| "tsd2ss\t\000vcvtsi2sd\t\000vcvtsi2ss\t\000vcvtss2sd\t\000vcvtss2si\t\000" | |
| "vcvttpd2dq\t\000vcvttps2dq\t\000vcvttss2si\t\000vucomisd\t\000vucomiss\t" | |
| "\000jae\t\000ja\t\000jbe\t\000jb\t\000jcxz\t\000je\t\000jge\t\000jg\t\000" | |
| "jle\t\000jl\t\000jmp\t\000jne\t\000jno\t\000jnp\t\000jns\t\000jo\t\000j" | |
| "p\t\000js\t\000lahf\000lar\t\000lock\n\tcmpxchg\t\000lock\n\tcmpxchgq\t" | |
| "\000lock\n\tcmpxchg8b\t\000lddqu\t\000ldmxcsr\t\000lds\t\000fldz\000fld" | |
| "1\000fld\t\000lea\t\000leave\000les\t\000lfence\000lfs\t\000lgdt\t\000l" | |
| "gs\t\000lidt\t\000lldt\t\000lmsw\t\000lock\n\tadd\t\000lock\n\tdec\t\000" | |
| "lock\n\tinc\t\000lock\000lock\n\tsub\t\000lodsb\000lodsd\000lodsq\000lo" | |
| "dsw\000loop\t\000loope\t\000loopne\t\000lret\000lret\t\000lsl\t\000lss\t" | |
| "\000ltr\t\000lock\n\txadd\t\000maskmovdqu\t\000maxpd\t\000maxps\t\000ma" | |
| "xsd\t\000maxss\t\000mfence\000# dynamic stack allocation\000minpd\t\000" | |
| "minps\t\000minsd\t\000minss\t\000emms\000femms\000maskmovq\t\000movd\t\000" | |
| "movdq2q\t\000movntq\t\000movq2dq\t\000movq\t\000packssdw\t\000packsswb\t" | |
| "\000packuswb\t\000paddb\t\000paddd\t\000paddq\t\000paddsb\t\000paddsw\t" | |
| "\000paddusb\t\000paddusw\t\000paddw\t\000pandn\t\000pand\t\000pavgb\t\000" | |
| "pavgw\t\000pcmpeqb\t\000pcmpeqd\t\000pcmpeqw\t\000pcmpgtb\t\000pcmpgtd\t" | |
| "\000pcmpgtw\t\000pextrw\t\000pinsrw\t\000pmaddwd\t\000pmaxsw\t\000pmaxu" | |
| "b\t\000pminsw\t\000pminub\t\000pmovmskb\t\000pmulhuw\t\000pmulhw\t\000p" | |
| "mullw\t\000pmuludq\t\000por\t\000psadbw\t\000pshufw\t\000pslld\t\000psl" | |
| "lq\t\000psllw\t\000psrad\t\000psraw\t\000psrld\t\000psrlq\t\000psrlw\t\000" | |
| "psubb\t\000psubd\t\000psubq\t\000psubsb\t\000psubsw\t\000psubusb\t\000p" | |
| "subusw\t\000psubw\t\000punpckhbw\t\000punpckhdq\t\000punpckhwd\t\000pun" | |
| "pcklbw\t\000punpckldq\t\000punpcklwd\t\000pxor\t\000monitor\000mov\t\000" | |
| "mov\t%ax, \000mov\t%eax, \000movq\t%fs:\000movq\t%gs:\000mov\t%rax, \000" | |
| "movabs\t\000mov\t%al, \000movddup\t\000movdqa\t\000movdqu\t\000movhlps\t" | |
| "\000movhpd\t\000movhps\t\000movlhps\t\000movlpd\t\000movlps\t\000movmsk" | |
| "pd\t\000movmskps\t\000movntdqa\t\000movntdq\t\000movnti\t\000movntpd\t\000" | |
| "movntps\t\000\000movsd\000movsd\t\000movshdup\t\000movsldup\t\000movsq\000" | |
| "movss\t\000movsx\t\000movsxd\t\000movupd\t\000movups\t\000movzx\t\000mp" | |
| "sadbw\t\000mul\t\000mulpd\t\000mulps\t\000mulsd\t\000mulss\t\000fmul\t\000" | |
| "fimul\t\000fmulp\t\000mwait\000neg\t\000nop\000nop\t\000not\t\000or\t%a" | |
| "x, \000or\t\000or\t%eax, \000or\t%rax, \000or\t%al, \000out\t\000out\t%" | |
| "DX, %AX\000out\t%DX, %EAX\000out\t%DX, %AL\000outsb\000outsd\000outsw\000" | |
| "pabsb\t\000pabsd\t\000pabsw\t\000packusdw\t\000palignr\t\000pause\000pb" | |
| "lendvb\t\000pblendw\t\000pcmpeqq\t\000pcmpestri\t\000#PCMPESTRM128rm PS" | |
| "EUDO\000#PCMPESTRM128rr PSEUDO\000pcmpestrm\t\000pcmpgtq\t\000pcmpistri" | |
| "\t\000#PCMPISTRM128rm PSEUDO\000#PCMPISTRM128rr PSEUDO\000pcmpistrm\t\000" | |
| "pextrb\t\000pextrd\t\000pextrq\t\000phaddd\t\000phaddsw\t\000phaddw\t\000" | |
| "phminposuw\t\000phsubd\t\000phsubsw\t\000phsubw\t\000pinsrb\t\000pinsrd" | |
| "\t\000pinsrq\t\000pmaddubsw\t\000pmaxsb\t\000pmaxsd\t\000pmaxud\t\000pm" | |
| "axuw\t\000pminsb\t\000pminsd\t\000pminud\t\000pminuw\t\000pmovsxbd\t\000" | |
| "pmovsxbq\t\000pmovsxbw\t\000pmovsxdq\t\000pmovsxwd\t\000pmovsxwq\t\000p" | |
| "movzxbd\t\000pmovzxbq\t\000pmovzxbw\t\000pmovzxdq\t\000pmovzxwd\t\000pm" | |
| "ovzxwq\t\000pmuldq\t\000pmulhrsw\t\000pmulld\t\000pop\t\000popa\000popc" | |
| "nt\t\000popf\000popfd\000popfq\000pop\t%fs\000pop\t%gs\000prefetchnta\t" | |
| "\000prefetcht0\t\000prefetcht1\t\000prefetcht2\t\000pshufb\t\000pshufd\t" | |
| "\000pshufhw\t\000pshuflw\t\000psignb\t\000psignd\t\000psignw\t\000pslld" | |
| "q\t\000psrldq\t\000ptest \t\000punpckhqdq\t\000punpcklqdq\t\000push\t\000" | |
| "pusha\000pushf\000pushfd\000pushfq\000push\t%fs\000push\t%gs\000rcl\t\000" | |
| "rcpps\t\000rcpss\t\000rcr\t\000rdmsr\000rdpmc\000rdtsc\000rdtscp\000rep" | |
| "ne\000rep movsb\000rep movsd\000rep movsq\000rep movsw\000rep\000rep st" | |
| "osb\000rep stosd\000rep stosq\000rep stosw\000ret\000ret\t\000rol\t\000" | |
| "ror\t\000roundpd\t\000roundps\t\000roundsd\t\000roundss\t\000rsm\000rsq" | |
| "rtps\t\000rsqrtss\t\000sahf\000sar\t\000sbb\t%ax, \000sbb\t\000sbb\t%ea" | |
| "x, \000sbb\t%rax, \000sbb\t%al, \000scas\000scasq\000setae\t\000seta\t\000" | |
| "setbe\t\000setb\t\000sete\t\000setge\t\000setg\t\000setle\t\000setl\t\000" | |
| "setne\t\000setno\t\000setnp\t\000setns\t\000seto\t\000setp\t\000sets\t\000" | |
| "sfence\000sgdt\t\000shl\t\000shld\t\000shr\t\000shrd\t\000shufpd\t\000s" | |
| "hufps\t\000sidt\t\000fsin\000sldt\t\000smsw\t\000sqrtpd\t\000sqrtps\t\000" | |
| "sqrtsd\t\000sqrtss\t\000fsqrt\000ss\000stc\000std\000sti\000stmxcsr\t\000" | |
| "stosd\000stosq\000str\t\000fst\t\000fstp\t\000sub\t%ax, \000sub\t\000su" | |
| "b\t%eax, \000sub\t%rax, \000sub\t%al, \000subpd\t\000subps\t\000fsubr\t" | |
| "\000fisubr\t\000fsubrp\t\000subsd\t\000subss\t\000fsub\t\000fisub\t\000" | |
| "fsubp\t\000swapgs\000syscall\000sysenter\000sysexit\000sysret\000#TC_RE" | |
| "TURN \000test\t%ax, \000test\t\000test\t%eax, \000test\t%rax, \000test\t" | |
| "%al, \000# TLSCall_32\000# TLSCall_64\000leal\t\000.byte\t0x66; leaq\t\000" | |
| "ud2\000ftst\000fucomip\t%ST(0), \000fucomi\t%ST(0), \000fucompp\000fuco" | |
| "mp\t\000fucom\t\000unpckhpd\t\000unpckhps\t\000unpcklpd\t\000unpcklps\t" | |
| "\000vaddpd\t\000vaddps\t\000vaddsd\t\000vaddss\t\000vaddsubpd\t\000vadd" | |
| "subps\t\000vaesdeclast\t\000vaesdec\t\000vaesenclast\t\000vaesenc\t\000" | |
| "vaesimc\t\000vaeskeygenassist\t\000vandnpd\t\000vandnps\t\000vandpd\t\000" | |
| "vandps\t\000#VASTART_SAVE_XMM_REGS \000vblendpd\t\000vblendps\t\000vble" | |
| "ndvpd\t\000vblendvps\t\000vbroadcastf128\t\000vbroadcastsd\t\000vbroadc" | |
| "astss\t\000vcmppd\t\000vcmpps\t\000vcmpsd\t\000vcmpss\t\000vcvtpd2dqx\t" | |
| "\000vcvtpd2dqy\t\000vcvtpd2psx\t\000vcvtpd2psy\t\000vcvttpd2dqx\t\000vc" | |
| "vttpd2dqy\t\000vcvttsd2si\t\000vdivpd\t\000vdivps\t\000vdivsd\t\000vdiv" | |
| "ss\t\000vdppd\t\000vdpps\t\000verr\t\000verw\t\000vextractf128\t\000vex" | |
| "tractps\t\000vextractps \t\000vfmadd132pd\t\000vfmadd213pd\t\000vfmadd2" | |
| "31pd\t\000vfmadd132ps\t\000vfmadd213ps\t\000vfmadd231ps\t\000vfmaddsub1" | |
| "32pd\t\000vfmaddsub213pd\t\000vfmaddsub231pd\t\000vfmaddsub132ps\t\000v" | |
| "fmaddsub213ps\t\000vfmaddsub231ps\t\000vfmsubadd132pd\t\000vfmsubadd213" | |
| "pd\t\000vfmsubadd231pd\t\000vfmsubadd132ps\t\000vfmsubadd213ps\t\000vfm" | |
| "subadd231ps\t\000vfmsub132pd\t\000vfmsub213pd\t\000vfmsub231pd\t\000vfm" | |
| "sub132ps\t\000vfmsub213ps\t\000vfmsub231ps\t\000vfnmadd132pd\t\000vfnma" | |
| "dd213pd\t\000vfnmadd231pd\t\000vfnmadd132ps\t\000vfnmadd213ps\t\000vfnm" | |
| "add231ps\t\000vfnmsub132pd\t\000vfnmsub213pd\t\000vfnmsub231pd\t\000vfn" | |
| "msub132ps\t\000vfnmsub213ps\t\000vfnmsub231ps\t\000vorpd\t\000vorps\t\000" | |
| "vxorpd\t\000vxorps\t\000vhaddpd\t\000vhaddps\t\000vhsubpd\t\000vhsubps\t" | |
| "\000vinsertf128\t\000vinsertps\t\000vlddqu\t\000vldmxcsr\t\000vmaskmovd" | |
| "qu\t\000vmaskmovpd\t\000vmaskmovps\t\000vmaxpd\t\000vmaxps\t\000vmaxsd\t" | |
| "\000vmaxss\t\000vmcall\000vmclear\t\000vminpd\t\000vminps\t\000vminsd\t" | |
| "\000vminss\t\000vmlaunch\000vmovapd\t\000vmovaps\t\000vmovddup\t\000vmo" | |
| "vd\t\000vmovdqa\t\000vmovdqu\t\000vmovhlps\t\000vmovhpd\t\000vmovhps\t\000" | |
| "vmovlhps\t\000vmovlpd\t\000vmovlps\t\000vmovq\t\000vmovmskpd\t\000vmovm" | |
| "skps\t\000vmovntdqa\t\000vmovntdq\t\000vmovntpd\t\000vmovntps\t\000vmov" | |
| "sd\t\000vmovshdup\t\000vmovsldup\t\000vmovss\t\000vmovupd\t\000vmovups\t" | |
| "\000vmpsadbw\t\000vmptrld\t\000vmptrst\t\000vmread\t\000vmresume\000vmu" | |
| "lpd\t\000vmulps\t\000vmulsd\t\000vmulss\t\000vmwrite\t\000vmxoff\000vmx" | |
| "on\t\000vpabsb\t\000vpabsd\t\000vpabsw\t\000vpackssdw\t\000vpacksswb\t\000" | |
| "vpackusdw\t\000vpackuswb\t\000vpaddb\t\000vpaddd\t\000vpaddq\t\000vpadd" | |
| "sb\t\000vpaddsw\t\000vpaddusb\t\000vpaddusw\t\000vpaddw\t\000vpalignr\t" | |
| "\000vpandn\t\000vpand\t\000vpavgb\t\000vpavgw\t\000vpblendvb\t\000vpble" | |
| "ndw\t\000vpclmulhqhqdq\t\000vpclmulhqlqdq\t\000vpclmullqhqdq\t\000vpclm" | |
| "ullqlqdq\t\000vpclmulqdq\t\000vpcmpeqb\t\000vpcmpeqd\t\000vpcmpeqq\t\000" | |
| "vpcmpeqw\t\000vpcmpestri\t\000#VPCMPESTRM128rm PSEUDO\000#VPCMPESTRM128" | |
| "rr PSEUDO\000vpcmpestrm\t\000vpcmpgtb\t\000vpcmpgtd\t\000vpcmpgtq\t\000" | |
| "vpcmpgtw\t\000vpcmpistri\t\000#VPCMPISTRM128rm PSEUDO\000#VPCMPISTRM128" | |
| "rr PSEUDO\000vpcmpistrm\t\000vperm2f128\t\000vpermilpd\t\000vpermilps\t" | |
| "\000vpextrb\t\000vpextrd\t\000vpextrq\t\000vpextrw\t\000vphaddd\t\000vp" | |
| "haddsw\t\000vphaddw\t\000vphminposuw\t\000vphsubd\t\000vphsubsw\t\000vp" | |
| "hsubw\t\000vpinsrb\t\000vpinsrd\t\000vpinsrq\t\000vpinsrw\t\000vpmaddub" | |
| "sw\t\000vpmaddwd\t\000vpmaxsb\t\000vpmaxsd\t\000vpmaxsw\t\000vpmaxub\t\000" | |
| "vpmaxud\t\000vpmaxuw\t\000vpminsb\t\000vpminsd\t\000vpminsw\t\000vpminu" | |
| "b\t\000vpminud\t\000vpminuw\t\000vpmovmskb\t\000vpmovsxbd\t\000vpmovsxb" | |
| "q\t\000vpmovsxbw\t\000vpmovsxdq\t\000vpmovsxwd\t\000vpmovsxwq\t\000vpmo" | |
| "vzxbd\t\000vpmovzxbq\t\000vpmovzxbw\t\000vpmovzxdq\t\000vpmovzxwd\t\000" | |
| "vpmovzxwq\t\000vpmuldq\t\000vpmulhrsw\t\000vpmulhuw\t\000vpmulhw\t\000v" | |
| "pmulld\t\000vpmullw\t\000vpmuludq\t\000vpor\t\000vpsadbw\t\000vpshufb\t" | |
| "\000vpshufd\t\000vpshufhw\t\000vpshuflw\t\000vpsignb\t\000vpsignd\t\000" | |
| "vpsignw\t\000vpslldq\t\000vpslld\t\000vpsllq\t\000vpsllw\t\000vpsrad\t\000" | |
| "vpsraw\t\000vpsrldq\t\000vpsrld\t\000vpsrlq\t\000vpsrlw\t\000vpsubb\t\000" | |
| "vpsubd\t\000vpsubq\t\000vpsubsb\t\000vpsubsw\t\000vpsubusb\t\000vpsubus" | |
| "w\t\000vpsubw\t\000vptest\t\000vpunpckhbw\t\000vpunpckhdq\t\000vpunpckh" | |
| "qdq\t\000vpunpckhwd\t\000vpunpcklbw\t\000vpunpckldq\t\000vpunpcklqdq\t\000" | |
| "vpunpcklwd\t\000vpxor\t\000vrcpps\t\000vrcpss\t\000vroundpd\t\000vround" | |
| "ps\t\000vroundsd\t\000vroundss\t\000vrsqrtps\t\000vrsqrtss\t\000vshufpd" | |
| "\t\000vshufps\t\000vsqrtpd\t\000vsqrtps\t\000vsqrtsd\t\000vsqrtss\t\000" | |
| "vstmxcsr\t\000vsubpd\t\000vsubps\t\000vsubsd\t\000vsubss\t\000vtestpd\t" | |
| "\000vtestps\t\000vunpckhpd\t\000vunpckhps\t\000vunpcklpd\t\000vunpcklps" | |
| "\t\000vzeroall\000vzeroupper\000wait\000wbinvd\000wrmsr\000xadd\t\000xc" | |
| "hg\t%ax, \000xchg\t\000xchg\t%eax, \000xchg\t%rax, \000fxch\t\000xlatb\000" | |
| "xor\t%ax, \000xor\t\000xor\t%eax, \000xor\t%rax, \000xor\t%al, \000"; | |
| O << "\t"; | |
| // Emit the opcode for the instruction. | |
| unsigned Bits = OpInfo[MI->getOpcode()]; | |
| assert(Bits != 0 && "Cannot print this instruction."); | |
| O << AsmStrs+(Bits & 16383)-1; | |
| // Fragment 0 encoded into 5 bits for 26 unique commands. | |
| switch ((Bits >> 27) & 31) { | |
| default: // unreachable. | |
| case 0: | |
| // DBG_VALUE, ABS_F, ADJCALLSTACKDOWN32, ADJCALLSTACKDOWN64, ADJCALLSTACK... | |
| return; | |
| break; | |
| case 1: | |
| // ADC16i16, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16rr_REV, ADC32i32, ... | |
| printOperand(MI, 0, O); | |
| break; | |
| case 2: | |
| // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, ADD_FI16m, AND... | |
| printi16mem(MI, 0, O); | |
| break; | |
| case 3: | |
| // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, ADD_FI32m, AND... | |
| printi32mem(MI, 0, O); | |
| break; | |
| case 4: | |
| // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,... | |
| printi64mem(MI, 0, O); | |
| break; | |
| case 5: | |
| // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CLFLUSH, CMP8mi, CMP8m... | |
| printi8mem(MI, 0, O); | |
| break; | |
| case 6: | |
| // ADD_F32m, DIVR_F32m, DIV_F32m, EXTRACTPSmr, FBLDm, FBSTPm, FCOM32m, FC... | |
| printf32mem(MI, 0, O); | |
| break; | |
| case 7: | |
| // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MOVHPDmr, M... | |
| printf64mem(MI, 0, O); | |
| break; | |
| case 8: | |
| // CALL64pcrel32, CALLpcrel16, CALLpcrel32, JAE_1, JAE_4, JA_1, JA_4, JBE... | |
| print_pcrel_imm(MI, 0, O); | |
| break; | |
| case 9: | |
| // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm, Int_VC... | |
| printSSECC(MI, 7, O); | |
| break; | |
| case 10: | |
| // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr, Int_VC... | |
| printSSECC(MI, 3, O); | |
| break; | |
| case 11: | |
| // CMPXCHG16B, MOVDQAmr, MOVDQUmr, MOVDQUmr_Int, MOVNTPDmr_Int, MOVNTPSmr... | |
| printi128mem(MI, 0, O); | |
| break; | |
| case 12: | |
| // CRC32m16, CRC32m32, CRC32m8, CRC32r16, CRC32r32, CRC32r8, CRC64m64, CR... | |
| printOperand(MI, 1, O); | |
| O << ", "; | |
| break; | |
| case 13: | |
| // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR... | |
| printopaquemem(MI, 0, O); | |
| return; | |
| break; | |
| case 14: | |
| // FS_MOV32rm, GS_MOV32rm | |
| printi32mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 15: | |
| // LCMPXCHG64 | |
| printOperand(MI, 5, O); | |
| O << ','; | |
| printi64mem(MI, 0, O); | |
| return; | |
| break; | |
| case 16: | |
| // LD_F80m, ST_FP80m | |
| printf80mem(MI, 0, O); | |
| return; | |
| break; | |
| case 17: | |
| // LXADD16, XCHG16rm | |
| printi16mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| return; | |
| break; | |
| case 18: | |
| // LXADD32, XCHG32rm | |
| printi32mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| return; | |
| break; | |
| case 19: | |
| // LXADD8, XCHG8rm | |
| printi8mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| return; | |
| break; | |
| case 20: | |
| // MOV64FSrm, MOV64GSrm | |
| printi64mem(MI, 1, O); | |
| O << ", "; | |
| printOperand(MI, 0, O); | |
| return; | |
| break; | |
| case 21: | |
| // MOVAPDmr, MOVAPSmr, MOVNTDQ_64mr, MOVNTDQmr, MOVNTDQmr_Int, MOVNTPDmr,... | |
| printf128mem(MI, 0, O); | |
| O << ", "; | |
| printOperand(MI, 5, O); | |
| break; | |
| case 22: | |
| // VMASKMOVPDYmr, VMASKMOVPSYmr, VMOVAPDYmr, VMOVAPSYmr, VMOVNTDQY_64mr, ... | |
| printf256mem(MI, 0, O); | |
| O << ", "; | |
| printOperand(MI, 5, O); | |
| break; | |
| case 23: | |
| // VMOVDQAYmr, VMOVDQUYmr | |
| printi256mem(MI, 0, O); | |
| O << ", "; | |
| printOperand(MI, 5, O); | |
| return; | |
| break; | |
| case 24: | |
| // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr | |
| printOperand(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| return; | |
| break; | |
| case 25: | |
| // XCHG64rm | |
| printi64mem(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 1, O); | |
| return; | |
| break; | |
| } | |
| // Fragment 1 encoded into 5 bits for 26 unique commands. | |
| switch ((Bits >> 22) & 31) { | |
| default: // unreachable. | |
| case 0: | |
| // ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i32, ADD64i32, AD... | |
| return; | |
| break; | |
| case 1: | |
| // ADC16mi, ADC16mi8, ADC16mr, ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16... | |
| O << ", "; | |
| break; | |
| case 2: | |
| // ADD_FrST0, DIVR_FrST0, DIV_FrST0, MUL_FrST0, SUBR_FrST0, SUB_FrST0 | |
| O << ", %ST(0)"; | |
| return; | |
| break; | |
| case 3: | |
| // CMPPDrmi, CMPPDrri, VCMPPDYrmi, VCMPPDYrri, VCMPPDrmi, VCMPPDrri | |
| O << "pd\t"; | |
| printOperand(MI, 0, O); | |
| O << ", "; | |
| break; | |
| case 4: | |
| // CMPPSrmi, CMPPSrri, VCMPPSYrmi, VCMPPSYrri, VCMPPSrmi, VCMPPSrri | |
| O << "ps\t"; | |
| printOperand(MI, 0, O); | |
| O << ", "; | |
| break; | |
| case 5: | |
| // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr, Int_VCMPSDrm, Int_VCMPSDrr... | |
| O << "sd\t"; | |
| printOperand(MI, 0, O); | |
| O << ", "; | |
| break; | |
| case 6: | |
| // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr, Int_VCMPSSrm, Int_VCMPSSrr... | |
| O << "ss\t"; | |
| printOperand(MI, 0, O); | |
| O << ", "; | |
| break; | |
| case 7: | |
| // CRC32m16 | |
| printi16mem(MI, 2, O); | |
| return; | |
| break; | |
| case 8: | |
| // CRC32m32 | |
| printi32mem(MI, 2, O); | |
| return; | |
| break; | |
| case 9: | |
| // CRC32m8, CRC64m8 | |
| printi8mem(MI, 2, O); | |
| return; | |
| break; | |
| case 10: | |
| // CRC32r16, CRC32r32, CRC32r8, CRC64r64, CRC64r8 | |
| printOperand(MI, 2, O); | |
| return; | |
| break; | |
| case 11: | |
| // CRC64m64, LXADD64 | |
| printi64mem(MI, 2, O); | |
| return; | |
| break; | |
| case 12: | |
| // MOV16ao16 | |
| O << ", %ax"; | |
| return; | |
| break; | |
| case 13: | |
| // MOV32ao32 | |
| O << ", %eax"; | |
| return; | |
| break; | |
| case 14: | |
| // MOV64ao64, MOV64ao8 | |
| O << ", %rax"; | |
| return; | |
| break; | |
| case 15: | |
| // MOV8ao8 | |
| O << ", %al"; | |
| return; | |
| break; | |
| case 16: | |
| // OUT16ir | |
| O << ", %AX"; | |
| return; | |
| break; | |
| case 17: | |
| // OUT32ir | |
| O << ", %EAX"; | |
| return; | |
| break; | |
| case 18: | |
| // OUT8ir | |
| O << ", %AL"; | |
| return; | |
| break; | |
| case 19: | |
| // RCL16m1, RCL16r1, RCL32m1, RCL32r1, RCL64m1, RCL64r1, RCL8m1, RCL8r1, ... | |
| O << ", 1"; | |
| return; | |
| break; | |
| case 20: | |
| // RCL16mCL, RCL16rCL, RCL32mCL, RCL32rCL, RCL64mCL, RCL64rCL, RCL8mCL, R... | |
| O << ", CL"; | |
| return; | |
| break; | |
| case 21: | |
| // ROL64mCL, ROL64rCL, ROR64mCL, ROR64rCL, SAR64mCL, SAR64rCL, SHL64mCL, ... | |
| O << ", %CL"; | |
| return; | |
| break; | |
| case 22: | |
| // TAILJMPd, TAILJMPd64, TAILJMPm, TAILJMPm64, TAILJMPr64 | |
| O << " # TAILCALL"; | |
| return; | |
| break; | |
| case 23: | |
| // TCRETURNdi, TCRETURNdi64, TCRETURNmi, TCRETURNmi64, TCRETURNri, TCRETU... | |
| O << ' '; | |
| break; | |
| case 24: | |
| // TLS_addr32 | |
| O << ", %eax; call\t___tls_get_addr@PLT"; | |
| return; | |
| break; | |
| case 25: | |
| // TLS_addr64 | |
| O << "(%rip), %rdi; .word\t0x6666; rex64; call\t__tls_get_addr@PLT"; | |
| return; | |
| break; | |
| } | |
| // Fragment 2 encoded into 5 bits for 24 unique commands. | |
| switch ((Bits >> 17) & 31) { | |
| default: // unreachable. | |
| case 0: | |
| // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC... | |
| printOperand(MI, 5, O); | |
| break; | |
| case 1: | |
| // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A... | |
| printOperand(MI, 2, O); | |
| break; | |
| case 2: | |
| // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r... | |
| printi16mem(MI, 2, O); | |
| break; | |
| case 3: | |
| // ADC32rm, ADD32rm, AND32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm, CMOVBE32r... | |
| printi32mem(MI, 2, O); | |
| break; | |
| case 4: | |
| // ADC64rm, ADD64rm, AND64rm, CMOVA64rm, CMOVAE64rm, CMOVB64rm, CMOVBE64r... | |
| printi64mem(MI, 2, O); | |
| break; | |
| case 5: | |
| // ADC8rm, ADD8rm, AND8rm, OR8rm, PINSRBrm, SBB8rm, SUB8rm, XOR8rm | |
| printi8mem(MI, 2, O); | |
| break; | |
| case 6: | |
| // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,... | |
| printf128mem(MI, 2, O); | |
| break; | |
| case 7: | |
| // ADDSDrm, ADDSDrm_Int, CMPSDrm, CMPSDrm_alt, DIVSDrm, DIVSDrm_Int, Int_... | |
| printf64mem(MI, 2, O); | |
| break; | |
| case 8: | |
| // ADDSSrm, ADDSSrm_Int, CMPSSrm, CMPSSrm_alt, DIVSSrm, DIVSSrm_Int, INSE... | |
| printf32mem(MI, 2, O); | |
| break; | |
| case 9: | |
| // AESDECLASTrm, AESDECrm, AESENCLASTrm, AESENCrm, BLENDPDrmi, BLENDPSrmi... | |
| printi128mem(MI, 2, O); | |
| break; | |
| case 10: | |
| // AESIMCrm, AESKEYGENASSIST128rm, CVTDQ2PSrm, Int_CVTDQ2PSrm, Int_VCVTDQ... | |
| printi128mem(MI, 1, O); | |
| break; | |
| case 11: | |
| // AESIMCrr, AESKEYGENASSIST128rr, BSF16rr, BSF32rr, BSF64rr, BSR16rr, BS... | |
| printOperand(MI, 1, O); | |
| break; | |
| case 12: | |
| // BSF16rm, BSR16rm, CMP16rm, IMUL16rmi, IMUL16rmi8, LAR16rm, LAR32rm, LA... | |
| printi16mem(MI, 1, O); | |
| break; | |
| case 13: | |
| // BSF32rm, BSR32rm, CMP32rm, CVTSI2SDrm, CVTSI2SSrm, IMUL32rmi, IMUL32rm... | |
| printi32mem(MI, 1, O); | |
| break; | |
| case 14: | |
| // BSF64rm, BSR64rm, CMP64rm, CVTSI2SD64rm, CVTSI2SS64rm, IMUL64rmi32, IM... | |
| printi64mem(MI, 1, O); | |
| break; | |
| case 15: | |
| // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8W, MOVSX32rm8, MOVSX64rm8, MOV... | |
| printi8mem(MI, 1, O); | |
| break; | |
| case 16: | |
| // COMISDrm, COMISSrm, CVTDQ2PDrm, CVTPD2DQrm, CVTPD2PSrm, CVTPS2DQrm, CV... | |
| printf128mem(MI, 1, O); | |
| break; | |
| case 17: | |
| // CVTPS2PDrm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTSD2SIrm, Int_CVTPS2PDrm, In... | |
| printf64mem(MI, 1, O); | |
| return; | |
| break; | |
| case 18: | |
| // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_... | |
| printf32mem(MI, 1, O); | |
| return; | |
| break; | |
| case 19: | |
| // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm... | |
| printopaquemem(MI, 1, O); | |
| return; | |
| break; | |
| case 20: | |
| // ROUNDPDm_Int, ROUNDPSm_Int, VCVTPD2DQYrm, VCVTPD2PSYrm, VCVTPS2DQYrm, ... | |
| printf256mem(MI, 1, O); | |
| break; | |
| case 21: | |
| // VCVTDQ2PSYrm, VLDDQUYrm, VMOVDQAYrm, VMOVDQUYrm, VPTESTYrm | |
| printi256mem(MI, 1, O); | |
| return; | |
| break; | |
| case 22: | |
| // VEXTRACTF128mr, VMASKMOVPDYmr, VMASKMOVPDmr, VMASKMOVPSYmr, VMASKMOVPS... | |
| printOperand(MI, 6, O); | |
| return; | |
| break; | |
| case 23: | |
| // VRCPSSm_Int, VRCPSSr_Int, VRSQRTSSm_Int, VRSQRTSSr_Int, VSQRTSDm_Int, ... | |
| printOperand(MI, 0, O); | |
| O << ", "; | |
| break; | |
| } | |
| switch (MI->getOpcode()) { | |
| case X86::ADC16mi: | |
| case X86::ADC16mi8: | |
| case X86::ADC16mr: | |
| case X86::ADC16ri: | |
| case X86::ADC16ri8: | |
| case X86::ADC16rm: | |
| case X86::ADC16rr: | |
| case X86::ADC16rr_REV: | |
| case X86::ADC32mi: | |
| case X86::ADC32mi8: | |
| case X86::ADC32mr: | |
| case X86::ADC32ri: | |
| case X86::ADC32ri8: | |
| case X86::ADC32rm: | |
| case X86::ADC32rr: | |
| case X86::ADC32rr_REV: | |
| case X86::ADC64mi32: | |
| case X86::ADC64mi8: | |
| case X86::ADC64mr: | |
| case X86::ADC64ri32: | |
| case X86::ADC64ri8: | |
| case X86::ADC64rm: | |
| case X86::ADC64rr: | |
| case X86::ADC64rr_REV: | |
| case X86::ADC8mi: | |
| case X86::ADC8mr: | |
| case X86::ADC8ri: | |
| case X86::ADC8rm: | |
| case X86::ADC8rr: | |
| case X86::ADC8rr_REV: | |
| case X86::ADD16mi: | |
| case X86::ADD16mi8: | |
| case X86::ADD16mr: | |
| case X86::ADD16ri: | |
| case X86::ADD16ri8: | |
| case X86::ADD16rm: | |
| case X86::ADD16rr: | |
| case X86::ADD16rr_alt: | |
| case X86::ADD32mi: | |
| case X86::ADD32mi8: | |
| case X86::ADD32mr: | |
| case X86::ADD32ri: | |
| case X86::ADD32ri8: | |
| case X86::ADD32rm: | |
| case X86::ADD32rr: | |
| case X86::ADD32rr_alt: | |
| case X86::ADD64mi32: | |
| case X86::ADD64mi8: | |
| case X86::ADD64mr: | |
| case X86::ADD64ri32: | |
| case X86::ADD64ri8: | |
| case X86::ADD64rm: | |
| case X86::ADD64rr: | |
| case X86::ADD64rr_alt: | |
| case X86::ADD8mi: | |
| case X86::ADD8mr: | |
| case X86::ADD8ri: | |
| case X86::ADD8rm: | |
| case X86::ADD8rr: | |
| case X86::ADD8rr_alt: | |
| case X86::ADDPDrm: | |
| case X86::ADDPDrr: | |
| case X86::ADDPSrm: | |
| case X86::ADDPSrr: | |
| case X86::ADDSDrm: | |
| case X86::ADDSDrm_Int: | |
| case X86::ADDSDrr: | |
| case X86::ADDSDrr_Int: | |
| case X86::ADDSSrm: | |
| case X86::ADDSSrm_Int: | |
| case X86::ADDSSrr: | |
| case X86::ADDSSrr_Int: | |
| case X86::ADDSUBPDrm: | |
| case X86::ADDSUBPDrr: | |
| case X86::ADDSUBPSrm: | |
| case X86::ADDSUBPSrr: | |
| case X86::AESDECLASTrm: | |
| case X86::AESDECLASTrr: | |
| case X86::AESDECrm: | |
| case X86::AESDECrr: | |
| case X86::AESENCLASTrm: | |
| case X86::AESENCLASTrr: | |
| case X86::AESENCrm: | |
| case X86::AESENCrr: | |
| case X86::AESIMCrm: | |
| case X86::AESIMCrr: | |
| case X86::AND16mi: | |
| case X86::AND16mi8: | |
| case X86::AND16mr: | |
| case X86::AND16ri: | |
| case X86::AND16ri8: | |
| case X86::AND16rm: | |
| case X86::AND16rr: | |
| case X86::AND16rr_REV: | |
| case X86::AND32mi: | |
| case X86::AND32mi8: | |
| case X86::AND32mr: | |
| case X86::AND32ri: | |
| case X86::AND32ri8: | |
| case X86::AND32rm: | |
| case X86::AND32rr: | |
| case X86::AND32rr_REV: | |
| case X86::AND64mi32: | |
| case X86::AND64mi8: | |
| case X86::AND64mr: | |
| case X86::AND64ri32: | |
| case X86::AND64ri8: | |
| case X86::AND64rm: | |
| case X86::AND64rr: | |
| case X86::AND64rr_REV: | |
| case X86::AND8mi: | |
| case X86::AND8mr: | |
| case X86::AND8ri: | |
| case X86::AND8rm: | |
| case X86::AND8rr: | |
| case X86::AND8rr_REV: | |
| case X86::ANDNPDrm: | |
| case X86::ANDNPDrr: | |
| case X86::ANDNPSrm: | |
| case X86::ANDNPSrr: | |
| case X86::ANDPDrm: | |
| case X86::ANDPDrr: | |
| case X86::ANDPSrm: | |
| case X86::ANDPSrr: | |
| case X86::BSF16rm: | |
| case X86::BSF16rr: | |
| case X86::BSF32rm: | |
| case X86::BSF32rr: | |
| case X86::BSF64rm: | |
| case X86::BSF64rr: | |
| case X86::BSR16rm: | |
| case X86::BSR16rr: | |
| case X86::BSR32rm: | |
| case X86::BSR32rr: | |
| case X86::BSR64rm: | |
| case X86::BSR64rr: | |
| case X86::BT16mi8: | |
| case X86::BT16mr: | |
| case X86::BT16ri8: | |
| case X86::BT16rr: | |
| case X86::BT32mi8: | |
| case X86::BT32mr: | |
| case X86::BT32ri8: | |
| case X86::BT32rr: | |
| case X86::BT64mi8: | |
| case X86::BT64mr: | |
| case X86::BT64ri8: | |
| case X86::BT64rr: | |
| case X86::BTC16mi8: | |
| case X86::BTC16mr: | |
| case X86::BTC16ri8: | |
| case X86::BTC16rr: | |
| case X86::BTC32mi8: | |
| case X86::BTC32mr: | |
| case X86::BTC32ri8: | |
| case X86::BTC32rr: | |
| case X86::BTC64mi8: | |
| case X86::BTC64mr: | |
| case X86::BTC64ri8: | |
| case X86::BTC64rr: | |
| case X86::BTR16mi8: | |
| case X86::BTR16mr: | |
| case X86::BTR16ri8: | |
| case X86::BTR16rr: | |
| case X86::BTR32mi8: | |
| case X86::BTR32mr: | |
| case X86::BTR32ri8: | |
| case X86::BTR32rr: | |
| case X86::BTR64mi8: | |
| case X86::BTR64mr: | |
| case X86::BTR64ri8: | |
| case X86::BTR64rr: | |
| case X86::BTS16mi8: | |
| case X86::BTS16mr: | |
| case X86::BTS16ri8: | |
| case X86::BTS16rr: | |
| case X86::BTS32mi8: | |
| case X86::BTS32mr: | |
| case X86::BTS32ri8: | |
| case X86::BTS32rr: | |
| case X86::BTS64mi8: | |
| case X86::BTS64mr: | |
| case X86::BTS64ri8: | |
| case X86::BTS64rr: | |
| case X86::CMOVA16rm: | |
| case X86::CMOVA16rr: | |
| case X86::CMOVA32rm: | |
| case X86::CMOVA32rr: | |
| case X86::CMOVA64rm: | |
| case X86::CMOVA64rr: | |
| case X86::CMOVAE16rm: | |
| case X86::CMOVAE16rr: | |
| case X86::CMOVAE32rm: | |
| case X86::CMOVAE32rr: | |
| case X86::CMOVAE64rm: | |
| case X86::CMOVAE64rr: | |
| case X86::CMOVB16rm: | |
| case X86::CMOVB16rr: | |
| case X86::CMOVB32rm: | |
| case X86::CMOVB32rr: | |
| case X86::CMOVB64rm: | |
| case X86::CMOVB64rr: | |
| case X86::CMOVBE16rm: | |
| case X86::CMOVBE16rr: | |
| case X86::CMOVBE32rm: | |
| case X86::CMOVBE32rr: | |
| case X86::CMOVBE64rm: | |
| case X86::CMOVBE64rr: | |
| case X86::CMOVE16rm: | |
| case X86::CMOVE16rr: | |
| case X86::CMOVE32rm: | |
| case X86::CMOVE32rr: | |
| case X86::CMOVE64rm: | |
| case X86::CMOVE64rr: | |
| case X86::CMOVG16rm: | |
| case X86::CMOVG16rr: | |
| case X86::CMOVG32rm: | |
| case X86::CMOVG32rr: | |
| case X86::CMOVG64rm: | |
| case X86::CMOVG64rr: | |
| case X86::CMOVGE16rm: | |
| case X86::CMOVGE16rr: | |
| case X86::CMOVGE32rm: | |
| case X86::CMOVGE32rr: | |
| case X86::CMOVGE64rm: | |
| case X86::CMOVGE64rr: | |
| case X86::CMOVL16rm: | |
| case X86::CMOVL16rr: | |
| case X86::CMOVL32rm: | |
| case X86::CMOVL32rr: | |
| case X86::CMOVL64rm: | |
| case X86::CMOVL64rr: | |
| case X86::CMOVLE16rm: | |
| case X86::CMOVLE16rr: | |
| case X86::CMOVLE32rm: | |
| case X86::CMOVLE32rr: | |
| case X86::CMOVLE64rm: | |
| case X86::CMOVLE64rr: | |
| case X86::CMOVNE16rm: | |
| case X86::CMOVNE16rr: | |
| case X86::CMOVNE32rm: | |
| case X86::CMOVNE32rr: | |
| case X86::CMOVNE64rm: | |
| case X86::CMOVNE64rr: | |
| case X86::CMOVNO16rm: | |
| case X86::CMOVNO16rr: | |
| case X86::CMOVNO32rm: | |
| case X86::CMOVNO32rr: | |
| case X86::CMOVNO64rm: | |
| case X86::CMOVNO64rr: | |
| case X86::CMOVNP16rm: | |
| case X86::CMOVNP16rr: | |
| case X86::CMOVNP32rm: | |
| case X86::CMOVNP32rr: | |
| case X86::CMOVNP64rm: | |
| case X86::CMOVNP64rr: | |
| case X86::CMOVNS16rm: | |
| case X86::CMOVNS16rr: | |
| case X86::CMOVNS32rm: | |
| case X86::CMOVNS32rr: | |
| case X86::CMOVNS64rm: | |
| case X86::CMOVNS64rr: | |
| case X86::CMOVO16rm: | |
| case X86::CMOVO16rr: | |
| case X86::CMOVO32rm: | |
| case X86::CMOVO32rr: | |
| case X86::CMOVO64rm: | |
| case X86::CMOVO64rr: | |
| case X86::CMOVP16rm: | |
| case X86::CMOVP16rr: | |
| case X86::CMOVP32rm: | |
| case X86::CMOVP32rr: | |
| case X86::CMOVP64rm: | |
| case X86::CMOVP64rr: | |
| case X86::CMOVS16rm: | |
| case X86::CMOVS16rr: | |
| case X86::CMOVS32rm: | |
| case X86::CMOVS32rr: | |
| case X86::CMOVS64rm: | |
| case X86::CMOVS64rr: | |
| case X86::CMP16mi: | |
| case X86::CMP16mi8: | |
| case X86::CMP16mr: | |
| case X86::CMP16ri: | |
| case X86::CMP16ri8: | |
| case X86::CMP16rm: | |
| case X86::CMP16rr: | |
| case X86::CMP16rr_alt: | |
| case X86::CMP32mi: | |
| case X86::CMP32mi8: | |
| case X86::CMP32mr: | |
| case X86::CMP32ri: | |
| case X86::CMP32ri8: | |
| case X86::CMP32rm: | |
| case X86::CMP32rr: | |
| case X86::CMP32rr_alt: | |
| case X86::CMP64mi32: | |
| case X86::CMP64mi8: | |
| case X86::CMP64mr: | |
| case X86::CMP64mrmrr: | |
| case X86::CMP64ri32: | |
| case X86::CMP64ri8: | |
| case X86::CMP64rm: | |
| case X86::CMP64rr: | |
| case X86::CMP8mi: | |
| case X86::CMP8mr: | |
| case X86::CMP8ri: | |
| case X86::CMP8rm: | |
| case X86::CMP8rr: | |
| case X86::CMP8rr_alt: | |
| case X86::CMPPDrmi: | |
| case X86::CMPPDrri: | |
| case X86::CMPPSrmi: | |
| case X86::CMPPSrri: | |
| case X86::CMPSDrm: | |
| case X86::CMPSDrr: | |
| case X86::CMPSSrm: | |
| case X86::CMPSSrr: | |
| case X86::CMPXCHG16rm: | |
| case X86::CMPXCHG16rr: | |
| case X86::CMPXCHG32rm: | |
| case X86::CMPXCHG32rr: | |
| case X86::CMPXCHG64rm: | |
| case X86::CMPXCHG64rr: | |
| case X86::CMPXCHG8rm: | |
| case X86::CMPXCHG8rr: | |
| case X86::COMISDrm: | |
| case X86::COMISDrr: | |
| case X86::COMISSrm: | |
| case X86::COMISSrr: | |
| case X86::CVTDQ2PDrm: | |
| case X86::CVTDQ2PDrr: | |
| case X86::CVTDQ2PSrm: | |
| case X86::CVTDQ2PSrr: | |
| case X86::CVTPD2DQrm: | |
| case X86::CVTPD2DQrr: | |
| case X86::CVTPD2PSrm: | |
| case X86::CVTPD2PSrr: | |
| case X86::CVTPS2DQrm: | |
| case X86::CVTPS2DQrr: | |
| case X86::CVTPS2PDrr: | |
| case X86::CVTSD2SSrr: | |
| case X86::CVTSI2SD64rm: | |
| case X86::CVTSI2SD64rr: | |
| case X86::CVTSI2SDrm: | |
| case X86::CVTSI2SDrr: | |
| case X86::CVTSI2SS64rm: | |
| case X86::CVTSI2SS64rr: | |
| case X86::CVTSI2SSrm: | |
| case X86::CVTSI2SSrr: | |
| case X86::CVTSS2SDrr: | |
| case X86::CVTSS2SI64rr: | |
| case X86::CVTSS2SIrr: | |
| case X86::CVTTPS2DQrm: | |
| case X86::CVTTPS2DQrr: | |
| case X86::CVTTSD2SI64rr: | |
| case X86::CVTTSD2SIrr: | |
| case X86::CVTTSS2SI64rr: | |
| case X86::CVTTSS2SIrr: | |
| case X86::DIVPDrm: | |
| case X86::DIVPDrr: | |
| case X86::DIVPSrm: | |
| case X86::DIVPSrr: | |
| case X86::DIVSDrm: | |
| case X86::DIVSDrm_Int: | |
| case X86::DIVSDrr: | |
| case X86::DIVSDrr_Int: | |
| case X86::DIVSSrm: | |
| case X86::DIVSSrm_Int: | |
| case X86::DIVSSrr: | |
| case X86::DIVSSrr_Int: | |
| case X86::ENTER: | |
| case X86::FARCALL16i: | |
| case X86::FARCALL32i: | |
| case X86::FARJMP16i: | |
| case X86::FARJMP32i: | |
| case X86::FsANDNPDrm: | |
| case X86::FsANDNPDrr: | |
| case X86::FsANDNPSrm: | |
| case X86::FsANDNPSrr: | |
| case X86::FsANDPDrm: | |
| case X86::FsANDPDrr: | |
| case X86::FsANDPSrm: | |
| case X86::FsANDPSrr: | |
| case X86::FsMOVAPDrm: | |
| case X86::FsMOVAPDrr: | |
| case X86::FsMOVAPSrm: | |
| case X86::FsMOVAPSrr: | |
| case X86::FsORPDrm: | |
| case X86::FsORPDrr: | |
| case X86::FsORPSrm: | |
| case X86::FsORPSrr: | |
| case X86::FsXORPDrm: | |
| case X86::FsXORPDrr: | |
| case X86::FsXORPSrm: | |
| case X86::FsXORPSrr: | |
| case X86::HADDPDrm: | |
| case X86::HADDPDrr: | |
| case X86::HADDPSrm: | |
| case X86::HADDPSrr: | |
| case X86::HSUBPDrm: | |
| case X86::HSUBPDrr: | |
| case X86::HSUBPSrm: | |
| case X86::HSUBPSrr: | |
| case X86::IMUL16rm: | |
| case X86::IMUL16rr: | |
| case X86::IMUL32rm: | |
| case X86::IMUL32rr: | |
| case X86::IMUL64rm: | |
| case X86::IMUL64rr: | |
| case X86::Int_CMPSDrm: | |
| case X86::Int_CMPSDrr: | |
| case X86::Int_CMPSSrm: | |
| case X86::Int_CMPSSrr: | |
| case X86::Int_COMISDrm: | |
| case X86::Int_COMISDrr: | |
| case X86::Int_COMISSrm: | |
| case X86::Int_COMISSrr: | |
| case X86::Int_CVTDQ2PDrm: | |
| case X86::Int_CVTDQ2PDrr: | |
| case X86::Int_CVTDQ2PSrm: | |
| case X86::Int_CVTDQ2PSrr: | |
| case X86::Int_CVTPD2DQrm: | |
| case X86::Int_CVTPD2DQrr: | |
| case X86::Int_CVTPD2PIrm: | |
| case X86::Int_CVTPD2PIrr: | |
| case X86::Int_CVTPD2PSrm: | |
| case X86::Int_CVTPD2PSrr: | |
| case X86::Int_CVTPI2PDrm: | |
| case X86::Int_CVTPI2PDrr: | |
| case X86::Int_CVTPI2PSrm: | |
| case X86::Int_CVTPI2PSrr: | |
| case X86::Int_CVTPS2DQrm: | |
| case X86::Int_CVTPS2DQrr: | |
| case X86::Int_CVTPS2PDrr: | |
| case X86::Int_CVTPS2PIrr: | |
| case X86::Int_CVTSD2SI64rm: | |
| case X86::Int_CVTSD2SI64rr: | |
| case X86::Int_CVTSD2SIrm: | |
| case X86::Int_CVTSD2SIrr: | |
| case X86::Int_CVTSD2SSrm: | |
| case X86::Int_CVTSD2SSrr: | |
| case X86::Int_CVTSI2SD64rm: | |
| case X86::Int_CVTSI2SD64rr: | |
| case X86::Int_CVTSI2SDrm: | |
| case X86::Int_CVTSI2SDrr: | |
| case X86::Int_CVTSI2SS64rm: | |
| case X86::Int_CVTSI2SS64rr: | |
| case X86::Int_CVTSI2SSrm: | |
| case X86::Int_CVTSI2SSrr: | |
| case X86::Int_CVTSS2SDrm: | |
| case X86::Int_CVTSS2SDrr: | |
| case X86::Int_CVTSS2SI64rr: | |
| case X86::Int_CVTSS2SIrr: | |
| case X86::Int_CVTTPD2DQrm: | |
| case X86::Int_CVTTPD2DQrr: | |
| case X86::Int_CVTTPD2PIrm: | |
| case X86::Int_CVTTPD2PIrr: | |
| case X86::Int_CVTTPS2DQrm: | |
| case X86::Int_CVTTPS2DQrr: | |
| case X86::Int_CVTTPS2PIrr: | |
| case X86::Int_CVTTSD2SI64rm: | |
| case X86::Int_CVTTSD2SI64rr: | |
| case X86::Int_CVTTSD2SIrm: | |
| case X86::Int_CVTTSD2SIrr: | |
| case X86::Int_CVTTSS2SI64rr: | |
| case X86::Int_CVTTSS2SIrr: | |
| case X86::Int_UCOMISDrm: | |
| case X86::Int_UCOMISDrr: | |
| case X86::Int_UCOMISSrm: | |
| case X86::Int_UCOMISSrr: | |
| case X86::Int_VCOMISDrm: | |
| case X86::Int_VCOMISDrr: | |
| case X86::Int_VCOMISSrm: | |
| case X86::Int_VCOMISSrr: | |
| case X86::Int_VCVTDQ2PDrm: | |
| case X86::Int_VCVTDQ2PDrr: | |
| case X86::Int_VCVTDQ2PSrm: | |
| case X86::Int_VCVTDQ2PSrr: | |
| case X86::Int_VCVTPD2DQrm: | |
| case X86::Int_VCVTPD2DQrr: | |
| case X86::Int_VCVTPD2PSrm: | |
| case X86::Int_VCVTPD2PSrr: | |
| case X86::Int_VCVTPS2DQrm: | |
| case X86::Int_VCVTPS2DQrr: | |
| case X86::Int_VCVTPS2PDrr: | |
| case X86::Int_VCVTSD2SI64rm: | |
| case X86::Int_VCVTSD2SI64rr: | |
| case X86::Int_VCVTSD2SIrm: | |
| case X86::Int_VCVTSD2SIrr: | |
| case X86::Int_VCVTSS2SI64rr: | |
| case X86::Int_VCVTSS2SIrr: | |
| case X86::Int_VCVTTPD2DQrm: | |
| case X86::Int_VCVTTPD2DQrr: | |
| case X86::Int_VCVTTPS2DQrm: | |
| case X86::Int_VCVTTPS2DQrr: | |
| case X86::Int_VCVTTSD2SI64rm: | |
| case X86::Int_VCVTTSD2SI64rr: | |
| case X86::Int_VCVTTSD2SIrm: | |
| case X86::Int_VCVTTSD2SIrr: | |
| case X86::Int_VCVTTSS2SI64rr: | |
| case X86::Int_VCVTTSS2SIrr: | |
| case X86::Int_VUCOMISDrm: | |
| case X86::Int_VUCOMISDrr: | |
| case X86::Int_VUCOMISSrm: | |
| case X86::Int_VUCOMISSrr: | |
| case X86::LAR16rm: | |
| case X86::LAR16rr: | |
| case X86::LAR32rm: | |
| case X86::LAR32rr: | |
| case X86::LAR64rm: | |
| case X86::LAR64rr: | |
| case X86::LCMPXCHG16: | |
| case X86::LCMPXCHG32: | |
| case X86::LCMPXCHG8: | |
| case X86::LDDQUrm: | |
| case X86::LEA16r: | |
| case X86::LEA32r: | |
| case X86::LEA64_32r: | |
| case X86::LEA64r: | |
| case X86::LOCK_ADD16mi: | |
| case X86::LOCK_ADD16mi8: | |
| case X86::LOCK_ADD16mr: | |
| case X86::LOCK_ADD32mi: | |
| case X86::LOCK_ADD32mi8: | |
| case X86::LOCK_ADD32mr: | |
| case X86::LOCK_ADD64mi32: | |
| case X86::LOCK_ADD64mi8: | |
| case X86::LOCK_ADD64mr: | |
| case X86::LOCK_ADD8mi: | |
| case X86::LOCK_ADD8mr: | |
| case X86::LOCK_SUB16mi: | |
| case X86::LOCK_SUB16mi8: | |
| case X86::LOCK_SUB16mr: | |
| case X86::LOCK_SUB32mi: | |
| case X86::LOCK_SUB32mi8: | |
| case X86::LOCK_SUB32mr: | |
| case X86::LOCK_SUB64mi32: | |
| case X86::LOCK_SUB64mi8: | |
| case X86::LOCK_SUB64mr: | |
| case X86::LOCK_SUB8mi: | |
| case X86::LOCK_SUB8mr: | |
| case X86::LSL16rm: | |
| case X86::LSL16rr: | |
| case X86::LSL32rm: | |
| case X86::LSL32rr: | |
| case X86::LSL64rm: | |
| case X86::LSL64rr: | |
| case X86::MASKMOVDQU: | |
| case X86::MASKMOVDQU64: | |
| case X86::MAXPDrm: | |
| case X86::MAXPDrm_Int: | |
| case X86::MAXPDrr: | |
| case X86::MAXPDrr_Int: | |
| case X86::MAXPSrm: | |
| case X86::MAXPSrm_Int: | |
| case X86::MAXPSrr: | |
| case X86::MAXPSrr_Int: | |
| case X86::MAXSDrm: | |
| case X86::MAXSDrm_Int: | |
| case X86::MAXSDrr: | |
| case X86::MAXSDrr_Int: | |
| case X86::MAXSSrm: | |
| case X86::MAXSSrm_Int: | |
| case X86::MAXSSrr: | |
| case X86::MAXSSrr_Int: | |
| case X86::MINPDrm: | |
| case X86::MINPDrm_Int: | |
| case X86::MINPDrr: | |
| case X86::MINPDrr_Int: | |
| case X86::MINPSrm: | |
| case X86::MINPSrm_Int: | |
| case X86::MINPSrr: | |
| case X86::MINPSrr_Int: | |
| case X86::MINSDrm: | |
| case X86::MINSDrm_Int: | |
| case X86::MINSDrr: | |
| case X86::MINSDrr_Int: | |
| case X86::MINSSrm: | |
| case X86::MINSSrm_Int: | |
| case X86::MINSSrr: | |
| case X86::MINSSrr_Int: | |
| case X86::MMX_CVTPD2PIrm: | |
| case X86::MMX_CVTPD2PIrr: | |
| case X86::MMX_CVTPI2PDrm: | |
| case X86::MMX_CVTPI2PDrr: | |
| case X86::MMX_CVTPI2PSrm: | |
| case X86::MMX_CVTPI2PSrr: | |
| case X86::MMX_CVTPS2PIrr: | |
| case X86::MMX_CVTTPD2PIrm: | |
| case X86::MMX_CVTTPD2PIrr: | |
| case X86::MMX_CVTTPS2PIrr: | |
| case X86::MMX_MASKMOVQ: | |
| case X86::MMX_MASKMOVQ64: | |
| case X86::MMX_MOVD64from64rr: | |
| case X86::MMX_MOVD64grr: | |
| case X86::MMX_MOVD64mr: | |
| case X86::MMX_MOVD64rm: | |
| case X86::MMX_MOVD64rr: | |
| case X86::MMX_MOVD64rrv164: | |
| case X86::MMX_MOVD64to64rr: | |
| case X86::MMX_MOVDQ2Qrr: | |
| case X86::MMX_MOVFR642Qrr: | |
| case X86::MMX_MOVNTQmr: | |
| case X86::MMX_MOVQ2DQrr: | |
| case X86::MMX_MOVQ2FR64rr: | |
| case X86::MMX_MOVQ64mr: | |
| case X86::MMX_MOVQ64rm: | |
| case X86::MMX_MOVQ64rr: | |
| case X86::MMX_MOVZDI2PDIrm: | |
| case X86::MMX_MOVZDI2PDIrr: | |
| case X86::MMX_PACKSSDWrm: | |
| case X86::MMX_PACKSSDWrr: | |
| case X86::MMX_PACKSSWBrm: | |
| case X86::MMX_PACKSSWBrr: | |
| case X86::MMX_PACKUSWBrm: | |
| case X86::MMX_PACKUSWBrr: | |
| case X86::MMX_PADDBrm: | |
| case X86::MMX_PADDBrr: | |
| case X86::MMX_PADDDrm: | |
| case X86::MMX_PADDDrr: | |
| case X86::MMX_PADDQrm: | |
| case X86::MMX_PADDQrr: | |
| case X86::MMX_PADDSBrm: | |
| case X86::MMX_PADDSBrr: | |
| case X86::MMX_PADDSWrm: | |
| case X86::MMX_PADDSWrr: | |
| case X86::MMX_PADDUSBrm: | |
| case X86::MMX_PADDUSBrr: | |
| case X86::MMX_PADDUSWrm: | |
| case X86::MMX_PADDUSWrr: | |
| case X86::MMX_PADDWrm: | |
| case X86::MMX_PADDWrr: | |
| case X86::MMX_PANDNrm: | |
| case X86::MMX_PANDNrr: | |
| case X86::MMX_PANDrm: | |
| case X86::MMX_PANDrr: | |
| case X86::MMX_PAVGBrm: | |
| case X86::MMX_PAVGBrr: | |
| case X86::MMX_PAVGWrm: | |
| case X86::MMX_PAVGWrr: | |
| case X86::MMX_PCMPEQBrm: | |
| case X86::MMX_PCMPEQBrr: | |
| case X86::MMX_PCMPEQDrm: | |
| case X86::MMX_PCMPEQDrr: | |
| case X86::MMX_PCMPEQWrm: | |
| case X86::MMX_PCMPEQWrr: | |
| case X86::MMX_PCMPGTBrm: | |
| case X86::MMX_PCMPGTBrr: | |
| case X86::MMX_PCMPGTDrm: | |
| case X86::MMX_PCMPGTDrr: | |
| case X86::MMX_PCMPGTWrm: | |
| case X86::MMX_PCMPGTWrr: | |
| case X86::MMX_PMADDWDrm: | |
| case X86::MMX_PMADDWDrr: | |
| case X86::MMX_PMAXSWrm: | |
| case X86::MMX_PMAXSWrr: | |
| case X86::MMX_PMAXUBrm: | |
| case X86::MMX_PMAXUBrr: | |
| case X86::MMX_PMINSWrm: | |
| case X86::MMX_PMINSWrr: | |
| case X86::MMX_PMINUBrm: | |
| case X86::MMX_PMINUBrr: | |
| case X86::MMX_PMOVMSKBrr: | |
| case X86::MMX_PMULHUWrm: | |
| case X86::MMX_PMULHUWrr: | |
| case X86::MMX_PMULHWrm: | |
| case X86::MMX_PMULHWrr: | |
| case X86::MMX_PMULLWrm: | |
| case X86::MMX_PMULLWrr: | |
| case X86::MMX_PMULUDQrm: | |
| case X86::MMX_PMULUDQrr: | |
| case X86::MMX_PORrm: | |
| case X86::MMX_PORrr: | |
| case X86::MMX_PSADBWrm: | |
| case X86::MMX_PSADBWrr: | |
| case X86::MMX_PSLLDri: | |
| case X86::MMX_PSLLDrm: | |
| case X86::MMX_PSLLDrr: | |
| case X86::MMX_PSLLQri: | |
| case X86::MMX_PSLLQrm: | |
| case X86::MMX_PSLLQrr: | |
| case X86::MMX_PSLLWri: | |
| case X86::MMX_PSLLWrm: | |
| case X86::MMX_PSLLWrr: | |
| case X86::MMX_PSRADri: | |
| case X86::MMX_PSRADrm: | |
| case X86::MMX_PSRADrr: | |
| case X86::MMX_PSRAWri: | |
| case X86::MMX_PSRAWrm: | |
| case X86::MMX_PSRAWrr: | |
| case X86::MMX_PSRLDri: | |
| case X86::MMX_PSRLDrm: | |
| case X86::MMX_PSRLDrr: | |
| case X86::MMX_PSRLQri: | |
| case X86::MMX_PSRLQrm: | |
| case X86::MMX_PSRLQrr: | |
| case X86::MMX_PSRLWri: | |
| case X86::MMX_PSRLWrm: | |
| case X86::MMX_PSRLWrr: | |
| case X86::MMX_PSUBBrm: | |
| case X86::MMX_PSUBBrr: | |
| case X86::MMX_PSUBDrm: | |
| case X86::MMX_PSUBDrr: | |
| case X86::MMX_PSUBQrm: | |
| case X86::MMX_PSUBQrr: | |
| case X86::MMX_PSUBSBrm: | |
| case X86::MMX_PSUBSBrr: | |
| case X86::MMX_PSUBSWrm: | |
| case X86::MMX_PSUBSWrr: | |
| case X86::MMX_PSUBUSBrm: | |
| case X86::MMX_PSUBUSBrr: | |
| case X86::MMX_PSUBUSWrm: | |
| case X86::MMX_PSUBUSWrr: | |
| case X86::MMX_PSUBWrm: | |
| case X86::MMX_PSUBWrr: | |
| case X86::MMX_PUNPCKHBWrm: | |
| case X86::MMX_PUNPCKHBWrr: | |
| case X86::MMX_PUNPCKHDQrm: | |
| case X86::MMX_PUNPCKHDQrr: | |
| case X86::MMX_PUNPCKHWDrm: | |
| case X86::MMX_PUNPCKHWDrr: | |
| case X86::MMX_PUNPCKLBWrm: | |
| case X86::MMX_PUNPCKLBWrr: | |
| case X86::MMX_PUNPCKLDQrm: | |
| case X86::MMX_PUNPCKLDQrr: | |
| case X86::MMX_PUNPCKLWDrm: | |
| case X86::MMX_PUNPCKLWDrr: | |
| case X86::MMX_PXORrm: | |
| case X86::MMX_PXORrr: | |
| case X86::MOV16mi: | |
| case X86::MOV16mr: | |
| case X86::MOV16ms: | |
| case X86::MOV16ri: | |
| case X86::MOV16rm: | |
| case X86::MOV16rr: | |
| case X86::MOV16rr_REV: | |
| case X86::MOV16rs: | |
| case X86::MOV16sm: | |
| case X86::MOV16sr: | |
| case X86::MOV32cr: | |
| case X86::MOV32dr: | |
| case X86::MOV32mi: | |
| case X86::MOV32mr: | |
| case X86::MOV32mr_TC: | |
| case X86::MOV32ms: | |
| case X86::MOV32rc: | |
| case X86::MOV32rd: | |
| case X86::MOV32ri: | |
| case X86::MOV32rm: | |
| case X86::MOV32rm_TC: | |
| case X86::MOV32rr: | |
| case X86::MOV32rr_REV: | |
| case X86::MOV32rr_TC: | |
| case X86::MOV32rs: | |
| case X86::MOV32sm: | |
| case X86::MOV32sr: | |
| case X86::MOV64cr: | |
| case X86::MOV64dr: | |
| case X86::MOV64mi32: | |
| case X86::MOV64mr: | |
| case X86::MOV64mr_TC: | |
| case X86::MOV64ms: | |
| case X86::MOV64rc: | |
| case X86::MOV64rd: | |
| case X86::MOV64ri: | |
| case X86::MOV64ri32: | |
| case X86::MOV64ri_alt: | |
| case X86::MOV64rm: | |
| case X86::MOV64rm_TC: | |
| case X86::MOV64rr: | |
| case X86::MOV64rr_REV: | |
| case X86::MOV64rr_TC: | |
| case X86::MOV64rs: | |
| case X86::MOV64sm: | |
| case X86::MOV64sr: | |
| case X86::MOV64toPQIrr: | |
| case X86::MOV64toSDrm: | |
| case X86::MOV64toSDrr: | |
| case X86::MOV8mi: | |
| case X86::MOV8mr: | |
| case X86::MOV8ri: | |
| case X86::MOV8rm: | |
| case X86::MOV8rr: | |
| case X86::MOV8rr_REV: | |
| case X86::MOVAPDrm: | |
| case X86::MOVAPDrr: | |
| case X86::MOVAPSrm: | |
| case X86::MOVAPSrr: | |
| case X86::MOVDDUPrr: | |
| case X86::MOVDI2PDIrm: | |
| case X86::MOVDI2PDIrr: | |
| case X86::MOVDI2SSrm: | |
| case X86::MOVDI2SSrr: | |
| case X86::MOVDQAmr: | |
| case X86::MOVDQArm: | |
| case X86::MOVDQArr: | |
| case X86::MOVDQUmr: | |
| case X86::MOVDQUmr_Int: | |
| case X86::MOVDQUrm: | |
| case X86::MOVDQUrm_Int: | |
| case X86::MOVHLPSrr: | |
| case X86::MOVHPDmr: | |
| case X86::MOVHPDrm: | |
| case X86::MOVHPSmr: | |
| case X86::MOVHPSrm: | |
| case X86::MOVLHPSrr: | |
| case X86::MOVLPDmr: | |
| case X86::MOVLPDrm: | |
| case X86::MOVLPSmr: | |
| case X86::MOVLPSrm: | |
| case X86::MOVLQ128mr: | |
| case X86::MOVMSKPDrr: | |
| case X86::MOVMSKPSrr: | |
| case X86::MOVNTDQArm: | |
| case X86::MOVNTI_64mr: | |
| case X86::MOVNTImr: | |
| case X86::MOVNTImr_Int: | |
| case X86::MOVNTPDmr_Int: | |
| case X86::MOVNTPSmr_Int: | |
| case X86::MOVPDI2DImr: | |
| case X86::MOVPDI2DIrr: | |
| case X86::MOVPQI2QImr: | |
| case X86::MOVPQIto64rr: | |
| case X86::MOVQI2PQIrm: | |
| case X86::MOVQxrxr: | |
| case X86::MOVSDmr: | |
| case X86::MOVSDrr: | |
| case X86::MOVSDto64mr: | |
| case X86::MOVSDto64rr: | |
| case X86::MOVSHDUPrm: | |
| case X86::MOVSHDUPrr: | |
| case X86::MOVSLDUPrm: | |
| case X86::MOVSLDUPrr: | |
| case X86::MOVSS2DImr: | |
| case X86::MOVSS2DIrr: | |
| case X86::MOVSSmr: | |
| case X86::MOVSSrr: | |
| case X86::MOVSX16rm8W: | |
| case X86::MOVSX16rr8W: | |
| case X86::MOVSX32rm16: | |
| case X86::MOVSX32rm8: | |
| case X86::MOVSX32rr16: | |
| case X86::MOVSX32rr8: | |
| case X86::MOVSX64rm16: | |
| case X86::MOVSX64rm32: | |
| case X86::MOVSX64rm8: | |
| case X86::MOVSX64rr16: | |
| case X86::MOVSX64rr32: | |
| case X86::MOVSX64rr8: | |
| case X86::MOVUPDrm: | |
| case X86::MOVUPDrm_Int: | |
| case X86::MOVUPDrr: | |
| case X86::MOVUPSrm: | |
| case X86::MOVUPSrm_Int: | |
| case X86::MOVUPSrr: | |
| case X86::MOVZDI2PDIrm: | |
| case X86::MOVZDI2PDIrr: | |
| case X86::MOVZPQILo2PQIrm: | |
| case X86::MOVZPQILo2PQIrr: | |
| case X86::MOVZQI2PQIrm: | |
| case X86::MOVZQI2PQIrr: | |
| case X86::MOVZX16rm8W: | |
| case X86::MOVZX16rr8W: | |
| case X86::MOVZX32rm16: | |
| case X86::MOVZX32rm8: | |
| case X86::MOVZX32rr16: | |
| case X86::MOVZX32rr8: | |
| case X86::MOVZX64rm16_Q: | |
| case X86::MOVZX64rm8_Q: | |
| case X86::MOVZX64rr16_Q: | |
| case X86::MOVZX64rr8_Q: | |
| case X86::MULPDrm: | |
| case X86::MULPDrr: | |
| case X86::MULPSrm: | |
| case X86::MULPSrr: | |
| case X86::MULSDrm: | |
| case X86::MULSDrm_Int: | |
| case X86::MULSDrr: | |
| case X86::MULSDrr_Int: | |
| case X86::MULSSrm: | |
| case X86::MULSSrm_Int: | |
| case X86::MULSSrr: | |
| case X86::MULSSrr_Int: | |
| case X86::OR16mi: | |
| case X86::OR16mi8: | |
| case X86::OR16mr: | |
| case X86::OR16ri: | |
| case X86::OR16ri8: | |
| case X86::OR16rm: | |
| case X86::OR16rr: | |
| case X86::OR16rr_REV: | |
| case X86::OR32mi: | |
| case X86::OR32mi8: | |
| case X86::OR32mr: | |
| case X86::OR32ri: | |
| case X86::OR32ri8: | |
| case X86::OR32rm: | |
| case X86::OR32rr: | |
| case X86::OR32rr_REV: | |
| case X86::OR64mi32: | |
| case X86::OR64mi8: | |
| case X86::OR64mr: | |
| case X86::OR64ri32: | |
| case X86::OR64ri8: | |
| case X86::OR64rm: | |
| case X86::OR64rr: | |
| case X86::OR64rr_REV: | |
| case X86::OR8mi: | |
| case X86::OR8mr: | |
| case X86::OR8ri: | |
| case X86::OR8rm: | |
| case X86::OR8rr: | |
| case X86::OR8rr_REV: | |
| case X86::ORPDrm: | |
| case X86::ORPDrr: | |
| case X86::ORPSrm: | |
| case X86::ORPSrr: | |
| case X86::PABSBrm128: | |
| case X86::PABSBrm64: | |
| case X86::PABSBrr128: | |
| case X86::PABSBrr64: | |
| case X86::PABSDrm128: | |
| case X86::PABSDrm64: | |
| case X86::PABSDrr128: | |
| case X86::PABSDrr64: | |
| case X86::PABSWrm128: | |
| case X86::PABSWrm64: | |
| case X86::PABSWrr128: | |
| case X86::PABSWrr64: | |
| case X86::PACKSSDWrm: | |
| case X86::PACKSSDWrr: | |
| case X86::PACKSSWBrm: | |
| case X86::PACKSSWBrr: | |
| case X86::PACKUSDWrm: | |
| case X86::PACKUSDWrr: | |
| case X86::PACKUSWBrm: | |
| case X86::PACKUSWBrr: | |
| case X86::PADDBrm: | |
| case X86::PADDBrr: | |
| case X86::PADDDrm: | |
| case X86::PADDDrr: | |
| case X86::PADDQrm: | |
| case X86::PADDQrr: | |
| case X86::PADDSBrm: | |
| case X86::PADDSBrr: | |
| case X86::PADDSWrm: | |
| case X86::PADDSWrr: | |
| case X86::PADDUSBrm: | |
| case X86::PADDUSBrr: | |
| case X86::PADDUSWrm: | |
| case X86::PADDUSWrr: | |
| case X86::PADDWrm: | |
| case X86::PADDWrr: | |
| case X86::PANDNrm: | |
| case X86::PANDNrr: | |
| case X86::PANDrm: | |
| case X86::PANDrr: | |
| case X86::PAVGBrm: | |
| case X86::PAVGBrr: | |
| case X86::PAVGWrm: | |
| case X86::PAVGWrr: | |
| case X86::PCMPEQBrm: | |
| case X86::PCMPEQBrr: | |
| case X86::PCMPEQDrm: | |
| case X86::PCMPEQDrr: | |
| case X86::PCMPEQQrm: | |
| case X86::PCMPEQQrr: | |
| case X86::PCMPEQWrm: | |
| case X86::PCMPEQWrr: | |
| case X86::PCMPGTBrm: | |
| case X86::PCMPGTBrr: | |
| case X86::PCMPGTDrm: | |
| case X86::PCMPGTDrr: | |
| case X86::PCMPGTQrm: | |
| case X86::PCMPGTQrr: | |
| case X86::PCMPGTWrm: | |
| case X86::PCMPGTWrr: | |
| case X86::PHADDDrm128: | |
| case X86::PHADDDrm64: | |
| case X86::PHADDDrr128: | |
| case X86::PHADDDrr64: | |
| case X86::PHADDSWrm128: | |
| case X86::PHADDSWrm64: | |
| case X86::PHADDSWrr128: | |
| case X86::PHADDSWrr64: | |
| case X86::PHADDWrm128: | |
| case X86::PHADDWrm64: | |
| case X86::PHADDWrr128: | |
| case X86::PHADDWrr64: | |
| case X86::PHMINPOSUWrm128: | |
| case X86::PHMINPOSUWrr128: | |
| case X86::PHSUBDrm128: | |
| case X86::PHSUBDrm64: | |
| case X86::PHSUBDrr128: | |
| case X86::PHSUBDrr64: | |
| case X86::PHSUBSWrm128: | |
| case X86::PHSUBSWrm64: | |
| case X86::PHSUBSWrr128: | |
| case X86::PHSUBSWrr64: | |
| case X86::PHSUBWrm128: | |
| case X86::PHSUBWrm64: | |
| case X86::PHSUBWrr128: | |
| case X86::PHSUBWrr64: | |
| case X86::PMADDUBSWrm128: | |
| case X86::PMADDUBSWrm64: | |
| case X86::PMADDUBSWrr128: | |
| case X86::PMADDUBSWrr64: | |
| case X86::PMADDWDrm: | |
| case X86::PMADDWDrr: | |
| case X86::PMAXSBrm: | |
| case X86::PMAXSBrr: | |
| case X86::PMAXSDrm: | |
| case X86::PMAXSDrr: | |
| case X86::PMAXSWrm: | |
| case X86::PMAXSWrr: | |
| case X86::PMAXUBrm: | |
| case X86::PMAXUBrr: | |
| case X86::PMAXUDrm: | |
| case X86::PMAXUDrr: | |
| case X86::PMAXUWrm: | |
| case X86::PMAXUWrr: | |
| case X86::PMINSBrm: | |
| case X86::PMINSBrr: | |
| case X86::PMINSDrm: | |
| case X86::PMINSDrr: | |
| case X86::PMINSWrm: | |
| case X86::PMINSWrr: | |
| case X86::PMINUBrm: | |
| case X86::PMINUBrr: | |
| case X86::PMINUDrm: | |
| case X86::PMINUDrr: | |
| case X86::PMINUWrm: | |
| case X86::PMINUWrr: | |
| case X86::PMOVMSKBrr: | |
| case X86::PMOVSXBDrm: | |
| case X86::PMOVSXBDrr: | |
| case X86::PMOVSXBQrm: | |
| case X86::PMOVSXBQrr: | |
| case X86::PMOVSXBWrm: | |
| case X86::PMOVSXBWrr: | |
| case X86::PMOVSXDQrm: | |
| case X86::PMOVSXDQrr: | |
| case X86::PMOVSXWDrm: | |
| case X86::PMOVSXWDrr: | |
| case X86::PMOVSXWQrm: | |
| case X86::PMOVSXWQrr: | |
| case X86::PMOVZXBDrm: | |
| case X86::PMOVZXBDrr: | |
| case X86::PMOVZXBQrm: | |
| case X86::PMOVZXBQrr: | |
| case X86::PMOVZXBWrm: | |
| case X86::PMOVZXBWrr: | |
| case X86::PMOVZXDQrm: | |
| case X86::PMOVZXDQrr: | |
| case X86::PMOVZXWDrm: | |
| case X86::PMOVZXWDrr: | |
| case X86::PMOVZXWQrm: | |
| case X86::PMOVZXWQrr: | |
| case X86::PMULDQrm: | |
| case X86::PMULDQrr: | |
| case X86::PMULHRSWrm128: | |
| case X86::PMULHRSWrm64: | |
| case X86::PMULHRSWrr128: | |
| case X86::PMULHRSWrr64: | |
| case X86::PMULHUWrm: | |
| case X86::PMULHUWrr: | |
| case X86::PMULHWrm: | |
| case X86::PMULHWrr: | |
| case X86::PMULLDrm: | |
| case X86::PMULLDrr: | |
| case X86::PMULLWrm: | |
| case X86::PMULLWrr: | |
| case X86::PMULUDQrm: | |
| case X86::PMULUDQrr: | |
| case X86::POPCNT16rm: | |
| case X86::POPCNT16rr: | |
| case X86::POPCNT32rm: | |
| case X86::POPCNT32rr: | |
| case X86::POPCNT64rm: | |
| case X86::POPCNT64rr: | |
| case X86::PORrm: | |
| case X86::PORrr: | |
| case X86::PSADBWrm: | |
| case X86::PSADBWrr: | |
| case X86::PSHUFBrm128: | |
| case X86::PSHUFBrm64: | |
| case X86::PSHUFBrr128: | |
| case X86::PSHUFBrr64: | |
| case X86::PSIGNBrm128: | |
| case X86::PSIGNBrm64: | |
| case X86::PSIGNBrr128: | |
| case X86::PSIGNBrr64: | |
| case X86::PSIGNDrm128: | |
| case X86::PSIGNDrm64: | |
| case X86::PSIGNDrr128: | |
| case X86::PSIGNDrr64: | |
| case X86::PSIGNWrm128: | |
| case X86::PSIGNWrm64: | |
| case X86::PSIGNWrr128: | |
| case X86::PSIGNWrr64: | |
| case X86::PSLLDQri: | |
| case X86::PSLLDri: | |
| case X86::PSLLDrm: | |
| case X86::PSLLDrr: | |
| case X86::PSLLQri: | |
| case X86::PSLLQrm: | |
| case X86::PSLLQrr: | |
| case X86::PSLLWri: | |
| case X86::PSLLWrm: | |
| case X86::PSLLWrr: | |
| case X86::PSRADri: | |
| case X86::PSRADrm: | |
| case X86::PSRADrr: | |
| case X86::PSRAWri: | |
| case X86::PSRAWrm: | |
| case X86::PSRAWrr: | |
| case X86::PSRLDQri: | |
| case X86::PSRLDri: | |
| case X86::PSRLDrm: | |
| case X86::PSRLDrr: | |
| case X86::PSRLQri: | |
| case X86::PSRLQrm: | |
| case X86::PSRLQrr: | |
| case X86::PSRLWri: | |
| case X86::PSRLWrm: | |
| case X86::PSRLWrr: | |
| case X86::PSUBBrm: | |
| case X86::PSUBBrr: | |
| case X86::PSUBDrm: | |
| case X86::PSUBDrr: | |
| case X86::PSUBQrm: | |
| case X86::PSUBQrr: | |
| case X86::PSUBSBrm: | |
| case X86::PSUBSBrr: | |
| case X86::PSUBSWrm: | |
| case X86::PSUBSWrr: | |
| case X86::PSUBUSBrm: | |
| case X86::PSUBUSBrr: | |
| case X86::PSUBUSWrm: | |
| case X86::PSUBUSWrr: | |
| case X86::PSUBWrm: | |
| case X86::PSUBWrr: | |
| case X86::PTESTrm: | |
| case X86::PTESTrr: | |
| case X86::PUNPCKHBWrm: | |
| case X86::PUNPCKHBWrr: | |
| case X86::PUNPCKHDQrm: | |
| case X86::PUNPCKHDQrr: | |
| case X86::PUNPCKHQDQrm: | |
| case X86::PUNPCKHQDQrr: | |
| case X86::PUNPCKHWDrm: | |
| case X86::PUNPCKHWDrr: | |
| case X86::PUNPCKLBWrm: | |
| case X86::PUNPCKLBWrr: | |
| case X86::PUNPCKLDQrm: | |
| case X86::PUNPCKLDQrr: | |
| case X86::PUNPCKLQDQrm: | |
| case X86::PUNPCKLQDQrr: | |
| case X86::PUNPCKLWDrm: | |
| case X86::PUNPCKLWDrr: | |
| case X86::PXORrm: | |
| case X86::PXORrr: | |
| case X86::RCL16mi: | |
| case X86::RCL16ri: | |
| case X86::RCL32mi: | |
| case X86::RCL32ri: | |
| case X86::RCL64mi: | |
| case X86::RCL64ri: | |
| case X86::RCL8mi: | |
| case X86::RCL8ri: | |
| case X86::RCPPSm: | |
| case X86::RCPPSm_Int: | |
| case X86::RCPPSr: | |
| case X86::RCPPSr_Int: | |
| case X86::RCPSSr: | |
| case X86::RCPSSr_Int: | |
| case X86::RCR16mi: | |
| case X86::RCR16ri: | |
| case X86::RCR32mi: | |
| case X86::RCR32ri: | |
| case X86::RCR64mi: | |
| case X86::RCR64ri: | |
| case X86::RCR8mi: | |
| case X86::RCR8ri: | |
| case X86::ROL16mi: | |
| case X86::ROL16ri: | |
| case X86::ROL32mi: | |
| case X86::ROL32ri: | |
| case X86::ROL64mi: | |
| case X86::ROL64ri: | |
| case X86::ROL8mi: | |
| case X86::ROL8ri: | |
| case X86::ROR16mi: | |
| case X86::ROR16ri: | |
| case X86::ROR32mi: | |
| case X86::ROR32ri: | |
| case X86::ROR64mi: | |
| case X86::ROR64ri: | |
| case X86::ROR8mi: | |
| case X86::ROR8ri: | |
| case X86::RSQRTPSm: | |
| case X86::RSQRTPSm_Int: | |
| case X86::RSQRTPSr: | |
| case X86::RSQRTPSr_Int: | |
| case X86::RSQRTSSr: | |
| case X86::RSQRTSSr_Int: | |
| case X86::SAR16mi: | |
| case X86::SAR16ri: | |
| case X86::SAR32mi: | |
| case X86::SAR32ri: | |
| case X86::SAR64mi: | |
| case X86::SAR64ri: | |
| case X86::SAR8mi: | |
| case X86::SAR8ri: | |
| case X86::SBB16mi: | |
| case X86::SBB16mi8: | |
| case X86::SBB16mr: | |
| case X86::SBB16ri: | |
| case X86::SBB16ri8: | |
| case X86::SBB16rm: | |
| case X86::SBB16rr: | |
| case X86::SBB16rr_REV: | |
| case X86::SBB32mi: | |
| case X86::SBB32mi8: | |
| case X86::SBB32mr: | |
| case X86::SBB32ri: | |
| case X86::SBB32ri8: | |
| case X86::SBB32rm: | |
| case X86::SBB32rr: | |
| case X86::SBB32rr_REV: | |
| case X86::SBB64mi32: | |
| case X86::SBB64mi8: | |
| case X86::SBB64mr: | |
| case X86::SBB64ri32: | |
| case X86::SBB64ri8: | |
| case X86::SBB64rm: | |
| case X86::SBB64rr: | |
| case X86::SBB64rr_REV: | |
| case X86::SBB8mi: | |
| case X86::SBB8mr: | |
| case X86::SBB8ri: | |
| case X86::SBB8rm: | |
| case X86::SBB8rr: | |
| case X86::SBB8rr_REV: | |
| case X86::SHL16mi: | |
| case X86::SHL16ri: | |
| case X86::SHL32mi: | |
| case X86::SHL32ri: | |
| case X86::SHL64mi: | |
| case X86::SHL64ri: | |
| case X86::SHL8mi: | |
| case X86::SHL8ri: | |
| case X86::SHR16mi: | |
| case X86::SHR16ri: | |
| case X86::SHR32mi: | |
| case X86::SHR32ri: | |
| case X86::SHR64mi: | |
| case X86::SHR64ri: | |
| case X86::SHR8mi: | |
| case X86::SHR8ri: | |
| case X86::SQRTPDm: | |
| case X86::SQRTPDm_Int: | |
| case X86::SQRTPDr: | |
| case X86::SQRTPDr_Int: | |
| case X86::SQRTPSm: | |
| case X86::SQRTPSm_Int: | |
| case X86::SQRTPSr: | |
| case X86::SQRTPSr_Int: | |
| case X86::SQRTSDr: | |
| case X86::SQRTSDr_Int: | |
| case X86::SQRTSSr: | |
| case X86::SQRTSSr_Int: | |
| case X86::SUB16mi: | |
| case X86::SUB16mi8: | |
| case X86::SUB16mr: | |
| case X86::SUB16ri: | |
| case X86::SUB16ri8: | |
| case X86::SUB16rm: | |
| case X86::SUB16rr: | |
| case X86::SUB16rr_REV: | |
| case X86::SUB32mi: | |
| case X86::SUB32mi8: | |
| case X86::SUB32mr: | |
| case X86::SUB32ri: | |
| case X86::SUB32ri8: | |
| case X86::SUB32rm: | |
| case X86::SUB32rr: | |
| case X86::SUB32rr_REV: | |
| case X86::SUB64mi32: | |
| case X86::SUB64mi8: | |
| case X86::SUB64mr: | |
| case X86::SUB64ri32: | |
| case X86::SUB64ri8: | |
| case X86::SUB64rm: | |
| case X86::SUB64rr: | |
| case X86::SUB64rr_REV: | |
| case X86::SUB8mi: | |
| case X86::SUB8mr: | |
| case X86::SUB8ri: | |
| case X86::SUB8rm: | |
| case X86::SUB8rr: | |
| case X86::SUB8rr_REV: | |
| case X86::SUBPDrm: | |
| case X86::SUBPDrr: | |
| case X86::SUBPSrm: | |
| case X86::SUBPSrr: | |
| case X86::SUBSDrm: | |
| case X86::SUBSDrm_Int: | |
| case X86::SUBSDrr: | |
| case X86::SUBSDrr_Int: | |
| case X86::SUBSSrm: | |
| case X86::SUBSSrm_Int: | |
| case X86::SUBSSrr: | |
| case X86::SUBSSrr_Int: | |
| case X86::TCRETURNdi: | |
| case X86::TCRETURNdi64: | |
| case X86::TCRETURNmi: | |
| case X86::TCRETURNmi64: | |
| case X86::TCRETURNri: | |
| case X86::TCRETURNri64: | |
| case X86::TEST16mi: | |
| case X86::TEST16ri: | |
| case X86::TEST16rm: | |
| case X86::TEST16rr: | |
| case X86::TEST32mi: | |
| case X86::TEST32ri: | |
| case X86::TEST32rm: | |
| case X86::TEST32rr: | |
| case X86::TEST64mi32: | |
| case X86::TEST64ri32: | |
| case X86::TEST64rm: | |
| case X86::TEST64rr: | |
| case X86::TEST8mi: | |
| case X86::TEST8ri: | |
| case X86::TEST8rm: | |
| case X86::TEST8rr: | |
| case X86::UCOMISDrr: | |
| case X86::UCOMISSrr: | |
| case X86::UNPCKHPDrm: | |
| case X86::UNPCKHPDrr: | |
| case X86::UNPCKHPSrm: | |
| case X86::UNPCKHPSrr: | |
| case X86::UNPCKLPDrm: | |
| case X86::UNPCKLPDrr: | |
| case X86::UNPCKLPSrm: | |
| case X86::UNPCKLPSrr: | |
| case X86::VAESIMCrm: | |
| case X86::VAESIMCrr: | |
| case X86::VBROADCASTF128: | |
| case X86::VCOMISDrm: | |
| case X86::VCOMISDrr: | |
| case X86::VCOMISSrm: | |
| case X86::VCOMISSrr: | |
| case X86::VCVTDQ2PDYrm: | |
| case X86::VCVTDQ2PDYrr: | |
| case X86::VCVTDQ2PDrm: | |
| case X86::VCVTDQ2PDrr: | |
| case X86::VCVTDQ2PSYrr: | |
| case X86::VCVTDQ2PSrm: | |
| case X86::VCVTDQ2PSrr: | |
| case X86::VCVTPD2DQXrYr: | |
| case X86::VCVTPD2DQXrm: | |
| case X86::VCVTPD2DQXrr: | |
| case X86::VCVTPD2DQYrm: | |
| case X86::VCVTPD2DQYrr: | |
| case X86::VCVTPD2DQrr: | |
| case X86::VCVTPD2PSXrYr: | |
| case X86::VCVTPD2PSXrm: | |
| case X86::VCVTPD2PSXrr: | |
| case X86::VCVTPD2PSYrm: | |
| case X86::VCVTPD2PSYrr: | |
| case X86::VCVTPD2PSrr: | |
| case X86::VCVTPS2DQYrm: | |
| case X86::VCVTPS2DQYrr: | |
| case X86::VCVTPS2DQrm: | |
| case X86::VCVTPS2DQrr: | |
| case X86::VCVTPS2PDYrm: | |
| case X86::VCVTPS2PDYrr: | |
| case X86::VCVTPS2PDrr: | |
| case X86::VCVTSD2SI64rr: | |
| case X86::VCVTSD2SI_altrr: | |
| case X86::VCVTSS2SI64rr: | |
| case X86::VCVTSS2SIrr: | |
| case X86::VCVTTPD2DQXrYr: | |
| case X86::VCVTTPD2DQXrm: | |
| case X86::VCVTTPD2DQXrr: | |
| case X86::VCVTTPD2DQYrm: | |
| case X86::VCVTTPD2DQYrr: | |
| case X86::VCVTTPD2DQrr: | |
| case X86::VCVTTPS2DQYrm: | |
| case X86::VCVTTPS2DQYrr: | |
| case X86::VCVTTPS2DQrm: | |
| case X86::VCVTTPS2DQrr: | |
| case X86::VCVTTSD2SI64rr: | |
| case X86::VCVTTSD2SIrr: | |
| case X86::VCVTTSS2SI64rr: | |
| case X86::VCVTTSS2SIrr: | |
| case X86::VLDDQUrm: | |
| case X86::VMASKMOVDQU: | |
| case X86::VMASKMOVDQU64: | |
| case X86::VMOVAPDYrm: | |
| case X86::VMOVAPDYrr: | |
| case X86::VMOVAPDrm: | |
| case X86::VMOVAPDrr: | |
| case X86::VMOVAPSYrm: | |
| case X86::VMOVAPSYrr: | |
| case X86::VMOVAPSrm: | |
| case X86::VMOVAPSrr: | |
| case X86::VMOVDDUPYrm: | |
| case X86::VMOVDDUPYrr: | |
| case X86::VMOVDDUPrr: | |
| case X86::VMOVDI2PDIrm: | |
| case X86::VMOVDI2PDIrr: | |
| case X86::VMOVDI2SSrm: | |
| case X86::VMOVDI2SSrr: | |
| case X86::VMOVDQAYrr: | |
| case X86::VMOVDQAmr: | |
| case X86::VMOVDQArm: | |
| case X86::VMOVDQArr: | |
| case X86::VMOVDQUYrr: | |
| case X86::VMOVDQUmr: | |
| case X86::VMOVDQUmr_Int: | |
| case X86::VMOVDQUrm: | |
| case X86::VMOVDQUrm_Int: | |
| case X86::VMOVDQUrr: | |
| case X86::VMOVHPDmr: | |
| case X86::VMOVHPSmr: | |
| case X86::VMOVLPDmr: | |
| case X86::VMOVLPSmr: | |
| case X86::VMOVLQ128mr: | |
| case X86::VMOVMSKPDYr64r: | |
| case X86::VMOVMSKPDYrr: | |
| case X86::VMOVMSKPDr64r: | |
| case X86::VMOVMSKPDrr: | |
| case X86::VMOVMSKPSYr64r: | |
| case X86::VMOVMSKPSYrr: | |
| case X86::VMOVMSKPSr64r: | |
| case X86::VMOVMSKPSrr: | |
| case X86::VMOVNTDQArm: | |
| case X86::VMOVNTPDmr_Int: | |
| case X86::VMOVNTPSmr_Int: | |
| case X86::VMOVPDI2DImr: | |
| case X86::VMOVPDI2DIrr: | |
| case X86::VMOVPQI2QImr: | |
| case X86::VMOVQI2PQIrm: | |
| case X86::VMOVQd64rr: | |
| case X86::VMOVQd64rr_alt: | |
| case X86::VMOVQs64rr: | |
| case X86::VMOVQxrxr: | |
| case X86::VMOVSDmr: | |
| case X86::VMOVSHDUPYrm: | |
| case X86::VMOVSHDUPYrr: | |
| case X86::VMOVSHDUPrm: | |
| case X86::VMOVSHDUPrr: | |
| case X86::VMOVSLDUPYrm: | |
| case X86::VMOVSLDUPYrr: | |
| case X86::VMOVSLDUPrm: | |
| case X86::VMOVSLDUPrr: | |
| case X86::VMOVSS2DImr: | |
| case X86::VMOVSS2DIrr: | |
| case X86::VMOVSSmr: | |
| case X86::VMOVUPDYrm: | |
| case X86::VMOVUPDYrr: | |
| case X86::VMOVUPDrm: | |
| case X86::VMOVUPDrm_Int: | |
| case X86::VMOVUPDrr: | |
| case X86::VMOVUPSYrm: | |
| case X86::VMOVUPSYrr: | |
| case X86::VMOVUPSrm: | |
| case X86::VMOVUPSrm_Int: | |
| case X86::VMOVUPSrr: | |
| case X86::VMOVZDI2PDIrm: | |
| case X86::VMOVZDI2PDIrr: | |
| case X86::VMOVZPQILo2PQIrm: | |
| case X86::VMOVZPQILo2PQIrr: | |
| case X86::VMOVZQI2PQIrm: | |
| case X86::VMOVZQI2PQIrr: | |
| case X86::VMREAD32rm: | |
| case X86::VMREAD32rr: | |
| case X86::VMREAD64rm: | |
| case X86::VMREAD64rr: | |
| case X86::VMWRITE32rm: | |
| case X86::VMWRITE32rr: | |
| case X86::VMWRITE64rm: | |
| case X86::VMWRITE64rr: | |
| case X86::VPABSBrm128: | |
| case X86::VPABSBrm64: | |
| case X86::VPABSBrr128: | |
| case X86::VPABSBrr64: | |
| case X86::VPABSDrm128: | |
| case X86::VPABSDrm64: | |
| case X86::VPABSDrr128: | |
| case X86::VPABSDrr64: | |
| case X86::VPABSWrm128: | |
| case X86::VPABSWrm64: | |
| case X86::VPABSWrr128: | |
| case X86::VPABSWrr64: | |
| case X86::VPHMINPOSUWrm128: | |
| case X86::VPHMINPOSUWrr128: | |
| case X86::VPMOVMSKBr64r: | |
| case X86::VPMOVMSKBrr: | |
| case X86::VPMOVSXBDrm: | |
| case X86::VPMOVSXBDrr: | |
| case X86::VPMOVSXBQrm: | |
| case X86::VPMOVSXBQrr: | |
| case X86::VPMOVSXBWrm: | |
| case X86::VPMOVSXBWrr: | |
| case X86::VPMOVSXDQrm: | |
| case X86::VPMOVSXDQrr: | |
| case X86::VPMOVSXWDrm: | |
| case X86::VPMOVSXWDrr: | |
| case X86::VPMOVSXWQrm: | |
| case X86::VPMOVSXWQrr: | |
| case X86::VPMOVZXBDrm: | |
| case X86::VPMOVZXBDrr: | |
| case X86::VPMOVZXBQrm: | |
| case X86::VPMOVZXBQrr: | |
| case X86::VPMOVZXBWrm: | |
| case X86::VPMOVZXBWrr: | |
| case X86::VPMOVZXDQrm: | |
| case X86::VPMOVZXDQrr: | |
| case X86::VPMOVZXWDrm: | |
| case X86::VPMOVZXWDrr: | |
| case X86::VPMOVZXWQrm: | |
| case X86::VPMOVZXWQrr: | |
| case X86::VPTESTYrr: | |
| case X86::VPTESTrm: | |
| case X86::VPTESTrr: | |
| case X86::VRCPPSYm: | |
| case X86::VRCPPSYm_Int: | |
| case X86::VRCPPSYr: | |
| case X86::VRCPPSYr_Int: | |
| case X86::VRCPPSm: | |
| case X86::VRCPPSm_Int: | |
| case X86::VRCPPSr: | |
| case X86::VRCPPSr_Int: | |
| case X86::VRSQRTPSYm: | |
| case X86::VRSQRTPSYm_Int: | |
| case X86::VRSQRTPSYr: | |
| case X86::VRSQRTPSYr_Int: | |
| case X86::VRSQRTPSm: | |
| case X86::VRSQRTPSm_Int: | |
| case X86::VRSQRTPSr: | |
| case X86::VRSQRTPSr_Int: | |
| case X86::VSQRTPDYm: | |
| case X86::VSQRTPDYm_Int: | |
| case X86::VSQRTPDYr: | |
| case X86::VSQRTPDYr_Int: | |
| case X86::VSQRTPDm: | |
| case X86::VSQRTPDm_Int: | |
| case X86::VSQRTPDr: | |
| case X86::VSQRTPDr_Int: | |
| case X86::VSQRTPSYm: | |
| case X86::VSQRTPSYm_Int: | |
| case X86::VSQRTPSYr: | |
| case X86::VSQRTPSYr_Int: | |
| case X86::VSQRTPSm: | |
| case X86::VSQRTPSm_Int: | |
| case X86::VSQRTPSr: | |
| case X86::VSQRTPSr_Int: | |
| case X86::VTESTPDYrm: | |
| case X86::VTESTPDYrr: | |
| case X86::VTESTPDrm: | |
| case X86::VTESTPDrr: | |
| case X86::VTESTPSYrm: | |
| case X86::VTESTPSYrr: | |
| case X86::VTESTPSrm: | |
| case X86::VTESTPSrr: | |
| case X86::VUCOMISDrr: | |
| case X86::VUCOMISSrr: | |
| case X86::XADD16rm: | |
| case X86::XADD16rr: | |
| case X86::XADD32rm: | |
| case X86::XADD32rr: | |
| case X86::XADD64rm: | |
| case X86::XADD64rr: | |
| case X86::XADD8rm: | |
| case X86::XADD8rr: | |
| case X86::XOR16mi: | |
| case X86::XOR16mi8: | |
| case X86::XOR16mr: | |
| case X86::XOR16ri: | |
| case X86::XOR16ri8: | |
| case X86::XOR16rm: | |
| case X86::XOR16rr: | |
| case X86::XOR16rr_REV: | |
| case X86::XOR32mi: | |
| case X86::XOR32mi8: | |
| case X86::XOR32mr: | |
| case X86::XOR32ri: | |
| case X86::XOR32ri8: | |
| case X86::XOR32rm: | |
| case X86::XOR32rr: | |
| case X86::XOR32rr_REV: | |
| case X86::XOR64mi32: | |
| case X86::XOR64mi8: | |
| case X86::XOR64mr: | |
| case X86::XOR64ri32: | |
| case X86::XOR64ri8: | |
| case X86::XOR64rm: | |
| case X86::XOR64rr: | |
| case X86::XOR64rr_REV: | |
| case X86::XOR8mi: | |
| case X86::XOR8mr: | |
| case X86::XOR8ri: | |
| case X86::XOR8rm: | |
| case X86::XOR8rr: | |
| case X86::XOR8rr_REV: | |
| case X86::XORPDrm: | |
| case X86::XORPDrr: | |
| case X86::XORPSrm: | |
| case X86::XORPSrr: | |
| return; | |
| break; | |
| case X86::AESKEYGENASSIST128rm: | |
| case X86::AESKEYGENASSIST128rr: | |
| case X86::BLENDPDrmi: | |
| case X86::BLENDPDrri: | |
| case X86::BLENDPSrmi: | |
| case X86::BLENDPSrri: | |
| case X86::CMPPDrmi_alt: | |
| case X86::CMPPDrri_alt: | |
| case X86::CMPPSrmi_alt: | |
| case X86::CMPPSrri_alt: | |
| case X86::CMPSDrm_alt: | |
| case X86::CMPSDrr_alt: | |
| case X86::CMPSSrm_alt: | |
| case X86::CMPSSrr_alt: | |
| case X86::DPPDrmi: | |
| case X86::DPPDrri: | |
| case X86::DPPSrmi: | |
| case X86::DPPSrri: | |
| case X86::EXTRACTPSmr: | |
| case X86::EXTRACTPSrr: | |
| case X86::IMUL16rmi: | |
| case X86::IMUL16rmi8: | |
| case X86::IMUL16rri: | |
| case X86::IMUL16rri8: | |
| case X86::IMUL32rmi: | |
| case X86::IMUL32rmi8: | |
| case X86::IMUL32rri: | |
| case X86::IMUL32rri8: | |
| case X86::IMUL64rmi32: | |
| case X86::IMUL64rmi8: | |
| case X86::IMUL64rri32: | |
| case X86::IMUL64rri8: | |
| case X86::INSERTPSrm: | |
| case X86::INSERTPSrr: | |
| case X86::Int_VCMPSDrm: | |
| case X86::Int_VCMPSDrr: | |
| case X86::Int_VCMPSSrm: | |
| case X86::Int_VCMPSSrr: | |
| case X86::Int_VCVTSD2SSrm: | |
| case X86::Int_VCVTSD2SSrr: | |
| case X86::Int_VCVTSI2SD64rm: | |
| case X86::Int_VCVTSI2SD64rr: | |
| case X86::Int_VCVTSI2SDrm: | |
| case X86::Int_VCVTSI2SDrr: | |
| case X86::Int_VCVTSI2SS64rm: | |
| case X86::Int_VCVTSI2SS64rr: | |
| case X86::Int_VCVTSI2SSrm: | |
| case X86::Int_VCVTSI2SSrr: | |
| case X86::Int_VCVTSS2SDrm: | |
| case X86::Int_VCVTSS2SDrr: | |
| case X86::MMX_PEXTRWri: | |
| case X86::MMX_PINSRWrmi: | |
| case X86::MMX_PINSRWrri: | |
| case X86::MMX_PSHUFWmi: | |
| case X86::MMX_PSHUFWri: | |
| case X86::MPSADBWrmi: | |
| case X86::MPSADBWrri: | |
| case X86::PALIGNR128rm: | |
| case X86::PALIGNR128rr: | |
| case X86::PALIGNR64rm: | |
| case X86::PALIGNR64rr: | |
| case X86::PBLENDWrmi: | |
| case X86::PBLENDWrri: | |
| case X86::PCMPESTRIArm: | |
| case X86::PCMPESTRIArr: | |
| case X86::PCMPESTRICrm: | |
| case X86::PCMPESTRICrr: | |
| case X86::PCMPESTRIOrm: | |
| case X86::PCMPESTRIOrr: | |
| case X86::PCMPESTRISrm: | |
| case X86::PCMPESTRISrr: | |
| case X86::PCMPESTRIZrm: | |
| case X86::PCMPESTRIZrr: | |
| case X86::PCMPESTRIrm: | |
| case X86::PCMPESTRIrr: | |
| case X86::PCMPESTRM128rm: | |
| case X86::PCMPESTRM128rr: | |
| case X86::PCMPISTRIArm: | |
| case X86::PCMPISTRIArr: | |
| case X86::PCMPISTRICrm: | |
| case X86::PCMPISTRICrr: | |
| case X86::PCMPISTRIOrm: | |
| case X86::PCMPISTRIOrr: | |
| case X86::PCMPISTRISrm: | |
| case X86::PCMPISTRISrr: | |
| case X86::PCMPISTRIZrm: | |
| case X86::PCMPISTRIZrr: | |
| case X86::PCMPISTRIrm: | |
| case X86::PCMPISTRIrr: | |
| case X86::PCMPISTRM128rm: | |
| case X86::PCMPISTRM128rr: | |
| case X86::PEXTRBmr: | |
| case X86::PEXTRBrr: | |
| case X86::PEXTRDmr: | |
| case X86::PEXTRDrr: | |
| case X86::PEXTRQmr: | |
| case X86::PEXTRQrr: | |
| case X86::PEXTRWmr: | |
| case X86::PEXTRWri: | |
| case X86::PINSRBrm: | |
| case X86::PINSRBrr: | |
| case X86::PINSRDrm: | |
| case X86::PINSRDrr: | |
| case X86::PINSRQrm: | |
| case X86::PINSRQrr: | |
| case X86::PINSRWrmi: | |
| case X86::PINSRWrri: | |
| case X86::PSHUFDmi: | |
| case X86::PSHUFDri: | |
| case X86::PSHUFHWmi: | |
| case X86::PSHUFHWri: | |
| case X86::PSHUFLWmi: | |
| case X86::PSHUFLWri: | |
| case X86::ROUNDPDm_Int: | |
| case X86::ROUNDPDr_Int: | |
| case X86::ROUNDPSm_Int: | |
| case X86::ROUNDPSr_Int: | |
| case X86::ROUNDSDm_Int: | |
| case X86::ROUNDSDr_Int: | |
| case X86::ROUNDSSm_Int: | |
| case X86::ROUNDSSr_Int: | |
| case X86::SHLD16mri8: | |
| case X86::SHLD16rri8: | |
| case X86::SHLD32mri8: | |
| case X86::SHLD32rri8: | |
| case X86::SHLD64mri8: | |
| case X86::SHLD64rri8: | |
| case X86::SHRD16mri8: | |
| case X86::SHRD16rri8: | |
| case X86::SHRD32mri8: | |
| case X86::SHRD32rri8: | |
| case X86::SHRD64mri8: | |
| case X86::SHRD64rri8: | |
| case X86::SHUFPDrmi: | |
| case X86::SHUFPDrri: | |
| case X86::SHUFPSrmi: | |
| case X86::SHUFPSrri: | |
| case X86::VADDPDYrm: | |
| case X86::VADDPDYrr: | |
| case X86::VADDPDrm: | |
| case X86::VADDPDrr: | |
| case X86::VADDPSYrm: | |
| case X86::VADDPSYrr: | |
| case X86::VADDPSrm: | |
| case X86::VADDPSrr: | |
| case X86::VADDSDrm: | |
| case X86::VADDSDrm_Int: | |
| case X86::VADDSDrr: | |
| case X86::VADDSDrr_Int: | |
| case X86::VADDSSrm: | |
| case X86::VADDSSrm_Int: | |
| case X86::VADDSSrr: | |
| case X86::VADDSSrr_Int: | |
| case X86::VADDSUBPDYrm: | |
| case X86::VADDSUBPDYrr: | |
| case X86::VADDSUBPDrm: | |
| case X86::VADDSUBPDrr: | |
| case X86::VADDSUBPSYrm: | |
| case X86::VADDSUBPSYrr: | |
| case X86::VADDSUBPSrm: | |
| case X86::VADDSUBPSrr: | |
| case X86::VAESDECLASTrm: | |
| case X86::VAESDECLASTrr: | |
| case X86::VAESDECrm: | |
| case X86::VAESDECrr: | |
| case X86::VAESENCLASTrm: | |
| case X86::VAESENCLASTrr: | |
| case X86::VAESENCrm: | |
| case X86::VAESENCrr: | |
| case X86::VAESKEYGENASSIST128rm: | |
| case X86::VAESKEYGENASSIST128rr: | |
| case X86::VANDNPDYrm: | |
| case X86::VANDNPDYrr: | |
| case X86::VANDNPDrm: | |
| case X86::VANDNPDrr: | |
| case X86::VANDNPSYrm: | |
| case X86::VANDNPSYrr: | |
| case X86::VANDNPSrm: | |
| case X86::VANDNPSrr: | |
| case X86::VANDPDYrm: | |
| case X86::VANDPDYrr: | |
| case X86::VANDPDrm: | |
| case X86::VANDPDrr: | |
| case X86::VANDPSYrm: | |
| case X86::VANDPSYrr: | |
| case X86::VANDPSrm: | |
| case X86::VANDPSrr: | |
| case X86::VASTART_SAVE_XMM_REGS: | |
| case X86::VCMPPDYrmi: | |
| case X86::VCMPPDYrri: | |
| case X86::VCMPPDrmi: | |
| case X86::VCMPPDrri: | |
| case X86::VCMPPSYrmi: | |
| case X86::VCMPPSYrri: | |
| case X86::VCMPPSrmi: | |
| case X86::VCMPPSrri: | |
| case X86::VCMPSDrm: | |
| case X86::VCMPSDrr: | |
| case X86::VCMPSSrm: | |
| case X86::VCMPSSrr: | |
| case X86::VCVTSD2SSrm: | |
| case X86::VCVTSD2SSrr: | |
| case X86::VCVTSI2SD64rm: | |
| case X86::VCVTSI2SD64rr: | |
| case X86::VCVTSI2SDLrm: | |
| case X86::VCVTSI2SDLrr: | |
| case X86::VCVTSI2SDrm: | |
| case X86::VCVTSI2SDrr: | |
| case X86::VCVTSI2SS64rm: | |
| case X86::VCVTSI2SS64rr: | |
| case X86::VCVTSI2SSrm: | |
| case X86::VCVTSI2SSrr: | |
| case X86::VCVTSS2SDrm: | |
| case X86::VCVTSS2SDrr: | |
| case X86::VDIVPDYrm: | |
| case X86::VDIVPDYrr: | |
| case X86::VDIVPDrm: | |
| case X86::VDIVPDrr: | |
| case X86::VDIVPSYrm: | |
| case X86::VDIVPSYrr: | |
| case X86::VDIVPSrm: | |
| case X86::VDIVPSrr: | |
| case X86::VDIVSDrm: | |
| case X86::VDIVSDrm_Int: | |
| case X86::VDIVSDrr: | |
| case X86::VDIVSDrr_Int: | |
| case X86::VDIVSSrm: | |
| case X86::VDIVSSrm_Int: | |
| case X86::VDIVSSrr: | |
| case X86::VDIVSSrr_Int: | |
| case X86::VEXTRACTF128rr: | |
| case X86::VEXTRACTPSmr: | |
| case X86::VEXTRACTPSrr: | |
| case X86::VEXTRACTPSrr64: | |
| case X86::VFMADDPDr132m: | |
| case X86::VFMADDPDr132mY: | |
| case X86::VFMADDPDr132r: | |
| case X86::VFMADDPDr132rY: | |
| case X86::VFMADDPDr213m: | |
| case X86::VFMADDPDr213mY: | |
| case X86::VFMADDPDr213r: | |
| case X86::VFMADDPDr213rY: | |
| case X86::VFMADDPDr231m: | |
| case X86::VFMADDPDr231mY: | |
| case X86::VFMADDPDr231r: | |
| case X86::VFMADDPDr231rY: | |
| case X86::VFMADDPSr132m: | |
| case X86::VFMADDPSr132mY: | |
| case X86::VFMADDPSr132r: | |
| case X86::VFMADDPSr132rY: | |
| case X86::VFMADDPSr213m: | |
| case X86::VFMADDPSr213mY: | |
| case X86::VFMADDPSr213r: | |
| case X86::VFMADDPSr213rY: | |
| case X86::VFMADDPSr231m: | |
| case X86::VFMADDPSr231mY: | |
| case X86::VFMADDPSr231r: | |
| case X86::VFMADDPSr231rY: | |
| case X86::VFMADDSUBPDr132m: | |
| case X86::VFMADDSUBPDr132mY: | |
| case X86::VFMADDSUBPDr132r: | |
| case X86::VFMADDSUBPDr132rY: | |
| case X86::VFMADDSUBPDr213m: | |
| case X86::VFMADDSUBPDr213mY: | |
| case X86::VFMADDSUBPDr213r: | |
| case X86::VFMADDSUBPDr213rY: | |
| case X86::VFMADDSUBPDr231m: | |
| case X86::VFMADDSUBPDr231mY: | |
| case X86::VFMADDSUBPDr231r: | |
| case X86::VFMADDSUBPDr231rY: | |
| case X86::VFMADDSUBPSr132m: | |
| case X86::VFMADDSUBPSr132mY: | |
| case X86::VFMADDSUBPSr132r: | |
| case X86::VFMADDSUBPSr132rY: | |
| case X86::VFMADDSUBPSr213m: | |
| case X86::VFMADDSUBPSr213mY: | |
| case X86::VFMADDSUBPSr213r: | |
| case X86::VFMADDSUBPSr213rY: | |
| case X86::VFMADDSUBPSr231m: | |
| case X86::VFMADDSUBPSr231mY: | |
| case X86::VFMADDSUBPSr231r: | |
| case X86::VFMADDSUBPSr231rY: | |
| case X86::VFMSUBADDPDr132m: | |
| case X86::VFMSUBADDPDr132mY: | |
| case X86::VFMSUBADDPDr132r: | |
| case X86::VFMSUBADDPDr132rY: | |
| case X86::VFMSUBADDPDr213m: | |
| case X86::VFMSUBADDPDr213mY: | |
| case X86::VFMSUBADDPDr213r: | |
| case X86::VFMSUBADDPDr213rY: | |
| case X86::VFMSUBADDPDr231m: | |
| case X86::VFMSUBADDPDr231mY: | |
| case X86::VFMSUBADDPDr231r: | |
| case X86::VFMSUBADDPDr231rY: | |
| case X86::VFMSUBADDPSr132m: | |
| case X86::VFMSUBADDPSr132mY: | |
| case X86::VFMSUBADDPSr132r: | |
| case X86::VFMSUBADDPSr132rY: | |
| case X86::VFMSUBADDPSr213m: | |
| case X86::VFMSUBADDPSr213mY: | |
| case X86::VFMSUBADDPSr213r: | |
| case X86::VFMSUBADDPSr213rY: | |
| case X86::VFMSUBADDPSr231m: | |
| case X86::VFMSUBADDPSr231mY: | |
| case X86::VFMSUBADDPSr231r: | |
| case X86::VFMSUBADDPSr231rY: | |
| case X86::VFMSUBPDr132m: | |
| case X86::VFMSUBPDr132mY: | |
| case X86::VFMSUBPDr132r: | |
| case X86::VFMSUBPDr132rY: | |
| case X86::VFMSUBPDr213m: | |
| case X86::VFMSUBPDr213mY: | |
| case X86::VFMSUBPDr213r: | |
| case X86::VFMSUBPDr213rY: | |
| case X86::VFMSUBPDr231m: | |
| case X86::VFMSUBPDr231mY: | |
| case X86::VFMSUBPDr231r: | |
| case X86::VFMSUBPDr231rY: | |
| case X86::VFMSUBPSr132m: | |
| case X86::VFMSUBPSr132mY: | |
| case X86::VFMSUBPSr132r: | |
| case X86::VFMSUBPSr132rY: | |
| case X86::VFMSUBPSr213m: | |
| case X86::VFMSUBPSr213mY: | |
| case X86::VFMSUBPSr213r: | |
| case X86::VFMSUBPSr213rY: | |
| case X86::VFMSUBPSr231m: | |
| case X86::VFMSUBPSr231mY: | |
| case X86::VFMSUBPSr231r: | |
| case X86::VFMSUBPSr231rY: | |
| case X86::VFNMADDPDr132m: | |
| case X86::VFNMADDPDr132mY: | |
| case X86::VFNMADDPDr132r: | |
| case X86::VFNMADDPDr132rY: | |
| case X86::VFNMADDPDr213m: | |
| case X86::VFNMADDPDr213mY: | |
| case X86::VFNMADDPDr213r: | |
| case X86::VFNMADDPDr213rY: | |
| case X86::VFNMADDPDr231m: | |
| case X86::VFNMADDPDr231mY: | |
| case X86::VFNMADDPDr231r: | |
| case X86::VFNMADDPDr231rY: | |
| case X86::VFNMADDPSr132m: | |
| case X86::VFNMADDPSr132mY: | |
| case X86::VFNMADDPSr132r: | |
| case X86::VFNMADDPSr132rY: | |
| case X86::VFNMADDPSr213m: | |
| case X86::VFNMADDPSr213mY: | |
| case X86::VFNMADDPSr213r: | |
| case X86::VFNMADDPSr213rY: | |
| case X86::VFNMADDPSr231m: | |
| case X86::VFNMADDPSr231mY: | |
| case X86::VFNMADDPSr231r: | |
| case X86::VFNMADDPSr231rY: | |
| case X86::VFNMSUBPDr132m: | |
| case X86::VFNMSUBPDr132mY: | |
| case X86::VFNMSUBPDr132r: | |
| case X86::VFNMSUBPDr132rY: | |
| case X86::VFNMSUBPDr213m: | |
| case X86::VFNMSUBPDr213mY: | |
| case X86::VFNMSUBPDr213r: | |
| case X86::VFNMSUBPDr213rY: | |
| case X86::VFNMSUBPDr231m: | |
| case X86::VFNMSUBPDr231mY: | |
| case X86::VFNMSUBPDr231r: | |
| case X86::VFNMSUBPDr231rY: | |
| case X86::VFNMSUBPSr132m: | |
| case X86::VFNMSUBPSr132mY: | |
| case X86::VFNMSUBPSr132r: | |
| case X86::VFNMSUBPSr132rY: | |
| case X86::VFNMSUBPSr213m: | |
| case X86::VFNMSUBPSr213mY: | |
| case X86::VFNMSUBPSr213r: | |
| case X86::VFNMSUBPSr213rY: | |
| case X86::VFNMSUBPSr231m: | |
| case X86::VFNMSUBPSr231mY: | |
| case X86::VFNMSUBPSr231r: | |
| case X86::VFNMSUBPSr231rY: | |
| case X86::VFsANDNPDrm: | |
| case X86::VFsANDNPDrr: | |
| case X86::VFsANDNPSrm: | |
| case X86::VFsANDNPSrr: | |
| case X86::VFsANDPDrm: | |
| case X86::VFsANDPDrr: | |
| case X86::VFsANDPSrm: | |
| case X86::VFsANDPSrr: | |
| case X86::VFsORPDrm: | |
| case X86::VFsORPDrr: | |
| case X86::VFsORPSrm: | |
| case X86::VFsORPSrr: | |
| case X86::VFsXORPDrm: | |
| case X86::VFsXORPDrr: | |
| case X86::VFsXORPSrm: | |
| case X86::VFsXORPSrr: | |
| case X86::VHADDPDYrm: | |
| case X86::VHADDPDYrr: | |
| case X86::VHADDPDrm: | |
| case X86::VHADDPDrr: | |
| case X86::VHADDPSYrm: | |
| case X86::VHADDPSYrr: | |
| case X86::VHADDPSrm: | |
| case X86::VHADDPSrr: | |
| case X86::VHSUBPDYrm: | |
| case X86::VHSUBPDYrr: | |
| case X86::VHSUBPDrm: | |
| case X86::VHSUBPDrr: | |
| case X86::VHSUBPSYrm: | |
| case X86::VHSUBPSYrr: | |
| case X86::VHSUBPSrm: | |
| case X86::VHSUBPSrr: | |
| case X86::VMASKMOVPDYrm: | |
| case X86::VMASKMOVPDrm: | |
| case X86::VMASKMOVPSYrm: | |
| case X86::VMASKMOVPSrm: | |
| case X86::VMAXPDYrm: | |
| case X86::VMAXPDYrm_Int: | |
| case X86::VMAXPDYrr: | |
| case X86::VMAXPDYrr_Int: | |
| case X86::VMAXPDrm: | |
| case X86::VMAXPDrm_Int: | |
| case X86::VMAXPDrr: | |
| case X86::VMAXPDrr_Int: | |
| case X86::VMAXPSYrm: | |
| case X86::VMAXPSYrm_Int: | |
| case X86::VMAXPSYrr: | |
| case X86::VMAXPSYrr_Int: | |
| case X86::VMAXPSrm: | |
| case X86::VMAXPSrm_Int: | |
| case X86::VMAXPSrr: | |
| case X86::VMAXPSrr_Int: | |
| case X86::VMAXSDrm: | |
| case X86::VMAXSDrm_Int: | |
| case X86::VMAXSDrr: | |
| case X86::VMAXSDrr_Int: | |
| case X86::VMAXSSrm: | |
| case X86::VMAXSSrm_Int: | |
| case X86::VMAXSSrr: | |
| case X86::VMAXSSrr_Int: | |
| case X86::VMINPDYrm: | |
| case X86::VMINPDYrm_Int: | |
| case X86::VMINPDYrr: | |
| case X86::VMINPDYrr_Int: | |
| case X86::VMINPDrm: | |
| case X86::VMINPDrm_Int: | |
| case X86::VMINPDrr: | |
| case X86::VMINPDrr_Int: | |
| case X86::VMINPSYrm: | |
| case X86::VMINPSYrm_Int: | |
| case X86::VMINPSYrr: | |
| case X86::VMINPSYrr_Int: | |
| case X86::VMINPSrm: | |
| case X86::VMINPSrm_Int: | |
| case X86::VMINPSrr: | |
| case X86::VMINPSrr_Int: | |
| case X86::VMINSDrm: | |
| case X86::VMINSDrm_Int: | |
| case X86::VMINSDrr: | |
| case X86::VMINSDrr_Int: | |
| case X86::VMINSSrm: | |
| case X86::VMINSSrm_Int: | |
| case X86::VMINSSrr: | |
| case X86::VMINSSrr_Int: | |
| case X86::VMOVHLPSrr: | |
| case X86::VMOVHPDrm: | |
| case X86::VMOVHPSrm: | |
| case X86::VMOVLHPSrr: | |
| case X86::VMOVLPDrm: | |
| case X86::VMOVLPSrm: | |
| case X86::VMOVSDrr: | |
| case X86::VMOVSSrr: | |
| case X86::VMULPDYrm: | |
| case X86::VMULPDYrr: | |
| case X86::VMULPDrm: | |
| case X86::VMULPDrr: | |
| case X86::VMULPSYrm: | |
| case X86::VMULPSYrr: | |
| case X86::VMULPSrm: | |
| case X86::VMULPSrr: | |
| case X86::VMULSDrm: | |
| case X86::VMULSDrm_Int: | |
| case X86::VMULSDrr: | |
| case X86::VMULSDrr_Int: | |
| case X86::VMULSSrm: | |
| case X86::VMULSSrm_Int: | |
| case X86::VMULSSrr: | |
| case X86::VMULSSrr_Int: | |
| case X86::VORPDYrm: | |
| case X86::VORPDYrr: | |
| case X86::VORPDrm: | |
| case X86::VORPDrr: | |
| case X86::VORPSYrm: | |
| case X86::VORPSYrr: | |
| case X86::VORPSrm: | |
| case X86::VORPSrr: | |
| case X86::VPACKSSDWrm: | |
| case X86::VPACKSSDWrr: | |
| case X86::VPACKSSWBrm: | |
| case X86::VPACKSSWBrr: | |
| case X86::VPACKUSDWrm: | |
| case X86::VPACKUSDWrr: | |
| case X86::VPACKUSWBrm: | |
| case X86::VPACKUSWBrr: | |
| case X86::VPADDBrm: | |
| case X86::VPADDBrr: | |
| case X86::VPADDDrm: | |
| case X86::VPADDDrr: | |
| case X86::VPADDQrm: | |
| case X86::VPADDQrr: | |
| case X86::VPADDSBrm: | |
| case X86::VPADDSBrr: | |
| case X86::VPADDSWrm: | |
| case X86::VPADDSWrr: | |
| case X86::VPADDUSBrm: | |
| case X86::VPADDUSBrr: | |
| case X86::VPADDUSWrm: | |
| case X86::VPADDUSWrr: | |
| case X86::VPADDWrm: | |
| case X86::VPADDWrr: | |
| case X86::VPANDNrm: | |
| case X86::VPANDNrr: | |
| case X86::VPANDrm: | |
| case X86::VPANDrr: | |
| case X86::VPAVGBrm: | |
| case X86::VPAVGBrr: | |
| case X86::VPAVGWrm: | |
| case X86::VPAVGWrr: | |
| case X86::VPCLMULHQHQDQrm: | |
| case X86::VPCLMULHQHQDQrr: | |
| case X86::VPCLMULHQLQDQrm: | |
| case X86::VPCLMULHQLQDQrr: | |
| case X86::VPCLMULLQHQDQrm: | |
| case X86::VPCLMULLQHQDQrr: | |
| case X86::VPCLMULLQLQDQrm: | |
| case X86::VPCLMULLQLQDQrr: | |
| case X86::VPCMPEQBrm: | |
| case X86::VPCMPEQBrr: | |
| case X86::VPCMPEQDrm: | |
| case X86::VPCMPEQDrr: | |
| case X86::VPCMPEQQrm: | |
| case X86::VPCMPEQQrr: | |
| case X86::VPCMPEQWrm: | |
| case X86::VPCMPEQWrr: | |
| case X86::VPCMPESTRIArm: | |
| case X86::VPCMPESTRIArr: | |
| case X86::VPCMPESTRICrm: | |
| case X86::VPCMPESTRICrr: | |
| case X86::VPCMPESTRIOrm: | |
| case X86::VPCMPESTRIOrr: | |
| case X86::VPCMPESTRISrm: | |
| case X86::VPCMPESTRISrr: | |
| case X86::VPCMPESTRIZrm: | |
| case X86::VPCMPESTRIZrr: | |
| case X86::VPCMPESTRIrm: | |
| case X86::VPCMPESTRIrr: | |
| case X86::VPCMPESTRM128rm: | |
| case X86::VPCMPESTRM128rr: | |
| case X86::VPCMPGTBrm: | |
| case X86::VPCMPGTBrr: | |
| case X86::VPCMPGTDrm: | |
| case X86::VPCMPGTDrr: | |
| case X86::VPCMPGTQrm: | |
| case X86::VPCMPGTQrr: | |
| case X86::VPCMPGTWrm: | |
| case X86::VPCMPGTWrr: | |
| case X86::VPCMPISTRIArm: | |
| case X86::VPCMPISTRIArr: | |
| case X86::VPCMPISTRICrm: | |
| case X86::VPCMPISTRICrr: | |
| case X86::VPCMPISTRIOrm: | |
| case X86::VPCMPISTRIOrr: | |
| case X86::VPCMPISTRISrm: | |
| case X86::VPCMPISTRISrr: | |
| case X86::VPCMPISTRIZrm: | |
| case X86::VPCMPISTRIZrr: | |
| case X86::VPCMPISTRIrm: | |
| case X86::VPCMPISTRIrr: | |
| case X86::VPCMPISTRM128rm: | |
| case X86::VPCMPISTRM128rr: | |
| case X86::VPERMILPDYmi: | |
| case X86::VPERMILPDYri: | |
| case X86::VPERMILPDYrm: | |
| case X86::VPERMILPDYrr: | |
| case X86::VPERMILPDmi: | |
| case X86::VPERMILPDri: | |
| case X86::VPERMILPDrm: | |
| case X86::VPERMILPDrr: | |
| case X86::VPERMILPSYmi: | |
| case X86::VPERMILPSYri: | |
| case X86::VPERMILPSYrm: | |
| case X86::VPERMILPSYrr: | |
| case X86::VPERMILPSmi: | |
| case X86::VPERMILPSri: | |
| case X86::VPERMILPSrm: | |
| case X86::VPERMILPSrr: | |
| case X86::VPEXTRBmr: | |
| case X86::VPEXTRBrr: | |
| case X86::VPEXTRBrr64: | |
| case X86::VPEXTRDmr: | |
| case X86::VPEXTRDrr: | |
| case X86::VPEXTRQmr: | |
| case X86::VPEXTRQrr: | |
| case X86::VPEXTRWmr: | |
| case X86::VPEXTRWri: | |
| case X86::VPHADDDrm128: | |
| case X86::VPHADDDrm64: | |
| case X86::VPHADDDrr128: | |
| case X86::VPHADDDrr64: | |
| case X86::VPHADDSWrm128: | |
| case X86::VPHADDSWrm64: | |
| case X86::VPHADDSWrr128: | |
| case X86::VPHADDSWrr64: | |
| case X86::VPHADDWrm128: | |
| case X86::VPHADDWrm64: | |
| case X86::VPHADDWrr128: | |
| case X86::VPHADDWrr64: | |
| case X86::VPHSUBDrm128: | |
| case X86::VPHSUBDrm64: | |
| case X86::VPHSUBDrr128: | |
| case X86::VPHSUBDrr64: | |
| case X86::VPHSUBSWrm128: | |
| case X86::VPHSUBSWrm64: | |
| case X86::VPHSUBSWrr128: | |
| case X86::VPHSUBSWrr64: | |
| case X86::VPHSUBWrm128: | |
| case X86::VPHSUBWrm64: | |
| case X86::VPHSUBWrr128: | |
| case X86::VPHSUBWrr64: | |
| case X86::VPMADDUBSWrm128: | |
| case X86::VPMADDUBSWrm64: | |
| case X86::VPMADDUBSWrr128: | |
| case X86::VPMADDUBSWrr64: | |
| case X86::VPMADDWDrm: | |
| case X86::VPMADDWDrr: | |
| case X86::VPMAXSBrm: | |
| case X86::VPMAXSBrr: | |
| case X86::VPMAXSDrm: | |
| case X86::VPMAXSDrr: | |
| case X86::VPMAXSWrm: | |
| case X86::VPMAXSWrr: | |
| case X86::VPMAXUBrm: | |
| case X86::VPMAXUBrr: | |
| case X86::VPMAXUDrm: | |
| case X86::VPMAXUDrr: | |
| case X86::VPMAXUWrm: | |
| case X86::VPMAXUWrr: | |
| case X86::VPMINSBrm: | |
| case X86::VPMINSBrr: | |
| case X86::VPMINSDrm: | |
| case X86::VPMINSDrr: | |
| case X86::VPMINSWrm: | |
| case X86::VPMINSWrr: | |
| case X86::VPMINUBrm: | |
| case X86::VPMINUBrr: | |
| case X86::VPMINUDrm: | |
| case X86::VPMINUDrr: | |
| case X86::VPMINUWrm: | |
| case X86::VPMINUWrr: | |
| case X86::VPMULDQrm: | |
| case X86::VPMULDQrr: | |
| case X86::VPMULHRSWrm128: | |
| case X86::VPMULHRSWrm64: | |
| case X86::VPMULHRSWrr128: | |
| case X86::VPMULHRSWrr64: | |
| case X86::VPMULHUWrm: | |
| case X86::VPMULHUWrr: | |
| case X86::VPMULHWrm: | |
| case X86::VPMULHWrr: | |
| case X86::VPMULLDrm: | |
| case X86::VPMULLDrr: | |
| case X86::VPMULLWrm: | |
| case X86::VPMULLWrr: | |
| case X86::VPMULUDQrm: | |
| case X86::VPMULUDQrr: | |
| case X86::VPORrm: | |
| case X86::VPORrr: | |
| case X86::VPSADBWrm: | |
| case X86::VPSADBWrr: | |
| case X86::VPSHUFBrm128: | |
| case X86::VPSHUFBrm64: | |
| case X86::VPSHUFBrr128: | |
| case X86::VPSHUFBrr64: | |
| case X86::VPSHUFDmi: | |
| case X86::VPSHUFDri: | |
| case X86::VPSHUFHWmi: | |
| case X86::VPSHUFHWri: | |
| case X86::VPSHUFLWmi: | |
| case X86::VPSHUFLWri: | |
| case X86::VPSIGNBrm128: | |
| case X86::VPSIGNBrm64: | |
| case X86::VPSIGNBrr128: | |
| case X86::VPSIGNBrr64: | |
| case X86::VPSIGNDrm128: | |
| case X86::VPSIGNDrm64: | |
| case X86::VPSIGNDrr128: | |
| case X86::VPSIGNDrr64: | |
| case X86::VPSIGNWrm128: | |
| case X86::VPSIGNWrm64: | |
| case X86::VPSIGNWrr128: | |
| case X86::VPSIGNWrr64: | |
| case X86::VPSLLDQri: | |
| case X86::VPSLLDri: | |
| case X86::VPSLLDrm: | |
| case X86::VPSLLDrr: | |
| case X86::VPSLLQri: | |
| case X86::VPSLLQrm: | |
| case X86::VPSLLQrr: | |
| case X86::VPSLLWri: | |
| case X86::VPSLLWrm: | |
| case X86::VPSLLWrr: | |
| case X86::VPSRADri: | |
| case X86::VPSRADrm: | |
| case X86::VPSRADrr: | |
| case X86::VPSRAWri: | |
| case X86::VPSRAWrm: | |
| case X86::VPSRAWrr: | |
| case X86::VPSRLDQri: | |
| case X86::VPSRLDri: | |
| case X86::VPSRLDrm: | |
| case X86::VPSRLDrr: | |
| case X86::VPSRLQri: | |
| case X86::VPSRLQrm: | |
| case X86::VPSRLQrr: | |
| case X86::VPSRLWri: | |
| case X86::VPSRLWrm: | |
| case X86::VPSRLWrr: | |
| case X86::VPSUBBrm: | |
| case X86::VPSUBBrr: | |
| case X86::VPSUBDrm: | |
| case X86::VPSUBDrr: | |
| case X86::VPSUBQrm: | |
| case X86::VPSUBQrr: | |
| case X86::VPSUBSBrm: | |
| case X86::VPSUBSBrr: | |
| case X86::VPSUBSWrm: | |
| case X86::VPSUBSWrr: | |
| case X86::VPSUBUSBrm: | |
| case X86::VPSUBUSBrr: | |
| case X86::VPSUBUSWrm: | |
| case X86::VPSUBUSWrr: | |
| case X86::VPSUBWrm: | |
| case X86::VPSUBWrr: | |
| case X86::VPUNPCKHBWrm: | |
| case X86::VPUNPCKHBWrr: | |
| case X86::VPUNPCKHDQrm: | |
| case X86::VPUNPCKHDQrr: | |
| case X86::VPUNPCKHQDQrm: | |
| case X86::VPUNPCKHQDQrr: | |
| case X86::VPUNPCKHWDrm: | |
| case X86::VPUNPCKHWDrr: | |
| case X86::VPUNPCKLBWrm: | |
| case X86::VPUNPCKLBWrr: | |
| case X86::VPUNPCKLDQrm: | |
| case X86::VPUNPCKLDQrr: | |
| case X86::VPUNPCKLQDQrm: | |
| case X86::VPUNPCKLQDQrr: | |
| case X86::VPUNPCKLWDrm: | |
| case X86::VPUNPCKLWDrr: | |
| case X86::VPXORrm: | |
| case X86::VPXORrr: | |
| case X86::VRCPSSm: | |
| case X86::VRCPSSr: | |
| case X86::VROUNDPDm: | |
| case X86::VROUNDPDm_Int: | |
| case X86::VROUNDPDr: | |
| case X86::VROUNDPDr_Int: | |
| case X86::VROUNDPSm: | |
| case X86::VROUNDPSm_Int: | |
| case X86::VROUNDPSr: | |
| case X86::VROUNDPSr_Int: | |
| case X86::VROUNDYPDm: | |
| case X86::VROUNDYPDm_Int: | |
| case X86::VROUNDYPDr: | |
| case X86::VROUNDYPDr_Int: | |
| case X86::VROUNDYPSm: | |
| case X86::VROUNDYPSm_Int: | |
| case X86::VROUNDYPSr: | |
| case X86::VROUNDYPSr_Int: | |
| case X86::VRSQRTSSm: | |
| case X86::VRSQRTSSr: | |
| case X86::VSQRTSDm: | |
| case X86::VSQRTSDr: | |
| case X86::VSQRTSSm: | |
| case X86::VSQRTSSr: | |
| case X86::VSUBPDYrm: | |
| case X86::VSUBPDYrr: | |
| case X86::VSUBPDrm: | |
| case X86::VSUBPDrr: | |
| case X86::VSUBPSYrm: | |
| case X86::VSUBPSYrr: | |
| case X86::VSUBPSrm: | |
| case X86::VSUBPSrr: | |
| case X86::VSUBSDrm: | |
| case X86::VSUBSDrm_Int: | |
| case X86::VSUBSDrr: | |
| case X86::VSUBSDrr_Int: | |
| case X86::VSUBSSrm: | |
| case X86::VSUBSSrm_Int: | |
| case X86::VSUBSSrr: | |
| case X86::VSUBSSrr_Int: | |
| case X86::VUNPCKHPDYrm: | |
| case X86::VUNPCKHPDYrr: | |
| case X86::VUNPCKHPDrm: | |
| case X86::VUNPCKHPDrr: | |
| case X86::VUNPCKHPSYrm: | |
| case X86::VUNPCKHPSYrr: | |
| case X86::VUNPCKHPSrm: | |
| case X86::VUNPCKHPSrr: | |
| case X86::VUNPCKLPDYrm: | |
| case X86::VUNPCKLPDYrr: | |
| case X86::VUNPCKLPDrm: | |
| case X86::VUNPCKLPDrr: | |
| case X86::VUNPCKLPSYrm: | |
| case X86::VUNPCKLPSYrr: | |
| case X86::VUNPCKLPSrm: | |
| case X86::VUNPCKLPSrr: | |
| case X86::VXORPDYrm: | |
| case X86::VXORPDYrr: | |
| case X86::VXORPDrm: | |
| case X86::VXORPDrr: | |
| case X86::VXORPSYrm: | |
| case X86::VXORPSYrr: | |
| case X86::VXORPSrm: | |
| case X86::VXORPSrr: | |
| O << ", "; | |
| switch (MI->getOpcode()) { | |
| case X86::AESKEYGENASSIST128rm: | |
| case X86::EXTRACTPSmr: | |
| case X86::IMUL16rmi: | |
| case X86::IMUL16rmi8: | |
| case X86::IMUL32rmi: | |
| case X86::IMUL32rmi8: | |
| case X86::IMUL64rmi32: | |
| case X86::IMUL64rmi8: | |
| case X86::MMX_PSHUFWmi: | |
| case X86::PCMPESTRIArm: | |
| case X86::PCMPESTRICrm: | |
| case X86::PCMPESTRIOrm: | |
| case X86::PCMPESTRISrm: | |
| case X86::PCMPESTRIZrm: | |
| case X86::PCMPESTRIrm: | |
| case X86::PCMPESTRM128rm: | |
| case X86::PCMPISTRIArm: | |
| case X86::PCMPISTRICrm: | |
| case X86::PCMPISTRIOrm: | |
| case X86::PCMPISTRISrm: | |
| case X86::PCMPISTRIZrm: | |
| case X86::PCMPISTRIrm: | |
| case X86::PCMPISTRM128rm: | |
| case X86::PEXTRBmr: | |
| case X86::PEXTRDmr: | |
| case X86::PEXTRQmr: | |
| case X86::PEXTRWmr: | |
| case X86::PSHUFDmi: | |
| case X86::PSHUFHWmi: | |
| case X86::PSHUFLWmi: | |
| case X86::ROUNDPDm_Int: | |
| case X86::ROUNDPSm_Int: | |
| case X86::SHLD16mri8: | |
| case X86::SHLD32mri8: | |
| case X86::SHLD64mri8: | |
| case X86::SHRD16mri8: | |
| case X86::SHRD32mri8: | |
| case X86::SHRD64mri8: | |
| case X86::VAESKEYGENASSIST128rm: | |
| case X86::VEXTRACTPSmr: | |
| case X86::VPCMPESTRIArm: | |
| case X86::VPCMPESTRICrm: | |
| case X86::VPCMPESTRIOrm: | |
| case X86::VPCMPESTRISrm: | |
| case X86::VPCMPESTRIZrm: | |
| case X86::VPCMPESTRIrm: | |
| case X86::VPCMPESTRM128rm: | |
| case X86::VPCMPISTRIArm: | |
| case X86::VPCMPISTRICrm: | |
| case X86::VPCMPISTRIOrm: | |
| case X86::VPCMPISTRISrm: | |
| case X86::VPCMPISTRIZrm: | |
| case X86::VPCMPISTRIrm: | |
| case X86::VPCMPISTRM128rm: | |
| case X86::VPERMILPDYmi: | |
| case X86::VPERMILPDmi: | |
| case X86::VPERMILPSYmi: | |
| case X86::VPERMILPSmi: | |
| case X86::VPEXTRBmr: | |
| case X86::VPEXTRDmr: | |
| case X86::VPEXTRQmr: | |
| case X86::VPEXTRWmr: | |
| case X86::VPSHUFDmi: | |
| case X86::VPSHUFHWmi: | |
| case X86::VPSHUFLWmi: | |
| case X86::VROUNDPDm: | |
| case X86::VROUNDPDm_Int: | |
| case X86::VROUNDPSm: | |
| case X86::VROUNDPSm_Int: | |
| case X86::VROUNDYPDm: | |
| case X86::VROUNDYPDm_Int: | |
| case X86::VROUNDYPSm: | |
| case X86::VROUNDYPSm_Int: printOperand(MI, 6, O); break; | |
| case X86::AESKEYGENASSIST128rr: | |
| case X86::EXTRACTPSrr: | |
| case X86::IMUL16rri: | |
| case X86::IMUL16rri8: | |
| case X86::IMUL32rri: | |
| case X86::IMUL32rri8: | |
| case X86::IMUL64rri32: | |
| case X86::IMUL64rri8: | |
| case X86::Int_VCMPSDrr: | |
| case X86::Int_VCMPSSrr: | |
| case X86::Int_VCVTSD2SSrr: | |
| case X86::Int_VCVTSI2SD64rr: | |
| case X86::Int_VCVTSI2SDrr: | |
| case X86::Int_VCVTSI2SS64rr: | |
| case X86::Int_VCVTSI2SSrr: | |
| case X86::Int_VCVTSS2SDrr: | |
| case X86::MMX_PEXTRWri: | |
| case X86::MMX_PSHUFWri: | |
| case X86::PCMPESTRIArr: | |
| case X86::PCMPESTRICrr: | |
| case X86::PCMPESTRIOrr: | |
| case X86::PCMPESTRISrr: | |
| case X86::PCMPESTRIZrr: | |
| case X86::PCMPESTRIrr: | |
| case X86::PCMPESTRM128rr: | |
| case X86::PCMPISTRIArr: | |
| case X86::PCMPISTRICrr: | |
| case X86::PCMPISTRIOrr: | |
| case X86::PCMPISTRISrr: | |
| case X86::PCMPISTRIZrr: | |
| case X86::PCMPISTRIrr: | |
| case X86::PCMPISTRM128rr: | |
| case X86::PEXTRBrr: | |
| case X86::PEXTRDrr: | |
| case X86::PEXTRQrr: | |
| case X86::PEXTRWri: | |
| case X86::PSHUFDri: | |
| case X86::PSHUFHWri: | |
| case X86::PSHUFLWri: | |
| case X86::ROUNDPDr_Int: | |
| case X86::ROUNDPSr_Int: | |
| case X86::VADDPDYrr: | |
| case X86::VADDPDrr: | |
| case X86::VADDPSYrr: | |
| case X86::VADDPSrr: | |
| case X86::VADDSDrr: | |
| case X86::VADDSDrr_Int: | |
| case X86::VADDSSrr: | |
| case X86::VADDSSrr_Int: | |
| case X86::VADDSUBPDYrr: | |
| case X86::VADDSUBPDrr: | |
| case X86::VADDSUBPSYrr: | |
| case X86::VADDSUBPSrr: | |
| case X86::VAESDECLASTrr: | |
| case X86::VAESDECrr: | |
| case X86::VAESENCLASTrr: | |
| case X86::VAESENCrr: | |
| case X86::VAESKEYGENASSIST128rr: | |
| case X86::VANDNPDYrr: | |
| case X86::VANDNPDrr: | |
| case X86::VANDNPSYrr: | |
| case X86::VANDNPSrr: | |
| case X86::VANDPDYrr: | |
| case X86::VANDPDrr: | |
| case X86::VANDPSYrr: | |
| case X86::VANDPSrr: | |
| case X86::VASTART_SAVE_XMM_REGS: | |
| case X86::VCMPPDYrri: | |
| case X86::VCMPPDrri: | |
| case X86::VCMPPSYrri: | |
| case X86::VCMPPSrri: | |
| case X86::VCMPSDrr: | |
| case X86::VCMPSSrr: | |
| case X86::VCVTSD2SSrr: | |
| case X86::VCVTSI2SD64rr: | |
| case X86::VCVTSI2SDLrr: | |
| case X86::VCVTSI2SDrr: | |
| case X86::VCVTSI2SS64rr: | |
| case X86::VCVTSI2SSrr: | |
| case X86::VCVTSS2SDrr: | |
| case X86::VDIVPDYrr: | |
| case X86::VDIVPDrr: | |
| case X86::VDIVPSYrr: | |
| case X86::VDIVPSrr: | |
| case X86::VDIVSDrr: | |
| case X86::VDIVSDrr_Int: | |
| case X86::VDIVSSrr: | |
| case X86::VDIVSSrr_Int: | |
| case X86::VEXTRACTF128rr: | |
| case X86::VEXTRACTPSrr: | |
| case X86::VEXTRACTPSrr64: | |
| case X86::VFMADDPDr132r: | |
| case X86::VFMADDPDr132rY: | |
| case X86::VFMADDPDr213r: | |
| case X86::VFMADDPDr213rY: | |
| case X86::VFMADDPDr231r: | |
| case X86::VFMADDPDr231rY: | |
| case X86::VFMADDPSr132r: | |
| case X86::VFMADDPSr132rY: | |
| case X86::VFMADDPSr213r: | |
| case X86::VFMADDPSr213rY: | |
| case X86::VFMADDPSr231r: | |
| case X86::VFMADDPSr231rY: | |
| case X86::VFMADDSUBPDr132r: | |
| case X86::VFMADDSUBPDr132rY: | |
| case X86::VFMADDSUBPDr213r: | |
| case X86::VFMADDSUBPDr213rY: | |
| case X86::VFMADDSUBPDr231r: | |
| case X86::VFMADDSUBPDr231rY: | |
| case X86::VFMADDSUBPSr132r: | |
| case X86::VFMADDSUBPSr132rY: | |
| case X86::VFMADDSUBPSr213r: | |
| case X86::VFMADDSUBPSr213rY: | |
| case X86::VFMADDSUBPSr231r: | |
| case X86::VFMADDSUBPSr231rY: | |
| case X86::VFMSUBADDPDr132r: | |
| case X86::VFMSUBADDPDr132rY: | |
| case X86::VFMSUBADDPDr213r: | |
| case X86::VFMSUBADDPDr213rY: | |
| case X86::VFMSUBADDPDr231r: | |
| case X86::VFMSUBADDPDr231rY: | |
| case X86::VFMSUBADDPSr132r: | |
| case X86::VFMSUBADDPSr132rY: | |
| case X86::VFMSUBADDPSr213r: | |
| case X86::VFMSUBADDPSr213rY: | |
| case X86::VFMSUBADDPSr231r: | |
| case X86::VFMSUBADDPSr231rY: | |
| case X86::VFMSUBPDr132r: | |
| case X86::VFMSUBPDr132rY: | |
| case X86::VFMSUBPDr213r: | |
| case X86::VFMSUBPDr213rY: | |
| case X86::VFMSUBPDr231r: | |
| case X86::VFMSUBPDr231rY: | |
| case X86::VFMSUBPSr132r: | |
| case X86::VFMSUBPSr132rY: | |
| case X86::VFMSUBPSr213r: | |
| case X86::VFMSUBPSr213rY: | |
| case X86::VFMSUBPSr231r: | |
| case X86::VFMSUBPSr231rY: | |
| case X86::VFNMADDPDr132r: | |
| case X86::VFNMADDPDr132rY: | |
| case X86::VFNMADDPDr213r: | |
| case X86::VFNMADDPDr213rY: | |
| case X86::VFNMADDPDr231r: | |
| case X86::VFNMADDPDr231rY: | |
| case X86::VFNMADDPSr132r: | |
| case X86::VFNMADDPSr132rY: | |
| case X86::VFNMADDPSr213r: | |
| case X86::VFNMADDPSr213rY: | |
| case X86::VFNMADDPSr231r: | |
| case X86::VFNMADDPSr231rY: | |
| case X86::VFNMSUBPDr132r: | |
| case X86::VFNMSUBPDr132rY: | |
| case X86::VFNMSUBPDr213r: | |
| case X86::VFNMSUBPDr213rY: | |
| case X86::VFNMSUBPDr231r: | |
| case X86::VFNMSUBPDr231rY: | |
| case X86::VFNMSUBPSr132r: | |
| case X86::VFNMSUBPSr132rY: | |
| case X86::VFNMSUBPSr213r: | |
| case X86::VFNMSUBPSr213rY: | |
| case X86::VFNMSUBPSr231r: | |
| case X86::VFNMSUBPSr231rY: | |
| case X86::VFsANDNPDrr: | |
| case X86::VFsANDNPSrr: | |
| case X86::VFsANDPDrr: | |
| case X86::VFsANDPSrr: | |
| case X86::VFsORPDrr: | |
| case X86::VFsORPSrr: | |
| case X86::VFsXORPDrr: | |
| case X86::VFsXORPSrr: | |
| case X86::VHADDPDYrr: | |
| case X86::VHADDPDrr: | |
| case X86::VHADDPSYrr: | |
| case X86::VHADDPSrr: | |
| case X86::VHSUBPDYrr: | |
| case X86::VHSUBPDrr: | |
| case X86::VHSUBPSYrr: | |
| case X86::VHSUBPSrr: | |
| case X86::VMAXPDYrr: | |
| case X86::VMAXPDYrr_Int: | |
| case X86::VMAXPDrr: | |
| case X86::VMAXPDrr_Int: | |
| case X86::VMAXPSYrr: | |
| case X86::VMAXPSYrr_Int: | |
| case X86::VMAXPSrr: | |
| case X86::VMAXPSrr_Int: | |
| case X86::VMAXSDrr: | |
| case X86::VMAXSDrr_Int: | |
| case X86::VMAXSSrr: | |
| case X86::VMAXSSrr_Int: | |
| case X86::VMINPDYrr: | |
| case X86::VMINPDYrr_Int: | |
| case X86::VMINPDrr: | |
| case X86::VMINPDrr_Int: | |
| case X86::VMINPSYrr: | |
| case X86::VMINPSYrr_Int: | |
| case X86::VMINPSrr: | |
| case X86::VMINPSrr_Int: | |
| case X86::VMINSDrr: | |
| case X86::VMINSDrr_Int: | |
| case X86::VMINSSrr: | |
| case X86::VMINSSrr_Int: | |
| case X86::VMOVHLPSrr: | |
| case X86::VMOVLHPSrr: | |
| case X86::VMOVSDrr: | |
| case X86::VMOVSSrr: | |
| case X86::VMULPDYrr: | |
| case X86::VMULPDrr: | |
| case X86::VMULPSYrr: | |
| case X86::VMULPSrr: | |
| case X86::VMULSDrr: | |
| case X86::VMULSDrr_Int: | |
| case X86::VMULSSrr: | |
| case X86::VMULSSrr_Int: | |
| case X86::VORPDYrr: | |
| case X86::VORPDrr: | |
| case X86::VORPSYrr: | |
| case X86::VORPSrr: | |
| case X86::VPACKSSDWrr: | |
| case X86::VPACKSSWBrr: | |
| case X86::VPACKUSDWrr: | |
| case X86::VPACKUSWBrr: | |
| case X86::VPADDBrr: | |
| case X86::VPADDDrr: | |
| case X86::VPADDQrr: | |
| case X86::VPADDSBrr: | |
| case X86::VPADDSWrr: | |
| case X86::VPADDUSBrr: | |
| case X86::VPADDUSWrr: | |
| case X86::VPADDWrr: | |
| case X86::VPANDNrr: | |
| case X86::VPANDrr: | |
| case X86::VPAVGBrr: | |
| case X86::VPAVGWrr: | |
| case X86::VPCLMULHQHQDQrr: | |
| case X86::VPCLMULHQLQDQrr: | |
| case X86::VPCLMULLQHQDQrr: | |
| case X86::VPCLMULLQLQDQrr: | |
| case X86::VPCMPEQBrr: | |
| case X86::VPCMPEQDrr: | |
| case X86::VPCMPEQQrr: | |
| case X86::VPCMPEQWrr: | |
| case X86::VPCMPESTRIArr: | |
| case X86::VPCMPESTRICrr: | |
| case X86::VPCMPESTRIOrr: | |
| case X86::VPCMPESTRISrr: | |
| case X86::VPCMPESTRIZrr: | |
| case X86::VPCMPESTRIrr: | |
| case X86::VPCMPESTRM128rr: | |
| case X86::VPCMPGTBrr: | |
| case X86::VPCMPGTDrr: | |
| case X86::VPCMPGTQrr: | |
| case X86::VPCMPGTWrr: | |
| case X86::VPCMPISTRIArr: | |
| case X86::VPCMPISTRICrr: | |
| case X86::VPCMPISTRIOrr: | |
| case X86::VPCMPISTRISrr: | |
| case X86::VPCMPISTRIZrr: | |
| case X86::VPCMPISTRIrr: | |
| case X86::VPCMPISTRM128rr: | |
| case X86::VPERMILPDYri: | |
| case X86::VPERMILPDYrr: | |
| case X86::VPERMILPDri: | |
| case X86::VPERMILPDrr: | |
| case X86::VPERMILPSYri: | |
| case X86::VPERMILPSYrr: | |
| case X86::VPERMILPSri: | |
| case X86::VPERMILPSrr: | |
| case X86::VPEXTRBrr: | |
| case X86::VPEXTRBrr64: | |
| case X86::VPEXTRDrr: | |
| case X86::VPEXTRQrr: | |
| case X86::VPEXTRWri: | |
| case X86::VPHADDDrr128: | |
| case X86::VPHADDDrr64: | |
| case X86::VPHADDSWrr128: | |
| case X86::VPHADDSWrr64: | |
| case X86::VPHADDWrr128: | |
| case X86::VPHADDWrr64: | |
| case X86::VPHSUBDrr128: | |
| case X86::VPHSUBDrr64: | |
| case X86::VPHSUBSWrr128: | |
| case X86::VPHSUBSWrr64: | |
| case X86::VPHSUBWrr128: | |
| case X86::VPHSUBWrr64: | |
| case X86::VPMADDUBSWrr128: | |
| case X86::VPMADDUBSWrr64: | |
| case X86::VPMADDWDrr: | |
| case X86::VPMAXSBrr: | |
| case X86::VPMAXSDrr: | |
| case X86::VPMAXSWrr: | |
| case X86::VPMAXUBrr: | |
| case X86::VPMAXUDrr: | |
| case X86::VPMAXUWrr: | |
| case X86::VPMINSBrr: | |
| case X86::VPMINSDrr: | |
| case X86::VPMINSWrr: | |
| case X86::VPMINUBrr: | |
| case X86::VPMINUDrr: | |
| case X86::VPMINUWrr: | |
| case X86::VPMULDQrr: | |
| case X86::VPMULHRSWrr128: | |
| case X86::VPMULHRSWrr64: | |
| case X86::VPMULHUWrr: | |
| case X86::VPMULHWrr: | |
| case X86::VPMULLDrr: | |
| case X86::VPMULLWrr: | |
| case X86::VPMULUDQrr: | |
| case X86::VPORrr: | |
| case X86::VPSADBWrr: | |
| case X86::VPSHUFBrr128: | |
| case X86::VPSHUFBrr64: | |
| case X86::VPSHUFDri: | |
| case X86::VPSHUFHWri: | |
| case X86::VPSHUFLWri: | |
| case X86::VPSIGNBrr128: | |
| case X86::VPSIGNBrr64: | |
| case X86::VPSIGNDrr128: | |
| case X86::VPSIGNDrr64: | |
| case X86::VPSIGNWrr128: | |
| case X86::VPSIGNWrr64: | |
| case X86::VPSLLDQri: | |
| case X86::VPSLLDri: | |
| case X86::VPSLLDrr: | |
| case X86::VPSLLQri: | |
| case X86::VPSLLQrr: | |
| case X86::VPSLLWri: | |
| case X86::VPSLLWrr: | |
| case X86::VPSRADri: | |
| case X86::VPSRADrr: | |
| case X86::VPSRAWri: | |
| case X86::VPSRAWrr: | |
| case X86::VPSRLDQri: | |
| case X86::VPSRLDri: | |
| case X86::VPSRLDrr: | |
| case X86::VPSRLQri: | |
| case X86::VPSRLQrr: | |
| case X86::VPSRLWri: | |
| case X86::VPSRLWrr: | |
| case X86::VPSUBBrr: | |
| case X86::VPSUBDrr: | |
| case X86::VPSUBQrr: | |
| case X86::VPSUBSBrr: | |
| case X86::VPSUBSWrr: | |
| case X86::VPSUBUSBrr: | |
| case X86::VPSUBUSWrr: | |
| case X86::VPSUBWrr: | |
| case X86::VPUNPCKHBWrr: | |
| case X86::VPUNPCKHDQrr: | |
| case X86::VPUNPCKHQDQrr: | |
| case X86::VPUNPCKHWDrr: | |
| case X86::VPUNPCKLBWrr: | |
| case X86::VPUNPCKLDQrr: | |
| case X86::VPUNPCKLQDQrr: | |
| case X86::VPUNPCKLWDrr: | |
| case X86::VPXORrr: | |
| case X86::VRCPSSr: | |
| case X86::VROUNDPDr: | |
| case X86::VROUNDPDr_Int: | |
| case X86::VROUNDPSr: | |
| case X86::VROUNDPSr_Int: | |
| case X86::VROUNDYPDr: | |
| case X86::VROUNDYPDr_Int: | |
| case X86::VROUNDYPSr: | |
| case X86::VROUNDYPSr_Int: | |
| case X86::VRSQRTSSr: | |
| case X86::VSQRTSDr: | |
| case X86::VSQRTSSr: | |
| case X86::VSUBPDYrr: | |
| case X86::VSUBPDrr: | |
| case X86::VSUBPSYrr: | |
| case X86::VSUBPSrr: | |
| case X86::VSUBSDrr: | |
| case X86::VSUBSDrr_Int: | |
| case X86::VSUBSSrr: | |
| case X86::VSUBSSrr_Int: | |
| case X86::VUNPCKHPDYrr: | |
| case X86::VUNPCKHPDrr: | |
| case X86::VUNPCKHPSYrr: | |
| case X86::VUNPCKHPSrr: | |
| case X86::VUNPCKLPDYrr: | |
| case X86::VUNPCKLPDrr: | |
| case X86::VUNPCKLPSYrr: | |
| case X86::VUNPCKLPSrr: | |
| case X86::VXORPDYrr: | |
| case X86::VXORPDrr: | |
| case X86::VXORPSYrr: | |
| case X86::VXORPSrr: printOperand(MI, 2, O); break; | |
| case X86::BLENDPDrmi: | |
| case X86::BLENDPSrmi: | |
| case X86::CMPPDrmi_alt: | |
| case X86::CMPPSrmi_alt: | |
| case X86::CMPSDrm_alt: | |
| case X86::CMPSSrm_alt: | |
| case X86::DPPDrmi: | |
| case X86::DPPSrmi: | |
| case X86::INSERTPSrm: | |
| case X86::MMX_PINSRWrmi: | |
| case X86::MPSADBWrmi: | |
| case X86::PALIGNR128rm: | |
| case X86::PALIGNR64rm: | |
| case X86::PBLENDWrmi: | |
| case X86::PINSRBrm: | |
| case X86::PINSRDrm: | |
| case X86::PINSRQrm: | |
| case X86::PINSRWrmi: | |
| case X86::ROUNDSDm_Int: | |
| case X86::ROUNDSSm_Int: | |
| case X86::SHUFPDrmi: | |
| case X86::SHUFPSrmi: printOperand(MI, 7, O); break; | |
| case X86::BLENDPDrri: | |
| case X86::BLENDPSrri: | |
| case X86::CMPPDrri_alt: | |
| case X86::CMPPSrri_alt: | |
| case X86::CMPSDrr_alt: | |
| case X86::CMPSSrr_alt: | |
| case X86::DPPDrri: | |
| case X86::DPPSrri: | |
| case X86::INSERTPSrr: | |
| case X86::MMX_PINSRWrri: | |
| case X86::MPSADBWrri: | |
| case X86::PALIGNR128rr: | |
| case X86::PALIGNR64rr: | |
| case X86::PBLENDWrri: | |
| case X86::PINSRBrr: | |
| case X86::PINSRDrr: | |
| case X86::PINSRQrr: | |
| case X86::PINSRWrri: | |
| case X86::ROUNDSDr_Int: | |
| case X86::ROUNDSSr_Int: | |
| case X86::SHLD16rri8: | |
| case X86::SHLD32rri8: | |
| case X86::SHLD64rri8: | |
| case X86::SHRD16rri8: | |
| case X86::SHRD32rri8: | |
| case X86::SHRD64rri8: | |
| case X86::SHUFPDrri: | |
| case X86::SHUFPSrri: printOperand(MI, 3, O); break; | |
| case X86::Int_VCMPSDrm: | |
| case X86::Int_VCVTSD2SSrm: | |
| case X86::VADDSDrm: | |
| case X86::VADDSDrm_Int: | |
| case X86::VCMPSDrm: | |
| case X86::VCVTSD2SSrm: | |
| case X86::VDIVSDrm: | |
| case X86::VDIVSDrm_Int: | |
| case X86::VMAXSDrm: | |
| case X86::VMAXSDrm_Int: | |
| case X86::VMINSDrm: | |
| case X86::VMINSDrm_Int: | |
| case X86::VMOVHPDrm: | |
| case X86::VMOVHPSrm: | |
| case X86::VMOVLPDrm: | |
| case X86::VMOVLPSrm: | |
| case X86::VMULSDrm: | |
| case X86::VMULSDrm_Int: | |
| case X86::VSQRTSDm: | |
| case X86::VSUBSDrm: | |
| case X86::VSUBSDrm_Int: printf64mem(MI, 2, O); break; | |
| case X86::Int_VCMPSSrm: | |
| case X86::Int_VCVTSS2SDrm: | |
| case X86::VADDSSrm: | |
| case X86::VADDSSrm_Int: | |
| case X86::VCMPSSrm: | |
| case X86::VCVTSS2SDrm: | |
| case X86::VDIVSSrm: | |
| case X86::VDIVSSrm_Int: | |
| case X86::VMAXSSrm: | |
| case X86::VMAXSSrm_Int: | |
| case X86::VMINSSrm: | |
| case X86::VMINSSrm_Int: | |
| case X86::VMULSSrm: | |
| case X86::VMULSSrm_Int: | |
| case X86::VRCPSSm: | |
| case X86::VRSQRTSSm: | |
| case X86::VSQRTSSm: | |
| case X86::VSUBSSrm: | |
| case X86::VSUBSSrm_Int: printf32mem(MI, 2, O); break; | |
| case X86::Int_VCVTSI2SD64rm: | |
| case X86::Int_VCVTSI2SS64rm: | |
| case X86::VCVTSI2SD64rm: | |
| case X86::VCVTSI2SS64rm: | |
| case X86::VPHADDDrm64: | |
| case X86::VPHADDSWrm64: | |
| case X86::VPHADDWrm64: | |
| case X86::VPHSUBDrm64: | |
| case X86::VPHSUBSWrm64: | |
| case X86::VPHSUBWrm64: | |
| case X86::VPMADDUBSWrm64: | |
| case X86::VPMULHRSWrm64: | |
| case X86::VPSHUFBrm64: | |
| case X86::VPSIGNBrm64: | |
| case X86::VPSIGNDrm64: | |
| case X86::VPSIGNWrm64: printi64mem(MI, 2, O); break; | |
| case X86::Int_VCVTSI2SDrm: | |
| case X86::Int_VCVTSI2SSrm: | |
| case X86::VCVTSI2SDLrm: | |
| case X86::VCVTSI2SDrm: | |
| case X86::VCVTSI2SSrm: printi32mem(MI, 2, O); break; | |
| case X86::VADDPDYrm: | |
| case X86::VADDPSYrm: | |
| case X86::VADDSUBPDYrm: | |
| case X86::VADDSUBPSYrm: | |
| case X86::VANDNPDYrm: | |
| case X86::VANDNPSYrm: | |
| case X86::VANDPDYrm: | |
| case X86::VANDPSYrm: | |
| case X86::VDIVPDYrm: | |
| case X86::VDIVPSYrm: | |
| case X86::VFMADDPDr132mY: | |
| case X86::VFMADDPDr213mY: | |
| case X86::VFMADDPDr231mY: | |
| case X86::VFMADDPSr132mY: | |
| case X86::VFMADDPSr213mY: | |
| case X86::VFMADDPSr231mY: | |
| case X86::VFMADDSUBPDr132mY: | |
| case X86::VFMADDSUBPDr213mY: | |
| case X86::VFMADDSUBPDr231mY: | |
| case X86::VFMADDSUBPSr132mY: | |
| case X86::VFMADDSUBPSr213mY: | |
| case X86::VFMADDSUBPSr231mY: | |
| case X86::VFMSUBADDPDr132mY: | |
| case X86::VFMSUBADDPDr213mY: | |
| case X86::VFMSUBADDPDr231mY: | |
| case X86::VFMSUBADDPSr132mY: | |
| case X86::VFMSUBADDPSr213mY: | |
| case X86::VFMSUBADDPSr231mY: | |
| case X86::VFMSUBPDr132mY: | |
| case X86::VFMSUBPDr213mY: | |
| case X86::VFMSUBPDr231mY: | |
| case X86::VFMSUBPSr132mY: | |
| case X86::VFMSUBPSr213mY: | |
| case X86::VFMSUBPSr231mY: | |
| case X86::VFNMADDPDr132mY: | |
| case X86::VFNMADDPDr213mY: | |
| case X86::VFNMADDPDr231mY: | |
| case X86::VFNMADDPSr132mY: | |
| case X86::VFNMADDPSr213mY: | |
| case X86::VFNMADDPSr231mY: | |
| case X86::VFNMSUBPDr132mY: | |
| case X86::VFNMSUBPDr213mY: | |
| case X86::VFNMSUBPDr231mY: | |
| case X86::VFNMSUBPSr132mY: | |
| case X86::VFNMSUBPSr213mY: | |
| case X86::VFNMSUBPSr231mY: | |
| case X86::VHADDPDYrm: | |
| case X86::VHADDPSYrm: | |
| case X86::VHSUBPDYrm: | |
| case X86::VHSUBPSYrm: | |
| case X86::VMASKMOVPDYrm: | |
| case X86::VMASKMOVPSYrm: | |
| case X86::VMAXPDYrm: | |
| case X86::VMAXPDYrm_Int: | |
| case X86::VMAXPSYrm: | |
| case X86::VMAXPSYrm_Int: | |
| case X86::VMINPDYrm: | |
| case X86::VMINPDYrm_Int: | |
| case X86::VMINPSYrm: | |
| case X86::VMINPSYrm_Int: | |
| case X86::VMULPDYrm: | |
| case X86::VMULPSYrm: | |
| case X86::VORPDYrm: | |
| case X86::VORPSYrm: | |
| case X86::VSUBPDYrm: | |
| case X86::VSUBPSYrm: | |
| case X86::VUNPCKHPDYrm: | |
| case X86::VUNPCKHPSYrm: | |
| case X86::VUNPCKLPDYrm: | |
| case X86::VUNPCKLPSYrm: | |
| case X86::VXORPDYrm: | |
| case X86::VXORPSYrm: printf256mem(MI, 2, O); break; | |
| case X86::VADDPDrm: | |
| case X86::VADDPSrm: | |
| case X86::VADDSUBPDrm: | |
| case X86::VADDSUBPSrm: | |
| case X86::VANDNPDrm: | |
| case X86::VANDNPSrm: | |
| case X86::VANDPDrm: | |
| case X86::VANDPSrm: | |
| case X86::VCMPPDYrmi: | |
| case X86::VCMPPDrmi: | |
| case X86::VCMPPSYrmi: | |
| case X86::VCMPPSrmi: | |
| case X86::VDIVPDrm: | |
| case X86::VDIVPSrm: | |
| case X86::VFMADDPDr132m: | |
| case X86::VFMADDPDr213m: | |
| case X86::VFMADDPDr231m: | |
| case X86::VFMADDPSr132m: | |
| case X86::VFMADDPSr213m: | |
| case X86::VFMADDPSr231m: | |
| case X86::VFMADDSUBPDr132m: | |
| case X86::VFMADDSUBPDr213m: | |
| case X86::VFMADDSUBPDr231m: | |
| case X86::VFMADDSUBPSr132m: | |
| case X86::VFMADDSUBPSr213m: | |
| case X86::VFMADDSUBPSr231m: | |
| case X86::VFMSUBADDPDr132m: | |
| case X86::VFMSUBADDPDr213m: | |
| case X86::VFMSUBADDPDr231m: | |
| case X86::VFMSUBADDPSr132m: | |
| case X86::VFMSUBADDPSr213m: | |
| case X86::VFMSUBADDPSr231m: | |
| case X86::VFMSUBPDr132m: | |
| case X86::VFMSUBPDr213m: | |
| case X86::VFMSUBPDr231m: | |
| case X86::VFMSUBPSr132m: | |
| case X86::VFMSUBPSr213m: | |
| case X86::VFMSUBPSr231m: | |
| case X86::VFNMADDPDr132m: | |
| case X86::VFNMADDPDr213m: | |
| case X86::VFNMADDPDr231m: | |
| case X86::VFNMADDPSr132m: | |
| case X86::VFNMADDPSr213m: | |
| case X86::VFNMADDPSr231m: | |
| case X86::VFNMSUBPDr132m: | |
| case X86::VFNMSUBPDr213m: | |
| case X86::VFNMSUBPDr231m: | |
| case X86::VFNMSUBPSr132m: | |
| case X86::VFNMSUBPSr213m: | |
| case X86::VFNMSUBPSr231m: | |
| case X86::VFsANDNPDrm: | |
| case X86::VFsANDNPSrm: | |
| case X86::VFsANDPDrm: | |
| case X86::VFsANDPSrm: | |
| case X86::VFsORPDrm: | |
| case X86::VFsORPSrm: | |
| case X86::VFsXORPDrm: | |
| case X86::VFsXORPSrm: | |
| case X86::VHADDPDrm: | |
| case X86::VHADDPSrm: | |
| case X86::VHSUBPDrm: | |
| case X86::VHSUBPSrm: | |
| case X86::VMASKMOVPDrm: | |
| case X86::VMASKMOVPSrm: | |
| case X86::VMAXPDrm: | |
| case X86::VMAXPDrm_Int: | |
| case X86::VMAXPSrm: | |
| case X86::VMAXPSrm_Int: | |
| case X86::VMINPDrm: | |
| case X86::VMINPDrm_Int: | |
| case X86::VMINPSrm: | |
| case X86::VMINPSrm_Int: | |
| case X86::VMULPDrm: | |
| case X86::VMULPSrm: | |
| case X86::VORPDrm: | |
| case X86::VORPSrm: | |
| case X86::VSUBPDrm: | |
| case X86::VSUBPSrm: | |
| case X86::VUNPCKHPDrm: | |
| case X86::VUNPCKHPSrm: | |
| case X86::VUNPCKLPDrm: | |
| case X86::VUNPCKLPSrm: | |
| case X86::VXORPDrm: | |
| case X86::VXORPSrm: printf128mem(MI, 2, O); break; | |
| case X86::VAESDECLASTrm: | |
| case X86::VAESDECrm: | |
| case X86::VAESENCLASTrm: | |
| case X86::VAESENCrm: | |
| case X86::VPACKSSDWrm: | |
| case X86::VPACKSSWBrm: | |
| case X86::VPACKUSDWrm: | |
| case X86::VPACKUSWBrm: | |
| case X86::VPADDBrm: | |
| case X86::VPADDDrm: | |
| case X86::VPADDQrm: | |
| case X86::VPADDSBrm: | |
| case X86::VPADDSWrm: | |
| case X86::VPADDUSBrm: | |
| case X86::VPADDUSWrm: | |
| case X86::VPADDWrm: | |
| case X86::VPANDNrm: | |
| case X86::VPANDrm: | |
| case X86::VPAVGBrm: | |
| case X86::VPAVGWrm: | |
| case X86::VPCLMULHQHQDQrm: | |
| case X86::VPCLMULHQLQDQrm: | |
| case X86::VPCLMULLQHQDQrm: | |
| case X86::VPCLMULLQLQDQrm: | |
| case X86::VPCMPEQBrm: | |
| case X86::VPCMPEQDrm: | |
| case X86::VPCMPEQQrm: | |
| case X86::VPCMPEQWrm: | |
| case X86::VPCMPGTBrm: | |
| case X86::VPCMPGTDrm: | |
| case X86::VPCMPGTQrm: | |
| case X86::VPCMPGTWrm: | |
| case X86::VPERMILPDrm: | |
| case X86::VPERMILPSrm: | |
| case X86::VPHADDDrm128: | |
| case X86::VPHADDSWrm128: | |
| case X86::VPHADDWrm128: | |
| case X86::VPHSUBDrm128: | |
| case X86::VPHSUBSWrm128: | |
| case X86::VPHSUBWrm128: | |
| case X86::VPMADDUBSWrm128: | |
| case X86::VPMADDWDrm: | |
| case X86::VPMAXSBrm: | |
| case X86::VPMAXSDrm: | |
| case X86::VPMAXSWrm: | |
| case X86::VPMAXUBrm: | |
| case X86::VPMAXUDrm: | |
| case X86::VPMAXUWrm: | |
| case X86::VPMINSBrm: | |
| case X86::VPMINSDrm: | |
| case X86::VPMINSWrm: | |
| case X86::VPMINUBrm: | |
| case X86::VPMINUDrm: | |
| case X86::VPMINUWrm: | |
| case X86::VPMULDQrm: | |
| case X86::VPMULHRSWrm128: | |
| case X86::VPMULHUWrm: | |
| case X86::VPMULHWrm: | |
| case X86::VPMULLDrm: | |
| case X86::VPMULLWrm: | |
| case X86::VPMULUDQrm: | |
| case X86::VPORrm: | |
| case X86::VPSADBWrm: | |
| case X86::VPSHUFBrm128: | |
| case X86::VPSIGNBrm128: | |
| case X86::VPSIGNDrm128: | |
| case X86::VPSIGNWrm128: | |
| case X86::VPSLLDrm: | |
| case X86::VPSLLQrm: | |
| case X86::VPSLLWrm: | |
| case X86::VPSRADrm: | |
| case X86::VPSRAWrm: | |
| case X86::VPSRLDrm: | |
| case X86::VPSRLQrm: | |
| case X86::VPSRLWrm: | |
| case X86::VPSUBBrm: | |
| case X86::VPSUBDrm: | |
| case X86::VPSUBQrm: | |
| case X86::VPSUBSBrm: | |
| case X86::VPSUBSWrm: | |
| case X86::VPSUBUSBrm: | |
| case X86::VPSUBUSWrm: | |
| case X86::VPSUBWrm: | |
| case X86::VPUNPCKHBWrm: | |
| case X86::VPUNPCKHDQrm: | |
| case X86::VPUNPCKHQDQrm: | |
| case X86::VPUNPCKHWDrm: | |
| case X86::VPUNPCKLBWrm: | |
| case X86::VPUNPCKLDQrm: | |
| case X86::VPUNPCKLQDQrm: | |
| case X86::VPUNPCKLWDrm: | |
| case X86::VPXORrm: printi128mem(MI, 2, O); break; | |
| case X86::VPERMILPDYrm: | |
| case X86::VPERMILPSYrm: printi256mem(MI, 2, O); break; | |
| } | |
| return; | |
| break; | |
| case X86::BLENDVPDrm0: | |
| case X86::BLENDVPDrr0: | |
| case X86::BLENDVPSrm0: | |
| case X86::BLENDVPSrr0: | |
| case X86::MOV8mr_NOREX: | |
| case X86::MOV8rm_NOREX: | |
| case X86::MOV8rr_NOREX: | |
| case X86::MOVZX32_NOREXrm8: | |
| case X86::MOVZX32_NOREXrr8: | |
| case X86::PBLENDVBrm0: | |
| case X86::PBLENDVBrr0: | |
| case X86::SHLD16mrCL: | |
| case X86::SHLD16rrCL: | |
| case X86::SHLD32mrCL: | |
| case X86::SHLD32rrCL: | |
| case X86::SHLD64mrCL: | |
| case X86::SHLD64rrCL: | |
| case X86::SHRD16mrCL: | |
| case X86::SHRD16rrCL: | |
| case X86::SHRD32mrCL: | |
| case X86::SHRD32rrCL: | |
| case X86::SHRD64mrCL: | |
| case X86::SHRD64rrCL: | |
| case X86::VRCPSSm_Int: | |
| case X86::VRCPSSr_Int: | |
| case X86::VRSQRTSSm_Int: | |
| case X86::VRSQRTSSr_Int: | |
| case X86::VSQRTSDm_Int: | |
| case X86::VSQRTSDr_Int: | |
| case X86::VSQRTSSm_Int: | |
| case X86::VSQRTSSr_Int: | |
| switch (MI->getOpcode()) { | |
| case X86::BLENDVPDrm0: | |
| case X86::BLENDVPDrr0: | |
| case X86::BLENDVPSrm0: | |
| case X86::BLENDVPSrr0: | |
| case X86::PBLENDVBrm0: | |
| case X86::PBLENDVBrr0: O << ", %xmm0"; break; | |
| case X86::MOV8mr_NOREX: | |
| case X86::MOV8rm_NOREX: | |
| case X86::MOV8rr_NOREX: | |
| case X86::MOVZX32_NOREXrm8: | |
| case X86::MOVZX32_NOREXrr8: O << " # NOREX"; break; | |
| case X86::SHLD16mrCL: | |
| case X86::SHLD16rrCL: | |
| case X86::SHLD32mrCL: | |
| case X86::SHLD32rrCL: | |
| case X86::SHRD16mrCL: | |
| case X86::SHRD16rrCL: | |
| case X86::SHRD32mrCL: | |
| case X86::SHRD32rrCL: O << ", CL"; break; | |
| case X86::SHLD64mrCL: | |
| case X86::SHLD64rrCL: | |
| case X86::SHRD64mrCL: | |
| case X86::SHRD64rrCL: O << ", %CL"; break; | |
| case X86::VRCPSSm_Int: | |
| case X86::VRSQRTSSm_Int: | |
| case X86::VSQRTSSm_Int: printf32mem(MI, 1, O); break; | |
| case X86::VRCPSSr_Int: | |
| case X86::VRSQRTSSr_Int: | |
| case X86::VSQRTSDr_Int: | |
| case X86::VSQRTSSr_Int: printOperand(MI, 1, O); break; | |
| case X86::VSQRTSDm_Int: printf64mem(MI, 1, O); break; | |
| } | |
| return; | |
| break; | |
| case X86::VBLENDPDYrmi: | |
| case X86::VBLENDPDrmi: | |
| case X86::VBLENDPSYrmi: | |
| case X86::VBLENDPSrmi: | |
| case X86::VBLENDVPDYrm: | |
| case X86::VBLENDVPDrm: | |
| case X86::VBLENDVPSYrm: | |
| case X86::VBLENDVPSrm: | |
| case X86::VCMPPDYrmi_alt: | |
| case X86::VCMPPDrmi_alt: | |
| case X86::VCMPPSYrmi_alt: | |
| case X86::VCMPPSrmi_alt: | |
| case X86::VCMPSDrm_alt: | |
| case X86::VCMPSSrm_alt: | |
| case X86::VDPPDrmi: | |
| case X86::VDPPSYrmi: | |
| case X86::VDPPSrmi: | |
| case X86::VINSERTF128rm: | |
| case X86::VINSERTPSrm: | |
| case X86::VMPSADBWrmi: | |
| case X86::VPALIGNR128rm: | |
| case X86::VPALIGNR64rm: | |
| case X86::VPBLENDVBrm: | |
| case X86::VPBLENDWrmi: | |
| case X86::VPCLMULQDQrm: | |
| case X86::VPERM2F128rm: | |
| case X86::VPINSRBrm: | |
| case X86::VPINSRDrm: | |
| case X86::VPINSRQrm: | |
| case X86::VPINSRWrmi: | |
| case X86::VROUNDSDm: | |
| case X86::VROUNDSDm_Int: | |
| case X86::VROUNDSSm: | |
| case X86::VROUNDSSm_Int: | |
| case X86::VSHUFPDYrmi: | |
| case X86::VSHUFPDrmi: | |
| case X86::VSHUFPSYrmi: | |
| case X86::VSHUFPSrmi: | |
| O << ", "; | |
| switch (MI->getOpcode()) { | |
| case X86::VBLENDPDYrmi: | |
| case X86::VBLENDPSYrmi: | |
| case X86::VBLENDVPDYrm: | |
| case X86::VBLENDVPSYrm: | |
| case X86::VDPPSYrmi: printi256mem(MI, 2, O); break; | |
| case X86::VBLENDPDrmi: | |
| case X86::VBLENDPSrmi: | |
| case X86::VBLENDVPDrm: | |
| case X86::VBLENDVPSrm: | |
| case X86::VDPPDrmi: | |
| case X86::VDPPSrmi: | |
| case X86::VMPSADBWrmi: | |
| case X86::VPALIGNR128rm: | |
| case X86::VPBLENDVBrm: | |
| case X86::VPBLENDWrmi: | |
| case X86::VPCLMULQDQrm: printi128mem(MI, 2, O); break; | |
| case X86::VCMPPDYrmi_alt: | |
| case X86::VCMPPDrmi_alt: | |
| case X86::VCMPPSYrmi_alt: | |
| case X86::VCMPPSrmi_alt: | |
| case X86::VINSERTF128rm: | |
| case X86::VSHUFPDYrmi: | |
| case X86::VSHUFPDrmi: | |
| case X86::VSHUFPSYrmi: | |
| case X86::VSHUFPSrmi: printf128mem(MI, 2, O); break; | |
| case X86::VCMPSDrm_alt: | |
| case X86::VROUNDSDm: | |
| case X86::VROUNDSDm_Int: printf64mem(MI, 2, O); break; | |
| case X86::VCMPSSrm_alt: | |
| case X86::VINSERTPSrm: | |
| case X86::VROUNDSSm: | |
| case X86::VROUNDSSm_Int: printf32mem(MI, 2, O); break; | |
| case X86::VPALIGNR64rm: | |
| case X86::VPINSRQrm: printi64mem(MI, 2, O); break; | |
| case X86::VPERM2F128rm: printf256mem(MI, 2, O); break; | |
| case X86::VPINSRBrm: printi8mem(MI, 2, O); break; | |
| case X86::VPINSRDrm: printi32mem(MI, 2, O); break; | |
| case X86::VPINSRWrmi: printi16mem(MI, 2, O); break; | |
| } | |
| O << ", "; | |
| printOperand(MI, 7, O); | |
| return; | |
| break; | |
| case X86::VBLENDPDYrri: | |
| case X86::VBLENDPDrri: | |
| case X86::VBLENDPSYrri: | |
| case X86::VBLENDPSrri: | |
| case X86::VBLENDVPDYrr: | |
| case X86::VBLENDVPDrr: | |
| case X86::VBLENDVPSYrr: | |
| case X86::VBLENDVPSrr: | |
| case X86::VCMPPDYrri_alt: | |
| case X86::VCMPPDrri_alt: | |
| case X86::VCMPPSYrri_alt: | |
| case X86::VCMPPSrri_alt: | |
| case X86::VCMPSDrr_alt: | |
| case X86::VCMPSSrr_alt: | |
| case X86::VDPPDrri: | |
| case X86::VDPPSYrri: | |
| case X86::VDPPSrri: | |
| case X86::VINSERTF128rr: | |
| case X86::VINSERTPSrr: | |
| case X86::VMPSADBWrri: | |
| case X86::VPALIGNR128rr: | |
| case X86::VPALIGNR64rr: | |
| case X86::VPBLENDVBrr: | |
| case X86::VPBLENDWrri: | |
| case X86::VPCLMULQDQrr: | |
| case X86::VPERM2F128rr: | |
| case X86::VPINSRBrr: | |
| case X86::VPINSRDrr: | |
| case X86::VPINSRQrr: | |
| case X86::VPINSRWrr64i: | |
| case X86::VPINSRWrri: | |
| case X86::VROUNDSDr: | |
| case X86::VROUNDSDr_Int: | |
| case X86::VROUNDSSr: | |
| case X86::VROUNDSSr_Int: | |
| case X86::VSHUFPDYrri: | |
| case X86::VSHUFPDrri: | |
| case X86::VSHUFPSYrri: | |
| case X86::VSHUFPSrri: | |
| O << ", "; | |
| printOperand(MI, 2, O); | |
| O << ", "; | |
| printOperand(MI, 3, O); | |
| return; | |
| break; | |
| } | |
| return; | |
| } | |
| /// getRegisterName - This method is automatically generated by tblgen | |
| /// from the register set description. This returns the assembler name | |
| /// for the specified register. | |
| const char *X86IntelInstPrinter::getRegisterName(unsigned RegNo) { | |
| assert(RegNo && RegNo < 153 && "Invalid register number!"); | |
| static const unsigned RegAsmOffset[] = { | |
| 0, 3, 6, 9, 12, 15, 18, 22, 25, 28, 31, 35, 39, 43, | |
| 47, 51, 55, 59, 63, 67, 70, 73, 76, 79, 83, 86, 90, 94, | |
| 98, 102, 106, 110, 114, 118, 121, 124, 128, 132, 136, 140, 144, 148, | |
| 154, 158, 162, 165, 169, 173, 177, 181, 185, 189, 193, 197, 201, 204, | |
| 207, 210, 214, 218, 222, 226, 230, 234, 238, 242, 245, 249, 253, 257, | |
| 260, 264, 268, 272, 276, 281, 286, 291, 295, 300, 305, 310, 314, 319, | |
| 324, 329, 333, 338, 343, 348, 352, 357, 362, 367, 371, 376, 381, 386, | |
| 390, 394, 398, 402, 406, 410, 414, 418, 422, 426, 429, 433, 436, 440, | |
| 443, 449, 455, 461, 467, 473, 479, 485, 491, 496, 501, 506, 511, 516, | |
| 521, 526, 531, 536, 541, 547, 553, 559, 565, 571, 577, 582, 587, 592, | |
| 597, 602, 607, 612, 617, 622, 627, 633, 639, 645, 651, 657, 0 | |
| }; | |
| const char *AsmStrs = | |
| "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cr0\000cr1" | |
| "\000cr2\000cr3\000cr4\000cr5\000cr6\000cr7\000cr8\000cs\000cx\000dh\000" | |
| "di\000dil\000dl\000dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000dr7" | |
| "\000ds\000dx\000eax\000ebp\000ebx\000ecx\000edi\000edx\000flags\000eip\000" | |
| "eiz\000es\000esi\000esp\000fp0\000fp1\000fp2\000fp3\000fp4\000fp5\000fp" | |
| "6\000fs\000gs\000ip\000mm0\000mm1\000mm2\000mm3\000mm4\000mm5\000mm6\000" | |
| "mm7\000r8\000r8b\000r8d\000r8w\000r9\000r9b\000r9d\000r9w\000r10\000r10" | |
| "b\000r10d\000r10w\000r11\000r11b\000r11d\000r11w\000r12\000r12b\000r12d" | |
| "\000r12w\000r13\000r13b\000r13d\000r13w\000r14\000r14b\000r14d\000r14w\000" | |
| "r15\000r15b\000r15d\000r15w\000rax\000rbp\000rbx\000rcx\000rdi\000rdx\000" | |
| "rip\000riz\000rsi\000rsp\000si\000sil\000sp\000spl\000ss\000st(0)\000st" | |
| "(1)\000st(2)\000st(3)\000st(4)\000st(5)\000st(6)\000st(7)\000xmm0\000xm" | |
| "m1\000xmm2\000xmm3\000xmm4\000xmm5\000xmm6\000xmm7\000xmm8\000xmm9\000x" | |
| "mm10\000xmm11\000xmm12\000xmm13\000xmm14\000xmm15\000ymm0\000ymm1\000ym" | |
| "m2\000ymm3\000ymm4\000ymm5\000ymm6\000ymm7\000ymm8\000ymm9\000ymm10\000" | |
| "ymm11\000ymm12\000ymm13\000ymm14\000ymm15\000"; | |
| return AsmStrs+RegAsmOffset[RegNo-1]; | |
| } | |
| #ifdef GET_INSTRUCTION_NAME | |
| #undef GET_INSTRUCTION_NAME | |
| /// getInstructionName: This method is automatically generated by tblgen | |
| /// from the instruction set description. This returns the enum name of the | |
| /// specified instruction. | |
| const char *X86IntelInstPrinter::getInstructionName(unsigned Opcode) { | |
| assert(Opcode < 3678 && "Invalid instruction number!"); | |
| static const unsigned InstAsmOffset[] = { | |
| 0, 4, 14, 27, 36, 45, 50, 65, 79, 92, 106, 123, 133, 146, | |
| 151, 157, 166, 175, 184, 193, 201, 210, 218, 226, 235, 243, 251, 263, | |
| 272, 280, 289, 297, 305, 314, 322, 330, 342, 351, 361, 370, 378, 388, | |
| 397, 405, 413, 425, 432, 439, 446, 453, 460, 467, 478, 487, 495, 504, | |
| 512, 520, 529, 537, 545, 557, 566, 574, 583, 591, 599, 608, 616, 624, | |
| 636, 645, 655, 664, 672, 682, 691, 699, 707, 719, 726, 733, 740, 747, | |
| 754, 761, 772, 780, 788, 796, 804, 812, 824, 832, 844, 852, 864, 872, | |
| 884, 895, 906, 917, 928, 937, 946, 956, 966, 977, 987, 996, 1006, 1015, | |
| 1025, 1037, 1046, 1058, 1070, 1083, 1096, 1109, 1122, 1135, 1148, 1158, 1177, 1196, | |
| 1213, 1230, 1243, 1256, 1265, 1274, 1287, 1300, 1309, 1318, 1327, 1336, 1357, 1378, | |
| 1387, 1395, 1404, 1412, 1420, 1429, 1437, 1445, 1457, 1466, 1474, 1483, 1491, 1499, | |
| 1508, 1516, 1524, 1536, 1545, 1555, 1564, 1572, 1582, 1591, 1599, 1607, 1619, 1626, | |
| 1633, 1640, 1647, 1654, 1661, 1672, 1681, 1690, 1699, 1708, 1716, 1724, 1732, 1740, | |
| 1752, 1762, 1772, 1782, 1794, 1803, 1813, 1823, 1833, 1843, 1853, 1863, 1874, 1885, | |
| 1896, 1909, 1919, 1928, 1937, 1946, 1957, 1965, 1977, 1990, 2001, 2012, 2023, 2034, | |
| 2045, 2056, 2066, 2076, 2086, 2098, 2107, 2118, 2129, 2140, 2151, 2163, 2175, 2187, | |
| 2199, 2207, 2215, 2223, 2231, 2239, 2247, 2255, 2263, 2271, 2279, 2287, 2295, 2304, | |
| 2313, 2321, 2328, 2336, 2343, 2351, 2358, 2366, 2373, 2381, 2388, 2396, 2403, 2412, | |
| 2420, 2429, 2437, 2446, 2454, 2463, 2471, 2480, 2488, 2497, 2505, 2514, 2522, 2531, | |
| 2539, 2548, 2556, 2565, 2573, 2582, 2590, 2599, 2607, 2616, 2624, 2633, 2641, 2650, | |
| 2658, 2667, 2675, 2684, 2692, 2701, 2709, 2717, 2725, 2733, 2747, 2755, 2767, 2779, | |
| 2783, 2787, 2792, 2798, 2807, 2816, 2825, 2829, 2833, 2841, 2845, 2850, 2854, 2864, | |
| 2874, 2884, 2894, 2904, 2914, 2925, 2936, 2947, 2958, 2969, 2980, 2990, 3000, 3010, | |
| 3020, 3030, 3040, 3051, 3062, 3073, 3084, 3095, 3106, 3115, 3127, 3139, 3151, 3159, | |
| 3170, 3181, 3192, 3202, 3212, 3222, 3232, 3242, 3252, 3260, 3271, 3282, 3293, 3303, | |
| 3313, 3323, 3333, 3343, 3353, 3364, 3375, 3386, 3397, 3408, 3419, 3429, 3439, 3449, | |
| 3459, 3469, 3479, 3490, 3501, 3512, 3523, 3534, 3545, 3555, 3568, 3581, 3594, 3603, | |
| 3615, 3627, 3639, 3650, 3661, 3672, 3683, 3694, 3705, 3714, 3726, 3738, 3750, 3761, | |
| 3772, 3783, 3794, 3805, 3816, 3827, 3838, 3849, 3860, 3871, 3882, 3891, 3903, 3915, | |
| 3927, 3938, 3949, 3960, 3971, 3982, 3993, 4003, 4013, 4023, 4033, 4043, 4053, 4063, | |
| 4073, 4083, 4093, 4103, 4113, 4121, 4132, 4143, 4154, 4164, 4174, 4184, 4194, 4204, | |
| 4214, 4224, 4234, 4244, 4254, 4263, 4274, 4285, 4296, 4307, 4318, 4329, 4340, 4349, | |
| 4357, 4366, 4374, 4382, 4391, 4399, 4407, 4419, 4428, 4436, 4445, 4453, 4461, 4470, | |
| 4478, 4486, 4498, 4507, 4517, 4526, 4534, 4545, 4555, 4564, 4572, 4580, 4587, 4594, | |
| 4601, 4608, 4615, 4622, 4633, 4642, 4655, 4664, 4677, 4686, 4699, 4708, 4721, 4728, | |
| 4735, 4742, 4748, 4756, 4768, 4776, 4788, 4796, 4808, 4816, 4828, 4839, 4851, 4863, | |
| 4875, 4887, 4899, 4911, 4921, 4932, 4943, 4952, 4961, 4970, 4979, 4990, 4999, 5007, | |
| 5017, 5023, 5032, 5041, 5050, 5056, 5060, 5069, 5078, 5086, 5095, 5104, 5112, 5121, | |
| 5129, 5138, 5146, 5156, 5167, 5178, 5189, 5200, 5211, 5222, 5233, 5244, 5255, 5266, | |
| 5277, 5288, 5301, 5314, 5325, 5336, 5349, 5362, 5373, 5384, 5397, 5410, 5421, 5432, | |
| 5443, 5454, 5467, 5480, 5491, 5502, 5514, 5526, 5540, 5554, 5566, 5578, 5592, 5606, | |
| 5618, 5630, 5634, 5639, 5646, 5653, 5660, 5667, 5677, 5687, 5697, 5707, 5714, 5721, | |
| 5727, 5733, 5740, 5747, 5754, 5761, 5768, 5775, 5781, 5787, 5795, 5803, 5811, 5819, | |
| 5829, 5839, 5850, 5861, 5873, 5884, 5895, 5906, 5919, 5932, 5945, 5959, 5973, 5987, | |
| 6001, 6015, 6029, 6040, 6048, 6060, 6068, 6080, 6088, 6100, 6108, 6120, 6129, 6138, | |
| 6148, 6158, 6169, 6179, 6188, 6198, 6207, 6217, 6229, 6238, 6250, 6262, 6275, 6288, | |
| 6301, 6314, 6327, 6340, 6350, 6358, 6366, 6374, 6382, 6392, 6402, 6414, 6420, 6430, | |
| 6442, 6454, 6460, 6471, 6482, 6493, 6504, 6514, 6524, 6534, 6544, 6554, 6563, 6569, | |
| 6576, 6584, 6592, 6601, 6610, 6617, 6625, 6631, 6640, 6649, 6659, 6669, 6677, 6686, | |
| 6694, 6701, 6708, 6715, 6722, 6728, 6735, 6742, 6747, 6757, 6766, 6774, 6795, 6816, | |
| 6837, 6858, 6879, 6900, 6921, 6942, 6963, 6970, 6976, 6983, 6989, 6997, 7005, 7012, | |
| 7019, 7027, 7035, 7046, 7056, 7061, 7069, 7076, 7084, 7090, 7098, 7111, 7124, 7137, | |
| 7150, 7163, 7176, 7189, 7202, 7215, 7228, 7241, 7254, 7265, 7276, 7287, 7298, 7308, | |
| 7318, 7328, 7338, 7347, 7356, 7367, 7378, 7389, 7400, 7409, 7418, 7427, 7436, 7446, | |
| 7456, 7466, 7476, 7487, 7497, 7506, 7515, 7524, 7533, 7537, 7546, 7555, 7564, 7573, | |
| 7581, 7589, 7597, 7605, 7613, 7621, 7628, 7635, 7644, 7653, 7662, 7674, 7686, 7698, | |
| 7710, 7722, 7734, 7746, 7758, 7770, 7778, 7786, 7795, 7805, 7816, 7825, 7835, 7846, | |
| 7854, 7862, 7871, 7881, 7892, 7901, 7911, 7922, 7930, 7938, 7947, 7959, 7970, 7979, | |
| 7991, 8002, 8009, 8016, 8021, 8028, 8035, 8040, 8047, 8054, 8058, 8064, 8070, 8077, | |
| 8084, 8091, 8098, 8108, 8118, 8128, 8138, 8145, 8152, 8158, 8164, 8175, 8186, 8190, | |
| 8195, 8200, 8205, 8212, 8219, 8227, 8234, 8241, 8248, 8259, 8270, 8281, 8294, 8307, | |
| 8320, 8333, 8346, 8359, 8372, 8385, 8398, 8407, 8416, 8426, 8436, 8446, 8458, 8470, | |
| 8482, 8494, 8506, 8518, 8530, 8542, 8554, 8566, 8578, 8590, 8602, 8615, 8628, 8641, | |
| 8654, 8669, 8684, 8699, 8714, 8729, 8744, 8759, 8774, 8789, 8804, 8819, 8834, 8849, | |
| 8864, 8879, 8894, 8909, 8924, 8939, 8954, 8971, 8988, 9003, 9018, 9033, 9048, 9065, | |
| 9082, 9097, 9112, 9129, 9146, 9161, 9176, 9191, 9206, 9223, 9240, 9255, 9270, 9286, | |
| 9302, 9318, 9334, 9350, 9366, 9382, 9398, 9416, 9434, 9450, 9466, 9484, 9502, 9518, | |
| 9534, 9549, 9569, 9591, 9605, 9619, 9633, 9647, 9660, 9673, 9686, 9699, 9713, 9727, | |
| 9741, 9755, 9771, 9787, 9803, 9819, 9835, 9851, 9867, 9883, 9899, 9915, 9931, 9947, | |
| 9965, 9983, 9999, 10015, 10031, 10047, 10065, 10083, 10099, 10115, 10133, 10151, 10167, 10183, | |
| 10199, 10215, 10233, 10251, 10267, 10283, 10300, 10317, 10334, 10351, 10370, 10389, 10406, 10423, | |
| 10442, 10461, 10478, 10495, 10510, 10525, 10540, 10555, 10561, 10567, 10572, 10577, 10583, 10589, | |
| 10594, 10599, 10605, 10610, 10615, 10621, 10627, 10632, 10637, 10643, 10649, 10654, 10659, 10666, | |
| 10673, 10680, 10693, 10700, 10706, 10712, 10718, 10724, 10730, 10736, 10742, 10748, 10754, 10760, | |
| 10765, 10770, 10775, 10780, 10785, 10790, 10795, 10803, 10811, 10819, 10827, 10835, 10843, 10854, | |
| 10865, 10876, 10886, 10897, 10905, 10913, 10921, 10929, 10935, 10941, 10949, 10957, 10965, 10974, | |
| 10983, 10992, 11001, 11010, 11019, 11028, 11039, 11050, 11059, 11070, 11079, 11086, 11093, 11100, | |
| 11110, 11117, 11123, 11131, 11139, 11147, 11154, 11162, 11170, 11178, 11184, 11192, 11200, 11208, | |
| 11214, 11222, 11230, 11238, 11246, 11259, 11273, 11286, 11299, 11313, 11326, 11341, 11355, 11368, | |
| 11380, 11392, 11404, 11416, 11428, 11439, 11451, 11463, 11475, 11486, 11498, 11511, 11525, 11538, | |
| 11551, 11565, 11578, 11593, 11607, 11620, 11632, 11644, 11650, 11656, 11662, 11668, 11673, 11679, | |
| 11686, 11691, 11697, 11705, 11713, 11721, 11729, 11737, 11745, 11753, 11761, 11769, 11774, 11779, | |
| 11787, 11795, 11803, 11810, 11821, 11834, 11842, 11854, 11862, 11874, 11882, 11894, 11902, 11914, | |
| 11922, 11934, 11942, 11954, 11962, 11974, 11982, 11994, 12001, 12014, 12022, 12034, 12042, 12054, | |
| 12062, 12074, 12082, 12094, 12102, 12114, 12122, 12134, 12142, 12154, 12162, 12174, 12189, 12204, | |
| 12219, 12234, 12249, 12264, 12279, 12294, 12310, 12326, 12342, 12358, 12367, 12377, 12390, 12405, | |
| 12424, 12438, 12451, 12464, 12477, 12494, 12511, 12525, 12541, 12554, 12568, 12584, 12597, 12610, | |
| 12623, 12640, 12657, 12672, 12687, 12702, 12717, 12732, 12747, 12759, 12771, 12783, 12795, 12807, | |
| 12819, 12832, 12845, 12858, 12871, 12885, 12899, 12913, 12927, 12939, 12951, 12963, 12975, 12986, | |
| 12997, 13009, 13021, 13033, 13045, 13059, 13073, 13087, 13101, 13115, 13129, 13143, 13157, 13171, | |
| 13185, 13199, 13213, 13226, 13240, 13254, 13268, 13282, 13295, 13308, 13321, 13334, 13347, 13360, | |
| 13373, 13386, 13401, 13415, 13429, 13442, 13455, 13468, 13481, 13495, 13509, 13519, 13529, 13542, | |
| 13555, 13568, 13581, 13593, 13605, 13617, 13629, 13641, 13653, 13665, 13677, 13689, 13701, 13713, | |
| 13725, 13737, 13749, 13761, 13773, 13785, 13797, 13809, 13821, 13833, 13845, 13857, 13869, 13881, | |
| 13893, 13905, 13917, 13929, 13941, 13954, 13967, 13980, 13993, 14007, 14021, 14035, 14049, 14061, | |
| 14073, 14089, 14105, 14121, 14137, 14153, 14169, 14185, 14201, 14217, 14233, 14249, 14265, 14276, | |
| 14287, 14298, 14315, 14323, 14333, 14341, 14349, 14357, 14367, 14375, 14383, 14391, 14399, 14411, | |
| 14419, 14427, 14435, 14445, 14453, 14461, 14469, 14477, 14488, 14496, 14506, 14514, 14522, 14530, | |
| 14538, 14546, 14557, 14565, 14577, 14588, 14596, 14604, 14612, 14622, 14632, 14642, 14651, 14659, | |
| 14667, 14677, 14685, 14696, 14704, 14714, 14723, 14731, 14739, 14747, 14755, 14765, 14778, 14790, | |
| 14798, 14809, 14817, 14829, 14840, 14848, 14856, 14864, 14877, 14889, 14901, 14909, 14916, 14923, | |
| 14936, 14944, 14951, 14958, 14965, 14978, 14985, 14998, 15009, 15018, 15027, 15036, 15045, 15054, | |
| 15063, 15073, 15083, 15095, 15107, 15118, 15129, 15138, 15147, 15156, 15165, 15178, 15187, 15200, | |
| 15210, 15219, 15228, 15237, 15246, 15256, 15265, 15274, 15283, 15292, 15303, 15314, 15325, 15336, | |
| 15349, 15359, 15373, 15385, 15394, 15407, 15417, 15431, 15441, 15455, 15464, 15476, 15488, 15500, | |
| 15513, 15525, 15534, 15540, 15546, 15554, 15562, 15570, 15582, 15594, 15605, 15616, 15627, 15638, | |
| 15644, 15655, 15666, 15674, 15682, 15690, 15696, 15707, 15719, 15730, 15742, 15754, 15765, 15777, | |
| 15788, 15800, 15812, 15823, 15835, 15847, 15858, 15867, 15880, 15889, 15902, 15911, 15920, 15933, | |
| 15942, 15955, 15964, 15977, 15990, 16006, 16022, 16035, 16048, 16059, 16071, 16082, 16094, 16111, | |
| 16128, 16140, 16151, 16163, 16174, 16186, 16200, 16212, 16223, 16236, 16248, 16262, 16274, 16285, | |
| 16298, 16309, 16320, 16331, 16342, 16353, 16364, 16375, 16386, 16397, 16408, 16419, 16426, 16433, | |
| 16440, 16447, 16454, 16461, 16467, 16473, 16481, 16489, 16497, 16505, 16513, 16525, 16533, 16545, | |
| 16553, 16565, 16573, 16585, 16594, 16603, 16613, 16623, 16634, 16644, 16653, 16663, 16672, 16682, | |
| 16694, 16703, 16715, 16727, 16740, 16753, 16766, 16779, 16792, 16805, 16815, 16821, 16828, 16835, | |
| 16842, 16849, 16856, 16863, 16869, 16875, 16880, 16886, 16892, 16899, 16906, 16913, 16920, 16927, | |
| 16934, 16940, 16946, 16954, 16961, 16969, 16976, 16983, 16991, 16998, 17005, 17016, 17024, 17031, | |
| 17039, 17046, 17053, 17061, 17068, 17075, 17086, 17094, 17103, 17111, 17118, 17127, 17135, 17142, | |
| 17149, 17160, 17166, 17172, 17178, 17184, 17190, 17196, 17206, 17213, 17220, 17227, 17234, 17242, | |
| 17250, 17258, 17266, 17273, 17280, 17286, 17292, 17298, 17309, 17319, 17330, 17340, 17351, 17361, | |
| 17372, 17382, 17393, 17403, 17414, 17424, 17435, 17446, 17457, 17468, 17479, 17490, 17501, 17512, | |
| 17520, 17528, 17536, 17544, 17552, 17560, 17569, 17578, 17587, 17596, 17606, 17616, 17626, 17636, | |
| 17644, 17652, 17665, 17678, 17690, 17702, 17710, 17718, 17725, 17732, 17738, 17746, 17754, 17762, | |
| 17770, 17782, 17794, 17805, 17816, 17826, 17836, 17846, 17856, 17866, 17876, 17886, 17896, 17909, | |
| 17922, 17935, 17948, 17961, 17974, 17987, 18000, 18013, 18026, 18038, 18050, 18066, 18082, 18097, | |
| 18112, 18122, 18132, 18142, 18152, 18162, 18172, 18182, 18192, 18205, 18218, 18231, 18244, 18257, | |
| 18270, 18283, 18296, 18309, 18322, 18334, 18346, 18362, 18378, 18393, 18408, 18417, 18426, 18435, | |
| 18444, 18453, 18462, 18471, 18480, 18492, 18503, 18515, 18526, 18539, 18551, 18564, 18576, 18588, | |
| 18599, 18611, 18622, 18638, 18654, 18666, 18677, 18689, 18700, 18713, 18725, 18738, 18750, 18762, | |
| 18773, 18785, 18796, 18805, 18814, 18823, 18832, 18841, 18850, 18860, 18870, 18885, 18899, 18914, | |
| 18928, 18938, 18948, 18957, 18966, 18975, 18984, 18993, 19002, 19011, 19020, 19029, 19038, 19047, | |
| 19056, 19065, 19074, 19083, 19092, 19101, 19110, 19119, 19128, 19137, 19146, 19155, 19164, 19175, | |
| 19186, 19197, 19208, 19219, 19230, 19241, 19252, 19263, 19274, 19285, 19296, 19307, 19318, 19329, | |
| 19340, 19351, 19362, 19373, 19384, 19395, 19406, 19417, 19428, 19439, 19448, 19457, 19471, 19484, | |
| 19498, 19511, 19521, 19531, 19540, 19549, 19558, 19567, 19576, 19585, 19595, 19605, 19612, 19621, | |
| 19630, 19637, 19646, 19655, 19662, 19671, 19680, 19687, 19698, 19709, 19720, 19731, 19742, 19753, | |
| 19760, 19767, 19774, 19782, 19790, 19798, 19806, 19814, 19822, 19828, 19834, 19846, 19857, 19868, | |
| 19879, 19888, 19897, 19909, 19920, 19932, 19943, 19952, 19961, 19971, 19981, 19991, 20001, 20013, | |
| 20024, 20036, 20047, 20059, 20070, 20082, 20093, 20105, 20116, 20128, 20139, 20148, 20156, 20164, | |
| 20172, 20180, 20188, 20196, 20204, 20212, 20220, 20228, 20236, 20244, 20252, 20260, 20268, 20277, | |
| 20285, 20293, 20301, 20309, 20317, 20325, 20333, 20341, 20349, 20357, 20365, 20373, 20381, 20389, | |
| 20397, 20406, 20415, 20424, 20433, 20443, 20453, 20463, 20473, 20481, 20489, 20497, 20505, 20517, | |
| 20529, 20541, 20553, 20566, 20579, 20591, 20603, 20615, 20627, 20639, 20651, 20664, 20677, 20689, | |
| 20701, 20709, 20719, 20729, 20737, 20747, 20757, 20767, 20777, 20786, 20794, 20804, 20814, 20822, | |
| 20830, 20838, 20846, 20855, 20864, 20873, 20882, 20891, 20900, 20908, 20916, 20923, 20930, 20937, | |
| 20945, 20954, 20962, 20970, 20979, 20987, 20995, 21004, 21012, 21020, 21029, 21037, 21045, 21054, | |
| 21062, 21070, 21079, 21087, 21094, 21102, 21109, 21116, 21124, 21131, 21138, 21149, 21156, 21167, | |
| 21174, 21185, 21192, 21203, 21211, 21220, 21228, 21236, 21245, 21253, 21261, 21270, 21278, 21286, | |
| 21295, 21303, 21311, 21320, 21328, 21336, 21345, 21353, 21360, 21368, 21375, 21382, 21390, 21397, | |
| 21403, 21409, 21415, 21422, 21435, 21445, 21455, 21465, 21475, 21486, 21496, 21506, 21516, 21526, | |
| 21530, 21535, 21543, 21552, 21560, 21568, 21577, 21585, 21593, 21602, 21610, 21618, 21627, 21635, | |
| 21643, 21652, 21660, 21668, 21677, 21685, 21692, 21700, 21707, 21714, 21722, 21729, 21737, 21746, | |
| 21754, 21762, 21771, 21779, 21787, 21796, 21804, 21812, 21821, 21829, 21837, 21846, 21854, 21862, | |
| 21871, 21879, 21886, 21894, 21901, 21908, 21916, 21923, 21936, 21949, 21962, 21975, 21988, 22001, | |
| 22014, 22027, 22031, 22040, 22053, 22062, 22075, 22084, 22097, 22106, 22119, 22124, 22132, 22141, | |
| 22149, 22157, 22166, 22174, 22182, 22191, 22199, 22207, 22216, 22224, 22232, 22241, 22249, 22257, | |
| 22266, 22274, 22281, 22289, 22296, 22303, 22311, 22318, 22327, 22335, 22344, 22352, 22360, 22369, | |
| 22377, 22385, 22397, 22406, 22414, 22423, 22431, 22439, 22448, 22456, 22464, 22476, 22485, 22495, | |
| 22504, 22512, 22522, 22531, 22539, 22547, 22559, 22566, 22573, 22580, 22587, 22594, 22601, 22612, | |
| 22619, 22626, 22633, 22639, 22646, 22653, 22659, 22665, 22672, 22679, 22689, 22699, 22709, 22718, | |
| 22724, 22730, 22736, 22742, 22749, 22756, 22762, 22768, 22775, 22782, 22788, 22794, 22801, 22808, | |
| 22815, 22822, 22829, 22836, 22843, 22850, 22856, 22862, 22868, 22874, 22880, 22886, 22893, 22899, | |
| 22907, 22916, 22924, 22932, 22941, 22949, 22957, 22966, 22974, 22982, 22991, 22999, 23007, 23016, | |
| 23024, 23032, 23041, 23049, 23056, 23064, 23071, 23078, 23086, 23093, 23104, 23115, 23126, 23137, | |
| 23148, 23159, 23170, 23181, 23192, 23203, 23214, 23225, 23233, 23242, 23250, 23258, 23267, 23275, | |
| 23283, 23292, 23300, 23308, 23317, 23325, 23333, 23342, 23350, 23358, 23367, 23375, 23382, 23390, | |
| 23397, 23404, 23412, 23419, 23430, 23441, 23452, 23463, 23474, 23485, 23496, 23507, 23518, 23529, | |
| 23540, 23551, 23561, 23571, 23581, 23591, 23597, 23603, 23612, 23621, 23630, 23638, 23646, 23654, | |
| 23662, 23670, 23678, 23686, 23694, 23702, 23714, 23722, 23734, 23742, 23754, 23762, 23774, 23782, | |
| 23794, 23802, 23814, 23822, 23834, 23842, 23854, 23861, 23871, 23881, 23891, 23901, 23905, 23909, | |
| 23913, 23921, 23927, 23933, 23939, 23945, 23950, 23955, 23963, 23971, 23980, 23989, 23998, 24006, | |
| 24015, 24024, 24035, 24046, 24057, 24067, 24077, 24089, 24099, 24111, 24123, 24130, 24139, 24147, | |
| 24156, 24164, 24172, 24181, 24189, 24197, 24209, 24218, 24226, 24235, 24243, 24251, 24260, 24268, | |
| 24276, 24288, 24297, 24307, 24316, 24324, 24334, 24343, 24351, 24359, 24371, 24378, 24385, 24392, | |
| 24399, 24406, 24413, 24424, 24432, 24440, 24448, 24456, 24466, 24476, 24487, 24498, 24510, 24521, | |
| 24532, 24543, 24556, 24569, 24582, 24596, 24610, 24624, 24638, 24652, 24666, 24677, 24685, 24697, | |
| 24705, 24717, 24725, 24737, 24745, 24757, 24766, 24775, 24785, 24795, 24806, 24816, 24825, 24835, | |
| 24844, 24854, 24866, 24875, 24887, 24899, 24912, 24925, 24938, 24951, 24964, 24977, 24987, 24994, | |
| 25002, 25011, 25019, 25029, 25036, 25045, 25056, 25065, 25076, 25085, 25096, 25107, 25120, 25131, | |
| 25144, 25155, 25168, 25178, 25187, 25196, 25205, 25214, 25224, 25233, 25242, 25251, 25260, 25270, | |
| 25281, 25292, 25301, 25310, 25318, 25326, 25334, 25342, 25350, 25361, 25372, 25383, 25394, 25399, | |
| 25405, 25414, 25423, 25432, 25442, 25452, 25462, 25472, 25482, 25491, 25501, 25510, 25522, 25534, | |
| 25546, 25557, 25568, 25579, 25587, 25598, 25609, 25620, 25631, 25642, 25653, 25664, 25675, 25685, | |
| 25695, 25704, 25713, 25723, 25733, 25742, 25751, 25760, 25773, 25782, 25795, 25804, 25817, 25826, | |
| 25839, 25852, 25865, 25877, 25889, 25902, 25915, 25927, 25939, 25953, 25967, 25977, 25987, 26001, | |
| 26015, 26025, 26035, 26045, 26055, 26077, 26099, 26110, 26121, 26131, 26141, 26152, 26163, 26173, | |
| 26183, 26193, 26203, 26212, 26221, 26231, 26241, 26250, 26259, 26281, 26294, 26307, 26319, 26331, | |
| 26344, 26357, 26369, 26381, 26394, 26407, 26419, 26431, 26444, 26457, 26469, 26481, 26496, 26509, | |
| 26522, 26536, 26547, 26562, 26573, 26588, 26598, 26612, 26622, 26636, 26647, 26662, 26673, 26688, | |
| 26698, 26712, 26722, 26736, 26745, 26758, 26767, 26780, 26789, 26802, 26811, 26824, 26834, 26844, | |
| 26854, 26864, 26877, 26890, 26902, 26914, 26927, 26940, 26952, 26964, 26978, 26991, 27004, 27017, | |
| 27030, 27042, 27056, 27069, 27082, 27095, 27108, 27120, 27133, 27146, 27158, 27170, 27183, 27196, | |
| 27208, 27220, 27234, 27248, 27264, 27280, 27292, 27304, 27318, 27332, 27345, 27358, 27370, 27382, | |
| 27396, 27410, 27422, 27434, 27446, 27458, 27472, 27486, 27498, 27510, 27525, 27539, 27553, 27567, | |
| 27581, 27594, 27608, 27622, 27635, 27648, 27663, 27678, 27691, 27704, 27719, 27734, 27747, 27760, | |
| 27770, 27780, 27789, 27798, 27808, 27818, 27827, 27836, 27845, 27858, 27867, 27880, 27889, 27902, | |
| 27911, 27924, 27933, 27942, 27952, 27962, 27971, 27980, 27986, 27992, 27998, 28004, 28019, 28034, | |
| 28047, 28060, 28075, 28089, 28104, 28118, 28133, 28147, 28162, 28176, 28191, 28205, 28220, 28234, | |
| 28249, 28263, 28278, 28292, 28307, 28321, 28336, 28350, 28365, 28379, 28394, 28408, 28423, 28440, | |
| 28458, 28475, 28493, 28510, 28528, 28545, 28563, 28580, 28598, 28615, 28633, 28650, 28668, 28685, | |
| 28703, 28720, 28738, 28755, 28773, 28790, 28808, 28825, 28843, 28860, 28878, 28895, 28913, 28930, | |
| 28948, 28965, 28983, 29000, 29018, 29035, 29053, 29070, 29088, 29105, 29123, 29140, 29158, 29175, | |
| 29193, 29210, 29228, 29245, 29263, 29277, 29292, 29306, 29321, 29335, 29350, 29364, 29379, 29393, | |
| 29408, 29422, 29437, 29451, 29466, 29480, 29495, 29509, 29524, 29538, 29553, 29567, 29582, 29596, | |
| 29611, 29626, 29642, 29657, 29673, 29688, 29704, 29719, 29735, 29750, 29766, 29781, 29797, 29812, | |
| 29828, 29843, 29859, 29874, 29890, 29905, 29921, 29936, 29952, 29967, 29983, 29998, 30014, 30029, | |
| 30045, 30060, 30076, 30091, 30107, 30122, 30138, 30153, 30169, 30184, 30200, 30215, 30231, 30246, | |
| 30262, 30277, 30293, 30308, 30324, 30339, 30355, 30367, 30379, 30391, 30403, 30414, 30425, 30436, | |
| 30447, 30457, 30467, 30477, 30487, 30498, 30509, 30520, 30531, 30542, 30553, 30563, 30573, 30584, | |
| 30595, 30605, 30615, 30626, 30637, 30647, 30657, 30668, 30679, 30689, 30699, 30713, 30727, 30739, | |
| 30751, 30761, 30770, 30779, 30791, 30805, 30819, 30833, 30846, 30859, 30873, 30887, 30900, 30913, | |
| 30923, 30937, 30947, 30961, 30970, 30983, 30992, 31005, 31015, 31029, 31039, 31053, 31062, 31075, | |
| 31084, 31097, 31106, 31119, 31128, 31141, 31150, 31163, 31172, 31185, 31192, 31201, 31211, 31225, | |
| 31235, 31249, 31258, 31271, 31280, 31293, 31303, 31317, 31327, 31341, 31350, 31363, 31372, 31385, | |
| 31394, 31407, 31416, 31429, 31438, 31451, 31460, 31473, 31482, 31493, 31504, 31515, 31525, 31535, | |
| 31545, 31556, 31567, 31578, 31588, 31598, 31608, 31620, 31632, 31643, 31654, 31667, 31680, 31692, | |
| 31704, 31715, 31726, 31737, 31747, 31757, 31767, 31778, 31789, 31800, 31810, 31824, 31834, 31848, | |
| 31858, 31869, 31879, 31889, 31899, 31909, 31920, 31930, 31940, 31950, 31960, 31972, 31987, 32000, | |
| 32014, 32026, 32041, 32054, 32068, 32080, 32092, 32107, 32119, 32133, 32144, 32159, 32171, 32182, | |
| 32197, 32209, 32220, 32235, 32248, 32261, 32274, 32287, 32298, 32313, 32324, 32334, 32343, 32352, | |
| 32361, 32374, 32387, 32399, 32411, 32424, 32437, 32449, 32461, 32473, 32485, 32494, 32503, 32512, | |
| 32523, 32534, 32545, 32555, 32569, 32579, 32593, 32603, 32614, 32625, 32636, 32646, 32660, 32670, | |
| 32684, 32694, 32708, 32722, 32739, 32756, 32770, 32784, 32796, 32808, 32817, 32826, 32837, 32848, | |
| 32859, 32870, 32879, 32889, 32899, 32908, 32917, 32927, 32937, 32946, 32955, 32964, 32977, 32986, | |
| 32999, 33008, 33021, 33030, 33043, 33055, 33067, 33079, 33091, 33098, 33104, 33113, 33122, 33130, | |
| 33138, 33147, 33156, 33164, 33172, 33184, 33195, 33207, 33218, 33230, 33241, 33253, 33264, 33276, | |
| 33287, 33299, 33310, 33322, 33334, 33346, 33358, 33370, 33382, 33394, 33406, 33415, 33424, 33433, | |
| 33442, 33451, 33460, 33470, 33480, 33490, 33500, 33511, 33522, 33533, 33544, 33553, 33562, 33576, | |
| 33590, 33603, 33616, 33625, 33634, 33642, 33650, 33659, 33668, 33677, 33686, 33698, 33710, 33722, | |
| 33734, 33750, 33766, 33782, 33798, 33814, 33830, 33846, 33862, 33875, 33888, 33899, 33910, 33921, | |
| 33932, 33943, 33954, 33965, 33976, 33990, 34004, 34018, 34032, 34046, 34060, 34074, 34088, 34102, | |
| 34116, 34129, 34142, 34159, 34176, 34192, 34208, 34219, 34230, 34241, 34252, 34263, 34274, 34285, | |
| 34296, 34310, 34324, 34338, 34352, 34366, 34380, 34394, 34408, 34422, 34436, 34449, 34462, 34479, | |
| 34496, 34512, 34528, 34541, 34554, 34567, 34580, 34593, 34606, 34618, 34630, 34642, 34654, 34667, | |
| 34680, 34693, 34706, 34718, 34730, 34742, 34754, 34764, 34774, 34786, 34796, 34806, 34816, 34826, | |
| 34836, 34846, 34859, 34871, 34884, 34896, 34910, 34923, 34937, 34950, 34963, 34975, 34988, 35000, | |
| 35017, 35034, 35047, 35059, 35072, 35084, 35098, 35111, 35125, 35138, 35151, 35163, 35176, 35188, | |
| 35198, 35208, 35218, 35228, 35238, 35248, 35259, 35272, 35283, 35299, 35314, 35330, 35345, 35356, | |
| 35367, 35377, 35387, 35397, 35407, 35417, 35427, 35437, 35447, 35457, 35467, 35477, 35487, 35497, | |
| 35507, 35517, 35527, 35537, 35547, 35557, 35567, 35577, 35587, 35597, 35607, 35621, 35633, 35645, | |
| 35657, 35669, 35681, 35693, 35705, 35717, 35729, 35741, 35753, 35765, 35777, 35789, 35801, 35813, | |
| 35825, 35837, 35849, 35861, 35873, 35885, 35897, 35909, 35921, 35931, 35941, 35956, 35970, 35985, | |
| 35999, 36010, 36021, 36031, 36041, 36051, 36061, 36071, 36081, 36092, 36103, 36110, 36117, 36127, | |
| 36137, 36150, 36162, 36175, 36187, 36197, 36207, 36218, 36229, 36240, 36251, 36264, 36276, 36289, | |
| 36301, 36314, 36326, 36339, 36351, 36364, 36376, 36389, 36401, 36411, 36420, 36429, 36438, 36447, | |
| 36456, 36465, 36474, 36483, 36492, 36501, 36510, 36519, 36528, 36537, 36546, 36556, 36565, 36574, | |
| 36583, 36592, 36601, 36610, 36619, 36628, 36637, 36646, 36655, 36664, 36673, 36682, 36691, 36701, | |
| 36711, 36721, 36731, 36742, 36753, 36764, 36775, 36784, 36793, 36803, 36813, 36822, 36831, 36844, | |
| 36857, 36870, 36883, 36897, 36911, 36924, 36937, 36950, 36963, 36976, 36989, 37003, 37017, 37030, | |
| 37043, 37051, 37059, 37068, 37081, 37090, 37103, 37111, 37123, 37131, 37143, 37151, 37163, 37171, | |
| 37183, 37193, 37207, 37217, 37231, 37241, 37255, 37265, 37279, 37289, 37303, 37313, 37327, 37337, | |
| 37351, 37361, 37375, 37386, 37401, 37412, 37427, 37438, 37453, 37464, 37479, 37490, 37505, 37516, | |
| 37531, 37541, 37555, 37565, 37579, 37589, 37603, 37613, 37627, 37639, 37651, 37662, 37673, 37685, | |
| 37697, 37708, 37719, 37729, 37743, 37753, 37767, 37776, 37789, 37798, 37811, 37821, 37835, 37845, | |
| 37859, 37868, 37881, 37890, 37903, 37912, 37925, 37934, 37947, 37956, 37969, 37978, 37991, 38000, | |
| 38010, 38020, 38029, 38038, 38048, 38058, 38067, 38076, 38085, 38098, 38107, 38120, 38129, 38142, | |
| 38151, 38164, 38175, 38186, 38196, 38206, 38217, 38228, 38238, 38248, 38259, 38270, 38281, 38292, | |
| 38305, 38318, 38330, 38342, 38355, 38368, 38380, 38392, 38405, 38418, 38430, 38442, 38455, 38468, | |
| 38480, 38492, 38502, 38512, 38521, 38530, 38540, 38550, 38559, 38568, 38577, 38588, 38597, 38606, | |
| 38615, 38628, 38633, 38640, 38651, 38668, 38679, 38685, 38694, 38703, 38712, 38721, 38730, 38739, | |
| 38747, 38755, 38764, 38773, 38782, 38791, 38800, 38809, 38818, 38827, 38836, 38844, 38852, 38858, | |
| 38863, 38872, 38880, 38889, 38897, 38905, 38914, 38922, 38930, 38942, 38951, 38959, 38968, 38976, | |
| 38984, 38993, 39001, 39009, 39021, 39030, 39040, 39049, 39057, 39067, 39076, 39084, 39092, 39104, | |
| 39111, 39118, 39125, 39132, 39139, 39146, 39157, 39165, 39173, 39181, 0 | |
| }; | |
| const char *Strs = | |
| "PHI\000INLINEASM\000PROLOG_LABEL\000EH_LABEL\000GC_LABEL\000KILL\000EXT" | |
| "RACT_SUBREG\000INSERT_SUBREG\000IMPLICIT_DEF\000SUBREG_TO_REG\000COPY_T" | |
| "O_REGCLASS\000DBG_VALUE\000REG_SEQUENCE\000COPY\000ABS_F\000ABS_Fp32\000" | |
| "ABS_Fp64\000ABS_Fp80\000ADC16i16\000ADC16mi\000ADC16mi8\000ADC16mr\000A" | |
| "DC16ri\000ADC16ri8\000ADC16rm\000ADC16rr\000ADC16rr_REV\000ADC32i32\000" | |
| "ADC32mi\000ADC32mi8\000ADC32mr\000ADC32ri\000ADC32ri8\000ADC32rm\000ADC" | |
| "32rr\000ADC32rr_REV\000ADC64i32\000ADC64mi32\000ADC64mi8\000ADC64mr\000" | |
| "ADC64ri32\000ADC64ri8\000ADC64rm\000ADC64rr\000ADC64rr_REV\000ADC8i8\000" | |
| "ADC8mi\000ADC8mr\000ADC8ri\000ADC8rm\000ADC8rr\000ADC8rr_REV\000ADD16i1" | |
| "6\000ADD16mi\000ADD16mi8\000ADD16mr\000ADD16ri\000ADD16ri8\000ADD16rm\000" | |
| "ADD16rr\000ADD16rr_alt\000ADD32i32\000ADD32mi\000ADD32mi8\000ADD32mr\000" | |
| "ADD32ri\000ADD32ri8\000ADD32rm\000ADD32rr\000ADD32rr_alt\000ADD64i32\000" | |
| "ADD64mi32\000ADD64mi8\000ADD64mr\000ADD64ri32\000ADD64ri8\000ADD64rm\000" | |
| "ADD64rr\000ADD64rr_alt\000ADD8i8\000ADD8mi\000ADD8mr\000ADD8ri\000ADD8r" | |
| "m\000ADD8rr\000ADD8rr_alt\000ADDPDrm\000ADDPDrr\000ADDPSrm\000ADDPSrr\000" | |
| "ADDSDrm\000ADDSDrm_Int\000ADDSDrr\000ADDSDrr_Int\000ADDSSrm\000ADDSSrm_" | |
| "Int\000ADDSSrr\000ADDSSrr_Int\000ADDSUBPDrm\000ADDSUBPDrr\000ADDSUBPSrm" | |
| "\000ADDSUBPSrr\000ADD_F32m\000ADD_F64m\000ADD_FI16m\000ADD_FI32m\000ADD" | |
| "_FPrST0\000ADD_FST0r\000ADD_Fp32\000ADD_Fp32m\000ADD_Fp64\000ADD_Fp64m\000" | |
| "ADD_Fp64m32\000ADD_Fp80\000ADD_Fp80m32\000ADD_Fp80m64\000ADD_FpI16m32\000" | |
| "ADD_FpI16m64\000ADD_FpI16m80\000ADD_FpI32m32\000ADD_FpI32m64\000ADD_FpI" | |
| "32m80\000ADD_FrST0\000ADJCALLSTACKDOWN32\000ADJCALLSTACKDOWN64\000ADJCA" | |
| "LLSTACKUP32\000ADJCALLSTACKUP64\000AESDECLASTrm\000AESDECLASTrr\000AESD" | |
| "ECrm\000AESDECrr\000AESENCLASTrm\000AESENCLASTrr\000AESENCrm\000AESENCr" | |
| "r\000AESIMCrm\000AESIMCrr\000AESKEYGENASSIST128rm\000AESKEYGENASSIST128" | |
| "rr\000AND16i16\000AND16mi\000AND16mi8\000AND16mr\000AND16ri\000AND16ri8" | |
| "\000AND16rm\000AND16rr\000AND16rr_REV\000AND32i32\000AND32mi\000AND32mi" | |
| "8\000AND32mr\000AND32ri\000AND32ri8\000AND32rm\000AND32rr\000AND32rr_RE" | |
| "V\000AND64i32\000AND64mi32\000AND64mi8\000AND64mr\000AND64ri32\000AND64" | |
| "ri8\000AND64rm\000AND64rr\000AND64rr_REV\000AND8i8\000AND8mi\000AND8mr\000" | |
| "AND8ri\000AND8rm\000AND8rr\000AND8rr_REV\000ANDNPDrm\000ANDNPDrr\000AND" | |
| "NPSrm\000ANDNPSrr\000ANDPDrm\000ANDPDrr\000ANDPSrm\000ANDPSrr\000ATOMAD" | |
| "D6432\000ATOMAND16\000ATOMAND32\000ATOMAND64\000ATOMAND6432\000ATOMAND8" | |
| "\000ATOMMAX16\000ATOMMAX32\000ATOMMAX64\000ATOMMIN16\000ATOMMIN32\000AT" | |
| "OMMIN64\000ATOMNAND16\000ATOMNAND32\000ATOMNAND64\000ATOMNAND6432\000AT" | |
| "OMNAND8\000ATOMOR16\000ATOMOR32\000ATOMOR64\000ATOMOR6432\000ATOMOR8\000" | |
| "ATOMSUB6432\000ATOMSWAP6432\000ATOMUMAX16\000ATOMUMAX32\000ATOMUMAX64\000" | |
| "ATOMUMIN16\000ATOMUMIN32\000ATOMUMIN64\000ATOMXOR16\000ATOMXOR32\000ATO" | |
| "MXOR64\000ATOMXOR6432\000ATOMXOR8\000BLENDPDrmi\000BLENDPDrri\000BLENDP" | |
| "Srmi\000BLENDPSrri\000BLENDVPDrm0\000BLENDVPDrr0\000BLENDVPSrm0\000BLEN" | |
| "DVPSrr0\000BSF16rm\000BSF16rr\000BSF32rm\000BSF32rr\000BSF64rm\000BSF64" | |
| "rr\000BSR16rm\000BSR16rr\000BSR32rm\000BSR32rr\000BSR64rm\000BSR64rr\000" | |
| "BSWAP32r\000BSWAP64r\000BT16mi8\000BT16mr\000BT16ri8\000BT16rr\000BT32m" | |
| "i8\000BT32mr\000BT32ri8\000BT32rr\000BT64mi8\000BT64mr\000BT64ri8\000BT" | |
| "64rr\000BTC16mi8\000BTC16mr\000BTC16ri8\000BTC16rr\000BTC32mi8\000BTC32" | |
| "mr\000BTC32ri8\000BTC32rr\000BTC64mi8\000BTC64mr\000BTC64ri8\000BTC64rr" | |
| "\000BTR16mi8\000BTR16mr\000BTR16ri8\000BTR16rr\000BTR32mi8\000BTR32mr\000" | |
| "BTR32ri8\000BTR32rr\000BTR64mi8\000BTR64mr\000BTR64ri8\000BTR64rr\000BT" | |
| "S16mi8\000BTS16mr\000BTS16ri8\000BTS16rr\000BTS32mi8\000BTS32mr\000BTS3" | |
| "2ri8\000BTS32rr\000BTS64mi8\000BTS64mr\000BTS64ri8\000BTS64rr\000CALL32" | |
| "m\000CALL32r\000CALL64m\000CALL64pcrel32\000CALL64r\000CALLpcrel16\000C" | |
| "ALLpcrel32\000CBW\000CDQ\000CDQE\000CHS_F\000CHS_Fp32\000CHS_Fp64\000CH" | |
| "S_Fp80\000CLC\000CLD\000CLFLUSH\000CLI\000CLTS\000CMC\000CMOVA16rm\000C" | |
| "MOVA16rr\000CMOVA32rm\000CMOVA32rr\000CMOVA64rm\000CMOVA64rr\000CMOVAE1" | |
| "6rm\000CMOVAE16rr\000CMOVAE32rm\000CMOVAE32rr\000CMOVAE64rm\000CMOVAE64" | |
| "rr\000CMOVB16rm\000CMOVB16rr\000CMOVB32rm\000CMOVB32rr\000CMOVB64rm\000" | |
| "CMOVB64rr\000CMOVBE16rm\000CMOVBE16rr\000CMOVBE32rm\000CMOVBE32rr\000CM" | |
| "OVBE64rm\000CMOVBE64rr\000CMOVBE_F\000CMOVBE_Fp32\000CMOVBE_Fp64\000CMO" | |
| "VBE_Fp80\000CMOVB_F\000CMOVB_Fp32\000CMOVB_Fp64\000CMOVB_Fp80\000CMOVE1" | |
| "6rm\000CMOVE16rr\000CMOVE32rm\000CMOVE32rr\000CMOVE64rm\000CMOVE64rr\000" | |
| "CMOVE_F\000CMOVE_Fp32\000CMOVE_Fp64\000CMOVE_Fp80\000CMOVG16rm\000CMOVG" | |
| "16rr\000CMOVG32rm\000CMOVG32rr\000CMOVG64rm\000CMOVG64rr\000CMOVGE16rm\000" | |
| "CMOVGE16rr\000CMOVGE32rm\000CMOVGE32rr\000CMOVGE64rm\000CMOVGE64rr\000C" | |
| "MOVL16rm\000CMOVL16rr\000CMOVL32rm\000CMOVL32rr\000CMOVL64rm\000CMOVL64" | |
| "rr\000CMOVLE16rm\000CMOVLE16rr\000CMOVLE32rm\000CMOVLE32rr\000CMOVLE64r" | |
| "m\000CMOVLE64rr\000CMOVNBE_F\000CMOVNBE_Fp32\000CMOVNBE_Fp64\000CMOVNBE" | |
| "_Fp80\000CMOVNB_F\000CMOVNB_Fp32\000CMOVNB_Fp64\000CMOVNB_Fp80\000CMOVN" | |
| "E16rm\000CMOVNE16rr\000CMOVNE32rm\000CMOVNE32rr\000CMOVNE64rm\000CMOVNE" | |
| "64rr\000CMOVNE_F\000CMOVNE_Fp32\000CMOVNE_Fp64\000CMOVNE_Fp80\000CMOVNO" | |
| "16rm\000CMOVNO16rr\000CMOVNO32rm\000CMOVNO32rr\000CMOVNO64rm\000CMOVNO6" | |
| "4rr\000CMOVNP16rm\000CMOVNP16rr\000CMOVNP32rm\000CMOVNP32rr\000CMOVNP64" | |
| "rm\000CMOVNP64rr\000CMOVNP_F\000CMOVNP_Fp32\000CMOVNP_Fp64\000CMOVNP_Fp" | |
| "80\000CMOVNS16rm\000CMOVNS16rr\000CMOVNS32rm\000CMOVNS32rr\000CMOVNS64r" | |
| "m\000CMOVNS64rr\000CMOVO16rm\000CMOVO16rr\000CMOVO32rm\000CMOVO32rr\000" | |
| "CMOVO64rm\000CMOVO64rr\000CMOVP16rm\000CMOVP16rr\000CMOVP32rm\000CMOVP3" | |
| "2rr\000CMOVP64rm\000CMOVP64rr\000CMOVP_F\000CMOVP_Fp32\000CMOVP_Fp64\000" | |
| "CMOVP_Fp80\000CMOVS16rm\000CMOVS16rr\000CMOVS32rm\000CMOVS32rr\000CMOVS" | |
| "64rm\000CMOVS64rr\000CMOV_FR32\000CMOV_FR64\000CMOV_GR16\000CMOV_GR32\000" | |
| "CMOV_GR8\000CMOV_RFP32\000CMOV_RFP64\000CMOV_RFP80\000CMOV_V1I64\000CMO" | |
| "V_V2F64\000CMOV_V2I64\000CMOV_V4F32\000CMP16i16\000CMP16mi\000CMP16mi8\000" | |
| "CMP16mr\000CMP16ri\000CMP16ri8\000CMP16rm\000CMP16rr\000CMP16rr_alt\000" | |
| "CMP32i32\000CMP32mi\000CMP32mi8\000CMP32mr\000CMP32ri\000CMP32ri8\000CM" | |
| "P32rm\000CMP32rr\000CMP32rr_alt\000CMP64i32\000CMP64mi32\000CMP64mi8\000" | |
| "CMP64mr\000CMP64mrmrr\000CMP64ri32\000CMP64ri8\000CMP64rm\000CMP64rr\000" | |
| "CMP8i8\000CMP8mi\000CMP8mr\000CMP8ri\000CMP8rm\000CMP8rr\000CMP8rr_alt\000" | |
| "CMPPDrmi\000CMPPDrmi_alt\000CMPPDrri\000CMPPDrri_alt\000CMPPSrmi\000CMP" | |
| "PSrmi_alt\000CMPPSrri\000CMPPSrri_alt\000CMPS16\000CMPS32\000CMPS64\000" | |
| "CMPS8\000CMPSDrm\000CMPSDrm_alt\000CMPSDrr\000CMPSDrr_alt\000CMPSSrm\000" | |
| "CMPSSrm_alt\000CMPSSrr\000CMPSSrr_alt\000CMPXCHG16B\000CMPXCHG16rm\000C" | |
| "MPXCHG16rr\000CMPXCHG32rm\000CMPXCHG32rr\000CMPXCHG64rm\000CMPXCHG64rr\000" | |
| "CMPXCHG8B\000CMPXCHG8rm\000CMPXCHG8rr\000COMISDrm\000COMISDrr\000COMISS" | |
| "rm\000COMISSrr\000COMP_FST0r\000COM_FIPr\000COM_FIr\000COM_FST0r\000COS" | |
| "_F\000COS_Fp32\000COS_Fp64\000COS_Fp80\000CPUID\000CQO\000CRC32m16\000C" | |
| "RC32m32\000CRC32m8\000CRC32r16\000CRC32r32\000CRC32r8\000CRC64m64\000CR" | |
| "C64m8\000CRC64r64\000CRC64r8\000CS_PREFIX\000CVTDQ2PDrm\000CVTDQ2PDrr\000" | |
| "CVTDQ2PSrm\000CVTDQ2PSrr\000CVTPD2DQrm\000CVTPD2DQrr\000CVTPD2PSrm\000C" | |
| "VTPD2PSrr\000CVTPS2DQrm\000CVTPS2DQrr\000CVTPS2PDrm\000CVTPS2PDrr\000CV" | |
| "TSD2SI64rm\000CVTSD2SI64rr\000CVTSD2SSrm\000CVTSD2SSrr\000CVTSI2SD64rm\000" | |
| "CVTSI2SD64rr\000CVTSI2SDrm\000CVTSI2SDrr\000CVTSI2SS64rm\000CVTSI2SS64r" | |
| "r\000CVTSI2SSrm\000CVTSI2SSrr\000CVTSS2SDrm\000CVTSS2SDrr\000CVTSS2SI64" | |
| "rm\000CVTSS2SI64rr\000CVTSS2SIrm\000CVTSS2SIrr\000CVTTPS2DQrm\000CVTTPS" | |
| "2DQrr\000CVTTSD2SI64rm\000CVTTSD2SI64rr\000CVTTSD2SIrm\000CVTTSD2SIrr\000" | |
| "CVTTSS2SI64rm\000CVTTSS2SI64rr\000CVTTSS2SIrm\000CVTTSS2SIrr\000CWD\000" | |
| "CWDE\000DEC16m\000DEC16r\000DEC32m\000DEC32r\000DEC64_16m\000DEC64_16r\000" | |
| "DEC64_32m\000DEC64_32r\000DEC64m\000DEC64r\000DEC8m\000DEC8r\000DIV16m\000" | |
| "DIV16r\000DIV32m\000DIV32r\000DIV64m\000DIV64r\000DIV8m\000DIV8r\000DIV" | |
| "PDrm\000DIVPDrr\000DIVPSrm\000DIVPSrr\000DIVR_F32m\000DIVR_F64m\000DIVR" | |
| "_FI16m\000DIVR_FI32m\000DIVR_FPrST0\000DIVR_FST0r\000DIVR_Fp32m\000DIVR" | |
| "_Fp64m\000DIVR_Fp64m32\000DIVR_Fp80m32\000DIVR_Fp80m64\000DIVR_FpI16m32" | |
| "\000DIVR_FpI16m64\000DIVR_FpI16m80\000DIVR_FpI32m32\000DIVR_FpI32m64\000" | |
| "DIVR_FpI32m80\000DIVR_FrST0\000DIVSDrm\000DIVSDrm_Int\000DIVSDrr\000DIV" | |
| "SDrr_Int\000DIVSSrm\000DIVSSrm_Int\000DIVSSrr\000DIVSSrr_Int\000DIV_F32" | |
| "m\000DIV_F64m\000DIV_FI16m\000DIV_FI32m\000DIV_FPrST0\000DIV_FST0r\000D" | |
| "IV_Fp32\000DIV_Fp32m\000DIV_Fp64\000DIV_Fp64m\000DIV_Fp64m32\000DIV_Fp8" | |
| "0\000DIV_Fp80m32\000DIV_Fp80m64\000DIV_FpI16m32\000DIV_FpI16m64\000DIV_" | |
| "FpI16m80\000DIV_FpI32m32\000DIV_FpI32m64\000DIV_FpI32m80\000DIV_FrST0\000" | |
| "DPPDrmi\000DPPDrri\000DPPSrmi\000DPPSrri\000DS_PREFIX\000EH_RETURN\000E" | |
| "H_RETURN64\000ENTER\000ES_PREFIX\000EXTRACTPSmr\000EXTRACTPSrr\000F2XM1" | |
| "\000FARCALL16i\000FARCALL16m\000FARCALL32i\000FARCALL32m\000FARCALL64\000" | |
| "FARJMP16i\000FARJMP16m\000FARJMP32i\000FARJMP32m\000FARJMP64\000FBLDm\000" | |
| "FBSTPm\000FCOM32m\000FCOM64m\000FCOMP32m\000FCOMP64m\000FCOMPP\000FDECS" | |
| "TP\000FFREE\000FICOM16m\000FICOM32m\000FICOMP16m\000FICOMP32m\000FINCST" | |
| "P\000FLDCW16m\000FLDENVm\000FLDL2E\000FLDL2T\000FLDLG2\000FLDLN2\000FLD" | |
| "PI\000FNCLEX\000FNINIT\000FNOP\000FNSTCW16m\000FNSTSW8r\000FNSTSWm\000F" | |
| "P32_TO_INT16_IN_MEM\000FP32_TO_INT32_IN_MEM\000FP32_TO_INT64_IN_MEM\000" | |
| "FP64_TO_INT16_IN_MEM\000FP64_TO_INT32_IN_MEM\000FP64_TO_INT64_IN_MEM\000" | |
| "FP80_TO_INT16_IN_MEM\000FP80_TO_INT32_IN_MEM\000FP80_TO_INT64_IN_MEM\000" | |
| "FPATAN\000FPREM\000FPREM1\000FPTAN\000FRNDINT\000FRSTORm\000FSAVEm\000F" | |
| "SCALE\000FSINCOS\000FSTENVm\000FS_MOV32rm\000FS_PREFIX\000FXAM\000FXRST" | |
| "OR\000FXSAVE\000FXTRACT\000FYL2X\000FYL2XP1\000FpGET_ST0_32\000FpGET_ST" | |
| "0_64\000FpGET_ST0_80\000FpGET_ST1_32\000FpGET_ST1_64\000FpGET_ST1_80\000" | |
| "FpSET_ST0_32\000FpSET_ST0_64\000FpSET_ST0_80\000FpSET_ST1_32\000FpSET_S" | |
| "T1_64\000FpSET_ST1_80\000FsANDNPDrm\000FsANDNPDrr\000FsANDNPSrm\000FsAN" | |
| "DNPSrr\000FsANDPDrm\000FsANDPDrr\000FsANDPSrm\000FsANDPSrr\000FsFLD0SD\000" | |
| "FsFLD0SS\000FsMOVAPDrm\000FsMOVAPDrr\000FsMOVAPSrm\000FsMOVAPSrr\000FsO" | |
| "RPDrm\000FsORPDrr\000FsORPSrm\000FsORPSrr\000FsXORPDrm\000FsXORPDrr\000" | |
| "FsXORPSrm\000FsXORPSrr\000GS_MOV32rm\000GS_PREFIX\000HADDPDrm\000HADDPD" | |
| "rr\000HADDPSrm\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUBPSrm\000" | |
| "HSUBPSrr\000IDIV16m\000IDIV16r\000IDIV32m\000IDIV32r\000IDIV64m\000IDIV" | |
| "64r\000IDIV8m\000IDIV8r\000ILD_F16m\000ILD_F32m\000ILD_F64m\000ILD_Fp16" | |
| "m32\000ILD_Fp16m64\000ILD_Fp16m80\000ILD_Fp32m32\000ILD_Fp32m64\000ILD_" | |
| "Fp32m80\000ILD_Fp64m32\000ILD_Fp64m64\000ILD_Fp64m80\000IMUL16m\000IMUL" | |
| "16r\000IMUL16rm\000IMUL16rmi\000IMUL16rmi8\000IMUL16rr\000IMUL16rri\000" | |
| "IMUL16rri8\000IMUL32m\000IMUL32r\000IMUL32rm\000IMUL32rmi\000IMUL32rmi8" | |
| "\000IMUL32rr\000IMUL32rri\000IMUL32rri8\000IMUL64m\000IMUL64r\000IMUL64" | |
| "rm\000IMUL64rmi32\000IMUL64rmi8\000IMUL64rr\000IMUL64rri32\000IMUL64rri" | |
| "8\000IMUL8m\000IMUL8r\000IN16\000IN16ri\000IN16rr\000IN32\000IN32ri\000" | |
| "IN32rr\000IN8\000IN8ri\000IN8rr\000INC16m\000INC16r\000INC32m\000INC32r" | |
| "\000INC64_16m\000INC64_16r\000INC64_32m\000INC64_32r\000INC64m\000INC64" | |
| "r\000INC8m\000INC8r\000INSERTPSrm\000INSERTPSrr\000INT\000INT3\000INTO\000" | |
| "INVD\000INVEPT\000INVLPG\000INVVPID\000IRET16\000IRET32\000IRET64\000IS" | |
| "TT_FP16m\000ISTT_FP32m\000ISTT_FP64m\000ISTT_Fp16m32\000ISTT_Fp16m64\000" | |
| "ISTT_Fp16m80\000ISTT_Fp32m32\000ISTT_Fp32m64\000ISTT_Fp32m80\000ISTT_Fp" | |
| "64m32\000ISTT_Fp64m64\000ISTT_Fp64m80\000IST_F16m\000IST_F32m\000IST_FP" | |
| "16m\000IST_FP32m\000IST_FP64m\000IST_Fp16m32\000IST_Fp16m64\000IST_Fp16" | |
| "m80\000IST_Fp32m32\000IST_Fp32m64\000IST_Fp32m80\000IST_Fp64m32\000IST_" | |
| "Fp64m64\000IST_Fp64m80\000Int_CMPSDrm\000Int_CMPSDrr\000Int_CMPSSrm\000" | |
| "Int_CMPSSrr\000Int_COMISDrm\000Int_COMISDrr\000Int_COMISSrm\000Int_COMI" | |
| "SSrr\000Int_CVTDQ2PDrm\000Int_CVTDQ2PDrr\000Int_CVTDQ2PSrm\000Int_CVTDQ" | |
| "2PSrr\000Int_CVTPD2DQrm\000Int_CVTPD2DQrr\000Int_CVTPD2PIrm\000Int_CVTP" | |
| "D2PIrr\000Int_CVTPD2PSrm\000Int_CVTPD2PSrr\000Int_CVTPI2PDrm\000Int_CVT" | |
| "PI2PDrr\000Int_CVTPI2PSrm\000Int_CVTPI2PSrr\000Int_CVTPS2DQrm\000Int_CV" | |
| "TPS2DQrr\000Int_CVTPS2PDrm\000Int_CVTPS2PDrr\000Int_CVTPS2PIrm\000Int_C" | |
| "VTPS2PIrr\000Int_CVTSD2SI64rm\000Int_CVTSD2SI64rr\000Int_CVTSD2SIrm\000" | |
| "Int_CVTSD2SIrr\000Int_CVTSD2SSrm\000Int_CVTSD2SSrr\000Int_CVTSI2SD64rm\000" | |
| "Int_CVTSI2SD64rr\000Int_CVTSI2SDrm\000Int_CVTSI2SDrr\000Int_CVTSI2SS64r" | |
| "m\000Int_CVTSI2SS64rr\000Int_CVTSI2SSrm\000Int_CVTSI2SSrr\000Int_CVTSS2" | |
| "SDrm\000Int_CVTSS2SDrr\000Int_CVTSS2SI64rm\000Int_CVTSS2SI64rr\000Int_C" | |
| "VTSS2SIrm\000Int_CVTSS2SIrr\000Int_CVTTPD2DQrm\000Int_CVTTPD2DQrr\000In" | |
| "t_CVTTPD2PIrm\000Int_CVTTPD2PIrr\000Int_CVTTPS2DQrm\000Int_CVTTPS2DQrr\000" | |
| "Int_CVTTPS2PIrm\000Int_CVTTPS2PIrr\000Int_CVTTSD2SI64rm\000Int_CVTTSD2S" | |
| "I64rr\000Int_CVTTSD2SIrm\000Int_CVTTSD2SIrr\000Int_CVTTSS2SI64rm\000Int" | |
| "_CVTTSS2SI64rr\000Int_CVTTSS2SIrm\000Int_CVTTSS2SIrr\000Int_MemBarrier\000" | |
| "Int_MemBarrierNoSSE\000Int_MemBarrierNoSSE64\000Int_UCOMISDrm\000Int_UC" | |
| "OMISDrr\000Int_UCOMISSrm\000Int_UCOMISSrr\000Int_VCMPSDrm\000Int_VCMPSD" | |
| "rr\000Int_VCMPSSrm\000Int_VCMPSSrr\000Int_VCOMISDrm\000Int_VCOMISDrr\000" | |
| "Int_VCOMISSrm\000Int_VCOMISSrr\000Int_VCVTDQ2PDrm\000Int_VCVTDQ2PDrr\000" | |
| "Int_VCVTDQ2PSrm\000Int_VCVTDQ2PSrr\000Int_VCVTPD2DQrm\000Int_VCVTPD2DQr" | |
| "r\000Int_VCVTPD2PSrm\000Int_VCVTPD2PSrr\000Int_VCVTPS2DQrm\000Int_VCVTP" | |
| "S2DQrr\000Int_VCVTPS2PDrm\000Int_VCVTPS2PDrr\000Int_VCVTSD2SI64rm\000In" | |
| "t_VCVTSD2SI64rr\000Int_VCVTSD2SIrm\000Int_VCVTSD2SIrr\000Int_VCVTSD2SSr" | |
| "m\000Int_VCVTSD2SSrr\000Int_VCVTSI2SD64rm\000Int_VCVTSI2SD64rr\000Int_V" | |
| "CVTSI2SDrm\000Int_VCVTSI2SDrr\000Int_VCVTSI2SS64rm\000Int_VCVTSI2SS64rr" | |
| "\000Int_VCVTSI2SSrm\000Int_VCVTSI2SSrr\000Int_VCVTSS2SDrm\000Int_VCVTSS" | |
| "2SDrr\000Int_VCVTSS2SI64rm\000Int_VCVTSS2SI64rr\000Int_VCVTSS2SIrm\000I" | |
| "nt_VCVTSS2SIrr\000Int_VCVTTPD2DQrm\000Int_VCVTTPD2DQrr\000Int_VCVTTPS2D" | |
| "Qrm\000Int_VCVTTPS2DQrr\000Int_VCVTTSD2SI64rm\000Int_VCVTTSD2SI64rr\000" | |
| "Int_VCVTTSD2SIrm\000Int_VCVTTSD2SIrr\000Int_VCVTTSS2SI64rm\000Int_VCVTT" | |
| "SS2SI64rr\000Int_VCVTTSS2SIrm\000Int_VCVTTSS2SIrr\000Int_VUCOMISDrm\000" | |
| "Int_VUCOMISDrr\000Int_VUCOMISSrm\000Int_VUCOMISSrr\000JAE_1\000JAE_4\000" | |
| "JA_1\000JA_4\000JBE_1\000JBE_4\000JB_1\000JB_4\000JCXZ8\000JE_1\000JE_4" | |
| "\000JGE_1\000JGE_4\000JG_1\000JG_4\000JLE_1\000JLE_4\000JL_1\000JL_4\000" | |
| "JMP32m\000JMP32r\000JMP64m\000JMP64pcrel32\000JMP64r\000JMP_1\000JMP_4\000" | |
| "JNE_1\000JNE_4\000JNO_1\000JNO_4\000JNP_1\000JNP_4\000JNS_1\000JNS_4\000" | |
| "JO_1\000JO_4\000JP_1\000JP_4\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR1" | |
| "6rr\000LAR32rm\000LAR32rr\000LAR64rm\000LAR64rr\000LCMPXCHG16\000LCMPXC" | |
| "HG32\000LCMPXCHG64\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000" | |
| "LDS16rm\000LDS32rm\000LD_F0\000LD_F1\000LD_F32m\000LD_F64m\000LD_F80m\000" | |
| "LD_Fp032\000LD_Fp064\000LD_Fp080\000LD_Fp132\000LD_Fp164\000LD_Fp180\000" | |
| "LD_Fp32m\000LD_Fp32m64\000LD_Fp32m80\000LD_Fp64m\000LD_Fp64m80\000LD_Fp" | |
| "80m\000LD_Frr\000LEA16r\000LEA32r\000LEA64_32r\000LEA64r\000LEAVE\000LE" | |
| "AVE64\000LES16rm\000LES32rm\000LFENCE\000LFS16rm\000LFS32rm\000LFS64rm\000" | |
| "LGDTm\000LGS16rm\000LGS32rm\000LGS64rm\000LIDTm\000LLDT16m\000LLDT16r\000" | |
| "LMSW16m\000LMSW16r\000LOCK_ADD16mi\000LOCK_ADD16mi8\000LOCK_ADD16mr\000" | |
| "LOCK_ADD32mi\000LOCK_ADD32mi8\000LOCK_ADD32mr\000LOCK_ADD64mi32\000LOCK" | |
| "_ADD64mi8\000LOCK_ADD64mr\000LOCK_ADD8mi\000LOCK_ADD8mr\000LOCK_DEC16m\000" | |
| "LOCK_DEC32m\000LOCK_DEC64m\000LOCK_DEC8m\000LOCK_INC16m\000LOCK_INC32m\000" | |
| "LOCK_INC64m\000LOCK_INC8m\000LOCK_PREFIX\000LOCK_SUB16mi\000LOCK_SUB16m" | |
| "i8\000LOCK_SUB16mr\000LOCK_SUB32mi\000LOCK_SUB32mi8\000LOCK_SUB32mr\000" | |
| "LOCK_SUB64mi32\000LOCK_SUB64mi8\000LOCK_SUB64mr\000LOCK_SUB8mi\000LOCK_" | |
| "SUB8mr\000LODSB\000LODSD\000LODSQ\000LODSW\000LOOP\000LOOPE\000LOOPNE\000" | |
| "LRET\000LRETI\000LSL16rm\000LSL16rr\000LSL32rm\000LSL32rr\000LSL64rm\000" | |
| "LSL64rr\000LSS16rm\000LSS32rm\000LSS64rm\000LTRm\000LTRr\000LXADD16\000" | |
| "LXADD32\000LXADD64\000LXADD8\000MASKMOVDQU\000MASKMOVDQU64\000MAXPDrm\000" | |
| "MAXPDrm_Int\000MAXPDrr\000MAXPDrr_Int\000MAXPSrm\000MAXPSrm_Int\000MAXP" | |
| "Srr\000MAXPSrr_Int\000MAXSDrm\000MAXSDrm_Int\000MAXSDrr\000MAXSDrr_Int\000" | |
| "MAXSSrm\000MAXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000MINGW_ALL" | |
| "OCA\000MINPDrm\000MINPDrm_Int\000MINPDrr\000MINPDrr_Int\000MINPSrm\000M" | |
| "INPSrm_Int\000MINPSrr\000MINPSrr_Int\000MINSDrm\000MINSDrm_Int\000MINSD" | |
| "rr\000MINSDrr_Int\000MINSSrm\000MINSSrm_Int\000MINSSrr\000MINSSrr_Int\000" | |
| "MMX_CVTPD2PIrm\000MMX_CVTPD2PIrr\000MMX_CVTPI2PDrm\000MMX_CVTPI2PDrr\000" | |
| "MMX_CVTPI2PSrm\000MMX_CVTPI2PSrr\000MMX_CVTPS2PIrm\000MMX_CVTPS2PIrr\000" | |
| "MMX_CVTTPD2PIrm\000MMX_CVTTPD2PIrr\000MMX_CVTTPS2PIrm\000MMX_CVTTPS2PIr" | |
| "r\000MMX_EMMS\000MMX_FEMMS\000MMX_MASKMOVQ\000MMX_MASKMOVQ64\000MMX_MOV" | |
| "D64from64rr\000MMX_MOVD64grr\000MMX_MOVD64mr\000MMX_MOVD64rm\000MMX_MOV" | |
| "D64rr\000MMX_MOVD64rrv164\000MMX_MOVD64to64rr\000MMX_MOVDQ2Qrr\000MMX_M" | |
| "OVFR642Qrr\000MMX_MOVNTQmr\000MMX_MOVQ2DQrr\000MMX_MOVQ2FR64rr\000MMX_M" | |
| "OVQ64mr\000MMX_MOVQ64rm\000MMX_MOVQ64rr\000MMX_MOVZDI2PDIrm\000MMX_MOVZ" | |
| "DI2PDIrr\000MMX_PACKSSDWrm\000MMX_PACKSSDWrr\000MMX_PACKSSWBrm\000MMX_P" | |
| "ACKSSWBrr\000MMX_PACKUSWBrm\000MMX_PACKUSWBrr\000MMX_PADDBrm\000MMX_PAD" | |
| "DBrr\000MMX_PADDDrm\000MMX_PADDDrr\000MMX_PADDQrm\000MMX_PADDQrr\000MMX" | |
| "_PADDSBrm\000MMX_PADDSBrr\000MMX_PADDSWrm\000MMX_PADDSWrr\000MMX_PADDUS" | |
| "Brm\000MMX_PADDUSBrr\000MMX_PADDUSWrm\000MMX_PADDUSWrr\000MMX_PADDWrm\000" | |
| "MMX_PADDWrr\000MMX_PANDNrm\000MMX_PANDNrr\000MMX_PANDrm\000MMX_PANDrr\000" | |
| "MMX_PAVGBrm\000MMX_PAVGBrr\000MMX_PAVGWrm\000MMX_PAVGWrr\000MMX_PCMPEQB" | |
| "rm\000MMX_PCMPEQBrr\000MMX_PCMPEQDrm\000MMX_PCMPEQDrr\000MMX_PCMPEQWrm\000" | |
| "MMX_PCMPEQWrr\000MMX_PCMPGTBrm\000MMX_PCMPGTBrr\000MMX_PCMPGTDrm\000MMX" | |
| "_PCMPGTDrr\000MMX_PCMPGTWrm\000MMX_PCMPGTWrr\000MMX_PEXTRWri\000MMX_PIN" | |
| "SRWrmi\000MMX_PINSRWrri\000MMX_PMADDWDrm\000MMX_PMADDWDrr\000MMX_PMAXSW" | |
| "rm\000MMX_PMAXSWrr\000MMX_PMAXUBrm\000MMX_PMAXUBrr\000MMX_PMINSWrm\000M" | |
| "MX_PMINSWrr\000MMX_PMINUBrm\000MMX_PMINUBrr\000MMX_PMOVMSKBrr\000MMX_PM" | |
| "ULHUWrm\000MMX_PMULHUWrr\000MMX_PMULHWrm\000MMX_PMULHWrr\000MMX_PMULLWr" | |
| "m\000MMX_PMULLWrr\000MMX_PMULUDQrm\000MMX_PMULUDQrr\000MMX_PORrm\000MMX" | |
| "_PORrr\000MMX_PSADBWrm\000MMX_PSADBWrr\000MMX_PSHUFWmi\000MMX_PSHUFWri\000" | |
| "MMX_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_PSLLQrm" | |
| "\000MMX_PSLLQrr\000MMX_PSLLWri\000MMX_PSLLWrm\000MMX_PSLLWrr\000MMX_PSR" | |
| "ADri\000MMX_PSRADrm\000MMX_PSRADrr\000MMX_PSRAWri\000MMX_PSRAWrm\000MMX" | |
| "_PSRAWrr\000MMX_PSRLDri\000MMX_PSRLDrm\000MMX_PSRLDrr\000MMX_PSRLQri\000" | |
| "MMX_PSRLQrm\000MMX_PSRLQrr\000MMX_PSRLWri\000MMX_PSRLWrm\000MMX_PSRLWrr" | |
| "\000MMX_PSUBBrm\000MMX_PSUBBrr\000MMX_PSUBDrm\000MMX_PSUBDrr\000MMX_PSU" | |
| "BQrm\000MMX_PSUBQrr\000MMX_PSUBSBrm\000MMX_PSUBSBrr\000MMX_PSUBSWrm\000" | |
| "MMX_PSUBSWrr\000MMX_PSUBUSBrm\000MMX_PSUBUSBrr\000MMX_PSUBUSWrm\000MMX_" | |
| "PSUBUSWrr\000MMX_PSUBWrm\000MMX_PSUBWrr\000MMX_PUNPCKHBWrm\000MMX_PUNPC" | |
| "KHBWrr\000MMX_PUNPCKHDQrm\000MMX_PUNPCKHDQrr\000MMX_PUNPCKHWDrm\000MMX_" | |
| "PUNPCKHWDrr\000MMX_PUNPCKLBWrm\000MMX_PUNPCKLBWrr\000MMX_PUNPCKLDQrm\000" | |
| "MMX_PUNPCKLDQrr\000MMX_PUNPCKLWDrm\000MMX_PUNPCKLWDrr\000MMX_PXORrm\000" | |
| "MMX_PXORrr\000MMX_V_SET0\000MMX_V_SETALLONES\000MONITOR\000MOV16ao16\000" | |
| "MOV16mi\000MOV16mr\000MOV16ms\000MOV16o16a\000MOV16r0\000MOV16ri\000MOV" | |
| "16rm\000MOV16rr\000MOV16rr_REV\000MOV16rs\000MOV16sm\000MOV16sr\000MOV3" | |
| "2ao32\000MOV32cr\000MOV32dr\000MOV32mi\000MOV32mr\000MOV32mr_TC\000MOV3" | |
| "2ms\000MOV32o32a\000MOV32r0\000MOV32rc\000MOV32rd\000MOV32ri\000MOV32rm" | |
| "\000MOV32rm_TC\000MOV32rr\000MOV32rr_REV\000MOV32rr_TC\000MOV32rs\000MO" | |
| "V32sm\000MOV32sr\000MOV64FSrm\000MOV64GSrm\000MOV64ao64\000MOV64ao8\000" | |
| "MOV64cr\000MOV64dr\000MOV64mi32\000MOV64mr\000MOV64mr_TC\000MOV64ms\000" | |
| "MOV64o64a\000MOV64o8a\000MOV64r0\000MOV64rc\000MOV64rd\000MOV64ri\000MO" | |
| "V64ri32\000MOV64ri64i32\000MOV64ri_alt\000MOV64rm\000MOV64rm_TC\000MOV6" | |
| "4rr\000MOV64rr_REV\000MOV64rr_TC\000MOV64rs\000MOV64sm\000MOV64sr\000MO" | |
| "V64toPQIrr\000MOV64toSDrm\000MOV64toSDrr\000MOV8ao8\000MOV8mi\000MOV8mr" | |
| "\000MOV8mr_NOREX\000MOV8o8a\000MOV8r0\000MOV8ri\000MOV8rm\000MOV8rm_NOR" | |
| "EX\000MOV8rr\000MOV8rr_NOREX\000MOV8rr_REV\000MOVAPDmr\000MOVAPDrm\000M" | |
| "OVAPDrr\000MOVAPSmr\000MOVAPSrm\000MOVAPSrr\000MOVDDUPrm\000MOVDDUPrr\000" | |
| "MOVDI2PDIrm\000MOVDI2PDIrr\000MOVDI2SSrm\000MOVDI2SSrr\000MOVDQAmr\000M" | |
| "OVDQArm\000MOVDQArr\000MOVDQUmr\000MOVDQUmr_Int\000MOVDQUrm\000MOVDQUrm" | |
| "_Int\000MOVHLPSrr\000MOVHPDmr\000MOVHPDrm\000MOVHPSmr\000MOVHPSrm\000MO" | |
| "VLHPSrr\000MOVLPDmr\000MOVLPDrm\000MOVLPSmr\000MOVLPSrm\000MOVLQ128mr\000" | |
| "MOVMSKPDrr\000MOVMSKPSrr\000MOVNTDQArm\000MOVNTDQ_64mr\000MOVNTDQmr\000" | |
| "MOVNTDQmr_Int\000MOVNTI_64mr\000MOVNTImr\000MOVNTImr_Int\000MOVNTPDmr\000" | |
| "MOVNTPDmr_Int\000MOVNTPSmr\000MOVNTPSmr_Int\000MOVPC32r\000MOVPDI2DImr\000" | |
| "MOVPDI2DIrr\000MOVPQI2QImr\000MOVPQIto64rr\000MOVQI2PQIrm\000MOVQxrxr\000" | |
| "MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr\000MOVSDto64mr\000MOVSD" | |
| "to64rr\000MOVSHDUPrm\000MOVSHDUPrr\000MOVSLDUPrm\000MOVSLDUPrr\000MOVSQ" | |
| "\000MOVSS2DImr\000MOVSS2DIrr\000MOVSSmr\000MOVSSrm\000MOVSSrr\000MOVSW\000" | |
| "MOVSX16rm8\000MOVSX16rm8W\000MOVSX16rr8\000MOVSX16rr8W\000MOVSX32rm16\000" | |
| "MOVSX32rm8\000MOVSX32rr16\000MOVSX32rr8\000MOVSX64rm16\000MOVSX64rm32\000" | |
| "MOVSX64rm8\000MOVSX64rr16\000MOVSX64rr32\000MOVSX64rr8\000MOVUPDmr\000M" | |
| "OVUPDmr_Int\000MOVUPDrm\000MOVUPDrm_Int\000MOVUPDrr\000MOVUPSmr\000MOVU" | |
| "PSmr_Int\000MOVUPSrm\000MOVUPSrm_Int\000MOVUPSrr\000MOVZDI2PDIrm\000MOV" | |
| "ZDI2PDIrr\000MOVZPQILo2PQIrm\000MOVZPQILo2PQIrr\000MOVZQI2PQIrm\000MOVZ" | |
| "QI2PQIrr\000MOVZX16rm8\000MOVZX16rm8W\000MOVZX16rr8\000MOVZX16rr8W\000M" | |
| "OVZX32_NOREXrm8\000MOVZX32_NOREXrr8\000MOVZX32rm16\000MOVZX32rm8\000MOV" | |
| "ZX32rr16\000MOVZX32rr8\000MOVZX64rm16\000MOVZX64rm16_Q\000MOVZX64rm32\000" | |
| "MOVZX64rm8\000MOVZX64rm8_Q\000MOVZX64rr16\000MOVZX64rr16_Q\000MOVZX64rr" | |
| "32\000MOVZX64rr8\000MOVZX64rr8_Q\000MOV_Fp3232\000MOV_Fp3264\000MOV_Fp3" | |
| "280\000MOV_Fp6432\000MOV_Fp6464\000MOV_Fp6480\000MOV_Fp8032\000MOV_Fp80" | |
| "64\000MOV_Fp8080\000MPSADBWrmi\000MPSADBWrri\000MUL16m\000MUL16r\000MUL" | |
| "32m\000MUL32r\000MUL64m\000MUL64r\000MUL8m\000MUL8r\000MULPDrm\000MULPD" | |
| "rr\000MULPSrm\000MULPSrr\000MULSDrm\000MULSDrm_Int\000MULSDrr\000MULSDr" | |
| "r_Int\000MULSSrm\000MULSSrm_Int\000MULSSrr\000MULSSrr_Int\000MUL_F32m\000" | |
| "MUL_F64m\000MUL_FI16m\000MUL_FI32m\000MUL_FPrST0\000MUL_FST0r\000MUL_Fp" | |
| "32\000MUL_Fp32m\000MUL_Fp64\000MUL_Fp64m\000MUL_Fp64m32\000MUL_Fp80\000" | |
| "MUL_Fp80m32\000MUL_Fp80m64\000MUL_FpI16m32\000MUL_FpI16m64\000MUL_FpI16" | |
| "m80\000MUL_FpI32m32\000MUL_FpI32m64\000MUL_FpI32m80\000MUL_FrST0\000MWA" | |
| "IT\000NEG16m\000NEG16r\000NEG32m\000NEG32r\000NEG64m\000NEG64r\000NEG8m" | |
| "\000NEG8r\000NOOP\000NOOPL\000NOOPW\000NOT16m\000NOT16r\000NOT32m\000NO" | |
| "T32r\000NOT64m\000NOT64r\000NOT8m\000NOT8r\000OR16i16\000OR16mi\000OR16" | |
| "mi8\000OR16mr\000OR16ri\000OR16ri8\000OR16rm\000OR16rr\000OR16rr_REV\000" | |
| "OR32i32\000OR32mi\000OR32mi8\000OR32mr\000OR32ri\000OR32ri8\000OR32rm\000" | |
| "OR32rr\000OR32rr_REV\000OR64i32\000OR64mi32\000OR64mi8\000OR64mr\000OR6" | |
| "4ri32\000OR64ri8\000OR64rm\000OR64rr\000OR64rr_REV\000OR8i8\000OR8mi\000" | |
| "OR8mr\000OR8ri\000OR8rm\000OR8rr\000OR8rr_REV\000ORPDrm\000ORPDrr\000OR" | |
| "PSrm\000ORPSrr\000OUT16ir\000OUT16rr\000OUT32ir\000OUT32rr\000OUT8ir\000" | |
| "OUT8rr\000OUTSB\000OUTSD\000OUTSW\000PABSBrm128\000PABSBrm64\000PABSBrr" | |
| "128\000PABSBrr64\000PABSDrm128\000PABSDrm64\000PABSDrr128\000PABSDrr64\000" | |
| "PABSWrm128\000PABSWrm64\000PABSWrr128\000PABSWrr64\000PACKSSDWrm\000PAC" | |
| "KSSDWrr\000PACKSSWBrm\000PACKSSWBrr\000PACKUSDWrm\000PACKUSDWrr\000PACK" | |
| "USWBrm\000PACKUSWBrr\000PADDBrm\000PADDBrr\000PADDDrm\000PADDDrr\000PAD" | |
| "DQrm\000PADDQrr\000PADDSBrm\000PADDSBrr\000PADDSWrm\000PADDSWrr\000PADD" | |
| "USBrm\000PADDUSBrr\000PADDUSWrm\000PADDUSWrr\000PADDWrm\000PADDWrr\000P" | |
| "ALIGNR128rm\000PALIGNR128rr\000PALIGNR64rm\000PALIGNR64rr\000PANDNrm\000" | |
| "PANDNrr\000PANDrm\000PANDrr\000PAUSE\000PAVGBrm\000PAVGBrr\000PAVGWrm\000" | |
| "PAVGWrr\000PBLENDVBrm0\000PBLENDVBrr0\000PBLENDWrmi\000PBLENDWrri\000PC" | |
| "MPEQBrm\000PCMPEQBrr\000PCMPEQDrm\000PCMPEQDrr\000PCMPEQQrm\000PCMPEQQr" | |
| "r\000PCMPEQWrm\000PCMPEQWrr\000PCMPESTRIArm\000PCMPESTRIArr\000PCMPESTR" | |
| "ICrm\000PCMPESTRICrr\000PCMPESTRIOrm\000PCMPESTRIOrr\000PCMPESTRISrm\000" | |
| "PCMPESTRISrr\000PCMPESTRIZrm\000PCMPESTRIZrr\000PCMPESTRIrm\000PCMPESTR" | |
| "Irr\000PCMPESTRM128MEM\000PCMPESTRM128REG\000PCMPESTRM128rm\000PCMPESTR" | |
| "M128rr\000PCMPGTBrm\000PCMPGTBrr\000PCMPGTDrm\000PCMPGTDrr\000PCMPGTQrm" | |
| "\000PCMPGTQrr\000PCMPGTWrm\000PCMPGTWrr\000PCMPISTRIArm\000PCMPISTRIArr" | |
| "\000PCMPISTRICrm\000PCMPISTRICrr\000PCMPISTRIOrm\000PCMPISTRIOrr\000PCM" | |
| "PISTRISrm\000PCMPISTRISrr\000PCMPISTRIZrm\000PCMPISTRIZrr\000PCMPISTRIr" | |
| "m\000PCMPISTRIrr\000PCMPISTRM128MEM\000PCMPISTRM128REG\000PCMPISTRM128r" | |
| "m\000PCMPISTRM128rr\000PEXTRBmr\000PEXTRBrr\000PEXTRDmr\000PEXTRDrr\000" | |
| "PEXTRQmr\000PEXTRQrr\000PEXTRWmr\000PEXTRWri\000PHADDDrm128\000PHADDDrm" | |
| "64\000PHADDDrr128\000PHADDDrr64\000PHADDSWrm128\000PHADDSWrm64\000PHADD" | |
| "SWrr128\000PHADDSWrr64\000PHADDWrm128\000PHADDWrm64\000PHADDWrr128\000P" | |
| "HADDWrr64\000PHMINPOSUWrm128\000PHMINPOSUWrr128\000PHSUBDrm128\000PHSUB" | |
| "Drm64\000PHSUBDrr128\000PHSUBDrr64\000PHSUBSWrm128\000PHSUBSWrm64\000PH" | |
| "SUBSWrr128\000PHSUBSWrr64\000PHSUBWrm128\000PHSUBWrm64\000PHSUBWrr128\000" | |
| "PHSUBWrr64\000PINSRBrm\000PINSRBrr\000PINSRDrm\000PINSRDrr\000PINSRQrm\000" | |
| "PINSRQrr\000PINSRWrmi\000PINSRWrri\000PMADDUBSWrm128\000PMADDUBSWrm64\000" | |
| "PMADDUBSWrr128\000PMADDUBSWrr64\000PMADDWDrm\000PMADDWDrr\000PMAXSBrm\000" | |
| "PMAXSBrr\000PMAXSDrm\000PMAXSDrr\000PMAXSWrm\000PMAXSWrr\000PMAXUBrm\000" | |
| "PMAXUBrr\000PMAXUDrm\000PMAXUDrr\000PMAXUWrm\000PMAXUWrr\000PMINSBrm\000" | |
| "PMINSBrr\000PMINSDrm\000PMINSDrr\000PMINSWrm\000PMINSWrr\000PMINUBrm\000" | |
| "PMINUBrr\000PMINUDrm\000PMINUDrr\000PMINUWrm\000PMINUWrr\000PMOVMSKBrr\000" | |
| "PMOVSXBDrm\000PMOVSXBDrr\000PMOVSXBQrm\000PMOVSXBQrr\000PMOVSXBWrm\000P" | |
| "MOVSXBWrr\000PMOVSXDQrm\000PMOVSXDQrr\000PMOVSXWDrm\000PMOVSXWDrr\000PM" | |
| "OVSXWQrm\000PMOVSXWQrr\000PMOVZXBDrm\000PMOVZXBDrr\000PMOVZXBQrm\000PMO" | |
| "VZXBQrr\000PMOVZXBWrm\000PMOVZXBWrr\000PMOVZXDQrm\000PMOVZXDQrr\000PMOV" | |
| "ZXWDrm\000PMOVZXWDrr\000PMOVZXWQrm\000PMOVZXWQrr\000PMULDQrm\000PMULDQr" | |
| "r\000PMULHRSWrm128\000PMULHRSWrm64\000PMULHRSWrr128\000PMULHRSWrr64\000" | |
| "PMULHUWrm\000PMULHUWrr\000PMULHWrm\000PMULHWrr\000PMULLDrm\000PMULLDrr\000" | |
| "PMULLWrm\000PMULLWrr\000PMULUDQrm\000PMULUDQrr\000POP16r\000POP16rmm\000" | |
| "POP16rmr\000POP32r\000POP32rmm\000POP32rmr\000POP64r\000POP64rmm\000POP" | |
| "64rmr\000POPA32\000POPCNT16rm\000POPCNT16rr\000POPCNT32rm\000POPCNT32rr" | |
| "\000POPCNT64rm\000POPCNT64rr\000POPF16\000POPF32\000POPF64\000POPFS16\000" | |
| "POPFS32\000POPFS64\000POPGS16\000POPGS32\000POPGS64\000PORrm\000PORrr\000" | |
| "PREFETCHNTA\000PREFETCHT0\000PREFETCHT1\000PREFETCHT2\000PSADBWrm\000PS" | |
| "ADBWrr\000PSHUFBrm128\000PSHUFBrm64\000PSHUFBrr128\000PSHUFBrr64\000PSH" | |
| "UFDmi\000PSHUFDri\000PSHUFHWmi\000PSHUFHWri\000PSHUFLWmi\000PSHUFLWri\000" | |
| "PSIGNBrm128\000PSIGNBrm64\000PSIGNBrr128\000PSIGNBrr64\000PSIGNDrm128\000" | |
| "PSIGNDrm64\000PSIGNDrr128\000PSIGNDrr64\000PSIGNWrm128\000PSIGNWrm64\000" | |
| "PSIGNWrr128\000PSIGNWrr64\000PSLLDQri\000PSLLDri\000PSLLDrm\000PSLLDrr\000" | |
| "PSLLQri\000PSLLQrm\000PSLLQrr\000PSLLWri\000PSLLWrm\000PSLLWrr\000PSRAD" | |
| "ri\000PSRADrm\000PSRADrr\000PSRAWri\000PSRAWrm\000PSRAWrr\000PSRLDQri\000" | |
| "PSRLDri\000PSRLDrm\000PSRLDrr\000PSRLQri\000PSRLQrm\000PSRLQrr\000PSRLW" | |
| "ri\000PSRLWrm\000PSRLWrr\000PSUBBrm\000PSUBBrr\000PSUBDrm\000PSUBDrr\000" | |
| "PSUBQrm\000PSUBQrr\000PSUBSBrm\000PSUBSBrr\000PSUBSWrm\000PSUBSWrr\000P" | |
| "SUBUSBrm\000PSUBUSBrr\000PSUBUSWrm\000PSUBUSWrr\000PSUBWrm\000PSUBWrr\000" | |
| "PTESTrm\000PTESTrr\000PUNPCKHBWrm\000PUNPCKHBWrr\000PUNPCKHDQrm\000PUNP" | |
| "CKHDQrr\000PUNPCKHQDQrm\000PUNPCKHQDQrr\000PUNPCKHWDrm\000PUNPCKHWDrr\000" | |
| "PUNPCKLBWrm\000PUNPCKLBWrr\000PUNPCKLDQrm\000PUNPCKLDQrr\000PUNPCKLQDQr" | |
| "m\000PUNPCKLQDQrr\000PUNPCKLWDrm\000PUNPCKLWDrr\000PUSH16r\000PUSH16rmm" | |
| "\000PUSH16rmr\000PUSH32r\000PUSH32rmm\000PUSH32rmr\000PUSH64i16\000PUSH" | |
| "64i32\000PUSH64i8\000PUSH64r\000PUSH64rmm\000PUSH64rmr\000PUSHA32\000PU" | |
| "SHF16\000PUSHF32\000PUSHF64\000PUSHFS16\000PUSHFS32\000PUSHFS64\000PUSH" | |
| "GS16\000PUSHGS32\000PUSHGS64\000PUSHi16\000PUSHi32\000PUSHi8\000PXORrm\000" | |
| "PXORrr\000RCL16m1\000RCL16mCL\000RCL16mi\000RCL16r1\000RCL16rCL\000RCL1" | |
| "6ri\000RCL32m1\000RCL32mCL\000RCL32mi\000RCL32r1\000RCL32rCL\000RCL32ri" | |
| "\000RCL64m1\000RCL64mCL\000RCL64mi\000RCL64r1\000RCL64rCL\000RCL64ri\000" | |
| "RCL8m1\000RCL8mCL\000RCL8mi\000RCL8r1\000RCL8rCL\000RCL8ri\000RCPPSm\000" | |
| "RCPPSm_Int\000RCPPSr\000RCPPSr_Int\000RCPSSm\000RCPSSm_Int\000RCPSSr\000" | |
| "RCPSSr_Int\000RCR16m1\000RCR16mCL\000RCR16mi\000RCR16r1\000RCR16rCL\000" | |
| "RCR16ri\000RCR32m1\000RCR32mCL\000RCR32mi\000RCR32r1\000RCR32rCL\000RCR" | |
| "32ri\000RCR64m1\000RCR64mCL\000RCR64mi\000RCR64r1\000RCR64rCL\000RCR64r" | |
| "i\000RCR8m1\000RCR8mCL\000RCR8mi\000RCR8r1\000RCR8rCL\000RCR8ri\000RDMS" | |
| "R\000RDPMC\000RDTSC\000RDTSCP\000REPNE_PREFIX\000REP_MOVSB\000REP_MOVSD" | |
| "\000REP_MOVSQ\000REP_MOVSW\000REP_PREFIX\000REP_STOSB\000REP_STOSD\000R" | |
| "EP_STOSQ\000REP_STOSW\000RET\000RETI\000ROL16m1\000ROL16mCL\000ROL16mi\000" | |
| "ROL16r1\000ROL16rCL\000ROL16ri\000ROL32m1\000ROL32mCL\000ROL32mi\000ROL" | |
| "32r1\000ROL32rCL\000ROL32ri\000ROL64m1\000ROL64mCL\000ROL64mi\000ROL64r" | |
| "1\000ROL64rCL\000ROL64ri\000ROL8m1\000ROL8mCL\000ROL8mi\000ROL8r1\000RO" | |
| "L8rCL\000ROL8ri\000ROR16m1\000ROR16mCL\000ROR16mi\000ROR16r1\000ROR16rC" | |
| "L\000ROR16ri\000ROR32m1\000ROR32mCL\000ROR32mi\000ROR32r1\000ROR32rCL\000" | |
| "ROR32ri\000ROR64m1\000ROR64mCL\000ROR64mi\000ROR64r1\000ROR64rCL\000ROR" | |
| "64ri\000ROR8m1\000ROR8mCL\000ROR8mi\000ROR8r1\000ROR8rCL\000ROR8ri\000R" | |
| "OUNDPDm_Int\000ROUNDPDr_Int\000ROUNDPSm_Int\000ROUNDPSr_Int\000ROUNDSDm" | |
| "_Int\000ROUNDSDr_Int\000ROUNDSSm_Int\000ROUNDSSr_Int\000RSM\000RSQRTPSm" | |
| "\000RSQRTPSm_Int\000RSQRTPSr\000RSQRTPSr_Int\000RSQRTSSm\000RSQRTSSm_In" | |
| "t\000RSQRTSSr\000RSQRTSSr_Int\000SAHF\000SAR16m1\000SAR16mCL\000SAR16mi" | |
| "\000SAR16r1\000SAR16rCL\000SAR16ri\000SAR32m1\000SAR32mCL\000SAR32mi\000" | |
| "SAR32r1\000SAR32rCL\000SAR32ri\000SAR64m1\000SAR64mCL\000SAR64mi\000SAR" | |
| "64r1\000SAR64rCL\000SAR64ri\000SAR8m1\000SAR8mCL\000SAR8mi\000SAR8r1\000" | |
| "SAR8rCL\000SAR8ri\000SBB16i16\000SBB16mi\000SBB16mi8\000SBB16mr\000SBB1" | |
| "6ri\000SBB16ri8\000SBB16rm\000SBB16rr\000SBB16rr_REV\000SBB32i32\000SBB" | |
| "32mi\000SBB32mi8\000SBB32mr\000SBB32ri\000SBB32ri8\000SBB32rm\000SBB32r" | |
| "r\000SBB32rr_REV\000SBB64i32\000SBB64mi32\000SBB64mi8\000SBB64mr\000SBB" | |
| "64ri32\000SBB64ri8\000SBB64rm\000SBB64rr\000SBB64rr_REV\000SBB8i8\000SB" | |
| "B8mi\000SBB8mr\000SBB8ri\000SBB8rm\000SBB8rr\000SBB8rr_REV\000SCAS16\000" | |
| "SCAS32\000SCAS64\000SCAS8\000SETAEm\000SETAEr\000SETAm\000SETAr\000SETB" | |
| "Em\000SETBEr\000SETB_C16r\000SETB_C32r\000SETB_C64r\000SETB_C8r\000SETB" | |
| "m\000SETBr\000SETEm\000SETEr\000SETGEm\000SETGEr\000SETGm\000SETGr\000S" | |
| "ETLEm\000SETLEr\000SETLm\000SETLr\000SETNEm\000SETNEr\000SETNOm\000SETN" | |
| "Or\000SETNPm\000SETNPr\000SETNSm\000SETNSr\000SETOm\000SETOr\000SETPm\000" | |
| "SETPr\000SETSm\000SETSr\000SFENCE\000SGDTm\000SHL16m1\000SHL16mCL\000SH" | |
| "L16mi\000SHL16r1\000SHL16rCL\000SHL16ri\000SHL32m1\000SHL32mCL\000SHL32" | |
| "mi\000SHL32r1\000SHL32rCL\000SHL32ri\000SHL64m1\000SHL64mCL\000SHL64mi\000" | |
| "SHL64r1\000SHL64rCL\000SHL64ri\000SHL8m1\000SHL8mCL\000SHL8mi\000SHL8r1" | |
| "\000SHL8rCL\000SHL8ri\000SHLD16mrCL\000SHLD16mri8\000SHLD16rrCL\000SHLD" | |
| "16rri8\000SHLD32mrCL\000SHLD32mri8\000SHLD32rrCL\000SHLD32rri8\000SHLD6" | |
| "4mrCL\000SHLD64mri8\000SHLD64rrCL\000SHLD64rri8\000SHR16m1\000SHR16mCL\000" | |
| "SHR16mi\000SHR16r1\000SHR16rCL\000SHR16ri\000SHR32m1\000SHR32mCL\000SHR" | |
| "32mi\000SHR32r1\000SHR32rCL\000SHR32ri\000SHR64m1\000SHR64mCL\000SHR64m" | |
| "i\000SHR64r1\000SHR64rCL\000SHR64ri\000SHR8m1\000SHR8mCL\000SHR8mi\000S" | |
| "HR8r1\000SHR8rCL\000SHR8ri\000SHRD16mrCL\000SHRD16mri8\000SHRD16rrCL\000" | |
| "SHRD16rri8\000SHRD32mrCL\000SHRD32mri8\000SHRD32rrCL\000SHRD32rri8\000S" | |
| "HRD64mrCL\000SHRD64mri8\000SHRD64rrCL\000SHRD64rri8\000SHUFPDrmi\000SHU" | |
| "FPDrri\000SHUFPSrmi\000SHUFPSrri\000SIDTm\000SIN_F\000SIN_Fp32\000SIN_F" | |
| "p64\000SIN_Fp80\000SLDT16m\000SLDT16r\000SLDT64m\000SLDT64r\000SMSW16m\000" | |
| "SMSW16r\000SMSW32r\000SMSW64r\000SQRTPDm\000SQRTPDm_Int\000SQRTPDr\000S" | |
| "QRTPDr_Int\000SQRTPSm\000SQRTPSm_Int\000SQRTPSr\000SQRTPSr_Int\000SQRTS" | |
| "Dm\000SQRTSDm_Int\000SQRTSDr\000SQRTSDr_Int\000SQRTSSm\000SQRTSSm_Int\000" | |
| "SQRTSSr\000SQRTSSr_Int\000SQRT_F\000SQRT_Fp32\000SQRT_Fp64\000SQRT_Fp80" | |
| "\000SS_PREFIX\000STC\000STD\000STI\000STMXCSR\000STOSB\000STOSD\000STOS" | |
| "Q\000STOSW\000STRm\000STRr\000ST_F32m\000ST_F64m\000ST_FP32m\000ST_FP64" | |
| "m\000ST_FP80m\000ST_FPrr\000ST_Fp32m\000ST_Fp64m\000ST_Fp64m32\000ST_Fp" | |
| "80m32\000ST_Fp80m64\000ST_FpP32m\000ST_FpP64m\000ST_FpP64m32\000ST_FpP8" | |
| "0m\000ST_FpP80m32\000ST_FpP80m64\000ST_Frr\000SUB16i16\000SUB16mi\000SU" | |
| "B16mi8\000SUB16mr\000SUB16ri\000SUB16ri8\000SUB16rm\000SUB16rr\000SUB16" | |
| "rr_REV\000SUB32i32\000SUB32mi\000SUB32mi8\000SUB32mr\000SUB32ri\000SUB3" | |
| "2ri8\000SUB32rm\000SUB32rr\000SUB32rr_REV\000SUB64i32\000SUB64mi32\000S" | |
| "UB64mi8\000SUB64mr\000SUB64ri32\000SUB64ri8\000SUB64rm\000SUB64rr\000SU" | |
| "B64rr_REV\000SUB8i8\000SUB8mi\000SUB8mr\000SUB8ri\000SUB8rm\000SUB8rr\000" | |
| "SUB8rr_REV\000SUBPDrm\000SUBPDrr\000SUBPSrm\000SUBPSrr\000SUBR_F32m\000" | |
| "SUBR_F64m\000SUBR_FI16m\000SUBR_FI32m\000SUBR_FPrST0\000SUBR_FST0r\000S" | |
| "UBR_Fp32m\000SUBR_Fp64m\000SUBR_Fp64m32\000SUBR_Fp80m32\000SUBR_Fp80m64" | |
| "\000SUBR_FpI16m32\000SUBR_FpI16m64\000SUBR_FpI16m80\000SUBR_FpI32m32\000" | |
| "SUBR_FpI32m64\000SUBR_FpI32m80\000SUBR_FrST0\000SUBSDrm\000SUBSDrm_Int\000" | |
| "SUBSDrr\000SUBSDrr_Int\000SUBSSrm\000SUBSSrm_Int\000SUBSSrr\000SUBSSrr_" | |
| "Int\000SUB_F32m\000SUB_F64m\000SUB_FI16m\000SUB_FI32m\000SUB_FPrST0\000" | |
| "SUB_FST0r\000SUB_Fp32\000SUB_Fp32m\000SUB_Fp64\000SUB_Fp64m\000SUB_Fp64" | |
| "m32\000SUB_Fp80\000SUB_Fp80m32\000SUB_Fp80m64\000SUB_FpI16m32\000SUB_Fp" | |
| "I16m64\000SUB_FpI16m80\000SUB_FpI32m32\000SUB_FpI32m64\000SUB_FpI32m80\000" | |
| "SUB_FrST0\000SWAPGS\000SYSCALL\000SYSENTER\000SYSEXIT\000SYSEXIT64\000S" | |
| "YSRET\000TAILJMPd\000TAILJMPd64\000TAILJMPm\000TAILJMPm64\000TAILJMPr\000" | |
| "TAILJMPr64\000TCRETURNdi\000TCRETURNdi64\000TCRETURNmi\000TCRETURNmi64\000" | |
| "TCRETURNri\000TCRETURNri64\000TEST16i16\000TEST16mi\000TEST16ri\000TEST" | |
| "16rm\000TEST16rr\000TEST32i32\000TEST32mi\000TEST32ri\000TEST32rm\000TE" | |
| "ST32rr\000TEST64i32\000TEST64mi32\000TEST64ri32\000TEST64rm\000TEST64rr" | |
| "\000TEST8i8\000TEST8mi\000TEST8ri\000TEST8rm\000TEST8rr\000TLSCall_32\000" | |
| "TLSCall_64\000TLS_addr32\000TLS_addr64\000TRAP\000TST_F\000TST_Fp32\000" | |
| "TST_Fp64\000TST_Fp80\000UCOMISDrm\000UCOMISDrr\000UCOMISSrm\000UCOMISSr" | |
| "r\000UCOM_FIPr\000UCOM_FIr\000UCOM_FPPr\000UCOM_FPr\000UCOM_FpIr32\000U" | |
| "COM_FpIr64\000UCOM_FpIr80\000UCOM_Fpr32\000UCOM_Fpr64\000UCOM_Fpr80\000" | |
| "UCOM_Fr\000UNPCKHPDrm\000UNPCKHPDrr\000UNPCKHPSrm\000UNPCKHPSrr\000UNPC" | |
| "KLPDrm\000UNPCKLPDrr\000UNPCKLPSrm\000UNPCKLPSrr\000VADDPDYrm\000VADDPD" | |
| "Yrr\000VADDPDrm\000VADDPDrr\000VADDPSYrm\000VADDPSYrr\000VADDPSrm\000VA" | |
| "DDPSrr\000VADDSDrm\000VADDSDrm_Int\000VADDSDrr\000VADDSDrr_Int\000VADDS" | |
| "Srm\000VADDSSrm_Int\000VADDSSrr\000VADDSSrr_Int\000VADDSUBPDYrm\000VADD" | |
| "SUBPDYrr\000VADDSUBPDrm\000VADDSUBPDrr\000VADDSUBPSYrm\000VADDSUBPSYrr\000" | |
| "VADDSUBPSrm\000VADDSUBPSrr\000VAESDECLASTrm\000VAESDECLASTrr\000VAESDEC" | |
| "rm\000VAESDECrr\000VAESENCLASTrm\000VAESENCLASTrr\000VAESENCrm\000VAESE" | |
| "NCrr\000VAESIMCrm\000VAESIMCrr\000VAESKEYGENASSIST128rm\000VAESKEYGENAS" | |
| "SIST128rr\000VANDNPDYrm\000VANDNPDYrr\000VANDNPDrm\000VANDNPDrr\000VAND" | |
| "NPSYrm\000VANDNPSYrr\000VANDNPSrm\000VANDNPSrr\000VANDPDYrm\000VANDPDYr" | |
| "r\000VANDPDrm\000VANDPDrr\000VANDPSYrm\000VANDPSYrr\000VANDPSrm\000VAND" | |
| "PSrr\000VASTART_SAVE_XMM_REGS\000VBLENDPDYrmi\000VBLENDPDYrri\000VBLEND" | |
| "PDrmi\000VBLENDPDrri\000VBLENDPSYrmi\000VBLENDPSYrri\000VBLENDPSrmi\000" | |
| "VBLENDPSrri\000VBLENDVPDYrm\000VBLENDVPDYrr\000VBLENDVPDrm\000VBLENDVPD" | |
| "rr\000VBLENDVPSYrm\000VBLENDVPSYrr\000VBLENDVPSrm\000VBLENDVPSrr\000VBR" | |
| "OADCASTF128\000VBROADCASTSD\000VBROADCASTSS\000VBROADCASTSSY\000VCMPPDY" | |
| "rmi\000VCMPPDYrmi_alt\000VCMPPDYrri\000VCMPPDYrri_alt\000VCMPPDrmi\000V" | |
| "CMPPDrmi_alt\000VCMPPDrri\000VCMPPDrri_alt\000VCMPPSYrmi\000VCMPPSYrmi_" | |
| "alt\000VCMPPSYrri\000VCMPPSYrri_alt\000VCMPPSrmi\000VCMPPSrmi_alt\000VC" | |
| "MPPSrri\000VCMPPSrri_alt\000VCMPSDrm\000VCMPSDrm_alt\000VCMPSDrr\000VCM" | |
| "PSDrr_alt\000VCMPSSrm\000VCMPSSrm_alt\000VCMPSSrr\000VCMPSSrr_alt\000VC" | |
| "OMISDrm\000VCOMISDrr\000VCOMISSrm\000VCOMISSrr\000VCVTDQ2PDYrm\000VCVTD" | |
| "Q2PDYrr\000VCVTDQ2PDrm\000VCVTDQ2PDrr\000VCVTDQ2PSYrm\000VCVTDQ2PSYrr\000" | |
| "VCVTDQ2PSrm\000VCVTDQ2PSrr\000VCVTPD2DQXrYr\000VCVTPD2DQXrm\000VCVTPD2D" | |
| "QXrr\000VCVTPD2DQYrm\000VCVTPD2DQYrr\000VCVTPD2DQrr\000VCVTPD2PSXrYr\000" | |
| "VCVTPD2PSXrm\000VCVTPD2PSXrr\000VCVTPD2PSYrm\000VCVTPD2PSYrr\000VCVTPD2" | |
| "PSrr\000VCVTPS2DQYrm\000VCVTPS2DQYrr\000VCVTPS2DQrm\000VCVTPS2DQrr\000V" | |
| "CVTPS2PDYrm\000VCVTPS2PDYrr\000VCVTPS2PDrm\000VCVTPS2PDrr\000VCVTSD2SI6" | |
| "4rm\000VCVTSD2SI64rr\000VCVTSD2SI_altrm\000VCVTSD2SI_altrr\000VCVTSD2SS" | |
| "rm\000VCVTSD2SSrr\000VCVTSI2SD64rm\000VCVTSI2SD64rr\000VCVTSI2SDLrm\000" | |
| "VCVTSI2SDLrr\000VCVTSI2SDrm\000VCVTSI2SDrr\000VCVTSI2SS64rm\000VCVTSI2S" | |
| "S64rr\000VCVTSI2SSrm\000VCVTSI2SSrr\000VCVTSS2SDrm\000VCVTSS2SDrr\000VC" | |
| "VTSS2SI64rm\000VCVTSS2SI64rr\000VCVTSS2SIrm\000VCVTSS2SIrr\000VCVTTPD2D" | |
| "QXrYr\000VCVTTPD2DQXrm\000VCVTTPD2DQXrr\000VCVTTPD2DQYrm\000VCVTTPD2DQY" | |
| "rr\000VCVTTPD2DQrr\000VCVTTPS2DQYrm\000VCVTTPS2DQYrr\000VCVTTPS2DQrm\000" | |
| "VCVTTPS2DQrr\000VCVTTSD2SI64rm\000VCVTTSD2SI64rr\000VCVTTSD2SIrm\000VCV" | |
| "TTSD2SIrr\000VCVTTSS2SI64rm\000VCVTTSS2SI64rr\000VCVTTSS2SIrm\000VCVTTS" | |
| "S2SIrr\000VDIVPDYrm\000VDIVPDYrr\000VDIVPDrm\000VDIVPDrr\000VDIVPSYrm\000" | |
| "VDIVPSYrr\000VDIVPSrm\000VDIVPSrr\000VDIVSDrm\000VDIVSDrm_Int\000VDIVSD" | |
| "rr\000VDIVSDrr_Int\000VDIVSSrm\000VDIVSSrm_Int\000VDIVSSrr\000VDIVSSrr_" | |
| "Int\000VDPPDrmi\000VDPPDrri\000VDPPSYrmi\000VDPPSYrri\000VDPPSrmi\000VD" | |
| "PPSrri\000VERRm\000VERRr\000VERWm\000VERWr\000VEXTRACTF128mr\000VEXTRAC" | |
| "TF128rr\000VEXTRACTPSmr\000VEXTRACTPSrr\000VEXTRACTPSrr64\000VFMADDPDr1" | |
| "32m\000VFMADDPDr132mY\000VFMADDPDr132r\000VFMADDPDr132rY\000VFMADDPDr21" | |
| "3m\000VFMADDPDr213mY\000VFMADDPDr213r\000VFMADDPDr213rY\000VFMADDPDr231" | |
| "m\000VFMADDPDr231mY\000VFMADDPDr231r\000VFMADDPDr231rY\000VFMADDPSr132m" | |
| "\000VFMADDPSr132mY\000VFMADDPSr132r\000VFMADDPSr132rY\000VFMADDPSr213m\000" | |
| "VFMADDPSr213mY\000VFMADDPSr213r\000VFMADDPSr213rY\000VFMADDPSr231m\000V" | |
| "FMADDPSr231mY\000VFMADDPSr231r\000VFMADDPSr231rY\000VFMADDSUBPDr132m\000" | |
| "VFMADDSUBPDr132mY\000VFMADDSUBPDr132r\000VFMADDSUBPDr132rY\000VFMADDSUB" | |
| "PDr213m\000VFMADDSUBPDr213mY\000VFMADDSUBPDr213r\000VFMADDSUBPDr213rY\000" | |
| "VFMADDSUBPDr231m\000VFMADDSUBPDr231mY\000VFMADDSUBPDr231r\000VFMADDSUBP" | |
| "Dr231rY\000VFMADDSUBPSr132m\000VFMADDSUBPSr132mY\000VFMADDSUBPSr132r\000" | |
| "VFMADDSUBPSr132rY\000VFMADDSUBPSr213m\000VFMADDSUBPSr213mY\000VFMADDSUB" | |
| "PSr213r\000VFMADDSUBPSr213rY\000VFMADDSUBPSr231m\000VFMADDSUBPSr231mY\000" | |
| "VFMADDSUBPSr231r\000VFMADDSUBPSr231rY\000VFMSUBADDPDr132m\000VFMSUBADDP" | |
| "Dr132mY\000VFMSUBADDPDr132r\000VFMSUBADDPDr132rY\000VFMSUBADDPDr213m\000" | |
| "VFMSUBADDPDr213mY\000VFMSUBADDPDr213r\000VFMSUBADDPDr213rY\000VFMSUBADD" | |
| "PDr231m\000VFMSUBADDPDr231mY\000VFMSUBADDPDr231r\000VFMSUBADDPDr231rY\000" | |
| "VFMSUBADDPSr132m\000VFMSUBADDPSr132mY\000VFMSUBADDPSr132r\000VFMSUBADDP" | |
| "Sr132rY\000VFMSUBADDPSr213m\000VFMSUBADDPSr213mY\000VFMSUBADDPSr213r\000" | |
| "VFMSUBADDPSr213rY\000VFMSUBADDPSr231m\000VFMSUBADDPSr231mY\000VFMSUBADD" | |
| "PSr231r\000VFMSUBADDPSr231rY\000VFMSUBPDr132m\000VFMSUBPDr132mY\000VFMS" | |
| "UBPDr132r\000VFMSUBPDr132rY\000VFMSUBPDr213m\000VFMSUBPDr213mY\000VFMSU" | |
| "BPDr213r\000VFMSUBPDr213rY\000VFMSUBPDr231m\000VFMSUBPDr231mY\000VFMSUB" | |
| "PDr231r\000VFMSUBPDr231rY\000VFMSUBPSr132m\000VFMSUBPSr132mY\000VFMSUBP" | |
| "Sr132r\000VFMSUBPSr132rY\000VFMSUBPSr213m\000VFMSUBPSr213mY\000VFMSUBPS" | |
| "r213r\000VFMSUBPSr213rY\000VFMSUBPSr231m\000VFMSUBPSr231mY\000VFMSUBPSr" | |
| "231r\000VFMSUBPSr231rY\000VFNMADDPDr132m\000VFNMADDPDr132mY\000VFNMADDP" | |
| "Dr132r\000VFNMADDPDr132rY\000VFNMADDPDr213m\000VFNMADDPDr213mY\000VFNMA" | |
| "DDPDr213r\000VFNMADDPDr213rY\000VFNMADDPDr231m\000VFNMADDPDr231mY\000VF" | |
| "NMADDPDr231r\000VFNMADDPDr231rY\000VFNMADDPSr132m\000VFNMADDPSr132mY\000" | |
| "VFNMADDPSr132r\000VFNMADDPSr132rY\000VFNMADDPSr213m\000VFNMADDPSr213mY\000" | |
| "VFNMADDPSr213r\000VFNMADDPSr213rY\000VFNMADDPSr231m\000VFNMADDPSr231mY\000" | |
| "VFNMADDPSr231r\000VFNMADDPSr231rY\000VFNMSUBPDr132m\000VFNMSUBPDr132mY\000" | |
| "VFNMSUBPDr132r\000VFNMSUBPDr132rY\000VFNMSUBPDr213m\000VFNMSUBPDr213mY\000" | |
| "VFNMSUBPDr213r\000VFNMSUBPDr213rY\000VFNMSUBPDr231m\000VFNMSUBPDr231mY\000" | |
| "VFNMSUBPDr231r\000VFNMSUBPDr231rY\000VFNMSUBPSr132m\000VFNMSUBPSr132mY\000" | |
| "VFNMSUBPSr132r\000VFNMSUBPSr132rY\000VFNMSUBPSr213m\000VFNMSUBPSr213mY\000" | |
| "VFNMSUBPSr213r\000VFNMSUBPSr213rY\000VFNMSUBPSr231m\000VFNMSUBPSr231mY\000" | |
| "VFNMSUBPSr231r\000VFNMSUBPSr231rY\000VFsANDNPDrm\000VFsANDNPDrr\000VFsA" | |
| "NDNPSrm\000VFsANDNPSrr\000VFsANDPDrm\000VFsANDPDrr\000VFsANDPSrm\000VFs" | |
| "ANDPSrr\000VFsORPDrm\000VFsORPDrr\000VFsORPSrm\000VFsORPSrr\000VFsXORPD" | |
| "rm\000VFsXORPDrr\000VFsXORPSrm\000VFsXORPSrr\000VHADDPDYrm\000VHADDPDYr" | |
| "r\000VHADDPDrm\000VHADDPDrr\000VHADDPSYrm\000VHADDPSYrr\000VHADDPSrm\000" | |
| "VHADDPSrr\000VHSUBPDYrm\000VHSUBPDYrr\000VHSUBPDrm\000VHSUBPDrr\000VHSU" | |
| "BPSYrm\000VHSUBPSYrr\000VHSUBPSrm\000VHSUBPSrr\000VINSERTF128rm\000VINS" | |
| "ERTF128rr\000VINSERTPSrm\000VINSERTPSrr\000VLDDQUYrm\000VLDDQUrm\000VLD" | |
| "MXCSR\000VMASKMOVDQU\000VMASKMOVDQU64\000VMASKMOVPDYmr\000VMASKMOVPDYrm" | |
| "\000VMASKMOVPDmr\000VMASKMOVPDrm\000VMASKMOVPSYmr\000VMASKMOVPSYrm\000V" | |
| "MASKMOVPSmr\000VMASKMOVPSrm\000VMAXPDYrm\000VMAXPDYrm_Int\000VMAXPDYrr\000" | |
| "VMAXPDYrr_Int\000VMAXPDrm\000VMAXPDrm_Int\000VMAXPDrr\000VMAXPDrr_Int\000" | |
| "VMAXPSYrm\000VMAXPSYrm_Int\000VMAXPSYrr\000VMAXPSYrr_Int\000VMAXPSrm\000" | |
| "VMAXPSrm_Int\000VMAXPSrr\000VMAXPSrr_Int\000VMAXSDrm\000VMAXSDrm_Int\000" | |
| "VMAXSDrr\000VMAXSDrr_Int\000VMAXSSrm\000VMAXSSrm_Int\000VMAXSSrr\000VMA" | |
| "XSSrr_Int\000VMCALL\000VMCLEARm\000VMINPDYrm\000VMINPDYrm_Int\000VMINPD" | |
| "Yrr\000VMINPDYrr_Int\000VMINPDrm\000VMINPDrm_Int\000VMINPDrr\000VMINPDr" | |
| "r_Int\000VMINPSYrm\000VMINPSYrm_Int\000VMINPSYrr\000VMINPSYrr_Int\000VM" | |
| "INPSrm\000VMINPSrm_Int\000VMINPSrr\000VMINPSrr_Int\000VMINSDrm\000VMINS" | |
| "Drm_Int\000VMINSDrr\000VMINSDrr_Int\000VMINSSrm\000VMINSSrm_Int\000VMIN" | |
| "SSrr\000VMINSSrr_Int\000VMLAUNCH\000VMOVAPDYmr\000VMOVAPDYrm\000VMOVAPD" | |
| "Yrr\000VMOVAPDmr\000VMOVAPDrm\000VMOVAPDrr\000VMOVAPSYmr\000VMOVAPSYrm\000" | |
| "VMOVAPSYrr\000VMOVAPSmr\000VMOVAPSrm\000VMOVAPSrr\000VMOVDDUPYrm\000VMO" | |
| "VDDUPYrr\000VMOVDDUPrm\000VMOVDDUPrr\000VMOVDI2PDIrm\000VMOVDI2PDIrr\000" | |
| "VMOVDI2SSrm\000VMOVDI2SSrr\000VMOVDQAYmr\000VMOVDQAYrm\000VMOVDQAYrr\000" | |
| "VMOVDQAmr\000VMOVDQArm\000VMOVDQArr\000VMOVDQUYmr\000VMOVDQUYrm\000VMOV" | |
| "DQUYrr\000VMOVDQUmr\000VMOVDQUmr_Int\000VMOVDQUrm\000VMOVDQUrm_Int\000V" | |
| "MOVDQUrr\000VMOVHLPSrr\000VMOVHPDmr\000VMOVHPDrm\000VMOVHPSmr\000VMOVHP" | |
| "Srm\000VMOVLHPSrr\000VMOVLPDmr\000VMOVLPDrm\000VMOVLPSmr\000VMOVLPSrm\000" | |
| "VMOVLQ128mr\000VMOVMSKPDYr64r\000VMOVMSKPDYrr\000VMOVMSKPDr64r\000VMOVM" | |
| "SKPDrr\000VMOVMSKPSYr64r\000VMOVMSKPSYrr\000VMOVMSKPSr64r\000VMOVMSKPSr" | |
| "r\000VMOVNTDQArm\000VMOVNTDQY_64mr\000VMOVNTDQYmr\000VMOVNTDQ_64mr\000V" | |
| "MOVNTDQmr\000VMOVNTDQmr_Int\000VMOVNTPDYmr\000VMOVNTPDmr\000VMOVNTPDmr_" | |
| "Int\000VMOVNTPSYmr\000VMOVNTPSmr\000VMOVNTPSmr_Int\000VMOVPDI2DImr\000V" | |
| "MOVPDI2DIrr\000VMOVPQI2QImr\000VMOVQI2PQIrm\000VMOVQd64rr\000VMOVQd64rr" | |
| "_alt\000VMOVQs64rr\000VMOVQxrxr\000VMOVSDmr\000VMOVSDrm\000VMOVSDrr\000" | |
| "VMOVSHDUPYrm\000VMOVSHDUPYrr\000VMOVSHDUPrm\000VMOVSHDUPrr\000VMOVSLDUP" | |
| "Yrm\000VMOVSLDUPYrr\000VMOVSLDUPrm\000VMOVSLDUPrr\000VMOVSS2DImr\000VMO" | |
| "VSS2DIrr\000VMOVSSmr\000VMOVSSrm\000VMOVSSrr\000VMOVUPDYmr\000VMOVUPDYr" | |
| "m\000VMOVUPDYrr\000VMOVUPDmr\000VMOVUPDmr_Int\000VMOVUPDrm\000VMOVUPDrm" | |
| "_Int\000VMOVUPDrr\000VMOVUPSYmr\000VMOVUPSYrm\000VMOVUPSYrr\000VMOVUPSm" | |
| "r\000VMOVUPSmr_Int\000VMOVUPSrm\000VMOVUPSrm_Int\000VMOVUPSrr\000VMOVZD" | |
| "I2PDIrm\000VMOVZDI2PDIrr\000VMOVZPQILo2PQIrm\000VMOVZPQILo2PQIrr\000VMO" | |
| "VZQI2PQIrm\000VMOVZQI2PQIrr\000VMPSADBWrmi\000VMPSADBWrri\000VMPTRLDm\000" | |
| "VMPTRSTm\000VMREAD32rm\000VMREAD32rr\000VMREAD64rm\000VMREAD64rr\000VMR" | |
| "ESUME\000VMULPDYrm\000VMULPDYrr\000VMULPDrm\000VMULPDrr\000VMULPSYrm\000" | |
| "VMULPSYrr\000VMULPSrm\000VMULPSrr\000VMULSDrm\000VMULSDrm_Int\000VMULSD" | |
| "rr\000VMULSDrr_Int\000VMULSSrm\000VMULSSrm_Int\000VMULSSrr\000VMULSSrr_" | |
| "Int\000VMWRITE32rm\000VMWRITE32rr\000VMWRITE64rm\000VMWRITE64rr\000VMXO" | |
| "FF\000VMXON\000VORPDYrm\000VORPDYrr\000VORPDrm\000VORPDrr\000VORPSYrm\000" | |
| "VORPSYrr\000VORPSrm\000VORPSrr\000VPABSBrm128\000VPABSBrm64\000VPABSBrr" | |
| "128\000VPABSBrr64\000VPABSDrm128\000VPABSDrm64\000VPABSDrr128\000VPABSD" | |
| "rr64\000VPABSWrm128\000VPABSWrm64\000VPABSWrr128\000VPABSWrr64\000VPACK" | |
| "SSDWrm\000VPACKSSDWrr\000VPACKSSWBrm\000VPACKSSWBrr\000VPACKUSDWrm\000V" | |
| "PACKUSDWrr\000VPACKUSWBrm\000VPACKUSWBrr\000VPADDBrm\000VPADDBrr\000VPA" | |
| "DDDrm\000VPADDDrr\000VPADDQrm\000VPADDQrr\000VPADDSBrm\000VPADDSBrr\000" | |
| "VPADDSWrm\000VPADDSWrr\000VPADDUSBrm\000VPADDUSBrr\000VPADDUSWrm\000VPA" | |
| "DDUSWrr\000VPADDWrm\000VPADDWrr\000VPALIGNR128rm\000VPALIGNR128rr\000VP" | |
| "ALIGNR64rm\000VPALIGNR64rr\000VPANDNrm\000VPANDNrr\000VPANDrm\000VPANDr" | |
| "r\000VPAVGBrm\000VPAVGBrr\000VPAVGWrm\000VPAVGWrr\000VPBLENDVBrm\000VPB" | |
| "LENDVBrr\000VPBLENDWrmi\000VPBLENDWrri\000VPCLMULHQHQDQrm\000VPCLMULHQH" | |
| "QDQrr\000VPCLMULHQLQDQrm\000VPCLMULHQLQDQrr\000VPCLMULLQHQDQrm\000VPCLM" | |
| "ULLQHQDQrr\000VPCLMULLQLQDQrm\000VPCLMULLQLQDQrr\000VPCLMULQDQrm\000VPC" | |
| "LMULQDQrr\000VPCMPEQBrm\000VPCMPEQBrr\000VPCMPEQDrm\000VPCMPEQDrr\000VP" | |
| "CMPEQQrm\000VPCMPEQQrr\000VPCMPEQWrm\000VPCMPEQWrr\000VPCMPESTRIArm\000" | |
| "VPCMPESTRIArr\000VPCMPESTRICrm\000VPCMPESTRICrr\000VPCMPESTRIOrm\000VPC" | |
| "MPESTRIOrr\000VPCMPESTRISrm\000VPCMPESTRISrr\000VPCMPESTRIZrm\000VPCMPE" | |
| "STRIZrr\000VPCMPESTRIrm\000VPCMPESTRIrr\000VPCMPESTRM128MEM\000VPCMPEST" | |
| "RM128REG\000VPCMPESTRM128rm\000VPCMPESTRM128rr\000VPCMPGTBrm\000VPCMPGT" | |
| "Brr\000VPCMPGTDrm\000VPCMPGTDrr\000VPCMPGTQrm\000VPCMPGTQrr\000VPCMPGTW" | |
| "rm\000VPCMPGTWrr\000VPCMPISTRIArm\000VPCMPISTRIArr\000VPCMPISTRICrm\000" | |
| "VPCMPISTRICrr\000VPCMPISTRIOrm\000VPCMPISTRIOrr\000VPCMPISTRISrm\000VPC" | |
| "MPISTRISrr\000VPCMPISTRIZrm\000VPCMPISTRIZrr\000VPCMPISTRIrm\000VPCMPIS" | |
| "TRIrr\000VPCMPISTRM128MEM\000VPCMPISTRM128REG\000VPCMPISTRM128rm\000VPC" | |
| "MPISTRM128rr\000VPERM2F128rm\000VPERM2F128rr\000VPERMILPDYmi\000VPERMIL" | |
| "PDYri\000VPERMILPDYrm\000VPERMILPDYrr\000VPERMILPDmi\000VPERMILPDri\000" | |
| "VPERMILPDrm\000VPERMILPDrr\000VPERMILPSYmi\000VPERMILPSYri\000VPERMILPS" | |
| "Yrm\000VPERMILPSYrr\000VPERMILPSmi\000VPERMILPSri\000VPERMILPSrm\000VPE" | |
| "RMILPSrr\000VPEXTRBmr\000VPEXTRBrr\000VPEXTRBrr64\000VPEXTRDmr\000VPEXT" | |
| "RDrr\000VPEXTRQmr\000VPEXTRQrr\000VPEXTRWmr\000VPEXTRWri\000VPHADDDrm12" | |
| "8\000VPHADDDrm64\000VPHADDDrr128\000VPHADDDrr64\000VPHADDSWrm128\000VPH" | |
| "ADDSWrm64\000VPHADDSWrr128\000VPHADDSWrr64\000VPHADDWrm128\000VPHADDWrm" | |
| "64\000VPHADDWrr128\000VPHADDWrr64\000VPHMINPOSUWrm128\000VPHMINPOSUWrr1" | |
| "28\000VPHSUBDrm128\000VPHSUBDrm64\000VPHSUBDrr128\000VPHSUBDrr64\000VPH" | |
| "SUBSWrm128\000VPHSUBSWrm64\000VPHSUBSWrr128\000VPHSUBSWrr64\000VPHSUBWr" | |
| "m128\000VPHSUBWrm64\000VPHSUBWrr128\000VPHSUBWrr64\000VPINSRBrm\000VPIN" | |
| "SRBrr\000VPINSRDrm\000VPINSRDrr\000VPINSRQrm\000VPINSRQrr\000VPINSRWrmi" | |
| "\000VPINSRWrr64i\000VPINSRWrri\000VPMADDUBSWrm128\000VPMADDUBSWrm64\000" | |
| "VPMADDUBSWrr128\000VPMADDUBSWrr64\000VPMADDWDrm\000VPMADDWDrr\000VPMAXS" | |
| "Brm\000VPMAXSBrr\000VPMAXSDrm\000VPMAXSDrr\000VPMAXSWrm\000VPMAXSWrr\000" | |
| "VPMAXUBrm\000VPMAXUBrr\000VPMAXUDrm\000VPMAXUDrr\000VPMAXUWrm\000VPMAXU" | |
| "Wrr\000VPMINSBrm\000VPMINSBrr\000VPMINSDrm\000VPMINSDrr\000VPMINSWrm\000" | |
| "VPMINSWrr\000VPMINUBrm\000VPMINUBrr\000VPMINUDrm\000VPMINUDrr\000VPMINU" | |
| "Wrm\000VPMINUWrr\000VPMOVMSKBr64r\000VPMOVMSKBrr\000VPMOVSXBDrm\000VPMO" | |
| "VSXBDrr\000VPMOVSXBQrm\000VPMOVSXBQrr\000VPMOVSXBWrm\000VPMOVSXBWrr\000" | |
| "VPMOVSXDQrm\000VPMOVSXDQrr\000VPMOVSXWDrm\000VPMOVSXWDrr\000VPMOVSXWQrm" | |
| "\000VPMOVSXWQrr\000VPMOVZXBDrm\000VPMOVZXBDrr\000VPMOVZXBQrm\000VPMOVZX" | |
| "BQrr\000VPMOVZXBWrm\000VPMOVZXBWrr\000VPMOVZXDQrm\000VPMOVZXDQrr\000VPM" | |
| "OVZXWDrm\000VPMOVZXWDrr\000VPMOVZXWQrm\000VPMOVZXWQrr\000VPMULDQrm\000V" | |
| "PMULDQrr\000VPMULHRSWrm128\000VPMULHRSWrm64\000VPMULHRSWrr128\000VPMULH" | |
| "RSWrr64\000VPMULHUWrm\000VPMULHUWrr\000VPMULHWrm\000VPMULHWrr\000VPMULL" | |
| "Drm\000VPMULLDrr\000VPMULLWrm\000VPMULLWrr\000VPMULUDQrm\000VPMULUDQrr\000" | |
| "VPORrm\000VPORrr\000VPSADBWrm\000VPSADBWrr\000VPSHUFBrm128\000VPSHUFBrm" | |
| "64\000VPSHUFBrr128\000VPSHUFBrr64\000VPSHUFDmi\000VPSHUFDri\000VPSHUFHW" | |
| "mi\000VPSHUFHWri\000VPSHUFLWmi\000VPSHUFLWri\000VPSIGNBrm128\000VPSIGNB" | |
| "rm64\000VPSIGNBrr128\000VPSIGNBrr64\000VPSIGNDrm128\000VPSIGNDrm64\000V" | |
| "PSIGNDrr128\000VPSIGNDrr64\000VPSIGNWrm128\000VPSIGNWrm64\000VPSIGNWrr1" | |
| "28\000VPSIGNWrr64\000VPSLLDQri\000VPSLLDri\000VPSLLDrm\000VPSLLDrr\000V" | |
| "PSLLQri\000VPSLLQrm\000VPSLLQrr\000VPSLLWri\000VPSLLWrm\000VPSLLWrr\000" | |
| "VPSRADri\000VPSRADrm\000VPSRADrr\000VPSRAWri\000VPSRAWrm\000VPSRAWrr\000" | |
| "VPSRLDQri\000VPSRLDri\000VPSRLDrm\000VPSRLDrr\000VPSRLQri\000VPSRLQrm\000" | |
| "VPSRLQrr\000VPSRLWri\000VPSRLWrm\000VPSRLWrr\000VPSUBBrm\000VPSUBBrr\000" | |
| "VPSUBDrm\000VPSUBDrr\000VPSUBQrm\000VPSUBQrr\000VPSUBSBrm\000VPSUBSBrr\000" | |
| "VPSUBSWrm\000VPSUBSWrr\000VPSUBUSBrm\000VPSUBUSBrr\000VPSUBUSWrm\000VPS" | |
| "UBUSWrr\000VPSUBWrm\000VPSUBWrr\000VPTESTYrm\000VPTESTYrr\000VPTESTrm\000" | |
| "VPTESTrr\000VPUNPCKHBWrm\000VPUNPCKHBWrr\000VPUNPCKHDQrm\000VPUNPCKHDQr" | |
| "r\000VPUNPCKHQDQrm\000VPUNPCKHQDQrr\000VPUNPCKHWDrm\000VPUNPCKHWDrr\000" | |
| "VPUNPCKLBWrm\000VPUNPCKLBWrr\000VPUNPCKLDQrm\000VPUNPCKLDQrr\000VPUNPCK" | |
| "LQDQrm\000VPUNPCKLQDQrr\000VPUNPCKLWDrm\000VPUNPCKLWDrr\000VPXORrm\000V" | |
| "PXORrr\000VRCPPSYm\000VRCPPSYm_Int\000VRCPPSYr\000VRCPPSYr_Int\000VRCPP" | |
| "Sm\000VRCPPSm_Int\000VRCPPSr\000VRCPPSr_Int\000VRCPSSm\000VRCPSSm_Int\000" | |
| "VRCPSSr\000VRCPSSr_Int\000VROUNDPDm\000VROUNDPDm_Int\000VROUNDPDr\000VR" | |
| "OUNDPDr_Int\000VROUNDPSm\000VROUNDPSm_Int\000VROUNDPSr\000VROUNDPSr_Int" | |
| "\000VROUNDSDm\000VROUNDSDm_Int\000VROUNDSDr\000VROUNDSDr_Int\000VROUNDS" | |
| "Sm\000VROUNDSSm_Int\000VROUNDSSr\000VROUNDSSr_Int\000VROUNDYPDm\000VROU" | |
| "NDYPDm_Int\000VROUNDYPDr\000VROUNDYPDr_Int\000VROUNDYPSm\000VROUNDYPSm_" | |
| "Int\000VROUNDYPSr\000VROUNDYPSr_Int\000VRSQRTPSYm\000VRSQRTPSYm_Int\000" | |
| "VRSQRTPSYr\000VRSQRTPSYr_Int\000VRSQRTPSm\000VRSQRTPSm_Int\000VRSQRTPSr" | |
| "\000VRSQRTPSr_Int\000VRSQRTSSm\000VRSQRTSSm_Int\000VRSQRTSSr\000VRSQRTS" | |
| "Sr_Int\000VSHUFPDYrmi\000VSHUFPDYrri\000VSHUFPDrmi\000VSHUFPDrri\000VSH" | |
| "UFPSYrmi\000VSHUFPSYrri\000VSHUFPSrmi\000VSHUFPSrri\000VSQRTPDYm\000VSQ" | |
| "RTPDYm_Int\000VSQRTPDYr\000VSQRTPDYr_Int\000VSQRTPDm\000VSQRTPDm_Int\000" | |
| "VSQRTPDr\000VSQRTPDr_Int\000VSQRTPSYm\000VSQRTPSYm_Int\000VSQRTPSYr\000" | |
| "VSQRTPSYr_Int\000VSQRTPSm\000VSQRTPSm_Int\000VSQRTPSr\000VSQRTPSr_Int\000" | |
| "VSQRTSDm\000VSQRTSDm_Int\000VSQRTSDr\000VSQRTSDr_Int\000VSQRTSSm\000VSQ" | |
| "RTSSm_Int\000VSQRTSSr\000VSQRTSSr_Int\000VSTMXCSR\000VSUBPDYrm\000VSUBP" | |
| "DYrr\000VSUBPDrm\000VSUBPDrr\000VSUBPSYrm\000VSUBPSYrr\000VSUBPSrm\000V" | |
| "SUBPSrr\000VSUBSDrm\000VSUBSDrm_Int\000VSUBSDrr\000VSUBSDrr_Int\000VSUB" | |
| "SSrm\000VSUBSSrm_Int\000VSUBSSrr\000VSUBSSrr_Int\000VTESTPDYrm\000VTEST" | |
| "PDYrr\000VTESTPDrm\000VTESTPDrr\000VTESTPSYrm\000VTESTPSYrr\000VTESTPSr" | |
| "m\000VTESTPSrr\000VUCOMISDrm\000VUCOMISDrr\000VUCOMISSrm\000VUCOMISSrr\000" | |
| "VUNPCKHPDYrm\000VUNPCKHPDYrr\000VUNPCKHPDrm\000VUNPCKHPDrr\000VUNPCKHPS" | |
| "Yrm\000VUNPCKHPSYrr\000VUNPCKHPSrm\000VUNPCKHPSrr\000VUNPCKLPDYrm\000VU" | |
| "NPCKLPDYrr\000VUNPCKLPDrm\000VUNPCKLPDrr\000VUNPCKLPSYrm\000VUNPCKLPSYr" | |
| "r\000VUNPCKLPSrm\000VUNPCKLPSrr\000VXORPDYrm\000VXORPDYrr\000VXORPDrm\000" | |
| "VXORPDrr\000VXORPSYrm\000VXORPSYrr\000VXORPSrm\000VXORPSrr\000VZEROALL\000" | |
| "VZEROUPPER\000V_SET0PD\000V_SET0PI\000V_SET0PS\000V_SETALLONES\000WAIT\000" | |
| "WBINVD\000WINCALL64m\000WINCALL64pcrel32\000WINCALL64r\000WRMSR\000XADD" | |
| "16rm\000XADD16rr\000XADD32rm\000XADD32rr\000XADD64rm\000XADD64rr\000XAD" | |
| "D8rm\000XADD8rr\000XCHG16ar\000XCHG16rm\000XCHG16rr\000XCHG32ar\000XCHG" | |
| "32rm\000XCHG32rr\000XCHG64ar\000XCHG64rm\000XCHG64rr\000XCHG8rm\000XCHG" | |
| "8rr\000XCH_F\000XLAT\000XOR16i16\000XOR16mi\000XOR16mi8\000XOR16mr\000X" | |
| "OR16ri\000XOR16ri8\000XOR16rm\000XOR16rr\000XOR16rr_REV\000XOR32i32\000" | |
| "XOR32mi\000XOR32mi8\000XOR32mr\000XOR32ri\000XOR32ri8\000XOR32rm\000XOR" | |
| "32rr\000XOR32rr_REV\000XOR64i32\000XOR64mi32\000XOR64mi8\000XOR64mr\000" | |
| "XOR64ri32\000XOR64ri8\000XOR64rm\000XOR64rr\000XOR64rr_REV\000XOR8i8\000" | |
| "XOR8mi\000XOR8mr\000XOR8ri\000XOR8rm\000XOR8rr\000XOR8rr_REV\000XORPDrm" | |
| "\000XORPDrr\000XORPSrm\000XORPSrr\000"; | |
| return Strs+InstAsmOffset[Opcode]; | |
| } | |
| #endif |