| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+bmi -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| # |
| # Test that rules where multiple operands must be the same operand successfully |
| # match. Also test that the rules do not match when they're not the same |
| # operand. |
| # |
| # This test covers the case when OtherInsnID and OtherOpIdx are different in a |
| # GIM_CheckIsSameOperand. |
| |
| --- |
| name: test_blsi32rr |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| - { id: 2, class: gpr } |
| - { id: 3, class: gpr } |
| # G_SUB and G_AND both use %0 so we should match this. |
| body: | |
| bb.1: |
| liveins: $edi |
| |
| ; CHECK-LABEL: name: test_blsi32rr |
| ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; CHECK: [[BLSI32rr:%[0-9]+]]:gr32 = BLSI32rr [[COPY]], implicit-def $eflags |
| ; CHECK: $edi = COPY [[BLSI32rr]] |
| %0(s32) = COPY $edi |
| %1(s32) = G_CONSTANT i32 0 |
| %2(s32) = G_SUB %1, %0 |
| %3(s32) = G_AND %2, %0 |
| $edi = COPY %3 |
| |
| ... |
| --- |
| name: test_blsi32rr_nomatch |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| registers: |
| - { id: 0, class: gpr } |
| - { id: 1, class: gpr } |
| - { id: 2, class: gpr } |
| - { id: 3, class: gpr } |
| # G_SUB and G_AND use different operands so we shouldn't match this. |
| body: | |
| bb.1: |
| liveins: $edi |
| |
| ; CHECK-LABEL: name: test_blsi32rr_nomatch |
| ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi |
| ; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags |
| ; CHECK: [[SUB32ri:%[0-9]+]]:gr32 = SUB32ri8 [[MOV32r0_]], 0, implicit-def $eflags |
| ; CHECK: [[AND32rr:%[0-9]+]]:gr32 = AND32rr [[SUB32ri]], [[COPY]], implicit-def $eflags |
| ; CHECK: $edi = COPY [[AND32rr]] |
| %0(s32) = COPY $edi |
| %1(s32) = G_CONSTANT i32 0 |
| %2(s32) = G_SUB %1, %1 |
| %3(s32) = G_AND %2, %0 |
| $edi = COPY %3 |
| ... |