Fix unit tests. Change-Id: I70899be0455958aaad6af8d8218f1db50591beae Reviewed-on: https://chromium-review.googlesource.com/401385 Tested-by: Nicolas Capens <nicolascapens@google.com> Reviewed-by: Jim Stichnoth <stichnot@chromium.org>
diff --git a/src/IceAssemblerX86BaseImpl.h b/src/IceAssemblerX86BaseImpl.h index 9c50ea9..77b746d 100644 --- a/src/IceAssemblerX86BaseImpl.h +++ b/src/IceAssemblerX86BaseImpl.h
@@ -1667,15 +1667,15 @@ } template <typename TraitsType> -void AssemblerX86Base<TraitsType>::packss(Type DestTy, XmmRegister Dst, +void AssemblerX86Base<TraitsType>::packss(Type Ty, XmmRegister Dst, XmmRegister Src) { AssemblerBuffer::EnsureCapacity ensured(&Buffer); emitUint8(0x66); emitRexRB(RexTypeIrrelevant, Dst, Src); emitUint8(0x0F); - if (DestTy == IceType_v8i16) { + if (Ty == IceType_v4i32 || Ty == IceType_v4f32) { emitUint8(0x6B); - } else if (DestTy == IceType_v16i8) { + } else if (Ty == IceType_v8i16) { emitUint8(0x63); } else { assert(false && "Unexpected vector pack operand type"); @@ -1684,16 +1684,16 @@ } template <typename TraitsType> -void AssemblerX86Base<TraitsType>::packss(Type DestTy, XmmRegister Dst, +void AssemblerX86Base<TraitsType>::packss(Type Ty, XmmRegister Dst, const Address &Src) { AssemblerBuffer::EnsureCapacity ensured(&Buffer); emitUint8(0x66); emitAddrSizeOverridePrefix(); emitRex(RexTypeIrrelevant, Src, Dst); emitUint8(0x0F); - if (DestTy == IceType_v8i16) { + if (Ty == IceType_v4i32 || Ty == IceType_v4f32) { emitUint8(0x6B); - } else if (DestTy == IceType_v16i8) { + } else if (Ty == IceType_v8i16) { emitUint8(0x63); } else { assert(false && "Unexpected vector pack operand type"); @@ -1702,16 +1702,16 @@ } template <typename TraitsType> -void AssemblerX86Base<TraitsType>::packus(Type DestTy, XmmRegister Dst, +void AssemblerX86Base<TraitsType>::packus(Type Ty, XmmRegister Dst, XmmRegister Src) { AssemblerBuffer::EnsureCapacity ensured(&Buffer); emitUint8(0x66); emitRexRB(RexTypeIrrelevant, Dst, Src); emitUint8(0x0F); - if (DestTy == IceType_v8i16) { + if (Ty == IceType_v4i32 || Ty == IceType_v4f32) { emitUint8(0x38); emitUint8(0x2B); - } else if (DestTy == IceType_v16i8) { + } else if (Ty == IceType_v8i16) { emitUint8(0x67); } else { assert(false && "Unexpected vector pack operand type"); @@ -1720,17 +1720,17 @@ } template <typename TraitsType> -void AssemblerX86Base<TraitsType>::packus(Type DestTy, XmmRegister Dst, +void AssemblerX86Base<TraitsType>::packus(Type Ty, XmmRegister Dst, const Address &Src) { AssemblerBuffer::EnsureCapacity ensured(&Buffer); emitUint8(0x66); emitAddrSizeOverridePrefix(); emitRex(RexTypeIrrelevant, Src, Dst); emitUint8(0x0F); - if (DestTy == IceType_v8i16) { + if (Ty == IceType_v4i32 || Ty == IceType_v4f32) { emitUint8(0x38); emitUint8(0x2B); - } else if (DestTy == IceType_v16i8) { + } else if (Ty == IceType_v8i16) { emitUint8(0x67); } else { assert(false && "Unexpected vector pack operand type");
diff --git a/src/IceInstX86BaseImpl.h b/src/IceInstX86BaseImpl.h index 4075bf3..88c0272 100644 --- a/src/IceInstX86BaseImpl.h +++ b/src/IceInstX86BaseImpl.h
@@ -1059,6 +1059,7 @@ const Variable *Dest = this->getDest(); const Variable *Src = llvm::cast<Variable>(this->getSrc(0)); const Type DestTy = Dest->getType(); + (void)DestTy; const Type SrcTy = Src->getType(); assert(isVectorType(SrcTy)); assert(isScalarIntegerType(DestTy));
diff --git a/src/IceTargetLoweringX86BaseImpl.h b/src/IceTargetLoweringX86BaseImpl.h index 86a4343..a18ff98 100644 --- a/src/IceTargetLoweringX86BaseImpl.h +++ b/src/IceTargetLoweringX86BaseImpl.h
@@ -435,9 +435,8 @@ if (!Traits::Is64Bit || ::Ice::getFlags().getApplicationBinaryInterface() == ::Ice::ABI_PNaCl) { return ::Ice::IceType_i32; - } else { - return ::Ice::IceType_i64; } + return ::Ice::IceType_i64; } template <typename TraitsType> void TargetX86Base<TraitsType>::translateO2() { @@ -4437,7 +4436,7 @@ Operand *Src0 = Instr->getArg(0); Operand *Src1 = Instr->getArg(1); Variable *Dest = Instr->getDest(); - auto *T = makeReg(Dest->getType()); + auto *T = makeReg(Src0->getType()); auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); auto *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem); _movp(T, Src0RM); @@ -4449,7 +4448,7 @@ Operand *Src0 = Instr->getArg(0); Operand *Src1 = Instr->getArg(1); Variable *Dest = Instr->getDest(); - auto *T = makeReg(Dest->getType()); + auto *T = makeReg(Src0->getType()); auto *Src0RM = legalize(Src0, Legal_Reg | Legal_Mem); auto *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem); _movp(T, Src0RM);
diff --git a/unittest/AssemblerX8632/DataMov.cpp b/unittest/AssemblerX8632/DataMov.cpp index d41acd1..22ce0b2 100644 --- a/unittest/AssemblerX8632/DataMov.cpp +++ b/unittest/AssemblerX8632/DataMov.cpp
@@ -973,7 +973,8 @@ const Dqword V0 Value1; \ \ __ movups(XmmRegister::Encoded_Reg_##Src, dwordAddress(T0)); \ - __ Inst(GPRRegister::Encoded_Reg_##GPR, XmmRegister::Encoded_Reg_##Src); \ + __ Inst(IceType_v4f32, GPRRegister::Encoded_Reg_##GPR, \ + XmmRegister::Encoded_Reg_##Src); \ \ AssembledTest test = assemble(); \ test.setDqwordTo(T0, V0); \ @@ -985,8 +986,7 @@ #define TestMovmsk(GPR, Src) \ do { \ - TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmskps); \ - TestMovmskGPRXmm(GPR, Src, (1.0, -1.0), 0x02ul, movmskpd); \ + TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmsk); \ } while (0) TestMovmsk(eax, xmm0);
diff --git a/unittest/AssemblerX8664/DataMov.cpp b/unittest/AssemblerX8664/DataMov.cpp index 6e83fce..3771d64 100644 --- a/unittest/AssemblerX8664/DataMov.cpp +++ b/unittest/AssemblerX8664/DataMov.cpp
@@ -1361,7 +1361,7 @@ const Dqword V0 Value1; \ \ __ movups(Encoded_Xmm_##Src(), dwordAddress(T0)); \ - __ Inst(Encoded_GPR_##GPR(), Encoded_Xmm_##Src()); \ + __ Inst(IceType_v4f32, Encoded_GPR_##GPR(), Encoded_Xmm_##Src()); \ \ AssembledTest test = assemble(); \ test.setDqwordTo(T0, V0); \ @@ -1373,8 +1373,7 @@ #define TestMovmsk(GPR, Src) \ do { \ - TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmskps); \ - TestMovmskGPRXmm(GPR, Src, (1.0, -1.0), 0x02ul, movmskpd); \ + TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmsk); \ } while (0) TestMovmsk(r1, xmm0);