blob: 3d4d6e55b3eb81fb6df7cff575802e429b9a5ee4 [file] [log] [blame]
# Copyright 2020 The SwiftShader Authors. All Rights Reserved.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
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${LLVM_DIR}/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
${LLVM_DIR}/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
${LLVM_DIR}/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp
${LLVM_DIR}/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
${LLVM_DIR}/lib/Target/X86/Utils/X86ShuffleDecode.cpp
${LLVM_DIR}/lib/Target/X86/X86AsmPrinter.cpp
${LLVM_DIR}/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
${LLVM_DIR}/lib/Target/X86/X86AvoidTrailingCall.cpp
${LLVM_DIR}/lib/Target/X86/X86CallFrameOptimization.cpp
${LLVM_DIR}/lib/Target/X86/X86CallingConv.cpp
${LLVM_DIR}/lib/Target/X86/X86CallLowering.cpp
${LLVM_DIR}/lib/Target/X86/X86CmovConversion.cpp
${LLVM_DIR}/lib/Target/X86/X86CondBrFolding.cpp
${LLVM_DIR}/lib/Target/X86/X86DiscriminateMemOps.cpp
${LLVM_DIR}/lib/Target/X86/X86DomainReassignment.cpp
${LLVM_DIR}/lib/Target/X86/X86EvexToVex.cpp
${LLVM_DIR}/lib/Target/X86/X86ExpandPseudo.cpp
${LLVM_DIR}/lib/Target/X86/X86FastISel.cpp
${LLVM_DIR}/lib/Target/X86/X86FixupBWInsts.cpp
${LLVM_DIR}/lib/Target/X86/X86FixupLEAs.cpp
${LLVM_DIR}/lib/Target/X86/X86FixupSetCC.cpp
${LLVM_DIR}/lib/Target/X86/X86FlagsCopyLowering.cpp
${LLVM_DIR}/lib/Target/X86/X86FloatingPoint.cpp
${LLVM_DIR}/lib/Target/X86/X86FrameLowering.cpp
${LLVM_DIR}/lib/Target/X86/X86IndirectBranchTracking.cpp
${LLVM_DIR}/lib/Target/X86/X86InsertPrefetch.cpp
${LLVM_DIR}/lib/Target/X86/X86InstrFMA3Info.cpp
${LLVM_DIR}/lib/Target/X86/X86InstrFoldTables.cpp
${LLVM_DIR}/lib/Target/X86/X86InstrInfo.cpp
${LLVM_DIR}/lib/Target/X86/X86InstructionSelector.cpp
${LLVM_DIR}/lib/Target/X86/X86InterleavedAccess.cpp
${LLVM_DIR}/lib/Target/X86/X86ISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/X86/X86ISelLowering.cpp
${LLVM_DIR}/lib/Target/X86/X86LegalizerInfo.cpp
${LLVM_DIR}/lib/Target/X86/X86MachineFunctionInfo.cpp
${LLVM_DIR}/lib/Target/X86/X86MacroFusion.cpp
${LLVM_DIR}/lib/Target/X86/X86MCInstLower.cpp
${LLVM_DIR}/lib/Target/X86/X86OptimizeLEAs.cpp
${LLVM_DIR}/lib/Target/X86/X86PadShortFunction.cpp
${LLVM_DIR}/lib/Target/X86/X86RegisterBankInfo.cpp
${LLVM_DIR}/lib/Target/X86/X86RegisterInfo.cpp
${LLVM_DIR}/lib/Target/X86/X86RetpolineThunks.cpp
${LLVM_DIR}/lib/Target/X86/X86SelectionDAGInfo.cpp
${LLVM_DIR}/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp
${LLVM_DIR}/lib/Target/X86/X86SpeculativeLoadHardening.cpp
${LLVM_DIR}/lib/Target/X86/X86Subtarget.cpp
${LLVM_DIR}/lib/Target/X86/X86TargetMachine.cpp
${LLVM_DIR}/lib/Target/X86/X86TargetObjectFile.cpp
${LLVM_DIR}/lib/Target/X86/X86TargetTransformInfo.cpp
${LLVM_DIR}/lib/Target/X86/X86VZeroUpper.cpp
${LLVM_DIR}/lib/Target/X86/X86WinAllocaExpander.cpp
${LLVM_DIR}/lib/Target/X86/X86WinEHState.cpp
)
elseif(ARCH STREQUAL "mipsel" OR ARCH STREQUAL "mips64el")
list(APPEND LLVM_LIST
${LLVM_DIR}/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
${LLVM_DIR}/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp
${LLVM_DIR}/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
${LLVM_DIR}/lib/Target/Mips/MicroMipsSizeReduction.cpp
${LLVM_DIR}/lib/Target/Mips/Mips16FrameLowering.cpp
${LLVM_DIR}/lib/Target/Mips/Mips16HardFloat.cpp
${LLVM_DIR}/lib/Target/Mips/Mips16HardFloatInfo.cpp
${LLVM_DIR}/lib/Target/Mips/Mips16InstrInfo.cpp
${LLVM_DIR}/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/Mips/Mips16ISelLowering.cpp
${LLVM_DIR}/lib/Target/Mips/Mips16RegisterInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsAnalyzeImmediate.cpp
${LLVM_DIR}/lib/Target/Mips/MipsAsmPrinter.cpp
${LLVM_DIR}/lib/Target/Mips/MipsBranchExpansion.cpp
${LLVM_DIR}/lib/Target/Mips/MipsCallLowering.cpp
${LLVM_DIR}/lib/Target/Mips/MipsCCState.cpp
${LLVM_DIR}/lib/Target/Mips/MipsConstantIslandPass.cpp
${LLVM_DIR}/lib/Target/Mips/MipsDelaySlotFiller.cpp
${LLVM_DIR}/lib/Target/Mips/MipsExpandPseudo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsFastISel.cpp
${LLVM_DIR}/lib/Target/Mips/MipsFrameLowering.cpp
${LLVM_DIR}/lib/Target/Mips/MipsInstrInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsInstructionSelector.cpp
${LLVM_DIR}/lib/Target/Mips/MipsISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/Mips/MipsISelLowering.cpp
${LLVM_DIR}/lib/Target/Mips/MipsLegalizerInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsMachineFunction.cpp
${LLVM_DIR}/lib/Target/Mips/MipsMCInstLower.cpp
${LLVM_DIR}/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/Mips/MipsOptimizePICCall.cpp
${LLVM_DIR}/lib/Target/Mips/MipsOs16.cpp
${LLVM_DIR}/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
${LLVM_DIR}/lib/Target/Mips/MipsRegisterBankInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsRegisterInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsSEFrameLowering.cpp
${LLVM_DIR}/lib/Target/Mips/MipsSEInstrInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/Mips/MipsSEISelLowering.cpp
${LLVM_DIR}/lib/Target/Mips/MipsSERegisterInfo.cpp
${LLVM_DIR}/lib/Target/Mips/MipsSubtarget.cpp
${LLVM_DIR}/lib/Target/Mips/MipsTargetMachine.cpp
${LLVM_DIR}/lib/Target/Mips/MipsTargetObjectFile.cpp
${LLVM_DIR}/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp
)
elseif(ARCH STREQUAL "aarch64")
list(APPEND LLVM_LIST
${LLVM_DIR}/lib/Target/AArch64/AArch64A53Fix835769.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64AsmPrinter.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64BranchTargets.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64CallingConvention.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64CallLowering.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64CollectLOH.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64CompressJumpTables.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64CondBrTuning.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64ConditionalCompares.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64ExpandImm.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64FastISel.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64FrameLowering.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64InstrInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64InstructionSelector.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64ISelLowering.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64LegalizerInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64MacroFusion.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64MCInstLower.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64PromoteConstant.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64RegisterInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64SpeculationHardening.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64StackTagging.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64StorePairSuppress.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64Subtarget.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64TargetMachine.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64TargetObjectFile.cpp
${LLVM_DIR}/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
${LLVM_DIR}/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
${LLVM_DIR}/lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
${LLVM_DIR}/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
${LLVM_DIR}/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
${LLVM_DIR}/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
)
elseif(ARCH STREQUAL "arm")
list(APPEND LLVM_LIST
${LLVM_DIR}/lib/Target/ARM/A15SDOptimizer.cpp
${LLVM_DIR}/lib/Target/ARM/ARMAsmPrinter.cpp
${LLVM_DIR}/lib/Target/ARM/ARMBaseInstrInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMBaseRegisterInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMBasicBlockInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMCallingConv.cpp
${LLVM_DIR}/lib/Target/ARM/ARMCallLowering.cpp
${LLVM_DIR}/lib/Target/ARM/ARMConstantIslandPass.cpp
${LLVM_DIR}/lib/Target/ARM/ARMConstantPoolValue.cpp
${LLVM_DIR}/lib/Target/ARM/ARMExpandPseudoInsts.cpp
${LLVM_DIR}/lib/Target/ARM/ARMFastISel.cpp
${LLVM_DIR}/lib/Target/ARM/ARMFrameLowering.cpp
${LLVM_DIR}/lib/Target/ARM/ARMHazardRecognizer.cpp
${LLVM_DIR}/lib/Target/ARM/ARMInstrInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMInstructionSelector.cpp
${LLVM_DIR}/lib/Target/ARM/ARMISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/ARM/ARMISelLowering.cpp
${LLVM_DIR}/lib/Target/ARM/ARMLegalizerInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
${LLVM_DIR}/lib/Target/ARM/ARMLowOverheadLoops.cpp
${LLVM_DIR}/lib/Target/ARM/ARMMachineFunctionInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMMacroFusion.cpp
${LLVM_DIR}/lib/Target/ARM/ARMMCInstLower.cpp
${LLVM_DIR}/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
${LLVM_DIR}/lib/Target/ARM/ARMParallelDSP.cpp
${LLVM_DIR}/lib/Target/ARM/ARMRegisterBankInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMRegisterInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMSelectionDAGInfo.cpp
${LLVM_DIR}/lib/Target/ARM/ARMSubtarget.cpp
${LLVM_DIR}/lib/Target/ARM/ARMTargetMachine.cpp
${LLVM_DIR}/lib/Target/ARM/ARMTargetObjectFile.cpp
${LLVM_DIR}/lib/Target/ARM/ARMTargetTransformInfo.cpp
${LLVM_DIR}/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
${LLVM_DIR}/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
${LLVM_DIR}/lib/Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp
${LLVM_DIR}/lib/Target/ARM/MLxExpansionPass.cpp
${LLVM_DIR}/lib/Target/ARM/MVEGatherScatterLowering.cpp
${LLVM_DIR}/lib/Target/ARM/MVETailPredication.cpp
${LLVM_DIR}/lib/Target/ARM/MVEVPTBlockPass.cpp
${LLVM_DIR}/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp
${LLVM_DIR}/lib/Target/ARM/Thumb1FrameLowering.cpp
${LLVM_DIR}/lib/Target/ARM/Thumb1InstrInfo.cpp
${LLVM_DIR}/lib/Target/ARM/Thumb2InstrInfo.cpp
${LLVM_DIR}/lib/Target/ARM/Thumb2ITBlockPass.cpp
${LLVM_DIR}/lib/Target/ARM/Thumb2SizeReduction.cpp
${LLVM_DIR}/lib/Target/ARM/ThumbRegisterInfo.cpp
${LLVM_DIR}/lib/Target/ARM/Utils/ARMBaseInfo.cpp
)
elseif(ARCH STREQUAL "ppc64le")
list(APPEND LLVM_LIST
${LLVM_DIR}/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
${LLVM_DIR}/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.cpp
${LLVM_DIR}/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCAsmPrinter.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCBoolRetToInt.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCBranchCoalescing.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCBranchSelector.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCCallingConv.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCCCState.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCCTRLoops.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCEarlyReturn.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCExpandISEL.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCFastISel.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCFrameLowering.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCHazardRecognizers.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCInstrInfo.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCISelLowering.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCLoopInstrFormPrep.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCMachineScheduler.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCMCInstLower.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCMIPeephole.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCQPXLoadSplat.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCRegisterInfo.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCSubtarget.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCTargetMachine.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCTargetObjectFile.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCTOCRegDeps.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCVSXCopy.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
${LLVM_DIR}/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
${LLVM_DIR}/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
)
endif()
if(REACTOR_EMIT_DEBUG_INFO)
list(APPEND LLVM_LIST
${LLVM_DIR}/lib/Demangle/ItaniumDemangle.cpp
)
endif()
set(LLVM_INCLUDE_DIR "")
if(WIN32)
list(APPEND LLVM_INCLUDE_DIR ${LLVM_CONFIG_DIR}/windows/include)
elseif(LINUX)
list(APPEND LLVM_INCLUDE_DIR ${LLVM_CONFIG_DIR}/linux/include)
list(APPEND LIBBACKTRACE_INCLUDE_DIR ${LIBBACKTRACE_CONFIG_DIR}/linux/include)
elseif(APPLE)
list(APPEND LLVM_INCLUDE_DIR ${LLVM_CONFIG_DIR}/darwin/include)
list(APPEND LIBBACKTRACE_INCLUDE_DIR ${LIBBACKTRACE_CONFIG_DIR}/darwin/include)
elseif(ANDROID)
list(APPEND LLVM_INCLUDE_DIR ${LLVM_CONFIG_DIR}/android/include)
list(APPEND LIBBACKTRACE_INCLUDE_DIR ${LIBBACKTRACE_CONFIG_DIR}/android/include)
elseif(FUCHSIA)
list(APPEND LLVM_INCLUDE_DIR ${LLVM_CONFIG_DIR}/fuchsia/include)
endif()
list(APPEND LLVM_INCLUDE_DIR
${LLVM_DIR}/include
${LLVM_DIR}/lib/Target/AArch64
${LLVM_DIR}/lib/Target/ARM
${LLVM_DIR}/lib/Target/Mips
${LLVM_DIR}/lib/Target/PowerPC
${LLVM_DIR}/lib/Target/X86
${LLVM_CONFIG_DIR}/common/include
${LLVM_CONFIG_DIR}/common/lib/IR
${LLVM_CONFIG_DIR}/common/lib/Target/AArch64
${LLVM_CONFIG_DIR}/common/lib/Target/ARM
${LLVM_CONFIG_DIR}/common/lib/Target/Mips
${LLVM_CONFIG_DIR}/common/lib/Target/PowerPC
${LLVM_CONFIG_DIR}/common/lib/Target/X86
${LLVM_CONFIG_DIR}/common/lib/Transforms/InstCombine
)
# Suppress known LLVM warnings
set(LLVM_COMPILE_OPTIONS)
if(CMAKE_CXX_COMPILER_ID MATCHES "GNU")
list(APPEND LLVM_COMPILE_OPTIONS
"-Wno-noexcept-type" # mangled name for ‘X’ will change in C++17 because the exception specification is part of a function type
"-Wno-maybe-uninitialized" # ‘X’ may be used uninitialized in this function
"-Wno-unused-but-set-variable" # variable ‘X’ set but not used
)
if(CMAKE_CXX_COMPILER_VERSION VERSION_GREATER_EQUAL 8)
list(APPEND LLVM_COMPILE_OPTIONS
"-Wno-class-memaccess" # memset/memcmp used on non-trivial class object
"-Wno-attributes" # declared inline but not inline
)
endif()
if(CMAKE_CXX_COMPILER_VERSION VERSION_GREATER_EQUAL 9)
list(APPEND LLVM_COMPILE_OPTIONS
"-Wno-init-list-lifetime" # assignment from temporary initializer_list does not extend the lifetime of the underlying array
)
endif()
elseif(CMAKE_CXX_COMPILER_ID MATCHES "MSVC")
list(APPEND LLVM_COMPILE_OPTIONS
"/wd4141" # 'inline': used more than once
"/wd4146" # unary minus operator applied to unsigned type, result still unsigned
"/wd4244" # 'X': conversion from 'uint64_t' to 'const unsigned int', possible loss of data
"/wd4267" # 'X': conversion from 'size_t' to 'unsigned int', possible loss of data
"/wd4291" # 'void X new(size_t,unsigned int,unsigned int)': no matching operator delete found; memory will not be freed if initialization throws an exception
"/wd4319" # 'X': zero extending 'unsigned int' to 'uint64_t' of greater size
"/wd4624" # 'X': destructor was implicitly defined as deleted
"/wd4805" # 'X': unsafe mix of type 'unsigned int' and type 'bool' in operation
"/wd4996" # 'X': Call to 'Y' with parameters that may be unsafe - this call relies on the caller to check that the passed values are correct.
)
elseif(FUCHSIA)
list(APPEND LLVM_COMPILE_OPTIONS
"-Wno-error" # The Fuchsia builds triggers several minor explicit #warning lines.
)
endif()
add_library(llvm STATIC EXCLUDE_FROM_ALL ${LLVM_LIST})
set_target_properties(llvm PROPERTIES
POSITION_INDEPENDENT_CODE 1
FOLDER "LLVM"
)
target_include_directories(llvm
PUBLIC
"${LLVM_INCLUDE_DIR}"
)
target_compile_options(llvm
PUBLIC
"${LLVM_COMPILE_OPTIONS}"
)
target_compile_definitions(llvm
PUBLIC
"__STDC_CONSTANT_MACROS"
"__STDC_LIMIT_MACROS"
)
# Add required libraries for LLVM
if(LINUX OR APPLE)
target_link_libraries(llvm dl z)
endif()
if(SWIFTSHADER_EMIT_COVERAGE)
# llvm-with-cov is an llvm target with additional coverage library
# functionality. This is used to build 'turbo-cov', a custom and faster
# reimplementation of llvm-cov.
add_library(llvm-with-cov STATIC EXCLUDE_FROM_ALL
${LLVM_DIR}/lib/ProfileData/InstrProfReader.cpp
${LLVM_DIR}/lib/ProfileData/ProfileSummaryBuilder.cpp
${LLVM_DIR}/lib/ProfileData/Coverage/CoverageMapping.cpp
${LLVM_DIR}/lib/ProfileData/Coverage/CoverageMappingReader.cpp
${LLVM_DIR}/lib/Support/Compression.cpp
)
set_target_properties(llvm-with-cov PROPERTIES
POSITION_INDEPENDENT_CODE 1
FOLDER "LLVM"
)
target_include_directories(llvm-with-cov
PUBLIC
${LLVM_INCLUDE_DIR}
)
target_compile_options(llvm-with-cov
PUBLIC
"__STDC_CONSTANT_MACROS"
"__STDC_LIMIT_MACROS"
)
if(LINUX OR APPLE)
target_link_libraries(llvm-with-cov llvm pthread)
endif()
endif()