Subzero: Use "auto" per (unwritten) auto coding style. auto *Foo = llvm::cast<Foo>(...) auto *Foo = llvm::dyn_cast<Foo>(...) auto *Foo = llvm::dyn_cast_or_null<Foo>(...) auto *Foo = Foo::create(...) Some instances may have been missed due to line breaks or "const" mismatches. BUG= none R=kschimpf@google.com Review URL: https://codereview.chromium.org/1516753008 .
diff --git a/src/IceCfg.cpp b/src/IceCfg.cpp index dd8416f..f9eeb98 100644 --- a/src/IceCfg.cpp +++ b/src/IceCfg.cpp
@@ -63,7 +63,7 @@ CfgNode *Cfg::makeNode() { SizeT LabelIndex = Nodes.size(); - CfgNode *Node = CfgNode::create(this, LabelIndex); + auto *Node = CfgNode::create(this, LabelIndex); Nodes.push_back(Node); return Node; } @@ -104,7 +104,7 @@ VariableDeclaration *nodeNameDeclaration(GlobalContext *Ctx, const IceString &NodeAsmName) { - VariableDeclaration *Var = VariableDeclaration::create(Ctx); + auto *Var = VariableDeclaration::create(Ctx); Var->setName(BlockNameGlobalPrefix + NodeAsmName); Var->setIsConstant(true); Var->addInitializer(VariableDeclaration::DataInitializer::create( @@ -117,7 +117,7 @@ VariableDeclaration * blockProfilingInfoDeclaration(GlobalContext *Ctx, const IceString &NodeAsmName, VariableDeclaration *NodeNameDeclaration) { - VariableDeclaration *Var = VariableDeclaration::create(Ctx); + auto *Var = VariableDeclaration::create(Ctx); Var->setName(BlockStatsGlobalPrefix + NodeAsmName); const SizeT Int64ByteSize = typeWidthInBytes(IceType_i64); Var->addInitializer( @@ -526,7 +526,7 @@ auto *Alloca = llvm::cast<InstAlloca>(Allocas[i]); // Emit a fake definition of the rematerializable variable. Variable *Dest = Alloca->getDest(); - InstFakeDef *Def = InstFakeDef::create(this, Dest); + auto *Def = InstFakeDef::create(this, Dest); if (BaseVariableType == BVT_StackPointer) Dest->setRematerializable(getTarget()->getStackReg(), Offsets[i]); else
diff --git a/src/IceCfg.h b/src/IceCfg.h index b7a7ce4..338f8f1 100644 --- a/src/IceCfg.h +++ b/src/IceCfg.h
@@ -132,7 +132,7 @@ // makeSpillVariable, and makeStackVariable. template <typename T = Variable> T *makeVariable(Type Ty) { SizeT Index = Variables.size(); - T *Var = T::create(this, Ty, Index); + auto *Var = T::create(this, Ty, Index); Variables.push_back(Var); return Var; }
diff --git a/src/IceCfgNode.cpp b/src/IceCfgNode.cpp index 6d3dc90..96a770a 100644 --- a/src/IceCfgNode.cpp +++ b/src/IceCfgNode.cpp
@@ -41,7 +41,7 @@ // Validates that all Phis are added before all regular instructions. void CfgNode::appendInst(Inst *Inst) { ++InstCountEstimate; - if (InstPhi *Phi = llvm::dyn_cast<InstPhi>(Inst)) { + if (auto *Phi = llvm::dyn_cast<InstPhi>(Inst)) { if (!Insts.empty()) { Func->setError("Phi instruction added to the middle of a block"); return; @@ -204,7 +204,7 @@ // the previous instruction is a compare instruction, then we move the // insertion point before the compare instruction so as not to interfere with // compare/branch fusing. - if (InstBr *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) { + if (auto *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) { if (!Branch->isUnconditional()) { if (InsertionPoint != Insts.begin()) { --InsertionPoint; @@ -227,7 +227,7 @@ assert(Operand); Variable *Dest = I.getDest(); assert(Dest); - InstAssign *NewInst = InstAssign::create(Func, Dest, Operand); + auto *NewInst = InstAssign::create(Func, Dest, Operand); if (CmpInstDest == Operand) Insts.insert(SafeInsertionPoint, NewInst); else @@ -1001,7 +1001,7 @@ Func->getContext()->statsUpdateFills(); } for (SizeT S = 0; S < I->getSrcSize(); ++S) { - if (Variable *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) { + if (auto *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) { if (!Src->hasReg()) Func->getContext()->statsUpdateSpills(); } @@ -1404,7 +1404,7 @@ Constant *OrderAcquireRelease = Context->getConstantInt32(Intrinsics::MemoryOrderAcquireRelease); - InstIntrinsicCall *Inst = InstIntrinsicCall::create( + auto *Inst = InstIntrinsicCall::create( Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); Inst->addArg(AtomicRMWOp); Inst->addArg(Counter);
diff --git a/src/IceConverter.cpp b/src/IceConverter.cpp index 9ed808e..58b1d3a 100644 --- a/src/IceConverter.cpp +++ b/src/IceConverter.cpp
@@ -706,7 +706,7 @@ const GlobalVariable *GV = I; Ice::GlobalDeclaration *Var = getConverter().getGlobalDeclaration(GV); - Ice::VariableDeclaration *VarDecl = cast<Ice::VariableDeclaration>(Var); + auto *VarDecl = cast<Ice::VariableDeclaration>(Var); VariableDeclarations->push_back(VarDecl); if (!GV->hasInternalLinkage() && GV->hasInitializer()) { @@ -864,7 +864,7 @@ Signature.appendArgType( Converter.convertToIceType(FuncType->getParamType(I))); } - FunctionDeclaration *IceFunc = FunctionDeclaration::create( + auto *IceFunc = FunctionDeclaration::create( Ctx, Signature, Func.getCallingConv(), Func.getLinkage(), Func.empty()); IceFunc->setName(Func.getName()); if (!IceFunc->verifyLinkageCorrect(Ctx)) { @@ -883,7 +883,7 @@ E = Mod->global_end(); I != E; ++I) { const GlobalVariable *GV = I; - VariableDeclaration *Var = VariableDeclaration::create(Ctx); + auto *Var = VariableDeclaration::create(Ctx); Var->setName(GV->getName()); Var->setAlignment(GV->getAlignment()); Var->setIsConstant(GV->isConstant());
diff --git a/src/IceGlobalContext.cpp b/src/IceGlobalContext.cpp index f18b0ef..58406f3 100644 --- a/src/IceGlobalContext.cpp +++ b/src/IceGlobalContext.cpp
@@ -130,7 +130,7 @@ auto Iter = Pool.find(Key); if (Iter != Pool.end()) return Iter->second; - ValueType *Result = ValueType::create(Ctx, Ty, Key); + auto *Result = ValueType::create(Ctx, Ty, Key); Pool[Key] = Result; return Result; }
diff --git a/src/IceInst.cpp b/src/IceInst.cpp index 6fb8780..a15d1b6 100644 --- a/src/IceInst.cpp +++ b/src/IceInst.cpp
@@ -94,7 +94,7 @@ bool Inst::isLastUse(const Operand *TestSrc) const { if (LiveRangesEnded == 0) return false; // early-exit optimization - if (const Variable *TestVar = llvm::dyn_cast<const Variable>(TestSrc)) { + if (auto *TestVar = llvm::dyn_cast<const Variable>(TestSrc)) { LREndedBits Mask = LiveRangesEnded; FOREACH_VAR_IN_INST(Var, *this) { if (Var == TestVar) { @@ -366,7 +366,7 @@ return; for (SizeT I = 0; I < getSrcSize(); ++I) { if (Labels[I] == Target) { - if (Variable *Var = llvm::dyn_cast<Variable>(getSrc(I))) { + if (auto *Var = llvm::dyn_cast<Variable>(getSrc(I))) { SizeT SrcIndex = Liveness->getLiveIndex(Var->getIndex()); if (!Live[SrcIndex]) { setLastUse(I);
diff --git a/src/IceInstARM32.cpp b/src/IceInstARM32.cpp index d592ea9..07b4429 100644 --- a/src/IceInstARM32.cpp +++ b/src/IceInstARM32.cpp
@@ -396,7 +396,7 @@ : OperandARM32Flex(kFlexReg, Ty), Reg(Reg), ShiftOp(ShiftOp), ShiftAmt(ShiftAmt) { NumVars = 1; - Variable *ShiftVar = llvm::dyn_cast_or_null<Variable>(ShiftAmt); + auto *ShiftVar = llvm::dyn_cast_or_null<Variable>(ShiftAmt); if (ShiftVar) ++NumVars; Vars = Func->allocateArrayOf<Variable *>(NumVars); @@ -831,8 +831,8 @@ return; Ostream &Str = Func->getContext()->getStrEmit(); Variable *Dest = getDest(); - Variable *SrcLo = llvm::cast<Variable>(getSrc(0)); - Variable *SrcHi = llvm::cast<Variable>(getSrc(1)); + auto *SrcLo = llvm::cast<Variable>(getSrc(0)); + auto *SrcHi = llvm::cast<Variable>(getSrc(1)); assert(SrcHi->hasReg()); assert(SrcLo->hasReg()); @@ -1207,7 +1207,7 @@ Str << "\t" << Opcode << getPredicate() << "\t"; getDest()->emit(Func); Str << ", "; - Constant *Src0 = llvm::cast<Constant>(getSrc(0)); + auto *Src0 = llvm::cast<Constant>(getSrc(0)); if (auto *CR = llvm::dyn_cast<ConstantRelocatable>(Src0)) { Str << "#:lower16:"; CR->emitWithoutPrefix(Func->getTarget()); @@ -1230,7 +1230,7 @@ Ostream &Str = Func->getContext()->getStrEmit(); assert(getSrcSize() == 2); Variable *Dest = getDest(); - Constant *Src1 = llvm::cast<Constant>(getSrc(1)); + auto *Src1 = llvm::cast<Constant>(getSrc(1)); Str << "\t" << Opcode << getPredicate() << "\t"; Dest->emit(Func); Str << ", "; @@ -1406,7 +1406,7 @@ Ostream &Str = Func->getContext()->getStrEmit(); - Variable *Reg = llvm::cast<Variable>(getSrc(0)); + auto *Reg = llvm::cast<Variable>(getSrc(0)); if (isScalarIntegerType(Reg->getType())) { // GPR push. Str << "\t" @@ -1427,7 +1427,7 @@ "\t{"; Reg->emit(Func); for (SizeT i = 1; i < SrcSize; ++i) { - Variable *NextReg = llvm::cast<Variable>(getSrc(i)); + auto *NextReg = llvm::cast<Variable>(getSrc(i)); if (isAssignedConsecutiveRegisters(Reg, NextReg)) { Str << ", "; } else { @@ -1491,7 +1491,7 @@ if (!BuildDefs::dump()) return; assert(getSrcSize() > 0); - Variable *LR = llvm::cast<Variable>(getSrc(0)); + auto *LR = llvm::cast<Variable>(getSrc(0)); assert(LR->hasReg()); assert(LR->getRegNum() == RegARM32::Reg_lr); Ostream &Str = Func->getContext()->getStrEmit();
diff --git a/src/IceInstMIPS32.cpp b/src/IceInstMIPS32.cpp index 2c7ee90..d159f4e 100644 --- a/src/IceInstMIPS32.cpp +++ b/src/IceInstMIPS32.cpp
@@ -134,7 +134,7 @@ if (!BuildDefs::dump()) return; assert(getSrcSize() > 0); - Variable *RA = llvm::cast<Variable>(getSrc(0)); + auto *RA = llvm::cast<Variable>(getSrc(0)); assert(RA->hasReg()); assert(RA->getRegNum() == RegMIPS32::Reg_RA); Ostream &Str = Func->getContext()->getStrEmit(); @@ -226,8 +226,8 @@ return; Ostream &Str = Func->getContext()->getStrEmit(); Variable *Dest = getDest(); - Variable *SrcLo = llvm::cast<Variable>(getSrc(0)); - Variable *SrcHi = llvm::cast<Variable>(getSrc(1)); + auto *SrcLo = llvm::cast<Variable>(getSrc(0)); + auto *SrcHi = llvm::cast<Variable>(getSrc(1)); assert(SrcHi->hasReg()); assert(SrcLo->hasReg());
diff --git a/src/IceOperand.cpp b/src/IceOperand.cpp index b46c7f5..21a4830 100644 --- a/src/IceOperand.cpp +++ b/src/IceOperand.cpp
@@ -329,7 +329,7 @@ Metadata[DestNum].markDef(Kind, &I, Node); } for (SizeT SrcNum = 0; SrcNum < I.getSrcSize(); ++SrcNum) { - if (const Variable *Var = llvm::dyn_cast<Variable>(I.getSrc(SrcNum))) { + if (auto *Var = llvm::dyn_cast<Variable>(I.getSrc(SrcNum))) { SizeT VarNum = Var->getIndex(); assert(VarNum < Metadata.size()); constexpr bool IsImplicit = false;
diff --git a/src/IcePhiLoweringImpl.h b/src/IcePhiLoweringImpl.h index 512b1f9..d6a12b2 100644 --- a/src/IcePhiLoweringImpl.h +++ b/src/IcePhiLoweringImpl.h
@@ -37,10 +37,10 @@ continue; Variable *Dest = Phi->getDest(); if (Dest->getType() == IceType_i64) { - Variable *DestLo = llvm::cast<Variable>(Target->loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(Target->hiOperand(Dest)); - InstPhi *PhiLo = InstPhi::create(Func, Phi->getSrcSize(), DestLo); - InstPhi *PhiHi = InstPhi::create(Func, Phi->getSrcSize(), DestHi); + auto *DestLo = llvm::cast<Variable>(Target->loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(Target->hiOperand(Dest)); + auto *PhiLo = InstPhi::create(Func, Phi->getSrcSize(), DestLo); + auto *PhiHi = InstPhi::create(Func, Phi->getSrcSize(), DestHi); for (SizeT I = 0; I < Phi->getSrcSize(); ++I) { Operand *Src = Phi->getSrc(I); CfgNode *Label = Phi->getLabel(I);
diff --git a/src/IceTargetLowering.cpp b/src/IceTargetLowering.cpp index 171882d..dcbb880 100644 --- a/src/IceTargetLowering.cpp +++ b/src/IceTargetLowering.cpp
@@ -224,7 +224,7 @@ lowerInsertElement(llvm::cast<InstInsertElement>(Inst)); break; case Inst::IntrinsicCall: { - InstIntrinsicCall *Call = llvm::cast<InstIntrinsicCall>(Inst); + auto *Call = llvm::cast<InstIntrinsicCall>(Inst); if (Call->getIntrinsicInfo().ReturnsTwice) setCallsReturnsTwice(true); lowerIntrinsicCall(Call);
diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp index 2930349..dff950a 100644 --- a/src/IceTargetLoweringARM32.cpp +++ b/src/IceTargetLoweringARM32.cpp
@@ -762,7 +762,7 @@ } bool TargetARM32::doBranchOpt(Inst *I, const CfgNode *NextNode) { - if (InstARM32Br *Br = llvm::dyn_cast<InstARM32Br>(I)) { + if (auto *Br = llvm::dyn_cast<InstARM32Br>(I)) { return Br->optimizeBranch(NextNode); } return false; @@ -1943,7 +1943,7 @@ Context.insert(InstFakeUse::create(Func, T)); } } - InstARM32Label *Label = InstARM32Label::create(Func, this); + auto *Label = InstARM32Label::create(Func, this); _br(Label, CondARM32::NE); _trap(); Context.insert(Label); @@ -2213,8 +2213,8 @@ assert(SrcsLo.swappedOperands() == SrcsHi.swappedOperands()); assert(SrcsLo.hasConstOperand() == SrcsHi.hasConstOperand()); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *T_Lo = makeReg(DestLo->getType()); Variable *T_Hi = makeReg(DestHi->getType()); @@ -3436,8 +3436,8 @@ } else if (Dest->getType() == IceType_i64) { // t1=sxtb src; t2= mov t1 asr #31; dst.lo=t1; dst.hi=t2 Constant *ShiftAmt = Ctx->getConstantInt32(31); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *T_Lo = makeReg(DestLo->getType()); if (Src0->getType() == IceType_i32) { Operand *Src0RF = legalize(Src0, Legal_Reg | Legal_Flex); @@ -3485,8 +3485,8 @@ // t1=uxtb src; dst.lo=t1; dst.hi=0 Operand *_0 = legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *T_Lo = makeReg(DestLo->getType()); switch (Src0->getType()) { @@ -3654,7 +3654,7 @@ case InstCast::Bitcast: { Operand *Src0 = Inst->getSrc(0); if (Dest->getType() == Src0->getType()) { - InstAssign *Assign = InstAssign::create(Func, Dest, Src0); + auto *Assign = InstAssign::create(Func, Dest, Src0); lowerAssign(Assign); return; } @@ -4028,8 +4028,8 @@ _lsl(Src0R, legalizeToReg(Src0), ShAmtImm); Variable *Src1R = legalizeToReg(Src1); - OperandARM32FlexReg *Src1F = OperandARM32FlexReg::create( - Func, IceType_i32, Src1R, OperandARM32::LSL, ShAmtImm); + auto *Src1F = OperandARM32FlexReg::create(Func, IceType_i32, Src1R, + OperandARM32::LSL, ShAmtImm); _cmp(Src0R, Src1F); return CondWhenTrue(getIcmp32Mapping(Condition)); } @@ -4176,7 +4176,7 @@ Variable *TmpHiReg; Variable *TmpLoReg; Operand *_0 = Ctx->getConstantZero(IceType_i32); - InstARM32Label *Retry = InstARM32Label::create(Func, this); + auto *Retry = InstARM32Label::create(Func, this); if (DestTy == IceType_i64) { Variable64On32 *PtrContentsReg64 = makeI64RegPair(); @@ -4316,7 +4316,7 @@ // signature matches some 64-bit platform's native instructions and expect to // fill a 64-bit reg. Thus, clear the upper bits of the dest just in case the // user doesn't do that in the IR or doesn't toss the bits via truncate. - Variable *DestHi = llvm::cast<Variable>(hiOperand(Instr->getDest())); + auto *DestHi = llvm::cast<Variable>(hiOperand(Instr->getDest())); Variable *T = makeReg(IceType_i32); Operand *_0 = legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex); @@ -4418,7 +4418,7 @@ Variable *Success = makeReg(IceType_i32); OperandARM32Mem *Mem; Operand *_0 = Ctx->getConstantZero(IceType_i32); - InstARM32Label *Retry = InstARM32Label::create(Func, this); + auto *Retry = InstARM32Label::create(Func, this); Variable64On32 *NewReg = makeI64RegPair(); ValueVar->initHiLo(Func); ValueVar->mustNotHaveReg(); @@ -4509,7 +4509,7 @@ Variable *New, *NewReg; Variable *Success = makeReg(IceType_i32); Operand *_0 = Ctx->getConstantZero(IceType_i32); - InstARM32Label *Retry = InstARM32Label::create(Func, this); + auto *Retry = InstARM32Label::create(Func, this); if (DestTy == IceType_i64) { Variable64On32 *TmpReg64 = makeI64RegPair(); @@ -4620,8 +4620,8 @@ Variable *Val_Hi = legalizeToReg(hiOperand(Val)); Variable *T_Lo = makeReg(IceType_i32); Variable *T_Hi = makeReg(IceType_i32); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); _rev(T_Lo, Val_Lo); _rev(T_Hi, Val_Hi); _mov(DestLo, T_Hi); @@ -4754,8 +4754,8 @@ Variable *T = makeReg(IceType_i32); _clz(T, ValLoR); if (Ty == IceType_i64) { - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Operand *Zero = legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex); Operand *ThirtyTwo = @@ -4787,7 +4787,7 @@ // TODO(jvoung): handled folding opportunities. Sign and zero extension can // be folded into a load. - InstAssign *Assign = InstAssign::create(Func, DestLoad, Src0); + auto *Assign = InstAssign::create(Func, DestLoad, Src0); lowerAssign(Assign); } @@ -5624,7 +5624,7 @@ } OperandARM32Mem *TargetARM32::formMemoryOperand(Operand *Operand, Type Ty) { - OperandARM32Mem *Mem = llvm::dyn_cast<OperandARM32Mem>(Operand); + auto *Mem = llvm::dyn_cast<OperandARM32Mem>(Operand); // It may be the case that address mode optimization already creates an // OperandARM32Mem, so in that case it wouldn't need another level of // transformation. @@ -5634,7 +5634,7 @@ // If we didn't do address mode optimization, then we only have a // base/offset to work with. ARM always requires a base register, so // just use that to hold the operand. - Variable *Base = llvm::cast<Variable>( + auto *Base = llvm::cast<Variable>( legalize(Operand, Legal_Reg | Legal_Rematerializable)); return OperandARM32Mem::create( Func, Ty, Base,
diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp index 7ce803b..d0c86a7 100644 --- a/src/IceTargetLoweringMIPS32.cpp +++ b/src/IceTargetLoweringMIPS32.cpp
@@ -531,8 +531,8 @@ Operand *Src1 = legalizeUndef(Inst->getSrc(1)); if (Dest->getType() == IceType_i64) { // TODO(reed kotler): fakedef needed for now until all cases are implemented - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Context.insert(InstFakeDef::create(Func, DestLo)); Context.insert(InstFakeDef::create(Func, DestHi)); UnimplementedError(Func->getContext()->getFlags()); @@ -616,8 +616,8 @@ Src0 = legalizeUndef(Src0); Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg); Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); // Variable *T_Lo = nullptr, *T_Hi = nullptr; Variable *T_Lo = makeReg(IceType_i32); Variable *T_Hi = makeReg(IceType_i32);
diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp index 0019693..2b3f2ad 100644 --- a/src/IceTargetLoweringX8632.cpp +++ b/src/IceTargetLoweringX8632.cpp
@@ -675,7 +675,7 @@ _pop(T_ecx); lowerIndirectJump(T_ecx); if (RI->getSrcSize()) { - Variable *RetValue = llvm::cast<Variable>(RI->getSrc(0)); + auto *RetValue = llvm::cast<Variable>(RI->getSrc(0)); Context.insert(InstFakeUse::create(Func, RetValue)); } RI->setDeleted(); @@ -797,7 +797,7 @@ for (Constant *C : Pool) { if (!C->getShouldBePooled()) continue; - typename T::IceType *Const = llvm::cast<typename T::IceType>(C); + auto *Const = llvm::cast<typename T::IceType>(C); typename T::IceType::PrimType Value = Const->getValue(); // Use memcpy() to copy bits from Value into RawValue in a way that avoids // breaking strict-aliasing rules.
diff --git a/src/IceTargetLoweringX8664.cpp b/src/IceTargetLoweringX8664.cpp index ceaaede..1ef6c43 100644 --- a/src/IceTargetLoweringX8664.cpp +++ b/src/IceTargetLoweringX8664.cpp
@@ -783,7 +783,7 @@ for (Constant *C : Pool) { if (!C->getShouldBePooled()) continue; - typename T::IceType *Const = llvm::cast<typename T::IceType>(C); + auto *Const = llvm::cast<typename T::IceType>(C); typename T::IceType::PrimType Value = Const->getValue(); // Use memcpy() to copy bits from Value into RawValue in a way that avoids // breaking strict-aliasing rules.
diff --git a/src/IceTargetLoweringX86BaseImpl.h b/src/IceTargetLoweringX86BaseImpl.h index 1818f02..7e55d0b 100644 --- a/src/IceTargetLoweringX86BaseImpl.h +++ b/src/IceTargetLoweringX86BaseImpl.h
@@ -601,7 +601,7 @@ Variable *Beacon = Func->makeVariable(IceType_i32); Beacon->setMustNotHaveReg(); Store->setRmwBeacon(Beacon); - InstFakeDef *BeaconDef = InstFakeDef::create(Func, Beacon); + auto *BeaconDef = InstFakeDef::create(Func, Beacon); Node->getInsts().insert(I3, BeaconDef); auto *RMW = Traits::Insts::FakeRMW::create( Func, ArithSrcOther, Store->getAddr(), Beacon, Arith->getOp()); @@ -704,7 +704,7 @@ } } else if (auto *Cast = llvm::dyn_cast<InstCast>(Next)) { // The load dest can always be folded into a Cast instruction. - Variable *Src0 = llvm::dyn_cast<Variable>(Cast->getSrc(0)); + auto *Src0 = llvm::dyn_cast<Variable>(Cast->getSrc(0)); if (Src0 == LoadDest) { NewInst = InstCast::create(Func, Cast->getCastKind(), Cast->getDest(), LoadSrc); @@ -846,7 +846,7 @@ InArgsSizeBytes += typeWidthInBytesOnStack(Ty); if (Arg->hasReg()) { assert(Ty != IceType_i64 || Traits::Is64Bit); - typename Traits::X86OperandMem *Mem = Traits::X86OperandMem::create( + auto *Mem = Traits::X86OperandMem::create( Func, Ty, FramePtr, Ctx->getConstantInt32(Arg->getStackOffset() + StackAdjBytes)); if (isVectorType(Arg->getType())) { @@ -1372,8 +1372,8 @@ break; } - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Operand *Src0Lo = loOperand(Src0); Operand *Src0Hi = hiOperand(Src0); Operand *Src1Lo = loOperand(Src1); @@ -1891,8 +1891,8 @@ Src0 = legalize(Src0); Operand *Src0Lo = loOperand(Src0); Operand *Src0Hi = hiOperand(Src0); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *T_Lo = nullptr, *T_Hi = nullptr; _mov(T_Lo, Src0Lo); _mov(DestLo, T_Lo); @@ -1995,8 +1995,8 @@ } else if (!Traits::Is64Bit && DestTy == IceType_i64) { // t1=movsx src; t2=t1; t2=sar t2, 31; dst.lo=t1; dst.hi=t2 Constant *Shift = Ctx->getConstantInt32(31); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *T_Lo = makeReg(DestLo->getType()); if (Src0RM->getType() == IceType_i32) { _mov(T_Lo, Src0RM); @@ -2052,8 +2052,8 @@ } else if (!Traits::Is64Bit && DestTy == IceType_i64) { // t1=movzx src; dst.lo=t1; dst.hi=0 Constant *Zero = Ctx->getConstantZero(IceType_i32); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *Tmp = makeReg(DestLo->getType()); if (Src0RM->getType() == IceType_i32) { _mov(Tmp, Src0RM); @@ -2256,7 +2256,7 @@ case InstCast::Bitcast: { Operand *Src0 = Inst->getSrc(0); if (DestTy == Src0->getType()) { - InstAssign *Assign = InstAssign::create(Func, Dest, Src0); + auto *Assign = InstAssign::create(Func, Dest, Src0); lowerAssign(Assign); return; } @@ -2325,8 +2325,8 @@ SpillHi = hiOperand(Src0RM); } - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *T_Lo = makeReg(IceType_i32); Variable *T_Hi = makeReg(IceType_i32); @@ -2367,9 +2367,9 @@ Spill->setMustNotHaveReg(); Variable *T_Lo = nullptr, *T_Hi = nullptr; - typename Traits::VariableSplit *SpillLo = Traits::VariableSplit::create( + auto *SpillLo = Traits::VariableSplit::create( Func, Spill, Traits::VariableSplit::Low); - typename Traits::VariableSplit *SpillHi = Traits::VariableSplit::create( + auto *SpillHi = Traits::VariableSplit::create( Func, Spill, Traits::VariableSplit::High); _mov(T_Lo, loOperand(Src0)); // Technically, the Spill is defined after the _store happens, but @@ -2974,8 +2974,8 @@ // Expand the element to the appropriate size for it to be inserted in the // vector. Variable *Expanded = Func->makeVariable(InVectorElementTy); - InstCast *Cast = InstCast::create(Func, InstCast::Zext, Expanded, - ElementToInsertNotLegalized); + auto *Cast = InstCast::create(Func, InstCast::Zext, Expanded, + ElementToInsertNotLegalized); lowerCast(Cast); ElementToInsertNotLegalized = Expanded; } @@ -3129,7 +3129,7 @@ // size, this opens up DCE opportunities. Operand *ByteSize = Instr->getArg(0); Variable *Dest = Instr->getDest(); - if (ConstantInteger32 *CI = llvm::dyn_cast<ConstantInteger32>(ByteSize)) { + if (auto *CI = llvm::dyn_cast<ConstantInteger32>(ByteSize)) { Constant *Result; switch (CI->getValue()) { default: @@ -3174,7 +3174,7 @@ formMemoryOperand(Instr->getArg(0), IceType_f64); _movq(T, Addr); // Then cast the bits back out of the XMM register to the i64 Dest. - InstCast *Cast = InstCast::create(Func, InstCast::Bitcast, Dest, T); + auto *Cast = InstCast::create(Func, InstCast::Bitcast, Dest, T); lowerCast(Cast); // Make sure that the atomic load isn't elided when unused. Context.insert(InstFakeUse::create(Func, Dest64On32->getLo())); @@ -3182,7 +3182,7 @@ return; } } - InstLoad *Load = InstLoad::create(Func, Dest, Instr->getArg(0)); + auto *Load = InstLoad::create(Func, Dest, Instr->getArg(0)); lowerLoad(Load); // Make sure the atomic load isn't elided when unused, by adding a FakeUse. // Since lowerLoad may fuse the load w/ an arithmetic instruction, insert @@ -3219,7 +3219,7 @@ // into two), following what GCC does. Cast the bits from int -> to an // xmm register first. Variable *T = makeReg(IceType_f64); - InstCast *Cast = InstCast::create(Func, InstCast::Bitcast, T, Value); + auto *Cast = InstCast::create(Func, InstCast::Bitcast, T, Value); lowerCast(Cast); // Then store XMM w/ a movq. typename Traits::X86OperandMem *Addr = @@ -3228,7 +3228,7 @@ _mfence(); return; } - InstStore *Store = InstStore::create(Func, Value, Ptr); + auto *Store = InstStore::create(Func, Value, Ptr); lowerStore(Store); _mfence(); return; @@ -3242,8 +3242,8 @@ Val = legalizeUndef(Val); Variable *T_Lo = legalizeToReg(loOperand(Val)); Variable *T_Hi = legalizeToReg(hiOperand(Val)); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); _bswap(T_Lo); _bswap(T_Hi); _mov(DestLo, T_Hi); @@ -3298,7 +3298,7 @@ if (!Traits::Is64Bit) { assert(T == Dest); if (Val->getType() == IceType_i64) { - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Constant *Zero = Ctx->getConstantZero(IceType_i32); _mov(DestHi, Zero); } @@ -3467,8 +3467,8 @@ typename Traits::X86OperandMem *Addr = formMemoryOperand(Ptr, Ty); constexpr bool Locked = true; _cmpxchg8b(Addr, T_edx, T_eax, T_ecx, T_ebx, Locked); - Variable *DestLo = llvm::cast<Variable>(loOperand(DestPrev)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(DestPrev)); + auto *DestLo = llvm::cast<Variable>(loOperand(DestPrev)); + auto *DestHi = llvm::cast<Variable>(hiOperand(DestPrev)); _mov(DestLo, T_eax); _mov(DestHi, T_edx); return; @@ -3529,7 +3529,7 @@ // could be a backward branch for a loop. This placement of assignments is // determined by placePhiStores(). std::vector<InstAssign *> PhiAssigns; - while (InstAssign *PhiAssign = llvm::dyn_cast<InstAssign>(NextInst)) { + while (auto *PhiAssign = llvm::dyn_cast<InstAssign>(NextInst)) { if (PhiAssign->getDest() == Dest) return false; PhiAssigns.push_back(PhiAssign); @@ -3537,7 +3537,7 @@ if (!NextInst) return false; } - if (InstIcmp *NextCmp = llvm::dyn_cast<InstIcmp>(NextInst)) { + if (auto *NextCmp = llvm::dyn_cast<InstIcmp>(NextInst)) { if (!(NextCmp->getCondition() == InstIcmp::Eq && ((NextCmp->getSrc(0) == Dest && NextCmp->getSrc(1) == Expected) || (NextCmp->getSrc(1) == Dest && NextCmp->getSrc(0) == Expected)))) { @@ -3546,7 +3546,7 @@ NextInst = Context.getNextInst(I); if (!NextInst) return false; - if (InstBr *NextBr = llvm::dyn_cast<InstBr>(NextInst)) { + if (auto *NextBr = llvm::dyn_cast<InstBr>(NextInst)) { if (!NextBr->isUnconditional() && NextCmp->getDest() == NextBr->getCondition() && NextBr->isLastUse(NextCmp->getDest())) { @@ -3724,9 +3724,9 @@ if (!IsXchg8b) { // If Val is a variable, model the extended live range of Val through // the end of the loop, since it will be re-used by the loop. - if (Variable *ValVar = llvm::dyn_cast<Variable>(Val)) { - Variable *ValLo = llvm::cast<Variable>(loOperand(ValVar)); - Variable *ValHi = llvm::cast<Variable>(hiOperand(ValVar)); + if (auto *ValVar = llvm::dyn_cast<Variable>(Val)) { + auto *ValLo = llvm::cast<Variable>(loOperand(ValVar)); + auto *ValHi = llvm::cast<Variable>(hiOperand(ValVar)); Context.insert(InstFakeUse::create(Func, ValLo)); Context.insert(InstFakeUse::create(Func, ValHi)); } @@ -3738,8 +3738,8 @@ // The address base (if any) is also reused in the loop. if (Variable *Base = Addr->getBase()) Context.insert(InstFakeUse::create(Func, Base)); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); _mov(DestLo, T_eax); _mov(DestHi, T_edx); return; @@ -3775,7 +3775,7 @@ _br(Traits::Cond::Br_ne, Label); // If Val is a variable, model the extended live range of Val through // the end of the loop, since it will be re-used by the loop. - if (Variable *ValVar = llvm::dyn_cast<Variable>(Val)) { + if (auto *ValVar = llvm::dyn_cast<Variable>(Val)) { Context.insert(InstFakeUse::create(Func, ValVar)); } // The address base (if any) is also reused in the loop. @@ -3845,8 +3845,8 @@ return; } _add(T_Dest, ThirtyTwo); - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); // Will be using "test" on this, so we need a registerized variable. Variable *SecondVar = legalizeToReg(SecondVal); Variable *T_Dest2 = makeReg(IceType_i32); @@ -4567,7 +4567,7 @@ Type Ty = DestLoad->getType(); Operand *Src0 = formMemoryOperand(Load->getSourceAddress(), Ty); doMockBoundsCheck(Src0); - InstAssign *Assign = InstAssign::create(Func, DestLoad, Src0); + auto *Assign = InstAssign::create(Func, DestLoad, Src0); lowerAssign(Assign); } @@ -4733,7 +4733,7 @@ SrcT = legalizeUndef(SrcT); SrcF = legalizeUndef(SrcF); // Set the low portion. - Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); + auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); Variable *TLo = nullptr; Operand *SrcFLo = legalize(loOperand(SrcF)); _mov(TLo, SrcFLo); @@ -4741,7 +4741,7 @@ _cmov(TLo, SrcTLo, Cond); _mov(DestLo, TLo); // Set the high portion. - Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); + auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); Variable *THi = nullptr; Operand *SrcFHi = legalize(hiOperand(SrcF)); _mov(THi, SrcFHi); @@ -4787,7 +4787,7 @@ } template <class Machine> void TargetX86Base<Machine>::doAddressOptStore() { - InstStore *Inst = llvm::cast<InstStore>(Context.getCur()); + auto *Inst = llvm::cast<InstStore>(Context.getCur()); Operand *Data = Inst->getData(); Operand *Addr = Inst->getAddr(); Variable *Index = nullptr; @@ -4813,7 +4813,7 @@ } Addr = Traits::X86OperandMem::create(Func, Data->getType(), Base, OffsetOp, Index, Shift, SegmentReg); - InstStore *NewStore = InstStore::create(Func, Data, Addr); + auto *NewStore = InstStore::create(Func, Data, Addr); if (Inst->getDest()) NewStore->setRmwBeacon(Inst->getRmwBeacon()); Context.insert(NewStore); @@ -5099,7 +5099,7 @@ template <class Machine> void TargetX86Base<Machine>::eliminateNextVectorSextInstruction( Variable *SignExtendedResult) { - if (InstCast *NextCast = + if (auto *NextCast = llvm::dyn_cast_or_null<InstCast>(Context.getNextInst())) { if (NextCast->getCastKind() == InstCast::Sext && NextCast->getSrc(0) == SignExtendedResult) { @@ -5774,7 +5774,7 @@ // If the operand is an 32 bit constant integer, we should check whether we // need to randomize it or pool it. - if (ConstantInteger32 *C = llvm::dyn_cast<ConstantInteger32>(Const)) { + if (auto *C = llvm::dyn_cast<ConstantInteger32>(Const)) { Operand *NewConst = randomizeOrPoolImmediate(C, RegNum); if (NewConst != Const) { return NewConst; @@ -5899,8 +5899,8 @@ // Traits::X86OperandMem, so in that case it wouldn't need another level of // transformation. if (!Mem) { - Variable *Base = llvm::dyn_cast<Variable>(Opnd); - Constant *Offset = llvm::dyn_cast<Constant>(Opnd); + auto *Base = llvm::dyn_cast<Variable>(Opnd); + auto *Offset = llvm::dyn_cast<Constant>(Opnd); assert(Base || Offset); if (Offset) { // During memory operand building, we do not blind or pool the constant @@ -6048,7 +6048,7 @@ // chain. So we add RegNum argument here. Note we use 'lea' instruction // instead of 'xor' to avoid affecting the flags. Variable *Reg = makeReg(IceType_i32, RegNum); - ConstantInteger32 *Integer = llvm::cast<ConstantInteger32>(Immediate); + auto *Integer = llvm::cast<ConstantInteger32>(Immediate); uint32_t Value = Integer->getValue(); uint32_t Cookie = Func->getConstantBlindingCookie(); _mov(Reg, Ctx->getConstantInt(IceType_i32, Cookie + Value)); @@ -6111,7 +6111,7 @@ if (MemOperand->getRandomized()) return MemOperand; - if (Constant *C = llvm::dyn_cast_or_null<Constant>(MemOperand->getOffset())) { + if (auto *C = llvm::dyn_cast_or_null<Constant>(MemOperand->getOffset())) { if (C->shouldBeRandomizedOrPooled(Ctx)) { // The offset of this mem operand should be blinded or pooled Ctx->statsUpdateRPImms();
diff --git a/src/PNaClTranslator.cpp b/src/PNaClTranslator.cpp index 0f40df5..bdb524c 100644 --- a/src/PNaClTranslator.cpp +++ b/src/PNaClTranslator.cpp
@@ -984,7 +984,7 @@ Error("Function type can't define varargs"); ExtendedType *Ty = Context->getTypeByIDForDefining(NextTypeId++); Ty->setAsFunctionType(); - FuncSigExtendedType *FuncTy = cast<FuncSigExtendedType>(Ty); + auto *FuncTy = cast<FuncSigExtendedType>(Ty); FuncTy->setReturnType(Context->getSimpleTypeByID(Values[1])); for (size_t i = 2, e = Values.size(); i != e; ++i) { // Check that type void not used as argument type. Note: PNaCl @@ -1530,7 +1530,7 @@ if (LocalIndex < LocalOperands.size()) { Ice::Operand *Op = LocalOperands[LocalIndex]; if (Op != nullptr) { - if (Ice::Variable *Var = dyn_cast<Ice::Variable>(Op)) { + if (auto *Var = dyn_cast<Ice::Variable>(Op)) { if (Var->getType() == Ty) { ++NextLocalInstIndex; return Var; @@ -3070,7 +3070,7 @@ if (isIRGenerationDisabled()) return; Ice::Operand *Op = getFunctionParser()->getOperand(Index); - if (Ice::Variable *V = dyn_cast<Ice::Variable>(Op)) { + if (auto *V = dyn_cast<Ice::Variable>(Op)) { if (Ice::BuildDefs::dump()) { std::string Nm(Name.data(), Name.size()); V->setName(getFunctionParser()->getFunc(), Nm); @@ -3266,7 +3266,7 @@ return; } bool IsProto = Values[2] == 1; - Ice::FunctionDeclaration *Func = Ice::FunctionDeclaration::create( + auto *Func = Ice::FunctionDeclaration::create( Context->getTranslator().getContext(), Signature, CallingConv, Linkage, IsProto); Context->setNextFunctionID(Func);