Rename Subzero Address to AsmAddress
For consistency with AsmOperand, which is the base class of Address,
this change renames the latter to AsmAddress. It also makes it clearer
when we're dealing with an (x86) assembler-level parameter, vs. a high-
level IR parameter.
stackVarToAsmOperand was renamed to stackVarToAsmAddress since it
returns the address subclass. Redundant namespace and traits member
qualifiers were removed.
Bug: b/192890685
Change-Id: I65f3ea4d490f44794e8a7eeb46391cbfd40d54cf
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/55768
Presubmit-Ready: Nicolas Capens <nicolascapens@google.com>
Kokoro-Result: kokoro <noreply+kokoro@google.com>
Tested-by: Nicolas Capens <nicolascapens@google.com>
Reviewed-by: Sean Risser <srisser@google.com>
Reviewed-by: Nicolas Capens <nicolascapens@google.com>
diff --git a/third_party/subzero/src/IceAssemblerX8632.cpp b/third_party/subzero/src/IceAssemblerX8632.cpp
index ca4fd79..03696de 100644
--- a/third_party/subzero/src/IceAssemblerX8632.cpp
+++ b/third_party/subzero/src/IceAssemblerX8632.cpp
@@ -101,7 +101,7 @@
emitRegisterOperand(2, gprEncoding(reg));
}
-void AssemblerX8632::call(const Address &address) {
+void AssemblerX8632::call(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xFF);
emitOperand(2, address);
@@ -160,7 +160,7 @@
emitUint8(0x58 + gprEncoding(reg));
}
-void AssemblerX8632::popl(const Address &address) {
+void AssemblerX8632::popl(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x8F);
emitOperand(0, address);
@@ -183,7 +183,7 @@
emitUint8(0xC0 + gprEncoding(dst));
}
-void AssemblerX8632::setcc(BrCond condition, const Address &address) {
+void AssemblerX8632::setcc(BrCond condition, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x90 + condition);
@@ -218,7 +218,7 @@
emitRegisterOperand(gprEncoding(src), gprEncoding(dst));
}
-void AssemblerX8632::mov(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::mov(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -230,7 +230,7 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8632::mov(Type Ty, const Address &dst, GPRRegister src) {
+void AssemblerX8632::mov(Type Ty, const AsmAddress &dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -242,7 +242,7 @@
emitOperand(gprEncoding(src), dst);
}
-void AssemblerX8632::mov(Type Ty, const Address &dst, const Immediate &imm) {
+void AssemblerX8632::mov(Type Ty, const AsmAddress &dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -268,7 +268,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
+void AssemblerX8632::movzx(Type SrcTy, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
bool ByteSized = isByteSizedType(SrcTy);
assert(ByteSized || SrcTy == IceType_i16);
@@ -286,7 +286,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
+void AssemblerX8632::movsx(Type SrcTy, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
bool ByteSized = isByteSizedType(SrcTy);
assert(ByteSized || SrcTy == IceType_i16);
@@ -295,7 +295,7 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8632::lea(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::lea(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -317,7 +317,7 @@
}
void AssemblerX8632::cmov(Type Ty, BrCond cond, GPRRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -334,7 +334,7 @@
emitUint8(0xA4);
}
-void AssemblerX8632::movss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::movss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -342,7 +342,7 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8632::movss(Type Ty, const Address &dst, XmmRegister src) {
+void AssemblerX8632::movss(Type Ty, const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -366,7 +366,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8632::movd(Type SrcTy, XmmRegister dst, const Address &src) {
+void AssemblerX8632::movd(Type SrcTy, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -382,7 +382,7 @@
emitRegisterOperand(gprEncoding(src), gprEncoding(dst));
}
-void AssemblerX8632::movd(Type DestTy, const Address &dst, XmmRegister src) {
+void AssemblerX8632::movd(Type DestTy, const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -398,7 +398,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::movq(const Address &dst, XmmRegister src) {
+void AssemblerX8632::movq(const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -406,7 +406,7 @@
emitOperand(gprEncoding(src), dst);
}
-void AssemblerX8632::movq(XmmRegister dst, const Address &src) {
+void AssemblerX8632::movq(XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xF3);
emitUint8(0x0F);
@@ -422,7 +422,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::addss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::addss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -438,7 +438,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::subss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::subss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -454,7 +454,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::mulss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::mulss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -470,7 +470,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::divss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::divss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -478,13 +478,13 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8632::fld(Type Ty, const Address &src) {
+void AssemblerX8632::fld(Type Ty, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
emitOperand(0, src);
}
-void AssemblerX8632::fstp(Type Ty, const Address &dst) {
+void AssemblerX8632::fstp(Type Ty, const AsmAddress &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xD9 : 0xDD);
emitOperand(3, dst);
@@ -510,14 +510,14 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::movups(XmmRegister dst, const Address &src) {
+void AssemblerX8632::movups(XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x10);
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8632::movups(const Address &dst, XmmRegister src) {
+void AssemblerX8632::movups(const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x11);
@@ -538,7 +538,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::padd(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::padd(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -566,7 +566,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::padds(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::padds(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -594,7 +594,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::paddus(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::paddus(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -616,7 +616,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pand(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -632,7 +632,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pandn(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -654,7 +654,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pmull(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pmull(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -678,7 +678,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pmulhw(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pmulhw(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -698,7 +698,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pmulhuw(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pmulhuw(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -718,7 +718,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pmaddwd(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pmaddwd(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -737,7 +737,7 @@
}
void AssemblerX8632::pmuludq(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -753,7 +753,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::por(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -775,7 +775,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::psub(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psub(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -803,7 +803,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::psubs(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psubs(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -831,7 +831,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::psubus(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psubus(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -853,7 +853,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pxor(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -874,7 +874,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::psll(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psll(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -915,7 +915,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::psra(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psra(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -958,7 +958,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::psrl(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1001,7 +1001,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::addps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x58);
@@ -1015,7 +1015,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::subps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x5C);
@@ -1029,7 +1029,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::divps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x5E);
@@ -1043,7 +1043,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8632::mulps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x59);
@@ -1059,7 +1059,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::minps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::minps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1076,7 +1076,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::minss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::minss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -1093,7 +1093,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::maxps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::maxps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1110,7 +1110,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::maxss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::maxss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -1127,7 +1127,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::andnps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::andnps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1145,7 +1145,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::andps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::andps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1163,7 +1163,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::orps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::orps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1182,7 +1182,7 @@
}
void AssemblerX8632::blendvps(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1201,7 +1201,7 @@
}
void AssemblerX8632::pblendvb(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1221,7 +1221,7 @@
emitUint8(CmpCondition);
}
-void AssemblerX8632::cmpps(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8632::cmpps(Type Ty, XmmRegister dst, const AsmAddress &src,
CmppsCond CmpCondition) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_f64)
@@ -1318,7 +1318,7 @@
}
void AssemblerX8632::pshufb(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1338,7 +1338,7 @@
emitUint8(imm.value());
}
-void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
+void AssemblerX8632::pshufd(Type /* Ty */, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
@@ -1366,7 +1366,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8632::punpckl(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8632::punpckl(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1398,7 +1398,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8632::punpckh(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8632::punpckh(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1428,7 +1428,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8632::packss(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8632::packss(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1457,7 +1457,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8632::packus(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8632::packus(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1482,7 +1482,7 @@
emitUint8(imm.value());
}
-void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
+void AssemblerX8632::shufps(Type /* Ty */, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
@@ -1510,7 +1510,7 @@
}
void AssemblerX8632::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x0F);
emitUint8(0x5B);
@@ -1527,7 +1527,7 @@
}
void AssemblerX8632::cvttps2dq(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xF3);
emitUint8(0x0F);
@@ -1545,7 +1545,7 @@
}
void AssemblerX8632::cvtps2dq(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1563,7 +1563,7 @@
}
void AssemblerX8632::cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -1582,7 +1582,7 @@
}
void AssemblerX8632::cvtfloat2float(Type SrcTy, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -1600,7 +1600,7 @@
}
void AssemblerX8632::cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -1618,7 +1618,7 @@
}
void AssemblerX8632::cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
emitUint8(0x0F);
@@ -1635,7 +1635,7 @@
emitXmmRegisterOperand(a, b);
}
-void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, const Address &b) {
+void AssemblerX8632::ucomiss(Type Ty, XmmRegister a, const AsmAddress &b) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_f64)
emitUint8(0x66);
@@ -1664,7 +1664,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::sqrt(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::sqrt(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (isScalarFloatingType(Ty))
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
@@ -1682,7 +1682,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::xorps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::xorps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1714,7 +1714,7 @@
emitUint8(imm.value());
}
-void AssemblerX8632::insertps(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8632::insertps(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(imm.is_uint8());
@@ -1745,7 +1745,7 @@
emitUint8(imm.value());
}
-void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8632::pinsr(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(imm.is_uint8());
@@ -1807,7 +1807,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pcmpeq(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1835,7 +1835,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8632::pcmpgt(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitUint8(0x0F);
@@ -1873,7 +1873,7 @@
emitUint8(static_cast<uint8_t>(mode.value()) | 0x8);
}
-void AssemblerX8632::round(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8632::round(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mode) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
@@ -1897,37 +1897,37 @@
emitUint8(static_cast<uint8_t>(mode.value()) | 0x8);
}
-void AssemblerX8632::fnstcw(const Address &dst) {
+void AssemblerX8632::fnstcw(const AsmAddress &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xD9);
emitOperand(7, dst);
}
-void AssemblerX8632::fldcw(const Address &src) {
+void AssemblerX8632::fldcw(const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xD9);
emitOperand(5, src);
}
-void AssemblerX8632::fistpl(const Address &dst) {
+void AssemblerX8632::fistpl(const AsmAddress &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xDF);
emitOperand(7, dst);
}
-void AssemblerX8632::fistps(const Address &dst) {
+void AssemblerX8632::fistps(const AsmAddress &dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xDB);
emitOperand(3, dst);
}
-void AssemblerX8632::fildl(const Address &src) {
+void AssemblerX8632::fildl(const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xDF);
emitOperand(5, src);
}
-void AssemblerX8632::filds(const Address &src) {
+void AssemblerX8632::filds(const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xDB);
emitOperand(0, src);
@@ -1967,7 +1967,7 @@
template <uint32_t Tag>
void AssemblerX8632::arith_int(Type Ty, GPRRegister reg,
- const Address &address) {
+ const AsmAddress &address) {
static_assert(Tag < 8, "Tag must be between 0..7");
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
@@ -1980,7 +1980,7 @@
}
template <uint32_t Tag>
-void AssemblerX8632::arith_int(Type Ty, const Address &address,
+void AssemblerX8632::arith_int(Type Ty, const AsmAddress &address,
GPRRegister reg) {
static_assert(Tag < 8, "Tag must be between 0..7");
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ -1994,7 +1994,7 @@
}
template <uint32_t Tag>
-void AssemblerX8632::arith_int(Type Ty, const Address &address,
+void AssemblerX8632::arith_int(Type Ty, const AsmAddress &address,
const Immediate &imm) {
static_assert(Tag < 8, "Tag must be between 0..7");
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ -2015,15 +2015,15 @@
arith_int<7>(Ty, reg0, reg1);
}
-void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const AsmAddress &address) {
arith_int<7>(Ty, reg, address);
}
-void AssemblerX8632::cmp(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::cmp(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<7>(Ty, address, reg);
}
-void AssemblerX8632::cmp(Type Ty, const Address &address,
+void AssemblerX8632::cmp(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<7>(Ty, address, imm);
}
@@ -2039,7 +2039,7 @@
emitRegisterOperand(gprEncoding(reg1), gprEncoding(reg2));
}
-void AssemblerX8632::test(Type Ty, const Address &addr, GPRRegister reg) {
+void AssemblerX8632::test(Type Ty, const AsmAddress &addr, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2082,7 +2082,7 @@
}
}
-void AssemblerX8632::test(Type Ty, const Address &addr,
+void AssemblerX8632::test(Type Ty, const AsmAddress &addr,
const Immediate &immediate) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
// If the immediate is short, we only test the byte addr to keep the encoding
@@ -2107,7 +2107,7 @@
arith_int<4>(Ty, dst, src);
}
-void AssemblerX8632::And(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::And(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<4>(Ty, dst, address);
}
@@ -2115,11 +2115,11 @@
arith_int<4>(Ty, dst, imm);
}
-void AssemblerX8632::And(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::And(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<4>(Ty, address, reg);
}
-void AssemblerX8632::And(Type Ty, const Address &address,
+void AssemblerX8632::And(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<4>(Ty, address, imm);
}
@@ -2128,7 +2128,7 @@
arith_int<1>(Ty, dst, src);
}
-void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::Or(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<1>(Ty, dst, address);
}
@@ -2136,11 +2136,11 @@
arith_int<1>(Ty, dst, imm);
}
-void AssemblerX8632::Or(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::Or(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<1>(Ty, address, reg);
}
-void AssemblerX8632::Or(Type Ty, const Address &address, const Immediate &imm) {
+void AssemblerX8632::Or(Type Ty, const AsmAddress &address, const Immediate &imm) {
arith_int<1>(Ty, address, imm);
}
@@ -2148,7 +2148,7 @@
arith_int<6>(Ty, dst, src);
}
-void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<6>(Ty, dst, address);
}
@@ -2156,11 +2156,11 @@
arith_int<6>(Ty, dst, imm);
}
-void AssemblerX8632::Xor(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::Xor(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<6>(Ty, address, reg);
}
-void AssemblerX8632::Xor(Type Ty, const Address &address,
+void AssemblerX8632::Xor(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<6>(Ty, address, imm);
}
@@ -2169,7 +2169,7 @@
arith_int<0>(Ty, dst, src);
}
-void AssemblerX8632::add(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::add(Type Ty, GPRRegister reg, const AsmAddress &address) {
arith_int<0>(Ty, reg, address);
}
@@ -2177,11 +2177,11 @@
arith_int<0>(Ty, reg, imm);
}
-void AssemblerX8632::add(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::add(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<0>(Ty, address, reg);
}
-void AssemblerX8632::add(Type Ty, const Address &address,
+void AssemblerX8632::add(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<0>(Ty, address, imm);
}
@@ -2190,7 +2190,7 @@
arith_int<2>(Ty, dst, src);
}
-void AssemblerX8632::adc(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::adc(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<2>(Ty, dst, address);
}
@@ -2198,11 +2198,11 @@
arith_int<2>(Ty, reg, imm);
}
-void AssemblerX8632::adc(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::adc(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<2>(Ty, address, reg);
}
-void AssemblerX8632::adc(Type Ty, const Address &address,
+void AssemblerX8632::adc(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<2>(Ty, address, imm);
}
@@ -2211,7 +2211,7 @@
arith_int<5>(Ty, dst, src);
}
-void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::sub(Type Ty, GPRRegister reg, const AsmAddress &address) {
arith_int<5>(Ty, reg, address);
}
@@ -2219,11 +2219,11 @@
arith_int<5>(Ty, reg, imm);
}
-void AssemblerX8632::sub(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::sub(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<5>(Ty, address, reg);
}
-void AssemblerX8632::sub(Type Ty, const Address &address,
+void AssemblerX8632::sub(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<5>(Ty, address, imm);
}
@@ -2232,7 +2232,7 @@
arith_int<3>(Ty, dst, src);
}
-void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<3>(Ty, dst, address);
}
@@ -2240,11 +2240,11 @@
arith_int<3>(Ty, reg, imm);
}
-void AssemblerX8632::sbb(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8632::sbb(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<3>(Ty, address, reg);
}
-void AssemblerX8632::sbb(Type Ty, const Address &address,
+void AssemblerX8632::sbb(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<3>(Ty, address, imm);
}
@@ -2277,7 +2277,7 @@
emitRegisterOperand(6, gprEncoding(reg));
}
-void AssemblerX8632::div(Type Ty, const Address &addr) {
+void AssemblerX8632::div(Type Ty, const AsmAddress &addr) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2299,7 +2299,7 @@
emitRegisterOperand(7, gprEncoding(reg));
}
-void AssemblerX8632::idiv(Type Ty, const Address &addr) {
+void AssemblerX8632::idiv(Type Ty, const AsmAddress &addr) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2320,7 +2320,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8632::imul(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8632::imul(Type Ty, GPRRegister reg, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2357,7 +2357,7 @@
emitRegisterOperand(5, gprEncoding(reg));
}
-void AssemblerX8632::imul(Type Ty, const Address &address) {
+void AssemblerX8632::imul(Type Ty, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2385,7 +2385,7 @@
}
}
-void AssemblerX8632::imul(Type Ty, GPRRegister dst, const Address &address,
+void AssemblerX8632::imul(Type Ty, GPRRegister dst, const AsmAddress &address,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
@@ -2415,7 +2415,7 @@
emitRegisterOperand(4, gprEncoding(reg));
}
-void AssemblerX8632::mul(Type Ty, const Address &address) {
+void AssemblerX8632::mul(Type Ty, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2431,7 +2431,7 @@
emitUint8(0x40 + reg);
}
-void AssemblerX8632::incl(const Address &address) {
+void AssemblerX8632::incl(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xFF);
emitOperand(0, address);
@@ -2442,7 +2442,7 @@
emitUint8(0x48 + reg);
}
-void AssemblerX8632::decl(const Address &address) {
+void AssemblerX8632::decl(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xFF);
emitOperand(1, address);
@@ -2456,7 +2456,7 @@
emitGenericShift(0, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8632::rol(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8632::rol(Type Ty, const AsmAddress &operand, GPRRegister shifter) {
emitGenericShift(0, Ty, operand, shifter);
}
@@ -2468,7 +2468,7 @@
emitGenericShift(4, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8632::shl(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8632::shl(Type Ty, const AsmAddress &operand, GPRRegister shifter) {
emitGenericShift(4, Ty, operand, shifter);
}
@@ -2480,7 +2480,7 @@
emitGenericShift(5, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8632::shr(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8632::shr(Type Ty, const AsmAddress &operand, GPRRegister shifter) {
emitGenericShift(5, Ty, operand, shifter);
}
@@ -2492,7 +2492,7 @@
emitGenericShift(7, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8632::sar(Type Ty, const Address &address, GPRRegister shifter) {
+void AssemblerX8632::sar(Type Ty, const AsmAddress &address, GPRRegister shifter) {
emitGenericShift(7, Ty, address, shifter);
}
@@ -2519,7 +2519,7 @@
emitUint8(imm.value() & 0xFF);
}
-void AssemblerX8632::shld(Type Ty, const Address &operand, GPRRegister src) {
+void AssemblerX8632::shld(Type Ty, const AsmAddress &operand, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2552,7 +2552,7 @@
emitUint8(imm.value() & 0xFF);
}
-void AssemblerX8632::shrd(Type Ty, const Address &dst, GPRRegister src) {
+void AssemblerX8632::shrd(Type Ty, const AsmAddress &dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2573,7 +2573,7 @@
emitRegisterOperand(3, gprEncoding(reg));
}
-void AssemblerX8632::neg(Type Ty, const Address &addr) {
+void AssemblerX8632::neg(Type Ty, const AsmAddress &addr) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2607,7 +2607,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8632::bsf(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::bsf(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2627,7 +2627,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8632::bsr(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8632::bsr(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2831,7 +2831,7 @@
emitUint8(0xF0);
}
-void AssemblerX8632::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
+void AssemblerX8632::cmpxchg(Type Ty, const AsmAddress &address, GPRRegister reg,
bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
@@ -2846,7 +2846,7 @@
emitOperand(gprEncoding(reg), address);
}
-void AssemblerX8632::cmpxchg8b(const Address &address, bool Locked) {
+void AssemblerX8632::cmpxchg8b(const AsmAddress &address, bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Locked)
emitUint8(0xF0);
@@ -2855,7 +2855,7 @@
emitOperand(1, address);
}
-void AssemblerX8632::xadd(Type Ty, const Address &addr, GPRRegister reg,
+void AssemblerX8632::xadd(Type Ty, const AsmAddress &addr, GPRRegister reg,
bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
@@ -2888,7 +2888,7 @@
}
}
-void AssemblerX8632::xchg(Type Ty, const Address &addr, GPRRegister reg) {
+void AssemblerX8632::xchg(Type Ty, const AsmAddress &addr, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
diff --git a/third_party/subzero/src/IceAssemblerX8632.h b/third_party/subzero/src/IceAssemblerX8632.h
index dadfc67..b0a375b 100644
--- a/third_party/subzero/src/IceAssemblerX8632.h
+++ b/third_party/subzero/src/IceAssemblerX8632.h
@@ -43,7 +43,7 @@
public:
using Traits = TargetX8632Traits;
- using Address = typename Traits::Address;
+ using AsmAddress = typename Traits::AsmAddress;
using ByteRegister = typename Traits::ByteRegister;
using BrCond = CondX86::BrCond;
using CmppsCond = CondX86::CmppsCond;
@@ -167,7 +167,7 @@
// Operations to emit GPR instructions (and dispatch on operand type).
using TypedEmitGPR = void (AssemblerX8632::*)(Type, GPRRegister);
- using TypedEmitAddr = void (AssemblerX8632::*)(Type, const Address &);
+ using TypedEmitAddr = void (AssemblerX8632::*)(Type, const AsmAddress &);
struct GPREmitterOneOp {
TypedEmitGPR Reg;
TypedEmitAddr Addr;
@@ -176,7 +176,7 @@
using TypedEmitGPRGPR = void (AssemblerX8632::*)(Type, GPRRegister,
GPRRegister);
using TypedEmitGPRAddr = void (AssemblerX8632::*)(Type, GPRRegister,
- const Address &);
+ const AsmAddress &);
using TypedEmitGPRImm = void (AssemblerX8632::*)(Type, GPRRegister,
const Immediate &);
struct GPREmitterRegOp {
@@ -202,9 +202,9 @@
TypedEmitGPRGPRImm GPRGPRImm;
};
- using TypedEmitAddrGPR = void (AssemblerX8632::*)(Type, const Address &,
+ using TypedEmitAddrGPR = void (AssemblerX8632::*)(Type, const AsmAddress &,
GPRRegister);
- using TypedEmitAddrImm = void (AssemblerX8632::*)(Type, const Address &,
+ using TypedEmitAddrImm = void (AssemblerX8632::*)(Type, const AsmAddress &,
const Immediate &);
struct GPREmitterAddrOp {
TypedEmitAddrGPR AddrGPR;
@@ -215,15 +215,15 @@
using TypedEmitXmmXmm = void (AssemblerX8632::*)(Type, XmmRegister,
XmmRegister);
using TypedEmitXmmAddr = void (AssemblerX8632::*)(Type, XmmRegister,
- const Address &);
+ const AsmAddress &);
struct XmmEmitterRegOp {
TypedEmitXmmXmm XmmXmm;
TypedEmitXmmAddr XmmAddr;
};
using EmitXmmXmm = void (AssemblerX8632::*)(XmmRegister, XmmRegister);
- using EmitXmmAddr = void (AssemblerX8632::*)(XmmRegister, const Address &);
- using EmitAddrXmm = void (AssemblerX8632::*)(const Address &, XmmRegister);
+ using EmitXmmAddr = void (AssemblerX8632::*)(XmmRegister, const AsmAddress &);
+ using EmitAddrXmm = void (AssemblerX8632::*)(const AsmAddress &, XmmRegister);
struct XmmEmitterMovOps {
EmitXmmXmm XmmXmm;
EmitXmmAddr XmmAddr;
@@ -243,7 +243,7 @@
template <typename DReg_t, typename SReg_t> struct CastEmitterRegOp {
using TypedEmitRegs = void (AssemblerX8632::*)(Type, DReg_t, Type, SReg_t);
using TypedEmitAddr = void (AssemblerX8632::*)(Type, DReg_t, Type,
- const Address &);
+ const AsmAddress &);
TypedEmitRegs RegReg;
TypedEmitAddr RegAddr;
@@ -255,7 +255,7 @@
using TypedEmitRegRegImm = void (AssemblerX8632::*)(Type, DReg_t, SReg_t,
const Immediate &);
using TypedEmitRegAddrImm = void (AssemblerX8632::*)(Type, DReg_t,
- const Address &,
+ const AsmAddress &,
const Immediate &);
TypedEmitRegRegImm RegRegImm;
@@ -266,7 +266,7 @@
* Emit Machine Instructions.
*/
void call(GPRRegister reg);
- void call(const Address &address);
+ void call(const AsmAddress &address);
void call(const ConstantRelocatable *label); // not testable.
void call(const Immediate &abs_address);
@@ -277,132 +277,132 @@
void pushl(const ConstantRelocatable *Label);
void popl(GPRRegister reg);
- void popl(const Address &address);
+ void popl(const AsmAddress &address);
void pushal();
void popal();
void setcc(BrCond condition, ByteRegister dst);
- void setcc(BrCond condition, const Address &address);
+ void setcc(BrCond condition, const AsmAddress &address);
void mov(Type Ty, GPRRegister dst, const Immediate &src);
void mov(Type Ty, GPRRegister dst, GPRRegister src);
- void mov(Type Ty, GPRRegister dst, const Address &src);
- void mov(Type Ty, const Address &dst, GPRRegister src);
- void mov(Type Ty, const Address &dst, const Immediate &imm);
+ void mov(Type Ty, GPRRegister dst, const AsmAddress &src);
+ void mov(Type Ty, const AsmAddress &dst, GPRRegister src);
+ void mov(Type Ty, const AsmAddress &dst, const Immediate &imm);
void movzx(Type Ty, GPRRegister dst, GPRRegister src);
- void movzx(Type Ty, GPRRegister dst, const Address &src);
+ void movzx(Type Ty, GPRRegister dst, const AsmAddress &src);
void movsx(Type Ty, GPRRegister dst, GPRRegister src);
- void movsx(Type Ty, GPRRegister dst, const Address &src);
+ void movsx(Type Ty, GPRRegister dst, const AsmAddress &src);
- void lea(Type Ty, GPRRegister dst, const Address &src);
+ void lea(Type Ty, GPRRegister dst, const AsmAddress &src);
void cmov(Type Ty, BrCond cond, GPRRegister dst, GPRRegister src);
- void cmov(Type Ty, BrCond cond, GPRRegister dst, const Address &src);
+ void cmov(Type Ty, BrCond cond, GPRRegister dst, const AsmAddress &src);
void rep_movsb();
- void movss(Type Ty, XmmRegister dst, const Address &src);
- void movss(Type Ty, const Address &dst, XmmRegister src);
+ void movss(Type Ty, XmmRegister dst, const AsmAddress &src);
+ void movss(Type Ty, const AsmAddress &dst, XmmRegister src);
void movss(Type Ty, XmmRegister dst, XmmRegister src);
void movd(Type SrcTy, XmmRegister dst, GPRRegister src);
- void movd(Type SrcTy, XmmRegister dst, const Address &src);
+ void movd(Type SrcTy, XmmRegister dst, const AsmAddress &src);
void movd(Type DestTy, GPRRegister dst, XmmRegister src);
- void movd(Type DestTy, const Address &dst, XmmRegister src);
+ void movd(Type DestTy, const AsmAddress &dst, XmmRegister src);
void movq(XmmRegister dst, XmmRegister src);
- void movq(const Address &dst, XmmRegister src);
- void movq(XmmRegister dst, const Address &src);
+ void movq(const AsmAddress &dst, XmmRegister src);
+ void movq(XmmRegister dst, const AsmAddress &src);
void addss(Type Ty, XmmRegister dst, XmmRegister src);
- void addss(Type Ty, XmmRegister dst, const Address &src);
+ void addss(Type Ty, XmmRegister dst, const AsmAddress &src);
void subss(Type Ty, XmmRegister dst, XmmRegister src);
- void subss(Type Ty, XmmRegister dst, const Address &src);
+ void subss(Type Ty, XmmRegister dst, const AsmAddress &src);
void mulss(Type Ty, XmmRegister dst, XmmRegister src);
- void mulss(Type Ty, XmmRegister dst, const Address &src);
+ void mulss(Type Ty, XmmRegister dst, const AsmAddress &src);
void divss(Type Ty, XmmRegister dst, XmmRegister src);
- void divss(Type Ty, XmmRegister dst, const Address &src);
+ void divss(Type Ty, XmmRegister dst, const AsmAddress &src);
void movaps(XmmRegister dst, XmmRegister src);
void movups(XmmRegister dst, XmmRegister src);
- void movups(XmmRegister dst, const Address &src);
- void movups(const Address &dst, XmmRegister src);
+ void movups(XmmRegister dst, const AsmAddress &src);
+ void movups(const AsmAddress &dst, XmmRegister src);
void padd(Type Ty, XmmRegister dst, XmmRegister src);
- void padd(Type Ty, XmmRegister dst, const Address &src);
+ void padd(Type Ty, XmmRegister dst, const AsmAddress &src);
void padds(Type Ty, XmmRegister dst, XmmRegister src);
- void padds(Type Ty, XmmRegister dst, const Address &src);
+ void padds(Type Ty, XmmRegister dst, const AsmAddress &src);
void paddus(Type Ty, XmmRegister dst, XmmRegister src);
- void paddus(Type Ty, XmmRegister dst, const Address &src);
+ void paddus(Type Ty, XmmRegister dst, const AsmAddress &src);
void pand(Type Ty, XmmRegister dst, XmmRegister src);
- void pand(Type Ty, XmmRegister dst, const Address &src);
+ void pand(Type Ty, XmmRegister dst, const AsmAddress &src);
void pandn(Type Ty, XmmRegister dst, XmmRegister src);
- void pandn(Type Ty, XmmRegister dst, const Address &src);
+ void pandn(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmull(Type Ty, XmmRegister dst, XmmRegister src);
- void pmull(Type Ty, XmmRegister dst, const Address &src);
+ void pmull(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmulhw(Type Ty, XmmRegister dst, XmmRegister src);
- void pmulhw(Type Ty, XmmRegister dst, const Address &src);
+ void pmulhw(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmulhuw(Type Ty, XmmRegister dst, XmmRegister src);
- void pmulhuw(Type Ty, XmmRegister dst, const Address &src);
+ void pmulhuw(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmaddwd(Type Ty, XmmRegister dst, XmmRegister src);
- void pmaddwd(Type Ty, XmmRegister dst, const Address &src);
+ void pmaddwd(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmuludq(Type Ty, XmmRegister dst, XmmRegister src);
- void pmuludq(Type Ty, XmmRegister dst, const Address &src);
+ void pmuludq(Type Ty, XmmRegister dst, const AsmAddress &src);
void por(Type Ty, XmmRegister dst, XmmRegister src);
- void por(Type Ty, XmmRegister dst, const Address &src);
+ void por(Type Ty, XmmRegister dst, const AsmAddress &src);
void psub(Type Ty, XmmRegister dst, XmmRegister src);
- void psub(Type Ty, XmmRegister dst, const Address &src);
+ void psub(Type Ty, XmmRegister dst, const AsmAddress &src);
void psubs(Type Ty, XmmRegister dst, XmmRegister src);
- void psubs(Type Ty, XmmRegister dst, const Address &src);
+ void psubs(Type Ty, XmmRegister dst, const AsmAddress &src);
void psubus(Type Ty, XmmRegister dst, XmmRegister src);
- void psubus(Type Ty, XmmRegister dst, const Address &src);
+ void psubus(Type Ty, XmmRegister dst, const AsmAddress &src);
void pxor(Type Ty, XmmRegister dst, XmmRegister src);
- void pxor(Type Ty, XmmRegister dst, const Address &src);
+ void pxor(Type Ty, XmmRegister dst, const AsmAddress &src);
void psll(Type Ty, XmmRegister dst, XmmRegister src);
- void psll(Type Ty, XmmRegister dst, const Address &src);
+ void psll(Type Ty, XmmRegister dst, const AsmAddress &src);
void psll(Type Ty, XmmRegister dst, const Immediate &src);
void psra(Type Ty, XmmRegister dst, XmmRegister src);
- void psra(Type Ty, XmmRegister dst, const Address &src);
+ void psra(Type Ty, XmmRegister dst, const AsmAddress &src);
void psra(Type Ty, XmmRegister dst, const Immediate &src);
void psrl(Type Ty, XmmRegister dst, XmmRegister src);
- void psrl(Type Ty, XmmRegister dst, const Address &src);
+ void psrl(Type Ty, XmmRegister dst, const AsmAddress &src);
void psrl(Type Ty, XmmRegister dst, const Immediate &src);
void addps(Type Ty, XmmRegister dst, XmmRegister src);
- void addps(Type Ty, XmmRegister dst, const Address &src);
+ void addps(Type Ty, XmmRegister dst, const AsmAddress &src);
void subps(Type Ty, XmmRegister dst, XmmRegister src);
- void subps(Type Ty, XmmRegister dst, const Address &src);
+ void subps(Type Ty, XmmRegister dst, const AsmAddress &src);
void divps(Type Ty, XmmRegister dst, XmmRegister src);
- void divps(Type Ty, XmmRegister dst, const Address &src);
+ void divps(Type Ty, XmmRegister dst, const AsmAddress &src);
void mulps(Type Ty, XmmRegister dst, XmmRegister src);
- void mulps(Type Ty, XmmRegister dst, const Address &src);
- void minps(Type Ty, XmmRegister dst, const Address &src);
+ void mulps(Type Ty, XmmRegister dst, const AsmAddress &src);
+ void minps(Type Ty, XmmRegister dst, const AsmAddress &src);
void minps(Type Ty, XmmRegister dst, XmmRegister src);
- void minss(Type Ty, XmmRegister dst, const Address &src);
+ void minss(Type Ty, XmmRegister dst, const AsmAddress &src);
void minss(Type Ty, XmmRegister dst, XmmRegister src);
- void maxps(Type Ty, XmmRegister dst, const Address &src);
+ void maxps(Type Ty, XmmRegister dst, const AsmAddress &src);
void maxps(Type Ty, XmmRegister dst, XmmRegister src);
- void maxss(Type Ty, XmmRegister dst, const Address &src);
+ void maxss(Type Ty, XmmRegister dst, const AsmAddress &src);
void maxss(Type Ty, XmmRegister dst, XmmRegister src);
- void andnps(Type Ty, XmmRegister dst, const Address &src);
+ void andnps(Type Ty, XmmRegister dst, const AsmAddress &src);
void andnps(Type Ty, XmmRegister dst, XmmRegister src);
- void andps(Type Ty, XmmRegister dst, const Address &src);
+ void andps(Type Ty, XmmRegister dst, const AsmAddress &src);
void andps(Type Ty, XmmRegister dst, XmmRegister src);
- void orps(Type Ty, XmmRegister dst, const Address &src);
+ void orps(Type Ty, XmmRegister dst, const AsmAddress &src);
void orps(Type Ty, XmmRegister dst, XmmRegister src);
void blendvps(Type Ty, XmmRegister dst, XmmRegister src);
- void blendvps(Type Ty, XmmRegister dst, const Address &src);
+ void blendvps(Type Ty, XmmRegister dst, const AsmAddress &src);
void pblendvb(Type Ty, XmmRegister dst, XmmRegister src);
- void pblendvb(Type Ty, XmmRegister dst, const Address &src);
+ void pblendvb(Type Ty, XmmRegister dst, const AsmAddress &src);
void cmpps(Type Ty, XmmRegister dst, XmmRegister src, CmppsCond CmpCondition);
- void cmpps(Type Ty, XmmRegister dst, const Address &src,
+ void cmpps(Type Ty, XmmRegister dst, const AsmAddress &src,
CmppsCond CmpCondition);
void sqrtps(XmmRegister dst);
@@ -421,61 +421,61 @@
void sqrtpd(XmmRegister dst);
void pshufb(Type Ty, XmmRegister dst, XmmRegister src);
- void pshufb(Type Ty, XmmRegister dst, const Address &src);
+ void pshufb(Type Ty, XmmRegister dst, const AsmAddress &src);
void pshufd(Type Ty, XmmRegister dst, XmmRegister src, const Immediate &mask);
- void pshufd(Type Ty, XmmRegister dst, const Address &src,
+ void pshufd(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mask);
void punpckl(Type Ty, XmmRegister Dst, XmmRegister Src);
- void punpckl(Type Ty, XmmRegister Dst, const Address &Src);
+ void punpckl(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void punpckh(Type Ty, XmmRegister Dst, XmmRegister Src);
- void punpckh(Type Ty, XmmRegister Dst, const Address &Src);
+ void punpckh(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void packss(Type Ty, XmmRegister Dst, XmmRegister Src);
- void packss(Type Ty, XmmRegister Dst, const Address &Src);
+ void packss(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void packus(Type Ty, XmmRegister Dst, XmmRegister Src);
- void packus(Type Ty, XmmRegister Dst, const Address &Src);
+ void packus(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void shufps(Type Ty, XmmRegister dst, XmmRegister src, const Immediate &mask);
- void shufps(Type Ty, XmmRegister dst, const Address &src,
+ void shufps(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mask);
void cvtdq2ps(Type, XmmRegister dst, XmmRegister src);
- void cvtdq2ps(Type, XmmRegister dst, const Address &src);
+ void cvtdq2ps(Type, XmmRegister dst, const AsmAddress &src);
void cvttps2dq(Type, XmmRegister dst, XmmRegister src);
- void cvttps2dq(Type, XmmRegister dst, const Address &src);
+ void cvttps2dq(Type, XmmRegister dst, const AsmAddress &src);
void cvtps2dq(Type, XmmRegister dst, XmmRegister src);
- void cvtps2dq(Type, XmmRegister dst, const Address &src);
+ void cvtps2dq(Type, XmmRegister dst, const AsmAddress &src);
void cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy, GPRRegister src);
- void cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy, const Address &src);
+ void cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy, const AsmAddress &src);
void cvtfloat2float(Type SrcTy, XmmRegister dst, XmmRegister src);
- void cvtfloat2float(Type SrcTy, XmmRegister dst, const Address &src);
+ void cvtfloat2float(Type SrcTy, XmmRegister dst, const AsmAddress &src);
void cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy, XmmRegister src);
- void cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy, const Address &src);
+ void cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy, const AsmAddress &src);
void cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy, XmmRegister src);
- void cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy, const Address &src);
+ void cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy, const AsmAddress &src);
void ucomiss(Type Ty, XmmRegister a, XmmRegister b);
- void ucomiss(Type Ty, XmmRegister a, const Address &b);
+ void ucomiss(Type Ty, XmmRegister a, const AsmAddress &b);
void movmsk(Type Ty, GPRRegister dst, XmmRegister src);
- void sqrt(Type Ty, XmmRegister dst, const Address &src);
+ void sqrt(Type Ty, XmmRegister dst, const AsmAddress &src);
void sqrt(Type Ty, XmmRegister dst, XmmRegister src);
- void xorps(Type Ty, XmmRegister dst, const Address &src);
+ void xorps(Type Ty, XmmRegister dst, const AsmAddress &src);
void xorps(Type Ty, XmmRegister dst, XmmRegister src);
void insertps(Type Ty, XmmRegister dst, XmmRegister src,
const Immediate &imm);
- void insertps(Type Ty, XmmRegister dst, const Address &src,
+ void insertps(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm);
void pinsr(Type Ty, XmmRegister dst, GPRRegister src, const Immediate &imm);
- void pinsr(Type Ty, XmmRegister dst, const Address &src,
+ void pinsr(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm);
void pextr(Type Ty, GPRRegister dst, XmmRegister src, const Immediate &imm);
@@ -483,9 +483,9 @@
void pmovsxdq(XmmRegister dst, XmmRegister src);
void pcmpeq(Type Ty, XmmRegister dst, XmmRegister src);
- void pcmpeq(Type Ty, XmmRegister dst, const Address &src);
+ void pcmpeq(Type Ty, XmmRegister dst, const AsmAddress &src);
void pcmpgt(Type Ty, XmmRegister dst, XmmRegister src);
- void pcmpgt(Type Ty, XmmRegister dst, const Address &src);
+ void pcmpgt(Type Ty, XmmRegister dst, const AsmAddress &src);
enum RoundingMode {
kRoundToNearest = 0x0,
@@ -494,7 +494,7 @@
kRoundToZero = 0x3
};
void round(Type Ty, XmmRegister dst, XmmRegister src, const Immediate &mode);
- void round(Type Ty, XmmRegister dst, const Address &src,
+ void round(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mode);
//----------------------------------------------------------------------------
@@ -502,17 +502,17 @@
// Begin: X87 instructions.
//
//----------------------------------------------------------------------------
- void fld(Type Ty, const Address &src);
- void fstp(Type Ty, const Address &dst);
+ void fld(Type Ty, const AsmAddress &src);
+ void fstp(Type Ty, const AsmAddress &dst);
void fstp(RegX8632::X87STRegister st);
- void fnstcw(const Address &dst);
- void fldcw(const Address &src);
+ void fnstcw(const AsmAddress &dst);
+ void fldcw(const AsmAddress &src);
- void fistpl(const Address &dst);
- void fistps(const Address &dst);
- void fildl(const Address &src);
- void filds(const Address &src);
+ void fistpl(const AsmAddress &dst);
+ void fistps(const AsmAddress &dst);
+ void fildl(const AsmAddress &src);
+ void filds(const AsmAddress &src);
void fincstp();
//----------------------------------------------------------------------------
@@ -522,119 +522,119 @@
//----------------------------------------------------------------------------
void cmp(Type Ty, GPRRegister reg0, GPRRegister reg1);
- void cmp(Type Ty, GPRRegister reg, const Address &address);
+ void cmp(Type Ty, GPRRegister reg, const AsmAddress &address);
void cmp(Type Ty, GPRRegister reg, const Immediate &imm);
- void cmp(Type Ty, const Address &address, GPRRegister reg);
- void cmp(Type Ty, const Address &address, const Immediate &imm);
+ void cmp(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void cmp(Type Ty, const AsmAddress &address, const Immediate &imm);
void test(Type Ty, GPRRegister reg0, GPRRegister reg1);
void test(Type Ty, GPRRegister reg, const Immediate &imm);
- void test(Type Ty, const Address &address, GPRRegister reg);
- void test(Type Ty, const Address &address, const Immediate &imm);
+ void test(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void test(Type Ty, const AsmAddress &address, const Immediate &imm);
void And(Type Ty, GPRRegister dst, GPRRegister src);
- void And(Type Ty, GPRRegister dst, const Address &address);
+ void And(Type Ty, GPRRegister dst, const AsmAddress &address);
void And(Type Ty, GPRRegister dst, const Immediate &imm);
- void And(Type Ty, const Address &address, GPRRegister reg);
- void And(Type Ty, const Address &address, const Immediate &imm);
+ void And(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void And(Type Ty, const AsmAddress &address, const Immediate &imm);
void Or(Type Ty, GPRRegister dst, GPRRegister src);
- void Or(Type Ty, GPRRegister dst, const Address &address);
+ void Or(Type Ty, GPRRegister dst, const AsmAddress &address);
void Or(Type Ty, GPRRegister dst, const Immediate &imm);
- void Or(Type Ty, const Address &address, GPRRegister reg);
- void Or(Type Ty, const Address &address, const Immediate &imm);
+ void Or(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void Or(Type Ty, const AsmAddress &address, const Immediate &imm);
void Xor(Type Ty, GPRRegister dst, GPRRegister src);
- void Xor(Type Ty, GPRRegister dst, const Address &address);
+ void Xor(Type Ty, GPRRegister dst, const AsmAddress &address);
void Xor(Type Ty, GPRRegister dst, const Immediate &imm);
- void Xor(Type Ty, const Address &address, GPRRegister reg);
- void Xor(Type Ty, const Address &address, const Immediate &imm);
+ void Xor(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void Xor(Type Ty, const AsmAddress &address, const Immediate &imm);
void add(Type Ty, GPRRegister dst, GPRRegister src);
- void add(Type Ty, GPRRegister reg, const Address &address);
+ void add(Type Ty, GPRRegister reg, const AsmAddress &address);
void add(Type Ty, GPRRegister reg, const Immediate &imm);
- void add(Type Ty, const Address &address, GPRRegister reg);
- void add(Type Ty, const Address &address, const Immediate &imm);
+ void add(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void add(Type Ty, const AsmAddress &address, const Immediate &imm);
void adc(Type Ty, GPRRegister dst, GPRRegister src);
- void adc(Type Ty, GPRRegister dst, const Address &address);
+ void adc(Type Ty, GPRRegister dst, const AsmAddress &address);
void adc(Type Ty, GPRRegister reg, const Immediate &imm);
- void adc(Type Ty, const Address &address, GPRRegister reg);
- void adc(Type Ty, const Address &address, const Immediate &imm);
+ void adc(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void adc(Type Ty, const AsmAddress &address, const Immediate &imm);
void sub(Type Ty, GPRRegister dst, GPRRegister src);
- void sub(Type Ty, GPRRegister reg, const Address &address);
+ void sub(Type Ty, GPRRegister reg, const AsmAddress &address);
void sub(Type Ty, GPRRegister reg, const Immediate &imm);
- void sub(Type Ty, const Address &address, GPRRegister reg);
- void sub(Type Ty, const Address &address, const Immediate &imm);
+ void sub(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void sub(Type Ty, const AsmAddress &address, const Immediate &imm);
void sbb(Type Ty, GPRRegister dst, GPRRegister src);
- void sbb(Type Ty, GPRRegister reg, const Address &address);
+ void sbb(Type Ty, GPRRegister reg, const AsmAddress &address);
void sbb(Type Ty, GPRRegister reg, const Immediate &imm);
- void sbb(Type Ty, const Address &address, GPRRegister reg);
- void sbb(Type Ty, const Address &address, const Immediate &imm);
+ void sbb(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void sbb(Type Ty, const AsmAddress &address, const Immediate &imm);
void cbw();
void cwd();
void cdq();
void div(Type Ty, GPRRegister reg);
- void div(Type Ty, const Address &address);
+ void div(Type Ty, const AsmAddress &address);
void idiv(Type Ty, GPRRegister reg);
- void idiv(Type Ty, const Address &address);
+ void idiv(Type Ty, const AsmAddress &address);
void imul(Type Ty, GPRRegister dst, GPRRegister src);
void imul(Type Ty, GPRRegister reg, const Immediate &imm);
- void imul(Type Ty, GPRRegister reg, const Address &address);
+ void imul(Type Ty, GPRRegister reg, const AsmAddress &address);
void imul(Type Ty, GPRRegister reg);
- void imul(Type Ty, const Address &address);
+ void imul(Type Ty, const AsmAddress &address);
void imul(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm);
- void imul(Type Ty, GPRRegister dst, const Address &address,
+ void imul(Type Ty, GPRRegister dst, const AsmAddress &address,
const Immediate &imm);
void mul(Type Ty, GPRRegister reg);
- void mul(Type Ty, const Address &address);
+ void mul(Type Ty, const AsmAddress &address);
void incl(GPRRegister reg);
- void incl(const Address &address);
+ void incl(const AsmAddress &address);
void decl(GPRRegister reg);
- void decl(const Address &address);
+ void decl(const AsmAddress &address);
void rol(Type Ty, GPRRegister reg, const Immediate &imm);
void rol(Type Ty, GPRRegister operand, GPRRegister shifter);
- void rol(Type Ty, const Address &operand, GPRRegister shifter);
+ void rol(Type Ty, const AsmAddress &operand, GPRRegister shifter);
void shl(Type Ty, GPRRegister reg, const Immediate &imm);
void shl(Type Ty, GPRRegister operand, GPRRegister shifter);
- void shl(Type Ty, const Address &operand, GPRRegister shifter);
+ void shl(Type Ty, const AsmAddress &operand, GPRRegister shifter);
void shr(Type Ty, GPRRegister reg, const Immediate &imm);
void shr(Type Ty, GPRRegister operand, GPRRegister shifter);
- void shr(Type Ty, const Address &operand, GPRRegister shifter);
+ void shr(Type Ty, const AsmAddress &operand, GPRRegister shifter);
void sar(Type Ty, GPRRegister reg, const Immediate &imm);
void sar(Type Ty, GPRRegister operand, GPRRegister shifter);
- void sar(Type Ty, const Address &address, GPRRegister shifter);
+ void sar(Type Ty, const AsmAddress &address, GPRRegister shifter);
void shld(Type Ty, GPRRegister dst, GPRRegister src);
void shld(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm);
- void shld(Type Ty, const Address &operand, GPRRegister src);
+ void shld(Type Ty, const AsmAddress &operand, GPRRegister src);
void shrd(Type Ty, GPRRegister dst, GPRRegister src);
void shrd(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm);
- void shrd(Type Ty, const Address &dst, GPRRegister src);
+ void shrd(Type Ty, const AsmAddress &dst, GPRRegister src);
void neg(Type Ty, GPRRegister reg);
- void neg(Type Ty, const Address &addr);
+ void neg(Type Ty, const AsmAddress &addr);
void notl(GPRRegister reg);
void bsf(Type Ty, GPRRegister dst, GPRRegister src);
- void bsf(Type Ty, GPRRegister dst, const Address &src);
+ void bsf(Type Ty, GPRRegister dst, const AsmAddress &src);
void bsr(Type Ty, GPRRegister dst, GPRRegister src);
- void bsr(Type Ty, GPRRegister dst, const Address &src);
+ void bsr(Type Ty, GPRRegister dst, const AsmAddress &src);
void bswap(Type Ty, GPRRegister reg);
@@ -661,11 +661,11 @@
void mfence();
void lock();
- void cmpxchg(Type Ty, const Address &address, GPRRegister reg, bool Locked);
- void cmpxchg8b(const Address &address, bool Locked);
- void xadd(Type Ty, const Address &address, GPRRegister reg, bool Locked);
+ void cmpxchg(Type Ty, const AsmAddress &address, GPRRegister reg, bool Locked);
+ void cmpxchg8b(const AsmAddress &address, bool Locked);
+ void xadd(Type Ty, const AsmAddress &address, GPRRegister reg, bool Locked);
void xchg(Type Ty, GPRRegister reg0, GPRRegister reg1);
- void xchg(Type Ty, const Address &address, GPRRegister reg);
+ void xchg(Type Ty, const AsmAddress &address, GPRRegister reg);
/// \name Intel Architecture Code Analyzer markers.
/// @{
@@ -731,13 +731,13 @@
void arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1);
template <uint32_t Tag>
- void arith_int(Type Ty, GPRRegister reg, const Address &address);
+ void arith_int(Type Ty, GPRRegister reg, const AsmAddress &address);
template <uint32_t Tag>
- void arith_int(Type Ty, const Address &address, GPRRegister reg);
+ void arith_int(Type Ty, const AsmAddress &address, GPRRegister reg);
template <uint32_t Tag>
- void arith_int(Type Ty, const Address &address, const Immediate &imm);
+ void arith_int(Type Ty, const AsmAddress &address, const Immediate &imm);
// gprEncoding returns Reg encoding for operand emission.
template <typename RegType, typename T = Traits>
diff --git a/third_party/subzero/src/IceAssemblerX8664.cpp b/third_party/subzero/src/IceAssemblerX8664.cpp
index 111cf4a..f730760 100644
--- a/third_party/subzero/src/IceAssemblerX8664.cpp
+++ b/third_party/subzero/src/IceAssemblerX8664.cpp
@@ -102,7 +102,7 @@
emitRegisterOperand(2, gprEncoding(reg));
}
-void AssemblerX8664::call(const Address &address) {
+void AssemblerX8664::call(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
emitUint8(0xFF);
@@ -164,7 +164,7 @@
emitUint8(0x58 + gprEncoding(reg));
}
-void AssemblerX8664::popl(const Address &address) {
+void AssemblerX8664::popl(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
emitUint8(0x8F);
@@ -179,7 +179,7 @@
emitUint8(0xC0 + gprEncoding(dst));
}
-void AssemblerX8664::setcc(BrCond condition, const Address &address) {
+void AssemblerX8664::setcc(BrCond condition, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, address, RexRegIrrelevant);
emitUint8(0x0F);
@@ -217,7 +217,7 @@
emitRegisterOperand(gprEncoding(src), gprEncoding(dst));
}
-void AssemblerX8664::mov(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8664::mov(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -230,7 +230,7 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8664::mov(Type Ty, const Address &dst, GPRRegister src) {
+void AssemblerX8664::mov(Type Ty, const AsmAddress &dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -243,7 +243,7 @@
emitOperand(gprEncoding(src), dst);
}
-void AssemblerX8664::mov(Type Ty, const Address &dst, const Immediate &imm) {
+void AssemblerX8664::mov(Type Ty, const AsmAddress &dst, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -292,7 +292,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8664::movzx(Type SrcTy, GPRRegister dst, const Address &src) {
+void AssemblerX8664::movzx(Type SrcTy, GPRRegister dst, const AsmAddress &src) {
if (SrcTy == IceType_i32) {
// 32-bit mov clears the upper 32 bits, hence zero-extending the 32-bit
// operand to 64-bit.
@@ -323,7 +323,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8664::movsx(Type SrcTy, GPRRegister dst, const Address &src) {
+void AssemblerX8664::movsx(Type SrcTy, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
bool ByteSized = isByteSizedType(SrcTy);
emitRex(SrcTy, src, RexTypeForceRexW, dst);
@@ -337,7 +337,7 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8664::lea(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8664::lea(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32 || Ty == IceType_i64);
if (Ty == IceType_i16)
@@ -361,7 +361,7 @@
}
void AssemblerX8664::cmov(Type Ty, BrCond cond, GPRRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -379,7 +379,7 @@
emitUint8(0xA4);
}
-void AssemblerX8664::movss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::movss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -388,7 +388,7 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8664::movss(Type Ty, const Address &dst, XmmRegister src) {
+void AssemblerX8664::movss(Type Ty, const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, dst, src);
@@ -415,7 +415,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8664::movd(Type SrcTy, XmmRegister dst, const Address &src) {
+void AssemblerX8664::movd(Type SrcTy, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(SrcTy, src, dst);
@@ -433,7 +433,7 @@
emitRegisterOperand(gprEncoding(src), gprEncoding(dst));
}
-void AssemblerX8664::movd(Type DestTy, const Address &dst, XmmRegister src) {
+void AssemblerX8664::movd(Type DestTy, const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(DestTy, dst, src);
@@ -451,7 +451,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::movq(const Address &dst, XmmRegister src) {
+void AssemblerX8664::movq(const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, dst, src);
@@ -460,7 +460,7 @@
emitOperand(gprEncoding(src), dst);
}
-void AssemblerX8664::movq(XmmRegister dst, const Address &src) {
+void AssemblerX8664::movq(XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xF3);
emitRex(RexTypeIrrelevant, src, dst);
@@ -478,7 +478,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::addss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::addss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -496,7 +496,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::subss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::subss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -514,7 +514,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::mulss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::mulss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -532,7 +532,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::divss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::divss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -557,7 +557,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::movups(XmmRegister dst, const Address &src) {
+void AssemblerX8664::movups(XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
@@ -565,7 +565,7 @@
emitOperand(gprEncoding(dst), src);
}
-void AssemblerX8664::movups(const Address &dst, XmmRegister src) {
+void AssemblerX8664::movups(const AsmAddress &dst, XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
@@ -588,7 +588,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::padd(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::padd(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -618,7 +618,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::padds(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::padds(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -648,7 +648,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::paddus(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::paddus(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -672,7 +672,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pand(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pand(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -690,7 +690,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pandn(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pandn(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -714,7 +714,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pmull(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pmull(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -740,7 +740,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pmulhw(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pmulhw(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -762,7 +762,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pmulhuw(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pmulhuw(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -784,7 +784,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pmaddwd(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pmaddwd(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -805,7 +805,7 @@
}
void AssemblerX8664::pmuludq(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -823,7 +823,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::por(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::por(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -847,7 +847,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::psub(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::psub(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -877,7 +877,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::psubs(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::psubs(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -907,7 +907,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::psubus(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::psubus(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -931,7 +931,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pxor(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pxor(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -954,7 +954,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::psll(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::psll(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -998,7 +998,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::psra(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::psra(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1044,7 +1044,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::psrl(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::psrl(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1090,7 +1090,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::addps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::addps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
@@ -1106,7 +1106,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::subps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::subps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
@@ -1122,7 +1122,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::divps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::divps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
@@ -1138,7 +1138,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::mulps(Type /* Ty */, XmmRegister dst, const Address &src) {
+void AssemblerX8664::mulps(Type /* Ty */, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
@@ -1156,7 +1156,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::minps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::minps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1175,7 +1175,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::minss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::minss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1194,7 +1194,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::maxps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::maxps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1213,7 +1213,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::maxss(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::maxss(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1232,7 +1232,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::andnps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::andnps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1252,7 +1252,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::andps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::andps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1272,7 +1272,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::orps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::orps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1293,7 +1293,7 @@
}
void AssemblerX8664::blendvps(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1314,7 +1314,7 @@
}
void AssemblerX8664::pblendvb(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1336,7 +1336,7 @@
emitUint8(CmpCondition);
}
-void AssemblerX8664::cmpps(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8664::cmpps(Type Ty, XmmRegister dst, const AsmAddress &src,
CmppsCond CmpCondition) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_f64)
@@ -1444,7 +1444,7 @@
}
void AssemblerX8664::pshufb(Type /* Ty */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1466,7 +1466,7 @@
emitUint8(imm.value());
}
-void AssemblerX8664::pshufd(Type /* Ty */, XmmRegister dst, const Address &src,
+void AssemblerX8664::pshufd(Type /* Ty */, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
@@ -1496,7 +1496,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8664::punpckl(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8664::punpckl(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, Src, Dst);
@@ -1530,7 +1530,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8664::punpckh(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8664::punpckh(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, Src, Dst);
@@ -1562,7 +1562,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8664::packss(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8664::packss(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, Src, Dst);
@@ -1593,7 +1593,7 @@
emitXmmRegisterOperand(Dst, Src);
}
-void AssemblerX8664::packus(Type Ty, XmmRegister Dst, const Address &Src) {
+void AssemblerX8664::packus(Type Ty, XmmRegister Dst, const AsmAddress &Src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, Src, Dst);
@@ -1620,7 +1620,7 @@
emitUint8(imm.value());
}
-void AssemblerX8664::shufps(Type /* Ty */, XmmRegister dst, const Address &src,
+void AssemblerX8664::shufps(Type /* Ty */, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1651,7 +1651,7 @@
}
void AssemblerX8664::cvtdq2ps(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
@@ -1670,7 +1670,7 @@
}
void AssemblerX8664::cvttps2dq(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0xF3);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1690,7 +1690,7 @@
}
void AssemblerX8664::cvtps2dq(Type /* Ignore */, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1710,7 +1710,7 @@
}
void AssemblerX8664::cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(DestTy) ? 0xF3 : 0xF2);
emitRex(SrcTy, src, dst);
@@ -1731,7 +1731,7 @@
}
void AssemblerX8664::cvtfloat2float(Type SrcTy, XmmRegister dst,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
emitRex(RexTypeIrrelevant, src, dst);
@@ -1751,7 +1751,7 @@
}
void AssemblerX8664::cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
emitRex(DestTy, src, dst);
@@ -1771,7 +1771,7 @@
}
void AssemblerX8664::cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy,
- const Address &src) {
+ const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(isFloat32Asserting32Or64(SrcTy) ? 0xF3 : 0xF2);
emitRex(DestTy, src, dst);
@@ -1790,7 +1790,7 @@
emitXmmRegisterOperand(a, b);
}
-void AssemblerX8664::ucomiss(Type Ty, XmmRegister a, const Address &b) {
+void AssemblerX8664::ucomiss(Type Ty, XmmRegister a, const AsmAddress &b) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_f64)
emitUint8(0x66);
@@ -1821,7 +1821,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::sqrt(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::sqrt(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (isScalarFloatingType(Ty))
emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
@@ -1841,7 +1841,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::xorps(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::xorps(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (!isFloat32Asserting32Or64(Ty))
emitUint8(0x66);
@@ -1876,7 +1876,7 @@
emitUint8(imm.value());
}
-void AssemblerX8664::insertps(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8664::insertps(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(imm.is_uint8());
@@ -1909,7 +1909,7 @@
emitUint8(imm.value());
}
-void AssemblerX8664::pinsr(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8664::pinsr(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(imm.is_uint8());
@@ -1976,7 +1976,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pcmpeq(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pcmpeq(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -2006,7 +2006,7 @@
emitXmmRegisterOperand(dst, src);
}
-void AssemblerX8664::pcmpgt(Type Ty, XmmRegister dst, const Address &src) {
+void AssemblerX8664::pcmpgt(Type Ty, XmmRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
@@ -2046,7 +2046,7 @@
emitUint8(static_cast<uint8_t>(mode.value()) | 0x8);
}
-void AssemblerX8664::round(Type Ty, XmmRegister dst, const Address &src,
+void AssemblerX8664::round(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mode) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
@@ -2101,7 +2101,7 @@
template <uint32_t Tag>
void AssemblerX8664::arith_int(Type Ty, GPRRegister reg,
- const Address &address) {
+ const AsmAddress &address) {
static_assert(Tag < 8, "Tag must be between 0..7");
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
@@ -2115,7 +2115,7 @@
}
template <uint32_t Tag>
-void AssemblerX8664::arith_int(Type Ty, const Address &address,
+void AssemblerX8664::arith_int(Type Ty, const AsmAddress &address,
GPRRegister reg) {
static_assert(Tag < 8, "Tag must be between 0..7");
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ -2130,7 +2130,7 @@
}
template <uint32_t Tag>
-void AssemblerX8664::arith_int(Type Ty, const Address &address,
+void AssemblerX8664::arith_int(Type Ty, const AsmAddress &address,
const Immediate &imm) {
static_assert(Tag < 8, "Tag must be between 0..7");
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
@@ -2152,15 +2152,15 @@
arith_int<7>(Ty, reg0, reg1);
}
-void AssemblerX8664::cmp(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8664::cmp(Type Ty, GPRRegister reg, const AsmAddress &address) {
arith_int<7>(Ty, reg, address);
}
-void AssemblerX8664::cmp(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::cmp(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<7>(Ty, address, reg);
}
-void AssemblerX8664::cmp(Type Ty, const Address &address,
+void AssemblerX8664::cmp(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<7>(Ty, address, imm);
}
@@ -2177,7 +2177,7 @@
emitRegisterOperand(gprEncoding(reg1), gprEncoding(reg2));
}
-void AssemblerX8664::test(Type Ty, const Address &addr, GPRRegister reg) {
+void AssemblerX8664::test(Type Ty, const AsmAddress &addr, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2223,7 +2223,7 @@
}
}
-void AssemblerX8664::test(Type Ty, const Address &addr,
+void AssemblerX8664::test(Type Ty, const AsmAddress &addr,
const Immediate &immediate) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
// If the immediate is short, we only test the byte addr to keep the encoding
@@ -2250,7 +2250,7 @@
arith_int<4>(Ty, dst, src);
}
-void AssemblerX8664::And(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8664::And(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<4>(Ty, dst, address);
}
@@ -2258,11 +2258,11 @@
arith_int<4>(Ty, dst, imm);
}
-void AssemblerX8664::And(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::And(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<4>(Ty, address, reg);
}
-void AssemblerX8664::And(Type Ty, const Address &address,
+void AssemblerX8664::And(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<4>(Ty, address, imm);
}
@@ -2271,7 +2271,7 @@
arith_int<1>(Ty, dst, src);
}
-void AssemblerX8664::Or(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8664::Or(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<1>(Ty, dst, address);
}
@@ -2279,11 +2279,11 @@
arith_int<1>(Ty, dst, imm);
}
-void AssemblerX8664::Or(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::Or(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<1>(Ty, address, reg);
}
-void AssemblerX8664::Or(Type Ty, const Address &address, const Immediate &imm) {
+void AssemblerX8664::Or(Type Ty, const AsmAddress &address, const Immediate &imm) {
arith_int<1>(Ty, address, imm);
}
@@ -2291,7 +2291,7 @@
arith_int<6>(Ty, dst, src);
}
-void AssemblerX8664::Xor(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8664::Xor(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<6>(Ty, dst, address);
}
@@ -2299,11 +2299,11 @@
arith_int<6>(Ty, dst, imm);
}
-void AssemblerX8664::Xor(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::Xor(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<6>(Ty, address, reg);
}
-void AssemblerX8664::Xor(Type Ty, const Address &address,
+void AssemblerX8664::Xor(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<6>(Ty, address, imm);
}
@@ -2312,7 +2312,7 @@
arith_int<0>(Ty, dst, src);
}
-void AssemblerX8664::add(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8664::add(Type Ty, GPRRegister reg, const AsmAddress &address) {
arith_int<0>(Ty, reg, address);
}
@@ -2320,11 +2320,11 @@
arith_int<0>(Ty, reg, imm);
}
-void AssemblerX8664::add(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::add(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<0>(Ty, address, reg);
}
-void AssemblerX8664::add(Type Ty, const Address &address,
+void AssemblerX8664::add(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<0>(Ty, address, imm);
}
@@ -2333,7 +2333,7 @@
arith_int<2>(Ty, dst, src);
}
-void AssemblerX8664::adc(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8664::adc(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<2>(Ty, dst, address);
}
@@ -2341,11 +2341,11 @@
arith_int<2>(Ty, reg, imm);
}
-void AssemblerX8664::adc(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::adc(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<2>(Ty, address, reg);
}
-void AssemblerX8664::adc(Type Ty, const Address &address,
+void AssemblerX8664::adc(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<2>(Ty, address, imm);
}
@@ -2354,7 +2354,7 @@
arith_int<5>(Ty, dst, src);
}
-void AssemblerX8664::sub(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8664::sub(Type Ty, GPRRegister reg, const AsmAddress &address) {
arith_int<5>(Ty, reg, address);
}
@@ -2362,11 +2362,11 @@
arith_int<5>(Ty, reg, imm);
}
-void AssemblerX8664::sub(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::sub(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<5>(Ty, address, reg);
}
-void AssemblerX8664::sub(Type Ty, const Address &address,
+void AssemblerX8664::sub(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<5>(Ty, address, imm);
}
@@ -2375,7 +2375,7 @@
arith_int<3>(Ty, dst, src);
}
-void AssemblerX8664::sbb(Type Ty, GPRRegister dst, const Address &address) {
+void AssemblerX8664::sbb(Type Ty, GPRRegister dst, const AsmAddress &address) {
arith_int<3>(Ty, dst, address);
}
@@ -2383,11 +2383,11 @@
arith_int<3>(Ty, reg, imm);
}
-void AssemblerX8664::sbb(Type Ty, const Address &address, GPRRegister reg) {
+void AssemblerX8664::sbb(Type Ty, const AsmAddress &address, GPRRegister reg) {
arith_int<3>(Ty, address, reg);
}
-void AssemblerX8664::sbb(Type Ty, const Address &address,
+void AssemblerX8664::sbb(Type Ty, const AsmAddress &address,
const Immediate &imm) {
arith_int<3>(Ty, address, imm);
}
@@ -2427,7 +2427,7 @@
emitRegisterOperand(6, gprEncoding(reg));
}
-void AssemblerX8664::div(Type Ty, const Address &addr) {
+void AssemblerX8664::div(Type Ty, const AsmAddress &addr) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2451,7 +2451,7 @@
emitRegisterOperand(7, gprEncoding(reg));
}
-void AssemblerX8664::idiv(Type Ty, const Address &addr) {
+void AssemblerX8664::idiv(Type Ty, const AsmAddress &addr) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2474,7 +2474,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8664::imul(Type Ty, GPRRegister reg, const Address &address) {
+void AssemblerX8664::imul(Type Ty, GPRRegister reg, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32 || Ty == IceType_i64);
if (Ty == IceType_i16)
@@ -2514,7 +2514,7 @@
emitRegisterOperand(5, gprEncoding(reg));
}
-void AssemblerX8664::imul(Type Ty, const Address &address) {
+void AssemblerX8664::imul(Type Ty, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2544,7 +2544,7 @@
}
}
-void AssemblerX8664::imul(Type Ty, GPRRegister dst, const Address &address,
+void AssemblerX8664::imul(Type Ty, GPRRegister dst, const AsmAddress &address,
const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
@@ -2576,7 +2576,7 @@
emitRegisterOperand(4, gprEncoding(reg));
}
-void AssemblerX8664::mul(Type Ty, const Address &address) {
+void AssemblerX8664::mul(Type Ty, const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2588,14 +2588,14 @@
emitOperand(4, address);
}
-void AssemblerX8664::incl(const Address &address) {
+void AssemblerX8664::incl(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(IceType_i32, address, RexRegIrrelevant);
emitUint8(0xFF);
emitOperand(0, address);
}
-void AssemblerX8664::decl(const Address &address) {
+void AssemblerX8664::decl(const AsmAddress &address) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitRex(IceType_i32, address, RexRegIrrelevant);
emitUint8(0xFF);
@@ -2610,7 +2610,7 @@
emitGenericShift(0, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8664::rol(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8664::rol(Type Ty, const AsmAddress &operand, GPRRegister shifter) {
emitGenericShift(0, Ty, operand, shifter);
}
@@ -2622,7 +2622,7 @@
emitGenericShift(4, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8664::shl(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8664::shl(Type Ty, const AsmAddress &operand, GPRRegister shifter) {
emitGenericShift(4, Ty, operand, shifter);
}
@@ -2634,7 +2634,7 @@
emitGenericShift(5, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8664::shr(Type Ty, const Address &operand, GPRRegister shifter) {
+void AssemblerX8664::shr(Type Ty, const AsmAddress &operand, GPRRegister shifter) {
emitGenericShift(5, Ty, operand, shifter);
}
@@ -2646,7 +2646,7 @@
emitGenericShift(7, Ty, AsmOperand(operand), shifter);
}
-void AssemblerX8664::sar(Type Ty, const Address &address, GPRRegister shifter) {
+void AssemblerX8664::sar(Type Ty, const AsmAddress &address, GPRRegister shifter) {
emitGenericShift(7, Ty, address, shifter);
}
@@ -2675,7 +2675,7 @@
emitUint8(imm.value() & 0xFF);
}
-void AssemblerX8664::shld(Type Ty, const Address &operand, GPRRegister src) {
+void AssemblerX8664::shld(Type Ty, const AsmAddress &operand, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2711,7 +2711,7 @@
emitUint8(imm.value() & 0xFF);
}
-void AssemblerX8664::shrd(Type Ty, const Address &dst, GPRRegister src) {
+void AssemblerX8664::shrd(Type Ty, const AsmAddress &dst, GPRRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32);
if (Ty == IceType_i16)
@@ -2734,7 +2734,7 @@
emitRegisterOperand(3, gprEncoding(reg));
}
-void AssemblerX8664::neg(Type Ty, const Address &addr) {
+void AssemblerX8664::neg(Type Ty, const AsmAddress &addr) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
@@ -2772,7 +2772,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8664::bsf(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8664::bsf(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32 || Ty == IceType_i64);
if (Ty == IceType_i16)
@@ -2794,7 +2794,7 @@
emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
}
-void AssemblerX8664::bsr(Type Ty, GPRRegister dst, const Address &src) {
+void AssemblerX8664::bsr(Type Ty, GPRRegister dst, const AsmAddress &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
assert(Ty == IceType_i16 || Ty == IceType_i32 || Ty == IceType_i64);
if (Ty == IceType_i16)
@@ -3001,7 +3001,7 @@
emitUint8(0xF0);
}
-void AssemblerX8664::cmpxchg(Type Ty, const Address &address, GPRRegister reg,
+void AssemblerX8664::cmpxchg(Type Ty, const AsmAddress &address, GPRRegister reg,
bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
@@ -3017,7 +3017,7 @@
emitOperand(gprEncoding(reg), address);
}
-void AssemblerX8664::cmpxchg8b(const Address &address, bool Locked) {
+void AssemblerX8664::cmpxchg8b(const AsmAddress &address, bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Locked)
emitUint8(0xF0);
@@ -3027,7 +3027,7 @@
emitOperand(1, address);
}
-void AssemblerX8664::xadd(Type Ty, const Address &addr, GPRRegister reg,
+void AssemblerX8664::xadd(Type Ty, const AsmAddress &addr, GPRRegister reg,
bool Locked) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
@@ -3064,7 +3064,7 @@
}
}
-void AssemblerX8664::xchg(Type Ty, const Address &addr, GPRRegister reg) {
+void AssemblerX8664::xchg(Type Ty, const AsmAddress &addr, GPRRegister reg) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
if (Ty == IceType_i16)
emitOperandSizeOverride();
diff --git a/third_party/subzero/src/IceAssemblerX8664.h b/third_party/subzero/src/IceAssemblerX8664.h
index f4e7446..22f8292 100644
--- a/third_party/subzero/src/IceAssemblerX8664.h
+++ b/third_party/subzero/src/IceAssemblerX8664.h
@@ -43,7 +43,7 @@
public:
using Traits = TargetX8664Traits;
- using Address = typename Traits::Address;
+ using AsmAddress = typename Traits::AsmAddress;
using ByteRegister = typename Traits::ByteRegister;
using BrCond = CondX86::BrCond;
using CmppsCond = CondX86::CmppsCond;
@@ -167,7 +167,7 @@
// Operations to emit GPR instructions (and dispatch on operand type).
using TypedEmitGPR = void (AssemblerX8664::*)(Type, GPRRegister);
- using TypedEmitAddr = void (AssemblerX8664::*)(Type, const Address &);
+ using TypedEmitAddr = void (AssemblerX8664::*)(Type, const AsmAddress &);
struct GPREmitterOneOp {
TypedEmitGPR Reg;
TypedEmitAddr Addr;
@@ -176,7 +176,7 @@
using TypedEmitGPRGPR = void (AssemblerX8664::*)(Type, GPRRegister,
GPRRegister);
using TypedEmitGPRAddr = void (AssemblerX8664::*)(Type, GPRRegister,
- const Address &);
+ const AsmAddress &);
using TypedEmitGPRImm = void (AssemblerX8664::*)(Type, GPRRegister,
const Immediate &);
struct GPREmitterRegOp {
@@ -202,9 +202,9 @@
TypedEmitGPRGPRImm GPRGPRImm;
};
- using TypedEmitAddrGPR = void (AssemblerX8664::*)(Type, const Address &,
+ using TypedEmitAddrGPR = void (AssemblerX8664::*)(Type, const AsmAddress &,
GPRRegister);
- using TypedEmitAddrImm = void (AssemblerX8664::*)(Type, const Address &,
+ using TypedEmitAddrImm = void (AssemblerX8664::*)(Type, const AsmAddress &,
const Immediate &);
struct GPREmitterAddrOp {
TypedEmitAddrGPR AddrGPR;
@@ -215,15 +215,15 @@
using TypedEmitXmmXmm = void (AssemblerX8664::*)(Type, XmmRegister,
XmmRegister);
using TypedEmitXmmAddr = void (AssemblerX8664::*)(Type, XmmRegister,
- const Address &);
+ const AsmAddress &);
struct XmmEmitterRegOp {
TypedEmitXmmXmm XmmXmm;
TypedEmitXmmAddr XmmAddr;
};
using EmitXmmXmm = void (AssemblerX8664::*)(XmmRegister, XmmRegister);
- using EmitXmmAddr = void (AssemblerX8664::*)(XmmRegister, const Address &);
- using EmitAddrXmm = void (AssemblerX8664::*)(const Address &, XmmRegister);
+ using EmitXmmAddr = void (AssemblerX8664::*)(XmmRegister, const AsmAddress &);
+ using EmitAddrXmm = void (AssemblerX8664::*)(const AsmAddress &, XmmRegister);
struct XmmEmitterMovOps {
EmitXmmXmm XmmXmm;
EmitXmmAddr XmmAddr;
@@ -243,7 +243,7 @@
template <typename DReg_t, typename SReg_t> struct CastEmitterRegOp {
using TypedEmitRegs = void (AssemblerX8664::*)(Type, DReg_t, Type, SReg_t);
using TypedEmitAddr = void (AssemblerX8664::*)(Type, DReg_t, Type,
- const Address &);
+ const AsmAddress &);
TypedEmitRegs RegReg;
TypedEmitAddr RegAddr;
@@ -255,7 +255,7 @@
using TypedEmitRegRegImm = void (AssemblerX8664::*)(Type, DReg_t, SReg_t,
const Immediate &);
using TypedEmitRegAddrImm = void (AssemblerX8664::*)(Type, DReg_t,
- const Address &,
+ const AsmAddress &,
const Immediate &);
TypedEmitRegRegImm RegRegImm;
@@ -266,7 +266,7 @@
* Emit Machine Instructions.
*/
void call(GPRRegister reg);
- void call(const Address &address);
+ void call(const AsmAddress &address);
void call(const ConstantRelocatable *label); // not testable.
void call(const Immediate &abs_address);
@@ -277,131 +277,131 @@
void pushl(const ConstantRelocatable *Label);
void popl(GPRRegister reg);
- void popl(const Address &address);
+ void popl(const AsmAddress &address);
void setcc(BrCond condition, ByteRegister dst);
- void setcc(BrCond condition, const Address &address);
+ void setcc(BrCond condition, const AsmAddress &address);
void mov(Type Ty, GPRRegister dst, const Immediate &src);
void mov(Type Ty, GPRRegister dst, GPRRegister src);
- void mov(Type Ty, GPRRegister dst, const Address &src);
- void mov(Type Ty, const Address &dst, GPRRegister src);
- void mov(Type Ty, const Address &dst, const Immediate &imm);
+ void mov(Type Ty, GPRRegister dst, const AsmAddress &src);
+ void mov(Type Ty, const AsmAddress &dst, GPRRegister src);
+ void mov(Type Ty, const AsmAddress &dst, const Immediate &imm);
void movabs(const GPRRegister Dst, uint64_t Imm64);
void movzx(Type Ty, GPRRegister dst, GPRRegister src);
- void movzx(Type Ty, GPRRegister dst, const Address &src);
+ void movzx(Type Ty, GPRRegister dst, const AsmAddress &src);
void movsx(Type Ty, GPRRegister dst, GPRRegister src);
- void movsx(Type Ty, GPRRegister dst, const Address &src);
+ void movsx(Type Ty, GPRRegister dst, const AsmAddress &src);
- void lea(Type Ty, GPRRegister dst, const Address &src);
+ void lea(Type Ty, GPRRegister dst, const AsmAddress &src);
void cmov(Type Ty, BrCond cond, GPRRegister dst, GPRRegister src);
- void cmov(Type Ty, BrCond cond, GPRRegister dst, const Address &src);
+ void cmov(Type Ty, BrCond cond, GPRRegister dst, const AsmAddress &src);
void rep_movsb();
- void movss(Type Ty, XmmRegister dst, const Address &src);
- void movss(Type Ty, const Address &dst, XmmRegister src);
+ void movss(Type Ty, XmmRegister dst, const AsmAddress &src);
+ void movss(Type Ty, const AsmAddress &dst, XmmRegister src);
void movss(Type Ty, XmmRegister dst, XmmRegister src);
void movd(Type SrcTy, XmmRegister dst, GPRRegister src);
- void movd(Type SrcTy, XmmRegister dst, const Address &src);
+ void movd(Type SrcTy, XmmRegister dst, const AsmAddress &src);
void movd(Type DestTy, GPRRegister dst, XmmRegister src);
- void movd(Type DestTy, const Address &dst, XmmRegister src);
+ void movd(Type DestTy, const AsmAddress &dst, XmmRegister src);
void movq(XmmRegister dst, XmmRegister src);
- void movq(const Address &dst, XmmRegister src);
- void movq(XmmRegister dst, const Address &src);
+ void movq(const AsmAddress &dst, XmmRegister src);
+ void movq(XmmRegister dst, const AsmAddress &src);
void addss(Type Ty, XmmRegister dst, XmmRegister src);
- void addss(Type Ty, XmmRegister dst, const Address &src);
+ void addss(Type Ty, XmmRegister dst, const AsmAddress &src);
void subss(Type Ty, XmmRegister dst, XmmRegister src);
- void subss(Type Ty, XmmRegister dst, const Address &src);
+ void subss(Type Ty, XmmRegister dst, const AsmAddress &src);
void mulss(Type Ty, XmmRegister dst, XmmRegister src);
- void mulss(Type Ty, XmmRegister dst, const Address &src);
+ void mulss(Type Ty, XmmRegister dst, const AsmAddress &src);
void divss(Type Ty, XmmRegister dst, XmmRegister src);
- void divss(Type Ty, XmmRegister dst, const Address &src);
+ void divss(Type Ty, XmmRegister dst, const AsmAddress &src);
void movaps(XmmRegister dst, XmmRegister src);
void movups(XmmRegister dst, XmmRegister src);
- void movups(XmmRegister dst, const Address &src);
- void movups(const Address &dst, XmmRegister src);
+ void movups(XmmRegister dst, const AsmAddress &src);
+ void movups(const AsmAddress &dst, XmmRegister src);
void padd(Type Ty, XmmRegister dst, XmmRegister src);
- void padd(Type Ty, XmmRegister dst, const Address &src);
+ void padd(Type Ty, XmmRegister dst, const AsmAddress &src);
void padds(Type Ty, XmmRegister dst, XmmRegister src);
- void padds(Type Ty, XmmRegister dst, const Address &src);
+ void padds(Type Ty, XmmRegister dst, const AsmAddress &src);
void paddus(Type Ty, XmmRegister dst, XmmRegister src);
- void paddus(Type Ty, XmmRegister dst, const Address &src);
+ void paddus(Type Ty, XmmRegister dst, const AsmAddress &src);
void pand(Type Ty, XmmRegister dst, XmmRegister src);
- void pand(Type Ty, XmmRegister dst, const Address &src);
+ void pand(Type Ty, XmmRegister dst, const AsmAddress &src);
void pandn(Type Ty, XmmRegister dst, XmmRegister src);
- void pandn(Type Ty, XmmRegister dst, const Address &src);
+ void pandn(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmull(Type Ty, XmmRegister dst, XmmRegister src);
- void pmull(Type Ty, XmmRegister dst, const Address &src);
+ void pmull(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmulhw(Type Ty, XmmRegister dst, XmmRegister src);
- void pmulhw(Type Ty, XmmRegister dst, const Address &src);
+ void pmulhw(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmulhuw(Type Ty, XmmRegister dst, XmmRegister src);
- void pmulhuw(Type Ty, XmmRegister dst, const Address &src);
+ void pmulhuw(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmaddwd(Type Ty, XmmRegister dst, XmmRegister src);
- void pmaddwd(Type Ty, XmmRegister dst, const Address &src);
+ void pmaddwd(Type Ty, XmmRegister dst, const AsmAddress &src);
void pmuludq(Type Ty, XmmRegister dst, XmmRegister src);
- void pmuludq(Type Ty, XmmRegister dst, const Address &src);
+ void pmuludq(Type Ty, XmmRegister dst, const AsmAddress &src);
void por(Type Ty, XmmRegister dst, XmmRegister src);
- void por(Type Ty, XmmRegister dst, const Address &src);
+ void por(Type Ty, XmmRegister dst, const AsmAddress &src);
void psub(Type Ty, XmmRegister dst, XmmRegister src);
- void psub(Type Ty, XmmRegister dst, const Address &src);
+ void psub(Type Ty, XmmRegister dst, const AsmAddress &src);
void psubs(Type Ty, XmmRegister dst, XmmRegister src);
- void psubs(Type Ty, XmmRegister dst, const Address &src);
+ void psubs(Type Ty, XmmRegister dst, const AsmAddress &src);
void psubus(Type Ty, XmmRegister dst, XmmRegister src);
- void psubus(Type Ty, XmmRegister dst, const Address &src);
+ void psubus(Type Ty, XmmRegister dst, const AsmAddress &src);
void pxor(Type Ty, XmmRegister dst, XmmRegister src);
- void pxor(Type Ty, XmmRegister dst, const Address &src);
+ void pxor(Type Ty, XmmRegister dst, const AsmAddress &src);
void psll(Type Ty, XmmRegister dst, XmmRegister src);
- void psll(Type Ty, XmmRegister dst, const Address &src);
+ void psll(Type Ty, XmmRegister dst, const AsmAddress &src);
void psll(Type Ty, XmmRegister dst, const Immediate &src);
void psra(Type Ty, XmmRegister dst, XmmRegister src);
- void psra(Type Ty, XmmRegister dst, const Address &src);
+ void psra(Type Ty, XmmRegister dst, const AsmAddress &src);
void psra(Type Ty, XmmRegister dst, const Immediate &src);
void psrl(Type Ty, XmmRegister dst, XmmRegister src);
- void psrl(Type Ty, XmmRegister dst, const Address &src);
+ void psrl(Type Ty, XmmRegister dst, const AsmAddress &src);
void psrl(Type Ty, XmmRegister dst, const Immediate &src);
void addps(Type Ty, XmmRegister dst, XmmRegister src);
- void addps(Type Ty, XmmRegister dst, const Address &src);
+ void addps(Type Ty, XmmRegister dst, const AsmAddress &src);
void subps(Type Ty, XmmRegister dst, XmmRegister src);
- void subps(Type Ty, XmmRegister dst, const Address &src);
+ void subps(Type Ty, XmmRegister dst, const AsmAddress &src);
void divps(Type Ty, XmmRegister dst, XmmRegister src);
- void divps(Type Ty, XmmRegister dst, const Address &src);
+ void divps(Type Ty, XmmRegister dst, const AsmAddress &src);
void mulps(Type Ty, XmmRegister dst, XmmRegister src);
- void mulps(Type Ty, XmmRegister dst, const Address &src);
- void minps(Type Ty, XmmRegister dst, const Address &src);
+ void mulps(Type Ty, XmmRegister dst, const AsmAddress &src);
+ void minps(Type Ty, XmmRegister dst, const AsmAddress &src);
void minps(Type Ty, XmmRegister dst, XmmRegister src);
- void minss(Type Ty, XmmRegister dst, const Address &src);
+ void minss(Type Ty, XmmRegister dst, const AsmAddress &src);
void minss(Type Ty, XmmRegister dst, XmmRegister src);
- void maxps(Type Ty, XmmRegister dst, const Address &src);
+ void maxps(Type Ty, XmmRegister dst, const AsmAddress &src);
void maxps(Type Ty, XmmRegister dst, XmmRegister src);
- void maxss(Type Ty, XmmRegister dst, const Address &src);
+ void maxss(Type Ty, XmmRegister dst, const AsmAddress &src);
void maxss(Type Ty, XmmRegister dst, XmmRegister src);
- void andnps(Type Ty, XmmRegister dst, const Address &src);
+ void andnps(Type Ty, XmmRegister dst, const AsmAddress &src);
void andnps(Type Ty, XmmRegister dst, XmmRegister src);
- void andps(Type Ty, XmmRegister dst, const Address &src);
+ void andps(Type Ty, XmmRegister dst, const AsmAddress &src);
void andps(Type Ty, XmmRegister dst, XmmRegister src);
- void orps(Type Ty, XmmRegister dst, const Address &src);
+ void orps(Type Ty, XmmRegister dst, const AsmAddress &src);
void orps(Type Ty, XmmRegister dst, XmmRegister src);
void blendvps(Type Ty, XmmRegister dst, XmmRegister src);
- void blendvps(Type Ty, XmmRegister dst, const Address &src);
+ void blendvps(Type Ty, XmmRegister dst, const AsmAddress &src);
void pblendvb(Type Ty, XmmRegister dst, XmmRegister src);
- void pblendvb(Type Ty, XmmRegister dst, const Address &src);
+ void pblendvb(Type Ty, XmmRegister dst, const AsmAddress &src);
void cmpps(Type Ty, XmmRegister dst, XmmRegister src, CmppsCond CmpCondition);
- void cmpps(Type Ty, XmmRegister dst, const Address &src,
+ void cmpps(Type Ty, XmmRegister dst, const AsmAddress &src,
CmppsCond CmpCondition);
void sqrtps(XmmRegister dst);
@@ -420,61 +420,61 @@
void sqrtpd(XmmRegister dst);
void pshufb(Type Ty, XmmRegister dst, XmmRegister src);
- void pshufb(Type Ty, XmmRegister dst, const Address &src);
+ void pshufb(Type Ty, XmmRegister dst, const AsmAddress &src);
void pshufd(Type Ty, XmmRegister dst, XmmRegister src, const Immediate &mask);
- void pshufd(Type Ty, XmmRegister dst, const Address &src,
+ void pshufd(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mask);
void punpckl(Type Ty, XmmRegister Dst, XmmRegister Src);
- void punpckl(Type Ty, XmmRegister Dst, const Address &Src);
+ void punpckl(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void punpckh(Type Ty, XmmRegister Dst, XmmRegister Src);
- void punpckh(Type Ty, XmmRegister Dst, const Address &Src);
+ void punpckh(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void packss(Type Ty, XmmRegister Dst, XmmRegister Src);
- void packss(Type Ty, XmmRegister Dst, const Address &Src);
+ void packss(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void packus(Type Ty, XmmRegister Dst, XmmRegister Src);
- void packus(Type Ty, XmmRegister Dst, const Address &Src);
+ void packus(Type Ty, XmmRegister Dst, const AsmAddress &Src);
void shufps(Type Ty, XmmRegister dst, XmmRegister src, const Immediate &mask);
- void shufps(Type Ty, XmmRegister dst, const Address &src,
+ void shufps(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mask);
void cvtdq2ps(Type, XmmRegister dst, XmmRegister src);
- void cvtdq2ps(Type, XmmRegister dst, const Address &src);
+ void cvtdq2ps(Type, XmmRegister dst, const AsmAddress &src);
void cvttps2dq(Type, XmmRegister dst, XmmRegister src);
- void cvttps2dq(Type, XmmRegister dst, const Address &src);
+ void cvttps2dq(Type, XmmRegister dst, const AsmAddress &src);
void cvtps2dq(Type, XmmRegister dst, XmmRegister src);
- void cvtps2dq(Type, XmmRegister dst, const Address &src);
+ void cvtps2dq(Type, XmmRegister dst, const AsmAddress &src);
void cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy, GPRRegister src);
- void cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy, const Address &src);
+ void cvtsi2ss(Type DestTy, XmmRegister dst, Type SrcTy, const AsmAddress &src);
void cvtfloat2float(Type SrcTy, XmmRegister dst, XmmRegister src);
- void cvtfloat2float(Type SrcTy, XmmRegister dst, const Address &src);
+ void cvtfloat2float(Type SrcTy, XmmRegister dst, const AsmAddress &src);
void cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy, XmmRegister src);
- void cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy, const Address &src);
+ void cvttss2si(Type DestTy, GPRRegister dst, Type SrcTy, const AsmAddress &src);
void cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy, XmmRegister src);
- void cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy, const Address &src);
+ void cvtss2si(Type DestTy, GPRRegister dst, Type SrcTy, const AsmAddress &src);
void ucomiss(Type Ty, XmmRegister a, XmmRegister b);
- void ucomiss(Type Ty, XmmRegister a, const Address &b);
+ void ucomiss(Type Ty, XmmRegister a, const AsmAddress &b);
void movmsk(Type Ty, GPRRegister dst, XmmRegister src);
- void sqrt(Type Ty, XmmRegister dst, const Address &src);
+ void sqrt(Type Ty, XmmRegister dst, const AsmAddress &src);
void sqrt(Type Ty, XmmRegister dst, XmmRegister src);
- void xorps(Type Ty, XmmRegister dst, const Address &src);
+ void xorps(Type Ty, XmmRegister dst, const AsmAddress &src);
void xorps(Type Ty, XmmRegister dst, XmmRegister src);
void insertps(Type Ty, XmmRegister dst, XmmRegister src,
const Immediate &imm);
- void insertps(Type Ty, XmmRegister dst, const Address &src,
+ void insertps(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm);
void pinsr(Type Ty, XmmRegister dst, GPRRegister src, const Immediate &imm);
- void pinsr(Type Ty, XmmRegister dst, const Address &src,
+ void pinsr(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &imm);
void pextr(Type Ty, GPRRegister dst, XmmRegister src, const Immediate &imm);
@@ -482,9 +482,9 @@
void pmovsxdq(XmmRegister dst, XmmRegister src);
void pcmpeq(Type Ty, XmmRegister dst, XmmRegister src);
- void pcmpeq(Type Ty, XmmRegister dst, const Address &src);
+ void pcmpeq(Type Ty, XmmRegister dst, const AsmAddress &src);
void pcmpgt(Type Ty, XmmRegister dst, XmmRegister src);
- void pcmpgt(Type Ty, XmmRegister dst, const Address &src);
+ void pcmpgt(Type Ty, XmmRegister dst, const AsmAddress &src);
enum RoundingMode {
kRoundToNearest = 0x0,
@@ -493,61 +493,61 @@
kRoundToZero = 0x3
};
void round(Type Ty, XmmRegister dst, XmmRegister src, const Immediate &mode);
- void round(Type Ty, XmmRegister dst, const Address &src,
+ void round(Type Ty, XmmRegister dst, const AsmAddress &src,
const Immediate &mode);
void cmp(Type Ty, GPRRegister reg0, GPRRegister reg1);
- void cmp(Type Ty, GPRRegister reg, const Address &address);
+ void cmp(Type Ty, GPRRegister reg, const AsmAddress &address);
void cmp(Type Ty, GPRRegister reg, const Immediate &imm);
- void cmp(Type Ty, const Address &address, GPRRegister reg);
- void cmp(Type Ty, const Address &address, const Immediate &imm);
+ void cmp(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void cmp(Type Ty, const AsmAddress &address, const Immediate &imm);
void test(Type Ty, GPRRegister reg0, GPRRegister reg1);
void test(Type Ty, GPRRegister reg, const Immediate &imm);
- void test(Type Ty, const Address &address, GPRRegister reg);
- void test(Type Ty, const Address &address, const Immediate &imm);
+ void test(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void test(Type Ty, const AsmAddress &address, const Immediate &imm);
void And(Type Ty, GPRRegister dst, GPRRegister src);
- void And(Type Ty, GPRRegister dst, const Address &address);
+ void And(Type Ty, GPRRegister dst, const AsmAddress &address);
void And(Type Ty, GPRRegister dst, const Immediate &imm);
- void And(Type Ty, const Address &address, GPRRegister reg);
- void And(Type Ty, const Address &address, const Immediate &imm);
+ void And(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void And(Type Ty, const AsmAddress &address, const Immediate &imm);
void Or(Type Ty, GPRRegister dst, GPRRegister src);
- void Or(Type Ty, GPRRegister dst, const Address &address);
+ void Or(Type Ty, GPRRegister dst, const AsmAddress &address);
void Or(Type Ty, GPRRegister dst, const Immediate &imm);
- void Or(Type Ty, const Address &address, GPRRegister reg);
- void Or(Type Ty, const Address &address, const Immediate &imm);
+ void Or(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void Or(Type Ty, const AsmAddress &address, const Immediate &imm);
void Xor(Type Ty, GPRRegister dst, GPRRegister src);
- void Xor(Type Ty, GPRRegister dst, const Address &address);
+ void Xor(Type Ty, GPRRegister dst, const AsmAddress &address);
void Xor(Type Ty, GPRRegister dst, const Immediate &imm);
- void Xor(Type Ty, const Address &address, GPRRegister reg);
- void Xor(Type Ty, const Address &address, const Immediate &imm);
+ void Xor(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void Xor(Type Ty, const AsmAddress &address, const Immediate &imm);
void add(Type Ty, GPRRegister dst, GPRRegister src);
- void add(Type Ty, GPRRegister reg, const Address &address);
+ void add(Type Ty, GPRRegister reg, const AsmAddress &address);
void add(Type Ty, GPRRegister reg, const Immediate &imm);
- void add(Type Ty, const Address &address, GPRRegister reg);
- void add(Type Ty, const Address &address, const Immediate &imm);
+ void add(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void add(Type Ty, const AsmAddress &address, const Immediate &imm);
void adc(Type Ty, GPRRegister dst, GPRRegister src);
- void adc(Type Ty, GPRRegister dst, const Address &address);
+ void adc(Type Ty, GPRRegister dst, const AsmAddress &address);
void adc(Type Ty, GPRRegister reg, const Immediate &imm);
- void adc(Type Ty, const Address &address, GPRRegister reg);
- void adc(Type Ty, const Address &address, const Immediate &imm);
+ void adc(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void adc(Type Ty, const AsmAddress &address, const Immediate &imm);
void sub(Type Ty, GPRRegister dst, GPRRegister src);
- void sub(Type Ty, GPRRegister reg, const Address &address);
+ void sub(Type Ty, GPRRegister reg, const AsmAddress &address);
void sub(Type Ty, GPRRegister reg, const Immediate &imm);
- void sub(Type Ty, const Address &address, GPRRegister reg);
- void sub(Type Ty, const Address &address, const Immediate &imm);
+ void sub(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void sub(Type Ty, const AsmAddress &address, const Immediate &imm);
void sbb(Type Ty, GPRRegister dst, GPRRegister src);
- void sbb(Type Ty, GPRRegister reg, const Address &address);
+ void sbb(Type Ty, GPRRegister reg, const AsmAddress &address);
void sbb(Type Ty, GPRRegister reg, const Immediate &imm);
- void sbb(Type Ty, const Address &address, GPRRegister reg);
- void sbb(Type Ty, const Address &address, const Immediate &imm);
+ void sbb(Type Ty, const AsmAddress &address, GPRRegister reg);
+ void sbb(Type Ty, const AsmAddress &address, const Immediate &imm);
void cbw();
void cwd();
@@ -555,62 +555,62 @@
void cqo();
void div(Type Ty, GPRRegister reg);
- void div(Type Ty, const Address &address);
+ void div(Type Ty, const AsmAddress &address);
void idiv(Type Ty, GPRRegister reg);
- void idiv(Type Ty, const Address &address);
+ void idiv(Type Ty, const AsmAddress &address);
void imul(Type Ty, GPRRegister dst, GPRRegister src);
void imul(Type Ty, GPRRegister reg, const Immediate &imm);
- void imul(Type Ty, GPRRegister reg, const Address &address);
+ void imul(Type Ty, GPRRegister reg, const AsmAddress &address);
void imul(Type Ty, GPRRegister reg);
- void imul(Type Ty, const Address &address);
+ void imul(Type Ty, const AsmAddress &address);
void imul(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm);
- void imul(Type Ty, GPRRegister dst, const Address &address,
+ void imul(Type Ty, GPRRegister dst, const AsmAddress &address,
const Immediate &imm);
void mul(Type Ty, GPRRegister reg);
- void mul(Type Ty, const Address &address);
+ void mul(Type Ty, const AsmAddress &address);
void incl(GPRRegister reg);
- void incl(const Address &address);
+ void incl(const AsmAddress &address);
void decl(GPRRegister reg);
- void decl(const Address &address);
+ void decl(const AsmAddress &address);
void rol(Type Ty, GPRRegister reg, const Immediate &imm);
void rol(Type Ty, GPRRegister operand, GPRRegister shifter);
- void rol(Type Ty, const Address &operand, GPRRegister shifter);
+ void rol(Type Ty, const AsmAddress &operand, GPRRegister shifter);
void shl(Type Ty, GPRRegister reg, const Immediate &imm);
void shl(Type Ty, GPRRegister operand, GPRRegister shifter);
- void shl(Type Ty, const Address &operand, GPRRegister shifter);
+ void shl(Type Ty, const AsmAddress &operand, GPRRegister shifter);
void shr(Type Ty, GPRRegister reg, const Immediate &imm);
void shr(Type Ty, GPRRegister operand, GPRRegister shifter);
- void shr(Type Ty, const Address &operand, GPRRegister shifter);
+ void shr(Type Ty, const AsmAddress &operand, GPRRegister shifter);
void sar(Type Ty, GPRRegister reg, const Immediate &imm);
void sar(Type Ty, GPRRegister operand, GPRRegister shifter);
- void sar(Type Ty, const Address &address, GPRRegister shifter);
+ void sar(Type Ty, const AsmAddress &address, GPRRegister shifter);
void shld(Type Ty, GPRRegister dst, GPRRegister src);
void shld(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm);
- void shld(Type Ty, const Address &operand, GPRRegister src);
+ void shld(Type Ty, const AsmAddress &operand, GPRRegister src);
void shrd(Type Ty, GPRRegister dst, GPRRegister src);
void shrd(Type Ty, GPRRegister dst, GPRRegister src, const Immediate &imm);
- void shrd(Type Ty, const Address &dst, GPRRegister src);
+ void shrd(Type Ty, const AsmAddress &dst, GPRRegister src);
void neg(Type Ty, GPRRegister reg);
- void neg(Type Ty, const Address &addr);
+ void neg(Type Ty, const AsmAddress &addr);
void notl(GPRRegister reg);
void bsf(Type Ty, GPRRegister dst, GPRRegister src);
- void bsf(Type Ty, GPRRegister dst, const Address &src);
+ void bsf(Type Ty, GPRRegister dst, const AsmAddress &src);
void bsr(Type Ty, GPRRegister dst, GPRRegister src);
- void bsr(Type Ty, GPRRegister dst, const Address &src);
+ void bsr(Type Ty, GPRRegister dst, const AsmAddress &src);
void bswap(Type Ty, GPRRegister reg);
@@ -637,11 +637,11 @@
void mfence();
void lock();
- void cmpxchg(Type Ty, const Address &address, GPRRegister reg, bool Locked);
- void cmpxchg8b(const Address &address, bool Locked);
- void xadd(Type Ty, const Address &address, GPRRegister reg, bool Locked);
+ void cmpxchg(Type Ty, const AsmAddress &address, GPRRegister reg, bool Locked);
+ void cmpxchg8b(const AsmAddress &address, bool Locked);
+ void xadd(Type Ty, const AsmAddress &address, GPRRegister reg, bool Locked);
void xchg(Type Ty, GPRRegister reg0, GPRRegister reg1);
- void xchg(Type Ty, const Address &address, GPRRegister reg);
+ void xchg(Type Ty, const AsmAddress &address, GPRRegister reg);
/// \name Intel Architecture Code Analyzer markers.
/// @{
@@ -707,13 +707,13 @@
void arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1);
template <uint32_t Tag>
- void arith_int(Type Ty, GPRRegister reg, const Address &address);
+ void arith_int(Type Ty, GPRRegister reg, const AsmAddress &address);
template <uint32_t Tag>
- void arith_int(Type Ty, const Address &address, GPRRegister reg);
+ void arith_int(Type Ty, const AsmAddress &address, GPRRegister reg);
template <uint32_t Tag>
- void arith_int(Type Ty, const Address &address, const Immediate &imm);
+ void arith_int(Type Ty, const AsmAddress &address, const Immediate &imm);
// gprEncoding returns Reg encoding for operand emission. For x86-64 we mask
// out the 4th bit as it is encoded in the REX.[RXB] bits. No other bits are
@@ -750,7 +750,7 @@
template <typename RegType, typename RmType>
void assembleAndEmitRex(const Type TyReg, const RegType Reg, const Type TyRm,
const RmType Rm,
- const Address *Addr = nullptr) {
+ const AsmAddress *Addr = nullptr) {
const uint8_t W = (TyReg == IceType_i64 || TyRm == IceType_i64)
? AsmOperand::RexW
: AsmOperand::RexNone;
@@ -794,12 +794,12 @@
// emitRex is used for emitting a Rex prefix for an address and a GPR. The
// address may contain zero, one, or two registers.
template <typename RegType>
- void emitRex(const Type Ty, const Address &Addr, const RegType Reg) {
+ void emitRex(const Type Ty, const AsmAddress &Addr, const RegType Reg) {
assembleAndEmitRex(Ty, Reg, Ty, RexRegIrrelevant, &Addr);
}
template <typename RegType>
- void emitRex(const Type AddrTy, const Address &Addr, const Type TyReg,
+ void emitRex(const Type AddrTy, const AsmAddress &Addr, const Type TyReg,
const RegType Reg) {
assembleAndEmitRex(TyReg, Reg, AddrTy, RexRegIrrelevant, &Addr);
}
diff --git a/third_party/subzero/src/IceInstX8632.cpp b/third_party/subzero/src/IceInstX8632.cpp
index 5c88269..797327a 100644
--- a/third_party/subzero/src/IceInstX8632.cpp
+++ b/third_party/subzero/src/IceInstX8632.cpp
@@ -527,7 +527,7 @@
if (Var->hasReg()) {
Asm->call(Traits::getEncodedGPR(Var->getRegNum()));
} else {
- Asm->call(Target->stackVarToAsmOperand(Var));
+ Asm->call(Target->stackVarToAsmAddress(Var));
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(CallTarget)) {
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
@@ -584,7 +584,7 @@
GPRRegister VarReg = Traits::getEncodedGPR(Var->getRegNum());
(Asm->*(Emitter.Reg))(Ty, VarReg);
} else {
- Address StackAddr(Target->stackVarToAsmOperand(Var));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Var));
(Asm->*(Emitter.Addr))(Ty, StackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Op)) {
@@ -612,7 +612,7 @@
: Traits::getEncodedGPR(SrcVar->getRegNum());
(Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -635,7 +635,7 @@
}
}
-void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const Address &Addr,
+void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const AsmAddress &Addr,
const Operand *Src, const GPREmitterAddrOp &Emitter) {
Assembler *Asm = Func->getAssembler<Assembler>();
// Src can only be Reg or AssemblerImmediate.
@@ -662,7 +662,7 @@
auto *Target = InstX86Base::getTarget(Func);
if (const auto *Op0Var = llvm::dyn_cast<Variable>(Op0)) {
assert(!Op0Var->hasReg());
- Address StackAddr(Target->stackVarToAsmOperand(Op0Var));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Op0Var));
emitIASAddrOpTyGPR(Func, Ty, StackAddr, Op1, Emitter);
} else if (const auto *Op0Mem = llvm::dyn_cast<X86OperandMem>(Op0)) {
Assembler *Asm = Func->getAssembler<Assembler>();
@@ -729,7 +729,7 @@
XmmRegister SrcReg = Traits::getEncodedXmm(SrcVar->getRegNum());
(Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -753,7 +753,7 @@
XmmRegister SrcReg = Traits::getEncodedXmm(SrcVar->getRegNum());
(Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -761,7 +761,7 @@
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm, Target));
} else if (const auto *Imm = llvm::dyn_cast<Constant>(Src)) {
(Asm->*(Emitter.XmmAddr))(Ty, VarReg,
- Traits::Address::ofConstPool(Asm, Imm));
+ AsmAddress::ofConstPool(Asm, Imm));
} else {
llvm_unreachable("Unexpected operand type");
}
@@ -781,7 +781,7 @@
SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
(Asm->*(Emitter.RegReg))(DestTy, DestReg, SrcTy, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.RegAddr))(DestTy, DestReg, SrcTy, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -810,7 +810,7 @@
SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
(Asm->*(Emitter.RegRegImm))(DispatchTy, DestReg, SrcReg, Imm);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, SrcStackAddr, Imm);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src0)) {
@@ -833,7 +833,7 @@
(Asm->*(Emitter.XmmXmm))(DestReg,
Traits::getEncodedXmm(SrcVar->getRegNum()));
} else {
- Address StackAddr(Target->stackVarToAsmOperand(SrcVar));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(SrcVar));
(Asm->*(Emitter.XmmAddr))(DestReg, StackAddr);
}
} else if (const auto *SrcMem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -843,7 +843,7 @@
llvm_unreachable("Unexpected operand type");
}
} else {
- Address StackAddr(Target->stackVarToAsmOperand(Dest));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Dest));
// Src must be a register in this case.
const auto *SrcVar = llvm::cast<Variable>(Src);
assert(SrcVar->hasReg());
@@ -1308,7 +1308,7 @@
} else {
Asm->cmov(SrcTy, Condition,
Traits::getEncodedGPR(this->getDest()->getRegNum()),
- Target->stackVarToAsmOperand(SrcVar));
+ Target->stackVarToAsmAddress(SrcVar));
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
@@ -1361,7 +1361,7 @@
Traits::getEncodedXmm(this->getDest()->getRegNum()),
Traits::getEncodedXmm(SrcVar->getRegNum()), Condition);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
Asm->cmpps(this->getDest()->getType(),
Traits::getEncodedXmm(this->getDest()->getRegNum()),
SrcStackAddr, Condition);
@@ -1404,7 +1404,7 @@
auto *Target = InstX86Base::getTarget(Func);
const auto Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
const auto *VarReg = llvm::cast<Variable>(this->getSrc(2));
assert(VarReg->hasReg());
const GPRRegister Reg = Traits::getEncodedGPR(VarReg->getRegNum());
@@ -1442,7 +1442,7 @@
const auto Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
auto *Target = InstX86Base::getTarget(Func);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
Asm->cmpxchg8b(Addr, this->Locked);
}
@@ -1794,7 +1794,7 @@
auto *Target = InstX86Base::getTarget(Func);
if (const auto *DestVar = llvm::dyn_cast<Variable>(Dest)) {
assert(!DestVar->hasReg());
- Address StackAddr(Target->stackVarToAsmOperand(DestVar));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(DestVar));
Asm->movss(DestTy, StackAddr, SrcReg);
} else {
const auto DestMem = llvm::cast<X86OperandMem>(Dest);
@@ -2067,7 +2067,7 @@
} else {
// Dest must be Stack and Src *could* be a register. Use Src's type to
// decide on the emitters.
- Address StackAddr(Target->stackVarToAsmOperand(Dest));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Dest));
if (isScalarFloatingType(SrcTy)) {
// Src must be a register.
const auto *SrcVar = llvm::cast<Variable>(Src);
@@ -2133,7 +2133,7 @@
Asm->movd(SrcVar->getType(), DestReg,
Traits::getEncodedGPR(SrcVar->getRegNum()));
} else {
- Address StackAddr(Target->stackVarToAsmOperand(SrcVar));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(SrcVar));
Asm->movd(SrcVar->getType(), DestReg, StackAddr);
}
} else {
@@ -2148,7 +2148,7 @@
Asm->movd(Dest->getType(), Traits::getEncodedGPR(Dest->getRegNum()),
SrcReg);
} else {
- Address StackAddr(Target->stackVarToAsmOperand(Dest));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Dest));
Asm->movd(Dest->getType(), StackAddr, SrcReg);
}
}
@@ -2319,19 +2319,19 @@
// This is a physical xmm register, so we need to spill it to a temporary
// stack slot. Function prolog emission guarantees that there is
// sufficient space to do this.
- Address StackSlot =
- Address(RegisterSet::Encoded_Reg_esp, 0, AssemblerFixup::NoFixup);
+ AsmAddress StackSlot =
+ AsmAddress(RegisterSet::Encoded_Reg_esp, 0, AssemblerFixup::NoFixup);
Asm->movss(Ty, StackSlot, Traits::getEncodedXmm(Var->getRegNum()));
Asm->fld(Ty, StackSlot);
} else {
- Address StackAddr(Target->stackVarToAsmOperand(Var));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Var));
Asm->fld(Ty, StackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
Asm->fld(Ty, Mem->toAsmAddress(Asm, Target));
} else if (const auto *Imm = llvm::dyn_cast<Constant>(Src)) {
- Asm->fld(Ty, Traits::Address::ofConstPool(Asm, Imm));
+ Asm->fld(Ty, AsmAddress::ofConstPool(Asm, Imm));
} else {
llvm_unreachable("Unexpected operand type");
}
@@ -2397,14 +2397,14 @@
auto *Target = InstX86Base::getTarget(Func);
Type Ty = Dest->getType();
if (!Dest->hasReg()) {
- Address StackAddr(Target->stackVarToAsmOperand(Dest));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Dest));
Asm->fstp(Ty, StackAddr);
} else {
// Dest is a physical (xmm) register, so st(0) needs to go through memory.
// Hack this by using caller-reserved memory at the top of stack, spilling
// st(0) there, and loading it into the xmm register.
- Address StackSlot =
- Address(RegisterSet::Encoded_Reg_esp, 0, AssemblerFixup::NoFixup);
+ AsmAddress StackSlot =
+ AsmAddress(RegisterSet::Encoded_Reg_esp, 0, AssemblerFixup::NoFixup);
Asm->fstp(Ty, StackSlot);
Asm->movss(Ty, Traits::getEncodedXmm(Dest->getRegNum()), StackSlot);
}
@@ -2552,7 +2552,7 @@
Asm->popl(Traits::getEncodedGPR(this->getDest()->getRegNum()));
} else {
auto *Target = InstX86Base::getTarget(Func);
- Asm->popl(Target->stackVarToAsmOperand(this->getDest()));
+ Asm->popl(Target->stackVarToAsmAddress(this->getDest()));
}
}
@@ -2644,7 +2644,7 @@
Asm->setcc(Condition,
Traits::getEncodedByteReg(this->getDest()->getRegNum()));
else
- Asm->setcc(Condition, Target->stackVarToAsmOperand(this->getDest()));
+ Asm->setcc(Condition, Target->stackVarToAsmAddress(this->getDest()));
return;
}
@@ -2679,7 +2679,7 @@
const auto Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
auto *Target = InstX86Base::getTarget(Func);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
const auto *VarReg = llvm::cast<Variable>(this->getSrc(1));
assert(VarReg->hasReg());
const GPRRegister Reg = Traits::getEncodedGPR(VarReg->getRegNum());
@@ -2728,7 +2728,7 @@
const auto *Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
auto *Target = InstX86Base::getTarget(Func);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
Asm->xchg(Ty, Addr, Reg1);
}
@@ -3005,7 +3005,7 @@
}
}
-TargetX8632Traits::Address TargetX8632Traits::X86OperandMem::toAsmAddress(
+AsmAddress TargetX8632Traits::X86OperandMem::toAsmAddress(
TargetX8632Traits::Assembler *Asm,
const Ice::TargetLowering *TargetLowering, bool /*IsLeaAddr*/) const {
const auto *Target =
@@ -3036,29 +3036,28 @@
// Now convert to the various possible forms.
if (getBase() && getIndex()) {
- return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()),
- getEncodedGPR(getIndex()->getRegNum()),
- X8632::Traits::ScaleFactor(getShift()), Disp,
- Fixup);
+ return AsmAddress(getEncodedGPR(getBase()->getRegNum()),
+ getEncodedGPR(getIndex()->getRegNum()),
+ X8632::Traits::ScaleFactor(getShift()), Disp, Fixup);
} else if (getBase()) {
- return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()), Disp,
- Fixup);
+ return AsmAddress(getEncodedGPR(getBase()->getRegNum()),
+ Disp, Fixup);
} else if (getIndex()) {
- return X8632::Traits::Address(getEncodedGPR(getIndex()->getRegNum()),
- X8632::Traits::ScaleFactor(getShift()), Disp,
- Fixup);
+ return AsmAddress(getEncodedGPR(getIndex()->getRegNum()),
+ X8632::Traits::ScaleFactor(getShift()),
+ Disp, Fixup);
} else {
- return X8632::Traits::Address(Disp, Fixup);
+ return AsmAddress(Disp, Fixup);
}
}
-TargetX8632Traits::Address
+AsmAddress
TargetX8632Traits::VariableSplit::toAsmAddress(const Cfg *Func) const {
assert(!Var->hasReg());
const ::Ice::TargetLowering *Target = Func->getTarget();
int32_t Offset = Var->getStackOffset() + getOffset();
- return X8632::Traits::Address(getEncodedGPR(Target->getFrameOrStackReg()),
- Offset, AssemblerFixup::NoFixup);
+ return AsmAddress(getEncodedGPR(Target->getFrameOrStackReg()),
+ Offset, AssemblerFixup::NoFixup);
}
void TargetX8632Traits::VariableSplit::emit(const Cfg *Func) const {
diff --git a/third_party/subzero/src/IceInstX8632.h b/third_party/subzero/src/IceInstX8632.h
index 96e13cd..ce0b44a 100644
--- a/third_party/subzero/src/IceInstX8632.h
+++ b/third_party/subzero/src/IceInstX8632.h
@@ -34,7 +34,7 @@
using Assembler = typename Traits::Assembler;
using AssemblerImmediate = typename Assembler::Immediate;
using TargetLowering = typename Traits::TargetLowering;
-using Address = typename Traits::Address;
+using AsmAddress = typename Traits::AsmAddress;
using X86Operand = typename Traits::X86Operand;
using X86OperandMem = typename Traits::X86OperandMem;
using VariableSplit = typename Traits::VariableSplit;
@@ -478,7 +478,7 @@
void emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src, const GPREmitterShiftOp &Emitter);
-void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const Address &Addr,
+void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const AsmAddress &Addr,
const Operand *Src, const GPREmitterAddrOp &Emitter);
void emitIASRegOpTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
diff --git a/third_party/subzero/src/IceInstX8664.cpp b/third_party/subzero/src/IceInstX8664.cpp
index e519dbf..9a04fdf 100644
--- a/third_party/subzero/src/IceInstX8664.cpp
+++ b/third_party/subzero/src/IceInstX8664.cpp
@@ -527,7 +527,7 @@
if (Var->hasReg()) {
Asm->call(Traits::getEncodedGPR(Var->getRegNum()));
} else {
- Asm->call(Target->stackVarToAsmOperand(Var));
+ Asm->call(Target->stackVarToAsmAddress(Var));
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(CallTarget)) {
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
@@ -584,7 +584,7 @@
GPRRegister VarReg = Traits::getEncodedGPR(Var->getRegNum());
(Asm->*(Emitter.Reg))(Ty, VarReg);
} else {
- Address StackAddr(Target->stackVarToAsmOperand(Var));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Var));
(Asm->*(Emitter.Addr))(Ty, StackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Op)) {
@@ -612,7 +612,7 @@
: Traits::getEncodedGPR(SrcVar->getRegNum());
(Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -638,7 +638,7 @@
}
}
-void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const Address &Addr,
+void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const AsmAddress &Addr,
const Operand *Src, const GPREmitterAddrOp &Emitter) {
Assembler *Asm = Func->getAssembler<Assembler>();
// Src can only be Reg or AssemblerImmediate.
@@ -668,7 +668,7 @@
auto *Target = InstX86Base::getTarget(Func);
if (const auto *Op0Var = llvm::dyn_cast<Variable>(Op0)) {
assert(!Op0Var->hasReg());
- Address StackAddr(Target->stackVarToAsmOperand(Op0Var));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Op0Var));
emitIASAddrOpTyGPR(Func, Ty, StackAddr, Op1, Emitter);
} else if (const auto *Op0Mem = llvm::dyn_cast<X86OperandMem>(Op0)) {
Assembler *Asm = Func->getAssembler<Assembler>();
@@ -738,7 +738,7 @@
XmmRegister SrcReg = Traits::getEncodedXmm(SrcVar->getRegNum());
(Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -762,7 +762,7 @@
XmmRegister SrcReg = Traits::getEncodedXmm(SrcVar->getRegNum());
(Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -770,7 +770,7 @@
(Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm, Target));
} else if (const auto *Imm = llvm::dyn_cast<Constant>(Src)) {
(Asm->*(Emitter.XmmAddr))(Ty, VarReg,
- Traits::Address::ofConstPool(Asm, Imm));
+ AsmAddress::ofConstPool(Asm, Imm));
} else {
llvm_unreachable("Unexpected operand type");
}
@@ -790,7 +790,7 @@
SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
(Asm->*(Emitter.RegReg))(DestTy, DestReg, SrcTy, SrcReg);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.RegAddr))(DestTy, DestReg, SrcTy, SrcStackAddr);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -819,7 +819,7 @@
SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
(Asm->*(Emitter.RegRegImm))(DispatchTy, DestReg, SrcReg, Imm);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
(Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, SrcStackAddr, Imm);
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src0)) {
@@ -842,7 +842,7 @@
(Asm->*(Emitter.XmmXmm))(DestReg,
Traits::getEncodedXmm(SrcVar->getRegNum()));
} else {
- Address StackAddr(Target->stackVarToAsmOperand(SrcVar));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(SrcVar));
(Asm->*(Emitter.XmmAddr))(DestReg, StackAddr);
}
} else if (const auto *SrcMem = llvm::dyn_cast<X86OperandMem>(Src)) {
@@ -852,7 +852,7 @@
llvm_unreachable("Unexpected operand type");
}
} else {
- Address StackAddr(Target->stackVarToAsmOperand(Dest));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Dest));
// Src must be a register in this case.
const auto *SrcVar = llvm::cast<Variable>(Src);
assert(SrcVar->hasReg());
@@ -1327,7 +1327,7 @@
} else {
Asm->cmov(SrcTy, Condition,
Traits::getEncodedGPR(this->getDest()->getRegNum()),
- Target->stackVarToAsmOperand(SrcVar));
+ Target->stackVarToAsmAddress(SrcVar));
}
} else if (const auto *Mem = llvm::dyn_cast<X86OperandMem>(Src)) {
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
@@ -1380,7 +1380,7 @@
Traits::getEncodedXmm(this->getDest()->getRegNum()),
Traits::getEncodedXmm(SrcVar->getRegNum()), Condition);
} else {
- Address SrcStackAddr = Target->stackVarToAsmOperand(SrcVar);
+ AsmAddress SrcStackAddr = Target->stackVarToAsmAddress(SrcVar);
Asm->cmpps(this->getDest()->getType(),
Traits::getEncodedXmm(this->getDest()->getRegNum()),
SrcStackAddr, Condition);
@@ -1423,7 +1423,7 @@
auto *Target = InstX86Base::getTarget(Func);
const auto Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
const auto *VarReg = llvm::cast<Variable>(this->getSrc(2));
assert(VarReg->hasReg());
const GPRRegister Reg = Traits::getEncodedGPR(VarReg->getRegNum());
@@ -1461,7 +1461,7 @@
const auto Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
auto *Target = InstX86Base::getTarget(Func);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
Asm->cmpxchg8b(Addr, this->Locked);
}
@@ -1813,7 +1813,7 @@
auto *Target = InstX86Base::getTarget(Func);
if (const auto *DestVar = llvm::dyn_cast<Variable>(Dest)) {
assert(!DestVar->hasReg());
- Address StackAddr(Target->stackVarToAsmOperand(DestVar));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(DestVar));
Asm->movss(DestTy, StackAddr, SrcReg);
} else {
const auto DestMem = llvm::cast<X86OperandMem>(Dest);
@@ -2100,7 +2100,7 @@
} else {
// Dest must be Stack and Src *could* be a register. Use Src's type to
// decide on the emitters.
- Address StackAddr(Target->stackVarToAsmOperand(Dest));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Dest));
if (isScalarFloatingType(SrcTy)) {
// Src must be a register.
const auto *SrcVar = llvm::cast<Variable>(Src);
@@ -2166,7 +2166,7 @@
Asm->movd(SrcVar->getType(), DestReg,
Traits::getEncodedGPR(SrcVar->getRegNum()));
} else {
- Address StackAddr(Target->stackVarToAsmOperand(SrcVar));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(SrcVar));
Asm->movd(SrcVar->getType(), DestReg, StackAddr);
}
} else {
@@ -2181,7 +2181,7 @@
Asm->movd(Dest->getType(), Traits::getEncodedGPR(Dest->getRegNum()),
SrcReg);
} else {
- Address StackAddr(Target->stackVarToAsmOperand(Dest));
+ AsmAddress StackAddr(Target->stackVarToAsmAddress(Dest));
Asm->movd(Dest->getType(), StackAddr, SrcReg);
}
}
@@ -2494,7 +2494,7 @@
Asm->popl(Traits::getEncodedGPR(this->getDest()->getRegNum()));
} else {
auto *Target = InstX86Base::getTarget(Func);
- Asm->popl(Target->stackVarToAsmOperand(this->getDest()));
+ Asm->popl(Target->stackVarToAsmAddress(this->getDest()));
}
}
@@ -2586,7 +2586,7 @@
Asm->setcc(Condition,
Traits::getEncodedByteReg(this->getDest()->getRegNum()));
else
- Asm->setcc(Condition, Target->stackVarToAsmOperand(this->getDest()));
+ Asm->setcc(Condition, Target->stackVarToAsmAddress(this->getDest()));
return;
}
@@ -2621,7 +2621,7 @@
const auto Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
auto *Target = InstX86Base::getTarget(Func);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
const auto *VarReg = llvm::cast<Variable>(this->getSrc(1));
assert(VarReg->hasReg());
const GPRRegister Reg = Traits::getEncodedGPR(VarReg->getRegNum());
@@ -2670,7 +2670,7 @@
const auto *Mem = llvm::cast<X86OperandMem>(this->getSrc(0));
assert(Mem->getSegmentRegister() == X86OperandMem::DefaultSegment);
auto *Target = InstX86Base::getTarget(Func);
- const Address Addr = Mem->toAsmAddress(Asm, Target);
+ const AsmAddress Addr = Mem->toAsmAddress(Asm, Target);
Asm->xchg(Ty, Addr, Reg1);
}
@@ -2931,7 +2931,7 @@
Str << "]";
}
-TargetX8664Traits::Address TargetX8664Traits::X86OperandMem::toAsmAddress(
+AsmAddress TargetX8664Traits::X86OperandMem::toAsmAddress(
TargetX8664Traits::Assembler *Asm,
const Ice::TargetLowering *TargetLowering, bool IsLeaAddr) const {
(void)IsLeaAddr;
@@ -2965,36 +2965,36 @@
// Now convert to the various possible forms.
if (getBase() && getIndex()) {
- return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()),
+ return AsmAddress(getEncodedGPR(getBase()->getRegNum()),
getEncodedGPR(getIndex()->getRegNum()),
X8664::Traits::ScaleFactor(getShift()), Disp,
Fixup);
}
if (getBase()) {
- return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()), Disp,
+ return AsmAddress(getEncodedGPR(getBase()->getRegNum()), Disp,
Fixup);
}
if (getIndex()) {
- return X8664::Traits::Address(getEncodedGPR(getIndex()->getRegNum()),
+ return AsmAddress(getEncodedGPR(getIndex()->getRegNum()),
X8664::Traits::ScaleFactor(getShift()), Disp,
Fixup);
}
if (Fixup == nullptr) {
- return X8664::Traits::Address::Absolute(Disp);
+ return AsmAddress::Absolute(Disp);
}
- return X8664::Traits::Address::RipRelative(Disp, Fixup);
+ return AsmAddress::RipRelative(Disp, Fixup);
}
-TargetX8664Traits::Address
+AsmAddress
TargetX8664Traits::VariableSplit::toAsmAddress(const Cfg *Func) const {
assert(!Var->hasReg());
const ::Ice::TargetLowering *Target = Func->getTarget();
int32_t Offset = Var->getStackOffset() + getOffset();
- return X8664::Traits::Address(getEncodedGPR(Target->getFrameOrStackReg()),
+ return AsmAddress(getEncodedGPR(Target->getFrameOrStackReg()),
Offset, AssemblerFixup::NoFixup);
}
diff --git a/third_party/subzero/src/IceInstX8664.h b/third_party/subzero/src/IceInstX8664.h
index 40094cc..22946ae 100644
--- a/third_party/subzero/src/IceInstX8664.h
+++ b/third_party/subzero/src/IceInstX8664.h
@@ -34,7 +34,7 @@
using Assembler = typename Traits::Assembler;
using AssemblerImmediate = typename Assembler::Immediate;
using TargetLowering = typename Traits::TargetLowering;
-using Address = typename Traits::Address;
+using AsmAddress = typename Traits::AsmAddress;
using X86Operand = typename Traits::X86Operand;
using X86OperandMem = typename Traits::X86OperandMem;
using VariableSplit = typename Traits::VariableSplit;
@@ -476,7 +476,7 @@
void emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
const Operand *Src, const GPREmitterShiftOp &Emitter);
-void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const Address &Addr,
+void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const AsmAddress &Addr,
const Operand *Src, const GPREmitterAddrOp &Emitter);
void emitIASRegOpTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
diff --git a/third_party/subzero/src/IceTargetLoweringX8632.cpp b/third_party/subzero/src/IceTargetLoweringX8632.cpp
index 9245df8..15487a3 100644
--- a/third_party/subzero/src/IceTargetLoweringX8632.cpp
+++ b/third_party/subzero/src/IceTargetLoweringX8632.cpp
@@ -871,8 +871,7 @@
Str << "(%" << getRegName(BaseRegNum, FrameSPTy) << ")";
}
-typename TargetX8632::X86Address
-TargetX8632::stackVarToAsmOperand(const Variable *Var) const {
+AsmAddress TargetX8632::stackVarToAsmAddress(const Variable *Var) const {
if (Var->hasReg())
llvm::report_fatal_error("Stack Variable has a register assigned");
if (Var->mustHaveReg()) {
@@ -893,7 +892,7 @@
BaseRegNum = getFrameOrStackReg();
}
}
- return X86Address(Traits::getEncodedGPR(BaseRegNum), Offset,
+ return AsmAddress(Traits::getEncodedGPR(BaseRegNum), Offset,
AssemblerFixup::NoFixup);
}
@@ -1169,7 +1168,7 @@
Var->setStackOffset(Root->getStackOffset());
// If the stack root variable is an arg, make this variable an arg too so
- // that stackVarToAsmOperand uses the correct base pointer (e.g. ebp on
+ // that stackVarToAsmAddress uses the correct base pointer (e.g. ebp on
// x86).
Var->setIsArg(Root->getIsArg());
}
diff --git a/third_party/subzero/src/IceTargetLoweringX8632.h b/third_party/subzero/src/IceTargetLoweringX8632.h
index 7b0075d..a012d17 100644
--- a/third_party/subzero/src/IceTargetLoweringX8632.h
+++ b/third_party/subzero/src/IceTargetLoweringX8632.h
@@ -126,7 +126,7 @@
using BrCond = CondX86::BrCond;
using CmppsCond = CondX86::CmppsCond;
- using X86Address = typename Traits::Address;
+ using AsmAddress = typename Traits::AsmAddress;
using X86Operand = typename Traits::X86Operand;
using X86OperandMem = typename Traits::X86OperandMem;
using SegmentRegisters = typename Traits::X86OperandMem::SegmentRegisters;
@@ -272,7 +272,7 @@
size_t BasicFrameOffset, size_t StackAdjBytes,
size_t &InArgsSizeBytes);
void addEpilog(CfgNode *Node) override;
- X86Address stackVarToAsmOperand(const Variable *Var) const;
+ AsmAddress stackVarToAsmAddress(const Variable *Var) const;
Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
diff --git a/third_party/subzero/src/IceTargetLoweringX8632Traits.h b/third_party/subzero/src/IceTargetLoweringX8632Traits.h
index fd9c6a6..bf450d9 100644
--- a/third_party/subzero/src/IceTargetLoweringX8632Traits.h
+++ b/third_party/subzero/src/IceTargetLoweringX8632Traits.h
@@ -116,7 +116,7 @@
AssemblerFixup *fixup() const { return fixup_; }
protected:
- AsmOperand() : fixup_(nullptr), length_(0) {} // Needed by subclass Address.
+ AsmOperand() : fixup_(nullptr), length_(0) {} // Needed by subclass AsmAddress.
void SetModRM(int mod, GPRRegister rm) {
assert((mod & ~3) == 0);
@@ -169,18 +169,18 @@
friend class AssemblerX8632;
};
- class Address : public AsmOperand {
- Address() = delete;
+ class AsmAddress : public AsmOperand {
+ AsmAddress() = delete;
public:
- Address(const Address &other) : AsmOperand(other) {}
+ AsmAddress(const AsmAddress &other) : AsmOperand(other) {}
- Address &operator=(const Address &other) {
+ AsmAddress &operator=(const AsmAddress &other) {
AsmOperand::operator=(other);
return *this;
}
- Address(GPRRegister Base, int32_t Disp, AssemblerFixup *Fixup) {
+ AsmAddress(GPRRegister Base, int32_t Disp, AssemblerFixup *Fixup) {
if (Fixup == nullptr && Disp == 0 && Base != RegX8632::Encoded_Reg_ebp) {
SetModRM(0, Base);
if (Base == RegX8632::Encoded_Reg_esp)
@@ -200,7 +200,7 @@
}
}
- Address(GPRRegister Index, ScaleFactor Scale, int32_t Disp,
+ AsmAddress(GPRRegister Index, ScaleFactor Scale, int32_t Disp,
AssemblerFixup *Fixup) {
assert(Index != RegX8632::Encoded_Reg_esp); // Illegal addressing mode.
SetModRM(0, RegX8632::Encoded_Reg_esp);
@@ -210,7 +210,7 @@
SetFixup(Fixup);
}
- Address(GPRRegister Base, GPRRegister Index, ScaleFactor Scale,
+ AsmAddress(GPRRegister Base, GPRRegister Index, ScaleFactor Scale,
int32_t Disp, AssemblerFixup *Fixup) {
assert(Index != RegX8632::Encoded_Reg_esp); // Illegal addressing mode.
if (Fixup == nullptr && Disp == 0 && Base != RegX8632::Encoded_Reg_ebp) {
@@ -230,7 +230,7 @@
}
/// Generate an absolute address expression on x86-32.
- Address(RelocOffsetT Offset, AssemblerFixup *Fixup) {
+ AsmAddress(RelocOffsetT Offset, AssemblerFixup *Fixup) {
SetModRM(0, RegX8632::Encoded_Reg_ebp);
// Use the Offset in the displacement for now. If we decide to process
// fixups later, we'll need to patch up the emitted displacement.
@@ -239,10 +239,10 @@
SetFixup(Fixup);
}
- static Address ofConstPool(Assembler *Asm, const Constant *Imm) {
+ static AsmAddress ofConstPool(Assembler *Asm, const Constant *Imm) {
AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Imm);
const RelocOffsetT Offset = 0;
- return Address(Offset, Fixup);
+ return AsmAddress(Offset, Fixup);
}
};
@@ -784,7 +784,7 @@
SegmentRegisters getSegmentRegister() const { return SegmentReg; }
void emitSegmentOverride(Assembler *Asm) const;
bool getIsRebased() const { return IsRebased; }
- Address toAsmAddress(Assembler *Asm, const Ice::TargetLowering *Target,
+ AsmAddress toAsmAddress(Assembler *Asm, const Ice::TargetLowering *Target,
bool LeaAddr = false) const;
void emit(const Cfg *Func) const override;
@@ -828,7 +828,7 @@
}
int32_t getOffset() const { return Part == High ? 4 : 0; }
- Address toAsmAddress(const Cfg *Func) const;
+ AsmAddress toAsmAddress(const Cfg *Func) const;
void emit(const Cfg *Func) const override;
using X86Operand::dump;
void dump(const Cfg *Func, Ostream &Str) const override;
diff --git a/third_party/subzero/src/IceTargetLoweringX8664.cpp b/third_party/subzero/src/IceTargetLoweringX8664.cpp
index 0a48f13..03f6f93 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664.cpp
+++ b/third_party/subzero/src/IceTargetLoweringX8664.cpp
@@ -885,8 +885,7 @@
Str << "(%" << getRegName(BaseRegNum, FrameSPTy) << ")";
}
-typename TargetX8664::X86Address
-TargetX8664::stackVarToAsmOperand(const Variable *Var) const {
+AsmAddress TargetX8664::stackVarToAsmAddress(const Variable *Var) const {
if (Var->hasReg())
llvm::report_fatal_error("Stack Variable has a register assigned");
if (Var->mustHaveReg()) {
@@ -907,7 +906,7 @@
BaseRegNum = getFrameOrStackReg();
}
}
- return X86Address(Traits::getEncodedGPR(BaseRegNum), Offset,
+ return AsmAddress(Traits::getEncodedGPR(BaseRegNum), Offset,
AssemblerFixup::NoFixup);
}
@@ -1188,7 +1187,7 @@
Var->setStackOffset(Root->getStackOffset());
// If the stack root variable is an arg, make this variable an arg too so
- // that stackVarToAsmOperand uses the correct base pointer (e.g. ebp on
+ // that stackVarToAsmAddress uses the correct base pointer (e.g. ebp on
// x86).
Var->setIsArg(Root->getIsArg());
}
diff --git a/third_party/subzero/src/IceTargetLoweringX8664.h b/third_party/subzero/src/IceTargetLoweringX8664.h
index b084862..738ddae 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664.h
+++ b/third_party/subzero/src/IceTargetLoweringX8664.h
@@ -127,7 +127,7 @@
using BrCond = CondX86::BrCond;
using CmppsCond = CondX86::CmppsCond;
- using X86Address = typename Traits::Address;
+ using AsmAddress = typename Traits::AsmAddress;
using X86Operand = typename Traits::X86Operand;
using X86OperandMem = typename Traits::X86OperandMem;
using SegmentRegisters = typename Traits::X86OperandMem::SegmentRegisters;
@@ -268,7 +268,7 @@
size_t BasicFrameOffset, size_t StackAdjBytes,
size_t &InArgsSizeBytes);
void addEpilog(CfgNode *Node) override;
- X86Address stackVarToAsmOperand(const Variable *Var) const;
+ AsmAddress stackVarToAsmAddress(const Variable *Var) const;
Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
diff --git a/third_party/subzero/src/IceTargetLoweringX8664Traits.h b/third_party/subzero/src/IceTargetLoweringX8664Traits.h
index f0e49ba..ce79fb9 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664Traits.h
+++ b/third_party/subzero/src/IceTargetLoweringX8664Traits.h
@@ -80,7 +80,7 @@
};
protected:
- // Needed by subclass Address.
+ // Needed by subclass AsmAddress.
AsmOperand() = default;
public:
@@ -176,16 +176,16 @@
friend class AssemblerX8664;
};
- class Address : public AsmOperand {
- Address() = default;
+ class AsmAddress : public AsmOperand {
+ AsmAddress() = default;
public:
- Address(const Address &) = default;
- Address(Address &&) = default;
- Address &operator=(const Address &) = default;
- Address &operator=(Address &&) = default;
+ AsmAddress(const AsmAddress &) = default;
+ AsmAddress(AsmAddress &&) = default;
+ AsmAddress &operator=(const AsmAddress &) = default;
+ AsmAddress &operator=(AsmAddress &&) = default;
- Address(GPRRegister Base, int32_t Disp, AssemblerFixup *Fixup) {
+ AsmAddress(GPRRegister Base, int32_t Disp, AssemblerFixup *Fixup) {
if (Fixup == nullptr && Disp == 0 &&
(Base & 7) != RegX8664::Encoded_Reg_rbp) {
SetModRM(0, Base);
@@ -206,7 +206,7 @@
}
}
- Address(GPRRegister Index, ScaleFactor Scale, int32_t Disp,
+ AsmAddress(GPRRegister Index, ScaleFactor Scale, int32_t Disp,
AssemblerFixup *Fixup) {
assert(Index != RegX8664::Encoded_Reg_rsp); // Illegal addressing mode.
SetModRM(0, RegX8664::Encoded_Reg_rsp);
@@ -216,7 +216,7 @@
SetFixup(Fixup);
}
- Address(GPRRegister Base, GPRRegister Index, ScaleFactor Scale,
+ AsmAddress(GPRRegister Base, GPRRegister Index, ScaleFactor Scale,
int32_t Disp, AssemblerFixup *Fixup) {
assert(Index != RegX8664::Encoded_Reg_rsp); // Illegal addressing mode.
if (Fixup == nullptr && Disp == 0 &&
@@ -237,10 +237,10 @@
}
/// Generate a RIP-relative address expression on x86-64.
- static Address RipRelative(RelocOffsetT Offset, AssemblerFixup *Fixup) {
+ static AsmAddress RipRelative(RelocOffsetT Offset, AssemblerFixup *Fixup) {
assert(Fixup != nullptr);
assert(Fixup->kind() == FK_PcRel);
- Address NewAddress;
+ AsmAddress NewAddress;
NewAddress.SetModRM(0x0, RegX8664::Encoded_Reg_rbp);
// Use the Offset in the displacement for now. If we decide to process
@@ -253,8 +253,8 @@
}
/// Generate an absolute address.
- static Address Absolute(RelocOffsetT Addr) {
- Address NewAddress;
+ static AsmAddress Absolute(RelocOffsetT Addr) {
+ AsmAddress NewAddress;
NewAddress.SetModRM(0x0, RegX8664::Encoded_Reg_rsp);
static constexpr ScaleFactor NoScale = TIMES_1;
NewAddress.SetSIB(NoScale, RegX8664::Encoded_Reg_rsp,
@@ -263,11 +263,11 @@
return NewAddress;
}
- static Address ofConstPool(Assembler *Asm, const Constant *Imm) {
+ static AsmAddress ofConstPool(Assembler *Asm, const Constant *Imm) {
// TODO(jpp): ???
AssemblerFixup *Fixup = Asm->createFixup(FK_Abs, Imm);
const RelocOffsetT Offset = 4;
- return Address::RipRelative(Offset, Fixup);
+ return AsmAddress::RipRelative(Offset, Fixup);
}
};
@@ -866,7 +866,7 @@
SegmentRegisters getSegmentRegister() const { return DefaultSegment; }
void emitSegmentOverride(Assembler *) const {}
bool getIsRebased() const { return IsRebased; }
- Address toAsmAddress(Assembler *Asm, const Ice::TargetLowering *Target,
+ AsmAddress toAsmAddress(Assembler *Asm, const Ice::TargetLowering *Target,
bool IsLeaAddr = false) const;
void emit(const Cfg *Func) const override;
@@ -908,7 +908,7 @@
}
int32_t getOffset() const { return Part == High ? 4 : 0; }
- Address toAsmAddress(const Cfg *Func) const;
+ AsmAddress toAsmAddress(const Cfg *Func) const;
void emit(const Cfg *Func) const override;
using X86Operand::dump;
void dump(const Cfg *Func, Ostream &Str) const override;
