blob: 1ee0b33900fa6f90218d72b40f80be1d9a1b9be4 [file] [log] [blame]
; Show that we know how to translate instruction sub.
; REQUIRES: allow_dump
; Compile using standalone assembler.
; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \
; RUN: | FileCheck %s --check-prefix=ASM
; Show bytes in assembled standalone code.
; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
; RUN: --args -O2 | FileCheck %s --check-prefix=DIS
; Compile using integrated assembler.
; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \
; RUN: | FileCheck %s --check-prefix=IASM
; Show bytes in assembled integrated code.
; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
; RUN: --args -O2 | FileCheck %s --check-prefix=DIS
define internal i32 @sub1FromR0(i32 %p) {
%v = sub i32 %p, 1
ret i32 %v
}
; ASM-LABEL: sub1FromR0:
; ASM: sub r0, r0, #1
; ASM: bx lr
; DIS-LABEL:00000000 <sub1FromR0>:
; DIS-NEXT: 0: e2400001
; IASM-LABEL: sub1FromR0:
; IASM: .byte 0x1
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x40
; IASM-NEXT: .byte 0xe2
define internal i32 @Sub2Regs(i32 %p1, i32 %p2) {
%v = sub i32 %p1, %p2
ret i32 %v
}
; ASM-LABEL: Sub2Regs:
; ASM: sub r0, r0, r1
; ASM-NEXT: bx lr
; DIS-LABEL:00000010 <Sub2Regs>:
; DIS-NEXT: 10: e0400001
; IASM-LABEL: Sub2Regs:
; IASM-NEXT: .byte 0x1
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x40
; IASM-NEXT: .byte 0xe0