| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=aarch64-- -mattr=+lse -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| |
| --- | |
| target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" |
| |
| define void @cmpxchg_i32(i64* %addr) { ret void } |
| define void @cmpxchg_i64(i64* %addr) { ret void } |
| ... |
| |
| --- |
| name: cmpxchg_i32 |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $x0 |
| |
| ; CHECK-LABEL: name: cmpxchg_i32 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 |
| ; CHECK: [[CMP:%[0-9]+]]:gpr32 = MOVi32imm 0 |
| ; CHECK: [[CST:%[0-9]+]]:gpr32 = MOVi32imm 1 |
| ; CHECK: [[RES:%[0-9]+]]:gpr32 = CASW [[CMP]], [[CST]], [[COPY]] :: (load store monotonic 4 on %ir.addr) |
| ; CHECK: $w0 = COPY [[RES]] |
| %0:gpr(p0) = COPY $x0 |
| %1:gpr(s32) = G_CONSTANT i32 0 |
| %2:gpr(s32) = G_CONSTANT i32 1 |
| %3:gpr(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 4 on %ir.addr) |
| $w0 = COPY %3(s32) |
| ... |
| |
| --- |
| name: cmpxchg_i64 |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $x0 |
| |
| ; CHECK-LABEL: name: cmpxchg_i64 |
| ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 |
| ; CHECK: [[CMP:%[0-9]+]]:gpr64 = MOVi64imm 0 |
| ; CHECK: [[CST:%[0-9]+]]:gpr64 = MOVi64imm 1 |
| ; CHECK: [[RES:%[0-9]+]]:gpr64 = CASX [[CMP]], [[CST]], [[COPY]] :: (load store monotonic 8 on %ir.addr) |
| ; CHECK: $x0 = COPY [[RES]] |
| %0:gpr(p0) = COPY $x0 |
| %1:gpr(s64) = G_CONSTANT i64 0 |
| %2:gpr(s64) = G_CONSTANT i64 1 |
| %3:gpr(s64) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store monotonic 8 on %ir.addr) |
| $x0 = COPY %3(s64) |
| ... |