| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ | |
| |* *| | |
| |* Machine Code Emitter *| | |
| |* *| | |
| |* Automatically generated file, do not edit! *| | |
| |* *| | |
| \*===----------------------------------------------------------------------===*/ | |
| uint64_t PPCMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, | |
| SmallVectorImpl<MCFixup> &Fixups, | |
| const MCSubtargetInfo &STI) const { | |
| static const uint64_t InstBits[] = { | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(0), | |
| UINT64_C(2080375316), // ADD4 | |
| UINT64_C(2080376340), // ADD4O | |
| UINT64_C(2080376341), // ADD4O_rec | |
| UINT64_C(2080375316), // ADD4TLS | |
| UINT64_C(2080375317), // ADD4_rec | |
| UINT64_C(2080375316), // ADD8 | |
| UINT64_C(2080376340), // ADD8O | |
| UINT64_C(2080376341), // ADD8O_rec | |
| UINT64_C(2080375316), // ADD8TLS | |
| UINT64_C(2080375316), // ADD8TLS_ | |
| UINT64_C(2080375317), // ADD8_rec | |
| UINT64_C(2080374804), // ADDC | |
| UINT64_C(2080374804), // ADDC8 | |
| UINT64_C(2080375828), // ADDC8O | |
| UINT64_C(2080375829), // ADDC8O_rec | |
| UINT64_C(2080374805), // ADDC8_rec | |
| UINT64_C(2080375828), // ADDCO | |
| UINT64_C(2080375829), // ADDCO_rec | |
| UINT64_C(2080374805), // ADDC_rec | |
| UINT64_C(2080375060), // ADDE | |
| UINT64_C(2080375060), // ADDE8 | |
| UINT64_C(2080376084), // ADDE8O | |
| UINT64_C(2080376085), // ADDE8O_rec | |
| UINT64_C(2080375061), // ADDE8_rec | |
| UINT64_C(2080376084), // ADDEO | |
| UINT64_C(2080376085), // ADDEO_rec | |
| UINT64_C(2080375124), // ADDEX | |
| UINT64_C(2080375124), // ADDEX8 | |
| UINT64_C(2080375061), // ADDE_rec | |
| UINT64_C(939524096), // ADDI | |
| UINT64_C(939524096), // ADDI8 | |
| UINT64_C(805306368), // ADDIC | |
| UINT64_C(805306368), // ADDIC8 | |
| UINT64_C(872415232), // ADDIC_rec | |
| UINT64_C(1006632960), // ADDIS | |
| UINT64_C(1006632960), // ADDIS8 | |
| UINT64_C(0), // ADDISdtprelHA | |
| UINT64_C(0), // ADDISdtprelHA32 | |
| UINT64_C(0), // ADDISgotTprelHA | |
| UINT64_C(0), // ADDIStlsgdHA | |
| UINT64_C(0), // ADDIStlsldHA | |
| UINT64_C(0), // ADDIStocHA | |
| UINT64_C(0), // ADDIStocHA8 | |
| UINT64_C(0), // ADDIdtprelL | |
| UINT64_C(0), // ADDIdtprelL32 | |
| UINT64_C(0), // ADDItlsgdL | |
| UINT64_C(0), // ADDItlsgdL32 | |
| UINT64_C(0), // ADDItlsgdLADDR | |
| UINT64_C(0), // ADDItlsgdLADDR32 | |
| UINT64_C(0), // ADDItlsldL | |
| UINT64_C(0), // ADDItlsldL32 | |
| UINT64_C(0), // ADDItlsldLADDR | |
| UINT64_C(0), // ADDItlsldLADDR32 | |
| UINT64_C(0), // ADDItoc | |
| UINT64_C(0), // ADDItoc8 | |
| UINT64_C(0), // ADDItocL | |
| UINT64_C(2080375252), // ADDME | |
| UINT64_C(2080375252), // ADDME8 | |
| UINT64_C(2080376276), // ADDME8O | |
| UINT64_C(2080376277), // ADDME8O_rec | |
| UINT64_C(2080375253), // ADDME8_rec | |
| UINT64_C(2080376276), // ADDMEO | |
| UINT64_C(2080376277), // ADDMEO_rec | |
| UINT64_C(2080375253), // ADDME_rec | |
| UINT64_C(1275068420), // ADDPCIS | |
| UINT64_C(2080375188), // ADDZE | |
| UINT64_C(2080375188), // ADDZE8 | |
| UINT64_C(2080376212), // ADDZE8O | |
| UINT64_C(2080376213), // ADDZE8O_rec | |
| UINT64_C(2080375189), // ADDZE8_rec | |
| UINT64_C(2080376212), // ADDZEO | |
| UINT64_C(2080376213), // ADDZEO_rec | |
| UINT64_C(2080375189), // ADDZE_rec | |
| UINT64_C(0), // ADJCALLSTACKDOWN | |
| UINT64_C(0), // ADJCALLSTACKUP | |
| UINT64_C(2080374840), // AND | |
| UINT64_C(2080374840), // AND8 | |
| UINT64_C(2080374841), // AND8_rec | |
| UINT64_C(2080374904), // ANDC | |
| UINT64_C(2080374904), // ANDC8 | |
| UINT64_C(2080374905), // ANDC8_rec | |
| UINT64_C(2080374905), // ANDC_rec | |
| UINT64_C(1879048192), // ANDI8_rec | |
| UINT64_C(1946157056), // ANDIS8_rec | |
| UINT64_C(1946157056), // ANDIS_rec | |
| UINT64_C(1879048192), // ANDI_rec | |
| UINT64_C(0), // ANDI_rec_1_EQ_BIT | |
| UINT64_C(0), // ANDI_rec_1_EQ_BIT8 | |
| UINT64_C(0), // ANDI_rec_1_GT_BIT | |
| UINT64_C(0), // ANDI_rec_1_GT_BIT8 | |
| UINT64_C(2080374841), // AND_rec | |
| UINT64_C(0), // ATOMIC_CMP_SWAP_I16 | |
| UINT64_C(0), // ATOMIC_CMP_SWAP_I32 | |
| UINT64_C(0), // ATOMIC_CMP_SWAP_I64 | |
| UINT64_C(0), // ATOMIC_CMP_SWAP_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_ADD_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_ADD_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_ADD_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_ADD_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_AND_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_AND_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_AND_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_AND_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_MAX_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_MAX_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_MAX_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_MAX_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_MIN_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_MIN_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_MIN_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_MIN_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_NAND_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_NAND_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_NAND_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_NAND_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_OR_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_OR_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_OR_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_OR_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_SUB_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_SUB_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_SUB_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_SUB_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_UMAX_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_UMAX_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_UMAX_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_UMAX_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_UMIN_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_UMIN_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_UMIN_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_UMIN_I8 | |
| UINT64_C(0), // ATOMIC_LOAD_XOR_I16 | |
| UINT64_C(0), // ATOMIC_LOAD_XOR_I32 | |
| UINT64_C(0), // ATOMIC_LOAD_XOR_I64 | |
| UINT64_C(0), // ATOMIC_LOAD_XOR_I8 | |
| UINT64_C(0), // ATOMIC_SWAP_I16 | |
| UINT64_C(0), // ATOMIC_SWAP_I32 | |
| UINT64_C(0), // ATOMIC_SWAP_I64 | |
| UINT64_C(0), // ATOMIC_SWAP_I8 | |
| UINT64_C(512), // ATTN | |
| UINT64_C(1207959552), // B | |
| UINT64_C(1207959554), // BA | |
| UINT64_C(1098907648), // BC | |
| UINT64_C(1073741824), // BCC | |
| UINT64_C(1073741826), // BCCA | |
| UINT64_C(1275069472), // BCCCTR | |
| UINT64_C(1275069472), // BCCCTR8 | |
| UINT64_C(1275069473), // BCCCTRL | |
| UINT64_C(1275069473), // BCCCTRL8 | |
| UINT64_C(1073741825), // BCCL | |
| UINT64_C(1073741827), // BCCLA | |
| UINT64_C(1275068448), // BCCLR | |
| UINT64_C(1275068449), // BCCLRL | |
| UINT64_C(1300235296), // BCCTR | |
| UINT64_C(1300235296), // BCCTR8 | |
| UINT64_C(1283458080), // BCCTR8n | |
| UINT64_C(1300235297), // BCCTRL | |
| UINT64_C(1300235297), // BCCTRL8 | |
| UINT64_C(1283458081), // BCCTRL8n | |
| UINT64_C(1283458081), // BCCTRLn | |
| UINT64_C(1283458080), // BCCTRn | |
| UINT64_C(268436481), // BCDADD_rec | |
| UINT64_C(268895617), // BCDCFN_rec | |
| UINT64_C(268567937), // BCDCFSQ_rec | |
| UINT64_C(268830081), // BCDCFZ_rec | |
| UINT64_C(268436289), // BCDCPSGN_rec | |
| UINT64_C(268764545), // BCDCTN_rec | |
| UINT64_C(268436865), // BCDCTSQ_rec | |
| UINT64_C(268699009), // BCDCTZ_rec | |
| UINT64_C(270468481), // BCDSETSGN_rec | |
| UINT64_C(268436929), // BCDSR_rec | |
| UINT64_C(268436545), // BCDSUB_rec | |
| UINT64_C(268436673), // BCDS_rec | |
| UINT64_C(268436737), // BCDTRUNC_rec | |
| UINT64_C(268436609), // BCDUS_rec | |
| UINT64_C(268436801), // BCDUTRUNC_rec | |
| UINT64_C(1098907649), // BCL | |
| UINT64_C(1300234272), // BCLR | |
| UINT64_C(1300234273), // BCLRL | |
| UINT64_C(1283457057), // BCLRLn | |
| UINT64_C(1283457056), // BCLRn | |
| UINT64_C(1117716481), // BCLalways | |
| UINT64_C(1082130433), // BCLn | |
| UINT64_C(1317012512), // BCTR | |
| UINT64_C(1317012512), // BCTR8 | |
| UINT64_C(1317012513), // BCTRL | |
| UINT64_C(1317012513), // BCTRL8 | |
| UINT64_C(5656525675654283264), // BCTRL8_LDinto_toc | |
| UINT64_C(5656525675654283264), // BCTRL8_LDinto_toc_RM | |
| UINT64_C(1317012513), // BCTRL8_RM | |
| UINT64_C(5656525673909452800), // BCTRL_LWZinto_toc | |
| UINT64_C(5656525673909452800), // BCTRL_LWZinto_toc_RM | |
| UINT64_C(1317012513), // BCTRL_RM | |
| UINT64_C(1082130432), // BCn | |
| UINT64_C(1107296256), // BDNZ | |
| UINT64_C(1107296256), // BDNZ8 | |
| UINT64_C(1107296258), // BDNZA | |
| UINT64_C(1124073474), // BDNZAm | |
| UINT64_C(1126170626), // BDNZAp | |
| UINT64_C(1107296257), // BDNZL | |
| UINT64_C(1107296259), // BDNZLA | |
| UINT64_C(1124073475), // BDNZLAm | |
| UINT64_C(1126170627), // BDNZLAp | |
| UINT64_C(1308622880), // BDNZLR | |
| UINT64_C(1308622880), // BDNZLR8 | |
| UINT64_C(1308622881), // BDNZLRL | |
| UINT64_C(1325400097), // BDNZLRLm | |
| UINT64_C(1327497249), // BDNZLRLp | |
| UINT64_C(1325400096), // BDNZLRm | |
| UINT64_C(1327497248), // BDNZLRp | |
| UINT64_C(1124073473), // BDNZLm | |
| UINT64_C(1126170625), // BDNZLp | |
| UINT64_C(1124073472), // BDNZm | |
| UINT64_C(1126170624), // BDNZp | |
| UINT64_C(1111490560), // BDZ | |
| UINT64_C(1111490560), // BDZ8 | |
| UINT64_C(1111490562), // BDZA | |
| UINT64_C(1128267778), // BDZAm | |
| UINT64_C(1130364930), // BDZAp | |
| UINT64_C(1111490561), // BDZL | |
| UINT64_C(1111490563), // BDZLA | |
| UINT64_C(1128267779), // BDZLAm | |
| UINT64_C(1130364931), // BDZLAp | |
| UINT64_C(1312817184), // BDZLR | |
| UINT64_C(1312817184), // BDZLR8 | |
| UINT64_C(1312817185), // BDZLRL | |
| UINT64_C(1329594401), // BDZLRLm | |
| UINT64_C(1331691553), // BDZLRLp | |
| UINT64_C(1329594400), // BDZLRm | |
| UINT64_C(1331691552), // BDZLRp | |
| UINT64_C(1128267777), // BDZLm | |
| UINT64_C(1130364929), // BDZLp | |
| UINT64_C(1128267776), // BDZm | |
| UINT64_C(1130364928), // BDZp | |
| UINT64_C(1207959553), // BL | |
| UINT64_C(1207959553), // BL8 | |
| UINT64_C(5188146776636391424), // BL8_NOP | |
| UINT64_C(5188146776636391424), // BL8_NOP_RM | |
| UINT64_C(5188146776636391424), // BL8_NOP_TLS | |
| UINT64_C(1207959553), // BL8_NOTOC | |
| UINT64_C(1207959553), // BL8_NOTOC_RM | |
| UINT64_C(1207959553), // BL8_NOTOC_TLS | |
| UINT64_C(1207959553), // BL8_RM | |
| UINT64_C(1207959553), // BL8_TLS | |
| UINT64_C(1207959553), // BL8_TLS_ | |
| UINT64_C(1207959555), // BLA | |
| UINT64_C(1207959555), // BLA8 | |
| UINT64_C(5188146785226326016), // BLA8_NOP | |
| UINT64_C(5188146785226326016), // BLA8_NOP_RM | |
| UINT64_C(1207959555), // BLA8_RM | |
| UINT64_C(1207959555), // BLA_RM | |
| UINT64_C(1317011488), // BLR | |
| UINT64_C(1317011488), // BLR8 | |
| UINT64_C(1317011489), // BLRL | |
| UINT64_C(5188146776636391424), // BL_NOP | |
| UINT64_C(5188146776636391424), // BL_NOP_RM | |
| UINT64_C(1207959553), // BL_RM | |
| UINT64_C(1207959553), // BL_TLS | |
| UINT64_C(2080375288), // BPERMD | |
| UINT64_C(2080375158), // BRD | |
| UINT64_C(2080375222), // BRH | |
| UINT64_C(2080375222), // BRH8 | |
| UINT64_C(268435983), // BRINC | |
| UINT64_C(2080375094), // BRW | |
| UINT64_C(2080375094), // BRW8 | |
| UINT64_C(2080375224), // CFUGED | |
| UINT64_C(2080375644), // CLRBHRB | |
| UINT64_C(2080375800), // CMPB | |
| UINT64_C(2080375800), // CMPB8 | |
| UINT64_C(2082471936), // CMPD | |
| UINT64_C(740294656), // CMPDI | |
| UINT64_C(2080375232), // CMPEQB | |
| UINT64_C(2082472000), // CMPLD | |
| UINT64_C(673185792), // CMPLDI | |
| UINT64_C(2080374848), // CMPLW | |
| UINT64_C(671088640), // CMPLWI | |
| UINT64_C(2080375168), // CMPRB | |
| UINT64_C(2080375168), // CMPRB8 | |
| UINT64_C(2080374784), // CMPW | |
| UINT64_C(738197504), // CMPWI | |
| UINT64_C(2080374900), // CNTLZD | |
| UINT64_C(2080374902), // CNTLZDM | |
| UINT64_C(2080374901), // CNTLZD_rec | |
| UINT64_C(2080374836), // CNTLZW | |
| UINT64_C(2080374836), // CNTLZW8 | |
| UINT64_C(2080374837), // CNTLZW8_rec | |
| UINT64_C(2080374837), // CNTLZW_rec | |
| UINT64_C(2080375924), // CNTTZD | |
| UINT64_C(2080375926), // CNTTZDM | |
| UINT64_C(2080375925), // CNTTZD_rec | |
| UINT64_C(2080375860), // CNTTZW | |
| UINT64_C(2080375860), // CNTTZW8 | |
| UINT64_C(2080375861), // CNTTZW8_rec | |
| UINT64_C(2080375861), // CNTTZW_rec | |
| UINT64_C(2080376460), // CP_ABORT | |
| UINT64_C(2082473484), // CP_COPY | |
| UINT64_C(2082473484), // CP_COPY8 | |
| UINT64_C(2080376589), // CP_PASTE8_rec | |
| UINT64_C(2080376589), // CP_PASTE_rec | |
| UINT64_C(1288057410), // CR6SET | |
| UINT64_C(1288057218), // CR6UNSET | |
| UINT64_C(1275068930), // CRAND | |
| UINT64_C(1275068674), // CRANDC | |
| UINT64_C(1275068994), // CREQV | |
| UINT64_C(1275068866), // CRNAND | |
| UINT64_C(1275068482), // CRNOR | |
| UINT64_C(1275068482), // CRNOT | |
| UINT64_C(1275069314), // CROR | |
| UINT64_C(1275069250), // CRORC | |
| UINT64_C(1275068994), // CRSET | |
| UINT64_C(1275068802), // CRUNSET | |
| UINT64_C(1275068802), // CRXOR | |
| UINT64_C(1073741824), // CTRL_DEP | |
| UINT64_C(2080376294), // DARN | |
| UINT64_C(2080376300), // DCBA | |
| UINT64_C(2080374956), // DCBF | |
| UINT64_C(2080375038), // DCBFEP | |
| UINT64_C(2080375724), // DCBI | |
| UINT64_C(2080374892), // DCBST | |
| UINT64_C(2080374910), // DCBSTEP | |
| UINT64_C(2080375340), // DCBT | |
| UINT64_C(2080375422), // DCBTEP | |
| UINT64_C(2080375276), // DCBTST | |
| UINT64_C(2080375294), // DCBTSTEP | |
| UINT64_C(2080376812), // DCBZ | |
| UINT64_C(2080376830), // DCBZEP | |
| UINT64_C(2082473964), // DCBZL | |
| UINT64_C(2082473982), // DCBZLEP | |
| UINT64_C(2080375692), // DCCCI | |
| UINT64_C(2080375762), // DIVD | |
| UINT64_C(2080375634), // DIVDE | |
| UINT64_C(2080376658), // DIVDEO | |
| UINT64_C(2080376659), // DIVDEO_rec | |
| UINT64_C(2080375570), // DIVDEU | |
| UINT64_C(2080376594), // DIVDEUO | |
| UINT64_C(2080376595), // DIVDEUO_rec | |
| UINT64_C(2080375571), // DIVDEU_rec | |
| UINT64_C(2080375635), // DIVDE_rec | |
| UINT64_C(2080376786), // DIVDO | |
| UINT64_C(2080376787), // DIVDO_rec | |
| UINT64_C(2080375698), // DIVDU | |
| UINT64_C(2080376722), // DIVDUO | |
| UINT64_C(2080376723), // DIVDUO_rec | |
| UINT64_C(2080375699), // DIVDU_rec | |
| UINT64_C(2080375763), // DIVD_rec | |
| UINT64_C(2080375766), // DIVW | |
| UINT64_C(2080375638), // DIVWE | |
| UINT64_C(2080376662), // DIVWEO | |
| UINT64_C(2080376663), // DIVWEO_rec | |
| UINT64_C(2080375574), // DIVWEU | |
| UINT64_C(2080376598), // DIVWEUO | |
| UINT64_C(2080376599), // DIVWEUO_rec | |
| UINT64_C(2080375575), // DIVWEU_rec | |
| UINT64_C(2080375639), // DIVWE_rec | |
| UINT64_C(2080376790), // DIVWO | |
| UINT64_C(2080376791), // DIVWO_rec | |
| UINT64_C(2080375702), // DIVWU | |
| UINT64_C(2080376726), // DIVWUO | |
| UINT64_C(2080376727), // DIVWUO_rec | |
| UINT64_C(2080375703), // DIVWU_rec | |
| UINT64_C(2080375767), // DIVW_rec | |
| UINT64_C(2080768354), // DMMR | |
| UINT64_C(2080506210), // DMSETDMRZ | |
| UINT64_C(2080833890), // DMXOR | |
| UINT64_C(4026533776), // DMXXEXTFDMR256 | |
| UINT64_C(4026533648), // DMXXEXTFDMR512 | |
| UINT64_C(4026599184), // DMXXEXTFDMR512_HI | |
| UINT64_C(4026533780), // DMXXINSTFDMR256 | |
| UINT64_C(4026533712), // DMXXINSTFDMR512 | |
| UINT64_C(4026599248), // DMXXINSTFDMR512_HI | |
| UINT64_C(2080376428), // DSS | |
| UINT64_C(2113930860), // DSSALL | |
| UINT64_C(2080375468), // DST | |
| UINT64_C(2080375468), // DST64 | |
| UINT64_C(2080375532), // DSTST | |
| UINT64_C(2080375532), // DSTST64 | |
| UINT64_C(2113929964), // DSTSTT | |
| UINT64_C(2113929964), // DSTSTT64 | |
| UINT64_C(2113929900), // DSTT | |
| UINT64_C(2113929900), // DSTT64 | |
| UINT64_C(0), // DYNALLOC | |
| UINT64_C(0), // DYNALLOC8 | |
| UINT64_C(0), // DYNAREAOFFSET | |
| UINT64_C(0), // DYNAREAOFFSET8 | |
| UINT64_C(0), // DecreaseCTR8loop | |
| UINT64_C(0), // DecreaseCTRloop | |
| UINT64_C(268436196), // EFDABS | |
| UINT64_C(268436192), // EFDADD | |
| UINT64_C(268436207), // EFDCFS | |
| UINT64_C(268436211), // EFDCFSF | |
| UINT64_C(268436209), // EFDCFSI | |
| UINT64_C(268436195), // EFDCFSID | |
| UINT64_C(268436210), // EFDCFUF | |
| UINT64_C(268436208), // EFDCFUI | |
| UINT64_C(268436194), // EFDCFUID | |
| UINT64_C(268436206), // EFDCMPEQ | |
| UINT64_C(268436204), // EFDCMPGT | |
| UINT64_C(268436205), // EFDCMPLT | |
| UINT64_C(268436215), // EFDCTSF | |
| UINT64_C(268436213), // EFDCTSI | |
| UINT64_C(268436203), // EFDCTSIDZ | |
| UINT64_C(268436218), // EFDCTSIZ | |
| UINT64_C(268436214), // EFDCTUF | |
| UINT64_C(268436212), // EFDCTUI | |
| UINT64_C(268436202), // EFDCTUIDZ | |
| UINT64_C(268436216), // EFDCTUIZ | |
| UINT64_C(268436201), // EFDDIV | |
| UINT64_C(268436200), // EFDMUL | |
| UINT64_C(268436197), // EFDNABS | |
| UINT64_C(268436198), // EFDNEG | |
| UINT64_C(268436193), // EFDSUB | |
| UINT64_C(268436222), // EFDTSTEQ | |
| UINT64_C(268436220), // EFDTSTGT | |
| UINT64_C(268436221), // EFDTSTLT | |
| UINT64_C(268436164), // EFSABS | |
| UINT64_C(268436160), // EFSADD | |
| UINT64_C(268436175), // EFSCFD | |
| UINT64_C(268436179), // EFSCFSF | |
| UINT64_C(268436177), // EFSCFSI | |
| UINT64_C(268436178), // EFSCFUF | |
| UINT64_C(268436176), // EFSCFUI | |
| UINT64_C(268436174), // EFSCMPEQ | |
| UINT64_C(268436172), // EFSCMPGT | |
| UINT64_C(268436173), // EFSCMPLT | |
| UINT64_C(268436183), // EFSCTSF | |
| UINT64_C(268436181), // EFSCTSI | |
| UINT64_C(268436186), // EFSCTSIZ | |
| UINT64_C(268436182), // EFSCTUF | |
| UINT64_C(268436180), // EFSCTUI | |
| UINT64_C(268436184), // EFSCTUIZ | |
| UINT64_C(268436169), // EFSDIV | |
| UINT64_C(268436168), // EFSMUL | |
| UINT64_C(268436165), // EFSNABS | |
| UINT64_C(268436166), // EFSNEG | |
| UINT64_C(268436161), // EFSSUB | |
| UINT64_C(268436190), // EFSTSTEQ | |
| UINT64_C(268436188), // EFSTSTGT | |
| UINT64_C(268436189), // EFSTSTLT | |
| UINT64_C(0), // EH_SjLj_LongJmp32 | |
| UINT64_C(0), // EH_SjLj_LongJmp64 | |
| UINT64_C(0), // EH_SjLj_SetJmp32 | |
| UINT64_C(0), // EH_SjLj_SetJmp64 | |
| UINT64_C(0), // EH_SjLj_Setup | |
| UINT64_C(2080375352), // EQV | |
| UINT64_C(2080375352), // EQV8 | |
| UINT64_C(2080375353), // EQV8_rec | |
| UINT64_C(2080375353), // EQV_rec | |
| UINT64_C(268435976), // EVABS | |
| UINT64_C(268435970), // EVADDIW | |
| UINT64_C(268436681), // EVADDSMIAAW | |
| UINT64_C(268436673), // EVADDSSIAAW | |
| UINT64_C(268436680), // EVADDUMIAAW | |
| UINT64_C(268436672), // EVADDUSIAAW | |
| UINT64_C(268435968), // EVADDW | |
| UINT64_C(268435985), // EVAND | |
| UINT64_C(268435986), // EVANDC | |
| UINT64_C(268436020), // EVCMPEQ | |
| UINT64_C(268436017), // EVCMPGTS | |
| UINT64_C(268436016), // EVCMPGTU | |
| UINT64_C(268436019), // EVCMPLTS | |
| UINT64_C(268436018), // EVCMPLTU | |
| UINT64_C(268435982), // EVCNTLSW | |
| UINT64_C(268435981), // EVCNTLZW | |
| UINT64_C(268436678), // EVDIVWS | |
| UINT64_C(268436679), // EVDIVWU | |
| UINT64_C(268435993), // EVEQV | |
| UINT64_C(268435978), // EVEXTSB | |
| UINT64_C(268435979), // EVEXTSH | |
| UINT64_C(268436100), // EVFSABS | |
| UINT64_C(268436096), // EVFSADD | |
| UINT64_C(268436115), // EVFSCFSF | |
| UINT64_C(268436113), // EVFSCFSI | |
| UINT64_C(268436114), // EVFSCFUF | |
| UINT64_C(268436106), // EVFSCFUI | |
| UINT64_C(268436110), // EVFSCMPEQ | |
| UINT64_C(268436108), // EVFSCMPGT | |
| UINT64_C(268436109), // EVFSCMPLT | |
| UINT64_C(268436119), // EVFSCTSF | |
| UINT64_C(268436117), // EVFSCTSI | |
| UINT64_C(268436122), // EVFSCTSIZ | |
| UINT64_C(268436118), // EVFSCTUF | |
| UINT64_C(268436116), // EVFSCTUI | |
| UINT64_C(268436120), // EVFSCTUIZ | |
| UINT64_C(268436105), // EVFSDIV | |
| UINT64_C(268436104), // EVFSMUL | |
| UINT64_C(268436101), // EVFSNABS | |
| UINT64_C(268436102), // EVFSNEG | |
| UINT64_C(268436097), // EVFSSUB | |
| UINT64_C(268436126), // EVFSTSTEQ | |
| UINT64_C(268436124), // EVFSTSTGT | |
| UINT64_C(268436125), // EVFSTSTLT | |
| UINT64_C(268436225), // EVLDD | |
| UINT64_C(268436224), // EVLDDX | |
| UINT64_C(268436229), // EVLDH | |
| UINT64_C(268436228), // EVLDHX | |
| UINT64_C(268436227), // EVLDW | |
| UINT64_C(268436226), // EVLDWX | |
| UINT64_C(268436233), // EVLHHESPLAT | |
| UINT64_C(268436232), // EVLHHESPLATX | |
| UINT64_C(268436239), // EVLHHOSSPLAT | |
| UINT64_C(268436238), // EVLHHOSSPLATX | |
| UINT64_C(268436237), // EVLHHOUSPLAT | |
| UINT64_C(268436236), // EVLHHOUSPLATX | |
| UINT64_C(268436241), // EVLWHE | |
| UINT64_C(268436240), // EVLWHEX | |
| UINT64_C(268436247), // EVLWHOS | |
| UINT64_C(268436246), // EVLWHOSX | |
| UINT64_C(268436245), // EVLWHOU | |
| UINT64_C(268436244), // EVLWHOUX | |
| UINT64_C(268436253), // EVLWHSPLAT | |
| UINT64_C(268436252), // EVLWHSPLATX | |
| UINT64_C(268436249), // EVLWWSPLAT | |
| UINT64_C(268436248), // EVLWWSPLATX | |
| UINT64_C(268436012), // EVMERGEHI | |
| UINT64_C(268436014), // EVMERGEHILO | |
| UINT64_C(268436013), // EVMERGELO | |
| UINT64_C(268436015), // EVMERGELOHI | |
| UINT64_C(268436779), // EVMHEGSMFAA | |
| UINT64_C(268436907), // EVMHEGSMFAN | |
| UINT64_C(268436777), // EVMHEGSMIAA | |
| UINT64_C(268436905), // EVMHEGSMIAN | |
| UINT64_C(268436776), // EVMHEGUMIAA | |
| UINT64_C(268436904), // EVMHEGUMIAN | |
| UINT64_C(268436491), // EVMHESMF | |
| UINT64_C(268436523), // EVMHESMFA | |
| UINT64_C(268436747), // EVMHESMFAAW | |
| UINT64_C(268436875), // EVMHESMFANW | |
| UINT64_C(268436489), // EVMHESMI | |
| UINT64_C(268436521), // EVMHESMIA | |
| UINT64_C(268436745), // EVMHESMIAAW | |
| UINT64_C(268436873), // EVMHESMIANW | |
| UINT64_C(268436483), // EVMHESSF | |
| UINT64_C(268436515), // EVMHESSFA | |
| UINT64_C(268436739), // EVMHESSFAAW | |
| UINT64_C(268436867), // EVMHESSFANW | |
| UINT64_C(268436737), // EVMHESSIAAW | |
| UINT64_C(268436865), // EVMHESSIANW | |
| UINT64_C(268436488), // EVMHEUMI | |
| UINT64_C(268436520), // EVMHEUMIA | |
| UINT64_C(268436744), // EVMHEUMIAAW | |
| UINT64_C(268436872), // EVMHEUMIANW | |
| UINT64_C(268436736), // EVMHEUSIAAW | |
| UINT64_C(268436864), // EVMHEUSIANW | |
| UINT64_C(268436783), // EVMHOGSMFAA | |
| UINT64_C(268436911), // EVMHOGSMFAN | |
| UINT64_C(268436781), // EVMHOGSMIAA | |
| UINT64_C(268436909), // EVMHOGSMIAN | |
| UINT64_C(268436780), // EVMHOGUMIAA | |
| UINT64_C(268436908), // EVMHOGUMIAN | |
| UINT64_C(268436495), // EVMHOSMF | |
| UINT64_C(268436527), // EVMHOSMFA | |
| UINT64_C(268436751), // EVMHOSMFAAW | |
| UINT64_C(268436879), // EVMHOSMFANW | |
| UINT64_C(268436493), // EVMHOSMI | |
| UINT64_C(268436525), // EVMHOSMIA | |
| UINT64_C(268436749), // EVMHOSMIAAW | |
| UINT64_C(268436877), // EVMHOSMIANW | |
| UINT64_C(268436487), // EVMHOSSF | |
| UINT64_C(268436519), // EVMHOSSFA | |
| UINT64_C(268436743), // EVMHOSSFAAW | |
| UINT64_C(268436871), // EVMHOSSFANW | |
| UINT64_C(268436741), // EVMHOSSIAAW | |
| UINT64_C(268436869), // EVMHOSSIANW | |
| UINT64_C(268436492), // EVMHOUMI | |
| UINT64_C(268436524), // EVMHOUMIA | |
| UINT64_C(268436748), // EVMHOUMIAAW | |
| UINT64_C(268436876), // EVMHOUMIANW | |
| UINT64_C(268436740), // EVMHOUSIAAW | |
| UINT64_C(268436868), // EVMHOUSIANW | |
| UINT64_C(268436676), // EVMRA | |
| UINT64_C(268436559), // EVMWHSMF | |
| UINT64_C(268436591), // EVMWHSMFA | |
| UINT64_C(268436557), // EVMWHSMI | |
| UINT64_C(268436589), // EVMWHSMIA | |
| UINT64_C(268436551), // EVMWHSSF | |
| UINT64_C(268436583), // EVMWHSSFA | |
| UINT64_C(268436556), // EVMWHUMI | |
| UINT64_C(268436588), // EVMWHUMIA | |
| UINT64_C(268436809), // EVMWLSMIAAW | |
| UINT64_C(268436937), // EVMWLSMIANW | |
| UINT64_C(268436801), // EVMWLSSIAAW | |
| UINT64_C(268436929), // EVMWLSSIANW | |
| UINT64_C(268436552), // EVMWLUMI | |
| UINT64_C(268436584), // EVMWLUMIA | |
| UINT64_C(268436808), // EVMWLUMIAAW | |
| UINT64_C(268436936), // EVMWLUMIANW | |
| UINT64_C(268436800), // EVMWLUSIAAW | |
| UINT64_C(268436928), // EVMWLUSIANW | |
| UINT64_C(268436571), // EVMWSMF | |
| UINT64_C(268436603), // EVMWSMFA | |
| UINT64_C(268436827), // EVMWSMFAA | |
| UINT64_C(268436955), // EVMWSMFAN | |
| UINT64_C(268436569), // EVMWSMI | |
| UINT64_C(268436601), // EVMWSMIA | |
| UINT64_C(268436825), // EVMWSMIAA | |
| UINT64_C(268436953), // EVMWSMIAN | |
| UINT64_C(268436563), // EVMWSSF | |
| UINT64_C(268436595), // EVMWSSFA | |
| UINT64_C(268436819), // EVMWSSFAA | |
| UINT64_C(268436947), // EVMWSSFAN | |
| UINT64_C(268436568), // EVMWUMI | |
| UINT64_C(268436600), // EVMWUMIA | |
| UINT64_C(268436824), // EVMWUMIAA | |
| UINT64_C(268436952), // EVMWUMIAN | |
| UINT64_C(268435998), // EVNAND | |
| UINT64_C(268435977), // EVNEG | |
| UINT64_C(268435992), // EVNOR | |
| UINT64_C(268435991), // EVOR | |
| UINT64_C(268435995), // EVORC | |
| UINT64_C(268436008), // EVRLW | |
| UINT64_C(268436010), // EVRLWI | |
| UINT64_C(268435980), // EVRNDW | |
| UINT64_C(268436088), // EVSEL | |
| UINT64_C(268436004), // EVSLW | |
| UINT64_C(268436006), // EVSLWI | |
| UINT64_C(268436011), // EVSPLATFI | |
| UINT64_C(268436009), // EVSPLATI | |
| UINT64_C(268436003), // EVSRWIS | |
| UINT64_C(268436002), // EVSRWIU | |
| UINT64_C(268436001), // EVSRWS | |
| UINT64_C(268436000), // EVSRWU | |
| UINT64_C(268436257), // EVSTDD | |
| UINT64_C(268436256), // EVSTDDX | |
| UINT64_C(268436261), // EVSTDH | |
| UINT64_C(268436260), // EVSTDHX | |
| UINT64_C(268436259), // EVSTDW | |
| UINT64_C(268436258), // EVSTDWX | |
| UINT64_C(268436273), // EVSTWHE | |
| UINT64_C(268436272), // EVSTWHEX | |
| UINT64_C(268436277), // EVSTWHO | |
| UINT64_C(268436276), // EVSTWHOX | |
| UINT64_C(268436281), // EVSTWWE | |
| UINT64_C(268436280), // EVSTWWEX | |
| UINT64_C(268436285), // EVSTWWO | |
| UINT64_C(268436284), // EVSTWWOX | |
| UINT64_C(268436683), // EVSUBFSMIAAW | |
| UINT64_C(268436675), // EVSUBFSSIAAW | |
| UINT64_C(268436682), // EVSUBFUMIAAW | |
| UINT64_C(268436674), // EVSUBFUSIAAW | |
| UINT64_C(268435972), // EVSUBFW | |
| UINT64_C(268435974), // EVSUBIFW | |
| UINT64_C(268435990), // EVXOR | |
| UINT64_C(2080376692), // EXTSB | |
| UINT64_C(2080376692), // EXTSB8 | |
| UINT64_C(2080376692), // EXTSB8_32_64 | |
| UINT64_C(2080376693), // EXTSB8_rec | |
| UINT64_C(2080376693), // EXTSB_rec | |
| UINT64_C(2080376628), // EXTSH | |
| UINT64_C(2080376628), // EXTSH8 | |
| UINT64_C(2080376628), // EXTSH8_32_64 | |
| UINT64_C(2080376629), // EXTSH8_rec | |
| UINT64_C(2080376629), // EXTSH_rec | |
| UINT64_C(2080376756), // EXTSW | |
| UINT64_C(2080376564), // EXTSWSLI | |
| UINT64_C(2080376564), // EXTSWSLI_32_64 | |
| UINT64_C(2080376565), // EXTSWSLI_32_64_rec | |
| UINT64_C(2080376565), // EXTSWSLI_rec | |
| UINT64_C(2080376756), // EXTSW_32 | |
| UINT64_C(2080376756), // EXTSW_32_64 | |
| UINT64_C(2080376757), // EXTSW_32_64_rec | |
| UINT64_C(2080376757), // EXTSW_rec | |
| UINT64_C(2080376492), // EnforceIEIO | |
| UINT64_C(4227858960), // FABSD | |
| UINT64_C(4227858961), // FABSD_rec | |
| UINT64_C(4227858960), // FABSS | |
| UINT64_C(4227858961), // FABSS_rec | |
| UINT64_C(4227858474), // FADD | |
| UINT64_C(3959423018), // FADDS | |
| UINT64_C(3959423019), // FADDS_rec | |
| UINT64_C(4227858475), // FADD_rec | |
| UINT64_C(0), // FADDrtz | |
| UINT64_C(4227860124), // FCFID | |
| UINT64_C(3959424668), // FCFIDS | |
| UINT64_C(3959424669), // FCFIDS_rec | |
| UINT64_C(4227860380), // FCFIDU | |
| UINT64_C(3959424924), // FCFIDUS | |
| UINT64_C(3959424925), // FCFIDUS_rec | |
| UINT64_C(4227860381), // FCFIDU_rec | |
| UINT64_C(4227860125), // FCFID_rec | |
| UINT64_C(4227858496), // FCMPOD | |
| UINT64_C(4227858496), // FCMPOS | |
| UINT64_C(4227858432), // FCMPUD | |
| UINT64_C(4227858432), // FCMPUS | |
| UINT64_C(4227858448), // FCPSGND | |
| UINT64_C(4227858449), // FCPSGND_rec | |
| UINT64_C(4227858448), // FCPSGNS | |
| UINT64_C(4227858449), // FCPSGNS_rec | |
| UINT64_C(4227860060), // FCTID | |
| UINT64_C(4227860316), // FCTIDU | |
| UINT64_C(4227860318), // FCTIDUZ | |
| UINT64_C(4227860319), // FCTIDUZ_rec | |
| UINT64_C(4227860317), // FCTIDU_rec | |
| UINT64_C(4227860062), // FCTIDZ | |
| UINT64_C(4227860063), // FCTIDZ_rec | |
| UINT64_C(4227860061), // FCTID_rec | |
| UINT64_C(4227858460), // FCTIW | |
| UINT64_C(4227858716), // FCTIWU | |
| UINT64_C(4227858718), // FCTIWUZ | |
| UINT64_C(4227858719), // FCTIWUZ_rec | |
| UINT64_C(4227858717), // FCTIWU_rec | |
| UINT64_C(4227858462), // FCTIWZ | |
| UINT64_C(4227858463), // FCTIWZ_rec | |
| UINT64_C(4227858461), // FCTIW_rec | |
| UINT64_C(4227858468), // FDIV | |
| UINT64_C(3959423012), // FDIVS | |
| UINT64_C(3959423013), // FDIVS_rec | |
| UINT64_C(4227858469), // FDIV_rec | |
| UINT64_C(4227858490), // FMADD | |
| UINT64_C(3959423034), // FMADDS | |
| UINT64_C(3959423035), // FMADDS_rec | |
| UINT64_C(4227858491), // FMADD_rec | |
| UINT64_C(4227858576), // FMR | |
| UINT64_C(4227858577), // FMR_rec | |
| UINT64_C(4227858488), // FMSUB | |
| UINT64_C(3959423032), // FMSUBS | |
| UINT64_C(3959423033), // FMSUBS_rec | |
| UINT64_C(4227858489), // FMSUB_rec | |
| UINT64_C(4227858482), // FMUL | |
| UINT64_C(3959423026), // FMULS | |
| UINT64_C(3959423027), // FMULS_rec | |
| UINT64_C(4227858483), // FMUL_rec | |
| UINT64_C(4227858704), // FNABSD | |
| UINT64_C(4227858705), // FNABSD_rec | |
| UINT64_C(4227858704), // FNABSS | |
| UINT64_C(4227858705), // FNABSS_rec | |
| UINT64_C(4227858512), // FNEGD | |
| UINT64_C(4227858513), // FNEGD_rec | |
| UINT64_C(4227858512), // FNEGS | |
| UINT64_C(4227858513), // FNEGS_rec | |
| UINT64_C(4227858494), // FNMADD | |
| UINT64_C(3959423038), // FNMADDS | |
| UINT64_C(3959423039), // FNMADDS_rec | |
| UINT64_C(4227858495), // FNMADD_rec | |
| UINT64_C(4227858492), // FNMSUB | |
| UINT64_C(3959423036), // FNMSUBS | |
| UINT64_C(3959423037), // FNMSUBS_rec | |
| UINT64_C(4227858493), // FNMSUB_rec | |
| UINT64_C(4227858480), // FRE | |
| UINT64_C(3959423024), // FRES | |
| UINT64_C(3959423025), // FRES_rec | |
| UINT64_C(4227858481), // FRE_rec | |
| UINT64_C(4227859408), // FRIMD | |
| UINT64_C(4227859409), // FRIMD_rec | |
| UINT64_C(4227859408), // FRIMS | |
| UINT64_C(4227859409), // FRIMS_rec | |
| UINT64_C(4227859216), // FRIND | |
| UINT64_C(4227859217), // FRIND_rec | |
| UINT64_C(4227859216), // FRINS | |
| UINT64_C(4227859217), // FRINS_rec | |
| UINT64_C(4227859344), // FRIPD | |
| UINT64_C(4227859345), // FRIPD_rec | |
| UINT64_C(4227859344), // FRIPS | |
| UINT64_C(4227859345), // FRIPS_rec | |
| UINT64_C(4227859280), // FRIZD | |
| UINT64_C(4227859281), // FRIZD_rec | |
| UINT64_C(4227859280), // FRIZS | |
| UINT64_C(4227859281), // FRIZS_rec | |
| UINT64_C(4227858456), // FRSP | |
| UINT64_C(4227858457), // FRSP_rec | |
| UINT64_C(4227858484), // FRSQRTE | |
| UINT64_C(3959423028), // FRSQRTES | |
| UINT64_C(3959423029), // FRSQRTES_rec | |
| UINT64_C(4227858485), // FRSQRTE_rec | |
| UINT64_C(4227858478), // FSELD | |
| UINT64_C(4227858479), // FSELD_rec | |
| UINT64_C(4227858478), // FSELS | |
| UINT64_C(4227858479), // FSELS_rec | |
| UINT64_C(4227858476), // FSQRT | |
| UINT64_C(3959423020), // FSQRTS | |
| UINT64_C(3959423021), // FSQRTS_rec | |
| UINT64_C(4227858477), // FSQRT_rec | |
| UINT64_C(4227858472), // FSUB | |
| UINT64_C(3959423016), // FSUBS | |
| UINT64_C(3959423017), // FSUBS_rec | |
| UINT64_C(4227858473), // FSUB_rec | |
| UINT64_C(4227858688), // FTDIV | |
| UINT64_C(4227858752), // FTSQRT | |
| UINT64_C(0), // GETtlsADDR | |
| UINT64_C(0), // GETtlsADDR32 | |
| UINT64_C(0), // GETtlsADDR32AIX | |
| UINT64_C(0), // GETtlsADDR64AIX | |
| UINT64_C(0), // GETtlsADDRPCREL | |
| UINT64_C(0), // GETtlsldADDR | |
| UINT64_C(0), // GETtlsldADDR32 | |
| UINT64_C(0), // GETtlsldADDRPCREL | |
| UINT64_C(2080376292), // HASHCHK | |
| UINT64_C(2080376292), // HASHCHK8 | |
| UINT64_C(2080376164), // HASHCHKP | |
| UINT64_C(2080376164), // HASHCHKP8 | |
| UINT64_C(2080376228), // HASHST | |
| UINT64_C(2080376228), // HASHST8 | |
| UINT64_C(2080376100), // HASHSTP | |
| UINT64_C(2080376100), // HASHSTP8 | |
| UINT64_C(1275068964), // HRFID | |
| UINT64_C(2080376748), // ICBI | |
| UINT64_C(2080376766), // ICBIEP | |
| UINT64_C(2080375244), // ICBLC | |
| UINT64_C(2080375180), // ICBLQ | |
| UINT64_C(2080374828), // ICBT | |
| UINT64_C(2080375756), // ICBTLS | |
| UINT64_C(2080376716), // ICCCI | |
| UINT64_C(2080374814), // ISEL | |
| UINT64_C(2080374814), // ISEL8 | |
| UINT64_C(1275068716), // ISYNC | |
| UINT64_C(939524096), // LA | |
| UINT64_C(939524096), // LA8 | |
| UINT64_C(2080374888), // LBARX | |
| UINT64_C(2080374889), // LBARXL | |
| UINT64_C(2080374974), // LBEPX | |
| UINT64_C(2281701376), // LBZ | |
| UINT64_C(2281701376), // LBZ8 | |
| UINT64_C(2080376490), // LBZCIX | |
| UINT64_C(2348810240), // LBZU | |
| UINT64_C(2348810240), // LBZU8 | |
| UINT64_C(2080375022), // LBZUX | |
| UINT64_C(2080375022), // LBZUX8 | |
| UINT64_C(2080374958), // LBZX | |
| UINT64_C(2080374958), // LBZX8 | |
| UINT64_C(2080374958), // LBZXTLS | |
| UINT64_C(2080374958), // LBZXTLS_ | |
| UINT64_C(2080374958), // LBZXTLS_32 | |
| UINT64_C(3892314112), // LD | |
| UINT64_C(2080374952), // LDARX | |
| UINT64_C(2080374953), // LDARXL | |
| UINT64_C(2080376012), // LDAT | |
| UINT64_C(2080375848), // LDBRX | |
| UINT64_C(2080376554), // LDCIX | |
| UINT64_C(3892314113), // LDU | |
| UINT64_C(2080374890), // LDUX | |
| UINT64_C(2080374826), // LDX | |
| UINT64_C(2080374826), // LDXTLS | |
| UINT64_C(2080374826), // LDXTLS_ | |
| UINT64_C(0), // LDgotTprelL | |
| UINT64_C(0), // LDgotTprelL32 | |
| UINT64_C(0), // LDtoc | |
| UINT64_C(0), // LDtocBA | |
| UINT64_C(0), // LDtocCPT | |
| UINT64_C(0), // LDtocJTI | |
| UINT64_C(0), // LDtocL | |
| UINT64_C(3355443200), // LFD | |
| UINT64_C(2080375998), // LFDEPX | |
| UINT64_C(3422552064), // LFDU | |
| UINT64_C(2080376046), // LFDUX | |
| UINT64_C(2080375982), // LFDX | |
| UINT64_C(2080376494), // LFIWAX | |
| UINT64_C(2080376558), // LFIWZX | |
| UINT64_C(3221225472), // LFS | |
| UINT64_C(3288334336), // LFSU | |
| UINT64_C(2080375918), // LFSUX | |
| UINT64_C(2080375854), // LFSX | |
| UINT64_C(2818572288), // LHA | |
| UINT64_C(2818572288), // LHA8 | |
| UINT64_C(2080375016), // LHARX | |
| UINT64_C(2080375017), // LHARXL | |
| UINT64_C(2885681152), // LHAU | |
| UINT64_C(2885681152), // LHAU8 | |
| UINT64_C(2080375534), // LHAUX | |
| UINT64_C(2080375534), // LHAUX8 | |
| UINT64_C(2080375470), // LHAX | |
| UINT64_C(2080375470), // LHAX8 | |
| UINT64_C(2080376364), // LHBRX | |
| UINT64_C(2080376364), // LHBRX8 | |
| UINT64_C(2080375358), // LHEPX | |
| UINT64_C(2684354560), // LHZ | |
| UINT64_C(2684354560), // LHZ8 | |
| UINT64_C(2080376426), // LHZCIX | |
| UINT64_C(2751463424), // LHZU | |
| UINT64_C(2751463424), // LHZU8 | |
| UINT64_C(2080375406), // LHZUX | |
| UINT64_C(2080375406), // LHZUX8 | |
| UINT64_C(2080375342), // LHZX | |
| UINT64_C(2080375342), // LHZX8 | |
| UINT64_C(2080375342), // LHZXTLS | |
| UINT64_C(2080375342), // LHZXTLS_ | |
| UINT64_C(2080375342), // LHZXTLS_32 | |
| UINT64_C(939524096), // LI | |
| UINT64_C(939524096), // LI8 | |
| UINT64_C(1006632960), // LIS | |
| UINT64_C(1006632960), // LIS8 | |
| UINT64_C(3087007744), // LMW | |
| UINT64_C(3758096384), // LQ | |
| UINT64_C(2080375336), // LQARX | |
| UINT64_C(2080375337), // LQARXL | |
| UINT64_C(0), // LQX_PSEUDO | |
| UINT64_C(2080375978), // LSWI | |
| UINT64_C(2080374798), // LVEBX | |
| UINT64_C(2080374862), // LVEHX | |
| UINT64_C(2080374926), // LVEWX | |
| UINT64_C(2080374796), // LVSL | |
| UINT64_C(2080374860), // LVSR | |
| UINT64_C(2080374990), // LVX | |
| UINT64_C(2080375502), // LVXL | |
| UINT64_C(3892314114), // LWA | |
| UINT64_C(2080374824), // LWARX | |
| UINT64_C(2080374825), // LWARXL | |
| UINT64_C(2080375948), // LWAT | |
| UINT64_C(2080375530), // LWAUX | |
| UINT64_C(2080375466), // LWAX | |
| UINT64_C(2080375466), // LWAX_32 | |
| UINT64_C(3892314114), // LWA_32 | |
| UINT64_C(2080375852), // LWBRX | |
| UINT64_C(2080375852), // LWBRX8 | |
| UINT64_C(2080374846), // LWEPX | |
| UINT64_C(2147483648), // LWZ | |
| UINT64_C(2147483648), // LWZ8 | |
| UINT64_C(2080376362), // LWZCIX | |
| UINT64_C(2214592512), // LWZU | |
| UINT64_C(2214592512), // LWZU8 | |
| UINT64_C(2080374894), // LWZUX | |
| UINT64_C(2080374894), // LWZUX8 | |
| UINT64_C(2080374830), // LWZX | |
| UINT64_C(2080374830), // LWZX8 | |
| UINT64_C(2080374830), // LWZXTLS | |
| UINT64_C(2080374830), // LWZXTLS_ | |
| UINT64_C(2080374830), // LWZXTLS_32 | |
| UINT64_C(0), // LWZtoc | |
| UINT64_C(0), // LWZtocL | |
| UINT64_C(3825205250), // LXSD | |
| UINT64_C(2080375960), // LXSDX | |
| UINT64_C(2080376346), // LXSIBZX | |
| UINT64_C(2080376410), // LXSIHZX | |
| UINT64_C(2080374936), // LXSIWAX | |
| UINT64_C(2080374808), // LXSIWZX | |
| UINT64_C(3825205251), // LXSSP | |
| UINT64_C(2080375832), // LXSSPX | |
| UINT64_C(4093640705), // LXV | |
| UINT64_C(2080376536), // LXVB16X | |
| UINT64_C(2080376472), // LXVD2X | |
| UINT64_C(2080375448), // LXVDSX | |
| UINT64_C(2080376408), // LXVH8X | |
| UINT64_C(4028564176), // LXVKQ | |
| UINT64_C(2080375322), // LXVL | |
| UINT64_C(2080375386), // LXVLL | |
| UINT64_C(402653184), // LXVP | |
| UINT64_C(2080375962), // LXVPRL | |
| UINT64_C(2080376026), // LXVPRLL | |
| UINT64_C(2080375450), // LXVPX | |
| UINT64_C(2080374810), // LXVRBX | |
| UINT64_C(2080375002), // LXVRDX | |
| UINT64_C(2080374874), // LXVRHX | |
| UINT64_C(2080375834), // LXVRL | |
| UINT64_C(2080375898), // LXVRLL | |
| UINT64_C(2080374938), // LXVRWX | |
| UINT64_C(2080376344), // LXVW4X | |
| UINT64_C(2080375512), // LXVWSX | |
| UINT64_C(2080375320), // LXVX | |
| UINT64_C(268435504), // MADDHD | |
| UINT64_C(268435505), // MADDHDU | |
| UINT64_C(268435507), // MADDLD | |
| UINT64_C(268435507), // MADDLD8 | |
| UINT64_C(2080376492), // MBAR | |
| UINT64_C(1275068416), // MCRF | |
| UINT64_C(4227858560), // MCRFS | |
| UINT64_C(2080375936), // MCRXRX | |
| UINT64_C(2080375388), // MFBHRBE | |
| UINT64_C(2080374822), // MFCR | |
| UINT64_C(2080374822), // MFCR8 | |
| UINT64_C(2080965286), // MFCTR | |
| UINT64_C(2080965286), // MFCTR8 | |
| UINT64_C(2080375430), // MFDCR | |
| UINT64_C(4227859598), // MFFS | |
| UINT64_C(4229170318), // MFFSCDRN | |
| UINT64_C(4229235854), // MFFSCDRNI | |
| UINT64_C(4227925134), // MFFSCE | |
| UINT64_C(4229301390), // MFFSCRN | |
| UINT64_C(4229366926), // MFFSCRNI | |
| UINT64_C(4229432462), // MFFSL | |
| UINT64_C(4227859599), // MFFS_rec | |
| UINT64_C(2080899750), // MFLR | |
| UINT64_C(2080899750), // MFLR8 | |
| UINT64_C(2080374950), // MFMSR | |
| UINT64_C(2081423398), // MFOCRF | |
| UINT64_C(2081423398), // MFOCRF8 | |
| UINT64_C(2080375452), // MFPMR | |
| UINT64_C(2080375462), // MFSPR | |
| UINT64_C(2080375462), // MFSPR8 | |
| UINT64_C(2080375974), // MFSR | |
| UINT64_C(2080376102), // MFSRIN | |
| UINT64_C(2080375526), // MFTB | |
| UINT64_C(2081178278), // MFTB8 | |
| UINT64_C(2080572070), // MFUDSCR | |
| UINT64_C(2080374886), // MFVRD | |
| UINT64_C(2080391846), // MFVRSAVE | |
| UINT64_C(2080391846), // MFVRSAVEv | |
| UINT64_C(2080375014), // MFVRWZ | |
| UINT64_C(268436996), // MFVSCR | |
| UINT64_C(2080374886), // MFVSRD | |
| UINT64_C(2080375398), // MFVSRLD | |
| UINT64_C(2080375014), // MFVSRWZ | |
| UINT64_C(2080376338), // MODSD | |
| UINT64_C(2080376342), // MODSW | |
| UINT64_C(2080375314), // MODUD | |
| UINT64_C(2080375318), // MODUW | |
| UINT64_C(2080376556), // MSGSYNC | |
| UINT64_C(2080375980), // MSYNC | |
| UINT64_C(2080375072), // MTCRF | |
| UINT64_C(2080375072), // MTCRF8 | |
| UINT64_C(2080965542), // MTCTR | |
| UINT64_C(2080965542), // MTCTR8 | |
| UINT64_C(2080965542), // MTCTR8loop | |
| UINT64_C(2080965542), // MTCTRloop | |
| UINT64_C(2080375686), // MTDCR | |
| UINT64_C(4227858572), // MTFSB0 | |
| UINT64_C(4227858508), // MTFSB1 | |
| UINT64_C(4227859854), // MTFSF | |
| UINT64_C(4227858700), // MTFSFI | |
| UINT64_C(4227858701), // MTFSFI_rec | |
| UINT64_C(4227858700), // MTFSFIb | |
| UINT64_C(4227859855), // MTFSF_rec | |
| UINT64_C(4227859854), // MTFSFb | |
| UINT64_C(2080900006), // MTLR | |
| UINT64_C(2080900006), // MTLR8 | |
| UINT64_C(2080375076), // MTMSR | |
| UINT64_C(2080375140), // MTMSRD | |
| UINT64_C(2081423648), // MTOCRF | |
| UINT64_C(2081423648), // MTOCRF8 | |
| UINT64_C(2080375708), // MTPMR | |
| UINT64_C(2080375718), // MTSPR | |
| UINT64_C(2080375718), // MTSPR8 | |
| UINT64_C(2080375204), // MTSR | |
| UINT64_C(2080375268), // MTSRIN | |
| UINT64_C(2080572326), // MTUDSCR | |
| UINT64_C(2080375142), // MTVRD | |
| UINT64_C(2080392102), // MTVRSAVE | |
| UINT64_C(2080392102), // MTVRSAVEv | |
| UINT64_C(2080375206), // MTVRWA | |
| UINT64_C(2080375270), // MTVRWZ | |
| UINT64_C(268437060), // MTVSCR | |
| UINT64_C(269485634), // MTVSRBM | |
| UINT64_C(268435476), // MTVSRBMI | |
| UINT64_C(2080375142), // MTVSRD | |
| UINT64_C(2080375654), // MTVSRDD | |
| UINT64_C(269682242), // MTVSRDM | |
| UINT64_C(269551170), // MTVSRHM | |
| UINT64_C(269747778), // MTVSRQM | |
| UINT64_C(2080375206), // MTVSRWA | |
| UINT64_C(269616706), // MTVSRWM | |
| UINT64_C(2080375590), // MTVSRWS | |
| UINT64_C(2080375270), // MTVSRWZ | |
| UINT64_C(2080374930), // MULHD | |
| UINT64_C(2080374802), // MULHDU | |
| UINT64_C(2080374803), // MULHDU_rec | |
| UINT64_C(2080374931), // MULHD_rec | |
| UINT64_C(2080374934), // MULHW | |
| UINT64_C(2080374806), // MULHWU | |
| UINT64_C(2080374807), // MULHWU_rec | |
| UINT64_C(2080374935), // MULHW_rec | |
| UINT64_C(2080375250), // MULLD | |
| UINT64_C(2080376274), // MULLDO | |
| UINT64_C(2080376275), // MULLDO_rec | |
| UINT64_C(2080375251), // MULLD_rec | |
| UINT64_C(469762048), // MULLI | |
| UINT64_C(469762048), // MULLI8 | |
| UINT64_C(2080375254), // MULLW | |
| UINT64_C(2080376278), // MULLWO | |
| UINT64_C(2080376279), // MULLWO_rec | |
| UINT64_C(2080375255), // MULLW_rec | |
| UINT64_C(0), // MoveGOTtoLR | |
| UINT64_C(0), // MovePCtoLR | |
| UINT64_C(0), // MovePCtoLR8 | |
| UINT64_C(2080375736), // NAND | |
| UINT64_C(2080375736), // NAND8 | |
| UINT64_C(2080375737), // NAND8_rec | |
| UINT64_C(2080375737), // NAND_rec | |
| UINT64_C(1275069284), // NAP | |
| UINT64_C(2080374992), // NEG | |
| UINT64_C(2080374992), // NEG8 | |
| UINT64_C(2080376016), // NEG8O | |
| UINT64_C(2080376017), // NEG8O_rec | |
| UINT64_C(2080374993), // NEG8_rec | |
| UINT64_C(2080376016), // NEGO | |
| UINT64_C(2080376017), // NEGO_rec | |
| UINT64_C(2080374993), // NEG_rec | |
| UINT64_C(1610612736), // NOP | |
| UINT64_C(1612775424), // NOP_GT_PWR6 | |
| UINT64_C(1614938112), // NOP_GT_PWR7 | |
| UINT64_C(2080375032), // NOR | |
| UINT64_C(2080375032), // NOR8 | |
| UINT64_C(2080375033), // NOR8_rec | |
| UINT64_C(2080375033), // NOR_rec | |
| UINT64_C(2080375672), // OR | |
| UINT64_C(2080375672), // OR8 | |
| UINT64_C(2080375673), // OR8_rec | |
| UINT64_C(2080375608), // ORC | |
| UINT64_C(2080375608), // ORC8 | |
| UINT64_C(2080375609), // ORC8_rec | |
| UINT64_C(2080375609), // ORC_rec | |
| UINT64_C(1610612736), // ORI | |
| UINT64_C(1610612736), // ORI8 | |
| UINT64_C(1677721600), // ORIS | |
| UINT64_C(1677721600), // ORIS8 | |
| UINT64_C(2080375673), // OR_rec | |
| UINT64_C(432345565167091712), // PADDI | |
| UINT64_C(432345565167091712), // PADDI8 | |
| UINT64_C(436849164794462208), // PADDI8pc | |
| UINT64_C(0), // PADDIdtprel | |
| UINT64_C(436849164794462208), // PADDIpc | |
| UINT64_C(2080375096), // PDEPD | |
| UINT64_C(2080375160), // PEXTD | |
| UINT64_C(432345566509268992), // PLBZ | |
| UINT64_C(432345566509268992), // PLBZ8 | |
| UINT64_C(436849166136639488), // PLBZ8pc | |
| UINT64_C(436849166136639488), // PLBZpc | |
| UINT64_C(288230379976916992), // PLD | |
| UINT64_C(292733979604287488), // PLDpc | |
| UINT64_C(432345567583010816), // PLFD | |
| UINT64_C(436849167210381312), // PLFDpc | |
| UINT64_C(432345567448793088), // PLFS | |
| UINT64_C(436849167076163584), // PLFSpc | |
| UINT64_C(432345567046139904), // PLHA | |
| UINT64_C(432345567046139904), // PLHA8 | |
| UINT64_C(436849166673510400), // PLHA8pc | |
| UINT64_C(436849166673510400), // PLHApc | |
| UINT64_C(432345566911922176), // PLHZ | |
| UINT64_C(432345566911922176), // PLHZ8 | |
| UINT64_C(436849166539292672), // PLHZ8pc | |
| UINT64_C(436849166539292672), // PLHZpc | |
| UINT64_C(432345565167091712), // PLI | |
| UINT64_C(432345565167091712), // PLI8 | |
| UINT64_C(288230378903175168), // PLWA | |
| UINT64_C(288230378903175168), // PLWA8 | |
| UINT64_C(292733978530545664), // PLWA8pc | |
| UINT64_C(292733978530545664), // PLWApc | |
| UINT64_C(432345566375051264), // PLWZ | |
| UINT64_C(432345566375051264), // PLWZ8 | |
| UINT64_C(436849166002421760), // PLWZ8pc | |
| UINT64_C(436849166002421760), // PLWZpc | |
| UINT64_C(288230378970284032), // PLXSD | |
| UINT64_C(292733978597654528), // PLXSDpc | |
| UINT64_C(288230379037392896), // PLXSSP | |
| UINT64_C(292733978664763392), // PLXSSPpc | |
| UINT64_C(288230379507154944), // PLXV | |
| UINT64_C(288230380044025856), // PLXVP | |
| UINT64_C(292733979671396352), // PLXVPpc | |
| UINT64_C(292733979134525440), // PLXVpc | |
| UINT64_C(544935558871253400), // PMXVBF16GER2 | |
| UINT64_C(544935558871254928), // PMXVBF16GER2NN | |
| UINT64_C(544935558871253904), // PMXVBF16GER2NP | |
| UINT64_C(544935558871254416), // PMXVBF16GER2PN | |
| UINT64_C(544935558871253392), // PMXVBF16GER2PP | |
| UINT64_C(544935558871253400), // PMXVBF16GER2W | |
| UINT64_C(544935558871254928), // PMXVBF16GER2WNN | |
| UINT64_C(544935558871253904), // PMXVBF16GER2WNP | |
| UINT64_C(544935558871254416), // PMXVBF16GER2WPN | |
| UINT64_C(544935558871253392), // PMXVBF16GER2WPP | |
| UINT64_C(544935558871253144), // PMXVF16GER2 | |
| UINT64_C(544935558871254672), // PMXVF16GER2NN | |
| UINT64_C(544935558871253648), // PMXVF16GER2NP | |
| UINT64_C(544935558871254160), // PMXVF16GER2PN | |
| UINT64_C(544935558871253136), // PMXVF16GER2PP | |
| UINT64_C(544935558871253144), // PMXVF16GER2W | |
| UINT64_C(544935558871254672), // PMXVF16GER2WNN | |
| UINT64_C(544935558871253648), // PMXVF16GER2WNP | |
| UINT64_C(544935558871254160), // PMXVF16GER2WPN | |
| UINT64_C(544935558871253136), // PMXVF16GER2WPP | |
| UINT64_C(544935558871253208), // PMXVF32GER | |
| UINT64_C(544935558871254736), // PMXVF32GERNN | |
| UINT64_C(544935558871253712), // PMXVF32GERNP | |
| UINT64_C(544935558871254224), // PMXVF32GERPN | |
| UINT64_C(544935558871253200), // PMXVF32GERPP | |
| UINT64_C(544935558871253208), // PMXVF32GERW | |
| UINT64_C(544935558871254736), // PMXVF32GERWNN | |
| UINT64_C(544935558871253712), // PMXVF32GERWNP | |
| UINT64_C(544935558871254224), // PMXVF32GERWPN | |
| UINT64_C(544935558871253200), // PMXVF32GERWPP | |
| UINT64_C(544935558871253464), // PMXVF64GER | |
| UINT64_C(544935558871254992), // PMXVF64GERNN | |
| UINT64_C(544935558871253968), // PMXVF64GERNP | |
| UINT64_C(544935558871254480), // PMXVF64GERPN | |
| UINT64_C(544935558871253456), // PMXVF64GERPP | |
| UINT64_C(544935558871253464), // PMXVF64GERW | |
| UINT64_C(544935558871254992), // PMXVF64GERWNN | |
| UINT64_C(544935558871253968), // PMXVF64GERWNP | |
| UINT64_C(544935558871254480), // PMXVF64GERWPN | |
| UINT64_C(544935558871253456), // PMXVF64GERWPP | |
| UINT64_C(544935558871253592), // PMXVI16GER2 | |
| UINT64_C(544935558871253848), // PMXVI16GER2PP | |
| UINT64_C(544935558871253336), // PMXVI16GER2S | |
| UINT64_C(544935558871253328), // PMXVI16GER2SPP | |
| UINT64_C(544935558871253336), // PMXVI16GER2SW | |
| UINT64_C(544935558871253328), // PMXVI16GER2SWPP | |
| UINT64_C(544935558871253592), // PMXVI16GER2W | |
| UINT64_C(544935558871253848), // PMXVI16GER2WPP | |
| UINT64_C(544935558871253272), // PMXVI4GER8 | |
| UINT64_C(544935558871253264), // PMXVI4GER8PP | |
| UINT64_C(544935558871253272), // PMXVI4GER8W | |
| UINT64_C(544935558871253264), // PMXVI4GER8WPP | |
| UINT64_C(544935558871253016), // PMXVI8GER4 | |
| UINT64_C(544935558871253008), // PMXVI8GER4PP | |
| UINT64_C(544935558871253784), // PMXVI8GER4SPP | |
| UINT64_C(544935558871253016), // PMXVI8GER4W | |
| UINT64_C(544935558871253008), // PMXVI8GER4WPP | |
| UINT64_C(544935558871253784), // PMXVI8GER4WSPP | |
| UINT64_C(2080375028), // POPCNTB | |
| UINT64_C(2080375028), // POPCNTB8 | |
| UINT64_C(2080375796), // POPCNTD | |
| UINT64_C(2080375540), // POPCNTW | |
| UINT64_C(0), // PPC32GOT | |
| UINT64_C(0), // PPC32PICGOT | |
| UINT64_C(0), // PREPARE_PROBED_ALLOCA_32 | |
| UINT64_C(0), // PREPARE_PROBED_ALLOCA_64 | |
| UINT64_C(0), // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 | |
| UINT64_C(0), // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 | |
| UINT64_C(0), // PROBED_ALLOCA_32 | |
| UINT64_C(0), // PROBED_ALLOCA_64 | |
| UINT64_C(0), // PROBED_STACKALLOC_32 | |
| UINT64_C(0), // PROBED_STACKALLOC_64 | |
| UINT64_C(432345566777704448), // PSTB | |
| UINT64_C(432345566777704448), // PSTB8 | |
| UINT64_C(436849166405074944), // PSTB8pc | |
| UINT64_C(436849166405074944), // PSTBpc | |
| UINT64_C(288230380245352448), // PSTD | |
| UINT64_C(292733979872722944), // PSTDpc | |
| UINT64_C(432345567851446272), // PSTFD | |
| UINT64_C(436849167478816768), // PSTFDpc | |
| UINT64_C(432345567717228544), // PSTFS | |
| UINT64_C(436849167344599040), // PSTFSpc | |
| UINT64_C(432345567180357632), // PSTH | |
| UINT64_C(432345567180357632), // PSTH8 | |
| UINT64_C(436849166807728128), // PSTH8pc | |
| UINT64_C(436849166807728128), // PSTHpc | |
| UINT64_C(432345566643486720), // PSTW | |
| UINT64_C(432345566643486720), // PSTW8 | |
| UINT64_C(436849166270857216), // PSTW8pc | |
| UINT64_C(436849166270857216), // PSTWpc | |
| UINT64_C(288230379238719488), // PSTXSD | |
| UINT64_C(292733978866089984), // PSTXSDpc | |
| UINT64_C(288230379305828352), // PSTXSSP | |
| UINT64_C(292733978933198848), // PSTXSSPpc | |
| UINT64_C(288230379775590400), // PSTXV | |
| UINT64_C(288230380312461312), // PSTXVP | |
| UINT64_C(292733979939831808), // PSTXVPpc | |
| UINT64_C(292733979402960896), // PSTXVpc | |
| UINT64_C(0), // PseudoEIEIO | |
| UINT64_C(0), // RESTORE_ACC | |
| UINT64_C(0), // RESTORE_CR | |
| UINT64_C(0), // RESTORE_CRBIT | |
| UINT64_C(0), // RESTORE_QUADWORD | |
| UINT64_C(0), // RESTORE_UACC | |
| UINT64_C(0), // RESTORE_WACC | |
| UINT64_C(1275068518), // RFCI | |
| UINT64_C(1275068494), // RFDI | |
| UINT64_C(1275068708), // RFEBB | |
| UINT64_C(1275068516), // RFI | |
| UINT64_C(1275068452), // RFID | |
| UINT64_C(1275068492), // RFMCI | |
| UINT64_C(2013265936), // RLDCL | |
| UINT64_C(2013265937), // RLDCL_rec | |
| UINT64_C(2013265938), // RLDCR | |
| UINT64_C(2013265939), // RLDCR_rec | |
| UINT64_C(2013265928), // RLDIC | |
| UINT64_C(2013265920), // RLDICL | |
| UINT64_C(2013265920), // RLDICL_32 | |
| UINT64_C(2013265920), // RLDICL_32_64 | |
| UINT64_C(2013265921), // RLDICL_32_rec | |
| UINT64_C(2013265921), // RLDICL_rec | |
| UINT64_C(2013265924), // RLDICR | |
| UINT64_C(2013265924), // RLDICR_32 | |
| UINT64_C(2013265925), // RLDICR_rec | |
| UINT64_C(2013265929), // RLDIC_rec | |
| UINT64_C(2013265932), // RLDIMI | |
| UINT64_C(2013265933), // RLDIMI_rec | |
| UINT64_C(1342177280), // RLWIMI | |
| UINT64_C(1342177280), // RLWIMI8 | |
| UINT64_C(1342177281), // RLWIMI8_rec | |
| UINT64_C(1342177281), // RLWIMI_rec | |
| UINT64_C(1409286144), // RLWINM | |
| UINT64_C(1409286144), // RLWINM8 | |
| UINT64_C(1409286145), // RLWINM8_rec | |
| UINT64_C(1409286145), // RLWINM_rec | |
| UINT64_C(1543503872), // RLWNM | |
| UINT64_C(1543503872), // RLWNM8 | |
| UINT64_C(1543503873), // RLWNM8_rec | |
| UINT64_C(1543503873), // RLWNM_rec | |
| UINT64_C(0), // ReadTB | |
| UINT64_C(1140850690), // SC | |
| UINT64_C(0), // SELECT_CC_F16 | |
| UINT64_C(0), // SELECT_CC_F4 | |
| UINT64_C(0), // SELECT_CC_F8 | |
| UINT64_C(0), // SELECT_CC_I4 | |
| UINT64_C(0), // SELECT_CC_I8 | |
| UINT64_C(0), // SELECT_CC_SPE | |
| UINT64_C(0), // SELECT_CC_SPE4 | |
| UINT64_C(0), // SELECT_CC_VRRC | |
| UINT64_C(0), // SELECT_CC_VSFRC | |
| UINT64_C(0), // SELECT_CC_VSRC | |
| UINT64_C(0), // SELECT_CC_VSSRC | |
| UINT64_C(0), // SELECT_F16 | |
| UINT64_C(0), // SELECT_F4 | |
| UINT64_C(0), // SELECT_F8 | |
| UINT64_C(0), // SELECT_I4 | |
| UINT64_C(0), // SELECT_I8 | |
| UINT64_C(0), // SELECT_SPE | |
| UINT64_C(0), // SELECT_SPE4 | |
| UINT64_C(0), // SELECT_VRRC | |
| UINT64_C(0), // SELECT_VSFRC | |
| UINT64_C(0), // SELECT_VSRC | |
| UINT64_C(0), // SELECT_VSSRC | |
| UINT64_C(2080375040), // SETB | |
| UINT64_C(2080375040), // SETB8 | |
| UINT64_C(2080375552), // SETBC | |
| UINT64_C(2080375552), // SETBC8 | |
| UINT64_C(2080375616), // SETBCR | |
| UINT64_C(2080375616), // SETBCR8 | |
| UINT64_C(0), // SETFLM | |
| UINT64_C(2080375680), // SETNBC | |
| UINT64_C(2080375680), // SETNBC8 | |
| UINT64_C(2080375744), // SETNBCR | |
| UINT64_C(2080375744), // SETNBCR8 | |
| UINT64_C(0), // SETRND | |
| UINT64_C(0), // SETRNDi | |
| UINT64_C(2080376743), // SLBFEE_rec | |
| UINT64_C(2080375780), // SLBIA | |
| UINT64_C(2080375652), // SLBIE | |
| UINT64_C(2080375716), // SLBIEG | |
| UINT64_C(2080376614), // SLBMFEE | |
| UINT64_C(2080376486), // SLBMFEV | |
| UINT64_C(2080375588), // SLBMTE | |
| UINT64_C(2080375460), // SLBSYNC | |
| UINT64_C(2080374838), // SLD | |
| UINT64_C(2080374839), // SLD_rec | |
| UINT64_C(2080374832), // SLW | |
| UINT64_C(2080374832), // SLW8 | |
| UINT64_C(2080374833), // SLW8_rec | |
| UINT64_C(2080374833), // SLW_rec | |
| UINT64_C(2147483648), // SPELWZ | |
| UINT64_C(2080374830), // SPELWZX | |
| UINT64_C(2415919104), // SPESTW | |
| UINT64_C(2080375086), // SPESTWX | |
| UINT64_C(0), // SPILL_ACC | |
| UINT64_C(0), // SPILL_CR | |
| UINT64_C(0), // SPILL_CRBIT | |
| UINT64_C(0), // SPILL_QUADWORD | |
| UINT64_C(0), // SPILL_UACC | |
| UINT64_C(0), // SPILL_WACC | |
| UINT64_C(0), // SPLIT_QUADWORD | |
| UINT64_C(2080376372), // SRAD | |
| UINT64_C(2080376436), // SRADI | |
| UINT64_C(2080376436), // SRADI_32 | |
| UINT64_C(2080376437), // SRADI_rec | |
| UINT64_C(2080376373), // SRAD_rec | |
| UINT64_C(2080376368), // SRAW | |
| UINT64_C(2080376432), // SRAWI | |
| UINT64_C(2080376433), // SRAWI_rec | |
| UINT64_C(2080376369), // SRAW_rec | |
| UINT64_C(2080375862), // SRD | |
| UINT64_C(2080375863), // SRD_rec | |
| UINT64_C(2080375856), // SRW | |
| UINT64_C(2080375856), // SRW8 | |
| UINT64_C(2080375857), // SRW8_rec | |
| UINT64_C(2080375857), // SRW_rec | |
| UINT64_C(2550136832), // STB | |
| UINT64_C(2550136832), // STB8 | |
| UINT64_C(2080376746), // STBCIX | |
| UINT64_C(2080376173), // STBCX | |
| UINT64_C(2080375230), // STBEPX | |
| UINT64_C(2617245696), // STBU | |
| UINT64_C(2617245696), // STBU8 | |
| UINT64_C(2080375278), // STBUX | |
| UINT64_C(2080375278), // STBUX8 | |
| UINT64_C(2080375214), // STBX | |
| UINT64_C(2080375214), // STBX8 | |
| UINT64_C(2080375214), // STBXTLS | |
| UINT64_C(2080375214), // STBXTLS_ | |
| UINT64_C(2080375214), // STBXTLS_32 | |
| UINT64_C(4160749568), // STD | |
| UINT64_C(2080376268), // STDAT | |
| UINT64_C(2080376104), // STDBRX | |
| UINT64_C(2080376810), // STDCIX | |
| UINT64_C(2080375213), // STDCX | |
| UINT64_C(4160749569), // STDU | |
| UINT64_C(2080375146), // STDUX | |
| UINT64_C(2080375082), // STDX | |
| UINT64_C(2080375082), // STDXTLS | |
| UINT64_C(2080375082), // STDXTLS_ | |
| UINT64_C(3623878656), // STFD | |
| UINT64_C(2080376254), // STFDEPX | |
| UINT64_C(3690987520), // STFDU | |
| UINT64_C(2080376302), // STFDUX | |
| UINT64_C(2080376238), // STFDX | |
| UINT64_C(2080376750), // STFIWX | |
| UINT64_C(3489660928), // STFS | |
| UINT64_C(3556769792), // STFSU | |
| UINT64_C(2080376174), // STFSUX | |
| UINT64_C(2080376110), // STFSX | |
| UINT64_C(2952790016), // STH | |
| UINT64_C(2952790016), // STH8 | |
| UINT64_C(2080376620), // STHBRX | |
| UINT64_C(2080376682), // STHCIX | |
| UINT64_C(2080376237), // STHCX | |
| UINT64_C(2080375614), // STHEPX | |
| UINT64_C(3019898880), // STHU | |
| UINT64_C(3019898880), // STHU8 | |
| UINT64_C(2080375662), // STHUX | |
| UINT64_C(2080375662), // STHUX8 | |
| UINT64_C(2080375598), // STHX | |
| UINT64_C(2080375598), // STHX8 | |
| UINT64_C(2080375598), // STHXTLS | |
| UINT64_C(2080375598), // STHXTLS_ | |
| UINT64_C(2080375598), // STHXTLS_32 | |
| UINT64_C(3154116608), // STMW | |
| UINT64_C(1275069156), // STOP | |
| UINT64_C(4160749570), // STQ | |
| UINT64_C(2080375149), // STQCX | |
| UINT64_C(0), // STQX_PSEUDO | |
| UINT64_C(2080376234), // STSWI | |
| UINT64_C(2080375054), // STVEBX | |
| UINT64_C(2080375118), // STVEHX | |
| UINT64_C(2080375182), // STVEWX | |
| UINT64_C(2080375246), // STVX | |
| UINT64_C(2080375758), // STVXL | |
| UINT64_C(2415919104), // STW | |
| UINT64_C(2415919104), // STW8 | |
| UINT64_C(2080376204), // STWAT | |
| UINT64_C(2080376108), // STWBRX | |
| UINT64_C(2080376618), // STWCIX | |
| UINT64_C(2080375085), // STWCX | |
| UINT64_C(2080375102), // STWEPX | |
| UINT64_C(2483027968), // STWU | |
| UINT64_C(2483027968), // STWU8 | |
| UINT64_C(2080375150), // STWUX | |
| UINT64_C(2080375150), // STWUX8 | |
| UINT64_C(2080375086), // STWX | |
| UINT64_C(2080375086), // STWX8 | |
| UINT64_C(2080375086), // STWXTLS | |
| UINT64_C(2080375086), // STWXTLS_ | |
| UINT64_C(2080375086), // STWXTLS_32 | |
| UINT64_C(4093640706), // STXSD | |
| UINT64_C(2080376216), // STXSDX | |
| UINT64_C(2080376602), // STXSIBX | |
| UINT64_C(2080376602), // STXSIBXv | |
| UINT64_C(2080376666), // STXSIHX | |
| UINT64_C(2080376666), // STXSIHXv | |
| UINT64_C(2080375064), // STXSIWX | |
| UINT64_C(4093640707), // STXSSP | |
| UINT64_C(2080376088), // STXSSPX | |
| UINT64_C(4093640709), // STXV | |
| UINT64_C(2080376792), // STXVB16X | |
| UINT64_C(2080376728), // STXVD2X | |
| UINT64_C(2080376664), // STXVH8X | |
| UINT64_C(2080375578), // STXVL | |
| UINT64_C(2080375642), // STXVLL | |
| UINT64_C(402653185), // STXVP | |
| UINT64_C(2080376218), // STXVPRL | |
| UINT64_C(2080376282), // STXVPRLL | |
| UINT64_C(2080375706), // STXVPX | |
| UINT64_C(2080375066), // STXVRBX | |
| UINT64_C(2080375258), // STXVRDX | |
| UINT64_C(2080375130), // STXVRHX | |
| UINT64_C(2080376090), // STXVRL | |
| UINT64_C(2080376154), // STXVRLL | |
| UINT64_C(2080375194), // STXVRWX | |
| UINT64_C(2080376600), // STXVW4X | |
| UINT64_C(2080375576), // STXVX | |
| UINT64_C(2080374864), // SUBF | |
| UINT64_C(2080374864), // SUBF8 | |
| UINT64_C(2080375888), // SUBF8O | |
| UINT64_C(2080375889), // SUBF8O_rec | |
| UINT64_C(2080374865), // SUBF8_rec | |
| UINT64_C(2080374800), // SUBFC | |
| UINT64_C(2080374800), // SUBFC8 | |
| UINT64_C(2080375824), // SUBFC8O | |
| UINT64_C(2080375825), // SUBFC8O_rec | |
| UINT64_C(2080374801), // SUBFC8_rec | |
| UINT64_C(2080375824), // SUBFCO | |
| UINT64_C(2080375825), // SUBFCO_rec | |
| UINT64_C(2080374801), // SUBFC_rec | |
| UINT64_C(2080375056), // SUBFE | |
| UINT64_C(2080375056), // SUBFE8 | |
| UINT64_C(2080376080), // SUBFE8O | |
| UINT64_C(2080376081), // SUBFE8O_rec | |
| UINT64_C(2080375057), // SUBFE8_rec | |
| UINT64_C(2080376080), // SUBFEO | |
| UINT64_C(2080376081), // SUBFEO_rec | |
| UINT64_C(2080375057), // SUBFE_rec | |
| UINT64_C(536870912), // SUBFIC | |
| UINT64_C(536870912), // SUBFIC8 | |
| UINT64_C(2080375248), // SUBFME | |
| UINT64_C(2080375248), // SUBFME8 | |
| UINT64_C(2080376272), // SUBFME8O | |
| UINT64_C(2080376273), // SUBFME8O_rec | |
| UINT64_C(2080375249), // SUBFME8_rec | |
| UINT64_C(2080376272), // SUBFMEO | |
| UINT64_C(2080376273), // SUBFMEO_rec | |
| UINT64_C(2080375249), // SUBFME_rec | |
| UINT64_C(2080375888), // SUBFO | |
| UINT64_C(2080375889), // SUBFO_rec | |
| UINT64_C(2080374928), // SUBFUS | |
| UINT64_C(2080374929), // SUBFUS_rec | |
| UINT64_C(2080375184), // SUBFZE | |
| UINT64_C(2080375184), // SUBFZE8 | |
| UINT64_C(2080376208), // SUBFZE8O | |
| UINT64_C(2080376209), // SUBFZE8O_rec | |
| UINT64_C(2080375185), // SUBFZE8_rec | |
| UINT64_C(2080376208), // SUBFZEO | |
| UINT64_C(2080376209), // SUBFZEO_rec | |
| UINT64_C(2080375185), // SUBFZE_rec | |
| UINT64_C(2080374865), // SUBF_rec | |
| UINT64_C(2080375980), // SYNC | |
| UINT64_C(2080376605), // TABORT | |
| UINT64_C(2080376413), // TABORTDC | |
| UINT64_C(2080376541), // TABORTDCI | |
| UINT64_C(2080376349), // TABORTWC | |
| UINT64_C(2080376477), // TABORTWCI | |
| UINT64_C(1207959552), // TAILB | |
| UINT64_C(1207959552), // TAILB8 | |
| UINT64_C(1207959552), // TAILBA | |
| UINT64_C(1207959552), // TAILBA8 | |
| UINT64_C(1317012512), // TAILBCTR | |
| UINT64_C(1317012512), // TAILBCTR8 | |
| UINT64_C(2080376093), // TBEGIN | |
| UINT64_C(0), // TBEGIN_RET | |
| UINT64_C(2080376220), // TCHECK | |
| UINT64_C(0), // TCHECK_RET | |
| UINT64_C(0), // TCRETURNai | |
| UINT64_C(0), // TCRETURNai8 | |
| UINT64_C(0), // TCRETURNdi | |
| UINT64_C(0), // TCRETURNdi8 | |
| UINT64_C(0), // TCRETURNri | |
| UINT64_C(0), // TCRETURNri8 | |
| UINT64_C(2080374920), // TD | |
| UINT64_C(134217728), // TDI | |
| UINT64_C(2080376157), // TEND | |
| UINT64_C(2080375524), // TLBIA | |
| UINT64_C(2080375396), // TLBIE | |
| UINT64_C(2080375332), // TLBIEL | |
| UINT64_C(2080376356), // TLBIVAX | |
| UINT64_C(2080376740), // TLBLD | |
| UINT64_C(2080376804), // TLBLI | |
| UINT64_C(2080376676), // TLBRE | |
| UINT64_C(2080376676), // TLBRE2 | |
| UINT64_C(2080376612), // TLBSX | |
| UINT64_C(2080376612), // TLBSX2 | |
| UINT64_C(2080376613), // TLBSX2D | |
| UINT64_C(2080375916), // TLBSYNC | |
| UINT64_C(2080376740), // TLBWE | |
| UINT64_C(2080376740), // TLBWE2 | |
| UINT64_C(0), // TLSGDAIX | |
| UINT64_C(0), // TLSGDAIX8 | |
| UINT64_C(2145386504), // TRAP | |
| UINT64_C(2080376797), // TRECHKPT | |
| UINT64_C(2080376669), // TRECLAIM | |
| UINT64_C(2080376285), // TSR | |
| UINT64_C(2080374792), // TW | |
| UINT64_C(201326592), // TWI | |
| UINT64_C(0), // UNENCODED_NOP | |
| UINT64_C(0), // UpdateGBR | |
| UINT64_C(268436483), // VABSDUB | |
| UINT64_C(268436547), // VABSDUH | |
| UINT64_C(268436611), // VABSDUW | |
| UINT64_C(268435776), // VADDCUQ | |
| UINT64_C(268435840), // VADDCUW | |
| UINT64_C(268435517), // VADDECUQ | |
| UINT64_C(268435516), // VADDEUQM | |
| UINT64_C(268435466), // VADDFP | |
| UINT64_C(268436224), // VADDSBS | |
| UINT64_C(268436288), // VADDSHS | |
| UINT64_C(268436352), // VADDSWS | |
| UINT64_C(268435456), // VADDUBM | |
| UINT64_C(268435968), // VADDUBS | |
| UINT64_C(268435648), // VADDUDM | |
| UINT64_C(268435520), // VADDUHM | |
| UINT64_C(268436032), // VADDUHS | |
| UINT64_C(268435712), // VADDUQM | |
| UINT64_C(268435584), // VADDUWM | |
| UINT64_C(268436096), // VADDUWS | |
| UINT64_C(268436484), // VAND | |
| UINT64_C(268436548), // VANDC | |
| UINT64_C(268436738), // VAVGSB | |
| UINT64_C(268436802), // VAVGSH | |
| UINT64_C(268436866), // VAVGSW | |
| UINT64_C(268436482), // VAVGUB | |
| UINT64_C(268436546), // VAVGUH | |
| UINT64_C(268436610), // VAVGUW | |
| UINT64_C(268436940), // VBPERMD | |
| UINT64_C(268436812), // VBPERMQ | |
| UINT64_C(268436298), // VCFSX | |
| UINT64_C(268436298), // VCFSX_0 | |
| UINT64_C(268436813), // VCFUGED | |
| UINT64_C(268436234), // VCFUX | |
| UINT64_C(268436234), // VCFUX_0 | |
| UINT64_C(268436744), // VCIPHER | |
| UINT64_C(268436745), // VCIPHERLAST | |
| UINT64_C(268435853), // VCLRLB | |
| UINT64_C(268435917), // VCLRRB | |
| UINT64_C(268437250), // VCLZB | |
| UINT64_C(268437442), // VCLZD | |
| UINT64_C(268437380), // VCLZDM | |
| UINT64_C(268437314), // VCLZH | |
| UINT64_C(268436994), // VCLZLSBB | |
| UINT64_C(268437378), // VCLZW | |
| UINT64_C(268436422), // VCMPBFP | |
| UINT64_C(268437446), // VCMPBFP_rec | |
| UINT64_C(268435654), // VCMPEQFP | |
| UINT64_C(268436678), // VCMPEQFP_rec | |
| UINT64_C(268435462), // VCMPEQUB | |
| UINT64_C(268436486), // VCMPEQUB_rec | |
| UINT64_C(268435655), // VCMPEQUD | |
| UINT64_C(268436679), // VCMPEQUD_rec | |
| UINT64_C(268435526), // VCMPEQUH | |
| UINT64_C(268436550), // VCMPEQUH_rec | |
| UINT64_C(268435911), // VCMPEQUQ | |
| UINT64_C(268436935), // VCMPEQUQ_rec | |
| UINT64_C(268435590), // VCMPEQUW | |
| UINT64_C(268436614), // VCMPEQUW_rec | |
| UINT64_C(268435910), // VCMPGEFP | |
| UINT64_C(268436934), // VCMPGEFP_rec | |
| UINT64_C(268436166), // VCMPGTFP | |
| UINT64_C(268437190), // VCMPGTFP_rec | |
| UINT64_C(268436230), // VCMPGTSB | |
| UINT64_C(268437254), // VCMPGTSB_rec | |
| UINT64_C(268436423), // VCMPGTSD | |
| UINT64_C(268437447), // VCMPGTSD_rec | |
| UINT64_C(268436294), // VCMPGTSH | |
| UINT64_C(268437318), // VCMPGTSH_rec | |
| UINT64_C(268436359), // VCMPGTSQ | |
| UINT64_C(268437383), // VCMPGTSQ_rec | |
| UINT64_C(268436358), // VCMPGTSW | |
| UINT64_C(268437382), // VCMPGTSW_rec | |
| UINT64_C(268435974), // VCMPGTUB | |
| UINT64_C(268436998), // VCMPGTUB_rec | |
| UINT64_C(268436167), // VCMPGTUD | |
| UINT64_C(268437191), // VCMPGTUD_rec | |
| UINT64_C(268436038), // VCMPGTUH | |
| UINT64_C(268437062), // VCMPGTUH_rec | |
| UINT64_C(268436103), // VCMPGTUQ | |
| UINT64_C(268437127), // VCMPGTUQ_rec | |
| UINT64_C(268436102), // VCMPGTUW | |
| UINT64_C(268437126), // VCMPGTUW_rec | |
| UINT64_C(268435463), // VCMPNEB | |
| UINT64_C(268436487), // VCMPNEB_rec | |
| UINT64_C(268435527), // VCMPNEH | |
| UINT64_C(268436551), // VCMPNEH_rec | |
| UINT64_C(268435591), // VCMPNEW | |
| UINT64_C(268436615), // VCMPNEW_rec | |
| UINT64_C(268435719), // VCMPNEZB | |
| UINT64_C(268436743), // VCMPNEZB_rec | |
| UINT64_C(268435783), // VCMPNEZH | |
| UINT64_C(268436807), // VCMPNEZH_rec | |
| UINT64_C(268435847), // VCMPNEZW | |
| UINT64_C(268436871), // VCMPNEZW_rec | |
| UINT64_C(268435777), // VCMPSQ | |
| UINT64_C(268435713), // VCMPUQ | |
| UINT64_C(270009922), // VCNTMBB | |
| UINT64_C(270403138), // VCNTMBD | |
| UINT64_C(270140994), // VCNTMBH | |
| UINT64_C(270272066), // VCNTMBW | |
| UINT64_C(268436426), // VCTSXS | |
| UINT64_C(268436426), // VCTSXS_0 | |
| UINT64_C(268436362), // VCTUXS | |
| UINT64_C(268436362), // VCTUXS_0 | |
| UINT64_C(270272002), // VCTZB | |
| UINT64_C(270468610), // VCTZD | |
| UINT64_C(268437444), // VCTZDM | |
| UINT64_C(270337538), // VCTZH | |
| UINT64_C(268502530), // VCTZLSBB | |
| UINT64_C(270403074), // VCTZW | |
| UINT64_C(268436427), // VDIVESD | |
| UINT64_C(268436235), // VDIVESQ | |
| UINT64_C(268436363), // VDIVESW | |
| UINT64_C(268436171), // VDIVEUD | |
| UINT64_C(268435979), // VDIVEUQ | |
| UINT64_C(268436107), // VDIVEUW | |
| UINT64_C(268435915), // VDIVSD | |
| UINT64_C(268435723), // VDIVSQ | |
| UINT64_C(268435851), // VDIVSW | |
| UINT64_C(268435659), // VDIVUD | |
| UINT64_C(268435467), // VDIVUQ | |
| UINT64_C(268435595), // VDIVUW | |
| UINT64_C(268437124), // VEQV | |
| UINT64_C(268437058), // VEXPANDBM | |
| UINT64_C(268633666), // VEXPANDDM | |
| UINT64_C(268502594), // VEXPANDHM | |
| UINT64_C(268699202), // VEXPANDQM | |
| UINT64_C(268568130), // VEXPANDWM | |
| UINT64_C(268435850), // VEXPTEFP | |
| UINT64_C(268435486), // VEXTDDVLX | |
| UINT64_C(268435487), // VEXTDDVRX | |
| UINT64_C(268435480), // VEXTDUBVLX | |
| UINT64_C(268435481), // VEXTDUBVRX | |
| UINT64_C(268435482), // VEXTDUHVLX | |
| UINT64_C(268435483), // VEXTDUHVRX | |
| UINT64_C(268435484), // VEXTDUWVLX | |
| UINT64_C(268435485), // VEXTDUWVRX | |
| UINT64_C(268961346), // VEXTRACTBM | |
| UINT64_C(268436173), // VEXTRACTD | |
| UINT64_C(269157954), // VEXTRACTDM | |
| UINT64_C(269026882), // VEXTRACTHM | |
| UINT64_C(269223490), // VEXTRACTQM | |
| UINT64_C(268435981), // VEXTRACTUB | |
| UINT64_C(268436045), // VEXTRACTUH | |
| UINT64_C(268436109), // VEXTRACTUW | |
| UINT64_C(269092418), // VEXTRACTWM | |
| UINT64_C(270009858), // VEXTSB2D | |
| UINT64_C(270009858), // VEXTSB2Ds | |
| UINT64_C(269485570), // VEXTSB2W | |
| UINT64_C(269485570), // VEXTSB2Ws | |
| UINT64_C(270206466), // VEXTSD2Q | |
| UINT64_C(270075394), // VEXTSH2D | |
| UINT64_C(270075394), // VEXTSH2Ds | |
| UINT64_C(269551106), // VEXTSH2W | |
| UINT64_C(269551106), // VEXTSH2Ws | |
| UINT64_C(270140930), // VEXTSW2D | |
| UINT64_C(270140930), // VEXTSW2Ds | |
| UINT64_C(268437005), // VEXTUBLX | |
| UINT64_C(268437261), // VEXTUBRX | |
| UINT64_C(268437069), // VEXTUHLX | |
| UINT64_C(268437325), // VEXTUHRX | |
| UINT64_C(268437133), // VEXTUWLX | |
| UINT64_C(268437389), // VEXTUWRX | |
| UINT64_C(268436748), // VGBBD | |
| UINT64_C(268436684), // VGNB | |
| UINT64_C(268435983), // VINSBLX | |
| UINT64_C(268436239), // VINSBRX | |
| UINT64_C(268435471), // VINSBVLX | |
| UINT64_C(268435727), // VINSBVRX | |
| UINT64_C(268435919), // VINSD | |
| UINT64_C(268436175), // VINSDLX | |
| UINT64_C(268436431), // VINSDRX | |
| UINT64_C(268436237), // VINSERTB | |
| UINT64_C(268436429), // VINSERTD | |
| UINT64_C(268436301), // VINSERTH | |
| UINT64_C(268436365), // VINSERTW | |
| UINT64_C(268436047), // VINSHLX | |
| UINT64_C(268436303), // VINSHRX | |
| UINT64_C(268435535), // VINSHVLX | |
| UINT64_C(268435791), // VINSHVRX | |
| UINT64_C(268435663), // VINSW | |
| UINT64_C(268436111), // VINSWLX | |
| UINT64_C(268436367), // VINSWRX | |
| UINT64_C(268435599), // VINSWVLX | |
| UINT64_C(268435855), // VINSWVRX | |
| UINT64_C(268435914), // VLOGEFP | |
| UINT64_C(268435502), // VMADDFP | |
| UINT64_C(268436490), // VMAXFP | |
| UINT64_C(268435714), // VMAXSB | |
| UINT64_C(268435906), // VMAXSD | |
| UINT64_C(268435778), // VMAXSH | |
| UINT64_C(268435842), // VMAXSW | |
| UINT64_C(268435458), // VMAXUB | |
| UINT64_C(268435650), // VMAXUD | |
| UINT64_C(268435522), // VMAXUH | |
| UINT64_C(268435586), // VMAXUW | |
| UINT64_C(268435488), // VMHADDSHS | |
| UINT64_C(268435489), // VMHRADDSHS | |
| UINT64_C(268436554), // VMINFP | |
| UINT64_C(268436226), // VMINSB | |
| UINT64_C(268436418), // VMINSD | |
| UINT64_C(268436290), // VMINSH | |
| UINT64_C(268436354), // VMINSW | |
| UINT64_C(268435970), // VMINUB | |
| UINT64_C(268436162), // VMINUD | |
| UINT64_C(268436034), // VMINUH | |
| UINT64_C(268436098), // VMINUW | |
| UINT64_C(268435490), // VMLADDUHM | |
| UINT64_C(268437451), // VMODSD | |
| UINT64_C(268437259), // VMODSQ | |
| UINT64_C(268437387), // VMODSW | |
| UINT64_C(268437195), // VMODUD | |
| UINT64_C(268437003), // VMODUQ | |
| UINT64_C(268437131), // VMODUW | |
| UINT64_C(268437388), // VMRGEW | |
| UINT64_C(268435468), // VMRGHB | |
| UINT64_C(268435532), // VMRGHH | |
| UINT64_C(268435596), // VMRGHW | |
| UINT64_C(268435724), // VMRGLB | |
| UINT64_C(268435788), // VMRGLH | |
| UINT64_C(268435852), // VMRGLW | |
| UINT64_C(268437132), // VMRGOW | |
| UINT64_C(268435479), // VMSUMCUD | |
| UINT64_C(268435493), // VMSUMMBM | |
| UINT64_C(268435496), // VMSUMSHM | |
| UINT64_C(268435497), // VMSUMSHS | |
| UINT64_C(268435492), // VMSUMUBM | |
| UINT64_C(268435491), // VMSUMUDM | |
| UINT64_C(268435494), // VMSUMUHM | |
| UINT64_C(268435495), // VMSUMUHS | |
| UINT64_C(268435457), // VMUL10CUQ | |
| UINT64_C(268435521), // VMUL10ECUQ | |
| UINT64_C(268436033), // VMUL10EUQ | |
| UINT64_C(268435969), // VMUL10UQ | |
| UINT64_C(268436232), // VMULESB | |
| UINT64_C(268436424), // VMULESD | |
| UINT64_C(268436296), // VMULESH | |
| UINT64_C(268436360), // VMULESW | |
| UINT64_C(268435976), // VMULEUB | |
| UINT64_C(268436168), // VMULEUD | |
| UINT64_C(268436040), // VMULEUH | |
| UINT64_C(268436104), // VMULEUW | |
| UINT64_C(268436425), // VMULHSD | |
| UINT64_C(268436361), // VMULHSW | |
| UINT64_C(268436169), // VMULHUD | |
| UINT64_C(268436105), // VMULHUW | |
| UINT64_C(268435913), // VMULLD | |
| UINT64_C(268435720), // VMULOSB | |
| UINT64_C(268435912), // VMULOSD | |
| UINT64_C(268435784), // VMULOSH | |
| UINT64_C(268435848), // VMULOSW | |
| UINT64_C(268435464), // VMULOUB | |
| UINT64_C(268435656), // VMULOUD | |
| UINT64_C(268435528), // VMULOUH | |
| UINT64_C(268435592), // VMULOUW | |
| UINT64_C(268435593), // VMULUWM | |
| UINT64_C(268436868), // VNAND | |
| UINT64_C(268436808), // VNCIPHER | |
| UINT64_C(268436809), // VNCIPHERLAST | |
| UINT64_C(268895746), // VNEGD | |
| UINT64_C(268830210), // VNEGW | |
| UINT64_C(268435503), // VNMSUBFP | |
| UINT64_C(268436740), // VNOR | |
| UINT64_C(268436612), // VOR | |
| UINT64_C(268436804), // VORC | |
| UINT64_C(268436941), // VPDEPD | |
| UINT64_C(268435499), // VPERM | |
| UINT64_C(268435515), // VPERMR | |
| UINT64_C(268435501), // VPERMXOR | |
| UINT64_C(268436877), // VPEXTD | |
| UINT64_C(268436238), // VPKPX | |
| UINT64_C(268436942), // VPKSDSS | |
| UINT64_C(268436814), // VPKSDUS | |
| UINT64_C(268435854), // VPKSHSS | |
| UINT64_C(268435726), // VPKSHUS | |
| UINT64_C(268435918), // VPKSWSS | |
| UINT64_C(268435790), // VPKSWUS | |
| UINT64_C(268436558), // VPKUDUM | |
| UINT64_C(268436686), // VPKUDUS | |
| UINT64_C(268435470), // VPKUHUM | |
| UINT64_C(268435598), // VPKUHUS | |
| UINT64_C(268435534), // VPKUWUM | |
| UINT64_C(268435662), // VPKUWUS | |
| UINT64_C(268436488), // VPMSUMB | |
| UINT64_C(268436680), // VPMSUMD | |
| UINT64_C(268436552), // VPMSUMH | |
| UINT64_C(268436616), // VPMSUMW | |
| UINT64_C(268437251), // VPOPCNTB | |
| UINT64_C(268437443), // VPOPCNTD | |
| UINT64_C(268437315), // VPOPCNTH | |
| UINT64_C(268437379), // VPOPCNTW | |
| UINT64_C(269026818), // VPRTYBD | |
| UINT64_C(269092354), // VPRTYBQ | |
| UINT64_C(268961282), // VPRTYBW | |
| UINT64_C(268435722), // VREFP | |
| UINT64_C(268436170), // VRFIM | |
| UINT64_C(268435978), // VRFIN | |
| UINT64_C(268436106), // VRFIP | |
| UINT64_C(268436042), // VRFIZ | |
| UINT64_C(268435460), // VRLB | |
| UINT64_C(268435652), // VRLD | |
| UINT64_C(268435653), // VRLDMI | |
| UINT64_C(268435909), // VRLDNM | |
| UINT64_C(268435524), // VRLH | |
| UINT64_C(268435461), // VRLQ | |
| UINT64_C(268435525), // VRLQMI | |
| UINT64_C(268435781), // VRLQNM | |
| UINT64_C(268435588), // VRLW | |
| UINT64_C(268435589), // VRLWMI | |
| UINT64_C(268435845), // VRLWNM | |
| UINT64_C(268435786), // VRSQRTEFP | |
| UINT64_C(268436936), // VSBOX | |
| UINT64_C(268435498), // VSEL | |
| UINT64_C(268437186), // VSHASIGMAD | |
| UINT64_C(268437122), // VSHASIGMAW | |
| UINT64_C(268435908), // VSL | |
| UINT64_C(268435716), // VSLB | |
| UINT64_C(268436932), // VSLD | |
| UINT64_C(268435478), // VSLDBI | |
| UINT64_C(268435500), // VSLDOI | |
| UINT64_C(268435780), // VSLH | |
| UINT64_C(268436492), // VSLO | |
| UINT64_C(268435717), // VSLQ | |
| UINT64_C(268437316), // VSLV | |
| UINT64_C(268435844), // VSLW | |
| UINT64_C(268435980), // VSPLTB | |
| UINT64_C(268435980), // VSPLTBs | |
| UINT64_C(268436044), // VSPLTH | |
| UINT64_C(268436044), // VSPLTHs | |
| UINT64_C(268436236), // VSPLTISB | |
| UINT64_C(268436300), // VSPLTISH | |
| UINT64_C(268436364), // VSPLTISW | |
| UINT64_C(268436108), // VSPLTW | |
| UINT64_C(268436164), // VSR | |
| UINT64_C(268436228), // VSRAB | |
| UINT64_C(268436420), // VSRAD | |
| UINT64_C(268436292), // VSRAH | |
| UINT64_C(268436229), // VSRAQ | |
| UINT64_C(268436356), // VSRAW | |
| UINT64_C(268435972), // VSRB | |
| UINT64_C(268437188), // VSRD | |
| UINT64_C(268435990), // VSRDBI | |
| UINT64_C(268436036), // VSRH | |
| UINT64_C(268436556), // VSRO | |
| UINT64_C(268435973), // VSRQ | |
| UINT64_C(268437252), // VSRV | |
| UINT64_C(268436100), // VSRW | |
| UINT64_C(268435469), // VSTRIBL | |
| UINT64_C(268436493), // VSTRIBL_rec | |
| UINT64_C(268501005), // VSTRIBR | |
| UINT64_C(268502029), // VSTRIBR_rec | |
| UINT64_C(268566541), // VSTRIHL | |
| UINT64_C(268567565), // VSTRIHL_rec | |
| UINT64_C(268632077), // VSTRIHR | |
| UINT64_C(268633101), // VSTRIHR_rec | |
| UINT64_C(268436800), // VSUBCUQ | |
| UINT64_C(268436864), // VSUBCUW | |
| UINT64_C(268435519), // VSUBECUQ | |
| UINT64_C(268435518), // VSUBEUQM | |
| UINT64_C(268435530), // VSUBFP | |
| UINT64_C(268437248), // VSUBSBS | |
| UINT64_C(268437312), // VSUBSHS | |
| UINT64_C(268437376), // VSUBSWS | |
| UINT64_C(268436480), // VSUBUBM | |
| UINT64_C(268436992), // VSUBUBS | |
| UINT64_C(268436672), // VSUBUDM | |
| UINT64_C(268436544), // VSUBUHM | |
| UINT64_C(268437056), // VSUBUHS | |
| UINT64_C(268436736), // VSUBUQM | |
| UINT64_C(268436608), // VSUBUWM | |
| UINT64_C(268437120), // VSUBUWS | |
| UINT64_C(268437128), // VSUM2SWS | |
| UINT64_C(268437256), // VSUM4SBS | |
| UINT64_C(268437064), // VSUM4SHS | |
| UINT64_C(268437000), // VSUM4UBS | |
| UINT64_C(268437384), // VSUMSWS | |
| UINT64_C(268436302), // VUPKHPX | |
| UINT64_C(268435982), // VUPKHSB | |
| UINT64_C(268436046), // VUPKHSH | |
| UINT64_C(268437070), // VUPKHSW | |
| UINT64_C(268436430), // VUPKLPX | |
| UINT64_C(268436110), // VUPKLSB | |
| UINT64_C(268436174), // VUPKLSH | |
| UINT64_C(268437198), // VUPKLSW | |
| UINT64_C(268436676), // VXOR | |
| UINT64_C(268436676), // V_SET0 | |
| UINT64_C(268436676), // V_SET0B | |
| UINT64_C(268436676), // V_SET0H | |
| UINT64_C(270467980), // V_SETALLONES | |
| UINT64_C(270467980), // V_SETALLONESB | |
| UINT64_C(270467980), // V_SETALLONESH | |
| UINT64_C(2080374844), // WAIT | |
| UINT64_C(2080375046), // WRTEE | |
| UINT64_C(2080375110), // WRTEEI | |
| UINT64_C(2080375416), // XOR | |
| UINT64_C(2080375416), // XOR8 | |
| UINT64_C(2080375417), // XOR8_rec | |
| UINT64_C(1744830464), // XORI | |
| UINT64_C(1744830464), // XORI8 | |
| UINT64_C(1811939328), // XORIS | |
| UINT64_C(1811939328), // XORIS8 | |
| UINT64_C(2080375417), // XOR_rec | |
| UINT64_C(4026533220), // XSABSDP | |
| UINT64_C(4227860040), // XSABSQP | |
| UINT64_C(4026532096), // XSADDDP | |
| UINT64_C(4227858440), // XSADDQP | |
| UINT64_C(4227858441), // XSADDQPO | |
| UINT64_C(4026531840), // XSADDSP | |
| UINT64_C(4026531864), // XSCMPEQDP | |
| UINT64_C(4227858568), // XSCMPEQQP | |
| UINT64_C(4026532312), // XSCMPEXPDP | |
| UINT64_C(4227858760), // XSCMPEXPQP | |
| UINT64_C(4026531992), // XSCMPGEDP | |
| UINT64_C(4227858824), // XSCMPGEQP | |
| UINT64_C(4026531928), // XSCMPGTDP | |
| UINT64_C(4227858888), // XSCMPGTQP | |
| UINT64_C(4026532184), // XSCMPODP | |
| UINT64_C(4227858696), // XSCMPOQP | |
| UINT64_C(4026532120), // XSCMPUDP | |
| UINT64_C(4227859720), // XSCMPUQP | |
| UINT64_C(4026533248), // XSCPSGNDP | |
| UINT64_C(4227858632), // XSCPSGNQP | |
| UINT64_C(4027647340), // XSCVDPHP | |
| UINT64_C(4229301896), // XSCVDPQP | |
| UINT64_C(4026532900), // XSCVDPSP | |
| UINT64_C(4026532908), // XSCVDPSPN | |
| UINT64_C(4026533216), // XSCVDPSXDS | |
| UINT64_C(4026533216), // XSCVDPSXDSs | |
| UINT64_C(4026532192), // XSCVDPSXWS | |
| UINT64_C(4026532192), // XSCVDPSXWSs | |
| UINT64_C(4026533152), // XSCVDPUXDS | |
| UINT64_C(4026533152), // XSCVDPUXDSs | |
| UINT64_C(4026532128), // XSCVDPUXWS | |
| UINT64_C(4026532128), // XSCVDPUXWSs | |
| UINT64_C(4027581804), // XSCVHPDP | |
| UINT64_C(4229170824), // XSCVQPDP | |
| UINT64_C(4229170825), // XSCVQPDPO | |
| UINT64_C(4229498504), // XSCVQPSDZ | |
| UINT64_C(4228384392), // XSCVQPSQZ | |
| UINT64_C(4228449928), // XSCVQPSWZ | |
| UINT64_C(4228974216), // XSCVQPUDZ | |
| UINT64_C(4227860104), // XSCVQPUQZ | |
| UINT64_C(4227925640), // XSCVQPUWZ | |
| UINT64_C(4228515464), // XSCVSDQP | |
| UINT64_C(4026533156), // XSCVSPDP | |
| UINT64_C(4026533164), // XSCVSPDPN | |
| UINT64_C(4228581000), // XSCVSQQP | |
| UINT64_C(4026533344), // XSCVSXDDP | |
| UINT64_C(4026533088), // XSCVSXDSP | |
| UINT64_C(4227991176), // XSCVUDQP | |
| UINT64_C(4228056712), // XSCVUQQP | |
| UINT64_C(4026533280), // XSCVUXDDP | |
| UINT64_C(4026533024), // XSCVUXDSP | |
| UINT64_C(4026532288), // XSDIVDP | |
| UINT64_C(4227859528), // XSDIVQP | |
| UINT64_C(4227859529), // XSDIVQPO | |
| UINT64_C(4026532032), // XSDIVSP | |
| UINT64_C(4026533676), // XSIEXPDP | |
| UINT64_C(4227860168), // XSIEXPQP | |
| UINT64_C(4026532104), // XSMADDADP | |
| UINT64_C(4026531848), // XSMADDASP | |
| UINT64_C(4026532168), // XSMADDMDP | |
| UINT64_C(4026531912), // XSMADDMSP | |
| UINT64_C(4227859208), // XSMADDQP | |
| UINT64_C(4227859209), // XSMADDQPO | |
| UINT64_C(4026532864), // XSMAXCDP | |
| UINT64_C(4227859784), // XSMAXCQP | |
| UINT64_C(4026533120), // XSMAXDP | |
| UINT64_C(4026532992), // XSMAXJDP | |
| UINT64_C(4026532928), // XSMINCDP | |
| UINT64_C(4227859912), // XSMINCQP | |
| UINT64_C(4026533184), // XSMINDP | |
| UINT64_C(4026533056), // XSMINJDP | |
| UINT64_C(4026532232), // XSMSUBADP | |
| UINT64_C(4026531976), // XSMSUBASP | |
| UINT64_C(4026532296), // XSMSUBMDP | |
| UINT64_C(4026532040), // XSMSUBMSP | |
| UINT64_C(4227859272), // XSMSUBQP | |
| UINT64_C(4227859273), // XSMSUBQPO | |
| UINT64_C(4026532224), // XSMULDP | |
| UINT64_C(4227858504), // XSMULQP | |
| UINT64_C(4227858505), // XSMULQPO | |
| UINT64_C(4026531968), // XSMULSP | |
| UINT64_C(4026533284), // XSNABSDP | |
| UINT64_C(4026533284), // XSNABSDPs | |
| UINT64_C(4228384328), // XSNABSQP | |
| UINT64_C(4026533348), // XSNEGDP | |
| UINT64_C(4228908616), // XSNEGQP | |
| UINT64_C(4026533128), // XSNMADDADP | |
| UINT64_C(4026532872), // XSNMADDASP | |
| UINT64_C(4026533192), // XSNMADDMDP | |
| UINT64_C(4026532936), // XSNMADDMSP | |
| UINT64_C(4227859336), // XSNMADDQP | |
| UINT64_C(4227859337), // XSNMADDQPO | |
| UINT64_C(4026533256), // XSNMSUBADP | |
| UINT64_C(4026533000), // XSNMSUBASP | |
| UINT64_C(4026533320), // XSNMSUBMDP | |
| UINT64_C(4026533064), // XSNMSUBMSP | |
| UINT64_C(4227859400), // XSNMSUBQP | |
| UINT64_C(4227859401), // XSNMSUBQPO | |
| UINT64_C(4026532132), // XSRDPI | |
| UINT64_C(4026532268), // XSRDPIC | |
| UINT64_C(4026532324), // XSRDPIM | |
| UINT64_C(4026532260), // XSRDPIP | |
| UINT64_C(4026532196), // XSRDPIZ | |
| UINT64_C(4026532200), // XSREDP | |
| UINT64_C(4026531944), // XSRESP | |
| UINT64_C(4227858442), // XSRQPI | |
| UINT64_C(4227858443), // XSRQPIX | |
| UINT64_C(4227858506), // XSRQPXP | |
| UINT64_C(4026532964), // XSRSP | |
| UINT64_C(4026532136), // XSRSQRTEDP | |
| UINT64_C(4026531880), // XSRSQRTESP | |
| UINT64_C(4026532140), // XSSQRTDP | |
| UINT64_C(4229629512), // XSSQRTQP | |
| UINT64_C(4229629513), // XSSQRTQPO | |
| UINT64_C(4026531884), // XSSQRTSP | |
| UINT64_C(4026532160), // XSSUBDP | |
| UINT64_C(4227859464), // XSSUBQP | |
| UINT64_C(4227859465), // XSSUBQPO | |
| UINT64_C(4026531904), // XSSUBSP | |
| UINT64_C(4026532328), // XSTDIVDP | |
| UINT64_C(4026532264), // XSTSQRTDP | |
| UINT64_C(4026533288), // XSTSTDCDP | |
| UINT64_C(4227859848), // XSTSTDCQP | |
| UINT64_C(4026533032), // XSTSTDCSP | |
| UINT64_C(4026533228), // XSXEXPDP | |
| UINT64_C(4227991112), // XSXEXPQP | |
| UINT64_C(4026598764), // XSXSIGDP | |
| UINT64_C(4229039688), // XSXSIGQP | |
| UINT64_C(4026533732), // XVABSDP | |
| UINT64_C(4026533476), // XVABSSP | |
| UINT64_C(4026532608), // XVADDDP | |
| UINT64_C(4026532352), // XVADDSP | |
| UINT64_C(3959423384), // XVBF16GER2 | |
| UINT64_C(3959424912), // XVBF16GER2NN | |
| UINT64_C(3959423888), // XVBF16GER2NP | |
| UINT64_C(3959424400), // XVBF16GER2PN | |
| UINT64_C(3959423376), // XVBF16GER2PP | |
| UINT64_C(3959423384), // XVBF16GER2W | |
| UINT64_C(3959424912), // XVBF16GER2WNN | |
| UINT64_C(3959423888), // XVBF16GER2WNP | |
| UINT64_C(3959424400), // XVBF16GER2WPN | |
| UINT64_C(3959423376), // XVBF16GER2WPP | |
| UINT64_C(4026532632), // XVCMPEQDP | |
| UINT64_C(4026533656), // XVCMPEQDP_rec | |
| UINT64_C(4026532376), // XVCMPEQSP | |
| UINT64_C(4026533400), // XVCMPEQSP_rec | |
| UINT64_C(4026532760), // XVCMPGEDP | |
| UINT64_C(4026533784), // XVCMPGEDP_rec | |
| UINT64_C(4026532504), // XVCMPGESP | |
| UINT64_C(4026533528), // XVCMPGESP_rec | |
| UINT64_C(4026532696), // XVCMPGTDP | |
| UINT64_C(4026533720), // XVCMPGTDP_rec | |
| UINT64_C(4026532440), // XVCMPGTSP | |
| UINT64_C(4026533464), // XVCMPGTSP_rec | |
| UINT64_C(4026533760), // XVCPSGNDP | |
| UINT64_C(4026533504), // XVCPSGNSP | |
| UINT64_C(4027582316), // XVCVBF16SPN | |
| UINT64_C(4026533412), // XVCVDPSP | |
| UINT64_C(4026533728), // XVCVDPSXDS | |
| UINT64_C(4026532704), // XVCVDPSXWS | |
| UINT64_C(4026533664), // XVCVDPUXDS | |
| UINT64_C(4026532640), // XVCVDPUXWS | |
| UINT64_C(4028106604), // XVCVHPSP | |
| UINT64_C(4027647852), // XVCVSPBF16 | |
| UINT64_C(4026533668), // XVCVSPDP | |
| UINT64_C(4028172140), // XVCVSPHP | |
| UINT64_C(4026533472), // XVCVSPSXDS | |
| UINT64_C(4026532448), // XVCVSPSXWS | |
| UINT64_C(4026533408), // XVCVSPUXDS | |
| UINT64_C(4026532384), // XVCVSPUXWS | |
| UINT64_C(4026533856), // XVCVSXDDP | |
| UINT64_C(4026533600), // XVCVSXDSP | |
| UINT64_C(4026532832), // XVCVSXWDP | |
| UINT64_C(4026532576), // XVCVSXWSP | |
| UINT64_C(4026533792), // XVCVUXDDP | |
| UINT64_C(4026533536), // XVCVUXDSP | |
| UINT64_C(4026532768), // XVCVUXWDP | |
| UINT64_C(4026532512), // XVCVUXWSP | |
| UINT64_C(4026532800), // XVDIVDP | |
| UINT64_C(4026532544), // XVDIVSP | |
| UINT64_C(3959423128), // XVF16GER2 | |
| UINT64_C(3959424656), // XVF16GER2NN | |
| UINT64_C(3959423632), // XVF16GER2NP | |
| UINT64_C(3959424144), // XVF16GER2PN | |
| UINT64_C(3959423120), // XVF16GER2PP | |
| UINT64_C(3959423128), // XVF16GER2W | |
| UINT64_C(3959424656), // XVF16GER2WNN | |
| UINT64_C(3959423632), // XVF16GER2WNP | |
| UINT64_C(3959424144), // XVF16GER2WPN | |
| UINT64_C(3959423120), // XVF16GER2WPP | |
| UINT64_C(3959423192), // XVF32GER | |
| UINT64_C(3959424720), // XVF32GERNN | |
| UINT64_C(3959423696), // XVF32GERNP | |
| UINT64_C(3959424208), // XVF32GERPN | |
| UINT64_C(3959423184), // XVF32GERPP | |
| UINT64_C(3959423192), // XVF32GERW | |
| UINT64_C(3959424720), // XVF32GERWNN | |
| UINT64_C(3959423696), // XVF32GERWNP | |
| UINT64_C(3959424208), // XVF32GERWPN | |
| UINT64_C(3959423184), // XVF32GERWPP | |
| UINT64_C(3959423448), // XVF64GER | |
| UINT64_C(3959424976), // XVF64GERNN | |
| UINT64_C(3959423952), // XVF64GERNP | |
| UINT64_C(3959424464), // XVF64GERPN | |
| UINT64_C(3959423440), // XVF64GERPP | |
| UINT64_C(3959423448), // XVF64GERW | |
| UINT64_C(3959424976), // XVF64GERWNN | |
| UINT64_C(3959423952), // XVF64GERWNP | |
| UINT64_C(3959424464), // XVF64GERWPN | |
| UINT64_C(3959423440), // XVF64GERWPP | |
| UINT64_C(3959423576), // XVI16GER2 | |
| UINT64_C(3959423832), // XVI16GER2PP | |
| UINT64_C(3959423320), // XVI16GER2S | |
| UINT64_C(3959423312), // XVI16GER2SPP | |
| UINT64_C(3959423320), // XVI16GER2SW | |
| UINT64_C(3959423312), // XVI16GER2SWPP | |
| UINT64_C(3959423576), // XVI16GER2W | |
| UINT64_C(3959423832), // XVI16GER2WPP | |
| UINT64_C(3959423256), // XVI4GER8 | |
| UINT64_C(3959423248), // XVI4GER8PP | |
| UINT64_C(3959423256), // XVI4GER8W | |
| UINT64_C(3959423248), // XVI4GER8WPP | |
| UINT64_C(3959423000), // XVI8GER4 | |
| UINT64_C(3959422992), // XVI8GER4PP | |
| UINT64_C(3959423768), // XVI8GER4SPP | |
| UINT64_C(3959423000), // XVI8GER4W | |
| UINT64_C(3959422992), // XVI8GER4WPP | |
| UINT64_C(3959423768), // XVI8GER4WSPP | |
| UINT64_C(4026533824), // XVIEXPDP | |
| UINT64_C(4026533568), // XVIEXPSP | |
| UINT64_C(4026532616), // XVMADDADP | |
| UINT64_C(4026532360), // XVMADDASP | |
| UINT64_C(4026532680), // XVMADDMDP | |
| UINT64_C(4026532424), // XVMADDMSP | |
| UINT64_C(4026533632), // XVMAXDP | |
| UINT64_C(4026533376), // XVMAXSP | |
| UINT64_C(4026533696), // XVMINDP | |
| UINT64_C(4026533440), // XVMINSP | |
| UINT64_C(4026532744), // XVMSUBADP | |
| UINT64_C(4026532488), // XVMSUBASP | |
| UINT64_C(4026532808), // XVMSUBMDP | |
| UINT64_C(4026532552), // XVMSUBMSP | |
| UINT64_C(4026532736), // XVMULDP | |
| UINT64_C(4026532480), // XVMULSP | |
| UINT64_C(4026533796), // XVNABSDP | |
| UINT64_C(4026533540), // XVNABSSP | |
| UINT64_C(4026533860), // XVNEGDP | |
| UINT64_C(4026533604), // XVNEGSP | |
| UINT64_C(4026533640), // XVNMADDADP | |
| UINT64_C(4026533384), // XVNMADDASP | |
| UINT64_C(4026533704), // XVNMADDMDP | |
| UINT64_C(4026533448), // XVNMADDMSP | |
| UINT64_C(4026533768), // XVNMSUBADP | |
| UINT64_C(4026533512), // XVNMSUBASP | |
| UINT64_C(4026533832), // XVNMSUBMDP | |
| UINT64_C(4026533576), // XVNMSUBMSP | |
| UINT64_C(4026532644), // XVRDPI | |
| UINT64_C(4026532780), // XVRDPIC | |
| UINT64_C(4026532836), // XVRDPIM | |
| UINT64_C(4026532772), // XVRDPIP | |
| UINT64_C(4026532708), // XVRDPIZ | |
| UINT64_C(4026532712), // XVREDP | |
| UINT64_C(4026532456), // XVRESP | |
| UINT64_C(4026532388), // XVRSPI | |
| UINT64_C(4026532524), // XVRSPIC | |
| UINT64_C(4026532580), // XVRSPIM | |
| UINT64_C(4026532516), // XVRSPIP | |
| UINT64_C(4026532452), // XVRSPIZ | |
| UINT64_C(4026532648), // XVRSQRTEDP | |
| UINT64_C(4026532392), // XVRSQRTESP | |
| UINT64_C(4026532652), // XVSQRTDP | |
| UINT64_C(4026532396), // XVSQRTSP | |
| UINT64_C(4026532672), // XVSUBDP | |
| UINT64_C(4026532416), // XVSUBSP | |
| UINT64_C(4026532840), // XVTDIVDP | |
| UINT64_C(4026532584), // XVTDIVSP | |
| UINT64_C(4026664812), // XVTLSBB | |
| UINT64_C(4026532776), // XVTSQRTDP | |
| UINT64_C(4026532520), // XVTSQRTSP | |
| UINT64_C(4026533800), // XVTSTDCDP | |
| UINT64_C(4026533544), // XVTSTDCSP | |
| UINT64_C(4026533740), // XVXEXPDP | |
| UINT64_C(4027058028), // XVXEXPSP | |
| UINT64_C(4026599276), // XVXSIGDP | |
| UINT64_C(4027123564), // XVXSIGSP | |
| UINT64_C(360287972404232192), // XXBLENDVB | |
| UINT64_C(360287972404232240), // XXBLENDVD | |
| UINT64_C(360287972404232208), // XXBLENDVH | |
| UINT64_C(360287972404232224), // XXBLENDVW | |
| UINT64_C(4028041068), // XXBRD | |
| UINT64_C(4026992492), // XXBRH | |
| UINT64_C(4028565356), // XXBRQ | |
| UINT64_C(4027516780), // XXBRW | |
| UINT64_C(360287972471341072), // XXEVAL | |
| UINT64_C(4026532500), // XXEXTRACTUW | |
| UINT64_C(4026533672), // XXGENPCVBM | |
| UINT64_C(4026533738), // XXGENPCVDM | |
| UINT64_C(4026533674), // XXGENPCVHM | |
| UINT64_C(4026533736), // XXGENPCVWM | |
| UINT64_C(4026532564), // XXINSERTW | |
| UINT64_C(4026532880), // XXLAND | |
| UINT64_C(4026532944), // XXLANDC | |
| UINT64_C(4026533328), // XXLEQV | |
| UINT64_C(4026533328), // XXLEQVOnes | |
| UINT64_C(4026533264), // XXLNAND | |
| UINT64_C(4026533136), // XXLNOR | |
| UINT64_C(4026533008), // XXLOR | |
| UINT64_C(4026533200), // XXLORC | |
| UINT64_C(4026533008), // XXLORf | |
| UINT64_C(4026533072), // XXLXOR | |
| UINT64_C(4026533072), // XXLXORdpz | |
| UINT64_C(4026533072), // XXLXORspz | |
| UINT64_C(4026533072), // XXLXORz | |
| UINT64_C(2080375138), // XXMFACC | |
| UINT64_C(2080375138), // XXMFACCW | |
| UINT64_C(4026531984), // XXMRGHW | |
| UINT64_C(4026532240), // XXMRGLW | |
| UINT64_C(2080440674), // XXMTACC | |
| UINT64_C(2080440674), // XXMTACCW | |
| UINT64_C(4026532048), // XXPERM | |
| UINT64_C(4026531920), // XXPERMDI | |
| UINT64_C(4026531920), // XXPERMDIs | |
| UINT64_C(4026532304), // XXPERMR | |
| UINT64_C(360287972471341056), // XXPERMX | |
| UINT64_C(4026531888), // XXSEL | |
| UINT64_C(2080571746), // XXSETACCZ | |
| UINT64_C(2080571746), // XXSETACCZW | |
| UINT64_C(4026531856), // XXSLDWI | |
| UINT64_C(4026531856), // XXSLDWIs | |
| UINT64_C(360287972337123328), // XXSPLTI32DX | |
| UINT64_C(4026532560), // XXSPLTIB | |
| UINT64_C(360287972337385472), // XXSPLTIDP | |
| UINT64_C(360287972337516544), // XXSPLTIW | |
| UINT64_C(4026532496), // XXSPLTW | |
| UINT64_C(4026532496), // XXSPLTWs | |
| UINT64_C(1073741824), // gBC | |
| UINT64_C(1073741826), // gBCA | |
| UINT64_C(1073741826), // gBCAat | |
| UINT64_C(1275069472), // gBCCTR | |
| UINT64_C(1275069473), // gBCCTRL | |
| UINT64_C(1073741825), // gBCL | |
| UINT64_C(1073741827), // gBCLA | |
| UINT64_C(1073741827), // gBCLAat | |
| UINT64_C(1275068448), // gBCLR | |
| UINT64_C(1275068449), // gBCLRL | |
| UINT64_C(1073741825), // gBCLat | |
| UINT64_C(1073741824), // gBCat | |
| UINT64_C(0) | |
| }; | |
| const unsigned opcode = MI.getOpcode(); | |
| uint64_t Value = InstBits[opcode]; | |
| uint64_t op = 0; | |
| (void)op; // suppress warning | |
| switch (opcode) { | |
| case PPC::ADDISdtprelHA: | |
| case PPC::ADDISdtprelHA32: | |
| case PPC::ADDISgotTprelHA: | |
| case PPC::ADDIStlsgdHA: | |
| case PPC::ADDIStlsldHA: | |
| case PPC::ADDIStocHA: | |
| case PPC::ADDIStocHA8: | |
| case PPC::ADDIdtprelL: | |
| case PPC::ADDIdtprelL32: | |
| case PPC::ADDItlsgdL: | |
| case PPC::ADDItlsgdL32: | |
| case PPC::ADDItlsgdLADDR: | |
| case PPC::ADDItlsgdLADDR32: | |
| case PPC::ADDItlsldL: | |
| case PPC::ADDItlsldL32: | |
| case PPC::ADDItlsldLADDR: | |
| case PPC::ADDItlsldLADDR32: | |
| case PPC::ADDItoc: | |
| case PPC::ADDItoc8: | |
| case PPC::ADDItocL: | |
| case PPC::ADJCALLSTACKDOWN: | |
| case PPC::ADJCALLSTACKUP: | |
| case PPC::ANDI_rec_1_EQ_BIT: | |
| case PPC::ANDI_rec_1_EQ_BIT8: | |
| case PPC::ANDI_rec_1_GT_BIT: | |
| case PPC::ANDI_rec_1_GT_BIT8: | |
| case PPC::ATOMIC_CMP_SWAP_I16: | |
| case PPC::ATOMIC_CMP_SWAP_I32: | |
| case PPC::ATOMIC_CMP_SWAP_I64: | |
| case PPC::ATOMIC_CMP_SWAP_I8: | |
| case PPC::ATOMIC_LOAD_ADD_I16: | |
| case PPC::ATOMIC_LOAD_ADD_I32: | |
| case PPC::ATOMIC_LOAD_ADD_I64: | |
| case PPC::ATOMIC_LOAD_ADD_I8: | |
| case PPC::ATOMIC_LOAD_AND_I16: | |
| case PPC::ATOMIC_LOAD_AND_I32: | |
| case PPC::ATOMIC_LOAD_AND_I64: | |
| case PPC::ATOMIC_LOAD_AND_I8: | |
| case PPC::ATOMIC_LOAD_MAX_I16: | |
| case PPC::ATOMIC_LOAD_MAX_I32: | |
| case PPC::ATOMIC_LOAD_MAX_I64: | |
| case PPC::ATOMIC_LOAD_MAX_I8: | |
| case PPC::ATOMIC_LOAD_MIN_I16: | |
| case PPC::ATOMIC_LOAD_MIN_I32: | |
| case PPC::ATOMIC_LOAD_MIN_I64: | |
| case PPC::ATOMIC_LOAD_MIN_I8: | |
| case PPC::ATOMIC_LOAD_NAND_I16: | |
| case PPC::ATOMIC_LOAD_NAND_I32: | |
| case PPC::ATOMIC_LOAD_NAND_I64: | |
| case PPC::ATOMIC_LOAD_NAND_I8: | |
| case PPC::ATOMIC_LOAD_OR_I16: | |
| case PPC::ATOMIC_LOAD_OR_I32: | |
| case PPC::ATOMIC_LOAD_OR_I64: | |
| case PPC::ATOMIC_LOAD_OR_I8: | |
| case PPC::ATOMIC_LOAD_SUB_I16: | |
| case PPC::ATOMIC_LOAD_SUB_I32: | |
| case PPC::ATOMIC_LOAD_SUB_I64: | |
| case PPC::ATOMIC_LOAD_SUB_I8: | |
| case PPC::ATOMIC_LOAD_UMAX_I16: | |
| case PPC::ATOMIC_LOAD_UMAX_I32: | |
| case PPC::ATOMIC_LOAD_UMAX_I64: | |
| case PPC::ATOMIC_LOAD_UMAX_I8: | |
| case PPC::ATOMIC_LOAD_UMIN_I16: | |
| case PPC::ATOMIC_LOAD_UMIN_I32: | |
| case PPC::ATOMIC_LOAD_UMIN_I64: | |
| case PPC::ATOMIC_LOAD_UMIN_I8: | |
| case PPC::ATOMIC_LOAD_XOR_I16: | |
| case PPC::ATOMIC_LOAD_XOR_I32: | |
| case PPC::ATOMIC_LOAD_XOR_I64: | |
| case PPC::ATOMIC_LOAD_XOR_I8: | |
| case PPC::ATOMIC_SWAP_I16: | |
| case PPC::ATOMIC_SWAP_I32: | |
| case PPC::ATOMIC_SWAP_I64: | |
| case PPC::ATOMIC_SWAP_I8: | |
| case PPC::ATTN: | |
| case PPC::BCTR: | |
| case PPC::BCTR8: | |
| case PPC::BCTRL: | |
| case PPC::BCTRL8: | |
| case PPC::BCTRL8_RM: | |
| case PPC::BCTRL_RM: | |
| case PPC::BDNZLR: | |
| case PPC::BDNZLR8: | |
| case PPC::BDNZLRL: | |
| case PPC::BDNZLRLm: | |
| case PPC::BDNZLRLp: | |
| case PPC::BDNZLRm: | |
| case PPC::BDNZLRp: | |
| case PPC::BDZLR: | |
| case PPC::BDZLR8: | |
| case PPC::BDZLRL: | |
| case PPC::BDZLRLm: | |
| case PPC::BDZLRLp: | |
| case PPC::BDZLRm: | |
| case PPC::BDZLRp: | |
| case PPC::BLR: | |
| case PPC::BLR8: | |
| case PPC::BLRL: | |
| case PPC::CLRBHRB: | |
| case PPC::CP_ABORT: | |
| case PPC::CR6SET: | |
| case PPC::CR6UNSET: | |
| case PPC::DSSALL: | |
| case PPC::DYNALLOC: | |
| case PPC::DYNALLOC8: | |
| case PPC::DYNAREAOFFSET: | |
| case PPC::DYNAREAOFFSET8: | |
| case PPC::DecreaseCTR8loop: | |
| case PPC::DecreaseCTRloop: | |
| case PPC::EH_SjLj_LongJmp32: | |
| case PPC::EH_SjLj_LongJmp64: | |
| case PPC::EH_SjLj_SetJmp32: | |
| case PPC::EH_SjLj_SetJmp64: | |
| case PPC::EH_SjLj_Setup: | |
| case PPC::EnforceIEIO: | |
| case PPC::FADDrtz: | |
| case PPC::GETtlsADDR: | |
| case PPC::GETtlsADDR32: | |
| case PPC::GETtlsADDR32AIX: | |
| case PPC::GETtlsADDR64AIX: | |
| case PPC::GETtlsADDRPCREL: | |
| case PPC::GETtlsldADDR: | |
| case PPC::GETtlsldADDR32: | |
| case PPC::GETtlsldADDRPCREL: | |
| case PPC::HRFID: | |
| case PPC::ISYNC: | |
| case PPC::LDgotTprelL: | |
| case PPC::LDgotTprelL32: | |
| case PPC::LDtoc: | |
| case PPC::LDtocBA: | |
| case PPC::LDtocCPT: | |
| case PPC::LDtocJTI: | |
| case PPC::LDtocL: | |
| case PPC::LQX_PSEUDO: | |
| case PPC::LWZtoc: | |
| case PPC::LWZtocL: | |
| case PPC::MSGSYNC: | |
| case PPC::MSYNC: | |
| case PPC::MoveGOTtoLR: | |
| case PPC::MovePCtoLR: | |
| case PPC::MovePCtoLR8: | |
| case PPC::NAP: | |
| case PPC::NOP: | |
| case PPC::NOP_GT_PWR6: | |
| case PPC::NOP_GT_PWR7: | |
| case PPC::PADDIdtprel: | |
| case PPC::PPC32GOT: | |
| case PPC::PPC32PICGOT: | |
| case PPC::PREPARE_PROBED_ALLOCA_32: | |
| case PPC::PREPARE_PROBED_ALLOCA_64: | |
| case PPC::PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32: | |
| case PPC::PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64: | |
| case PPC::PROBED_ALLOCA_32: | |
| case PPC::PROBED_ALLOCA_64: | |
| case PPC::PROBED_STACKALLOC_32: | |
| case PPC::PROBED_STACKALLOC_64: | |
| case PPC::PseudoEIEIO: | |
| case PPC::RESTORE_ACC: | |
| case PPC::RESTORE_CR: | |
| case PPC::RESTORE_CRBIT: | |
| case PPC::RESTORE_QUADWORD: | |
| case PPC::RESTORE_UACC: | |
| case PPC::RESTORE_WACC: | |
| case PPC::RFCI: | |
| case PPC::RFDI: | |
| case PPC::RFI: | |
| case PPC::RFID: | |
| case PPC::RFMCI: | |
| case PPC::ReadTB: | |
| case PPC::SELECT_CC_F16: | |
| case PPC::SELECT_CC_F4: | |
| case PPC::SELECT_CC_F8: | |
| case PPC::SELECT_CC_I4: | |
| case PPC::SELECT_CC_I8: | |
| case PPC::SELECT_CC_SPE: | |
| case PPC::SELECT_CC_SPE4: | |
| case PPC::SELECT_CC_VRRC: | |
| case PPC::SELECT_CC_VSFRC: | |
| case PPC::SELECT_CC_VSRC: | |
| case PPC::SELECT_CC_VSSRC: | |
| case PPC::SELECT_F16: | |
| case PPC::SELECT_F4: | |
| case PPC::SELECT_F8: | |
| case PPC::SELECT_I4: | |
| case PPC::SELECT_I8: | |
| case PPC::SELECT_SPE: | |
| case PPC::SELECT_SPE4: | |
| case PPC::SELECT_VRRC: | |
| case PPC::SELECT_VSFRC: | |
| case PPC::SELECT_VSRC: | |
| case PPC::SELECT_VSSRC: | |
| case PPC::SETFLM: | |
| case PPC::SETRND: | |
| case PPC::SETRNDi: | |
| case PPC::SLBIA: | |
| case PPC::SLBSYNC: | |
| case PPC::SPILL_ACC: | |
| case PPC::SPILL_CR: | |
| case PPC::SPILL_CRBIT: | |
| case PPC::SPILL_QUADWORD: | |
| case PPC::SPILL_UACC: | |
| case PPC::SPILL_WACC: | |
| case PPC::SPLIT_QUADWORD: | |
| case PPC::STOP: | |
| case PPC::STQX_PSEUDO: | |
| case PPC::TAILBCTR: | |
| case PPC::TAILBCTR8: | |
| case PPC::TBEGIN_RET: | |
| case PPC::TCHECK_RET: | |
| case PPC::TCRETURNai: | |
| case PPC::TCRETURNai8: | |
| case PPC::TCRETURNdi: | |
| case PPC::TCRETURNdi8: | |
| case PPC::TCRETURNri: | |
| case PPC::TCRETURNri8: | |
| case PPC::TLBIA: | |
| case PPC::TLBRE: | |
| case PPC::TLBSYNC: | |
| case PPC::TLBWE: | |
| case PPC::TLSGDAIX: | |
| case PPC::TLSGDAIX8: | |
| case PPC::TRAP: | |
| case PPC::TRECHKPT: | |
| case PPC::UNENCODED_NOP: | |
| case PPC::UpdateGBR: { | |
| break; | |
| } | |
| case PPC::TEND: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 25; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::TABORT: | |
| case PPC::TRECLAIM: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DCBA: | |
| case PPC::DCBFEP: | |
| case PPC::DCBI: | |
| case PPC::DCBST: | |
| case PPC::DCBSTEP: | |
| case PPC::DCBZ: | |
| case PPC::DCBZEP: | |
| case PPC::DCBZL: | |
| case PPC::DCBZLEP: | |
| case PPC::DCCCI: | |
| case PPC::ICBI: | |
| case PPC::ICBIEP: | |
| case PPC::ICCCI: | |
| case PPC::TLBIVAX: | |
| case PPC::TLBSX: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::EXTSWSLI: | |
| case PPC::EXTSWSLI_32_64: | |
| case PPC::EXTSWSLI_32_64_rec: | |
| case PPC::EXTSWSLI_rec: | |
| case PPC::SRADI: | |
| case PPC::SRADI_32: | |
| case PPC::SRADI_rec: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: SH | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::BRD: | |
| case PPC::BRH: | |
| case PPC::BRH8: | |
| case PPC::BRW: | |
| case PPC::BRW8: | |
| case PPC::CNTLZD: | |
| case PPC::CNTLZD_rec: | |
| case PPC::CNTLZW: | |
| case PPC::CNTLZW8: | |
| case PPC::CNTLZW8_rec: | |
| case PPC::CNTLZW_rec: | |
| case PPC::CNTTZD: | |
| case PPC::CNTTZD_rec: | |
| case PPC::CNTTZW: | |
| case PPC::CNTTZW8: | |
| case PPC::CNTTZW8_rec: | |
| case PPC::CNTTZW_rec: | |
| case PPC::EXTSB: | |
| case PPC::EXTSB8: | |
| case PPC::EXTSB8_32_64: | |
| case PPC::EXTSB8_rec: | |
| case PPC::EXTSB_rec: | |
| case PPC::EXTSH: | |
| case PPC::EXTSH8: | |
| case PPC::EXTSH8_32_64: | |
| case PPC::EXTSH8_rec: | |
| case PPC::EXTSH_rec: | |
| case PPC::EXTSW: | |
| case PPC::EXTSW_32: | |
| case PPC::EXTSW_32_64: | |
| case PPC::EXTSW_32_64_rec: | |
| case PPC::EXTSW_rec: | |
| case PPC::POPCNTB: | |
| case PPC::POPCNTB8: | |
| case PPC::POPCNTD: | |
| case PPC::POPCNTW: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::AND: | |
| case PPC::AND8: | |
| case PPC::AND8_rec: | |
| case PPC::ANDC: | |
| case PPC::ANDC8: | |
| case PPC::ANDC8_rec: | |
| case PPC::ANDC_rec: | |
| case PPC::AND_rec: | |
| case PPC::BPERMD: | |
| case PPC::CFUGED: | |
| case PPC::CMPB: | |
| case PPC::CMPB8: | |
| case PPC::CNTLZDM: | |
| case PPC::CNTTZDM: | |
| case PPC::EQV: | |
| case PPC::EQV8: | |
| case PPC::EQV8_rec: | |
| case PPC::EQV_rec: | |
| case PPC::NAND: | |
| case PPC::NAND8: | |
| case PPC::NAND8_rec: | |
| case PPC::NAND_rec: | |
| case PPC::NOR: | |
| case PPC::NOR8: | |
| case PPC::NOR8_rec: | |
| case PPC::NOR_rec: | |
| case PPC::OR: | |
| case PPC::OR8: | |
| case PPC::OR8_rec: | |
| case PPC::ORC: | |
| case PPC::ORC8: | |
| case PPC::ORC8_rec: | |
| case PPC::ORC_rec: | |
| case PPC::OR_rec: | |
| case PPC::PDEPD: | |
| case PPC::PEXTD: | |
| case PPC::SLD: | |
| case PPC::SLD_rec: | |
| case PPC::SLW: | |
| case PPC::SLW8: | |
| case PPC::SLW8_rec: | |
| case PPC::SLW_rec: | |
| case PPC::SRAD: | |
| case PPC::SRAD_rec: | |
| case PPC::SRAW: | |
| case PPC::SRAWI: | |
| case PPC::SRAWI_rec: | |
| case PPC::SRAW_rec: | |
| case PPC::SRD: | |
| case PPC::SRD_rec: | |
| case PPC::SRW: | |
| case PPC::SRW8: | |
| case PPC::SRW8_rec: | |
| case PPC::SRW_rec: | |
| case PPC::XOR: | |
| case PPC::XOR8: | |
| case PPC::XOR8_rec: | |
| case PPC::XOR_rec: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LBZ: | |
| case PPC::LBZ8: | |
| case PPC::LFD: | |
| case PPC::LFS: | |
| case PPC::LHA: | |
| case PPC::LHA8: | |
| case PPC::LHZ: | |
| case PPC::LHZ8: | |
| case PPC::LMW: | |
| case PPC::LWZ: | |
| case PPC::LWZ8: | |
| case PPC::SPELWZ: | |
| case PPC::SPESTW: | |
| case PPC::STB: | |
| case PPC::STB8: | |
| case PPC::STFD: | |
| case PPC::STFS: | |
| case PPC::STH: | |
| case PPC::STH8: | |
| case PPC::STMW: | |
| case PPC::STW: | |
| case PPC::STW8: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: Addr | |
| op = getMemRIEncoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(2097151); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LBZU: | |
| case PPC::LBZU8: | |
| case PPC::LFDU: | |
| case PPC::LFSU: | |
| case PPC::LHAU: | |
| case PPC::LHAU8: | |
| case PPC::LHZU: | |
| case PPC::LHZU8: | |
| case PPC::LWZU: | |
| case PPC::LWZU8: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: Addr | |
| op = getMemRIEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(2097151); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LI: | |
| case PPC::LI8: | |
| case PPC::LIS: | |
| case PPC::LIS8: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: B | |
| op = getImm16Encoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(65535); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ADDI: | |
| case PPC::ADDI8: | |
| case PPC::ADDIC: | |
| case PPC::ADDIC8: | |
| case PPC::ADDIC_rec: | |
| case PPC::ADDIS: | |
| case PPC::ADDIS8: | |
| case PPC::LA: | |
| case PPC::LA8: | |
| case PPC::MULLI: | |
| case PPC::MULLI8: | |
| case PPC::SUBFIC: | |
| case PPC::SUBFIC8: | |
| case PPC::TDI: | |
| case PPC::TWI: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: C | |
| op = getImm16Encoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(65535); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::STBU: | |
| case PPC::STBU8: | |
| case PPC::STFDU: | |
| case PPC::STFSU: | |
| case PPC::STHU: | |
| case PPC::STHU8: | |
| case PPC::STWU: | |
| case PPC::STWU8: { | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: Addr | |
| op = getMemRIEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(2097151); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DMSETDMRZ: | |
| case PPC::XXMTACC: | |
| case PPC::XXMTACCW: | |
| case PPC::XXSETACCZ: | |
| case PPC::XXSETACCZW: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DMMR: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: AB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 13; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DMXOR: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: AB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 13; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XVBF16GER2: | |
| case PPC::XVBF16GER2W: | |
| case PPC::XVF16GER2: | |
| case PPC::XVF16GER2W: | |
| case PPC::XVF32GER: | |
| case PPC::XVF32GERW: | |
| case PPC::XVI16GER2: | |
| case PPC::XVI16GER2S: | |
| case PPC::XVI16GER2SW: | |
| case PPC::XVI16GER2W: | |
| case PPC::XVI4GER8: | |
| case PPC::XVI4GER8W: | |
| case PPC::XVI8GER4: | |
| case PPC::XVI8GER4W: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::PMXVF32GER: | |
| case PPC::PMXVF32GERW: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PMXVI8GER4: | |
| case PPC::PMXVI8GER4W: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| // op: PMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 44; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PMXVI4GER8: | |
| case PPC::PMXVI4GER8W: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| // op: PMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 40; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PMXVBF16GER2: | |
| case PPC::PMXVBF16GER2W: | |
| case PPC::PMXVF16GER2: | |
| case PPC::PMXVF16GER2W: | |
| case PPC::PMXVI16GER2: | |
| case PPC::PMXVI16GER2S: | |
| case PPC::PMXVI16GER2SW: | |
| case PPC::PMXVI16GER2W: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| // op: PMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 46; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XVBF16GER2NN: | |
| case PPC::XVBF16GER2NP: | |
| case PPC::XVBF16GER2PN: | |
| case PPC::XVBF16GER2PP: | |
| case PPC::XVBF16GER2WNN: | |
| case PPC::XVBF16GER2WNP: | |
| case PPC::XVBF16GER2WPN: | |
| case PPC::XVBF16GER2WPP: | |
| case PPC::XVF16GER2NN: | |
| case PPC::XVF16GER2NP: | |
| case PPC::XVF16GER2PN: | |
| case PPC::XVF16GER2PP: | |
| case PPC::XVF16GER2WNN: | |
| case PPC::XVF16GER2WNP: | |
| case PPC::XVF16GER2WPN: | |
| case PPC::XVF16GER2WPP: | |
| case PPC::XVF32GERNN: | |
| case PPC::XVF32GERNP: | |
| case PPC::XVF32GERPN: | |
| case PPC::XVF32GERPP: | |
| case PPC::XVF32GERWNN: | |
| case PPC::XVF32GERWNP: | |
| case PPC::XVF32GERWPN: | |
| case PPC::XVF32GERWPP: | |
| case PPC::XVI16GER2PP: | |
| case PPC::XVI16GER2SPP: | |
| case PPC::XVI16GER2SWPP: | |
| case PPC::XVI16GER2WPP: | |
| case PPC::XVI4GER8PP: | |
| case PPC::XVI4GER8WPP: | |
| case PPC::XVI8GER4PP: | |
| case PPC::XVI8GER4SPP: | |
| case PPC::XVI8GER4WPP: | |
| case PPC::XVI8GER4WSPP: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::PMXVF32GERNN: | |
| case PPC::PMXVF32GERNP: | |
| case PPC::PMXVF32GERPN: | |
| case PPC::PMXVF32GERPP: | |
| case PPC::PMXVF32GERWNN: | |
| case PPC::PMXVF32GERWNP: | |
| case PPC::PMXVF32GERWPN: | |
| case PPC::PMXVF32GERWPP: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PMXVI8GER4PP: | |
| case PPC::PMXVI8GER4SPP: | |
| case PPC::PMXVI8GER4WPP: | |
| case PPC::PMXVI8GER4WSPP: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| // op: PMSK | |
| op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 44; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PMXVI4GER8PP: | |
| case PPC::PMXVI4GER8WPP: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| // op: PMSK | |
| op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 40; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PMXVBF16GER2NN: | |
| case PPC::PMXVBF16GER2NP: | |
| case PPC::PMXVBF16GER2PN: | |
| case PPC::PMXVBF16GER2PP: | |
| case PPC::PMXVBF16GER2WNN: | |
| case PPC::PMXVBF16GER2WNP: | |
| case PPC::PMXVBF16GER2WPN: | |
| case PPC::PMXVBF16GER2WPP: | |
| case PPC::PMXVF16GER2NN: | |
| case PPC::PMXVF16GER2NP: | |
| case PPC::PMXVF16GER2PN: | |
| case PPC::PMXVF16GER2PP: | |
| case PPC::PMXVF16GER2WNN: | |
| case PPC::PMXVF16GER2WNP: | |
| case PPC::PMXVF16GER2WPN: | |
| case PPC::PMXVF16GER2WPP: | |
| case PPC::PMXVI16GER2PP: | |
| case PPC::PMXVI16GER2SPP: | |
| case PPC::PMXVI16GER2SWPP: | |
| case PPC::PMXVI16GER2WPP: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 32; | |
| Value |= op; | |
| // op: PMSK | |
| op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 46; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XVF64GER: | |
| case PPC::XVF64GERW: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getVSRpEvenEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::PMXVF64GER: | |
| case PPC::PMXVF64GERW: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getVSRpEvenEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 34; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XVF64GERNN: | |
| case PPC::XVF64GERNP: | |
| case PPC::XVF64GERPN: | |
| case PPC::XVF64GERPP: | |
| case PPC::XVF64GERWNN: | |
| case PPC::XVF64GERWNP: | |
| case PPC::XVF64GERWPN: | |
| case PPC::XVF64GERWPP: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getVSRpEvenEncoding(MI, 2, Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::PMXVF64GERNN: | |
| case PPC::PMXVF64GERNP: | |
| case PPC::PMXVF64GERPN: | |
| case PPC::PMXVF64GERPP: | |
| case PPC::PMXVF64GERWNN: | |
| case PPC::PMXVF64GERWNP: | |
| case PPC::PMXVF64GERWPN: | |
| case PPC::PMXVF64GERWPP: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getVSRpEvenEncoding(MI, 2, Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XMSK | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 36; | |
| Value |= op; | |
| // op: YMSK | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 34; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DMXXINSTFDMR512: | |
| case PPC::DMXXINSTFDMR512_HI: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XAp | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 17; | |
| Value |= (op & UINT64_C(16)) >> 2; | |
| // op: XBp | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 12; | |
| Value |= (op & UINT64_C(16)) >> 3; | |
| break; | |
| } | |
| case PPC::DMXXINSTFDMR256: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XBp | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 12; | |
| Value |= (op & UINT64_C(16)) >> 3; | |
| // op: P | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(1)) << 16; | |
| Value |= (op & UINT64_C(2)) << 10; | |
| break; | |
| } | |
| case PPC::XXMFACC: | |
| case PPC::XXMFACCW: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DMXXEXTFDMR256: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XBp | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 12; | |
| Value |= (op & UINT64_C(16)) >> 3; | |
| // op: P | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(1)) << 16; | |
| Value |= (op & UINT64_C(2)) << 10; | |
| break; | |
| } | |
| case PPC::DMXXEXTFDMR512: | |
| case PPC::DMXXEXTFDMR512_HI: { | |
| // op: AT | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XAp | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 17; | |
| Value |= (op & UINT64_C(16)) >> 2; | |
| // op: XBp | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 12; | |
| Value |= (op & UINT64_C(16)) >> 3; | |
| break; | |
| } | |
| case PPC::SLBIE: | |
| case PPC::TLBIEL: | |
| case PPC::TLBLD: | |
| case PPC::TLBLI: { | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ANDI8_rec: | |
| case PPC::ANDIS8_rec: | |
| case PPC::ANDIS_rec: | |
| case PPC::ANDI_rec: | |
| case PPC::ORI: | |
| case PPC::ORI8: | |
| case PPC::ORIS: | |
| case PPC::ORIS8: | |
| case PPC::XORI: | |
| case PPC::XORI8: | |
| case PPC::XORIS: | |
| case PPC::XORIS8: { | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: C | |
| op = getImm16Encoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(65535); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BDNZA: | |
| case PPC::BDNZAm: | |
| case PPC::BDNZAp: | |
| case PPC::BDNZLA: | |
| case PPC::BDNZLAm: | |
| case PPC::BDNZLAp: | |
| case PPC::BDZA: | |
| case PPC::BDZAm: | |
| case PPC::BDZAp: | |
| case PPC::BDZLA: | |
| case PPC::BDZLAm: | |
| case PPC::BDZLAp: { | |
| // op: BD | |
| op = getAbsCondBrEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCLalways: | |
| case PPC::BDNZ: | |
| case PPC::BDNZ8: | |
| case PPC::BDNZL: | |
| case PPC::BDNZLm: | |
| case PPC::BDNZLp: | |
| case PPC::BDNZm: | |
| case PPC::BDNZp: | |
| case PPC::BDZ: | |
| case PPC::BDZ8: | |
| case PPC::BDZL: | |
| case PPC::BDZLm: | |
| case PPC::BDZLp: | |
| case PPC::BDZm: | |
| case PPC::BDZp: { | |
| // op: BD | |
| op = getCondBrEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MCRXRX: | |
| case PPC::TCHECK: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MCRF: | |
| case PPC::MCRFS: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: BFA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 18; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XSTSTDCQP: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: DCMX | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(127); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XSTSTDCDP: | |
| case PPC::XSTSTDCSP: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: DCMX | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(127); | |
| op <<= 16; | |
| Value |= op; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::FCMPOD: | |
| case PPC::FCMPOS: | |
| case PPC::FCMPUD: | |
| case PPC::FCMPUS: | |
| case PPC::FTDIV: | |
| case PPC::XSCMPEXPQP: | |
| case PPC::XSCMPOQP: | |
| case PPC::XSCMPUQP: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: FRA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: FRB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::FTSQRT: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: FRB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::CMPRB: | |
| case PPC::CMPRB8: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::CMPDI: | |
| case PPC::CMPLDI: | |
| case PPC::CMPLWI: | |
| case PPC::CMPWI: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: I | |
| op = getImm16Encoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(65535); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::CMPD: | |
| case PPC::CMPEQB: | |
| case PPC::CMPLD: | |
| case PPC::CMPLW: | |
| case PPC::CMPW: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTFSFIb: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: U | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 12; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VCMPSQ: | |
| case PPC::VCMPUQ: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTFSFI: | |
| case PPC::MTFSFI_rec: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: W | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 16; | |
| Value |= op; | |
| // op: U | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 12; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XVTLSBB: { | |
| // op: BF | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::BCCTR: | |
| case PPC::BCCTR8: | |
| case PPC::BCCTR8n: | |
| case PPC::BCCTRL: | |
| case PPC::BCCTRL8: | |
| case PPC::BCCTRL8n: | |
| case PPC::BCCTRLn: | |
| case PPC::BCCTRn: | |
| case PPC::BCLR: | |
| case PPC::BCLRL: | |
| case PPC::BCLRLn: | |
| case PPC::BCLRn: { | |
| // op: BI | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BC: | |
| case PPC::BCL: | |
| case PPC::BCLn: | |
| case PPC::BCn: { | |
| // op: BI | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: BD | |
| op = getCondBrEncoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCCCTR: | |
| case PPC::BCCCTR8: | |
| case PPC::BCCCTRL: | |
| case PPC::BCCCTRL8: | |
| case PPC::BCCLR: | |
| case PPC::BCCLRL: { | |
| // op: BIBO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(96)) << 11; | |
| // op: CR | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 18; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCCA: | |
| case PPC::BCCLA: { | |
| // op: BIBO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(96)) << 11; | |
| // op: CR | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 18; | |
| Value |= op; | |
| // op: BD | |
| op = getAbsCondBrEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCC: | |
| case PPC::BCCL: | |
| case PPC::CTRL_DEP: { | |
| // op: BIBO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(96)) << 11; | |
| // op: CR | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 18; | |
| Value |= op; | |
| // op: BD | |
| op = getCondBrEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::gBCAat: | |
| case PPC::gBCLAat: { | |
| // op: BO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(28); | |
| op <<= 21; | |
| Value |= op; | |
| // op: at | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 21; | |
| Value |= op; | |
| // op: BI | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: BD | |
| op = getAbsCondBrEncoding(MI, 3, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::gBCLat: | |
| case PPC::gBCat: { | |
| // op: BO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(28); | |
| op <<= 21; | |
| Value |= op; | |
| // op: at | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 21; | |
| Value |= op; | |
| // op: BI | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: BD | |
| op = getCondBrEncoding(MI, 3, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::gBCA: | |
| case PPC::gBCLA: { | |
| // op: BO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: BI | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: BD | |
| op = getAbsCondBrEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::gBC: | |
| case PPC::gBCL: { | |
| // op: BO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: BI | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: BD | |
| op = getCondBrEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(16383); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::gBCCTR: | |
| case PPC::gBCCTRL: | |
| case PPC::gBCLR: | |
| case PPC::gBCLRL: { | |
| // op: BO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: BI | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: BH | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XSCMPEXPDP: | |
| case PPC::XSCMPODP: | |
| case PPC::XSCMPUDP: | |
| case PPC::XSTDIVDP: | |
| case PPC::XVTDIVDP: | |
| case PPC::XVTDIVSP: { | |
| // op: CR | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::XSTSQRTDP: | |
| case PPC::XVTSQRTDP: | |
| case PPC::XVTSQRTSP: { | |
| // op: CR | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::CRSET: | |
| case PPC::CRUNSET: { | |
| // op: CRD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(31)) << 11; | |
| break; | |
| } | |
| case PPC::CRNOT: { | |
| // op: CRD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: CRA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(31)) << 11; | |
| break; | |
| } | |
| case PPC::CRAND: | |
| case PPC::CRANDC: | |
| case PPC::CREQV: | |
| case PPC::CRNAND: | |
| case PPC::CRNOR: | |
| case PPC::CROR: | |
| case PPC::CRORC: | |
| case PPC::CRXOR: { | |
| // op: CRD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: CRA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: CRB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ICBLC: | |
| case PPC::ICBLQ: | |
| case PPC::ICBT: | |
| case PPC::ICBTLS: { | |
| // op: CT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCTRL8_LDinto_toc: | |
| case PPC::BCTRL8_LDinto_toc_RM: { | |
| // op: DS_RA | |
| op = getMemRIXEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(524287); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCTRL_LWZinto_toc: | |
| case PPC::BCTRL_LWZinto_toc_RM: { | |
| // op: D_RA | |
| op = getMemRIEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(2097151); | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::HASHCHK: | |
| case PPC::HASHCHK8: | |
| case PPC::HASHCHKP: | |
| case PPC::HASHCHKP8: | |
| case PPC::HASHST: | |
| case PPC::HASHST8: | |
| case PPC::HASHSTP: | |
| case PPC::HASHSTP8: { | |
| // op: D_RA_XD | |
| op = getMemRIHashEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(1984)) << 10; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::WRTEEI: { | |
| // op: E | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 15; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTFSFb: { | |
| // op: FM | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 17; | |
| Value |= op; | |
| // op: rT | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTFSB0: | |
| case PPC::MTFSB1: { | |
| // op: FM | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PLBZ: | |
| case PPC::PLBZ8: | |
| case PPC::PLFD: | |
| case PPC::PLFS: | |
| case PPC::PLHA: | |
| case PPC::PLHA8: | |
| case PPC::PLHZ: | |
| case PPC::PLHZ8: | |
| case PPC::PLWZ: | |
| case PPC::PLWZ8: | |
| case PPC::PSTB: | |
| case PPC::PSTB8: | |
| case PPC::PSTFD: | |
| case PPC::PSTFS: | |
| case PPC::PSTH: | |
| case PPC::PSTH8: | |
| case PPC::PSTW: | |
| case PPC::PSTW8: { | |
| // op: FRS | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D_RA | |
| op = getMemRI34Encoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::PLBZ8pc: | |
| case PPC::PLBZpc: | |
| case PPC::PLFDpc: | |
| case PPC::PLFSpc: | |
| case PPC::PLHA8pc: | |
| case PPC::PLHApc: | |
| case PPC::PLHZ8pc: | |
| case PPC::PLHZpc: | |
| case PPC::PLWZ8pc: | |
| case PPC::PLWZpc: | |
| case PPC::PSTB8pc: | |
| case PPC::PSTBpc: | |
| case PPC::PSTFDpc: | |
| case PPC::PSTFSpc: | |
| case PPC::PSTH8pc: | |
| case PPC::PSTHpc: | |
| case PPC::PSTW8pc: | |
| case PPC::PSTWpc: { | |
| // op: FRS | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D_RA | |
| op = getMemRI34PCRelEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::FADD: | |
| case PPC::FADDS: | |
| case PPC::FADDS_rec: | |
| case PPC::FADD_rec: | |
| case PPC::FDIV: | |
| case PPC::FDIVS: | |
| case PPC::FDIVS_rec: | |
| case PPC::FDIV_rec: | |
| case PPC::FSUB: | |
| case PPC::FSUBS: | |
| case PPC::FSUBS_rec: | |
| case PPC::FSUB_rec: | |
| case PPC::XSIEXPQP: { | |
| // op: FRT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: FRA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: FRB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::FMUL: | |
| case PPC::FMULS: | |
| case PPC::FMULS_rec: | |
| case PPC::FMUL_rec: { | |
| // op: FRT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: FRA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: FRC | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::FMADD: | |
| case PPC::FMADDS: | |
| case PPC::FMADDS_rec: | |
| case PPC::FMADD_rec: | |
| case PPC::FMSUB: | |
| case PPC::FMSUBS: | |
| case PPC::FMSUBS_rec: | |
| case PPC::FMSUB_rec: | |
| case PPC::FNMADD: | |
| case PPC::FNMADDS: | |
| case PPC::FNMADDS_rec: | |
| case PPC::FNMADD_rec: | |
| case PPC::FNMSUB: | |
| case PPC::FNMSUBS: | |
| case PPC::FNMSUBS_rec: | |
| case PPC::FNMSUB_rec: | |
| case PPC::FSELD: | |
| case PPC::FSELD_rec: | |
| case PPC::FSELS: | |
| case PPC::FSELS_rec: { | |
| // op: FRT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: FRA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: FRC | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| // op: FRB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTCRF: | |
| case PPC::MTCRF8: { | |
| // op: FXM | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 12; | |
| Value |= op; | |
| // op: rS | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::TSR: { | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::SYNC: | |
| case PPC::WAIT: { | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::CP_PASTE8_rec: | |
| case PPC::CP_PASTE_rec: { | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTFSF: | |
| case PPC::MTFSF_rec: { | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 25; | |
| Value |= op; | |
| // op: FLM | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 17; | |
| Value |= op; | |
| // op: W | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 16; | |
| Value |= op; | |
| // op: FRB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::SC: { | |
| // op: LEV | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(127); | |
| op <<= 5; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BA: | |
| case PPC::BLA: | |
| case PPC::BLA8: | |
| case PPC::BLA8_RM: | |
| case PPC::BLA_RM: | |
| case PPC::TAILBA: | |
| case PPC::TAILBA8: { | |
| // op: LI | |
| op = getAbsDirectBrEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16777215); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BLA8_NOP: | |
| case PPC::BLA8_NOP_RM: { | |
| // op: LI | |
| op = getAbsDirectBrEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16777215); | |
| op <<= 34; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::B: | |
| case PPC::BL: | |
| case PPC::BL8: | |
| case PPC::BL8_NOTOC: | |
| case PPC::BL8_NOTOC_RM: | |
| case PPC::BL8_RM: | |
| case PPC::BL_RM: | |
| case PPC::TAILB: | |
| case PPC::TAILB8: { | |
| // op: LI | |
| op = getDirectBrEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16777215); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BL8_NOP: | |
| case PPC::BL8_NOP_RM: | |
| case PPC::BL_NOP: | |
| case PPC::BL_NOP_RM: { | |
| // op: LI | |
| op = getDirectBrEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16777215); | |
| op <<= 34; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BL8_NOTOC_TLS: | |
| case PPC::BL8_TLS: | |
| case PPC::BL8_TLS_: | |
| case PPC::BL_TLS: { | |
| // op: LI | |
| op = getTLSCallEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16777215); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BL8_NOP_TLS: { | |
| // op: LI | |
| op = getTLSCallEncoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(16777215); | |
| op <<= 34; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MBAR: { | |
| // op: MO | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::TBEGIN: { | |
| // op: R | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::CP_COPY: | |
| case PPC::CP_COPY8: { | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::RLWINM: | |
| case PPC::RLWINM8: | |
| case PPC::RLWINM8_rec: | |
| case PPC::RLWINM_rec: | |
| case PPC::RLWNM: | |
| case PPC::RLWNM8: | |
| case PPC::RLWNM8_rec: | |
| case PPC::RLWNM_rec: { | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: MB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| // op: ME | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 1; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::RLDCL: | |
| case PPC::RLDCL_rec: | |
| case PPC::RLDCR: | |
| case PPC::RLDCR_rec: { | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: MBE | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 6; | |
| Value |= (op & UINT64_C(32)); | |
| break; | |
| } | |
| case PPC::RLDIC: | |
| case PPC::RLDICL: | |
| case PPC::RLDICL_32: | |
| case PPC::RLDICL_32_64: | |
| case PPC::RLDICL_32_rec: | |
| case PPC::RLDICL_rec: | |
| case PPC::RLDICR: | |
| case PPC::RLDICR_32: | |
| case PPC::RLDICR_rec: | |
| case PPC::RLDIC_rec: { | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: SH | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: MBE | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 6; | |
| Value |= (op & UINT64_C(32)); | |
| break; | |
| } | |
| case PPC::RLWIMI: | |
| case PPC::RLWIMI8: | |
| case PPC::RLWIMI8_rec: | |
| case PPC::RLWIMI_rec: { | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: MB | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| // op: ME | |
| op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 1; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::RLDIMI: | |
| case PPC::RLDIMI_rec: { | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: SH | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: MBE | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 6; | |
| Value |= (op & UINT64_C(32)); | |
| break; | |
| } | |
| case PPC::MTVSRBM: | |
| case PPC::MTVSRDM: | |
| case PPC::MTVSRHM: | |
| case PPC::MTVSRQM: | |
| case PPC::MTVSRWM: | |
| case PPC::VCLZLSBB: | |
| case PPC::VCTZB: | |
| case PPC::VCTZD: | |
| case PPC::VCTZH: | |
| case PPC::VCTZLSBB: | |
| case PPC::VCTZW: | |
| case PPC::VEXPANDBM: | |
| case PPC::VEXPANDDM: | |
| case PPC::VEXPANDHM: | |
| case PPC::VEXPANDQM: | |
| case PPC::VEXPANDWM: | |
| case PPC::VEXTRACTBM: | |
| case PPC::VEXTRACTDM: | |
| case PPC::VEXTRACTHM: | |
| case PPC::VEXTRACTQM: | |
| case PPC::VEXTRACTWM: | |
| case PPC::VEXTSB2D: | |
| case PPC::VEXTSB2Ds: | |
| case PPC::VEXTSB2W: | |
| case PPC::VEXTSB2Ws: | |
| case PPC::VEXTSD2Q: | |
| case PPC::VEXTSH2D: | |
| case PPC::VEXTSH2Ds: | |
| case PPC::VEXTSH2W: | |
| case PPC::VEXTSH2Ws: | |
| case PPC::VEXTSW2D: | |
| case PPC::VEXTSW2Ds: | |
| case PPC::VNEGD: | |
| case PPC::VNEGW: | |
| case PPC::VPRTYBD: | |
| case PPC::VPRTYBQ: | |
| case PPC::VPRTYBW: { | |
| // op: RD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VCNTMBB: | |
| case PPC::VCNTMBD: | |
| case PPC::VCNTMBH: | |
| case PPC::VCNTMBW: { | |
| // op: RD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: MP | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VGNB: { | |
| // op: RD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: N | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::WRTEE: { | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTMSR: | |
| case PPC::MTMSRD: { | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFSRIN: | |
| case PPC::MTSRIN: { | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFSR: | |
| case PPC::MTSR: { | |
| // op: RS | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: SR | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFFS: | |
| case PPC::MFFSCE: | |
| case PPC::MFFSL: | |
| case PPC::MFFS_rec: | |
| case PPC::MFMSR: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::SETBC: | |
| case PPC::SETBC8: | |
| case PPC::SETBCR: | |
| case PPC::SETBCR8: | |
| case PPC::SETNBC: | |
| case PPC::SETNBC8: | |
| case PPC::SETNBCR: | |
| case PPC::SETNBCR8: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::FCPSGND: | |
| case PPC::FCPSGND_rec: | |
| case PPC::FCPSGNS: | |
| case PPC::FCPSGNS_rec: | |
| case PPC::LBARX: | |
| case PPC::LBARXL: | |
| case PPC::LBEPX: | |
| case PPC::LBZCIX: | |
| case PPC::LBZX: | |
| case PPC::LBZX8: | |
| case PPC::LDARX: | |
| case PPC::LDARXL: | |
| case PPC::LDAT: | |
| case PPC::LDBRX: | |
| case PPC::LDCIX: | |
| case PPC::LDX: | |
| case PPC::LFDEPX: | |
| case PPC::LFDX: | |
| case PPC::LFIWAX: | |
| case PPC::LFIWZX: | |
| case PPC::LFSX: | |
| case PPC::LHARX: | |
| case PPC::LHARXL: | |
| case PPC::LHAX: | |
| case PPC::LHAX8: | |
| case PPC::LHBRX: | |
| case PPC::LHBRX8: | |
| case PPC::LHEPX: | |
| case PPC::LHZCIX: | |
| case PPC::LHZX: | |
| case PPC::LHZX8: | |
| case PPC::LQARX: | |
| case PPC::LQARXL: | |
| case PPC::LSWI: | |
| case PPC::LVEBX: | |
| case PPC::LVEHX: | |
| case PPC::LVEWX: | |
| case PPC::LVSL: | |
| case PPC::LVSR: | |
| case PPC::LVX: | |
| case PPC::LVXL: | |
| case PPC::LWARX: | |
| case PPC::LWARXL: | |
| case PPC::LWAT: | |
| case PPC::LWAX: | |
| case PPC::LWAX_32: | |
| case PPC::LWBRX: | |
| case PPC::LWBRX8: | |
| case PPC::LWEPX: | |
| case PPC::LWZCIX: | |
| case PPC::LWZX: | |
| case PPC::LWZX8: | |
| case PPC::MODSD: | |
| case PPC::MODSW: | |
| case PPC::MODUD: | |
| case PPC::MODUW: | |
| case PPC::SPELWZX: | |
| case PPC::SPESTWX: | |
| case PPC::STBCIX: | |
| case PPC::STBCX: | |
| case PPC::STBEPX: | |
| case PPC::STBX: | |
| case PPC::STBX8: | |
| case PPC::STDAT: | |
| case PPC::STDBRX: | |
| case PPC::STDCIX: | |
| case PPC::STDCX: | |
| case PPC::STDX: | |
| case PPC::STFDEPX: | |
| case PPC::STFDX: | |
| case PPC::STFIWX: | |
| case PPC::STFSX: | |
| case PPC::STHBRX: | |
| case PPC::STHCIX: | |
| case PPC::STHCX: | |
| case PPC::STHEPX: | |
| case PPC::STHX: | |
| case PPC::STHX8: | |
| case PPC::STQCX: | |
| case PPC::STSWI: | |
| case PPC::STVEBX: | |
| case PPC::STVEHX: | |
| case PPC::STVEWX: | |
| case PPC::STVX: | |
| case PPC::STVXL: | |
| case PPC::STWAT: | |
| case PPC::STWBRX: | |
| case PPC::STWCIX: | |
| case PPC::STWCX: | |
| case PPC::STWEPX: | |
| case PPC::STWX: | |
| case PPC::STWX8: | |
| case PPC::TABORTDC: | |
| case PPC::TABORTDCI: | |
| case PPC::TABORTWC: | |
| case PPC::TABORTWCI: | |
| case PPC::TD: | |
| case PPC::TLBSX2: | |
| case PPC::TLBSX2D: | |
| case PPC::TW: | |
| case PPC::XSADDQP: | |
| case PPC::XSADDQPO: | |
| case PPC::XSCMPEQQP: | |
| case PPC::XSCMPGEQP: | |
| case PPC::XSCMPGTQP: | |
| case PPC::XSCPSGNQP: | |
| case PPC::XSDIVQP: | |
| case PPC::XSDIVQPO: | |
| case PPC::XSMAXCQP: | |
| case PPC::XSMINCQP: | |
| case PPC::XSMULQP: | |
| case PPC::XSMULQPO: | |
| case PPC::XSSUBQP: | |
| case PPC::XSSUBQPO: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LBZXTLS: | |
| case PPC::LBZXTLS_: | |
| case PPC::LBZXTLS_32: | |
| case PPC::LDXTLS: | |
| case PPC::LDXTLS_: | |
| case PPC::LHZXTLS: | |
| case PPC::LHZXTLS_: | |
| case PPC::LHZXTLS_32: | |
| case PPC::LWZXTLS: | |
| case PPC::LWZXTLS_: | |
| case PPC::LWZXTLS_32: | |
| case PPC::STBXTLS: | |
| case PPC::STBXTLS_: | |
| case PPC::STBXTLS_32: | |
| case PPC::STDXTLS: | |
| case PPC::STDXTLS_: | |
| case PPC::STHXTLS: | |
| case PPC::STHXTLS_: | |
| case PPC::STHXTLS_32: | |
| case PPC::STWXTLS: | |
| case PPC::STWXTLS_: | |
| case PPC::STWXTLS_32: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getTLSRegEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::TLBRE2: | |
| case PPC::TLBWE2: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: WS | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LBZUX: | |
| case PPC::LBZUX8: | |
| case PPC::LDUX: | |
| case PPC::LFDUX: | |
| case PPC::LFSUX: | |
| case PPC::LHAUX: | |
| case PPC::LHAUX8: | |
| case PPC::LHZUX: | |
| case PPC::LHZUX8: | |
| case PPC::LWAUX: | |
| case PPC::LWZUX: | |
| case PPC::LWZUX8: | |
| case PPC::XSMADDQP: | |
| case PPC::XSMADDQPO: | |
| case PPC::XSMSUBQP: | |
| case PPC::XSMSUBQPO: | |
| case PPC::XSNMADDQP: | |
| case PPC::XSNMADDQPO: | |
| case PPC::XSNMSUBQP: | |
| case PPC::XSNMSUBQPO: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::FABSD: | |
| case PPC::FABSD_rec: | |
| case PPC::FABSS: | |
| case PPC::FABSS_rec: | |
| case PPC::FCFID: | |
| case PPC::FCFIDS: | |
| case PPC::FCFIDS_rec: | |
| case PPC::FCFIDU: | |
| case PPC::FCFIDUS: | |
| case PPC::FCFIDUS_rec: | |
| case PPC::FCFIDU_rec: | |
| case PPC::FCFID_rec: | |
| case PPC::FCTID: | |
| case PPC::FCTIDU: | |
| case PPC::FCTIDUZ: | |
| case PPC::FCTIDUZ_rec: | |
| case PPC::FCTIDU_rec: | |
| case PPC::FCTIDZ: | |
| case PPC::FCTIDZ_rec: | |
| case PPC::FCTID_rec: | |
| case PPC::FCTIW: | |
| case PPC::FCTIWU: | |
| case PPC::FCTIWUZ: | |
| case PPC::FCTIWUZ_rec: | |
| case PPC::FCTIWU_rec: | |
| case PPC::FCTIWZ: | |
| case PPC::FCTIWZ_rec: | |
| case PPC::FCTIW_rec: | |
| case PPC::FMR: | |
| case PPC::FMR_rec: | |
| case PPC::FNABSD: | |
| case PPC::FNABSD_rec: | |
| case PPC::FNABSS: | |
| case PPC::FNABSS_rec: | |
| case PPC::FNEGD: | |
| case PPC::FNEGD_rec: | |
| case PPC::FNEGS: | |
| case PPC::FNEGS_rec: | |
| case PPC::FRE: | |
| case PPC::FRES: | |
| case PPC::FRES_rec: | |
| case PPC::FRE_rec: | |
| case PPC::FRIMD: | |
| case PPC::FRIMD_rec: | |
| case PPC::FRIMS: | |
| case PPC::FRIMS_rec: | |
| case PPC::FRIND: | |
| case PPC::FRIND_rec: | |
| case PPC::FRINS: | |
| case PPC::FRINS_rec: | |
| case PPC::FRIPD: | |
| case PPC::FRIPD_rec: | |
| case PPC::FRIPS: | |
| case PPC::FRIPS_rec: | |
| case PPC::FRIZD: | |
| case PPC::FRIZD_rec: | |
| case PPC::FRIZS: | |
| case PPC::FRIZS_rec: | |
| case PPC::FRSP: | |
| case PPC::FRSP_rec: | |
| case PPC::FRSQRTE: | |
| case PPC::FRSQRTES: | |
| case PPC::FRSQRTES_rec: | |
| case PPC::FRSQRTE_rec: | |
| case PPC::FSQRT: | |
| case PPC::FSQRTS: | |
| case PPC::FSQRTS_rec: | |
| case PPC::FSQRT_rec: | |
| case PPC::SLBFEE_rec: | |
| case PPC::SLBIEG: | |
| case PPC::SLBMFEE: | |
| case PPC::SLBMTE: | |
| case PPC::TLBIE: | |
| case PPC::XSABSQP: | |
| case PPC::XSCVDPQP: | |
| case PPC::XSCVQPDP: | |
| case PPC::XSCVQPDPO: | |
| case PPC::XSCVQPSDZ: | |
| case PPC::XSCVQPSQZ: | |
| case PPC::XSCVQPSWZ: | |
| case PPC::XSCVQPUDZ: | |
| case PPC::XSCVQPUQZ: | |
| case PPC::XSCVQPUWZ: | |
| case PPC::XSCVSDQP: | |
| case PPC::XSCVSQQP: | |
| case PPC::XSCVUDQP: | |
| case PPC::XSCVUQQP: | |
| case PPC::XSNABSQP: | |
| case PPC::XSNEGQP: | |
| case PPC::XSSQRTQP: | |
| case PPC::XSSQRTQPO: | |
| case PPC::XSXEXPQP: | |
| case PPC::XSXSIGQP: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFFSCDRNI: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: DRM | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LD: | |
| case PPC::LWA: | |
| case PPC::LWA_32: | |
| case PPC::LXSD: | |
| case PPC::LXSSP: | |
| case PPC::STD: | |
| case PPC::STQ: | |
| case PPC::STXSD: | |
| case PPC::STXSSP: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: DS_RA | |
| op = getMemRIXEncoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(524287); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LDU: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: DS_RA | |
| op = getMemRIXEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(524287); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFFSCDRN: | |
| case PPC::MFFSCRN: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: FRB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFFSCRNI: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RM | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::STBUX: | |
| case PPC::STBUX8: | |
| case PPC::STDUX: | |
| case PPC::STFDUX: | |
| case PPC::STFSUX: | |
| case PPC::STHUX: | |
| case PPC::STHUX8: | |
| case PPC::STWUX: | |
| case PPC::STWUX8: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::STDU: { | |
| // op: RST | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: DS_RA | |
| op = getMemRIXEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(524287); | |
| op <<= 2; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFCR: | |
| case PPC::MFCR8: | |
| case PPC::MFCTR: | |
| case PPC::MFCTR8: | |
| case PPC::MFLR: | |
| case PPC::MFLR8: | |
| case PPC::MFTB8: | |
| case PPC::MFUDSCR: | |
| case PPC::MFVRSAVE: | |
| case PPC::MFVRSAVEv: | |
| case PPC::MTCTR: | |
| case PPC::MTCTR8: | |
| case PPC::MTCTR8loop: | |
| case PPC::MTCTRloop: | |
| case PPC::MTLR: | |
| case PPC::MTLR8: | |
| case PPC::MTUDSCR: | |
| case PPC::MTVRSAVE: | |
| case PPC::MTVRSAVEv: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::SETB: | |
| case PPC::SETB8: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: BFA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 18; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTVSRBMI: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D | |
| op = getImm16Encoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(62)) << 15; | |
| Value |= (op & UINT64_C(65472)); | |
| Value |= (op & UINT64_C(1)); | |
| break; | |
| } | |
| case PPC::ADDPCIS: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(62)) << 15; | |
| Value |= (op & UINT64_C(65472)); | |
| Value |= (op & UINT64_C(1)); | |
| break; | |
| } | |
| case PPC::EVLHHESPLAT: | |
| case PPC::EVLHHOSSPLAT: | |
| case PPC::EVLHHOUSPLAT: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D | |
| op = getSPE2DisEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(1)) << 20; | |
| Value |= (op & UINT64_C(2)) << 18; | |
| Value |= (op & UINT64_C(4)) << 16; | |
| Value |= (op & UINT64_C(8)) << 14; | |
| Value |= (op & UINT64_C(16)) << 12; | |
| Value |= (op & UINT64_C(32)) << 10; | |
| Value |= (op & UINT64_C(64)) << 8; | |
| Value |= (op & UINT64_C(128)) << 6; | |
| Value |= (op & UINT64_C(256)) << 4; | |
| Value |= (op & UINT64_C(512)) << 2; | |
| break; | |
| } | |
| case PPC::EVLWHE: | |
| case PPC::EVLWHOS: | |
| case PPC::EVLWHOU: | |
| case PPC::EVLWHSPLAT: | |
| case PPC::EVLWWSPLAT: | |
| case PPC::EVSTWHE: | |
| case PPC::EVSTWHO: | |
| case PPC::EVSTWWE: | |
| case PPC::EVSTWWO: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D | |
| op = getSPE4DisEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(1)) << 20; | |
| Value |= (op & UINT64_C(2)) << 18; | |
| Value |= (op & UINT64_C(4)) << 16; | |
| Value |= (op & UINT64_C(8)) << 14; | |
| Value |= (op & UINT64_C(16)) << 12; | |
| Value |= (op & UINT64_C(32)) << 10; | |
| Value |= (op & UINT64_C(64)) << 8; | |
| Value |= (op & UINT64_C(128)) << 6; | |
| Value |= (op & UINT64_C(256)) << 4; | |
| Value |= (op & UINT64_C(512)) << 2; | |
| break; | |
| } | |
| case PPC::EVLDD: | |
| case PPC::EVLDH: | |
| case PPC::EVLDW: | |
| case PPC::EVSTDD: | |
| case PPC::EVSTDH: | |
| case PPC::EVSTDW: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D | |
| op = getSPE8DisEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(1)) << 20; | |
| Value |= (op & UINT64_C(2)) << 18; | |
| Value |= (op & UINT64_C(4)) << 16; | |
| Value |= (op & UINT64_C(8)) << 14; | |
| Value |= (op & UINT64_C(16)) << 12; | |
| Value |= (op & UINT64_C(32)) << 10; | |
| Value |= (op & UINT64_C(64)) << 8; | |
| Value |= (op & UINT64_C(128)) << 6; | |
| Value |= (op & UINT64_C(256)) << 4; | |
| Value |= (op & UINT64_C(512)) << 2; | |
| break; | |
| } | |
| case PPC::PLD: | |
| case PPC::PLWA: | |
| case PPC::PLWA8: | |
| case PPC::PLXSD: | |
| case PPC::PLXSSP: | |
| case PPC::PSTD: | |
| case PPC::PSTXSD: | |
| case PPC::PSTXSSP: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D_RA | |
| op = getMemRI34Encoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::PLDpc: | |
| case PPC::PLWA8pc: | |
| case PPC::PLWApc: | |
| case PPC::PLXSDpc: | |
| case PPC::PLXSSPpc: | |
| case PPC::PSTDpc: | |
| case PPC::PSTXSDpc: | |
| case PPC::PSTXSSPpc: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D_RA | |
| op = getMemRI34PCRelEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::MFBHRBE: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: Entry | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(1023); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DARN: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ADDME: | |
| case PPC::ADDME8: | |
| case PPC::ADDME8O: | |
| case PPC::ADDME8O_rec: | |
| case PPC::ADDME8_rec: | |
| case PPC::ADDMEO: | |
| case PPC::ADDMEO_rec: | |
| case PPC::ADDME_rec: | |
| case PPC::ADDZE: | |
| case PPC::ADDZE8: | |
| case PPC::ADDZE8O: | |
| case PPC::ADDZE8O_rec: | |
| case PPC::ADDZE8_rec: | |
| case PPC::ADDZEO: | |
| case PPC::ADDZEO_rec: | |
| case PPC::ADDZE_rec: | |
| case PPC::EFDABS: | |
| case PPC::EFDNABS: | |
| case PPC::EFDNEG: | |
| case PPC::EFSABS: | |
| case PPC::EFSNABS: | |
| case PPC::EFSNEG: | |
| case PPC::EVABS: | |
| case PPC::EVADDSMIAAW: | |
| case PPC::EVADDSSIAAW: | |
| case PPC::EVADDUMIAAW: | |
| case PPC::EVADDUSIAAW: | |
| case PPC::EVCNTLSW: | |
| case PPC::EVCNTLZW: | |
| case PPC::EVEXTSB: | |
| case PPC::EVEXTSH: | |
| case PPC::EVFSABS: | |
| case PPC::EVFSNABS: | |
| case PPC::EVFSNEG: | |
| case PPC::EVMRA: | |
| case PPC::EVNEG: | |
| case PPC::EVRNDW: | |
| case PPC::EVSPLATFI: | |
| case PPC::EVSPLATI: | |
| case PPC::EVSUBFSMIAAW: | |
| case PPC::EVSUBFSSIAAW: | |
| case PPC::EVSUBFUMIAAW: | |
| case PPC::EVSUBFUSIAAW: | |
| case PPC::NEG: | |
| case PPC::NEG8: | |
| case PPC::NEG8O: | |
| case PPC::NEG8O_rec: | |
| case PPC::NEG8_rec: | |
| case PPC::NEGO: | |
| case PPC::NEGO_rec: | |
| case PPC::NEG_rec: | |
| case PPC::SUBFME: | |
| case PPC::SUBFME8: | |
| case PPC::SUBFME8O: | |
| case PPC::SUBFME8O_rec: | |
| case PPC::SUBFME8_rec: | |
| case PPC::SUBFMEO: | |
| case PPC::SUBFMEO_rec: | |
| case PPC::SUBFME_rec: | |
| case PPC::SUBFZE: | |
| case PPC::SUBFZE8: | |
| case PPC::SUBFZE8O: | |
| case PPC::SUBFZE8O_rec: | |
| case PPC::SUBFZE8_rec: | |
| case PPC::SUBFZEO: | |
| case PPC::SUBFZEO_rec: | |
| case PPC::SUBFZE_rec: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ADD4: | |
| case PPC::ADD4O: | |
| case PPC::ADD4O_rec: | |
| case PPC::ADD4_rec: | |
| case PPC::ADD8: | |
| case PPC::ADD8O: | |
| case PPC::ADD8O_rec: | |
| case PPC::ADD8_rec: | |
| case PPC::ADDC: | |
| case PPC::ADDC8: | |
| case PPC::ADDC8O: | |
| case PPC::ADDC8O_rec: | |
| case PPC::ADDC8_rec: | |
| case PPC::ADDCO: | |
| case PPC::ADDCO_rec: | |
| case PPC::ADDC_rec: | |
| case PPC::ADDE: | |
| case PPC::ADDE8: | |
| case PPC::ADDE8O: | |
| case PPC::ADDE8O_rec: | |
| case PPC::ADDE8_rec: | |
| case PPC::ADDEO: | |
| case PPC::ADDEO_rec: | |
| case PPC::ADDE_rec: | |
| case PPC::BRINC: | |
| case PPC::DIVD: | |
| case PPC::DIVDE: | |
| case PPC::DIVDEO: | |
| case PPC::DIVDEO_rec: | |
| case PPC::DIVDEU: | |
| case PPC::DIVDEUO: | |
| case PPC::DIVDEUO_rec: | |
| case PPC::DIVDEU_rec: | |
| case PPC::DIVDE_rec: | |
| case PPC::DIVDO: | |
| case PPC::DIVDO_rec: | |
| case PPC::DIVDU: | |
| case PPC::DIVDUO: | |
| case PPC::DIVDUO_rec: | |
| case PPC::DIVDU_rec: | |
| case PPC::DIVD_rec: | |
| case PPC::DIVW: | |
| case PPC::DIVWE: | |
| case PPC::DIVWEO: | |
| case PPC::DIVWEO_rec: | |
| case PPC::DIVWEU: | |
| case PPC::DIVWEUO: | |
| case PPC::DIVWEUO_rec: | |
| case PPC::DIVWEU_rec: | |
| case PPC::DIVWE_rec: | |
| case PPC::DIVWO: | |
| case PPC::DIVWO_rec: | |
| case PPC::DIVWU: | |
| case PPC::DIVWUO: | |
| case PPC::DIVWUO_rec: | |
| case PPC::DIVWU_rec: | |
| case PPC::DIVW_rec: | |
| case PPC::EFDADD: | |
| case PPC::EFDDIV: | |
| case PPC::EFDMUL: | |
| case PPC::EFDSUB: | |
| case PPC::EFSADD: | |
| case PPC::EFSDIV: | |
| case PPC::EFSMUL: | |
| case PPC::EFSSUB: | |
| case PPC::EVADDIW: | |
| case PPC::EVADDW: | |
| case PPC::EVAND: | |
| case PPC::EVANDC: | |
| case PPC::EVDIVWS: | |
| case PPC::EVDIVWU: | |
| case PPC::EVEQV: | |
| case PPC::EVFSADD: | |
| case PPC::EVFSDIV: | |
| case PPC::EVFSMUL: | |
| case PPC::EVFSSUB: | |
| case PPC::EVLDDX: | |
| case PPC::EVLDHX: | |
| case PPC::EVLDWX: | |
| case PPC::EVLHHESPLATX: | |
| case PPC::EVLHHOSSPLATX: | |
| case PPC::EVLHHOUSPLATX: | |
| case PPC::EVLWHEX: | |
| case PPC::EVLWHOSX: | |
| case PPC::EVLWHOUX: | |
| case PPC::EVLWHSPLATX: | |
| case PPC::EVLWWSPLATX: | |
| case PPC::EVMERGEHI: | |
| case PPC::EVMERGEHILO: | |
| case PPC::EVMERGELO: | |
| case PPC::EVMERGELOHI: | |
| case PPC::EVMHEGSMFAA: | |
| case PPC::EVMHEGSMFAN: | |
| case PPC::EVMHEGSMIAA: | |
| case PPC::EVMHEGSMIAN: | |
| case PPC::EVMHEGUMIAA: | |
| case PPC::EVMHEGUMIAN: | |
| case PPC::EVMHESMF: | |
| case PPC::EVMHESMFA: | |
| case PPC::EVMHESMFAAW: | |
| case PPC::EVMHESMFANW: | |
| case PPC::EVMHESMI: | |
| case PPC::EVMHESMIA: | |
| case PPC::EVMHESMIAAW: | |
| case PPC::EVMHESMIANW: | |
| case PPC::EVMHESSF: | |
| case PPC::EVMHESSFA: | |
| case PPC::EVMHESSFAAW: | |
| case PPC::EVMHESSFANW: | |
| case PPC::EVMHESSIAAW: | |
| case PPC::EVMHESSIANW: | |
| case PPC::EVMHEUMI: | |
| case PPC::EVMHEUMIA: | |
| case PPC::EVMHEUMIAAW: | |
| case PPC::EVMHEUMIANW: | |
| case PPC::EVMHEUSIAAW: | |
| case PPC::EVMHEUSIANW: | |
| case PPC::EVMHOGSMFAA: | |
| case PPC::EVMHOGSMFAN: | |
| case PPC::EVMHOGSMIAA: | |
| case PPC::EVMHOGSMIAN: | |
| case PPC::EVMHOGUMIAA: | |
| case PPC::EVMHOGUMIAN: | |
| case PPC::EVMHOSMF: | |
| case PPC::EVMHOSMFA: | |
| case PPC::EVMHOSMFAAW: | |
| case PPC::EVMHOSMFANW: | |
| case PPC::EVMHOSMI: | |
| case PPC::EVMHOSMIA: | |
| case PPC::EVMHOSMIAAW: | |
| case PPC::EVMHOSMIANW: | |
| case PPC::EVMHOSSF: | |
| case PPC::EVMHOSSFA: | |
| case PPC::EVMHOSSFAAW: | |
| case PPC::EVMHOSSFANW: | |
| case PPC::EVMHOSSIAAW: | |
| case PPC::EVMHOSSIANW: | |
| case PPC::EVMHOUMI: | |
| case PPC::EVMHOUMIA: | |
| case PPC::EVMHOUMIAAW: | |
| case PPC::EVMHOUMIANW: | |
| case PPC::EVMHOUSIAAW: | |
| case PPC::EVMHOUSIANW: | |
| case PPC::EVMWHSMF: | |
| case PPC::EVMWHSMFA: | |
| case PPC::EVMWHSMI: | |
| case PPC::EVMWHSMIA: | |
| case PPC::EVMWHSSF: | |
| case PPC::EVMWHSSFA: | |
| case PPC::EVMWHUMI: | |
| case PPC::EVMWHUMIA: | |
| case PPC::EVMWLSMIAAW: | |
| case PPC::EVMWLSMIANW: | |
| case PPC::EVMWLSSIAAW: | |
| case PPC::EVMWLSSIANW: | |
| case PPC::EVMWLUMI: | |
| case PPC::EVMWLUMIA: | |
| case PPC::EVMWLUMIAAW: | |
| case PPC::EVMWLUMIANW: | |
| case PPC::EVMWLUSIAAW: | |
| case PPC::EVMWLUSIANW: | |
| case PPC::EVMWSMF: | |
| case PPC::EVMWSMFA: | |
| case PPC::EVMWSMFAA: | |
| case PPC::EVMWSMFAN: | |
| case PPC::EVMWSMI: | |
| case PPC::EVMWSMIA: | |
| case PPC::EVMWSMIAA: | |
| case PPC::EVMWSMIAN: | |
| case PPC::EVMWSSF: | |
| case PPC::EVMWSSFA: | |
| case PPC::EVMWSSFAA: | |
| case PPC::EVMWSSFAN: | |
| case PPC::EVMWUMI: | |
| case PPC::EVMWUMIA: | |
| case PPC::EVMWUMIAA: | |
| case PPC::EVMWUMIAN: | |
| case PPC::EVNAND: | |
| case PPC::EVNOR: | |
| case PPC::EVOR: | |
| case PPC::EVORC: | |
| case PPC::EVRLW: | |
| case PPC::EVRLWI: | |
| case PPC::EVSLW: | |
| case PPC::EVSLWI: | |
| case PPC::EVSRWIS: | |
| case PPC::EVSRWIU: | |
| case PPC::EVSRWS: | |
| case PPC::EVSRWU: | |
| case PPC::EVSTDDX: | |
| case PPC::EVSTDHX: | |
| case PPC::EVSTDWX: | |
| case PPC::EVSTWHEX: | |
| case PPC::EVSTWHOX: | |
| case PPC::EVSTWWEX: | |
| case PPC::EVSTWWOX: | |
| case PPC::EVSUBFW: | |
| case PPC::EVSUBIFW: | |
| case PPC::EVXOR: | |
| case PPC::MULHD: | |
| case PPC::MULHDU: | |
| case PPC::MULHDU_rec: | |
| case PPC::MULHD_rec: | |
| case PPC::MULHW: | |
| case PPC::MULHWU: | |
| case PPC::MULHWU_rec: | |
| case PPC::MULHW_rec: | |
| case PPC::MULLD: | |
| case PPC::MULLDO: | |
| case PPC::MULLDO_rec: | |
| case PPC::MULLD_rec: | |
| case PPC::MULLW: | |
| case PPC::MULLWO: | |
| case PPC::MULLWO_rec: | |
| case PPC::MULLW_rec: | |
| case PPC::SUBF: | |
| case PPC::SUBF8: | |
| case PPC::SUBF8O: | |
| case PPC::SUBF8O_rec: | |
| case PPC::SUBF8_rec: | |
| case PPC::SUBFC: | |
| case PPC::SUBFC8: | |
| case PPC::SUBFC8O: | |
| case PPC::SUBFC8O_rec: | |
| case PPC::SUBFC8_rec: | |
| case PPC::SUBFCO: | |
| case PPC::SUBFCO_rec: | |
| case PPC::SUBFC_rec: | |
| case PPC::SUBFE: | |
| case PPC::SUBFE8: | |
| case PPC::SUBFE8O: | |
| case PPC::SUBFE8O_rec: | |
| case PPC::SUBFE8_rec: | |
| case PPC::SUBFEO: | |
| case PPC::SUBFEO_rec: | |
| case PPC::SUBFE_rec: | |
| case PPC::SUBFO: | |
| case PPC::SUBFO_rec: | |
| case PPC::SUBF_rec: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ISEL: | |
| case PPC::ISEL8: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: COND | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ADDEX: | |
| case PPC::ADDEX8: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: CY | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 9; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::SUBFUS: | |
| case PPC::SUBFUS_rec: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: L | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 10; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::ADD4TLS: | |
| case PPC::ADD8TLS: | |
| case PPC::ADD8TLS_: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getTLSRegEncoding(MI, 2, Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PADDI: | |
| case PPC::PADDI8: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: SI | |
| op = getImm34EncodingNoPCRel(MI, 2, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::PADDI8pc: | |
| case PPC::PADDIpc: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: SI | |
| op = getImm34EncodingPCRel(MI, 2, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::EFDCFS: | |
| case PPC::EFDCFSF: | |
| case PPC::EFDCFSI: | |
| case PPC::EFDCFSID: | |
| case PPC::EFDCFUF: | |
| case PPC::EFDCFUI: | |
| case PPC::EFDCFUID: | |
| case PPC::EFDCTSF: | |
| case PPC::EFDCTSI: | |
| case PPC::EFDCTSIDZ: | |
| case PPC::EFDCTSIZ: | |
| case PPC::EFDCTUF: | |
| case PPC::EFDCTUI: | |
| case PPC::EFDCTUIDZ: | |
| case PPC::EFDCTUIZ: | |
| case PPC::EFSCFD: | |
| case PPC::EFSCFSF: | |
| case PPC::EFSCFSI: | |
| case PPC::EFSCFUF: | |
| case PPC::EFSCFUI: | |
| case PPC::EFSCTSF: | |
| case PPC::EFSCTSI: | |
| case PPC::EFSCTSIZ: | |
| case PPC::EFSCTUF: | |
| case PPC::EFSCTUI: | |
| case PPC::EFSCTUIZ: | |
| case PPC::EVFSCFSF: | |
| case PPC::EVFSCFSI: | |
| case PPC::EVFSCFUF: | |
| case PPC::EVFSCFUI: | |
| case PPC::EVFSCTSF: | |
| case PPC::EVFSCTSI: | |
| case PPC::EVFSCTSIZ: | |
| case PPC::EVFSCTUF: | |
| case PPC::EVFSCTUI: | |
| case PPC::EVFSCTUIZ: | |
| case PPC::SLBMFEV: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PLI: | |
| case PPC::PLI8: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: SI | |
| op = getImm34EncodingNoPCRel(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::MFDCR: | |
| case PPC::MFPMR: | |
| case PPC::MFSPR: | |
| case PPC::MFSPR8: | |
| case PPC::MFTB: | |
| case PPC::MTDCR: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: SPR | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(992)) << 6; | |
| break; | |
| } | |
| case PPC::XSXEXPDP: | |
| case PPC::XSXSIGDP: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::MTPMR: | |
| case PPC::MTSPR: | |
| case PPC::MTSPR8: { | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: SPR | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(992)) << 6; | |
| break; | |
| } | |
| case PPC::LQ: { | |
| // op: RTp | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: DQ_RA | |
| op = getMemRIX16Encoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(131071); | |
| op <<= 4; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::RFEBB: { | |
| // op: S | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MFOCRF: | |
| case PPC::MFOCRF8: { | |
| // op: ST | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: FXM | |
| op = get_crbitm_encoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 12; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTOCRF: | |
| case PPC::MTOCRF8: { | |
| // op: ST | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: FXM | |
| op = get_crbitm_encoding(MI, 0, Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 12; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DSS: { | |
| // op: STRM | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DST: | |
| case PPC::DST64: | |
| case PPC::DSTST: | |
| case PPC::DSTST64: | |
| case PPC::DSTSTT: | |
| case PPC::DSTSTT64: | |
| case PPC::DSTT: | |
| case PPC::DSTT64: { | |
| // op: STRM | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DCBF: | |
| case PPC::DCBT: | |
| case PPC::DCBTST: { | |
| // op: TH | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::DCBTEP: | |
| case PPC::DCBTSTEP: { | |
| // op: TH | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTVSCR: { | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::V_SET0: | |
| case PPC::V_SET0B: | |
| case PPC::V_SET0H: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(31)) << 11; | |
| break; | |
| } | |
| case PPC::MFVSCR: | |
| case PPC::V_SETALLONES: | |
| case PPC::V_SETALLONESB: | |
| case PPC::V_SETALLONESH: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VSPLTISB: | |
| case PPC::VSPLTISH: | |
| case PPC::VSPLTISW: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: IMM | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VMUL10CUQ: | |
| case PPC::VMUL10UQ: | |
| case PPC::VSBOX: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VSHASIGMAD: | |
| case PPC::VSHASIGMAW: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: ST | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 15; | |
| Value |= op; | |
| // op: SIX | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCDCPSGN_rec: | |
| case PPC::BCDUS_rec: | |
| case PPC::BCDUTRUNC_rec: | |
| case PPC::VABSDUB: | |
| case PPC::VABSDUH: | |
| case PPC::VABSDUW: | |
| case PPC::VADDCUQ: | |
| case PPC::VADDCUW: | |
| case PPC::VADDFP: | |
| case PPC::VADDSBS: | |
| case PPC::VADDSHS: | |
| case PPC::VADDSWS: | |
| case PPC::VADDUBM: | |
| case PPC::VADDUBS: | |
| case PPC::VADDUDM: | |
| case PPC::VADDUHM: | |
| case PPC::VADDUHS: | |
| case PPC::VADDUQM: | |
| case PPC::VADDUWM: | |
| case PPC::VADDUWS: | |
| case PPC::VAND: | |
| case PPC::VANDC: | |
| case PPC::VAVGSB: | |
| case PPC::VAVGSH: | |
| case PPC::VAVGSW: | |
| case PPC::VAVGUB: | |
| case PPC::VAVGUH: | |
| case PPC::VAVGUW: | |
| case PPC::VBPERMD: | |
| case PPC::VBPERMQ: | |
| case PPC::VCFSX: | |
| case PPC::VCFUGED: | |
| case PPC::VCFUX: | |
| case PPC::VCIPHER: | |
| case PPC::VCIPHERLAST: | |
| case PPC::VCLRLB: | |
| case PPC::VCLRRB: | |
| case PPC::VCLZDM: | |
| case PPC::VCMPBFP: | |
| case PPC::VCMPBFP_rec: | |
| case PPC::VCMPEQFP: | |
| case PPC::VCMPEQFP_rec: | |
| case PPC::VCMPEQUB: | |
| case PPC::VCMPEQUB_rec: | |
| case PPC::VCMPEQUD: | |
| case PPC::VCMPEQUD_rec: | |
| case PPC::VCMPEQUH: | |
| case PPC::VCMPEQUH_rec: | |
| case PPC::VCMPEQUQ: | |
| case PPC::VCMPEQUQ_rec: | |
| case PPC::VCMPEQUW: | |
| case PPC::VCMPEQUW_rec: | |
| case PPC::VCMPGEFP: | |
| case PPC::VCMPGEFP_rec: | |
| case PPC::VCMPGTFP: | |
| case PPC::VCMPGTFP_rec: | |
| case PPC::VCMPGTSB: | |
| case PPC::VCMPGTSB_rec: | |
| case PPC::VCMPGTSD: | |
| case PPC::VCMPGTSD_rec: | |
| case PPC::VCMPGTSH: | |
| case PPC::VCMPGTSH_rec: | |
| case PPC::VCMPGTSQ: | |
| case PPC::VCMPGTSQ_rec: | |
| case PPC::VCMPGTSW: | |
| case PPC::VCMPGTSW_rec: | |
| case PPC::VCMPGTUB: | |
| case PPC::VCMPGTUB_rec: | |
| case PPC::VCMPGTUD: | |
| case PPC::VCMPGTUD_rec: | |
| case PPC::VCMPGTUH: | |
| case PPC::VCMPGTUH_rec: | |
| case PPC::VCMPGTUQ: | |
| case PPC::VCMPGTUQ_rec: | |
| case PPC::VCMPGTUW: | |
| case PPC::VCMPGTUW_rec: | |
| case PPC::VCMPNEB: | |
| case PPC::VCMPNEB_rec: | |
| case PPC::VCMPNEH: | |
| case PPC::VCMPNEH_rec: | |
| case PPC::VCMPNEW: | |
| case PPC::VCMPNEW_rec: | |
| case PPC::VCMPNEZB: | |
| case PPC::VCMPNEZB_rec: | |
| case PPC::VCMPNEZH: | |
| case PPC::VCMPNEZH_rec: | |
| case PPC::VCMPNEZW: | |
| case PPC::VCMPNEZW_rec: | |
| case PPC::VCTSXS: | |
| case PPC::VCTUXS: | |
| case PPC::VCTZDM: | |
| case PPC::VDIVESD: | |
| case PPC::VDIVESQ: | |
| case PPC::VDIVESW: | |
| case PPC::VDIVEUD: | |
| case PPC::VDIVEUQ: | |
| case PPC::VDIVEUW: | |
| case PPC::VDIVSD: | |
| case PPC::VDIVSQ: | |
| case PPC::VDIVSW: | |
| case PPC::VDIVUD: | |
| case PPC::VDIVUQ: | |
| case PPC::VDIVUW: | |
| case PPC::VEQV: | |
| case PPC::VEXTRACTD: | |
| case PPC::VEXTRACTUB: | |
| case PPC::VEXTRACTUH: | |
| case PPC::VEXTRACTUW: | |
| case PPC::VEXTUBLX: | |
| case PPC::VEXTUBRX: | |
| case PPC::VEXTUHLX: | |
| case PPC::VEXTUHRX: | |
| case PPC::VEXTUWLX: | |
| case PPC::VEXTUWRX: | |
| case PPC::VINSERTD: | |
| case PPC::VINSERTW: | |
| case PPC::VMAXFP: | |
| case PPC::VMAXSB: | |
| case PPC::VMAXSD: | |
| case PPC::VMAXSH: | |
| case PPC::VMAXSW: | |
| case PPC::VMAXUB: | |
| case PPC::VMAXUD: | |
| case PPC::VMAXUH: | |
| case PPC::VMAXUW: | |
| case PPC::VMINFP: | |
| case PPC::VMINSB: | |
| case PPC::VMINSD: | |
| case PPC::VMINSH: | |
| case PPC::VMINSW: | |
| case PPC::VMINUB: | |
| case PPC::VMINUD: | |
| case PPC::VMINUH: | |
| case PPC::VMINUW: | |
| case PPC::VMODSD: | |
| case PPC::VMODSQ: | |
| case PPC::VMODSW: | |
| case PPC::VMODUD: | |
| case PPC::VMODUQ: | |
| case PPC::VMODUW: | |
| case PPC::VMRGEW: | |
| case PPC::VMRGHB: | |
| case PPC::VMRGHH: | |
| case PPC::VMRGHW: | |
| case PPC::VMRGLB: | |
| case PPC::VMRGLH: | |
| case PPC::VMRGLW: | |
| case PPC::VMRGOW: | |
| case PPC::VMUL10ECUQ: | |
| case PPC::VMUL10EUQ: | |
| case PPC::VMULESB: | |
| case PPC::VMULESD: | |
| case PPC::VMULESH: | |
| case PPC::VMULESW: | |
| case PPC::VMULEUB: | |
| case PPC::VMULEUD: | |
| case PPC::VMULEUH: | |
| case PPC::VMULEUW: | |
| case PPC::VMULHSD: | |
| case PPC::VMULHSW: | |
| case PPC::VMULHUD: | |
| case PPC::VMULHUW: | |
| case PPC::VMULLD: | |
| case PPC::VMULOSB: | |
| case PPC::VMULOSD: | |
| case PPC::VMULOSH: | |
| case PPC::VMULOSW: | |
| case PPC::VMULOUB: | |
| case PPC::VMULOUD: | |
| case PPC::VMULOUH: | |
| case PPC::VMULOUW: | |
| case PPC::VMULUWM: | |
| case PPC::VNAND: | |
| case PPC::VNCIPHER: | |
| case PPC::VNCIPHERLAST: | |
| case PPC::VNOR: | |
| case PPC::VOR: | |
| case PPC::VORC: | |
| case PPC::VPDEPD: | |
| case PPC::VPEXTD: | |
| case PPC::VPKPX: | |
| case PPC::VPKSDSS: | |
| case PPC::VPKSDUS: | |
| case PPC::VPKSHSS: | |
| case PPC::VPKSHUS: | |
| case PPC::VPKSWSS: | |
| case PPC::VPKSWUS: | |
| case PPC::VPKUDUM: | |
| case PPC::VPKUDUS: | |
| case PPC::VPKUHUM: | |
| case PPC::VPKUHUS: | |
| case PPC::VPKUWUM: | |
| case PPC::VPKUWUS: | |
| case PPC::VPMSUMB: | |
| case PPC::VPMSUMD: | |
| case PPC::VPMSUMH: | |
| case PPC::VPMSUMW: | |
| case PPC::VRLB: | |
| case PPC::VRLD: | |
| case PPC::VRLDMI: | |
| case PPC::VRLDNM: | |
| case PPC::VRLH: | |
| case PPC::VRLQ: | |
| case PPC::VRLQMI: | |
| case PPC::VRLQNM: | |
| case PPC::VRLW: | |
| case PPC::VRLWMI: | |
| case PPC::VRLWNM: | |
| case PPC::VSL: | |
| case PPC::VSLB: | |
| case PPC::VSLD: | |
| case PPC::VSLH: | |
| case PPC::VSLO: | |
| case PPC::VSLQ: | |
| case PPC::VSLV: | |
| case PPC::VSLW: | |
| case PPC::VSPLTB: | |
| case PPC::VSPLTBs: | |
| case PPC::VSPLTH: | |
| case PPC::VSPLTHs: | |
| case PPC::VSPLTW: | |
| case PPC::VSR: | |
| case PPC::VSRAB: | |
| case PPC::VSRAD: | |
| case PPC::VSRAH: | |
| case PPC::VSRAQ: | |
| case PPC::VSRAW: | |
| case PPC::VSRB: | |
| case PPC::VSRD: | |
| case PPC::VSRH: | |
| case PPC::VSRO: | |
| case PPC::VSRQ: | |
| case PPC::VSRV: | |
| case PPC::VSRW: | |
| case PPC::VSUBCUQ: | |
| case PPC::VSUBCUW: | |
| case PPC::VSUBFP: | |
| case PPC::VSUBSBS: | |
| case PPC::VSUBSHS: | |
| case PPC::VSUBSWS: | |
| case PPC::VSUBUBM: | |
| case PPC::VSUBUBS: | |
| case PPC::VSUBUDM: | |
| case PPC::VSUBUHM: | |
| case PPC::VSUBUHS: | |
| case PPC::VSUBUQM: | |
| case PPC::VSUBUWM: | |
| case PPC::VSUBUWS: | |
| case PPC::VSUM2SWS: | |
| case PPC::VSUM4SBS: | |
| case PPC::VSUM4SHS: | |
| case PPC::VSUM4UBS: | |
| case PPC::VSUMSWS: | |
| case PPC::VXOR: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCDADD_rec: | |
| case PPC::BCDSR_rec: | |
| case PPC::BCDSUB_rec: | |
| case PPC::BCDS_rec: | |
| case PPC::BCDTRUNC_rec: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: PS | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 9; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VSLDOI: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: SH | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(15); | |
| op <<= 6; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MADDHD: | |
| case PPC::MADDHDU: | |
| case PPC::MADDLD: | |
| case PPC::MADDLD8: | |
| case PPC::VADDECUQ: | |
| case PPC::VADDEUQM: | |
| case PPC::VEXTDDVLX: | |
| case PPC::VEXTDDVRX: | |
| case PPC::VEXTDUBVLX: | |
| case PPC::VEXTDUBVRX: | |
| case PPC::VEXTDUHVLX: | |
| case PPC::VEXTDUHVRX: | |
| case PPC::VEXTDUWVLX: | |
| case PPC::VEXTDUWVRX: | |
| case PPC::VMHADDSHS: | |
| case PPC::VMHRADDSHS: | |
| case PPC::VMLADDUHM: | |
| case PPC::VMSUMCUD: | |
| case PPC::VMSUMMBM: | |
| case PPC::VMSUMSHM: | |
| case PPC::VMSUMSHS: | |
| case PPC::VMSUMUBM: | |
| case PPC::VMSUMUDM: | |
| case PPC::VMSUMUHM: | |
| case PPC::VMSUMUHS: | |
| case PPC::VPERM: | |
| case PPC::VPERMR: | |
| case PPC::VSEL: | |
| case PPC::VSUBECUQ: | |
| case PPC::VSUBEUQM: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: VC | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VMADDFP: | |
| case PPC::VNMSUBFP: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VC | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VPERMXOR: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VC | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 6; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VINSBLX: | |
| case PPC::VINSBRX: | |
| case PPC::VINSBVLX: | |
| case PPC::VINSBVRX: | |
| case PPC::VINSD: | |
| case PPC::VINSDLX: | |
| case PPC::VINSDRX: | |
| case PPC::VINSERTB: | |
| case PPC::VINSERTH: | |
| case PPC::VINSHLX: | |
| case PPC::VINSHRX: | |
| case PPC::VINSHVLX: | |
| case PPC::VINSHVRX: | |
| case PPC::VINSW: | |
| case PPC::VINSWLX: | |
| case PPC::VINSWRX: | |
| case PPC::VINSWVLX: | |
| case PPC::VINSWVRX: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCDCTN_rec: | |
| case PPC::BCDCTSQ_rec: | |
| case PPC::VCFSX_0: | |
| case PPC::VCFUX_0: | |
| case PPC::VCLZB: | |
| case PPC::VCLZD: | |
| case PPC::VCLZH: | |
| case PPC::VCLZW: | |
| case PPC::VCTSXS_0: | |
| case PPC::VCTUXS_0: | |
| case PPC::VEXPTEFP: | |
| case PPC::VGBBD: | |
| case PPC::VLOGEFP: | |
| case PPC::VPOPCNTB: | |
| case PPC::VPOPCNTD: | |
| case PPC::VPOPCNTH: | |
| case PPC::VPOPCNTW: | |
| case PPC::VREFP: | |
| case PPC::VRFIM: | |
| case PPC::VRFIN: | |
| case PPC::VRFIP: | |
| case PPC::VRFIZ: | |
| case PPC::VRSQRTEFP: | |
| case PPC::VUPKHPX: | |
| case PPC::VUPKHSB: | |
| case PPC::VUPKHSH: | |
| case PPC::VUPKHSW: | |
| case PPC::VUPKLPX: | |
| case PPC::VUPKLSB: | |
| case PPC::VUPKLSH: | |
| case PPC::VUPKLSW: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::BCDCFN_rec: | |
| case PPC::BCDCFSQ_rec: | |
| case PPC::BCDCFZ_rec: | |
| case PPC::BCDCTZ_rec: | |
| case PPC::BCDSETSGN_rec: { | |
| // op: VD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: PS | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 9; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XSRQPI: | |
| case PPC::XSRQPIX: | |
| case PPC::XSRQPXP: { | |
| // op: VRT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: R | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VRB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: idx | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 9; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VSLDBI: | |
| case PPC::VSRDBI: { | |
| // op: VRT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VRA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: VRB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: SD | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 6; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::VSTRIBL: | |
| case PPC::VSTRIBL_rec: | |
| case PPC::VSTRIBR: | |
| case PPC::VSTRIBR_rec: | |
| case PPC::VSTRIHL: | |
| case PPC::VSTRIHL_rec: | |
| case PPC::VSTRIHR: | |
| case PPC::VSTRIHR_rec: { | |
| // op: VT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| // op: VB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXLEQVOnes: | |
| case PPC::XXLXORdpz: | |
| case PPC::XXLXORspz: | |
| case PPC::XXLXORz: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| break; | |
| } | |
| case PPC::XXSPLTIDP: | |
| case PPC::XXSPLTIW: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) << 11; | |
| // op: IMM32 | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(4294901760)) << 16; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::XXSPLTI32DX: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) << 11; | |
| // op: IX | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(1); | |
| op <<= 17; | |
| Value |= op; | |
| // op: IMM32 | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(4294901760)) << 16; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::LXV: | |
| case PPC::STXV: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 2; | |
| // op: DS_RA | |
| op = getMemRIX16Encoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(131071); | |
| op <<= 4; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::MTVRD: | |
| case PPC::MTVRWA: | |
| case PPC::MTVRWZ: | |
| case PPC::MTVSRD: | |
| case PPC::MTVSRWA: | |
| case PPC::MTVSRWS: | |
| case PPC::MTVSRWZ: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LXSDX: | |
| case PPC::LXSIBZX: | |
| case PPC::LXSIHZX: | |
| case PPC::LXSIWAX: | |
| case PPC::LXSIWZX: | |
| case PPC::LXSSPX: | |
| case PPC::LXVB16X: | |
| case PPC::LXVD2X: | |
| case PPC::LXVDSX: | |
| case PPC::LXVH8X: | |
| case PPC::LXVL: | |
| case PPC::LXVLL: | |
| case PPC::LXVRBX: | |
| case PPC::LXVRDX: | |
| case PPC::LXVRHX: | |
| case PPC::LXVRL: | |
| case PPC::LXVRLL: | |
| case PPC::LXVRWX: | |
| case PPC::LXVW4X: | |
| case PPC::LXVWSX: | |
| case PPC::LXVX: | |
| case PPC::MTVSRDD: | |
| case PPC::STXSDX: | |
| case PPC::STXSIBX: | |
| case PPC::STXSIBXv: | |
| case PPC::STXSIHX: | |
| case PPC::STXSIHXv: | |
| case PPC::STXSIWX: | |
| case PPC::STXSSPX: | |
| case PPC::STXVB16X: | |
| case PPC::STXVD2X: | |
| case PPC::STXVH8X: | |
| case PPC::STXVL: | |
| case PPC::STXVLL: | |
| case PPC::STXVRBX: | |
| case PPC::STXVRDX: | |
| case PPC::STXVRHX: | |
| case PPC::STXVRL: | |
| case PPC::STXVRLL: | |
| case PPC::STXVRWX: | |
| case PPC::STXVW4X: | |
| case PPC::STXVX: | |
| case PPC::XSIEXPDP: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XVTSTDCDP: | |
| case PPC::XVTSTDCSP: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: DCMX | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(64)); | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::XXSPLTIB: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: IMM8 | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LXVKQ: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: UIM | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXGENPCVBM: | |
| case PPC::XXGENPCVDM: | |
| case PPC::XXGENPCVHM: | |
| case PPC::XXGENPCVWM: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: VRB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: IMM | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXPERMDIs: | |
| case PPC::XXSLDWIs: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: D | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 8; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XSADDDP: | |
| case PPC::XSADDSP: | |
| case PPC::XSCMPEQDP: | |
| case PPC::XSCMPGEDP: | |
| case PPC::XSCMPGTDP: | |
| case PPC::XSCPSGNDP: | |
| case PPC::XSDIVDP: | |
| case PPC::XSDIVSP: | |
| case PPC::XSMAXCDP: | |
| case PPC::XSMAXDP: | |
| case PPC::XSMAXJDP: | |
| case PPC::XSMINCDP: | |
| case PPC::XSMINDP: | |
| case PPC::XSMINJDP: | |
| case PPC::XSMULDP: | |
| case PPC::XSMULSP: | |
| case PPC::XSSUBDP: | |
| case PPC::XSSUBSP: | |
| case PPC::XVADDDP: | |
| case PPC::XVADDSP: | |
| case PPC::XVCMPEQDP: | |
| case PPC::XVCMPEQDP_rec: | |
| case PPC::XVCMPEQSP: | |
| case PPC::XVCMPEQSP_rec: | |
| case PPC::XVCMPGEDP: | |
| case PPC::XVCMPGEDP_rec: | |
| case PPC::XVCMPGESP: | |
| case PPC::XVCMPGESP_rec: | |
| case PPC::XVCMPGTDP: | |
| case PPC::XVCMPGTDP_rec: | |
| case PPC::XVCMPGTSP: | |
| case PPC::XVCMPGTSP_rec: | |
| case PPC::XVCPSGNDP: | |
| case PPC::XVCPSGNSP: | |
| case PPC::XVDIVDP: | |
| case PPC::XVDIVSP: | |
| case PPC::XVIEXPDP: | |
| case PPC::XVIEXPSP: | |
| case PPC::XVMAXDP: | |
| case PPC::XVMAXSP: | |
| case PPC::XVMINDP: | |
| case PPC::XVMINSP: | |
| case PPC::XVMULDP: | |
| case PPC::XVMULSP: | |
| case PPC::XVSUBDP: | |
| case PPC::XVSUBSP: | |
| case PPC::XXLAND: | |
| case PPC::XXLANDC: | |
| case PPC::XXLEQV: | |
| case PPC::XXLNAND: | |
| case PPC::XXLNOR: | |
| case PPC::XXLOR: | |
| case PPC::XXLORC: | |
| case PPC::XXLORf: | |
| case PPC::XXLXOR: | |
| case PPC::XXMRGHW: | |
| case PPC::XXMRGLW: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::XXPERMDI: | |
| case PPC::XXSLDWI: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: D | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 8; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXBLENDVB: | |
| case PPC::XXBLENDVD: | |
| case PPC::XXBLENDVH: | |
| case PPC::XXBLENDVW: | |
| case PPC::XXSEL: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XC | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 6; | |
| Value |= (op & UINT64_C(32)) >> 2; | |
| break; | |
| } | |
| case PPC::XXEVAL: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XC | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 6; | |
| Value |= (op & UINT64_C(32)) >> 2; | |
| // op: IMM | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(255); | |
| op <<= 32; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXPERMX: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: XC | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 6; | |
| Value |= (op & UINT64_C(32)) >> 2; | |
| // op: IMM | |
| op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 32; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXPERM: | |
| case PPC::XXPERMR: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::XSMADDADP: | |
| case PPC::XSMADDASP: | |
| case PPC::XSMADDMDP: | |
| case PPC::XSMADDMSP: | |
| case PPC::XSMSUBADP: | |
| case PPC::XSMSUBASP: | |
| case PPC::XSMSUBMDP: | |
| case PPC::XSMSUBMSP: | |
| case PPC::XSNMADDADP: | |
| case PPC::XSNMADDASP: | |
| case PPC::XSNMADDMDP: | |
| case PPC::XSNMADDMSP: | |
| case PPC::XSNMSUBADP: | |
| case PPC::XSNMSUBASP: | |
| case PPC::XSNMSUBMDP: | |
| case PPC::XSNMSUBMSP: | |
| case PPC::XVMADDADP: | |
| case PPC::XVMADDASP: | |
| case PPC::XVMADDMDP: | |
| case PPC::XVMADDMSP: | |
| case PPC::XVMSUBADP: | |
| case PPC::XVMSUBASP: | |
| case PPC::XVMSUBMDP: | |
| case PPC::XVMSUBMSP: | |
| case PPC::XVNMADDADP: | |
| case PPC::XVNMADDASP: | |
| case PPC::XVNMADDMDP: | |
| case PPC::XVNMADDMSP: | |
| case PPC::XVNMSUBADP: | |
| case PPC::XVNMSUBASP: | |
| case PPC::XVNMSUBMDP: | |
| case PPC::XVNMSUBMSP: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XA | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 16; | |
| Value |= (op & UINT64_C(32)) >> 3; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::XSABSDP: | |
| case PPC::XSCVDPHP: | |
| case PPC::XSCVDPSP: | |
| case PPC::XSCVDPSPN: | |
| case PPC::XSCVDPSXDS: | |
| case PPC::XSCVDPSXDSs: | |
| case PPC::XSCVDPSXWS: | |
| case PPC::XSCVDPSXWSs: | |
| case PPC::XSCVDPUXDS: | |
| case PPC::XSCVDPUXDSs: | |
| case PPC::XSCVDPUXWS: | |
| case PPC::XSCVDPUXWSs: | |
| case PPC::XSCVHPDP: | |
| case PPC::XSCVSPDP: | |
| case PPC::XSCVSPDPN: | |
| case PPC::XSCVSXDDP: | |
| case PPC::XSCVSXDSP: | |
| case PPC::XSCVUXDDP: | |
| case PPC::XSCVUXDSP: | |
| case PPC::XSNABSDP: | |
| case PPC::XSNABSDPs: | |
| case PPC::XSNEGDP: | |
| case PPC::XSRDPI: | |
| case PPC::XSRDPIC: | |
| case PPC::XSRDPIM: | |
| case PPC::XSRDPIP: | |
| case PPC::XSRDPIZ: | |
| case PPC::XSREDP: | |
| case PPC::XSRESP: | |
| case PPC::XSRSP: | |
| case PPC::XSRSQRTEDP: | |
| case PPC::XSRSQRTESP: | |
| case PPC::XSSQRTDP: | |
| case PPC::XSSQRTSP: | |
| case PPC::XVABSDP: | |
| case PPC::XVABSSP: | |
| case PPC::XVCVBF16SPN: | |
| case PPC::XVCVDPSP: | |
| case PPC::XVCVDPSXDS: | |
| case PPC::XVCVDPSXWS: | |
| case PPC::XVCVDPUXDS: | |
| case PPC::XVCVDPUXWS: | |
| case PPC::XVCVHPSP: | |
| case PPC::XVCVSPBF16: | |
| case PPC::XVCVSPDP: | |
| case PPC::XVCVSPHP: | |
| case PPC::XVCVSPSXDS: | |
| case PPC::XVCVSPSXWS: | |
| case PPC::XVCVSPUXDS: | |
| case PPC::XVCVSPUXWS: | |
| case PPC::XVCVSXDDP: | |
| case PPC::XVCVSXDSP: | |
| case PPC::XVCVSXWDP: | |
| case PPC::XVCVSXWSP: | |
| case PPC::XVCVUXDDP: | |
| case PPC::XVCVUXDSP: | |
| case PPC::XVCVUXWDP: | |
| case PPC::XVCVUXWSP: | |
| case PPC::XVNABSDP: | |
| case PPC::XVNABSSP: | |
| case PPC::XVNEGDP: | |
| case PPC::XVNEGSP: | |
| case PPC::XVRDPI: | |
| case PPC::XVRDPIC: | |
| case PPC::XVRDPIM: | |
| case PPC::XVRDPIP: | |
| case PPC::XVRDPIZ: | |
| case PPC::XVREDP: | |
| case PPC::XVRESP: | |
| case PPC::XVRSPI: | |
| case PPC::XVRSPIC: | |
| case PPC::XVRSPIM: | |
| case PPC::XVRSPIP: | |
| case PPC::XVRSPIZ: | |
| case PPC::XVRSQRTEDP: | |
| case PPC::XVRSQRTESP: | |
| case PPC::XVSQRTDP: | |
| case PPC::XVSQRTSP: | |
| case PPC::XVXEXPDP: | |
| case PPC::XVXEXPSP: | |
| case PPC::XVXSIGDP: | |
| case PPC::XVXSIGSP: | |
| case PPC::XXBRD: | |
| case PPC::XXBRH: | |
| case PPC::XXBRQ: | |
| case PPC::XXBRW: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| break; | |
| } | |
| case PPC::XXSPLTW: | |
| case PPC::XXSPLTWs: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: D | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(3); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXEXTRACTUW: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: UIM5 | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::XXINSERTW: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: XB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 11; | |
| Value |= (op & UINT64_C(32)) >> 4; | |
| // op: UIM5 | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PLXV: | |
| case PPC::PSTXV: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(63); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D_RA | |
| op = getMemRI34Encoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::PLXVpc: | |
| case PPC::PSTXVpc: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(63); | |
| op <<= 21; | |
| Value |= op; | |
| // op: D_RA | |
| op = getMemRI34PCRelEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::MFVRD: | |
| case PPC::MFVRWZ: | |
| case PPC::MFVSRD: | |
| case PPC::MFVSRLD: | |
| case PPC::MFVSRWZ: { | |
| // op: XT | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| Value |= (op & UINT64_C(31)) << 21; | |
| Value |= (op & UINT64_C(32)) >> 5; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LXVPRL: | |
| case PPC::LXVPRLL: | |
| case PPC::LXVPX: | |
| case PPC::STXVPRL: | |
| case PPC::STXVPRLL: | |
| case PPC::STXVPX: { | |
| // op: XTp | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 22; | |
| Value |= (op & UINT64_C(16)) << 17; | |
| // op: A | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: B | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::LXVP: | |
| case PPC::STXVP: { | |
| // op: XTp | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 22; | |
| Value |= (op & UINT64_C(16)) << 17; | |
| // op: DQ_RA | |
| op = getMemRIX16Encoding(MI, 1, Fixups, STI); | |
| op &= UINT64_C(131071); | |
| op <<= 4; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::PLXVP: | |
| case PPC::PSTXVP: { | |
| // op: XTp | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 22; | |
| Value |= (op & UINT64_C(16)) << 17; | |
| // op: D_RA | |
| op = getMemRI34Encoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::PLXVPpc: | |
| case PPC::PSTXVPpc: { | |
| // op: XTp | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| Value |= (op & UINT64_C(15)) << 22; | |
| Value |= (op & UINT64_C(16)) << 17; | |
| // op: D_RA | |
| op = getMemRI34PCRelEncoding(MI, 1, Fixups, STI); | |
| Value |= (op & UINT64_C(17179803648)) << 16; | |
| Value |= (op & UINT64_C(532575944704)) >> 18; | |
| Value |= (op & UINT64_C(65535)); | |
| break; | |
| } | |
| case PPC::EFDCMPEQ: | |
| case PPC::EFDCMPGT: | |
| case PPC::EFDCMPLT: | |
| case PPC::EFDTSTEQ: | |
| case PPC::EFDTSTGT: | |
| case PPC::EFDTSTLT: | |
| case PPC::EFSCMPEQ: | |
| case PPC::EFSCMPGT: | |
| case PPC::EFSCMPLT: | |
| case PPC::EFSTSTEQ: | |
| case PPC::EFSTSTGT: | |
| case PPC::EFSTSTLT: | |
| case PPC::EVCMPEQ: | |
| case PPC::EVCMPGTS: | |
| case PPC::EVCMPGTU: | |
| case PPC::EVCMPLTS: | |
| case PPC::EVCMPLTU: | |
| case PPC::EVFSCMPEQ: | |
| case PPC::EVFSCMPGT: | |
| case PPC::EVFSCMPLT: | |
| case PPC::EVFSTSTEQ: | |
| case PPC::EVFSTSTGT: | |
| case PPC::EVFSTSTLT: { | |
| // op: crD | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(7); | |
| op <<= 23; | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| break; | |
| } | |
| case PPC::EVSEL: { | |
| // op: crD | |
| op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); | |
| op &= UINT64_C(7); | |
| Value |= op; | |
| // op: RA | |
| op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 16; | |
| Value |= op; | |
| // op: RB | |
| op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 11; | |
| Value |= op; | |
| // op: RT | |
| op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); | |
| op &= UINT64_C(31); | |
| op <<= 21; | |
| Value |= op; | |
| break; | |
| } | |
| default: | |
| std::string msg; | |
| raw_string_ostream Msg(msg); | |
| Msg << "Not supported instr: " << MI; | |
| report_fatal_error(Msg.str().c_str()); | |
| } | |
| return Value; | |
| } | |