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swiftshader/SwiftShader/104f72dbb79fc2faf28fa544c048cc65c52286c8/./third_party/llvm-10.0/configs/common/lib/Target/Mips/MipsGenMCCodeEmitter.inc
blob: 0d4693ed825622a3badc079c2caa3c8b1e4de222 [file]
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Machine Code Emitter *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
uint64_t MipsMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
static const uint64_t InstBits[] = {
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(2080375378), // ABSQ_S_PH
UINT64_C(4412), // ABSQ_S_PH_MM
UINT64_C(2080374866), // ABSQ_S_QB
UINT64_C(316), // ABSQ_S_QB_MMR2
UINT64_C(2080375890), // ABSQ_S_W
UINT64_C(8508), // ABSQ_S_W_MM
UINT64_C(32), // ADD
UINT64_C(3959422976), // ADDIUPC
UINT64_C(2013265920), // ADDIUPC_MM
UINT64_C(2013265920), // ADDIUPC_MMR6
UINT64_C(27649), // ADDIUR1SP_MM
UINT64_C(27648), // ADDIUR2_MM
UINT64_C(19456), // ADDIUS5_MM
UINT64_C(19457), // ADDIUSP_MM
UINT64_C(805306368), // ADDIU_MMR6
UINT64_C(2080375320), // ADDQH_PH
UINT64_C(77), // ADDQH_PH_MMR2
UINT64_C(2080375448), // ADDQH_R_PH
UINT64_C(1101), // ADDQH_R_PH_MMR2
UINT64_C(2080375960), // ADDQH_R_W
UINT64_C(1165), // ADDQH_R_W_MMR2
UINT64_C(2080375832), // ADDQH_W
UINT64_C(141), // ADDQH_W_MMR2
UINT64_C(2080375440), // ADDQ_PH
UINT64_C(13), // ADDQ_PH_MM
UINT64_C(2080375696), // ADDQ_S_PH
UINT64_C(1037), // ADDQ_S_PH_MM
UINT64_C(2080376208), // ADDQ_S_W
UINT64_C(773), // ADDQ_S_W_MM
UINT64_C(2080375824), // ADDSC
UINT64_C(901), // ADDSC_MM
UINT64_C(2021654544), // ADDS_A_B
UINT64_C(2027946000), // ADDS_A_D
UINT64_C(2023751696), // ADDS_A_H
UINT64_C(2025848848), // ADDS_A_W
UINT64_C(2030043152), // ADDS_S_B
UINT64_C(2036334608), // ADDS_S_D
UINT64_C(2032140304), // ADDS_S_H
UINT64_C(2034237456), // ADDS_S_W
UINT64_C(2038431760), // ADDS_U_B
UINT64_C(2044723216), // ADDS_U_D
UINT64_C(2040528912), // ADDS_U_H
UINT64_C(2042626064), // ADDS_U_W
UINT64_C(1024), // ADDU16_MM
UINT64_C(1024), // ADDU16_MMR6
UINT64_C(2080374808), // ADDUH_QB
UINT64_C(333), // ADDUH_QB_MMR2
UINT64_C(2080374936), // ADDUH_R_QB
UINT64_C(1357), // ADDUH_R_QB_MMR2
UINT64_C(336), // ADDU_MMR6
UINT64_C(2080375312), // ADDU_PH
UINT64_C(269), // ADDU_PH_MMR2
UINT64_C(2080374800), // ADDU_QB
UINT64_C(205), // ADDU_QB_MM
UINT64_C(2080375568), // ADDU_S_PH
UINT64_C(1293), // ADDU_S_PH_MMR2
UINT64_C(2080375056), // ADDU_S_QB
UINT64_C(1229), // ADDU_S_QB_MM
UINT64_C(2013265926), // ADDVI_B
UINT64_C(2019557382), // ADDVI_D
UINT64_C(2015363078), // ADDVI_H
UINT64_C(2017460230), // ADDVI_W
UINT64_C(2013265934), // ADDV_B
UINT64_C(2019557390), // ADDV_D
UINT64_C(2015363086), // ADDV_H
UINT64_C(2017460238), // ADDV_W
UINT64_C(2080375888), // ADDWC
UINT64_C(965), // ADDWC_MM
UINT64_C(2013265936), // ADD_A_B
UINT64_C(2019557392), // ADD_A_D
UINT64_C(2015363088), // ADD_A_H
UINT64_C(2017460240), // ADD_A_W
UINT64_C(272), // ADD_MM
UINT64_C(272), // ADD_MMR6
UINT64_C(536870912), // ADDi
UINT64_C(268435456), // ADDi_MM
UINT64_C(603979776), // ADDiu
UINT64_C(805306368), // ADDiu_MM
UINT64_C(33), // ADDu
UINT64_C(336), // ADDu_MM
UINT64_C(2080375328), // ALIGN
UINT64_C(31), // ALIGN_MMR6
UINT64_C(3961454592), // ALUIPC
UINT64_C(2015297536), // ALUIPC_MMR6
UINT64_C(36), // AND
UINT64_C(17536), // AND16_MM
UINT64_C(17409), // AND16_MMR6
UINT64_C(36), // AND64
UINT64_C(11264), // ANDI16_MM
UINT64_C(11264), // ANDI16_MMR6
UINT64_C(2013265920), // ANDI_B
UINT64_C(3489660928), // ANDI_MMR6
UINT64_C(592), // AND_MM
UINT64_C(592), // AND_MMR6
UINT64_C(2013265950), // AND_V
UINT64_C(805306368), // ANDi
UINT64_C(805306368), // ANDi64
UINT64_C(3489660928), // ANDi_MM
UINT64_C(2080374833), // APPEND
UINT64_C(533), // APPEND_MMR2
UINT64_C(2046820369), // ASUB_S_B
UINT64_C(2053111825), // ASUB_S_D
UINT64_C(2048917521), // ASUB_S_H
UINT64_C(2051014673), // ASUB_S_W
UINT64_C(2055208977), // ASUB_U_B
UINT64_C(2061500433), // ASUB_U_D
UINT64_C(2057306129), // ASUB_U_H
UINT64_C(2059403281), // ASUB_U_W
UINT64_C(1006632960), // AUI
UINT64_C(3961389056), // AUIPC
UINT64_C(2015232000), // AUIPC_MMR6
UINT64_C(268435456), // AUI_MMR6
UINT64_C(2063597584), // AVER_S_B
UINT64_C(2069889040), // AVER_S_D
UINT64_C(2065694736), // AVER_S_H
UINT64_C(2067791888), // AVER_S_W
UINT64_C(2071986192), // AVER_U_B
UINT64_C(2078277648), // AVER_U_D
UINT64_C(2074083344), // AVER_U_H
UINT64_C(2076180496), // AVER_U_W
UINT64_C(2046820368), // AVE_S_B
UINT64_C(2053111824), // AVE_S_D
UINT64_C(2048917520), // AVE_S_H
UINT64_C(2051014672), // AVE_S_W
UINT64_C(2055208976), // AVE_U_B
UINT64_C(2061500432), // AVE_U_D
UINT64_C(2057306128), // AVE_U_H
UINT64_C(2059403280), // AVE_U_W
UINT64_C(4026550272), // AddiuRxImmX16
UINT64_C(4026533888), // AddiuRxPcImmX16
UINT64_C(18432), // AddiuRxRxImm16
UINT64_C(4026550272), // AddiuRxRxImmX16
UINT64_C(4026548224), // AddiuRxRyOffMemX16
UINT64_C(25344), // AddiuSpImm16
UINT64_C(4026544896), // AddiuSpImmX16
UINT64_C(57345), // AdduRxRyRz16
UINT64_C(59404), // AndRxRxRy16
UINT64_C(52224), // B16_MM
UINT64_C(1879048232), // BADDu
UINT64_C(68222976), // BAL
UINT64_C(3892314112), // BALC
UINT64_C(3019898880), // BALC_MMR6
UINT64_C(2080375857), // BALIGN
UINT64_C(2236), // BALIGN_MMR2
UINT64_C(3355443200), // BBIT0
UINT64_C(3623878656), // BBIT032
UINT64_C(3892314112), // BBIT1
UINT64_C(4160749568), // BBIT132
UINT64_C(3355443200), // BC
UINT64_C(52224), // BC16_MMR6
UINT64_C(1159725056), // BC1EQZ
UINT64_C(1090519040), // BC1EQZC_MMR6
UINT64_C(1157627904), // BC1F
UINT64_C(1157758976), // BC1FL
UINT64_C(1132462080), // BC1F_MM
UINT64_C(1168113664), // BC1NEZ
UINT64_C(1092616192), // BC1NEZC_MMR6
UINT64_C(1157693440), // BC1T
UINT64_C(1157824512), // BC1TL
UINT64_C(1134559232), // BC1T_MM
UINT64_C(1226833920), // BC2EQZ
UINT64_C(1094713344), // BC2EQZC_MMR6
UINT64_C(1235222528), // BC2NEZ
UINT64_C(1096810496), // BC2NEZC_MMR6
UINT64_C(2045771785), // BCLRI_B
UINT64_C(2038431753), // BCLRI_D
UINT64_C(2044723209), // BCLRI_H
UINT64_C(2042626057), // BCLRI_W
UINT64_C(2038431757), // BCLR_B
UINT64_C(2044723213), // BCLR_D
UINT64_C(2040528909), // BCLR_H
UINT64_C(2042626061), // BCLR_W
UINT64_C(2483027968), // BC_MMR6
UINT64_C(268435456), // BEQ
UINT64_C(268435456), // BEQ64
UINT64_C(536870912), // BEQC
UINT64_C(536870912), // BEQC64
UINT64_C(1946157056), // BEQC_MMR6
UINT64_C(1342177280), // BEQL
UINT64_C(35840), // BEQZ16_MM
UINT64_C(536870912), // BEQZALC
UINT64_C(1946157056), // BEQZALC_MMR6
UINT64_C(3623878656), // BEQZC
UINT64_C(35840), // BEQZC16_MMR6
UINT64_C(3623878656), // BEQZC64
UINT64_C(1088421888), // BEQZC_MM
UINT64_C(2147483648), // BEQZC_MMR6
UINT64_C(2483027968), // BEQ_MM
UINT64_C(1476395008), // BGEC
UINT64_C(1476395008), // BGEC64
UINT64_C(4093640704), // BGEC_MMR6
UINT64_C(402653184), // BGEUC
UINT64_C(402653184), // BGEUC64
UINT64_C(3221225472), // BGEUC_MMR6
UINT64_C(67174400), // BGEZ
UINT64_C(67174400), // BGEZ64
UINT64_C(68222976), // BGEZAL
UINT64_C(402653184), // BGEZALC
UINT64_C(3221225472), // BGEZALC_MMR6
UINT64_C(68354048), // BGEZALL
UINT64_C(1113587712), // BGEZALS_MM
UINT64_C(1080033280), // BGEZAL_MM
UINT64_C(1476395008), // BGEZC
UINT64_C(1476395008), // BGEZC64
UINT64_C(4093640704), // BGEZC_MMR6
UINT64_C(67305472), // BGEZL
UINT64_C(1077936128), // BGEZ_MM
UINT64_C(469762048), // BGTZ
UINT64_C(469762048), // BGTZ64
UINT64_C(469762048), // BGTZALC
UINT64_C(3758096384), // BGTZALC_MMR6
UINT64_C(1543503872), // BGTZC
UINT64_C(1543503872), // BGTZC64
UINT64_C(3556769792), // BGTZC_MMR6
UINT64_C(1543503872), // BGTZL
UINT64_C(1086324736), // BGTZ_MM
UINT64_C(2070937609), // BINSLI_B
UINT64_C(2063597577), // BINSLI_D
UINT64_C(2069889033), // BINSLI_H
UINT64_C(2067791881), // BINSLI_W
UINT64_C(2063597581), // BINSL_B
UINT64_C(2069889037), // BINSL_D
UINT64_C(2065694733), // BINSL_H
UINT64_C(2067791885), // BINSL_W
UINT64_C(2079326217), // BINSRI_B
UINT64_C(2071986185), // BINSRI_D
UINT64_C(2078277641), // BINSRI_H
UINT64_C(2076180489), // BINSRI_W
UINT64_C(2071986189), // BINSR_B
UINT64_C(2078277645), // BINSR_D
UINT64_C(2074083341), // BINSR_H
UINT64_C(2076180493), // BINSR_W
UINT64_C(2080376530), // BITREV
UINT64_C(12604), // BITREV_MM
UINT64_C(2080374816), // BITSWAP
UINT64_C(2876), // BITSWAP_MMR6
UINT64_C(402653184), // BLEZ
UINT64_C(402653184), // BLEZ64
UINT64_C(402653184), // BLEZALC
UINT64_C(3221225472), // BLEZALC_MMR6
UINT64_C(1476395008), // BLEZC
UINT64_C(1476395008), // BLEZC64
UINT64_C(4093640704), // BLEZC_MMR6
UINT64_C(1476395008), // BLEZL
UINT64_C(1082130432), // BLEZ_MM
UINT64_C(1543503872), // BLTC
UINT64_C(1543503872), // BLTC64
UINT64_C(3556769792), // BLTC_MMR6
UINT64_C(469762048), // BLTUC
UINT64_C(469762048), // BLTUC64
UINT64_C(3758096384), // BLTUC_MMR6
UINT64_C(67108864), // BLTZ
UINT64_C(67108864), // BLTZ64
UINT64_C(68157440), // BLTZAL
UINT64_C(469762048), // BLTZALC
UINT64_C(3758096384), // BLTZALC_MMR6
UINT64_C(68288512), // BLTZALL
UINT64_C(1109393408), // BLTZALS_MM
UINT64_C(1075838976), // BLTZAL_MM
UINT64_C(1543503872), // BLTZC
UINT64_C(1543503872), // BLTZC64
UINT64_C(3556769792), // BLTZC_MMR6
UINT64_C(67239936), // BLTZL
UINT64_C(1073741824), // BLTZ_MM
UINT64_C(2013265921), // BMNZI_B
UINT64_C(2021654558), // BMNZ_V
UINT64_C(2030043137), // BMZI_B
UINT64_C(2023751710), // BMZ_V
UINT64_C(335544320), // BNE
UINT64_C(335544320), // BNE64
UINT64_C(1610612736), // BNEC
UINT64_C(1610612736), // BNEC64
UINT64_C(2080374784), // BNEC_MMR6
UINT64_C(2062549001), // BNEGI_B
UINT64_C(2055208969), // BNEGI_D
UINT64_C(2061500425), // BNEGI_H
UINT64_C(2059403273), // BNEGI_W
UINT64_C(2055208973), // BNEG_B
UINT64_C(2061500429), // BNEG_D
UINT64_C(2057306125), // BNEG_H
UINT64_C(2059403277), // BNEG_W
UINT64_C(1409286144), // BNEL
UINT64_C(44032), // BNEZ16_MM
UINT64_C(1610612736), // BNEZALC
UINT64_C(2080374784), // BNEZALC_MMR6
UINT64_C(4160749568), // BNEZC
UINT64_C(44032), // BNEZC16_MMR6
UINT64_C(4160749568), // BNEZC64
UINT64_C(1084227584), // BNEZC_MM
UINT64_C(2684354560), // BNEZC_MMR6
UINT64_C(3019898880), // BNE_MM
UINT64_C(1610612736), // BNVC
UINT64_C(2080374784), // BNVC_MMR6
UINT64_C(1199570944), // BNZ_B
UINT64_C(1205862400), // BNZ_D
UINT64_C(1201668096), // BNZ_H
UINT64_C(1172307968), // BNZ_V
UINT64_C(1203765248), // BNZ_W
UINT64_C(536870912), // BOVC
UINT64_C(1946157056), // BOVC_MMR6
UINT64_C(68943872), // BPOSGE32
UINT64_C(1126170624), // BPOSGE32C_MMR3
UINT64_C(1130364928), // BPOSGE32_MM
UINT64_C(13), // BREAK
UINT64_C(18048), // BREAK16_MM
UINT64_C(17435), // BREAK16_MMR6
UINT64_C(7), // BREAK_MM
UINT64_C(7), // BREAK_MMR6
UINT64_C(2046820353), // BSELI_B
UINT64_C(2025848862), // BSEL_V
UINT64_C(2054160393), // BSETI_B
UINT64_C(2046820361), // BSETI_D
UINT64_C(2053111817), // BSETI_H
UINT64_C(2051014665), // BSETI_W
UINT64_C(2046820365), // BSET_B
UINT64_C(2053111821), // BSET_D
UINT64_C(2048917517), // BSET_H
UINT64_C(2051014669), // BSET_W
UINT64_C(1191182336), // BZ_B
UINT64_C(1197473792), // BZ_D
UINT64_C(1193279488), // BZ_H
UINT64_C(1163919360), // BZ_V
UINT64_C(1195376640), // BZ_W
UINT64_C(8192), // BeqzRxImm16
UINT64_C(4026540032), // BeqzRxImmX16
UINT64_C(4096), // Bimm16
UINT64_C(4026535936), // BimmX16
UINT64_C(10240), // BnezRxImm16
UINT64_C(4026542080), // BnezRxImmX16
UINT64_C(59397), // Break16
UINT64_C(24576), // Bteqz16
UINT64_C(4026544128), // BteqzX16
UINT64_C(24832), // Btnez16
UINT64_C(4026544384), // BtnezX16
UINT64_C(3154116608), // CACHE
UINT64_C(2080374811), // CACHEE
UINT64_C(1610655232), // CACHEE_MM
UINT64_C(536895488), // CACHE_MM
UINT64_C(536895488), // CACHE_MMR6
UINT64_C(2080374821), // CACHE_R6
UINT64_C(1176502282), // CEIL_L_D64
UINT64_C(1409307451), // CEIL_L_D_MMR6
UINT64_C(1174405130), // CEIL_L_S
UINT64_C(1409291067), // CEIL_L_S_MMR6
UINT64_C(1176502286), // CEIL_W_D32
UINT64_C(1176502286), // CEIL_W_D64
UINT64_C(1409309499), // CEIL_W_D_MMR6
UINT64_C(1409309499), // CEIL_W_MM
UINT64_C(1174405134), // CEIL_W_S
UINT64_C(1409293115), // CEIL_W_S_MM
UINT64_C(1409293115), // CEIL_W_S_MMR6
UINT64_C(2013265927), // CEQI_B
UINT64_C(2019557383), // CEQI_D
UINT64_C(2015363079), // CEQI_H
UINT64_C(2017460231), // CEQI_W
UINT64_C(2013265935), // CEQ_B
UINT64_C(2019557391), // CEQ_D
UINT64_C(2015363087), // CEQ_H
UINT64_C(2017460239), // CEQ_W
UINT64_C(1145044992), // CFC1
UINT64_C(1409290299), // CFC1_MM
UINT64_C(52540), // CFC2_MM
UINT64_C(2021523481), // CFCMSA
UINT64_C(1879048242), // CINS
UINT64_C(1879048243), // CINS32
UINT64_C(1879048242), // CINS64_32
UINT64_C(1879048242), // CINS_i32
UINT64_C(1176502299), // CLASS_D
UINT64_C(1409286752), // CLASS_D_MMR6
UINT64_C(1174405147), // CLASS_S
UINT64_C(1409286240), // CLASS_S_MMR6
UINT64_C(2046820359), // CLEI_S_B
UINT64_C(2053111815), // CLEI_S_D
UINT64_C(2048917511), // CLEI_S_H
UINT64_C(2051014663), // CLEI_S_W
UINT64_C(2055208967), // CLEI_U_B
UINT64_C(2061500423), // CLEI_U_D
UINT64_C(2057306119), // CLEI_U_H
UINT64_C(2059403271), // CLEI_U_W
UINT64_C(2046820367), // CLE_S_B
UINT64_C(2053111823), // CLE_S_D
UINT64_C(2048917519), // CLE_S_H
UINT64_C(2051014671), // CLE_S_W
UINT64_C(2055208975), // CLE_U_B
UINT64_C(2061500431), // CLE_U_D
UINT64_C(2057306127), // CLE_U_H
UINT64_C(2059403279), // CLE_U_W
UINT64_C(1879048225), // CLO
UINT64_C(19260), // CLO_MM
UINT64_C(19260), // CLO_MMR6
UINT64_C(81), // CLO_R6
UINT64_C(2030043143), // CLTI_S_B
UINT64_C(2036334599), // CLTI_S_D
UINT64_C(2032140295), // CLTI_S_H
UINT64_C(2034237447), // CLTI_S_W
UINT64_C(2038431751), // CLTI_U_B
UINT64_C(2044723207), // CLTI_U_D
UINT64_C(2040528903), // CLTI_U_H
UINT64_C(2042626055), // CLTI_U_W
UINT64_C(2030043151), // CLT_S_B
UINT64_C(2036334607), // CLT_S_D
UINT64_C(2032140303), // CLT_S_H
UINT64_C(2034237455), // CLT_S_W
UINT64_C(2038431759), // CLT_U_B
UINT64_C(2044723215), // CLT_U_D
UINT64_C(2040528911), // CLT_U_H
UINT64_C(2042626063), // CLT_U_W
UINT64_C(1879048224), // CLZ
UINT64_C(23356), // CLZ_MM
UINT64_C(80), // CLZ_MMR6
UINT64_C(80), // CLZ_R6
UINT64_C(2080376337), // CMPGDU_EQ_QB
UINT64_C(389), // CMPGDU_EQ_QB_MMR2
UINT64_C(2080376465), // CMPGDU_LE_QB
UINT64_C(517), // CMPGDU_LE_QB_MMR2
UINT64_C(2080376401), // CMPGDU_LT_QB
UINT64_C(453), // CMPGDU_LT_QB_MMR2
UINT64_C(2080375057), // CMPGU_EQ_QB
UINT64_C(1476395205), // CMPGU_EQ_QB_MM
UINT64_C(2080375185), // CMPGU_LE_QB
UINT64_C(1476395333), // CMPGU_LE_QB_MM
UINT64_C(2080375121), // CMPGU_LT_QB
UINT64_C(1476395269), // CMPGU_LT_QB_MM
UINT64_C(2080374801), // CMPU_EQ_QB
UINT64_C(581), // CMPU_EQ_QB_MM
UINT64_C(2080374929), // CMPU_LE_QB
UINT64_C(709), // CMPU_LE_QB_MM
UINT64_C(2080374865), // CMPU_LT_QB
UINT64_C(645), // CMPU_LT_QB_MM
UINT64_C(1409286165), // CMP_AF_D_MMR6
UINT64_C(1409286149), // CMP_AF_S_MMR6
UINT64_C(1184890882), // CMP_EQ_D
UINT64_C(1409286293), // CMP_EQ_D_MMR6
UINT64_C(2080375313), // CMP_EQ_PH
UINT64_C(5), // CMP_EQ_PH_MM
UINT64_C(1182793730), // CMP_EQ_S
UINT64_C(1409286277), // CMP_EQ_S_MMR6
UINT64_C(1184890880), // CMP_F_D
UINT64_C(1182793728), // CMP_F_S
UINT64_C(1184890886), // CMP_LE_D
UINT64_C(1409286549), // CMP_LE_D_MMR6
UINT64_C(2080375441), // CMP_LE_PH
UINT64_C(133), // CMP_LE_PH_MM
UINT64_C(1182793734), // CMP_LE_S
UINT64_C(1409286533), // CMP_LE_S_MMR6
UINT64_C(1184890884), // CMP_LT_D
UINT64_C(1409286421), // CMP_LT_D_MMR6
UINT64_C(2080375377), // CMP_LT_PH
UINT64_C(69), // CMP_LT_PH_MM
UINT64_C(1182793732), // CMP_LT_S
UINT64_C(1409286405), // CMP_LT_S_MMR6
UINT64_C(1184890888), // CMP_SAF_D
UINT64_C(1409286677), // CMP_SAF_D_MMR6
UINT64_C(1182793736), // CMP_SAF_S
UINT64_C(1409286661), // CMP_SAF_S_MMR6
UINT64_C(1184890890), // CMP_SEQ_D
UINT64_C(1409286805), // CMP_SEQ_D_MMR6
UINT64_C(1182793738), // CMP_SEQ_S
UINT64_C(1409286789), // CMP_SEQ_S_MMR6
UINT64_C(1184890894), // CMP_SLE_D
UINT64_C(1409287061), // CMP_SLE_D_MMR6
UINT64_C(1182793742), // CMP_SLE_S
UINT64_C(1409287045), // CMP_SLE_S_MMR6
UINT64_C(1184890892), // CMP_SLT_D
UINT64_C(1409286933), // CMP_SLT_D_MMR6
UINT64_C(1182793740), // CMP_SLT_S
UINT64_C(1409286917), // CMP_SLT_S_MMR6
UINT64_C(1184890891), // CMP_SUEQ_D
UINT64_C(1409286869), // CMP_SUEQ_D_MMR6
UINT64_C(1182793739), // CMP_SUEQ_S
UINT64_C(1409286853), // CMP_SUEQ_S_MMR6
UINT64_C(1184890895), // CMP_SULE_D
UINT64_C(1409287125), // CMP_SULE_D_MMR6
UINT64_C(1182793743), // CMP_SULE_S
UINT64_C(1409287109), // CMP_SULE_S_MMR6
UINT64_C(1184890893), // CMP_SULT_D
UINT64_C(1409286997), // CMP_SULT_D_MMR6
UINT64_C(1182793741), // CMP_SULT_S
UINT64_C(1409286981), // CMP_SULT_S_MMR6
UINT64_C(1184890889), // CMP_SUN_D
UINT64_C(1409286741), // CMP_SUN_D_MMR6
UINT64_C(1182793737), // CMP_SUN_S
UINT64_C(1409286725), // CMP_SUN_S_MMR6
UINT64_C(1184890883), // CMP_UEQ_D
UINT64_C(1409286357), // CMP_UEQ_D_MMR6
UINT64_C(1182793731), // CMP_UEQ_S
UINT64_C(1409286341), // CMP_UEQ_S_MMR6
UINT64_C(1184890887), // CMP_ULE_D
UINT64_C(1409286613), // CMP_ULE_D_MMR6
UINT64_C(1182793735), // CMP_ULE_S
UINT64_C(1409286597), // CMP_ULE_S_MMR6
UINT64_C(1184890885), // CMP_ULT_D
UINT64_C(1409286485), // CMP_ULT_D_MMR6
UINT64_C(1182793733), // CMP_ULT_S
UINT64_C(1409286469), // CMP_ULT_S_MMR6
UINT64_C(1184890881), // CMP_UN_D
UINT64_C(1409286229), // CMP_UN_D_MMR6
UINT64_C(1182793729), // CMP_UN_S
UINT64_C(1409286213), // CMP_UN_S_MMR6
UINT64_C(2021654553), // COPY_S_B
UINT64_C(2025324569), // COPY_S_D
UINT64_C(2023751705), // COPY_S_H
UINT64_C(2024800281), // COPY_S_W
UINT64_C(2025848857), // COPY_U_B
UINT64_C(2027946009), // COPY_U_H
UINT64_C(2028994585), // COPY_U_W
UINT64_C(2080374799), // CRC32B
UINT64_C(2080375055), // CRC32CB
UINT64_C(2080375247), // CRC32CD
UINT64_C(2080375119), // CRC32CH
UINT64_C(2080375183), // CRC32CW
UINT64_C(2080374991), // CRC32D
UINT64_C(2080374863), // CRC32H
UINT64_C(2080374927), // CRC32W
UINT64_C(1153433600), // CTC1
UINT64_C(1409292347), // CTC1_MM
UINT64_C(56636), // CTC2_MM
UINT64_C(2017329177), // CTCMSA
UINT64_C(1174405153), // CVT_D32_S
UINT64_C(1409291131), // CVT_D32_S_MM
UINT64_C(1182793761), // CVT_D32_W
UINT64_C(1409299323), // CVT_D32_W_MM
UINT64_C(1184890913), // CVT_D64_L
UINT64_C(1174405153), // CVT_D64_S
UINT64_C(1409291131), // CVT_D64_S_MM
UINT64_C(1182793761), // CVT_D64_W
UINT64_C(1409299323), // CVT_D64_W_MM
UINT64_C(1409307515), // CVT_D_L_MMR6
UINT64_C(1176502309), // CVT_L_D64
UINT64_C(1409302843), // CVT_L_D64_MM
UINT64_C(1409302843), // CVT_L_D_MMR6
UINT64_C(1174405157), // CVT_L_S
UINT64_C(1409286459), // CVT_L_S_MM
UINT64_C(1409286459), // CVT_L_S_MMR6
UINT64_C(1174405158), // CVT_PS_S64
UINT64_C(1176502304), // CVT_S_D32
UINT64_C(1409293179), // CVT_S_D32_MM
UINT64_C(1176502304), // CVT_S_D64
UINT64_C(1409293179), // CVT_S_D64_MM
UINT64_C(1184890912), // CVT_S_L
UINT64_C(1409309563), // CVT_S_L_MMR6
UINT64_C(1186988072), // CVT_S_PL64
UINT64_C(1186988064), // CVT_S_PU64
UINT64_C(1182793760), // CVT_S_W
UINT64_C(1409301371), // CVT_S_W_MM
UINT64_C(1409301371), // CVT_S_W_MMR6
UINT64_C(1176502308), // CVT_W_D32
UINT64_C(1409304891), // CVT_W_D32_MM
UINT64_C(1176502308), // CVT_W_D64
UINT64_C(1409304891), // CVT_W_D64_MM
UINT64_C(1174405156), // CVT_W_S
UINT64_C(1409288507), // CVT_W_S_MM
UINT64_C(1409288507), // CVT_W_S_MMR6
UINT64_C(1176502322), // C_EQ_D32
UINT64_C(1409287356), // C_EQ_D32_MM
UINT64_C(1176502322), // C_EQ_D64
UINT64_C(1409287356), // C_EQ_D64_MM
UINT64_C(1174405170), // C_EQ_S
UINT64_C(1409286332), // C_EQ_S_MM
UINT64_C(1176502320), // C_F_D32
UINT64_C(1409287228), // C_F_D32_MM
UINT64_C(1176502320), // C_F_D64
UINT64_C(1409287228), // C_F_D64_MM
UINT64_C(1174405168), // C_F_S
UINT64_C(1409286204), // C_F_S_MM
UINT64_C(1176502334), // C_LE_D32
UINT64_C(1409288124), // C_LE_D32_MM
UINT64_C(1176502334), // C_LE_D64
UINT64_C(1409288124), // C_LE_D64_MM
UINT64_C(1174405182), // C_LE_S
UINT64_C(1409287100), // C_LE_S_MM
UINT64_C(1176502332), // C_LT_D32
UINT64_C(1409287996), // C_LT_D32_MM
UINT64_C(1176502332), // C_LT_D64
UINT64_C(1409287996), // C_LT_D64_MM
UINT64_C(1174405180), // C_LT_S
UINT64_C(1409286972), // C_LT_S_MM
UINT64_C(1176502333), // C_NGE_D32
UINT64_C(1409288060), // C_NGE_D32_MM
UINT64_C(1176502333), // C_NGE_D64
UINT64_C(1409288060), // C_NGE_D64_MM
UINT64_C(1174405181), // C_NGE_S
UINT64_C(1409287036), // C_NGE_S_MM
UINT64_C(1176502329), // C_NGLE_D32
UINT64_C(1409287804), // C_NGLE_D32_MM
UINT64_C(1176502329), // C_NGLE_D64
UINT64_C(1409287804), // C_NGLE_D64_MM
UINT64_C(1174405177), // C_NGLE_S
UINT64_C(1409286780), // C_NGLE_S_MM
UINT64_C(1176502331), // C_NGL_D32
UINT64_C(1409287932), // C_NGL_D32_MM
UINT64_C(1176502331), // C_NGL_D64
UINT64_C(1409287932), // C_NGL_D64_MM
UINT64_C(1174405179), // C_NGL_S
UINT64_C(1409286908), // C_NGL_S_MM
UINT64_C(1176502335), // C_NGT_D32
UINT64_C(1409288188), // C_NGT_D32_MM
UINT64_C(1176502335), // C_NGT_D64
UINT64_C(1409288188), // C_NGT_D64_MM
UINT64_C(1174405183), // C_NGT_S
UINT64_C(1409287164), // C_NGT_S_MM
UINT64_C(1176502326), // C_OLE_D32
UINT64_C(1409287612), // C_OLE_D32_MM
UINT64_C(1176502326), // C_OLE_D64
UINT64_C(1409287612), // C_OLE_D64_MM
UINT64_C(1174405174), // C_OLE_S
UINT64_C(1409286588), // C_OLE_S_MM
UINT64_C(1176502324), // C_OLT_D32
UINT64_C(1409287484), // C_OLT_D32_MM
UINT64_C(1176502324), // C_OLT_D64
UINT64_C(1409287484), // C_OLT_D64_MM
UINT64_C(1174405172), // C_OLT_S
UINT64_C(1409286460), // C_OLT_S_MM
UINT64_C(1176502330), // C_SEQ_D32
UINT64_C(1409287868), // C_SEQ_D32_MM
UINT64_C(1176502330), // C_SEQ_D64
UINT64_C(1409287868), // C_SEQ_D64_MM
UINT64_C(1174405178), // C_SEQ_S
UINT64_C(1409286844), // C_SEQ_S_MM
UINT64_C(1176502328), // C_SF_D32
UINT64_C(1409287740), // C_SF_D32_MM
UINT64_C(1176502328), // C_SF_D64
UINT64_C(1409287740), // C_SF_D64_MM
UINT64_C(1174405176), // C_SF_S
UINT64_C(1409286716), // C_SF_S_MM
UINT64_C(1176502323), // C_UEQ_D32
UINT64_C(1409287420), // C_UEQ_D32_MM
UINT64_C(1176502323), // C_UEQ_D64
UINT64_C(1409287420), // C_UEQ_D64_MM
UINT64_C(1174405171), // C_UEQ_S
UINT64_C(1409286396), // C_UEQ_S_MM
UINT64_C(1176502327), // C_ULE_D32
UINT64_C(1409287676), // C_ULE_D32_MM
UINT64_C(1176502327), // C_ULE_D64
UINT64_C(1409287676), // C_ULE_D64_MM
UINT64_C(1174405175), // C_ULE_S
UINT64_C(1409286652), // C_ULE_S_MM
UINT64_C(1176502325), // C_ULT_D32
UINT64_C(1409287548), // C_ULT_D32_MM
UINT64_C(1176502325), // C_ULT_D64
UINT64_C(1409287548), // C_ULT_D64_MM
UINT64_C(1174405173), // C_ULT_S
UINT64_C(1409286524), // C_ULT_S_MM
UINT64_C(1176502321), // C_UN_D32
UINT64_C(1409287292), // C_UN_D32_MM
UINT64_C(1176502321), // C_UN_D64
UINT64_C(1409287292), // C_UN_D64_MM
UINT64_C(1174405169), // C_UN_S
UINT64_C(1409286268), // C_UN_S_MM
UINT64_C(59402), // CmpRxRy16
UINT64_C(28672), // CmpiRxImm16
UINT64_C(4026560512), // CmpiRxImmX16
UINT64_C(44), // DADD
UINT64_C(1610612736), // DADDi
UINT64_C(1677721600), // DADDiu
UINT64_C(45), // DADDu
UINT64_C(67502080), // DAHI
UINT64_C(2080375332), // DALIGN
UINT64_C(69074944), // DATI
UINT64_C(1946157056), // DAUI
UINT64_C(2080374820), // DBITSWAP
UINT64_C(1879048229), // DCLO
UINT64_C(83), // DCLO_R6
UINT64_C(1879048228), // DCLZ
UINT64_C(82), // DCLZ_R6
UINT64_C(158), // DDIV
UINT64_C(159), // DDIVU
UINT64_C(1107296287), // DERET
UINT64_C(58236), // DERET_MM
UINT64_C(58236), // DERET_MMR6
UINT64_C(2080374787), // DEXT
UINT64_C(2080374787), // DEXT64_32
UINT64_C(2080374785), // DEXTM
UINT64_C(2080374786), // DEXTU
UINT64_C(1096835072), // DI
UINT64_C(2080374791), // DINS
UINT64_C(2080374789), // DINSM
UINT64_C(2080374790), // DINSU
UINT64_C(154), // DIV
UINT64_C(155), // DIVU
UINT64_C(408), // DIVU_MMR6
UINT64_C(280), // DIV_MMR6
UINT64_C(2046820370), // DIV_S_B
UINT64_C(2053111826), // DIV_S_D
UINT64_C(2048917522), // DIV_S_H
UINT64_C(2051014674), // DIV_S_W
UINT64_C(2055208978), // DIV_U_B
UINT64_C(2061500434), // DIV_U_D
UINT64_C(2057306130), // DIV_U_H
UINT64_C(2059403282), // DIV_U_W
UINT64_C(18300), // DI_MM
UINT64_C(18300), // DI_MMR6
UINT64_C(21), // DLSA
UINT64_C(21), // DLSA_R6
UINT64_C(1075838976), // DMFC0
UINT64_C(1142947840), // DMFC1
UINT64_C(1210056704), // DMFC2
UINT64_C(1210056704), // DMFC2_OCTEON
UINT64_C(1080033536), // DMFGC0
UINT64_C(222), // DMOD
UINT64_C(223), // DMODU
UINT64_C(1096813505), // DMT
UINT64_C(1084227584), // DMTC0
UINT64_C(1151336448), // DMTC1
UINT64_C(1218445312), // DMTC2
UINT64_C(1218445312), // DMTC2_OCTEON
UINT64_C(1080034048), // DMTGC0
UINT64_C(220), // DMUH
UINT64_C(221), // DMUHU
UINT64_C(1879048195), // DMUL
UINT64_C(28), // DMULT
UINT64_C(29), // DMULTu
UINT64_C(157), // DMULU
UINT64_C(156), // DMUL_R6
UINT64_C(2019557395), // DOTP_S_D
UINT64_C(2015363091), // DOTP_S_H
UINT64_C(2017460243), // DOTP_S_W
UINT64_C(2027946003), // DOTP_U_D
UINT64_C(2023751699), // DOTP_U_H
UINT64_C(2025848851), // DOTP_U_W
UINT64_C(2036334611), // DPADD_S_D
UINT64_C(2032140307), // DPADD_S_H
UINT64_C(2034237459), // DPADD_S_W
UINT64_C(2044723219), // DPADD_U_D
UINT64_C(2040528915), // DPADD_U_H
UINT64_C(2042626067), // DPADD_U_W
UINT64_C(2080376496), // DPAQX_SA_W_PH
UINT64_C(12988), // DPAQX_SA_W_PH_MMR2
UINT64_C(2080376368), // DPAQX_S_W_PH
UINT64_C(8892), // DPAQX_S_W_PH_MMR2
UINT64_C(2080375600), // DPAQ_SA_L_W
UINT64_C(4796), // DPAQ_SA_L_W_MM
UINT64_C(2080375088), // DPAQ_S_W_PH
UINT64_C(700), // DPAQ_S_W_PH_MM
UINT64_C(2080375024), // DPAU_H_QBL
UINT64_C(8380), // DPAU_H_QBL_MM
UINT64_C(2080375280), // DPAU_H_QBR
UINT64_C(12476), // DPAU_H_QBR_MM
UINT64_C(2080375344), // DPAX_W_PH
UINT64_C(4284), // DPAX_W_PH_MMR2
UINT64_C(2080374832), // DPA_W_PH
UINT64_C(188), // DPA_W_PH_MMR2
UINT64_C(1879048237), // DPOP
UINT64_C(2080376560), // DPSQX_SA_W_PH
UINT64_C(14012), // DPSQX_SA_W_PH_MMR2
UINT64_C(2080376432), // DPSQX_S_W_PH
UINT64_C(9916), // DPSQX_S_W_PH_MMR2
UINT64_C(2080375664), // DPSQ_SA_L_W
UINT64_C(5820), // DPSQ_SA_L_W_MM
UINT64_C(2080375152), // DPSQ_S_W_PH
UINT64_C(1724), // DPSQ_S_W_PH_MM
UINT64_C(2053111827), // DPSUB_S_D
UINT64_C(2048917523), // DPSUB_S_H
UINT64_C(2051014675), // DPSUB_S_W
UINT64_C(2061500435), // DPSUB_U_D
UINT64_C(2057306131), // DPSUB_U_H
UINT64_C(2059403283), // DPSUB_U_W
UINT64_C(2080375536), // DPSU_H_QBL
UINT64_C(9404), // DPSU_H_QBL_MM
UINT64_C(2080375792), // DPSU_H_QBR
UINT64_C(13500), // DPSU_H_QBR_MM
UINT64_C(2080375408), // DPSX_W_PH
UINT64_C(5308), // DPSX_W_PH_MMR2
UINT64_C(2080374896), // DPS_W_PH
UINT64_C(1212), // DPS_W_PH_MMR2
UINT64_C(2097210), // DROTR
UINT64_C(2097214), // DROTR32
UINT64_C(86), // DROTRV
UINT64_C(2080374948), // DSBH
UINT64_C(30), // DSDIV
UINT64_C(2080375140), // DSHD
UINT64_C(56), // DSLL
UINT64_C(60), // DSLL32
UINT64_C(60), // DSLL64_32
UINT64_C(20), // DSLLV
UINT64_C(59), // DSRA
UINT64_C(63), // DSRA32
UINT64_C(23), // DSRAV
UINT64_C(58), // DSRL
UINT64_C(62), // DSRL32
UINT64_C(22), // DSRLV
UINT64_C(46), // DSUB
UINT64_C(47), // DSUBu
UINT64_C(31), // DUDIV
UINT64_C(1096810532), // DVP
UINT64_C(1096810497), // DVPE
UINT64_C(6524), // DVP_MMR6
UINT64_C(59418), // DivRxRy16
UINT64_C(59419), // DivuRxRy16
UINT64_C(192), // EHB
UINT64_C(6144), // EHB_MM
UINT64_C(6144), // EHB_MMR6
UINT64_C(1096835104), // EI
UINT64_C(22396), // EI_MM
UINT64_C(22396), // EI_MMR6
UINT64_C(1096813537), // EMT
UINT64_C(1107296280), // ERET
UINT64_C(1107296344), // ERETNC
UINT64_C(127868), // ERETNC_MMR6
UINT64_C(62332), // ERET_MM
UINT64_C(62332), // ERET_MMR6
UINT64_C(1096810500), // EVP
UINT64_C(1096810529), // EVPE
UINT64_C(14716), // EVP_MMR6
UINT64_C(2080374784), // EXT
UINT64_C(2080374968), // EXTP
UINT64_C(2080375480), // EXTPDP
UINT64_C(2080375544), // EXTPDPV
UINT64_C(14524), // EXTPDPV_MM
UINT64_C(13948), // EXTPDP_MM
UINT64_C(2080375032), // EXTPV
UINT64_C(10428), // EXTPV_MM
UINT64_C(9852), // EXTP_MM
UINT64_C(2080375288), // EXTRV_RS_W
UINT64_C(11964), // EXTRV_RS_W_MM
UINT64_C(2080375160), // EXTRV_R_W
UINT64_C(7868), // EXTRV_R_W_MM
UINT64_C(2080375800), // EXTRV_S_H
UINT64_C(16060), // EXTRV_S_H_MM
UINT64_C(2080374904), // EXTRV_W
UINT64_C(3772), // EXTRV_W_MM
UINT64_C(2080375224), // EXTR_RS_W
UINT64_C(11900), // EXTR_RS_W_MM
UINT64_C(2080375096), // EXTR_R_W
UINT64_C(7804), // EXTR_R_W_MM
UINT64_C(2080375736), // EXTR_S_H
UINT64_C(15996), // EXTR_S_H_MM
UINT64_C(2080374840), // EXTR_W
UINT64_C(3708), // EXTR_W_MM
UINT64_C(1879048250), // EXTS
UINT64_C(1879048251), // EXTS32
UINT64_C(44), // EXT_MM
UINT64_C(44), // EXT_MMR6
UINT64_C(1176502277), // FABS_D32
UINT64_C(1409295227), // FABS_D32_MM
UINT64_C(1176502277), // FABS_D64
UINT64_C(1409295227), // FABS_D64_MM
UINT64_C(1174405125), // FABS_S
UINT64_C(1409287035), // FABS_S_MM
UINT64_C(2015363099), // FADD_D
UINT64_C(1176502272), // FADD_D32
UINT64_C(1409286448), // FADD_D32_MM
UINT64_C(1176502272), // FADD_D64
UINT64_C(1409286448), // FADD_D64_MM
UINT64_C(1174405120), // FADD_S
UINT64_C(1409286192), // FADD_S_MM
UINT64_C(1409286192), // FADD_S_MMR6
UINT64_C(2013265947), // FADD_W
UINT64_C(2015363098), // FCAF_D
UINT64_C(2013265946), // FCAF_W
UINT64_C(2023751706), // FCEQ_D
UINT64_C(2021654554), // FCEQ_W
UINT64_C(2065760286), // FCLASS_D
UINT64_C(2065694750), // FCLASS_W
UINT64_C(2040528922), // FCLE_D
UINT64_C(2038431770), // FCLE_W
UINT64_C(2032140314), // FCLT_D
UINT64_C(2030043162), // FCLT_W
UINT64_C(1176502320), // FCMP_D32
UINT64_C(1409287228), // FCMP_D32_MM
UINT64_C(1176502320), // FCMP_D64
UINT64_C(1174405168), // FCMP_S32
UINT64_C(1409286204), // FCMP_S32_MM
UINT64_C(2027946012), // FCNE_D
UINT64_C(2025848860), // FCNE_W
UINT64_C(2019557404), // FCOR_D
UINT64_C(2017460252), // FCOR_W
UINT64_C(2027946010), // FCUEQ_D
UINT64_C(2025848858), // FCUEQ_W
UINT64_C(2044723226), // FCULE_D
UINT64_C(2042626074), // FCULE_W
UINT64_C(2036334618), // FCULT_D
UINT64_C(2034237466), // FCULT_W
UINT64_C(2023751708), // FCUNE_D
UINT64_C(2021654556), // FCUNE_W
UINT64_C(2019557402), // FCUN_D
UINT64_C(2017460250), // FCUN_W
UINT64_C(2027946011), // FDIV_D
UINT64_C(1176502275), // FDIV_D32
UINT64_C(1409286640), // FDIV_D32_MM
UINT64_C(1176502275), // FDIV_D64
UINT64_C(1409286640), // FDIV_D64_MM
UINT64_C(1174405123), // FDIV_S
UINT64_C(1409286384), // FDIV_S_MM
UINT64_C(1409286384), // FDIV_S_MMR6
UINT64_C(2025848859), // FDIV_W
UINT64_C(2046820379), // FEXDO_H
UINT64_C(2048917531), // FEXDO_W
UINT64_C(2044723227), // FEXP2_D
UINT64_C(2042626075), // FEXP2_W
UINT64_C(2066808862), // FEXUPL_D
UINT64_C(2066743326), // FEXUPL_W
UINT64_C(2066939934), // FEXUPR_D
UINT64_C(2066874398), // FEXUPR_W
UINT64_C(2067595294), // FFINT_S_D
UINT64_C(2067529758), // FFINT_S_W
UINT64_C(2067726366), // FFINT_U_D
UINT64_C(2067660830), // FFINT_U_W
UINT64_C(2067071006), // FFQL_D
UINT64_C(2067005470), // FFQL_W
UINT64_C(2067202078), // FFQR_D
UINT64_C(2067136542), // FFQR_W
UINT64_C(2063597598), // FILL_B
UINT64_C(2063794206), // FILL_D
UINT64_C(2063663134), // FILL_H
UINT64_C(2063728670), // FILL_W
UINT64_C(2066677790), // FLOG2_D
UINT64_C(2066612254), // FLOG2_W
UINT64_C(1176502283), // FLOOR_L_D64
UINT64_C(1409303355), // FLOOR_L_D_MMR6
UINT64_C(1174405131), // FLOOR_L_S
UINT64_C(1409286971), // FLOOR_L_S_MMR6
UINT64_C(1176502287), // FLOOR_W_D32
UINT64_C(1176502287), // FLOOR_W_D64
UINT64_C(1409305403), // FLOOR_W_D_MMR6
UINT64_C(1409305403), // FLOOR_W_MM
UINT64_C(1174405135), // FLOOR_W_S
UINT64_C(1409289019), // FLOOR_W_S_MM
UINT64_C(1409289019), // FLOOR_W_S_MMR6
UINT64_C(2032140315), // FMADD_D
UINT64_C(2030043163), // FMADD_W
UINT64_C(2078277659), // FMAX_A_D
UINT64_C(2076180507), // FMAX_A_W
UINT64_C(2074083355), // FMAX_D
UINT64_C(2071986203), // FMAX_W
UINT64_C(2069889051), // FMIN_A_D
UINT64_C(2067791899), // FMIN_A_W
UINT64_C(2065694747), // FMIN_D
UINT64_C(2063597595), // FMIN_W
UINT64_C(1176502278), // FMOV_D32
UINT64_C(1409294459), // FMOV_D32_MM
UINT64_C(1176502278), // FMOV_D64
UINT64_C(1409294459), // FMOV_D64_MM
UINT64_C(1409294459), // FMOV_D_MMR6
UINT64_C(1174405126), // FMOV_S
UINT64_C(1409286267), // FMOV_S_MM
UINT64_C(1409286267), // FMOV_S_MMR6
UINT64_C(2036334619), // FMSUB_D
UINT64_C(2034237467), // FMSUB_W
UINT64_C(2023751707), // FMUL_D
UINT64_C(1176502274), // FMUL_D32
UINT64_C(1409286576), // FMUL_D32_MM
UINT64_C(1176502274), // FMUL_D64
UINT64_C(1409286576), // FMUL_D64_MM
UINT64_C(1174405122), // FMUL_S
UINT64_C(1409286320), // FMUL_S_MM
UINT64_C(1409286320), // FMUL_S_MMR6
UINT64_C(2021654555), // FMUL_W
UINT64_C(1176502279), // FNEG_D32
UINT64_C(1409297275), // FNEG_D32_MM
UINT64_C(1176502279), // FNEG_D64
UINT64_C(1409297275), // FNEG_D64_MM
UINT64_C(1174405127), // FNEG_S
UINT64_C(1409289083), // FNEG_S_MM
UINT64_C(1409289083), // FNEG_S_MMR6
UINT64_C(2080374792), // FORK
UINT64_C(2066415646), // FRCP_D
UINT64_C(2066350110), // FRCP_W
UINT64_C(2066546718), // FRINT_D
UINT64_C(2066481182), // FRINT_W
UINT64_C(2066284574), // FRSQRT_D
UINT64_C(2066219038), // FRSQRT_W
UINT64_C(2048917530), // FSAF_D
UINT64_C(2046820378), // FSAF_W
UINT64_C(2057306138), // FSEQ_D
UINT64_C(2055208986), // FSEQ_W
UINT64_C(2074083354), // FSLE_D
UINT64_C(2071986202), // FSLE_W
UINT64_C(2065694746), // FSLT_D
UINT64_C(2063597594), // FSLT_W
UINT64_C(2061500444), // FSNE_D
UINT64_C(2059403292), // FSNE_W
UINT64_C(2053111836), // FSOR_D
UINT64_C(2051014684), // FSOR_W
UINT64_C(2066153502), // FSQRT_D
UINT64_C(1176502276), // FSQRT_D32
UINT64_C(1409305147), // FSQRT_D32_MM
UINT64_C(1176502276), // FSQRT_D64
UINT64_C(1409305147), // FSQRT_D64_MM
UINT64_C(1174405124), // FSQRT_S
UINT64_C(1409288763), // FSQRT_S_MM
UINT64_C(2066087966), // FSQRT_W
UINT64_C(2019557403), // FSUB_D
UINT64_C(1176502273), // FSUB_D32
UINT64_C(1409286512), // FSUB_D32_MM
UINT64_C(1176502273), // FSUB_D64
UINT64_C(1409286512), // FSUB_D64_MM
UINT64_C(1174405121), // FSUB_S
UINT64_C(1409286256), // FSUB_S_MM
UINT64_C(1409286256), // FSUB_S_MMR6
UINT64_C(2017460251), // FSUB_W
UINT64_C(2061500442), // FSUEQ_D
UINT64_C(2059403290), // FSUEQ_W
UINT64_C(2078277658), // FSULE_D
UINT64_C(2076180506), // FSULE_W
UINT64_C(2069889050), // FSULT_D
UINT64_C(2067791898), // FSULT_W
UINT64_C(2057306140), // FSUNE_D
UINT64_C(2055208988), // FSUNE_W
UINT64_C(2053111834), // FSUN_D
UINT64_C(2051014682), // FSUN_W
UINT64_C(2067333150), // FTINT_S_D
UINT64_C(2067267614), // FTINT_S_W
UINT64_C(2067464222), // FTINT_U_D
UINT64_C(2067398686), // FTINT_U_W
UINT64_C(2055208987), // FTQ_H
UINT64_C(2057306139), // FTQ_W
UINT64_C(2065891358), // FTRUNC_S_D
UINT64_C(2065825822), // FTRUNC_S_W
UINT64_C(2066022430), // FTRUNC_U_D
UINT64_C(2065956894), // FTRUNC_U_W
UINT64_C(2080374845), // GINVI
UINT64_C(24956), // GINVI_MMR6
UINT64_C(2080374973), // GINVT
UINT64_C(29052), // GINVT_MMR6
UINT64_C(2053111829), // HADD_S_D
UINT64_C(2048917525), // HADD_S_H
UINT64_C(2051014677), // HADD_S_W
UINT64_C(2061500437), // HADD_U_D
UINT64_C(2057306133), // HADD_U_H
UINT64_C(2059403285), // HADD_U_W
UINT64_C(2069889045), // HSUB_S_D
UINT64_C(2065694741), // HSUB_S_H
UINT64_C(2067791893), // HSUB_S_W
UINT64_C(2078277653), // HSUB_U_D
UINT64_C(2074083349), // HSUB_U_H
UINT64_C(2076180501), // HSUB_U_W
UINT64_C(1107296296), // HYPCALL
UINT64_C(50044), // HYPCALL_MM
UINT64_C(2063597588), // ILVEV_B
UINT64_C(2069889044), // ILVEV_D
UINT64_C(2065694740), // ILVEV_H
UINT64_C(2067791892), // ILVEV_W
UINT64_C(2046820372), // ILVL_B
UINT64_C(2053111828), // ILVL_D
UINT64_C(2048917524), // ILVL_H
UINT64_C(2051014676), // ILVL_W
UINT64_C(2071986196), // ILVOD_B
UINT64_C(2078277652), // ILVOD_D
UINT64_C(2074083348), // ILVOD_H
UINT64_C(2076180500), // ILVOD_W
UINT64_C(2055208980), // ILVR_B
UINT64_C(2061500436), // ILVR_D
UINT64_C(2057306132), // ILVR_H
UINT64_C(2059403284), // ILVR_W
UINT64_C(2080374788), // INS
UINT64_C(2030043161), // INSERT_B
UINT64_C(2033713177), // INSERT_D
UINT64_C(2032140313), // INSERT_H
UINT64_C(2033188889), // INSERT_W
UINT64_C(2080374796), // INSV
UINT64_C(2034237465), // INSVE_B
UINT64_C(2037907481), // INSVE_D
UINT64_C(2036334617), // INSVE_H
UINT64_C(2037383193), // INSVE_W
UINT64_C(16700), // INSV_MM
UINT64_C(12), // INS_MM
UINT64_C(12), // INS_MMR6
UINT64_C(134217728), // J
UINT64_C(201326592), // JAL
UINT64_C(9), // JALR
UINT64_C(17856), // JALR16_MM
UINT64_C(9), // JALR64
UINT64_C(17419), // JALRC16_MMR6
UINT64_C(7996), // JALRC_HB_MMR6
UINT64_C(3900), // JALRC_MMR6
UINT64_C(17888), // JALRS16_MM
UINT64_C(20284), // JALRS_MM
UINT64_C(1033), // JALR_HB
UINT64_C(1033), // JALR_HB64
UINT64_C(3900), // JALR_MM
UINT64_C(1946157056), // JALS_MM
UINT64_C(1946157056), // JALX
UINT64_C(4026531840), // JALX_MM
UINT64_C(4093640704), // JAL_MM
UINT64_C(4160749568), // JIALC
UINT64_C(4160749568), // JIALC64
UINT64_C(2147483648), // JIALC_MMR6
UINT64_C(3623878656), // JIC
UINT64_C(3623878656), // JIC64
UINT64_C(2684354560), // JIC_MMR6
UINT64_C(8), // JR
UINT64_C(17792), // JR16_MM
UINT64_C(8), // JR64
UINT64_C(18176), // JRADDIUSP
UINT64_C(17824), // JRC16_MM
UINT64_C(17411), // JRC16_MMR6
UINT64_C(17427), // JRCADDIUSP_MMR6
UINT64_C(1032), // JR_HB
UINT64_C(1032), // JR_HB64
UINT64_C(1033), // JR_HB64_R6
UINT64_C(1033), // JR_HB_R6
UINT64_C(3900), // JR_MM
UINT64_C(3556769792), // J_MM
UINT64_C(402653184), // Jal16
UINT64_C(402653184), // JalB16
UINT64_C(59424), // JrRa16
UINT64_C(59616), // JrcRa16
UINT64_C(59584), // JrcRx16
UINT64_C(59392), // JumpLinkReg16
UINT64_C(2147483648), // LB
UINT64_C(2147483648), // LB64
UINT64_C(2080374828), // LBE
UINT64_C(1610639360), // LBE_MM
UINT64_C(2048), // LBU16_MM
UINT64_C(2080375178), // LBUX
UINT64_C(549), // LBUX_MM
UINT64_C(335544320), // LBU_MMR6
UINT64_C(469762048), // LB_MM
UINT64_C(469762048), // LB_MMR6
UINT64_C(2415919104), // LBu
UINT64_C(2415919104), // LBu64
UINT64_C(2080374824), // LBuE
UINT64_C(1610637312), // LBuE_MM
UINT64_C(335544320), // LBu_MM
UINT64_C(3690987520), // LD
UINT64_C(3556769792), // LDC1
UINT64_C(3556769792), // LDC164
UINT64_C(3154116608), // LDC1_D64_MMR6
UINT64_C(3154116608), // LDC1_MM
UINT64_C(3623878656), // LDC2
UINT64_C(536879104), // LDC2_MMR6
UINT64_C(1237319680), // LDC2_R6
UINT64_C(3690987520), // LDC3
UINT64_C(2063597575), // LDI_B
UINT64_C(2069889031), // LDI_D
UINT64_C(2065694727), // LDI_H
UINT64_C(2067791879), // LDI_W
UINT64_C(1744830464), // LDL
UINT64_C(3960995840), // LDPC
UINT64_C(1811939328), // LDR
UINT64_C(1275068417), // LDXC1
UINT64_C(1275068417), // LDXC164
UINT64_C(2013265952), // LD_B
UINT64_C(2013265955), // LD_D
UINT64_C(2013265953), // LD_H
UINT64_C(2013265954), // LD_W
UINT64_C(603979776), // LEA_ADDiu
UINT64_C(1677721600), // LEA_ADDiu64
UINT64_C(805306368), // LEA_ADDiu_MM
UINT64_C(2214592512), // LH
UINT64_C(2214592512), // LH64
UINT64_C(2080374829), // LHE
UINT64_C(1610639872), // LHE_MM
UINT64_C(10240), // LHU16_MM
UINT64_C(2080375050), // LHX
UINT64_C(357), // LHX_MM
UINT64_C(1006632960), // LH_MM
UINT64_C(2483027968), // LHu
UINT64_C(2483027968), // LHu64
UINT64_C(2080374825), // LHuE
UINT64_C(1610637824), // LHuE_MM
UINT64_C(872415232), // LHu_MM
UINT64_C(60416), // LI16_MM
UINT64_C(60416), // LI16_MMR6
UINT64_C(3221225472), // LL
UINT64_C(3221225472), // LL64
UINT64_C(2080374838), // LL64_R6
UINT64_C(3489660928), // LLD
UINT64_C(2080374839), // LLD_R6
UINT64_C(2080374830), // LLE
UINT64_C(1610640384), // LLE_MM
UINT64_C(1610625024), // LL_MM
UINT64_C(1610625024), // LL_MMR6
UINT64_C(2080374838), // LL_R6
UINT64_C(5), // LSA
UINT64_C(15), // LSA_MMR6
UINT64_C(5), // LSA_R6
UINT64_C(268435456), // LUI_MMR6
UINT64_C(1275068421), // LUXC1
UINT64_C(1275068421), // LUXC164
UINT64_C(1409286472), // LUXC1_MM
UINT64_C(1006632960), // LUi
UINT64_C(1006632960), // LUi64
UINT64_C(1101004800), // LUi_MM
UINT64_C(2348810240), // LW
UINT64_C(26624), // LW16_MM
UINT64_C(2348810240), // LW64
UINT64_C(3288334336), // LWC1
UINT64_C(2617245696), // LWC1_MM
UINT64_C(3355443200), // LWC2
UINT64_C(536870912), // LWC2_MMR6
UINT64_C(1228931072), // LWC2_R6
UINT64_C(3422552064), // LWC3
UINT64_C(2348810240), // LWDSP
UINT64_C(4227858432), // LWDSP_MM
UINT64_C(2080374831), // LWE
UINT64_C(1610640896), // LWE_MM
UINT64_C(25600), // LWGP_MM
UINT64_C(2281701376), // LWL
UINT64_C(2281701376), // LWL64
UINT64_C(2080374809), // LWLE
UINT64_C(1610638336), // LWLE_MM
UINT64_C(1610612736), // LWL_MM
UINT64_C(17664), // LWM16_MM
UINT64_C(17410), // LWM16_MMR6
UINT64_C(536891392), // LWM32_MM
UINT64_C(3959947264), // LWPC
UINT64_C(2013790208), // LWPC_MMR6
UINT64_C(536875008), // LWP_MM
UINT64_C(2550136832), // LWR
UINT64_C(2550136832), // LWR64
UINT64_C(2080374810), // LWRE
UINT64_C(1610638848), // LWRE_MM
UINT64_C(1610616832), // LWR_MM
UINT64_C(18432), // LWSP_MM
UINT64_C(3960471552), // LWUPC
UINT64_C(1610670080), // LWU_MM
UINT64_C(2080374794), // LWX
UINT64_C(1275068416), // LWXC1
UINT64_C(1409286216), // LWXC1_MM
UINT64_C(280), // LWXS_MM
UINT64_C(421), // LWX_MM
UINT64_C(4227858432), // LW_MM
UINT64_C(4227858432), // LW_MMR6
UINT64_C(2617245696), // LWu
UINT64_C(4026570752), // LbRxRyOffMemX16
UINT64_C(4026572800), // LbuRxRyOffMemX16
UINT64_C(4026572800), // LhRxRyOffMemX16
UINT64_C(4026572800), // LhuRxRyOffMemX16
UINT64_C(26624), // LiRxImm16
UINT64_C(4026558464), // LiRxImmAlignX16
UINT64_C(4026558464), // LiRxImmX16
UINT64_C(45056), // LwRxPcTcp16
UINT64_C(4026576896), // LwRxPcTcpX16
UINT64_C(4026570752), // LwRxRyOffMemX16
UINT64_C(4026568704), // LwRxSpImmX16
UINT64_C(1879048192), // MADD
UINT64_C(1176502296), // MADDF_D
UINT64_C(1409287096), // MADDF_D_MMR6
UINT64_C(1174405144), // MADDF_S
UINT64_C(1409286584), // MADDF_S_MMR6
UINT64_C(2067791900), // MADDR_Q_H
UINT64_C(2069889052), // MADDR_Q_W
UINT64_C(1879048193), // MADDU
UINT64_C(1879048193), // MADDU_DSP
UINT64_C(6844), // MADDU_DSP_MM
UINT64_C(56124), // MADDU_MM
UINT64_C(2021654546), // MADDV_B
UINT64_C(2027946002), // MADDV_D
UINT64_C(2023751698), // MADDV_H
UINT64_C(2025848850), // MADDV_W
UINT64_C(1275068449), // MADD_D32
UINT64_C(1409286153), // MADD_D32_MM
UINT64_C(1275068449), // MADD_D64
UINT64_C(1879048192), // MADD_DSP
UINT64_C(2748), // MADD_DSP_MM
UINT64_C(52028), // MADD_MM
UINT64_C(2034237468), // MADD_Q_H
UINT64_C(2036334620), // MADD_Q_W
UINT64_C(1275068448), // MADD_S
UINT64_C(1409286145), // MADD_S_MM
UINT64_C(2080375856), // MAQ_SA_W_PHL
UINT64_C(14972), // MAQ_SA_W_PHL_MM
UINT64_C(2080375984), // MAQ_SA_W_PHR
UINT64_C(10876), // MAQ_SA_W_PHR_MM
UINT64_C(2080376112), // MAQ_S_W_PHL
UINT64_C(6780), // MAQ_S_W_PHL_MM
UINT64_C(2080376240), // MAQ_S_W_PHR
UINT64_C(2684), // MAQ_S_W_PHR_MM
UINT64_C(1176502303), // MAXA_D
UINT64_C(1409286699), // MAXA_D_MMR6
UINT64_C(1174405151), // MAXA_S
UINT64_C(1409286187), // MAXA_S_MMR6
UINT64_C(2030043142), // MAXI_S_B
UINT64_C(2036334598), // MAXI_S_D
UINT64_C(2032140294), // MAXI_S_H
UINT64_C(2034237446), // MAXI_S_W
UINT64_C(2038431750), // MAXI_U_B
UINT64_C(2044723206), // MAXI_U_D
UINT64_C(2040528902), // MAXI_U_H
UINT64_C(2042626054), // MAXI_U_W
UINT64_C(2063597582), // MAX_A_B
UINT64_C(2069889038), // MAX_A_D
UINT64_C(2065694734), // MAX_A_H
UINT64_C(2067791886), // MAX_A_W
UINT64_C(1176502301), // MAX_D
UINT64_C(1409286667), // MAX_D_MMR6
UINT64_C(1174405149), // MAX_S
UINT64_C(2030043150), // MAX_S_B
UINT64_C(2036334606), // MAX_S_D
UINT64_C(2032140302), // MAX_S_H
UINT64_C(1409286155), // MAX_S_MMR6
UINT64_C(2034237454), // MAX_S_W
UINT64_C(2038431758), // MAX_U_B
UINT64_C(2044723214), // MAX_U_D
UINT64_C(2040528910), // MAX_U_H
UINT64_C(2042626062), // MAX_U_W
UINT64_C(1073741824), // MFC0
UINT64_C(252), // MFC0_MMR6
UINT64_C(1140850688), // MFC1
UINT64_C(1140850688), // MFC1_D64
UINT64_C(1409294395), // MFC1_MM
UINT64_C(1409294395), // MFC1_MMR6
UINT64_C(1207959552), // MFC2
UINT64_C(19772), // MFC2_MMR6
UINT64_C(1080033280), // MFGC0
UINT64_C(1276), // MFGC0_MM
UINT64_C(244), // MFHC0_MMR6
UINT64_C(1147142144), // MFHC1_D32
UINT64_C(1409298491), // MFHC1_D32_MM
UINT64_C(1147142144), // MFHC1_D64
UINT64_C(1409298491), // MFHC1_D64_MM
UINT64_C(36156), // MFHC2_MMR6
UINT64_C(1080034304), // MFHGC0
UINT64_C(1268), // MFHGC0_MM
UINT64_C(16), // MFHI
UINT64_C(17920), // MFHI16_MM
UINT64_C(16), // MFHI64
UINT64_C(16), // MFHI_DSP
UINT64_C(124), // MFHI_DSP_MM
UINT64_C(3452), // MFHI_MM
UINT64_C(18), // MFLO
UINT64_C(17984), // MFLO16_MM
UINT64_C(18), // MFLO64
UINT64_C(18), // MFLO_DSP
UINT64_C(4220), // MFLO_DSP_MM
UINT64_C(7548), // MFLO_MM
UINT64_C(1090519040), // MFTR
UINT64_C(1176502302), // MINA_D
UINT64_C(1409286691), // MINA_D_MMR6
UINT64_C(1174405150), // MINA_S
UINT64_C(1409286179), // MINA_S_MMR6
UINT64_C(2046820358), // MINI_S_B
UINT64_C(2053111814), // MINI_S_D
UINT64_C(2048917510), // MINI_S_H
UINT64_C(2051014662), // MINI_S_W
UINT64_C(2055208966), // MINI_U_B
UINT64_C(2061500422), // MINI_U_D
UINT64_C(2057306118), // MINI_U_H
UINT64_C(2059403270), // MINI_U_W
UINT64_C(2071986190), // MIN_A_B
UINT64_C(2078277646), // MIN_A_D
UINT64_C(2074083342), // MIN_A_H
UINT64_C(2076180494), // MIN_A_W
UINT64_C(1176502300), // MIN_D
UINT64_C(1409286659), // MIN_D_MMR6
UINT64_C(1174405148), // MIN_S
UINT64_C(2046820366), // MIN_S_B
UINT64_C(2053111822), // MIN_S_D
UINT64_C(2048917518), // MIN_S_H
UINT64_C(1409286147), // MIN_S_MMR6
UINT64_C(2051014670), // MIN_S_W
UINT64_C(2055208974), // MIN_U_B
UINT64_C(2061500430), // MIN_U_D
UINT64_C(2057306126), // MIN_U_H
UINT64_C(2059403278), // MIN_U_W
UINT64_C(218), // MOD
UINT64_C(2080375952), // MODSUB
UINT64_C(661), // MODSUB_MM
UINT64_C(219), // MODU
UINT64_C(472), // MODU_MMR6
UINT64_C(344), // MOD_MMR6
UINT64_C(2063597586), // MOD_S_B
UINT64_C(2069889042), // MOD_S_D
UINT64_C(2065694738), // MOD_S_H
UINT64_C(2067791890), // MOD_S_W
UINT64_C(2071986194), // MOD_U_B
UINT64_C(2078277650), // MOD_U_D
UINT64_C(2074083346), // MOD_U_H
UINT64_C(2076180498), // MOD_U_W
UINT64_C(3072), // MOVE16_MM
UINT64_C(3072), // MOVE16_MMR6
UINT64_C(33792), // MOVEP_MM
UINT64_C(17412), // MOVEP_MMR6
UINT64_C(2025717785), // MOVE_V
UINT64_C(1176502289), // MOVF_D32
UINT64_C(1409286688), // MOVF_D32_MM
UINT64_C(1176502289), // MOVF_D64
UINT64_C(1), // MOVF_I
UINT64_C(1), // MOVF_I64
UINT64_C(1409286523), // MOVF_I_MM
UINT64_C(1174405137), // MOVF_S
UINT64_C(1409286176), // MOVF_S_MM
UINT64_C(1176502291), // MOVN_I64_D64
UINT64_C(11), // MOVN_I64_I
UINT64_C(11), // MOVN_I64_I64
UINT64_C(1174405139), // MOVN_I64_S
UINT64_C(1176502291), // MOVN_I_D32
UINT64_C(1409286456), // MOVN_I_D32_MM
UINT64_C(1176502291), // MOVN_I_D64
UINT64_C(11), // MOVN_I_I
UINT64_C(11), // MOVN_I_I64
UINT64_C(24), // MOVN_I_MM
UINT64_C(1174405139), // MOVN_I_S
UINT64_C(1409286200), // MOVN_I_S_MM
UINT64_C(1176567825), // MOVT_D32
UINT64_C(1409286752), // MOVT_D32_MM
UINT64_C(1176567825), // MOVT_D64
UINT64_C(65537), // MOVT_I
UINT64_C(65537), // MOVT_I64
UINT64_C(1409288571), // MOVT_I_MM
UINT64_C(1174470673), // MOVT_S
UINT64_C(1409286240), // MOVT_S_MM
UINT64_C(1176502290), // MOVZ_I64_D64
UINT64_C(10), // MOVZ_I64_I
UINT64_C(10), // MOVZ_I64_I64
UINT64_C(1174405138), // MOVZ_I64_S
UINT64_C(1176502290), // MOVZ_I_D32
UINT64_C(1409286520), // MOVZ_I_D32_MM
UINT64_C(1176502290), // MOVZ_I_D64
UINT64_C(10), // MOVZ_I_I
UINT64_C(10), // MOVZ_I_I64
UINT64_C(88), // MOVZ_I_MM
UINT64_C(1174405138), // MOVZ_I_S
UINT64_C(1409286264), // MOVZ_I_S_MM
UINT64_C(1879048196), // MSUB
UINT64_C(1176502297), // MSUBF_D
UINT64_C(1409287160), // MSUBF_D_MMR6
UINT64_C(1174405145), // MSUBF_S
UINT64_C(1409286648), // MSUBF_S_MMR6
UINT64_C(2071986204), // MSUBR_Q_H
UINT64_C(2074083356), // MSUBR_Q_W
UINT64_C(1879048197), // MSUBU
UINT64_C(1879048197), // MSUBU_DSP
UINT64_C(15036), // MSUBU_DSP_MM
UINT64_C(64316), // MSUBU_MM
UINT64_C(2030043154), // MSUBV_B
UINT64_C(2036334610), // MSUBV_D
UINT64_C(2032140306), // MSUBV_H
UINT64_C(2034237458), // MSUBV_W
UINT64_C(1275068457), // MSUB_D32
UINT64_C(1409286185), // MSUB_D32_MM
UINT64_C(1275068457), // MSUB_D64
UINT64_C(1879048196), // MSUB_DSP
UINT64_C(10940), // MSUB_DSP_MM
UINT64_C(60220), // MSUB_MM
UINT64_C(2038431772), // MSUB_Q_H
UINT64_C(2040528924), // MSUB_Q_W
UINT64_C(1275068456), // MSUB_S
UINT64_C(1409286177), // MSUB_S_MM
UINT64_C(1082130432), // MTC0
UINT64_C(764), // MTC0_MMR6
UINT64_C(1149239296), // MTC1
UINT64_C(1149239296), // MTC1_D64
UINT64_C(1409296443), // MTC1_D64_MM
UINT64_C(1409296443), // MTC1_MM
UINT64_C(1409296443), // MTC1_MMR6
UINT64_C(1216348160), // MTC2
UINT64_C(23868), // MTC2_MMR6
UINT64_C(1080033792), // MTGC0
UINT64_C(1788), // MTGC0_MM
UINT64_C(756), // MTHC0_MMR6
UINT64_C(1155530752), // MTHC1_D32
UINT64_C(1409300539), // MTHC1_D32_MM
UINT64_C(1155530752), // MTHC1_D64
UINT64_C(1409300539), // MTHC1_D64_MM
UINT64_C(40252), // MTHC2_MMR6
UINT64_C(1080034816), // MTHGC0
UINT64_C(1780), // MTHGC0_MM
UINT64_C(17), // MTHI
UINT64_C(17), // MTHI64
UINT64_C(17), // MTHI_DSP
UINT64_C(8316), // MTHI_DSP_MM
UINT64_C(11644), // MTHI_MM
UINT64_C(2080376824), // MTHLIP
UINT64_C(636), // MTHLIP_MM
UINT64_C(19), // MTLO
UINT64_C(19), // MTLO64
UINT64_C(19), // MTLO_DSP
UINT64_C(12412), // MTLO_DSP_MM
UINT64_C(15740), // MTLO_MM
UINT64_C(1879048200), // MTM0
UINT64_C(1879048204), // MTM1
UINT64_C(1879048205), // MTM2
UINT64_C(1879048201), // MTP0
UINT64_C(1879048202), // MTP1
UINT64_C(1879048203), // MTP2
UINT64_C(1098907648), // MTTR
UINT64_C(216), // MUH
UINT64_C(217), // MUHU
UINT64_C(216), // MUHU_MMR6
UINT64_C(88), // MUH_MMR6
UINT64_C(1879048194), // MUL
UINT64_C(2080376592), // MULEQ_S_W_PHL
UINT64_C(37), // MULEQ_S_W_PHL_MM
UINT64_C(2080376656), // MULEQ_S_W_PHR
UINT64_C(101), // MULEQ_S_W_PHR_MM
UINT64_C(2080375184), // MULEU_S_PH_QBL
UINT64_C(149), // MULEU_S_PH_QBL_MM
UINT64_C(2080375248), // MULEU_S_PH_QBR
UINT64_C(213), // MULEU_S_PH_QBR_MM
UINT64_C(2080376784), // MULQ_RS_PH
UINT64_C(277), // MULQ_RS_PH_MM
UINT64_C(2080376280), // MULQ_RS_W
UINT64_C(405), // MULQ_RS_W_MMR2
UINT64_C(2080376720), // MULQ_S_PH
UINT64_C(341), // MULQ_S_PH_MMR2
UINT64_C(2080376216), // MULQ_S_W
UINT64_C(469), // MULQ_S_W_MMR2
UINT64_C(2063597596), // MULR_Q_H
UINT64_C(2065694748), // MULR_Q_W
UINT64_C(2080375216), // MULSAQ_S_W_PH
UINT64_C(15548), // MULSAQ_S_W_PH_MM
UINT64_C(2080374960), // MULSA_W_PH
UINT64_C(11452), // MULSA_W_PH_MMR2
UINT64_C(24), // MULT
UINT64_C(25), // MULTU_DSP
UINT64_C(7356), // MULTU_DSP_MM
UINT64_C(24), // MULT_DSP
UINT64_C(3260), // MULT_DSP_MM
UINT64_C(35644), // MULT_MM
UINT64_C(25), // MULTu
UINT64_C(39740), // MULTu_MM
UINT64_C(153), // MULU
UINT64_C(152), // MULU_MMR6
UINT64_C(2013265938), // MULV_B
UINT64_C(2019557394), // MULV_D
UINT64_C(2015363090), // MULV_H
UINT64_C(2017460242), // MULV_W
UINT64_C(528), // MUL_MM
UINT64_C(24), // MUL_MMR6
UINT64_C(2080375576), // MUL_PH
UINT64_C(45), // MUL_PH_MMR2
UINT64_C(2030043164), // MUL_Q_H
UINT64_C(2032140316), // MUL_Q_W
UINT64_C(152), // MUL_R6
UINT64_C(2080375704), // MUL_S_PH
UINT64_C(1069), // MUL_S_PH_MMR2
UINT64_C(59408), // Mfhi16
UINT64_C(59410), // Mflo16
UINT64_C(25856), // Move32R16
UINT64_C(26368), // MoveR3216
UINT64_C(2064121886), // NLOC_B
UINT64_C(2064318494), // NLOC_D
UINT64_C(2064187422), // NLOC_H
UINT64_C(2064252958), // NLOC_W
UINT64_C(2064384030), // NLZC_B
UINT64_C(2064580638), // NLZC_D
UINT64_C(2064449566), // NLZC_H
UINT64_C(2064515102), // NLZC_W
UINT64_C(1275068465), // NMADD_D32
UINT64_C(1409286154), // NMADD_D32_MM
UINT64_C(1275068465), // NMADD_D64
UINT64_C(1275068464), // NMADD_S
UINT64_C(1409286146), // NMADD_S_MM
UINT64_C(1275068473), // NMSUB_D32
UINT64_C(1409286186), // NMSUB_D32_MM
UINT64_C(1275068473), // NMSUB_D64
UINT64_C(1275068472), // NMSUB_S
UINT64_C(1409286178), // NMSUB_S_MM
UINT64_C(39), // NOR
UINT64_C(39), // NOR64
UINT64_C(2046820352), // NORI_B
UINT64_C(720), // NOR_MM
UINT64_C(720), // NOR_MMR6
UINT64_C(2017460254), // NOR_V
UINT64_C(17408), // NOT16_MM
UINT64_C(17408), // NOT16_MMR6
UINT64_C(59421), // NegRxRy16
UINT64_C(59407), // NotRxRy16
UINT64_C(37), // OR
UINT64_C(17600), // OR16_MM
UINT64_C(17417), // OR16_MMR6
UINT64_C(37), // OR64
UINT64_C(2030043136), // ORI_B
UINT64_C(1342177280), // ORI_MMR6
UINT64_C(656), // OR_MM
UINT64_C(656), // OR_MMR6
UINT64_C(2015363102), // OR_V
UINT64_C(872415232), // ORi
UINT64_C(872415232), // ORi64
UINT64_C(1342177280), // ORi_MM
UINT64_C(59405), // OrRxRxRy16
UINT64_C(2080375697), // PACKRL_PH
UINT64_C(429), // PACKRL_PH_MM
UINT64_C(320), // PAUSE
UINT64_C(10240), // PAUSE_MM
UINT64_C(10240), // PAUSE_MMR6
UINT64_C(2030043156), // PCKEV_B
UINT64_C(2036334612), // PCKEV_D
UINT64_C(2032140308), // PCKEV_H
UINT64_C(2034237460), // PCKEV_W
UINT64_C(2038431764), // PCKOD_B
UINT64_C(2044723220), // PCKOD_D
UINT64_C(2040528916), // PCKOD_H
UINT64_C(2042626068), // PCKOD_W
UINT64_C(2063859742), // PCNT_B
UINT64_C(2064056350), // PCNT_D
UINT64_C(2063925278), // PCNT_H
UINT64_C(2063990814), // PCNT_W
UINT64_C(2080375505), // PICK_PH
UINT64_C(557), // PICK_PH_MM
UINT64_C(2080374993), // PICK_QB
UINT64_C(493), // PICK_QB_MM
UINT64_C(1186988076), // PLL_PS64
UINT64_C(1186988077), // PLU_PS64
UINT64_C(1879048236), // POP
UINT64_C(2080375058), // PRECEQU_PH_QBL
UINT64_C(2080375186), // PRECEQU_PH_QBLA
UINT64_C(29500), // PRECEQU_PH_QBLA_MM
UINT64_C(28988), // PRECEQU_PH_QBL_MM
UINT64_C(2080375122), // PRECEQU_PH_QBR
UINT64_C(2080375250), // PRECEQU_PH_QBRA
UINT64_C(37692), // PRECEQU_PH_QBRA_MM
UINT64_C(37180), // PRECEQU_PH_QBR_MM
UINT64_C(2080375570), // PRECEQ_W_PHL
UINT64_C(20796), // PRECEQ_W_PHL_MM
UINT64_C(2080375634), // PRECEQ_W_PHR
UINT64_C(24892), // PRECEQ_W_PHR_MM
UINT64_C(2080376594), // PRECEU_PH_QBL
UINT64_C(2080376722), // PRECEU_PH_QBLA
UINT64_C(45884), // PRECEU_PH_QBLA_MM
UINT64_C(45372), // PRECEU_PH_QBL_MM
UINT64_C(2080376658), // PRECEU_PH_QBR
UINT64_C(2080376786), // PRECEU_PH_QBRA
UINT64_C(54076), // PRECEU_PH_QBRA_MM
UINT64_C(53564), // PRECEU_PH_QBR_MM
UINT64_C(2080375761), // PRECRQU_S_QB_PH
UINT64_C(365), // PRECRQU_S_QB_PH_MM
UINT64_C(2080376081), // PRECRQ_PH_W
UINT64_C(237), // PRECRQ_PH_W_MM
UINT64_C(2080375569), // PRECRQ_QB_PH
UINT64_C(173), // PRECRQ_QB_PH_MM
UINT64_C(2080376145), // PRECRQ_RS_PH_W
UINT64_C(301), // PRECRQ_RS_PH_W_MM
UINT64_C(2080375633), // PRECR_QB_PH
UINT64_C(109), // PRECR_QB_PH_MMR2
UINT64_C(2080376721), // PRECR_SRA_PH_W
UINT64_C(973), // PRECR_SRA_PH_W_MMR2
UINT64_C(2080376785), // PRECR_SRA_R_PH_W
UINT64_C(1997), // PRECR_SRA_R_PH_W_MMR2
UINT64_C(3422552064), // PREF
UINT64_C(2080374819), // PREFE
UINT64_C(1610654720), // PREFE_MM
UINT64_C(1409286560), // PREFX_MM
UINT64_C(1610620928), // PREF_MM
UINT64_C(1610620928), // PREF_MMR6
UINT64_C(2080374837), // PREF_R6
UINT64_C(2080374897), // PREPEND
UINT64_C(597), // PREPEND_MMR2
UINT64_C(2080376080), // RADDU_W_QB
UINT64_C(61756), // RADDU_W_QB_MM
UINT64_C(2080375992), // RDDSP
UINT64_C(1660), // RDDSP_MM
UINT64_C(2080374843), // RDHWR
UINT64_C(2080374843), // RDHWR64
UINT64_C(27452), // RDHWR_MM
UINT64_C(448), // RDHWR_MMR6
UINT64_C(57724), // RDPGPR_MMR6
UINT64_C(1176502293), // RECIP_D32
UINT64_C(1409307195), // RECIP_D32_MM
UINT64_C(1176502293), // RECIP_D64
UINT64_C(1409307195), // RECIP_D64_MM
UINT64_C(1174405141), // RECIP_S
UINT64_C(1409290811), // RECIP_S_MM
UINT64_C(2080375506), // REPLV_PH
UINT64_C(828), // REPLV_PH_MM
UINT64_C(2080374994), // REPLV_QB
UINT64_C(4924), // REPLV_QB_MM
UINT64_C(2080375442), // REPL_PH
UINT64_C(61), // REPL_PH_MM
UINT64_C(2080374930), // REPL_QB
UINT64_C(1532), // REPL_QB_MM
UINT64_C(1176502298), // RINT_D
UINT64_C(1409286688), // RINT_D_MMR6
UINT64_C(1174405146), // RINT_S
UINT64_C(1409286176), // RINT_S_MMR6
UINT64_C(2097154), // ROTR
UINT64_C(70), // ROTRV
UINT64_C(208), // ROTRV_MM
UINT64_C(192), // ROTR_MM
UINT64_C(1176502280), // ROUND_L_D64
UINT64_C(1409315643), // ROUND_L_D_MMR6
UINT64_C(1174405128), // ROUND_L_S
UINT64_C(1409299259), // ROUND_L_S_MMR6
UINT64_C(1176502284), // ROUND_W_D32
UINT64_C(1176502284), // ROUND_W_D64
UINT64_C(1409317691), // ROUND_W_D_MMR6
UINT64_C(1409317691), // ROUND_W_MM
UINT64_C(1174405132), // ROUND_W_S
UINT64_C(1409301307), // ROUND_W_S_MM
UINT64_C(1409301307), // ROUND_W_S_MMR6
UINT64_C(1176502294), // RSQRT_D32
UINT64_C(1409303099), // RSQRT_D32_MM
UINT64_C(1176502294), // RSQRT_D64
UINT64_C(1409303099), // RSQRT_D64_MM
UINT64_C(1174405142), // RSQRT_S
UINT64_C(1409286715), // RSQRT_S_MM
UINT64_C(25728), // Restore16
UINT64_C(25728), // RestoreX16
UINT64_C(1879048216), // SAA
UINT64_C(1879048217), // SAAD
UINT64_C(2020605962), // SAT_S_B
UINT64_C(2013265930), // SAT_S_D
UINT64_C(2019557386), // SAT_S_H
UINT64_C(2017460234), // SAT_S_W
UINT64_C(2028994570), // SAT_U_B
UINT64_C(2021654538), // SAT_U_D
UINT64_C(2027945994), // SAT_U_H
UINT64_C(2025848842), // SAT_U_W
UINT64_C(2684354560), // SB
UINT64_C(34816), // SB16_MM
UINT64_C(34816), // SB16_MMR6
UINT64_C(2684354560), // SB64
UINT64_C(2080374812), // SBE
UINT64_C(1610655744), // SBE_MM
UINT64_C(402653184), // SB_MM
UINT64_C(402653184), // SB_MMR6
UINT64_C(3758096384), // SC
UINT64_C(3758096384), // SC64
UINT64_C(2080374822), // SC64_R6
UINT64_C(4026531840), // SCD
UINT64_C(2080374823), // SCD_R6
UINT64_C(2080374814), // SCE
UINT64_C(1610656768), // SCE_MM
UINT64_C(1610657792), // SC_MM
UINT64_C(1610657792), // SC_MMR6
UINT64_C(2080374822), // SC_R6
UINT64_C(4227858432), // SD
UINT64_C(1879048255), // SDBBP
UINT64_C(18112), // SDBBP16_MM
UINT64_C(17467), // SDBBP16_MMR6
UINT64_C(56188), // SDBBP_MM
UINT64_C(56188), // SDBBP_MMR6
UINT64_C(14), // SDBBP_R6
UINT64_C(4093640704), // SDC1
UINT64_C(4093640704), // SDC164
UINT64_C(3087007744), // SDC1_D64_MMR6
UINT64_C(3087007744), // SDC1_MM
UINT64_C(4160749568), // SDC2
UINT64_C(536911872), // SDC2_MMR6
UINT64_C(1239416832), // SDC2_R6
UINT64_C(4227858432), // SDC3
UINT64_C(26), // SDIV
UINT64_C(43836), // SDIV_MM
UINT64_C(2952790016), // SDL
UINT64_C(3019898880), // SDR
UINT64_C(1275068425), // SDXC1
UINT64_C(1275068425), // SDXC164
UINT64_C(2080375840), // SEB
UINT64_C(2080375840), // SEB64
UINT64_C(11068), // SEB_MM
UINT64_C(2080376352), // SEH
UINT64_C(2080376352), // SEH64
UINT64_C(15164), // SEH_MM
UINT64_C(53), // SELEQZ
UINT64_C(53), // SELEQZ64
UINT64_C(1176502292), // SELEQZ_D
UINT64_C(1409286712), // SELEQZ_D_MMR6
UINT64_C(320), // SELEQZ_MMR6
UINT64_C(1174405140), // SELEQZ_S
UINT64_C(1409286200), // SELEQZ_S_MMR6
UINT64_C(55), // SELNEZ
UINT64_C(55), // SELNEZ64
UINT64_C(1176502295), // SELNEZ_D
UINT64_C(1409286776), // SELNEZ_D_MMR6
UINT64_C(384), // SELNEZ_MMR6
UINT64_C(1174405143), // SELNEZ_S
UINT64_C(1409286264), // SELNEZ_S_MMR6
UINT64_C(1176502288), // SEL_D
UINT64_C(1409286840), // SEL_D_MMR6
UINT64_C(1174405136), // SEL_S
UINT64_C(1409286328), // SEL_S_MMR6
UINT64_C(1879048234), // SEQ
UINT64_C(1879048238), // SEQi
UINT64_C(2751463424), // SH
UINT64_C(43008), // SH16_MM
UINT64_C(43008), // SH16_MMR6
UINT64_C(2751463424), // SH64
UINT64_C(2080374813), // SHE
UINT64_C(1610656256), // SHE_MM
UINT64_C(2013265922), // SHF_B
UINT64_C(2030043138), // SHF_H
UINT64_C(2046820354), // SHF_W
UINT64_C(2080376504), // SHILO
UINT64_C(2080376568), // SHILOV
UINT64_C(4732), // SHILOV_MM
UINT64_C(29), // SHILO_MM
UINT64_C(2080375443), // SHLLV_PH
UINT64_C(14), // SHLLV_PH_MM
UINT64_C(2080374931), // SHLLV_QB
UINT64_C(917), // SHLLV_QB_MM
UINT64_C(2080375699), // SHLLV_S_PH
UINT64_C(1038), // SHLLV_S_PH_MM
UINT64_C(2080376211), // SHLLV_S_W
UINT64_C(981), // SHLLV_S_W_MM
UINT64_C(2080375315), // SHLL_PH
UINT64_C(949), // SHLL_PH_MM
UINT64_C(2080374803), // SHLL_QB
UINT64_C(2172), // SHLL_QB_MM
UINT64_C(2080375571), // SHLL_S_PH
UINT64_C(2997), // SHLL_S_PH_MM
UINT64_C(2080376083), // SHLL_S_W
UINT64_C(1013), // SHLL_S_W_MM
UINT64_C(2080375507), // SHRAV_PH
UINT64_C(397), // SHRAV_PH_MM
UINT64_C(2080375187), // SHRAV_QB
UINT64_C(461), // SHRAV_QB_MMR2
UINT64_C(2080375763), // SHRAV_R_PH
UINT64_C(1421), // SHRAV_R_PH_MM
UINT64_C(2080375251), // SHRAV_R_QB
UINT64_C(1485), // SHRAV_R_QB_MMR2
UINT64_C(2080376275), // SHRAV_R_W
UINT64_C(725), // SHRAV_R_W_MM
UINT64_C(2080375379), // SHRA_PH
UINT64_C(821), // SHRA_PH_MM
UINT64_C(2080375059), // SHRA_QB
UINT64_C(508), // SHRA_QB_MMR2
UINT64_C(2080375635), // SHRA_R_PH
UINT64_C(1845), // SHRA_R_PH_MM
UINT64_C(2080375123), // SHRA_R_QB
UINT64_C(4604), // SHRA_R_QB_MMR2
UINT64_C(2080376147), // SHRA_R_W
UINT64_C(757), // SHRA_R_W_MM
UINT64_C(2080376531), // SHRLV_PH
UINT64_C(789), // SHRLV_PH_MMR2
UINT64_C(2080374995), // SHRLV_QB
UINT64_C(853), // SHRLV_QB_MM
UINT64_C(2080376403), // SHRL_PH
UINT64_C(1020), // SHRL_PH_MMR2
UINT64_C(2080374867), // SHRL_QB
UINT64_C(6268), // SHRL_QB_MM
UINT64_C(939524096), // SH_MM
UINT64_C(939524096), // SH_MMR6
UINT64_C(68616192), // SIGRIE
UINT64_C(63), // SIGRIE_MMR6
UINT64_C(2013265945), // SLDI_B
UINT64_C(2016935961), // SLDI_D
UINT64_C(2015363097), // SLDI_H
UINT64_C(2016411673), // SLDI_W
UINT64_C(2013265940), // SLD_B
UINT64_C(2019557396), // SLD_D
UINT64_C(2015363092), // SLD_H
UINT64_C(2017460244), // SLD_W
UINT64_C(0), // SLL
UINT64_C(9216), // SLL16_MM
UINT64_C(9216), // SLL16_MMR6
UINT64_C(0), // SLL64_32
UINT64_C(0), // SLL64_64
UINT64_C(2020605961), // SLLI_B
UINT64_C(2013265929), // SLLI_D
UINT64_C(2019557385), // SLLI_H
UINT64_C(2017460233), // SLLI_W
UINT64_C(4), // SLLV
UINT64_C(16), // SLLV_MM
UINT64_C(2013265933), // SLL_B
UINT64_C(2019557389), // SLL_D
UINT64_C(2015363085), // SLL_H
UINT64_C(0), // SLL_MM
UINT64_C(0), // SLL_MMR6
UINT64_C(2017460237), // SLL_W
UINT64_C(42), // SLT
UINT64_C(42), // SLT64
UINT64_C(848), // SLT_MM
UINT64_C(671088640), // SLTi
UINT64_C(671088640), // SLTi64
UINT64_C(2415919104), // SLTi_MM
UINT64_C(738197504), // SLTiu
UINT64_C(738197504), // SLTiu64
UINT64_C(2952790016), // SLTiu_MM
UINT64_C(43), // SLTu
UINT64_C(43), // SLTu64
UINT64_C(912), // SLTu_MM
UINT64_C(1879048235), // SNE
UINT64_C(1879048239), // SNEi
UINT64_C(2017460249), // SPLATI_B
UINT64_C(2021130265), // SPLATI_D
UINT64_C(2019557401), // SPLATI_H
UINT64_C(2020605977), // SPLATI_W
UINT64_C(2021654548), // SPLAT_B
UINT64_C(2027946004), // SPLAT_D
UINT64_C(2023751700), // SPLAT_H
UINT64_C(2025848852), // SPLAT_W
UINT64_C(3), // SRA
UINT64_C(2028994569), // SRAI_B
UINT64_C(2021654537), // SRAI_D
UINT64_C(2027945993), // SRAI_H
UINT64_C(2025848841), // SRAI_W
UINT64_C(2037383178), // SRARI_B
UINT64_C(2030043146), // SRARI_D
UINT64_C(2036334602), // SRARI_H
UINT64_C(2034237450), // SRARI_W
UINT64_C(2021654549), // SRAR_B
UINT64_C(2027946005), // SRAR_D
UINT64_C(2023751701), // SRAR_H
UINT64_C(2025848853), // SRAR_W
UINT64_C(7), // SRAV
UINT64_C(144), // SRAV_MM
UINT64_C(2021654541), // SRA_B
UINT64_C(2027945997), // SRA_D
UINT64_C(2023751693), // SRA_H
UINT64_C(128), // SRA_MM
UINT64_C(2025848845), // SRA_W
UINT64_C(2), // SRL
UINT64_C(9217), // SRL16_MM
UINT64_C(9217), // SRL16_MMR6
UINT64_C(2037383177), // SRLI_B
UINT64_C(2030043145), // SRLI_D
UINT64_C(2036334601), // SRLI_H
UINT64_C(2034237449), // SRLI_W
UINT64_C(2045771786), // SRLRI_B
UINT64_C(2038431754), // SRLRI_D
UINT64_C(2044723210), // SRLRI_H
UINT64_C(2042626058), // SRLRI_W
UINT64_C(2030043157), // SRLR_B
UINT64_C(2036334613), // SRLR_D
UINT64_C(2032140309), // SRLR_H
UINT64_C(2034237461), // SRLR_W
UINT64_C(6), // SRLV
UINT64_C(80), // SRLV_MM
UINT64_C(2030043149), // SRL_B
UINT64_C(2036334605), // SRL_D
UINT64_C(2032140301), // SRL_H
UINT64_C(64), // SRL_MM
UINT64_C(2034237453), // SRL_W
UINT64_C(64), // SSNOP
UINT64_C(2048), // SSNOP_MM
UINT64_C(2048), // SSNOP_MMR6
UINT64_C(2013265956), // ST_B
UINT64_C(2013265959), // ST_D
UINT64_C(2013265957), // ST_H
UINT64_C(2013265958), // ST_W
UINT64_C(34), // SUB
UINT64_C(2080375384), // SUBQH_PH
UINT64_C(589), // SUBQH_PH_MMR2
UINT64_C(2080375512), // SUBQH_R_PH
UINT64_C(1613), // SUBQH_R_PH_MMR2
UINT64_C(2080376024), // SUBQH_R_W
UINT64_C(1677), // SUBQH_R_W_MMR2
UINT64_C(2080375896), // SUBQH_W
UINT64_C(653), // SUBQH_W_MMR2
UINT64_C(2080375504), // SUBQ_PH
UINT64_C(525), // SUBQ_PH_MM
UINT64_C(2080375760), // SUBQ_S_PH
UINT64_C(1549), // SUBQ_S_PH_MM
UINT64_C(2080376272), // SUBQ_S_W
UINT64_C(837), // SUBQ_S_W_MM
UINT64_C(2030043153), // SUBSUS_U_B
UINT64_C(2036334609), // SUBSUS_U_D
UINT64_C(2032140305), // SUBSUS_U_H
UINT64_C(2034237457), // SUBSUS_U_W
UINT64_C(2038431761), // SUBSUU_S_B
UINT64_C(2044723217), // SUBSUU_S_D
UINT64_C(2040528913), // SUBSUU_S_H
UINT64_C(2042626065), // SUBSUU_S_W
UINT64_C(2013265937), // SUBS_S_B
UINT64_C(2019557393), // SUBS_S_D
UINT64_C(2015363089), // SUBS_S_H
UINT64_C(2017460241), // SUBS_S_W
UINT64_C(2021654545), // SUBS_U_B
UINT64_C(2027946001), // SUBS_U_D
UINT64_C(2023751697), // SUBS_U_H
UINT64_C(2025848849), // SUBS_U_W
UINT64_C(1025), // SUBU16_MM
UINT64_C(1025), // SUBU16_MMR6
UINT64_C(2080374872), // SUBUH_QB
UINT64_C(845), // SUBUH_QB_MMR2
UINT64_C(2080375000), // SUBUH_R_QB
UINT64_C(1869), // SUBUH_R_QB_MMR2
UINT64_C(464), // SUBU_MMR6
UINT64_C(2080375376), // SUBU_PH
UINT64_C(781), // SUBU_PH_MMR2
UINT64_C(2080374864), // SUBU_QB
UINT64_C(717), // SUBU_QB_MM
UINT64_C(2080375632), // SUBU_S_PH
UINT64_C(1805), // SUBU_S_PH_MMR2
UINT64_C(2080375120), // SUBU_S_QB
UINT64_C(1741), // SUBU_S_QB_MM
UINT64_C(2021654534), // SUBVI_B
UINT64_C(2027945990), // SUBVI_D
UINT64_C(2023751686), // SUBVI_H
UINT64_C(2025848838), // SUBVI_W
UINT64_C(2021654542), // SUBV_B
UINT64_C(2027945998), // SUBV_D
UINT64_C(2023751694), // SUBV_H
UINT64_C(2025848846), // SUBV_W
UINT64_C(400), // SUB_MM
UINT64_C(400), // SUB_MMR6
UINT64_C(35), // SUBu
UINT64_C(464), // SUBu_MM
UINT64_C(1275068429), // SUXC1
UINT64_C(1275068429), // SUXC164
UINT64_C(1409286536), // SUXC1_MM
UINT64_C(2885681152), // SW
UINT64_C(59392), // SW16_MM
UINT64_C(59392), // SW16_MMR6
UINT64_C(2885681152), // SW64
UINT64_C(3825205248), // SWC1
UINT64_C(2550136832), // SWC1_MM
UINT64_C(3892314112), // SWC2
UINT64_C(536903680), // SWC2_MMR6
UINT64_C(1231028224), // SWC2_R6
UINT64_C(3959422976), // SWC3
UINT64_C(2885681152), // SWDSP
UINT64_C(4160749568), // SWDSP_MM
UINT64_C(2080374815), // SWE
UINT64_C(1610657280), // SWE_MM
UINT64_C(2818572288), // SWL
UINT64_C(2818572288), // SWL64
UINT64_C(2080374817), // SWLE
UINT64_C(1610653696), // SWLE_MM
UINT64_C(1610645504), // SWL_MM
UINT64_C(17728), // SWM16_MM
UINT64_C(17418), // SWM16_MMR6
UINT64_C(536924160), // SWM32_MM
UINT64_C(536907776), // SWP_MM
UINT64_C(3087007744), // SWR
UINT64_C(3087007744), // SWR64
UINT64_C(2080374818), // SWRE
UINT64_C(1610654208), // SWRE_MM
UINT64_C(1610649600), // SWR_MM
UINT64_C(51200), // SWSP_MM
UINT64_C(51200), // SWSP_MMR6
UINT64_C(1275068424), // SWXC1
UINT64_C(1409286280), // SWXC1_MM
UINT64_C(4160749568), // SW_MM
UINT64_C(4160749568), // SW_MMR6
UINT64_C(15), // SYNC
UINT64_C(69140480), // SYNCI
UINT64_C(1107296256), // SYNCI_MM
UINT64_C(1098907648), // SYNCI_MMR6
UINT64_C(27516), // SYNC_MM
UINT64_C(27516), // SYNC_MMR6
UINT64_C(12), // SYSCALL
UINT64_C(35708), // SYSCALL_MM
UINT64_C(25728), // Save16
UINT64_C(25728), // SaveX16
UINT64_C(4026580992), // SbRxRyOffMemX16
UINT64_C(59537), // SebRx16
UINT64_C(59569), // SehRx16
UINT64_C(4026583040), // ShRxRyOffMemX16
UINT64_C(4026544128), // SllX16
UINT64_C(59396), // SllvRxRy16
UINT64_C(59394), // SltRxRy16
UINT64_C(20480), // SltiRxImm16
UINT64_C(4026552320), // SltiRxImmX16
UINT64_C(22528), // SltiuRxImm16
UINT64_C(4026554368), // SltiuRxImmX16
UINT64_C(59395), // SltuRxRy16
UINT64_C(4026544131), // SraX16
UINT64_C(59399), // SravRxRy16
UINT64_C(4026544130), // SrlX16
UINT64_C(59398), // SrlvRxRy16
UINT64_C(57347), // SubuRxRyRz16
UINT64_C(4026587136), // SwRxRyOffMemX16
UINT64_C(4026585088), // SwRxSpImmX16
UINT64_C(52), // TEQ
UINT64_C(67895296), // TEQI
UINT64_C(1103101952), // TEQI_MM
UINT64_C(60), // TEQ_MM
UINT64_C(48), // TGE
UINT64_C(67633152), // TGEI
UINT64_C(67698688), // TGEIU
UINT64_C(1096810496), // TGEIU_MM
UINT64_C(1092616192), // TGEI_MM
UINT64_C(49), // TGEU
UINT64_C(1084), // TGEU_MM
UINT64_C(572), // TGE_MM
UINT64_C(1107296267), // TLBGINV
UINT64_C(1107296268), // TLBGINVF
UINT64_C(20860), // TLBGINVF_MM
UINT64_C(16764), // TLBGINV_MM
UINT64_C(1107296272), // TLBGP
UINT64_C(380), // TLBGP_MM
UINT64_C(1107296265), // TLBGR
UINT64_C(4476), // TLBGR_MM
UINT64_C(1107296266), // TLBGWI
UINT64_C(8572), // TLBGWI_MM
UINT64_C(1107296270), // TLBGWR
UINT64_C(12668), // TLBGWR_MM
UINT64_C(1107296259), // TLBINV
UINT64_C(1107296260), // TLBINVF
UINT64_C(21372), // TLBINVF_MMR6
UINT64_C(17276), // TLBINV_MMR6
UINT64_C(1107296264), // TLBP
UINT64_C(892), // TLBP_MM
UINT64_C(1107296257), // TLBR
UINT64_C(4988), // TLBR_MM
UINT64_C(1107296258), // TLBWI
UINT64_C(9084), // TLBWI_MM
UINT64_C(1107296262), // TLBWR
UINT64_C(13180), // TLBWR_MM
UINT64_C(50), // TLT
UINT64_C(67764224), // TLTI
UINT64_C(1094713344), // TLTIU_MM
UINT64_C(1090519040), // TLTI_MM
UINT64_C(51), // TLTU
UINT64_C(2620), // TLTU_MM
UINT64_C(2108), // TLT_MM
UINT64_C(54), // TNE
UINT64_C(68026368), // TNEI
UINT64_C(1098907648), // TNEI_MM
UINT64_C(3132), // TNE_MM
UINT64_C(1176502281), // TRUNC_L_D64
UINT64_C(1409311547), // TRUNC_L_D_MMR6
UINT64_C(1174405129), // TRUNC_L_S
UINT64_C(1409295163), // TRUNC_L_S_MMR6
UINT64_C(1176502285), // TRUNC_W_D32
UINT64_C(1176502285), // TRUNC_W_D64
UINT64_C(1409313595), // TRUNC_W_D_MMR6
UINT64_C(1409313595), // TRUNC_W_MM
UINT64_C(1174405133), // TRUNC_W_S
UINT64_C(1409297211), // TRUNC_W_S_MM
UINT64_C(1409297211), // TRUNC_W_S_MMR6
UINT64_C(67829760), // TTLTIU
UINT64_C(27), // UDIV
UINT64_C(47932), // UDIV_MM
UINT64_C(1879048209), // V3MULU
UINT64_C(1879048208), // VMM0
UINT64_C(1879048207), // VMULU
UINT64_C(2013265941), // VSHF_B
UINT64_C(2019557397), // VSHF_D
UINT64_C(2015363093), // VSHF_H
UINT64_C(2017460245), // VSHF_W
UINT64_C(1107296288), // WAIT
UINT64_C(37756), // WAIT_MM
UINT64_C(37756), // WAIT_MMR6
UINT64_C(2080376056), // WRDSP
UINT64_C(5756), // WRDSP_MM
UINT64_C(61820), // WRPGPR_MMR6
UINT64_C(2080374944), // WSBH
UINT64_C(31548), // WSBH_MM
UINT64_C(31548), // WSBH_MMR6
UINT64_C(38), // XOR
UINT64_C(17472), // XOR16_MM
UINT64_C(17416), // XOR16_MMR6
UINT64_C(38), // XOR64
UINT64_C(2063597568), // XORI_B
UINT64_C(1879048192), // XORI_MMR6
UINT64_C(784), // XOR_MM
UINT64_C(784), // XOR_MMR6
UINT64_C(2019557406), // XOR_V
UINT64_C(939524096), // XORi
UINT64_C(939524096), // XORi64
UINT64_C(1879048192), // XORi_MM
UINT64_C(59406), // XorRxRxRy16
UINT64_C(2080374793), // YIELD
UINT64_C(0)
};
const unsigned opcode = MI.getOpcode();
uint64_t Value = InstBits[opcode];
uint64_t op = 0;
(void)op; // suppress warning
switch (opcode) {
case Mips::Break16:
case Mips::DERET:
case Mips::DERET_MM:
case Mips::DERET_MMR6:
case Mips::EHB:
case Mips::EHB_MM:
case Mips::EHB_MMR6:
case Mips::ERET:
case Mips::ERETNC:
case Mips::ERETNC_MMR6:
case Mips::ERET_MM:
case Mips::ERET_MMR6:
case Mips::JrRa16:
case Mips::JrcRa16:
case Mips::PAUSE:
case Mips::PAUSE_MM:
case Mips::PAUSE_MMR6:
case Mips::Restore16:
case Mips::RestoreX16:
case Mips::SSNOP:
case Mips::SSNOP_MM:
case Mips::SSNOP_MMR6:
case Mips::Save16:
case Mips::SaveX16:
case Mips::TLBGINV:
case Mips::TLBGINVF:
case Mips::TLBGINVF_MM:
case Mips::TLBGINV_MM:
case Mips::TLBGP:
case Mips::TLBGP_MM:
case Mips::TLBGR:
case Mips::TLBGR_MM:
case Mips::TLBGWI:
case Mips::TLBGWI_MM:
case Mips::TLBGWR:
case Mips::TLBGWR_MM:
case Mips::TLBINV:
case Mips::TLBINVF:
case Mips::TLBINVF_MMR6:
case Mips::TLBINV_MMR6:
case Mips::TLBP:
case Mips::TLBP_MM:
case Mips::TLBR:
case Mips::TLBR_MM:
case Mips::TLBWI:
case Mips::TLBWI_MM:
case Mips::TLBWR:
case Mips::TLBWR_MM:
case Mips::WAIT: {
break;
}
case Mips::MTHLIP:
case Mips::SHILOV: {
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::DPAQX_SA_W_PH:
case Mips::DPAQX_S_W_PH:
case Mips::DPAQ_SA_L_W:
case Mips::DPAQ_S_W_PH:
case Mips::DPAU_H_QBL:
case Mips::DPAU_H_QBR:
case Mips::DPAX_W_PH:
case Mips::DPA_W_PH:
case Mips::DPSQX_SA_W_PH:
case Mips::DPSQX_S_W_PH:
case Mips::DPSQ_SA_L_W:
case Mips::DPSQ_S_W_PH:
case Mips::DPSU_H_QBL:
case Mips::DPSU_H_QBR:
case Mips::DPSX_W_PH:
case Mips::DPS_W_PH:
case Mips::MADDU_DSP:
case Mips::MADD_DSP:
case Mips::MAQ_SA_W_PHL:
case Mips::MAQ_SA_W_PHR:
case Mips::MAQ_S_W_PHL:
case Mips::MAQ_S_W_PHR:
case Mips::MSUBU_DSP:
case Mips::MSUB_DSP:
case Mips::MULSAQ_S_W_PH:
case Mips::MULSA_W_PH:
case Mips::MULTU_DSP:
case Mips::MULT_DSP: {
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::SHILO: {
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 11;
Value |= op;
// op: shift
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(63);
op <<= 20;
Value |= op;
break;
}
case Mips::CACHEE:
case Mips::CACHE_R6:
case Mips::PREFE:
case Mips::PREF_R6: {
// op: addr
op = getMemEncoding(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::SYNCI: {
// op: addr
op = getMemEncoding(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(65535));
break;
}
case Mips::CACHE:
case Mips::PREF: {
// op: addr
op = getMemEncoding(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(65535));
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::LD_B:
case Mips::ST_B: {
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::LBE:
case Mips::LBuE:
case Mips::LHE:
case Mips::LHuE:
case Mips::LLE:
case Mips::LWE:
case Mips::LWLE:
case Mips::LWRE:
case Mips::SBE:
case Mips::SHE:
case Mips::SWE:
case Mips::SWLE:
case Mips::SWRE: {
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::SCE: {
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::LD_H:
case Mips::ST_H: {
// op: addr
op = getMemEncoding<1>(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::LD_W:
case Mips::ST_W: {
// op: addr
op = getMemEncoding<2>(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::LD_D:
case Mips::ST_D: {
// op: addr
op = getMemEncoding<3>(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::CACHE_MM:
case Mips::CACHE_MMR6:
case Mips::PREF_MM:
case Mips::PREF_MMR6: {
// op: addr
op = getMemEncodingMMImm12(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(4095));
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::SYNCI_MM:
case Mips::SYNCI_MMR6: {
// op: addr
op = getMemEncodingMMImm16(MI, 0, Fixups, STI);
op &= UINT64_C(2097151);
Value |= op;
break;
}
case Mips::LBU_MMR6:
case Mips::LB_MMR6: {
// op: addr
op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
op &= UINT64_C(2097151);
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::CACHEE_MM:
case Mips::PREFE_MM: {
// op: addr
op = getMemEncodingMMImm9(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(511));
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::HYPCALL: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(1023);
op <<= 11;
Value |= op;
break;
}
case Mips::HYPCALL_MM:
case Mips::SDBBP_MM:
case Mips::SDBBP_MMR6:
case Mips::SYSCALL_MM:
case Mips::WAIT_MM:
case Mips::WAIT_MMR6: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(1023);
op <<= 16;
Value |= op;
break;
}
case Mips::SDBBP:
case Mips::SDBBP_R6:
case Mips::SYSCALL: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(1048575);
op <<= 6;
Value |= op;
break;
}
case Mips::BREAK16_MM:
case Mips::SDBBP16_MM: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(15);
Value |= op;
break;
}
case Mips::BREAK16_MMR6:
case Mips::SDBBP16_MMR6: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(15);
op <<= 6;
Value |= op;
break;
}
case Mips::SIGRIE: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::SIGRIE_MMR6: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(65535);
op <<= 6;
Value |= op;
break;
}
case Mips::BREAK:
case Mips::BREAK_MM:
case Mips::BREAK_MMR6: {
// op: code_1
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(1023);
op <<= 16;
Value |= op;
// op: code_2
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(1023);
op <<= 6;
Value |= op;
break;
}
case Mips::BC2EQZ:
case Mips::BC2NEZ: {
// op: ct
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::MOVEP_MMR6: {
// op: dst_regs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rt
op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
// op: rs
op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(4)) << 1;
Value |= (op & UINT64_C(3));
break;
}
case Mips::MOVEP_MM: {
// op: dst_regs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rt
op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
// op: rs
op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
op &= UINT64_C(7);
op <<= 1;
Value |= op;
break;
}
case Mips::BC1F:
case Mips::BC1FL:
case Mips::BC1T:
case Mips::BC1TL: {
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 18;
Value |= op;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BC1F_MM:
case Mips::BC1T_MM: {
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 18;
Value |= op;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::LUXC1_MM:
case Mips::LWXC1_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::MOVN_I_D32_MM:
case Mips::MOVN_I_S_MM:
case Mips::MOVZ_I_D32_MM:
case Mips::MOVZ_I_S_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::CEIL_W_MM:
case Mips::CEIL_W_S_MM:
case Mips::CVT_D32_S_MM:
case Mips::CVT_D32_W_MM:
case Mips::CVT_D64_S_MM:
case Mips::CVT_D64_W_MM:
case Mips::CVT_L_D64_MM:
case Mips::CVT_L_S_MM:
case Mips::CVT_S_D32_MM:
case Mips::CVT_S_D64_MM:
case Mips::CVT_S_W_MM:
case Mips::CVT_W_D32_MM:
case Mips::CVT_W_D64_MM:
case Mips::CVT_W_S_MM:
case Mips::FABS_D32_MM:
case Mips::FABS_D64_MM:
case Mips::FABS_S_MM:
case Mips::FLOOR_W_MM:
case Mips::FLOOR_W_S_MM:
case Mips::FMOV_D32_MM:
case Mips::FMOV_D64_MM:
case Mips::FMOV_S_MM:
case Mips::FNEG_D32_MM:
case Mips::FNEG_D64_MM:
case Mips::FNEG_S_MM:
case Mips::FSQRT_D32_MM:
case Mips::FSQRT_D64_MM:
case Mips::FSQRT_S_MM:
case Mips::RECIP_D32_MM:
case Mips::RECIP_D64_MM:
case Mips::RECIP_S_MM:
case Mips::ROUND_W_MM:
case Mips::ROUND_W_S_MM:
case Mips::RSQRT_D32_MM:
case Mips::RSQRT_D64_MM:
case Mips::RSQRT_S_MM:
case Mips::TRUNC_W_MM:
case Mips::TRUNC_W_S_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::MOVF_D32_MM:
case Mips::MOVF_S_MM:
case Mips::MOVT_D32_MM:
case Mips::MOVT_S_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 13;
Value |= op;
break;
}
case Mips::LDXC1:
case Mips::LDXC164:
case Mips::LUXC1:
case Mips::LUXC164:
case Mips::LWXC1: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::MADD_D32:
case Mips::MADD_D64:
case Mips::MADD_S:
case Mips::MSUB_D32:
case Mips::MSUB_D64:
case Mips::MSUB_S:
case Mips::NMADD_D32:
case Mips::NMADD_D64:
case Mips::NMADD_S:
case Mips::NMSUB_D32:
case Mips::NMSUB_D64:
case Mips::NMSUB_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: fr
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::CEIL_L_D64:
case Mips::CEIL_L_S:
case Mips::CEIL_W_D32:
case Mips::CEIL_W_D64:
case Mips::CEIL_W_S:
case Mips::CVT_D32_S:
case Mips::CVT_D32_W:
case Mips::CVT_D64_L:
case Mips::CVT_D64_S:
case Mips::CVT_D64_W:
case Mips::CVT_L_D64:
case Mips::CVT_L_S:
case Mips::CVT_S_D32:
case Mips::CVT_S_D64:
case Mips::CVT_S_L:
case Mips::CVT_S_PL64:
case Mips::CVT_S_PU64:
case Mips::CVT_S_W:
case Mips::CVT_W_D32:
case Mips::CVT_W_D64:
case Mips::CVT_W_S:
case Mips::FABS_D32:
case Mips::FABS_D64:
case Mips::FABS_S:
case Mips::FLOOR_L_D64:
case Mips::FLOOR_L_S:
case Mips::FLOOR_W_D32:
case Mips::FLOOR_W_D64:
case Mips::FLOOR_W_S:
case Mips::FMOV_D32:
case Mips::FMOV_D64:
case Mips::FMOV_S:
case Mips::FNEG_D32:
case Mips::FNEG_D64:
case Mips::FNEG_S:
case Mips::FSQRT_D32:
case Mips::FSQRT_D64:
case Mips::FSQRT_S:
case Mips::RECIP_D32:
case Mips::RECIP_D64:
case Mips::RECIP_S:
case Mips::ROUND_L_D64:
case Mips::ROUND_L_S:
case Mips::ROUND_W_D32:
case Mips::ROUND_W_D64:
case Mips::ROUND_W_S:
case Mips::RSQRT_D32:
case Mips::RSQRT_D64:
case Mips::RSQRT_S:
case Mips::TRUNC_L_D64:
case Mips::TRUNC_L_S:
case Mips::TRUNC_W_D32:
case Mips::TRUNC_W_D64:
case Mips::TRUNC_W_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::MOVF_D32:
case Mips::MOVF_D64:
case Mips::MOVF_S:
case Mips::MOVT_D32:
case Mips::MOVT_D64:
case Mips::MOVT_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 18;
Value |= op;
break;
}
case Mips::CMP_EQ_D:
case Mips::CMP_EQ_S:
case Mips::CMP_F_D:
case Mips::CMP_F_S:
case Mips::CMP_LE_D:
case Mips::CMP_LE_S:
case Mips::CMP_LT_D:
case Mips::CMP_LT_S:
case Mips::CMP_SAF_D:
case Mips::CMP_SAF_S:
case Mips::CMP_SEQ_D:
case Mips::CMP_SEQ_S:
case Mips::CMP_SLE_D:
case Mips::CMP_SLE_S:
case Mips::CMP_SLT_D:
case Mips::CMP_SLT_S:
case Mips::CMP_SUEQ_D:
case Mips::CMP_SUEQ_S:
case Mips::CMP_SULE_D:
case Mips::CMP_SULE_S:
case Mips::CMP_SULT_D:
case Mips::CMP_SULT_S:
case Mips::CMP_SUN_D:
case Mips::CMP_SUN_S:
case Mips::CMP_UEQ_D:
case Mips::CMP_UEQ_S:
case Mips::CMP_ULE_D:
case Mips::CMP_ULE_S:
case Mips::CMP_ULT_D:
case Mips::CMP_ULT_S:
case Mips::CMP_UN_D:
case Mips::CMP_UN_S:
case Mips::CVT_PS_S64:
case Mips::FADD_D32:
case Mips::FADD_D64:
case Mips::FADD_S:
case Mips::FDIV_D32:
case Mips::FDIV_D64:
case Mips::FDIV_S:
case Mips::FMUL_D32:
case Mips::FMUL_D64:
case Mips::FMUL_S:
case Mips::FSUB_D32:
case Mips::FSUB_D64:
case Mips::FSUB_S:
case Mips::PLL_PS64:
case Mips::PLU_PS64: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::MOVN_I64_D64:
case Mips::MOVN_I64_S:
case Mips::MOVN_I_D32:
case Mips::MOVN_I_D64:
case Mips::MOVN_I_S:
case Mips::MOVZ_I64_D64:
case Mips::MOVZ_I64_S:
case Mips::MOVZ_I_D32:
case Mips::MOVZ_I_D64:
case Mips::MOVZ_I_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::SUXC1_MM:
case Mips::SWXC1_MM: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::SDXC1:
case Mips::SDXC164:
case Mips::SUXC1:
case Mips::SUXC164:
case Mips::SWXC1: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::FCMP_D32:
case Mips::FCMP_D64:
case Mips::FCMP_S32: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: cond
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
Value |= op;
break;
}
case Mips::FCMP_D32_MM:
case Mips::FCMP_S32_MM: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: cond
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 6;
Value |= op;
break;
}
case Mips::CLASS_D:
case Mips::CLASS_S:
case Mips::RINT_D:
case Mips::RINT_S: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::C_EQ_D32:
case Mips::C_EQ_D64:
case Mips::C_EQ_S:
case Mips::C_F_D32:
case Mips::C_F_D64:
case Mips::C_F_S:
case Mips::C_LE_D32:
case Mips::C_LE_D64:
case Mips::C_LE_S:
case Mips::C_LT_D32:
case Mips::C_LT_D64:
case Mips::C_LT_S:
case Mips::C_NGE_D32:
case Mips::C_NGE_D64:
case Mips::C_NGE_S:
case Mips::C_NGLE_D32:
case Mips::C_NGLE_D64:
case Mips::C_NGLE_S:
case Mips::C_NGL_D32:
case Mips::C_NGL_D64:
case Mips::C_NGL_S:
case Mips::C_NGT_D32:
case Mips::C_NGT_D64:
case Mips::C_NGT_S:
case Mips::C_OLE_D32:
case Mips::C_OLE_D64:
case Mips::C_OLE_S:
case Mips::C_OLT_D32:
case Mips::C_OLT_D64:
case Mips::C_OLT_S:
case Mips::C_SEQ_D32:
case Mips::C_SEQ_D64:
case Mips::C_SEQ_S:
case Mips::C_SF_D32:
case Mips::C_SF_D64:
case Mips::C_SF_S:
case Mips::C_UEQ_D32:
case Mips::C_UEQ_D64:
case Mips::C_UEQ_S:
case Mips::C_ULE_D32:
case Mips::C_ULE_D64:
case Mips::C_ULE_S:
case Mips::C_ULT_D32:
case Mips::C_ULT_D64:
case Mips::C_ULT_S:
case Mips::C_UN_D32:
case Mips::C_UN_D64:
case Mips::C_UN_S: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
break;
}
case Mips::C_EQ_D32_MM:
case Mips::C_EQ_D64_MM:
case Mips::C_EQ_S_MM:
case Mips::C_F_D32_MM:
case Mips::C_F_D64_MM:
case Mips::C_F_S_MM:
case Mips::C_LE_D32_MM:
case Mips::C_LE_D64_MM:
case Mips::C_LE_S_MM:
case Mips::C_LT_D32_MM:
case Mips::C_LT_D64_MM:
case Mips::C_LT_S_MM:
case Mips::C_NGE_D32_MM:
case Mips::C_NGE_D64_MM:
case Mips::C_NGE_S_MM:
case Mips::C_NGLE_D32_MM:
case Mips::C_NGLE_D64_MM:
case Mips::C_NGLE_S_MM:
case Mips::C_NGL_D32_MM:
case Mips::C_NGL_D64_MM:
case Mips::C_NGL_S_MM:
case Mips::C_NGT_D32_MM:
case Mips::C_NGT_D64_MM:
case Mips::C_NGT_S_MM:
case Mips::C_OLE_D32_MM:
case Mips::C_OLE_D64_MM:
case Mips::C_OLE_S_MM:
case Mips::C_OLT_D32_MM:
case Mips::C_OLT_D64_MM:
case Mips::C_OLT_S_MM:
case Mips::C_SEQ_D32_MM:
case Mips::C_SEQ_D64_MM:
case Mips::C_SEQ_S_MM:
case Mips::C_SF_D32_MM:
case Mips::C_SF_D64_MM:
case Mips::C_SF_S_MM:
case Mips::C_UEQ_D32_MM:
case Mips::C_UEQ_D64_MM:
case Mips::C_UEQ_S_MM:
case Mips::C_ULE_D32_MM:
case Mips::C_ULE_D64_MM:
case Mips::C_ULE_S_MM:
case Mips::C_ULT_D32_MM:
case Mips::C_ULT_D64_MM:
case Mips::C_ULT_S_MM:
case Mips::C_UN_D32_MM:
case Mips::C_UN_D64_MM:
case Mips::C_UN_S_MM: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 13;
Value |= op;
break;
}
case Mips::CLASS_D_MMR6:
case Mips::CLASS_S_MMR6:
case Mips::RINT_D_MMR6:
case Mips::RINT_S_MMR6: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::BC1EQZ:
case Mips::BC1NEZ: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::LDC1_D64_MMR6:
case Mips::SDC1_D64_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
op &= UINT64_C(2097151);
Value |= op;
break;
}
case Mips::CEIL_L_D_MMR6:
case Mips::CEIL_L_S_MMR6:
case Mips::CEIL_W_D_MMR6:
case Mips::CEIL_W_S_MMR6:
case Mips::CVT_D_L_MMR6:
case Mips::CVT_L_D_MMR6:
case Mips::CVT_L_S_MMR6:
case Mips::CVT_S_L_MMR6:
case Mips::CVT_S_W_MMR6:
case Mips::CVT_W_S_MMR6:
case Mips::FLOOR_L_D_MMR6:
case Mips::FLOOR_L_S_MMR6:
case Mips::FLOOR_W_D_MMR6:
case Mips::FLOOR_W_S_MMR6:
case Mips::FMOV_D_MMR6:
case Mips::FMOV_S_MMR6:
case Mips::FNEG_S_MMR6:
case Mips::ROUND_L_D_MMR6:
case Mips::ROUND_L_S_MMR6:
case Mips::ROUND_W_D_MMR6:
case Mips::ROUND_W_S_MMR6:
case Mips::TRUNC_L_D_MMR6:
case Mips::TRUNC_L_S_MMR6:
case Mips::TRUNC_W_D_MMR6:
case Mips::TRUNC_W_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::FADD_S_MMR6:
case Mips::FDIV_S_MMR6:
case Mips::FMUL_S_MMR6:
case Mips::FSUB_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::MAXA_D:
case Mips::MAXA_S:
case Mips::MAX_D:
case Mips::MAX_S:
case Mips::MINA_D:
case Mips::MINA_S:
case Mips::MIN_D:
case Mips::MIN_S:
case Mips::SELEQZ_D:
case Mips::SELEQZ_S:
case Mips::SELNEZ_D:
case Mips::SELNEZ_S: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::CMP_AF_D_MMR6:
case Mips::CMP_AF_S_MMR6:
case Mips::CMP_EQ_D_MMR6:
case Mips::CMP_EQ_S_MMR6:
case Mips::CMP_LE_D_MMR6:
case Mips::CMP_LE_S_MMR6:
case Mips::CMP_LT_D_MMR6:
case Mips::CMP_LT_S_MMR6:
case Mips::CMP_SAF_D_MMR6:
case Mips::CMP_SAF_S_MMR6:
case Mips::CMP_SEQ_D_MMR6:
case Mips::CMP_SEQ_S_MMR6:
case Mips::CMP_SLE_D_MMR6:
case Mips::CMP_SLE_S_MMR6:
case Mips::CMP_SLT_D_MMR6:
case Mips::CMP_SLT_S_MMR6:
case Mips::CMP_SUEQ_D_MMR6:
case Mips::CMP_SUEQ_S_MMR6:
case Mips::CMP_SULE_D_MMR6:
case Mips::CMP_SULE_S_MMR6:
case Mips::CMP_SULT_D_MMR6:
case Mips::CMP_SULT_S_MMR6:
case Mips::CMP_SUN_D_MMR6:
case Mips::CMP_SUN_S_MMR6:
case Mips::CMP_UEQ_D_MMR6:
case Mips::CMP_UEQ_S_MMR6:
case Mips::CMP_ULE_D_MMR6:
case Mips::CMP_ULE_S_MMR6:
case Mips::CMP_ULT_D_MMR6:
case Mips::CMP_ULT_S_MMR6:
case Mips::CMP_UN_D_MMR6:
case Mips::CMP_UN_S_MMR6:
case Mips::FADD_D32_MM:
case Mips::FADD_D64_MM:
case Mips::FADD_S_MM:
case Mips::FDIV_D32_MM:
case Mips::FDIV_D64_MM:
case Mips::FDIV_S_MM:
case Mips::FMUL_D32_MM:
case Mips::FMUL_D64_MM:
case Mips::FMUL_S_MM:
case Mips::FSUB_D32_MM:
case Mips::FSUB_D64_MM:
case Mips::FSUB_S_MM:
case Mips::MAXA_D_MMR6:
case Mips::MAXA_S_MMR6:
case Mips::MAX_D_MMR6:
case Mips::MAX_S_MMR6:
case Mips::MINA_D_MMR6:
case Mips::MINA_S_MMR6:
case Mips::MIN_D_MMR6:
case Mips::MIN_S_MMR6:
case Mips::SELEQZ_D_MMR6:
case Mips::SELEQZ_S_MMR6:
case Mips::SELNEZ_D_MMR6:
case Mips::SELNEZ_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::MADDF_D:
case Mips::MADDF_S:
case Mips::MSUBF_D:
case Mips::MSUBF_S:
case Mips::SEL_D:
case Mips::SEL_S: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::MADDF_D_MMR6:
case Mips::MADDF_S_MMR6:
case Mips::MSUBF_D_MMR6:
case Mips::MSUBF_S_MMR6:
case Mips::SEL_D_MMR6:
case Mips::SEL_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::MADD_D32_MM:
case Mips::MADD_S_MM:
case Mips::MSUB_D32_MM:
case Mips::MSUB_S_MM:
case Mips::NMADD_D32_MM:
case Mips::NMADD_S_MM:
case Mips::NMSUB_D32_MM:
case Mips::NMSUB_S_MM: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: fr
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::ADDVI_B:
case Mips::ADDVI_D:
case Mips::ADDVI_H:
case Mips::ADDVI_W:
case Mips::CEQI_B:
case Mips::CEQI_D:
case Mips::CEQI_H:
case Mips::CEQI_W:
case Mips::CLEI_S_B:
case Mips::CLEI_S_D:
case Mips::CLEI_S_H:
case Mips::CLEI_S_W:
case Mips::CLEI_U_B:
case Mips::CLEI_U_D:
case Mips::CLEI_U_H:
case Mips::CLEI_U_W:
case Mips::CLTI_S_B:
case Mips::CLTI_S_D:
case Mips::CLTI_S_H:
case Mips::CLTI_S_W:
case Mips::CLTI_U_B:
case Mips::CLTI_U_D:
case Mips::CLTI_U_H:
case Mips::CLTI_U_W:
case Mips::MAXI_S_B:
case Mips::MAXI_S_D:
case Mips::MAXI_S_H:
case Mips::MAXI_S_W:
case Mips::MAXI_U_B:
case Mips::MAXI_U_D:
case Mips::MAXI_U_H:
case Mips::MAXI_U_W:
case Mips::MINI_S_B:
case Mips::MINI_S_D:
case Mips::MINI_S_H:
case Mips::MINI_S_W:
case Mips::MINI_U_B:
case Mips::MINI_U_D:
case Mips::MINI_U_H:
case Mips::MINI_U_W:
case Mips::SUBVI_B:
case Mips::SUBVI_D:
case Mips::SUBVI_H:
case Mips::SUBVI_W: {
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::ADDIUSP_MM: {
// op: imm
op = getSImm9AddiuspValue(MI, 0, Fixups, STI);
op &= UINT64_C(511);
op <<= 1;
Value |= op;
break;
}
case Mips::JRADDIUSP: {
// op: imm
op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
op &= UINT64_C(31);
Value |= op;
break;
}
case Mips::JRCADDIUSP_MMR6: {
// op: imm
op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
op &= UINT64_C(31);
op <<= 5;
Value |= op;
break;
}
case Mips::Bimm16: {
// op: imm11
op = getBranchTargetOpValue(MI, 0, Fixups, STI);
op &= UINT64_C(2047);
Value |= op;
break;
}
case Mips::AddiuRxRyOffMemX16: {
// op: imm15
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2032)) << 16;
Value |= (op & UINT64_C(30720)) << 5;
Value |= (op & UINT64_C(15));
// op: rx
op = getMemEncoding(MI, 1, Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 5;
Value |= op;
break;
}
case Mips::BimmX16: {
// op: imm16
op = getBranchTargetOpValue(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= (op & UINT64_C(31));
break;
}
case Mips::AddiuSpImmX16:
case Mips::BteqzX16:
case Mips::BtnezX16: {
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= (op & UINT64_C(31));
break;
}
case Mips::AddiuRxImmX16:
case Mips::AddiuRxPcImmX16:
case Mips::AddiuRxRxImmX16:
case Mips::BeqzRxImmX16:
case Mips::BnezRxImmX16:
case Mips::CmpiRxImmX16:
case Mips::LiRxImmAlignX16:
case Mips::LiRxImmX16:
case Mips::LwRxPcTcpX16:
case Mips::SltiRxImmX16:
case Mips::SltiuRxImmX16: {
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= (op & UINT64_C(31));
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
break;
}
case Mips::LbRxRyOffMemX16:
case Mips::LbuRxRyOffMemX16:
case Mips::LhRxRyOffMemX16:
case Mips::LhuRxRyOffMemX16:
case Mips::LwRxRyOffMemX16:
case Mips::LwRxSpImmX16:
case Mips::SbRxRyOffMemX16:
case Mips::ShRxRyOffMemX16:
case Mips::SwRxRyOffMemX16:
case Mips::SwRxSpImmX16: {
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= (op & UINT64_C(31));
// op: rx
op = getMemEncoding(MI, 1, Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 5;
Value |= op;
break;
}
case Mips::Jal16:
case Mips::JalB16: {
// op: imm26
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(65011712)) >> 5;
Value |= (op & UINT64_C(65535));
break;
}
case Mips::AddiuSpImm16:
case Mips::Bteqz16:
case Mips::Btnez16: {
// op: imm8
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(255);
Value |= op;
break;
}
case Mips::PREFX_MM: {
// op: index
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::LBUX_MM:
case Mips::LHX_MM:
case Mips::LWX_MM: {
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::COPY_S_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(1);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SPLATI_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(1);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSVE_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(1);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::COPY_S_B:
case Mips::COPY_U_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SPLATI_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSVE_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::COPY_S_W:
case Mips::COPY_U_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(3);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SPLATI_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(3);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSVE_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(3);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::COPY_S_H:
case Mips::COPY_U_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SPLATI_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSVE_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSERT_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(1);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SLDI_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(1);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSERT_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(15);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SLDI_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(15);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSERT_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(3);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SLDI_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(3);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSERT_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(7);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SLDI_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(7);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::BALC:
case Mips::BC: {
// op: offset
op = getBranchTarget26OpValue(MI, 0, Fixups, STI);
op &= UINT64_C(67108863);
Value |= op;
break;
}
case Mips::BALC_MMR6:
case Mips::BC_MMR6: {
// op: offset
op = getBranchTarget26OpValueMM(MI, 0, Fixups, STI);
op &= UINT64_C(67108863);
Value |= op;
break;
}
case Mips::BAL:
case Mips::BPOSGE32: {
// op: offset
op = getBranchTargetOpValue(MI, 0, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BNZ_B:
case Mips::BNZ_D:
case Mips::BNZ_H:
case Mips::BNZ_V:
case Mips::BNZ_W:
case Mips::BZ_B:
case Mips::BZ_D:
case Mips::BZ_H:
case Mips::BZ_V:
case Mips::BZ_W: {
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
// op: wt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::BPOSGE32C_MMR3: {
// op: offset
op = getBranchTargetOpValue1SImm16(MI, 0, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BPOSGE32_MM: {
// op: offset
op = getBranchTargetOpValueMM(MI, 0, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::B16_MM:
case Mips::BC16_MMR6: {
// op: offset
op = getBranchTargetOpValueMMPC10(MI, 0, Fixups, STI);
op &= UINT64_C(1023);
Value |= op;
break;
}
case Mips::Move32R16: {
// op: r32
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
Value |= (op & UINT64_C(24));
// op: rz
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
Value |= op;
break;
}
case Mips::CLO:
case Mips::CLZ:
case Mips::DCLO:
case Mips::DCLZ: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::MFHI16_MM:
case Mips::MFLO16_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
Value |= op;
break;
}
case Mips::MFHI:
case Mips::MFHI64:
case Mips::MFLO:
case Mips::MFLO64: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::MFHI_DSP:
case Mips::MFLO_DSP: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(3);
op <<= 21;
Value |= op;
break;
}
case Mips::LWXS_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::LBUX:
case Mips::LHX:
case Mips::LWX: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::REPL_PH:
case Mips::REPL_PH_MM:
case Mips::REPL_QB: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(1023);
op <<= 16;
Value |= op;
break;
}
case Mips::RDDSP: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: mask
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(1023);
op <<= 16;
Value |= op;
break;
}
case Mips::ADDQH_PH_MMR2:
case Mips::ADDQH_R_PH_MMR2:
case Mips::ADDQH_R_W_MMR2:
case Mips::ADDQH_W_MMR2:
case Mips::ADDQ_PH_MM:
case Mips::ADDQ_S_PH_MM:
case Mips::ADDQ_S_W_MM:
case Mips::ADDSC_MM:
case Mips::ADDUH_QB_MMR2:
case Mips::ADDUH_R_QB_MMR2:
case Mips::ADDU_PH_MMR2:
case Mips::ADDU_QB_MM:
case Mips::ADDU_S_PH_MMR2:
case Mips::ADDU_S_QB_MM:
case Mips::ADDWC_MM:
case Mips::CMPGDU_EQ_QB_MMR2:
case Mips::CMPGDU_LE_QB_MMR2:
case Mips::CMPGDU_LT_QB_MMR2:
case Mips::MODSUB_MM:
case Mips::MULEQ_S_W_PHL_MM:
case Mips::MULEQ_S_W_PHR_MM:
case Mips::MULEU_S_PH_QBL_MM:
case Mips::MULEU_S_PH_QBR_MM:
case Mips::MULQ_RS_PH_MM:
case Mips::MULQ_RS_W_MMR2:
case Mips::MULQ_S_PH_MMR2:
case Mips::MULQ_S_W_MMR2:
case Mips::MUL_PH_MMR2:
case Mips::MUL_S_PH_MMR2:
case Mips::PACKRL_PH_MM:
case Mips::PICK_PH_MM:
case Mips::PICK_QB_MM:
case Mips::PRECRQU_S_QB_PH_MM:
case Mips::PRECRQ_PH_W_MM:
case Mips::PRECRQ_QB_PH_MM:
case Mips::PRECRQ_RS_PH_W_MM:
case Mips::PRECR_QB_PH_MMR2:
case Mips::SELEQZ_MMR6:
case Mips::SELNEZ_MMR6:
case Mips::SUBQH_PH_MMR2:
case Mips::SUBQH_R_PH_MMR2:
case Mips::SUBQH_R_W_MMR2:
case Mips::SUBQH_W_MMR2:
case Mips::SUBQ_PH_MM:
case Mips::SUBQ_S_PH_MM:
case Mips::SUBQ_S_W_MM:
case Mips::SUBUH_QB_MMR2:
case Mips::SUBUH_R_QB_MMR2:
case Mips::SUBU_PH_MMR2:
case Mips::SUBU_QB_MM:
case Mips::SUBU_S_PH_MMR2:
case Mips::SUBU_S_QB_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::LSA_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm2
op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
op &= UINT64_C(3);
op <<= 9;
Value |= op;
break;
}
case Mips::CLO_R6:
case Mips::CLZ_R6:
case Mips::DCLO_R6:
case Mips::DCLZ_R6:
case Mips::DPOP:
case Mips::JALR:
case Mips::JALR64:
case Mips::JALR_HB:
case Mips::JALR_HB64:
case Mips::POP:
case Mips::RADDU_W_QB: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::MOVF_I:
case Mips::MOVF_I64:
case Mips::MOVT_I:
case Mips::MOVT_I64: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 18;
Value |= op;
break;
}
case Mips::ADD:
case Mips::ADDQH_PH:
case Mips::ADDQH_R_PH:
case Mips::ADDQH_R_W:
case Mips::ADDQH_W:
case Mips::ADDQ_PH:
case Mips::ADDQ_S_PH:
case Mips::ADDQ_S_W:
case Mips::ADDSC:
case Mips::ADDUH_QB:
case Mips::ADDUH_R_QB:
case Mips::ADDU_PH:
case Mips::ADDU_QB:
case Mips::ADDU_S_PH:
case Mips::ADDU_S_QB:
case Mips::ADDWC:
case Mips::ADDu:
case Mips::AND:
case Mips::AND64:
case Mips::BADDu:
case Mips::DADD:
case Mips::DADDu:
case Mips::DDIV:
case Mips::DDIVU:
case Mips::DIV:
case Mips::DIVU:
case Mips::DMOD:
case Mips::DMODU:
case Mips::DMUH:
case Mips::DMUHU:
case Mips::DMUL:
case Mips::DMULU:
case Mips::DMUL_R6:
case Mips::DSUB:
case Mips::DSUBu:
case Mips::MOD:
case Mips::MODSUB:
case Mips::MODU:
case Mips::MOVN_I64_I:
case Mips::MOVN_I64_I64:
case Mips::MOVN_I_I:
case Mips::MOVN_I_I64:
case Mips::MOVZ_I64_I:
case Mips::MOVZ_I64_I64:
case Mips::MOVZ_I_I:
case Mips::MOVZ_I_I64:
case Mips::MUH:
case Mips::MUHU:
case Mips::MUL:
case Mips::MULEQ_S_W_PHL:
case Mips::MULEQ_S_W_PHR:
case Mips::MULEU_S_PH_QBL:
case Mips::MULEU_S_PH_QBR:
case Mips::MULQ_RS_PH:
case Mips::MULQ_RS_W:
case Mips::MULQ_S_PH:
case Mips::MULQ_S_W:
case Mips::MULU:
case Mips::MUL_PH:
case Mips::MUL_R6:
case Mips::MUL_S_PH:
case Mips::NOR:
case Mips::NOR64:
case Mips::OR:
case Mips::OR64:
case Mips::SELEQZ:
case Mips::SELEQZ64:
case Mips::SELNEZ:
case Mips::SELNEZ64:
case Mips::SEQ:
case Mips::SLT:
case Mips::SLT64:
case Mips::SLTu:
case Mips::SLTu64:
case Mips::SNE:
case Mips::SUB:
case Mips::SUBQH_PH:
case Mips::SUBQH_R_PH:
case Mips::SUBQH_R_W:
case Mips::SUBQH_W:
case Mips::SUBQ_PH:
case Mips::SUBQ_S_PH:
case Mips::SUBQ_S_W:
case Mips::SUBUH_QB:
case Mips::SUBUH_R_QB:
case Mips::SUBU_PH:
case Mips::SUBU_QB:
case Mips::SUBU_S_PH:
case Mips::SUBU_S_QB:
case Mips::SUBu:
case Mips::V3MULU:
case Mips::VMM0:
case Mips::VMULU:
case Mips::XOR:
case Mips::XOR64: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::ALIGN: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(3);
op <<= 6;
Value |= op;
break;
}
case Mips::ALIGN_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(3);
op <<= 9;
Value |= op;
break;
}
case Mips::DALIGN: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(7);
op <<= 6;
Value |= op;
break;
}
case Mips::DLSA_R6:
case Mips::LSA_R6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: imm2
op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
op &= UINT64_C(3);
op <<= 6;
Value |= op;
break;
}
case Mips::SHLLV_PH_MM:
case Mips::SHLLV_QB_MM:
case Mips::SHLLV_S_PH_MM:
case Mips::SHLLV_S_W_MM:
case Mips::SHRAV_PH_MM:
case Mips::SHRAV_QB_MMR2:
case Mips::SHRAV_R_PH_MM:
case Mips::SHRAV_R_QB_MMR2:
case Mips::SHRAV_R_W_MM:
case Mips::SHRLV_PH_MMR2:
case Mips::SHRLV_QB_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::ABSQ_S_PH:
case Mips::ABSQ_S_QB:
case Mips::ABSQ_S_W:
case Mips::BITREV:
case Mips::BITSWAP:
case Mips::DBITSWAP:
case Mips::DSBH:
case Mips::DSHD:
case Mips::DSLL64_32:
case Mips::PRECEQU_PH_QBL:
case Mips::PRECEQU_PH_QBLA:
case Mips::PRECEQU_PH_QBR:
case Mips::PRECEQU_PH_QBRA:
case Mips::PRECEQ_W_PHL:
case Mips::PRECEQ_W_PHR:
case Mips::PRECEU_PH_QBL:
case Mips::PRECEU_PH_QBLA:
case Mips::PRECEU_PH_QBR:
case Mips::PRECEU_PH_QBRA:
case Mips::REPLV_PH:
case Mips::REPLV_QB:
case Mips::SEB:
case Mips::SEB64:
case Mips::SEH:
case Mips::SEH64:
case Mips::SLL64_32:
case Mips::SLL64_64:
case Mips::WSBH: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::DROTRV:
case Mips::DSLLV:
case Mips::DSRAV:
case Mips::DSRLV:
case Mips::ROTRV:
case Mips::SLLV:
case Mips::SRAV:
case Mips::SRLV: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::SHLLV_PH:
case Mips::SHLLV_QB:
case Mips::SHLLV_S_PH:
case Mips::SHLLV_S_W:
case Mips::SHLL_PH:
case Mips::SHLL_QB:
case Mips::SHLL_S_PH:
case Mips::SHLL_S_W:
case Mips::SHRAV_PH:
case Mips::SHRAV_QB:
case Mips::SHRAV_R_PH:
case Mips::SHRAV_R_QB:
case Mips::SHRAV_R_W:
case Mips::SHRA_PH:
case Mips::SHRA_QB:
case Mips::SHRA_R_PH:
case Mips::SHRA_R_QB:
case Mips::SHRA_R_W:
case Mips::SHRLV_PH:
case Mips::SHRLV_QB:
case Mips::SHRL_PH:
case Mips::SHRL_QB: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs_sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::DROTR:
case Mips::DROTR32:
case Mips::DSLL:
case Mips::DSLL32:
case Mips::DSRA:
case Mips::DSRA32:
case Mips::DSRL:
case Mips::DSRL32:
case Mips::ROTR:
case Mips::SLL:
case Mips::SRA:
case Mips::SRL: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: shamt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::ROTRV_MM:
case Mips::SLLV_MM:
case Mips::SRAV_MM:
case Mips::SRLV_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::ADDU_MMR6:
case Mips::ADD_MMR6:
case Mips::AND_MMR6:
case Mips::DIVU_MMR6:
case Mips::DIV_MMR6:
case Mips::MODU_MMR6:
case Mips::MOD_MMR6:
case Mips::MUHU_MMR6:
case Mips::MUH_MMR6:
case Mips::MULU_MMR6:
case Mips::MUL_MMR6:
case Mips::NOR_MMR6:
case Mips::OR_MMR6:
case Mips::SUBU_MMR6:
case Mips::SUB_MMR6:
case Mips::XOR_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::MFHI_MM:
case Mips::MFLO_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::BITSWAP_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::CLO_MM:
case Mips::CLZ_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::MOVF_I_MM:
case Mips::MOVT_I_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 13;
Value |= op;
break;
}
case Mips::SEB_MM:
case Mips::SEH_MM:
case Mips::WSBH_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::ROTR_MM:
case Mips::SLL_MM:
case Mips::SLL_MMR6:
case Mips::SRA_MM:
case Mips::SRL_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: shamt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::CFCMSA: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: cs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::LI16_MM:
case Mips::LI16_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(127);
Value |= op;
break;
}
case Mips::ADDIUR1SP_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: imm
op = getUImm6Lsl2Encoding(MI, 1, Fixups, STI);
op &= UINT64_C(63);
op <<= 1;
Value |= op;
break;
}
case Mips::ADDIUR2_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
// op: imm
op = getSImm3Lsa2Value(MI, 2, Fixups, STI);
op &= UINT64_C(7);
op <<= 1;
Value |= op;
break;
}
case Mips::ANDI16_MM:
case Mips::ANDI16_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
// op: imm
op = getUImm4AndValue(MI, 2, Fixups, STI);
op &= UINT64_C(15);
Value |= op;
break;
}
case Mips::SLL16_MM:
case Mips::SLL16_MMR6:
case Mips::SRL16_MM:
case Mips::SRL16_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
// op: shamt
op = getUImm3Mod8Encoding(MI, 2, Fixups, STI);
op &= UINT64_C(7);
op <<= 1;
Value |= op;
break;
}
case Mips::ADDU16_MM:
case Mips::SUBU16_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 1;
Value |= op;
break;
}
case Mips::ADDIUS5_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 5;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 1;
Value |= op;
break;
}
case Mips::JALR16_MM:
case Mips::JALRS16_MM:
case Mips::JR16_MM:
case Mips::JRC16_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
Value |= op;
break;
}
case Mips::DVP_MMR6:
case Mips::EVP_MMR6:
case Mips::JR_MM:
case Mips::MTHI_MM:
case Mips::MTLO_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::MFHI_DSP_MM:
case Mips::MFLO_DSP_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(3);
op <<= 14;
Value |= op;
break;
}
case Mips::TEQI_MM:
case Mips::TGEIU_MM:
case Mips::TGEI_MM:
case Mips::TLTIU_MM:
case Mips::TLTI_MM:
case Mips::TNEI_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BEQZC_MM:
case Mips::BGEZALS_MM:
case Mips::BGEZAL_MM:
case Mips::BGEZ_MM:
case Mips::BGTZ_MM:
case Mips::BLEZ_MM:
case Mips::BLTZALS_MM:
case Mips::BLTZAL_MM:
case Mips::BLTZ_MM:
case Mips::BNEZC_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::MADDU_MM:
case Mips::MADD_MM:
case Mips::MSUBU_MM:
case Mips::MSUB_MM:
case Mips::MULT_MM:
case Mips::MULTu_MM:
case Mips::SDIV_MM:
case Mips::UDIV_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::TEQ_MM:
case Mips::TGEU_MM:
case Mips::TGE_MM:
case Mips::TLTU_MM:
case Mips::TLT_MM:
case Mips::TNE_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: code_
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 12;
Value |= op;
break;
}
case Mips::BEQ_MM:
case Mips::BNE_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: offset
op = getBranchTargetOpValueMM(MI, 2, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::GINVI_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: type
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 9;
Value |= op;
break;
}
case Mips::GINVT_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: type
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(3);
op <<= 9;
Value |= op;
break;
}
case Mips::JR:
case Mips::JR64:
case Mips::JR_HB:
case Mips::JR_HB64:
case Mips::JR_HB64_R6:
case Mips::JR_HB_R6:
case Mips::MTHI:
case Mips::MTHI64:
case Mips::MTLO:
case Mips::MTLO64:
case Mips::MTM0:
case Mips::MTM1:
case Mips::MTM2:
case Mips::MTP0:
case Mips::MTP1:
case Mips::MTP2: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::ALUIPC:
case Mips::AUIPC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::DAHI:
case Mips::DATI: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::LDPC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getSimm18Lsl3Encoding(MI, 1, Fixups, STI);
op &= UINT64_C(262143);
Value |= op;
break;
}
case Mips::ADDIUPC:
case Mips::LWPC:
case Mips::LWUPC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
op &= UINT64_C(524287);
Value |= op;
break;
}
case Mips::TEQI:
case Mips::TGEI:
case Mips::TGEIU:
case Mips::TLTI:
case Mips::TNEI:
case Mips::TTLTIU: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::WRDSP: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: mask
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(1023);
op <<= 11;
Value |= op;
break;
}
case Mips::BEQZC:
case Mips::BEQZC64:
case Mips::BNEZC:
case Mips::BNEZC64: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: offset
op = getBranchTarget21OpValue(MI, 1, Fixups, STI);
op &= UINT64_C(2097151);
Value |= op;
break;
}
case Mips::BEQZC_MMR6:
case Mips::BNEZC_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: offset
op = getBranchTarget21OpValueMM(MI, 1, Fixups, STI);
op &= UINT64_C(2097151);
Value |= op;
break;
}
case Mips::BGEZ:
case Mips::BGEZ64:
case Mips::BGEZAL:
case Mips::BGEZALL:
case Mips::BGEZL:
case Mips::BGTZ:
case Mips::BGTZ64:
case Mips::BGTZL:
case Mips::BLEZ:
case Mips::BLEZ64:
case Mips::BLEZL:
case Mips::BLTZ:
case Mips::BLTZ64:
case Mips::BLTZAL:
case Mips::BLTZALL:
case Mips::BLTZL: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BBIT0:
case Mips::BBIT032:
case Mips::BBIT1:
case Mips::BBIT132: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: p
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValue(MI, 2, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::CMPU_EQ_QB:
case Mips::CMPU_LE_QB:
case Mips::CMPU_LT_QB:
case Mips::CMP_EQ_PH:
case Mips::CMP_LE_PH:
case Mips::CMP_LT_PH:
case Mips::DMULT:
case Mips::DMULTu:
case Mips::DSDIV:
case Mips::DUDIV:
case Mips::MADD:
case Mips::MADDU:
case Mips::MSUB:
case Mips::MSUBU:
case Mips::MULT:
case Mips::MULTu:
case Mips::SDIV:
case Mips::UDIV: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::TEQ:
case Mips::TGE:
case Mips::TGEU:
case Mips::TLT:
case Mips::TLTU:
case Mips::TNE: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: code_
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(1023);
op <<= 6;
Value |= op;
break;
}
case Mips::BEQ:
case Mips::BEQ64:
case Mips::BEQC:
case Mips::BEQC64:
case Mips::BEQL:
case Mips::BGEC:
case Mips::BGEC64:
case Mips::BGEUC:
case Mips::BGEUC64:
case Mips::BLTC:
case Mips::BLTC64:
case Mips::BLTUC:
case Mips::BLTUC64:
case Mips::BNE:
case Mips::BNE64:
case Mips::BNEC:
case Mips::BNEC64:
case Mips::BNEL:
case Mips::BNVC:
case Mips::BOVC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValue(MI, 2, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::FORK: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::GINVI: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: type_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 8;
Value |= op;
break;
}
case Mips::GINVT: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: type_
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(3);
op <<= 8;
Value |= op;
break;
}
case Mips::JALRC16_MMR6:
case Mips::JRC16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 5;
Value |= op;
break;
}
case Mips::ADDIUPC_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 23;
Value |= op;
// op: imm
op = getSimm23Lsl2Encoding(MI, 1, Fixups, STI);
op &= UINT64_C(8388607);
Value |= op;
break;
}
case Mips::BEQZ16_MM:
case Mips::BEQZC16_MMR6:
case Mips::BNEZ16_MM:
case Mips::BNEZC16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: offset
op = getBranchTarget7OpValueMM(MI, 1, Fixups, STI);
op &= UINT64_C(127);
Value |= op;
break;
}
case Mips::MOVE16_MM:
case Mips::MOVE16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 5;
Value |= op;
break;
}
case Mips::CTCMSA: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: cd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::FILL_B:
case Mips::FILL_D:
case Mips::FILL_H:
case Mips::FILL_W: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::MTHI_DSP_MM:
case Mips::MTHLIP_MM:
case Mips::MTLO_DSP_MM:
case Mips::SHILOV_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 14;
Value |= op;
break;
}
case Mips::JALRS_MM:
case Mips::JALR_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::CLO_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::AUI_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::ADDi_MM:
case Mips::ADDiu_MM:
case Mips::ANDi_MM:
case Mips::ORi_MM:
case Mips::XORi_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::MTHI_DSP:
case Mips::MTLO_DSP: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 11;
Value |= op;
break;
}
case Mips::YIELD: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::CLZ_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::AUI:
case Mips::DAUI: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::SEQi:
case Mips::SNEi: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: imm10
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(1023);
op <<= 6;
Value |= op;
break;
}
case Mips::ADDi:
case Mips::ADDiu:
case Mips::ANDi:
case Mips::ANDi64:
case Mips::DADDi:
case Mips::DADDiu:
case Mips::ORi:
case Mips::ORi64:
case Mips::XORi:
case Mips::XORi64: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::PRECR_SRA_PH_W:
case Mips::PRECR_SRA_R_PH_W: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::CRC32B:
case Mips::CRC32CB:
case Mips::CRC32CD:
case Mips::CRC32CH:
case Mips::CRC32CW:
case Mips::CRC32D:
case Mips::CRC32H:
case Mips::CRC32W: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::CMPGDU_EQ_QB:
case Mips::CMPGDU_LE_QB:
case Mips::CMPGDU_LT_QB:
case Mips::CMPGU_EQ_QB:
case Mips::CMPGU_LE_QB:
case Mips::CMPGU_LT_QB:
case Mips::PACKRL_PH:
case Mips::PICK_PH:
case Mips::PICK_QB:
case Mips::PRECRQU_S_QB_PH:
case Mips::PRECRQ_PH_W:
case Mips::PRECRQ_QB_PH:
case Mips::PRECRQ_RS_PH_W:
case Mips::PRECR_QB_PH: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::DLSA:
case Mips::LSA: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: sa
op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
op &= UINT64_C(3);
op <<= 6;
Value |= op;
break;
}
case Mips::ADDU16_MMR6:
case Mips::SUBU16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 1;
Value |= op;
break;
}
case Mips::BGEZALC:
case Mips::BGEZC:
case Mips::BGEZC64:
case Mips::BLTZALC:
case Mips::BLTZC:
case Mips::BLTZC64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BGEZC_MMR6:
case Mips::BLTZC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BGEZALC_MMR6:
case Mips::BLTZALC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::DI:
case Mips::DI_MM:
case Mips::DI_MMR6:
case Mips::DMT:
case Mips::DVP:
case Mips::DVPE:
case Mips::EI:
case Mips::EI_MM:
case Mips::EI_MMR6:
case Mips::EMT:
case Mips::EVP:
case Mips::EVPE: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::EXTP:
case Mips::EXTPDP:
case Mips::EXTPDPV:
case Mips::EXTPV:
case Mips::EXTRV_RS_W:
case Mips::EXTRV_R_W:
case Mips::EXTRV_S_H:
case Mips::EXTRV_W:
case Mips::EXTR_RS_W:
case Mips::EXTR_R_W:
case Mips::EXTR_S_H:
case Mips::EXTR_W: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(3);
op <<= 11;
Value |= op;
// op: shift_rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::LL64_R6:
case Mips::LLD_R6:
case Mips::LL_R6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
break;
}
case Mips::LB:
case Mips::LB64:
case Mips::LBu:
case Mips::LBu64:
case Mips::LD:
case Mips::LDC1:
case Mips::LDC164:
case Mips::LDC2:
case Mips::LDC3:
case Mips::LDL:
case Mips::LDR:
case Mips::LEA_ADDiu:
case Mips::LEA_ADDiu64:
case Mips::LH:
case Mips::LH64:
case Mips::LHu:
case Mips::LHu64:
case Mips::LL:
case Mips::LL64:
case Mips::LLD:
case Mips::LW:
case Mips::LW64:
case Mips::LWC1:
case Mips::LWC2:
case Mips::LWC3:
case Mips::LWDSP:
case Mips::LWL:
case Mips::LWL64:
case Mips::LWR:
case Mips::LWR64:
case Mips::LWu:
case Mips::SB:
case Mips::SB64:
case Mips::SD:
case Mips::SDC1:
case Mips::SDC164:
case Mips::SDC2:
case Mips::SDC3:
case Mips::SDL:
case Mips::SDR:
case Mips::SH:
case Mips::SH64:
case Mips::SW:
case Mips::SW64:
case Mips::SWC1:
case Mips::SWC2:
case Mips::SWC3:
case Mips::SWDSP:
case Mips::SWL:
case Mips::SWL64:
case Mips::SWR:
case Mips::SWR64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(65535));
break;
}
case Mips::LDC2_R6:
case Mips::LWC2_R6:
case Mips::SDC2_R6:
case Mips::SWC2_R6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) >> 5;
Value |= (op & UINT64_C(2047));
break;
}
case Mips::CFC1:
case Mips::DMFC1:
case Mips::MFC1:
case Mips::MFC1_D64:
case Mips::MFHC1_D32:
case Mips::MFHC1_D64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::DMFC2_OCTEON:
case Mips::DMTC2_OCTEON:
case Mips::LUi:
case Mips::LUi64:
case Mips::LUi_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BEQZALC:
case Mips::BGTZALC:
case Mips::BGTZC:
case Mips::BGTZC64:
case Mips::BLEZALC:
case Mips::BLEZC:
case Mips::BLEZC64:
case Mips::BNEZALC: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BC1EQZC_MMR6:
case Mips::BC1NEZC_MMR6:
case Mips::BC2EQZC_MMR6:
case Mips::BC2NEZC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::JIALC:
case Mips::JIALC64:
case Mips::JIALC_MMR6:
case Mips::JIC:
case Mips::JIC64:
case Mips::JIC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getJumpOffset16OpValue(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::DMFC0:
case Mips::DMFC2:
case Mips::DMFGC0:
case Mips::MFC0:
case Mips::MFC2:
case Mips::MFGC0:
case Mips::MFHGC0: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
Value |= op;
break;
}
case Mips::RDHWR:
case Mips::RDHWR64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 6;
Value |= op;
break;
}
case Mips::SAA:
case Mips::SAAD: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::SLTi:
case Mips::SLTi64:
case Mips::SLTiu:
case Mips::SLTiu64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::CINS:
case Mips::CINS32:
case Mips::CINS64_32:
case Mips::CINS_i32:
case Mips::EXTS:
case Mips::EXTS32: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: lenm1
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::DINS:
case Mips::DINSM:
case Mips::DINSU:
case Mips::INS: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: size
op = getSizeInsEncoding(MI, 3, Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::DEXT:
case Mips::DEXT64_32:
case Mips::DEXTM:
case Mips::DEXTU:
case Mips::EXT: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: size
op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::APPEND:
case Mips::BALIGN:
case Mips::PREPEND: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::INSV: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
break;
}
case Mips::LWU_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(4095));
break;
}
case Mips::LBE_MM:
case Mips::LBuE_MM:
case Mips::LHE_MM:
case Mips::LHuE_MM:
case Mips::LLE_MM:
case Mips::LWE_MM:
case Mips::SBE_MM:
case Mips::SHE_MM:
case Mips::SWE_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(511));
break;
}
case Mips::LEA_ADDiu_MM:
case Mips::LH_MM:
case Mips::LHu_MM:
case Mips::LWDSP_MM:
case Mips::LW_MM:
case Mips::LW_MMR6:
case Mips::SB_MM:
case Mips::SB_MMR6:
case Mips::SH_MM:
case Mips::SH_MMR6:
case Mips::SWDSP_MM:
case Mips::SW_MM:
case Mips::SW_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
op &= UINT64_C(2097151);
Value |= op;
break;
}
case Mips::LWP_MM:
case Mips::SWP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(4095));
break;
}
case Mips::LDC2_MMR6:
case Mips::LWC2_MMR6:
case Mips::SDC2_MMR6:
case Mips::SWC2_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm11(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(2047));
break;
}
case Mips::LL_MM:
case Mips::LWL_MM:
case Mips::LWR_MM:
case Mips::SWL_MM:
case Mips::SWR_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(4095));
break;
}
case Mips::LB_MM:
case Mips::LBu_MM:
case Mips::LDC1_MM:
case Mips::LWC1_MM:
case Mips::SDC1_MM:
case Mips::SWC1_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
op &= UINT64_C(2097151);
Value |= op;
break;
}
case Mips::LL_MMR6:
case Mips::LWLE_MM:
case Mips::LWRE_MM:
case Mips::SWLE_MM:
case Mips::SWRE_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm9(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(511));
break;
}
case Mips::CFC1_MM:
case Mips::MFC1_MM:
case Mips::MFC1_MMR6:
case Mips::MFHC1_D32_MM:
case Mips::MFHC1_D64_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::REPL_QB_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(255);
op <<= 13;
Value |= op;
break;
}
case Mips::ALUIPC_MMR6:
case Mips::AUIPC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::EXTPDP_MM:
case Mips::EXTP_MM:
case Mips::EXTR_RS_W_MM:
case Mips::EXTR_R_W_MM:
case Mips::EXTR_S_H_MM:
case Mips::EXTR_W_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(3);
op <<= 14;
Value |= op;
break;
}
case Mips::ADDIUPC_MMR6:
case Mips::LWPC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm
op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
op &= UINT64_C(524287);
Value |= op;
break;
}
case Mips::LUI_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::CFC2_MM:
case Mips::MFC2_MMR6:
case Mips::MFHC2_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: impl
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::RDDSP_MM:
case Mips::WRDSP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: mask
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(127);
op <<= 14;
Value |= op;
break;
}
case Mips::BGTZC_MMR6:
case Mips::BLEZC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: offset
op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BEQZALC_MMR6:
case Mips::BGTZALC_MMR6:
case Mips::BLEZALC_MMR6:
case Mips::BNEZALC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::RDHWR_MM:
case Mips::RDPGPR_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::ABSQ_S_PH_MM:
case Mips::ABSQ_S_QB_MMR2:
case Mips::ABSQ_S_W_MM:
case Mips::BITREV_MM:
case Mips::JALRC_HB_MMR6:
case Mips::JALRC_MMR6:
case Mips::PRECEQU_PH_QBLA_MM:
case Mips::PRECEQU_PH_QBL_MM:
case Mips::PRECEQU_PH_QBRA_MM:
case Mips::PRECEQU_PH_QBR_MM:
case Mips::PRECEQ_W_PHL_MM:
case Mips::PRECEQ_W_PHR_MM:
case Mips::PRECEU_PH_QBLA_MM:
case Mips::PRECEU_PH_QBL_MM:
case Mips::PRECEU_PH_QBRA_MM:
case Mips::PRECEU_PH_QBR_MM:
case Mips::RADDU_W_QB_MM:
case Mips::REPLV_PH_MM:
case Mips::REPLV_QB_MM:
case Mips::WRPGPR_MMR6:
case Mips::WSBH_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::BALIGN_MMR2: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(3);
op <<= 14;
Value |= op;
break;
}
case Mips::ADDIU_MMR6:
case Mips::ANDI_MMR6:
case Mips::ORI_MMR6:
case Mips::SLTi_MM:
case Mips::SLTiu_MM:
case Mips::XORI_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::BNVC_MMR6:
case Mips::BOVC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValueMMR6(MI, 2, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::INS_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: size
op = getSizeInsEncoding(MI, 3, Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::EXT_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: size
op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::SHLL_PH_MM:
case Mips::SHLL_S_PH_MM:
case Mips::SHRA_PH_MM:
case Mips::SHRA_R_PH_MM:
case Mips::SHRL_PH_MMR2: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 12;
Value |= op;
break;
}
case Mips::APPEND_MMR2:
case Mips::PRECR_SRA_PH_W_MMR2:
case Mips::PRECR_SRA_R_PH_W_MMR2:
case Mips::PREPEND_MMR2:
case Mips::SHLL_S_W_MM:
case Mips::SHRA_R_W_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::SHLL_QB_MM:
case Mips::SHRA_QB_MMR2:
case Mips::SHRA_R_QB_MMR2:
case Mips::SHRL_QB_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 13;
Value |= op;
break;
}
case Mips::MFC0_MMR6:
case Mips::MFGC0_MM:
case Mips::MFHC0_MMR6:
case Mips::MFHGC0_MM:
case Mips::RDHWR_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 11;
Value |= op;
break;
}
case Mips::INS_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: size
op = getSizeInsEncoding(MI, 3, Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::EXT_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: size
op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::INSV_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::EXTPDPV_MM:
case Mips::EXTPV_MM:
case Mips::EXTRV_RS_W_MM:
case Mips::EXTRV_R_W_MM:
case Mips::EXTRV_S_H_MM:
case Mips::EXTRV_W_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(3);
op <<= 14;
Value |= op;
break;
}
case Mips::LWSP_MM:
case Mips::SWSP_MM:
case Mips::SWSP_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 5;
Value |= op;
// op: offset
op = getMemEncodingMMSPImm5Lsl2(MI, 1, Fixups, STI);
op &= UINT64_C(31);
Value |= op;
break;
}
case Mips::NOT16_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 3;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
Value |= op;
break;
}
case Mips::LBU16_MM:
case Mips::SB16_MM:
case Mips::SB16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: addr
op = getMemEncodingMMImm4(MI, 1, Fixups, STI);
op &= UINT64_C(127);
Value |= op;
break;
}
case Mips::LHU16_MM:
case Mips::SH16_MM:
case Mips::SH16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: addr
op = getMemEncodingMMImm4Lsl1(MI, 1, Fixups, STI);
op &= UINT64_C(127);
Value |= op;
break;
}
case Mips::LW16_MM:
case Mips::SW16_MM:
case Mips::SW16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: addr
op = getMemEncodingMMImm4Lsl2(MI, 1, Fixups, STI);
op &= UINT64_C(127);
Value |= op;
break;
}
case Mips::LWGP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: offset
op = getMemEncodingMMGPImm7Lsl2(MI, 1, Fixups, STI);
op &= UINT64_C(127);
Value |= op;
break;
}
case Mips::NOT16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
break;
}
case Mips::SC64_R6:
case Mips::SCD_R6:
case Mips::SC_R6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
break;
}
case Mips::SC:
case Mips::SC64:
case Mips::SCD: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(65535));
break;
}
case Mips::CTC1:
case Mips::DMTC1:
case Mips::MTC1:
case Mips::MTC1_D64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::DMTC0:
case Mips::DMTC2:
case Mips::DMTGC0:
case Mips::MTC0:
case Mips::MTC2:
case Mips::MTGC0:
case Mips::MTHGC0: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
Value |= op;
break;
}
case Mips::MFTR:
case Mips::MTTR: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: u
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(1);
op <<= 5;
Value |= op;
// op: h
op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
op &= UINT64_C(1);
op <<= 4;
Value |= op;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(7);
Value |= op;
break;
}
case Mips::SCE_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(511));
break;
}
case Mips::SC_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm12(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(4095));
break;
}
case Mips::SC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm9(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(511));
break;
}
case Mips::CTC1_MM:
case Mips::MTC1_D64_MM:
case Mips::MTC1_MM:
case Mips::MTC1_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::CTC2_MM:
case Mips::MTC2_MMR6:
case Mips::MTHC2_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: impl
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::CMPU_EQ_QB_MM:
case Mips::CMPU_LE_QB_MM:
case Mips::CMPU_LT_QB_MM:
case Mips::CMP_EQ_PH_MM:
case Mips::CMP_LE_PH_MM:
case Mips::CMP_LT_PH_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::BEQC_MMR6:
case Mips::BGEC_MMR6:
case Mips::BGEUC_MMR6:
case Mips::BLTC_MMR6:
case Mips::BLTUC_MMR6:
case Mips::BNEC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: offset
op = getBranchTargetOpValueLsl2MMR6(MI, 2, Fixups, STI);
op &= UINT64_C(65535);
Value |= op;
break;
}
case Mips::MTC0_MMR6:
case Mips::MTGC0_MM:
case Mips::MTHC0_MMR6:
case Mips::MTHGC0_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 11;
Value |= op;
break;
}
case Mips::MTHC1_D32:
case Mips::MTHC1_D64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::SPLAT_B:
case Mips::SPLAT_D:
case Mips::SPLAT_H:
case Mips::SPLAT_W: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::MTHC1_D32_MM:
case Mips::MTHC1_D64_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::DPAQX_SA_W_PH_MMR2:
case Mips::DPAQX_S_W_PH_MMR2:
case Mips::DPAQ_SA_L_W_MM:
case Mips::DPAQ_S_W_PH_MM:
case Mips::DPAU_H_QBL_MM:
case Mips::DPAU_H_QBR_MM:
case Mips::DPAX_W_PH_MMR2:
case Mips::DPA_W_PH_MMR2:
case Mips::DPSQX_SA_W_PH_MMR2:
case Mips::DPSQX_S_W_PH_MMR2:
case Mips::DPSQ_SA_L_W_MM:
case Mips::DPSQ_S_W_PH_MM:
case Mips::DPSU_H_QBL_MM:
case Mips::DPSU_H_QBR_MM:
case Mips::DPSX_W_PH_MMR2:
case Mips::DPS_W_PH_MMR2:
case Mips::MADDU_DSP_MM:
case Mips::MADD_DSP_MM:
case Mips::MAQ_SA_W_PHL_MM:
case Mips::MAQ_SA_W_PHR_MM:
case Mips::MAQ_S_W_PHL_MM:
case Mips::MAQ_S_W_PHR_MM:
case Mips::MSUBU_DSP_MM:
case Mips::MSUB_DSP_MM:
case Mips::MULSAQ_S_W_PH_MM:
case Mips::MULSA_W_PH_MMR2:
case Mips::MULTU_DSP_MM:
case Mips::MULT_DSP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 14;
Value |= op;
break;
}
case Mips::ADD_MM:
case Mips::ADDu_MM:
case Mips::AND_MM:
case Mips::CMPGU_EQ_QB_MM:
case Mips::CMPGU_LE_QB_MM:
case Mips::CMPGU_LT_QB_MM:
case Mips::MOVN_I_MM:
case Mips::MOVZ_I_MM:
case Mips::MUL_MM:
case Mips::NOR_MM:
case Mips::OR_MM:
case Mips::SLT_MM:
case Mips::SLTu_MM:
case Mips::SUB_MM:
case Mips::SUBu_MM:
case Mips::XOR_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
break;
}
case Mips::AND16_MM:
case Mips::OR16_MM:
case Mips::XOR16_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 3;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
Value |= op;
break;
}
case Mips::AND16_MMR6:
case Mips::OR16_MMR6:
case Mips::XOR16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 7;
Value |= op;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 4;
Value |= op;
break;
}
case Mips::SLD_B:
case Mips::SLD_D:
case Mips::SLD_H:
case Mips::SLD_W: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::LWM32_MM:
case Mips::SWM32_MM: {
// op: rt
op = getRegisterListOpValue(MI, 0, Fixups, STI);
op &= UINT64_C(31);
op <<= 21;
Value |= op;
// op: addr
op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616));
Value |= (op & UINT64_C(4095));
break;
}
case Mips::LWM16_MM:
case Mips::SWM16_MM: {
// op: rt
op = getRegisterListOpValue16(MI, 0, Fixups, STI);
op &= UINT64_C(3);
op <<= 4;
Value |= op;
// op: addr
op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
op &= UINT64_C(15);
Value |= op;
break;
}
case Mips::LWM16_MMR6:
case Mips::SWM16_MMR6: {
// op: rt
op = getRegisterListOpValue16(MI, 0, Fixups, STI);
op &= UINT64_C(3);
op <<= 8;
Value |= op;
// op: addr
op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
op &= UINT64_C(15);
op <<= 4;
Value |= op;
break;
}
case Mips::JrcRx16:
case Mips::JumpLinkReg16:
case Mips::SebRx16:
case Mips::SehRx16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
break;
}
case Mips::AddiuRxRxImm16:
case Mips::BeqzRxImm16:
case Mips::BnezRxImm16:
case Mips::CmpiRxImm16:
case Mips::LiRxImm16:
case Mips::LwRxPcTcp16:
case Mips::SltiRxImm16:
case Mips::SltiuRxImm16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: imm8
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(255);
Value |= op;
break;
}
case Mips::Mfhi16:
case Mips::Mflo16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 5;
Value |= op;
break;
}
case Mips::CmpRxRy16:
case Mips::DivRxRy16:
case Mips::DivuRxRy16:
case Mips::NegRxRy16:
case Mips::NotRxRy16:
case Mips::SltRxRy16:
case Mips::SltuRxRy16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 5;
Value |= op;
break;
}
case Mips::AndRxRxRy16:
case Mips::OrRxRxRy16:
case Mips::SllvRxRy16:
case Mips::SravRxRy16:
case Mips::SrlvRxRy16:
case Mips::XorRxRxRy16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 5;
Value |= op;
break;
}
case Mips::AdduRxRyRz16:
case Mips::SubuRxRyRz16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 5;
Value |= op;
// op: rz
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 2;
Value |= op;
break;
}
case Mips::MoveR3216: {
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(15);
op <<= 4;
Value |= op;
// op: r32
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(15);
Value |= op;
break;
}
case Mips::LDI_B:
case Mips::LDI_D:
case Mips::LDI_H:
case Mips::LDI_W: {
// op: s10
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(1023);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::SllX16:
case Mips::SraX16:
case Mips::SrlX16: {
// op: sa6
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 22;
Value |= (op & UINT64_C(32)) << 16;
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(7);
op <<= 8;
Value |= op;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(7);
op <<= 5;
Value |= op;
break;
}
case Mips::SHILO_MM: {
// op: shift
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(63);
op <<= 16;
Value |= op;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(3);
op <<= 14;
Value |= op;
break;
}
case Mips::SYNC_MM:
case Mips::SYNC_MMR6: {
// op: stype
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::SYNC: {
// op: stype
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::J:
case Mips::JAL:
case Mips::JALX:
case Mips::JALX_MM: {
// op: target
op = getJumpTargetOpValue(MI, 0, Fixups, STI);
op &= UINT64_C(67108863);
Value |= op;
break;
}
case Mips::JALS_MM:
case Mips::JAL_MM:
case Mips::J_MM: {
// op: target
op = getJumpTargetOpValueMM(MI, 0, Fixups, STI);
op &= UINT64_C(67108863);
Value |= op;
break;
}
case Mips::ANDI_B:
case Mips::NORI_B:
case Mips::ORI_B:
case Mips::SHF_B:
case Mips::SHF_H:
case Mips::SHF_W:
case Mips::XORI_B: {
// op: u8
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(255);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::BMNZI_B:
case Mips::BMZI_B:
case Mips::BSELI_B: {
// op: u8
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(255);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::FCLASS_D:
case Mips::FCLASS_W:
case Mips::FEXUPL_D:
case Mips::FEXUPL_W:
case Mips::FEXUPR_D:
case Mips::FEXUPR_W:
case Mips::FFINT_S_D:
case Mips::FFINT_S_W:
case Mips::FFINT_U_D:
case Mips::FFINT_U_W:
case Mips::FFQL_D:
case Mips::FFQL_W:
case Mips::FFQR_D:
case Mips::FFQR_W:
case Mips::FLOG2_D:
case Mips::FLOG2_W:
case Mips::FRCP_D:
case Mips::FRCP_W:
case Mips::FRINT_D:
case Mips::FRINT_W:
case Mips::FRSQRT_D:
case Mips::FRSQRT_W:
case Mips::FSQRT_D:
case Mips::FSQRT_W:
case Mips::FTINT_S_D:
case Mips::FTINT_S_W:
case Mips::FTINT_U_D:
case Mips::FTINT_U_W:
case Mips::FTRUNC_S_D:
case Mips::FTRUNC_S_W:
case Mips::FTRUNC_U_D:
case Mips::FTRUNC_U_W:
case Mips::MOVE_V:
case Mips::NLOC_B:
case Mips::NLOC_D:
case Mips::NLOC_H:
case Mips::NLOC_W:
case Mips::NLZC_B:
case Mips::NLZC_D:
case Mips::NLZC_H:
case Mips::NLZC_W:
case Mips::PCNT_B:
case Mips::PCNT_D:
case Mips::PCNT_H:
case Mips::PCNT_W: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::BCLRI_H:
case Mips::BNEGI_H:
case Mips::BSETI_H:
case Mips::SAT_S_H:
case Mips::SAT_U_H:
case Mips::SLLI_H:
case Mips::SRAI_H:
case Mips::SRARI_H:
case Mips::SRLI_H:
case Mips::SRLRI_H: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(15);
op <<= 16;
Value |= op;
break;
}
case Mips::BCLRI_W:
case Mips::BNEGI_W:
case Mips::BSETI_W:
case Mips::SAT_S_W:
case Mips::SAT_U_W:
case Mips::SLLI_W:
case Mips::SRAI_W:
case Mips::SRARI_W:
case Mips::SRLI_W:
case Mips::SRLRI_W: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::BCLRI_D:
case Mips::BNEGI_D:
case Mips::BSETI_D:
case Mips::SAT_S_D:
case Mips::SAT_U_D:
case Mips::SLLI_D:
case Mips::SRAI_D:
case Mips::SRARI_D:
case Mips::SRLI_D:
case Mips::SRLRI_D: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(63);
op <<= 16;
Value |= op;
break;
}
case Mips::BCLRI_B:
case Mips::BNEGI_B:
case Mips::BSETI_B:
case Mips::SAT_S_B:
case Mips::SAT_U_B:
case Mips::SLLI_B:
case Mips::SRAI_B:
case Mips::SRARI_B:
case Mips::SRLI_B:
case Mips::SRLRI_B: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(7);
op <<= 16;
Value |= op;
break;
}
case Mips::BINSLI_H:
case Mips::BINSRI_H: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(15);
op <<= 16;
Value |= op;
break;
}
case Mips::BINSLI_W:
case Mips::BINSRI_W: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
break;
}
case Mips::BINSLI_D:
case Mips::BINSRI_D: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(63);
op <<= 16;
Value |= op;
break;
}
case Mips::BINSLI_B:
case Mips::BINSRI_B: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(7);
op <<= 16;
Value |= op;
break;
}
case Mips::ADDS_A_B:
case Mips::ADDS_A_D:
case Mips::ADDS_A_H:
case Mips::ADDS_A_W:
case Mips::ADDS_S_B:
case Mips::ADDS_S_D:
case Mips::ADDS_S_H:
case Mips::ADDS_S_W:
case Mips::ADDS_U_B:
case Mips::ADDS_U_D:
case Mips::ADDS_U_H:
case Mips::ADDS_U_W:
case Mips::ADDV_B:
case Mips::ADDV_D:
case Mips::ADDV_H:
case Mips::ADDV_W:
case Mips::ADD_A_B:
case Mips::ADD_A_D:
case Mips::ADD_A_H:
case Mips::ADD_A_W:
case Mips::AND_V:
case Mips::ASUB_S_B:
case Mips::ASUB_S_D:
case Mips::ASUB_S_H:
case Mips::ASUB_S_W:
case Mips::ASUB_U_B:
case Mips::ASUB_U_D:
case Mips::ASUB_U_H:
case Mips::ASUB_U_W:
case Mips::AVER_S_B:
case Mips::AVER_S_D:
case Mips::AVER_S_H:
case Mips::AVER_S_W:
case Mips::AVER_U_B:
case Mips::AVER_U_D:
case Mips::AVER_U_H:
case Mips::AVER_U_W:
case Mips::AVE_S_B:
case Mips::AVE_S_D:
case Mips::AVE_S_H:
case Mips::AVE_S_W:
case Mips::AVE_U_B:
case Mips::AVE_U_D:
case Mips::AVE_U_H:
case Mips::AVE_U_W:
case Mips::BCLR_B:
case Mips::BCLR_D:
case Mips::BCLR_H:
case Mips::BCLR_W:
case Mips::BNEG_B:
case Mips::BNEG_D:
case Mips::BNEG_H:
case Mips::BNEG_W:
case Mips::BSET_B:
case Mips::BSET_D:
case Mips::BSET_H:
case Mips::BSET_W:
case Mips::CEQ_B:
case Mips::CEQ_D:
case Mips::CEQ_H:
case Mips::CEQ_W:
case Mips::CLE_S_B:
case Mips::CLE_S_D:
case Mips::CLE_S_H:
case Mips::CLE_S_W:
case Mips::CLE_U_B:
case Mips::CLE_U_D:
case Mips::CLE_U_H:
case Mips::CLE_U_W:
case Mips::CLT_S_B:
case Mips::CLT_S_D:
case Mips::CLT_S_H:
case Mips::CLT_S_W:
case Mips::CLT_U_B:
case Mips::CLT_U_D:
case Mips::CLT_U_H:
case Mips::CLT_U_W:
case Mips::DIV_S_B:
case Mips::DIV_S_D:
case Mips::DIV_S_H:
case Mips::DIV_S_W:
case Mips::DIV_U_B:
case Mips::DIV_U_D:
case Mips::DIV_U_H:
case Mips::DIV_U_W:
case Mips::DOTP_S_D:
case Mips::DOTP_S_H:
case Mips::DOTP_S_W:
case Mips::DOTP_U_D:
case Mips::DOTP_U_H:
case Mips::DOTP_U_W:
case Mips::FADD_D:
case Mips::FADD_W:
case Mips::FCAF_D:
case Mips::FCAF_W:
case Mips::FCEQ_D:
case Mips::FCEQ_W:
case Mips::FCLE_D:
case Mips::FCLE_W:
case Mips::FCLT_D:
case Mips::FCLT_W:
case Mips::FCNE_D:
case Mips::FCNE_W:
case Mips::FCOR_D:
case Mips::FCOR_W:
case Mips::FCUEQ_D:
case Mips::FCUEQ_W:
case Mips::FCULE_D:
case Mips::FCULE_W:
case Mips::FCULT_D:
case Mips::FCULT_W:
case Mips::FCUNE_D:
case Mips::FCUNE_W:
case Mips::FCUN_D:
case Mips::FCUN_W:
case Mips::FDIV_D:
case Mips::FDIV_W:
case Mips::FEXDO_H:
case Mips::FEXDO_W:
case Mips::FEXP2_D:
case Mips::FEXP2_W:
case Mips::FMAX_A_D:
case Mips::FMAX_A_W:
case Mips::FMAX_D:
case Mips::FMAX_W:
case Mips::FMIN_A_D:
case Mips::FMIN_A_W:
case Mips::FMIN_D:
case Mips::FMIN_W:
case Mips::FMUL_D:
case Mips::FMUL_W:
case Mips::FSAF_D:
case Mips::FSAF_W:
case Mips::FSEQ_D:
case Mips::FSEQ_W:
case Mips::FSLE_D:
case Mips::FSLE_W:
case Mips::FSLT_D:
case Mips::FSLT_W:
case Mips::FSNE_D:
case Mips::FSNE_W:
case Mips::FSOR_D:
case Mips::FSOR_W:
case Mips::FSUB_D:
case Mips::FSUB_W:
case Mips::FSUEQ_D:
case Mips::FSUEQ_W:
case Mips::FSULE_D:
case Mips::FSULE_W:
case Mips::FSULT_D:
case Mips::FSULT_W:
case Mips::FSUNE_D:
case Mips::FSUNE_W:
case Mips::FSUN_D:
case Mips::FSUN_W:
case Mips::FTQ_H:
case Mips::FTQ_W:
case Mips::HADD_S_D:
case Mips::HADD_S_H:
case Mips::HADD_S_W:
case Mips::HADD_U_D:
case Mips::HADD_U_H:
case Mips::HADD_U_W:
case Mips::HSUB_S_D:
case Mips::HSUB_S_H:
case Mips::HSUB_S_W:
case Mips::HSUB_U_D:
case Mips::HSUB_U_H:
case Mips::HSUB_U_W:
case Mips::ILVEV_B:
case Mips::ILVEV_D:
case Mips::ILVEV_H:
case Mips::ILVEV_W:
case Mips::ILVL_B:
case Mips::ILVL_D:
case Mips::ILVL_H:
case Mips::ILVL_W:
case Mips::ILVOD_B:
case Mips::ILVOD_D:
case Mips::ILVOD_H:
case Mips::ILVOD_W:
case Mips::ILVR_B:
case Mips::ILVR_D:
case Mips::ILVR_H:
case Mips::ILVR_W:
case Mips::MAX_A_B:
case Mips::MAX_A_D:
case Mips::MAX_A_H:
case Mips::MAX_A_W:
case Mips::MAX_S_B:
case Mips::MAX_S_D:
case Mips::MAX_S_H:
case Mips::MAX_S_W:
case Mips::MAX_U_B:
case Mips::MAX_U_D:
case Mips::MAX_U_H:
case Mips::MAX_U_W:
case Mips::MIN_A_B:
case Mips::MIN_A_D:
case Mips::MIN_A_H:
case Mips::MIN_A_W:
case Mips::MIN_S_B:
case Mips::MIN_S_D:
case Mips::MIN_S_H:
case Mips::MIN_S_W:
case Mips::MIN_U_B:
case Mips::MIN_U_D:
case Mips::MIN_U_H:
case Mips::MIN_U_W:
case Mips::MOD_S_B:
case Mips::MOD_S_D:
case Mips::MOD_S_H:
case Mips::MOD_S_W:
case Mips::MOD_U_B:
case Mips::MOD_U_D:
case Mips::MOD_U_H:
case Mips::MOD_U_W:
case Mips::MULR_Q_H:
case Mips::MULR_Q_W:
case Mips::MULV_B:
case Mips::MULV_D:
case Mips::MULV_H:
case Mips::MULV_W:
case Mips::MUL_Q_H:
case Mips::MUL_Q_W:
case Mips::NOR_V:
case Mips::OR_V:
case Mips::PCKEV_B:
case Mips::PCKEV_D:
case Mips::PCKEV_H:
case Mips::PCKEV_W:
case Mips::PCKOD_B:
case Mips::PCKOD_D:
case Mips::PCKOD_H:
case Mips::PCKOD_W:
case Mips::SLL_B:
case Mips::SLL_D:
case Mips::SLL_H:
case Mips::SLL_W:
case Mips::SRAR_B:
case Mips::SRAR_D:
case Mips::SRAR_H:
case Mips::SRAR_W:
case Mips::SRA_B:
case Mips::SRA_D:
case Mips::SRA_H:
case Mips::SRA_W:
case Mips::SRLR_B:
case Mips::SRLR_D:
case Mips::SRLR_H:
case Mips::SRLR_W:
case Mips::SRL_B:
case Mips::SRL_D:
case Mips::SRL_H:
case Mips::SRL_W:
case Mips::SUBSUS_U_B:
case Mips::SUBSUS_U_D:
case Mips::SUBSUS_U_H:
case Mips::SUBSUS_U_W:
case Mips::SUBSUU_S_B:
case Mips::SUBSUU_S_D:
case Mips::SUBSUU_S_H:
case Mips::SUBSUU_S_W:
case Mips::SUBS_S_B:
case Mips::SUBS_S_D:
case Mips::SUBS_S_H:
case Mips::SUBS_S_W:
case Mips::SUBS_U_B:
case Mips::SUBS_U_D:
case Mips::SUBS_U_H:
case Mips::SUBS_U_W:
case Mips::SUBV_B:
case Mips::SUBV_D:
case Mips::SUBV_H:
case Mips::SUBV_W:
case Mips::XOR_V: {
// op: wt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
case Mips::BINSL_B:
case Mips::BINSL_D:
case Mips::BINSL_H:
case Mips::BINSL_W:
case Mips::BINSR_B:
case Mips::BINSR_D:
case Mips::BINSR_H:
case Mips::BINSR_W:
case Mips::BMNZ_V:
case Mips::BMZ_V:
case Mips::BSEL_V:
case Mips::DPADD_S_D:
case Mips::DPADD_S_H:
case Mips::DPADD_S_W:
case Mips::DPADD_U_D:
case Mips::DPADD_U_H:
case Mips::DPADD_U_W:
case Mips::DPSUB_S_D:
case Mips::DPSUB_S_H:
case Mips::DPSUB_S_W:
case Mips::DPSUB_U_D:
case Mips::DPSUB_U_H:
case Mips::DPSUB_U_W:
case Mips::FMADD_D:
case Mips::FMADD_W:
case Mips::FMSUB_D:
case Mips::FMSUB_W:
case Mips::MADDR_Q_H:
case Mips::MADDR_Q_W:
case Mips::MADDV_B:
case Mips::MADDV_D:
case Mips::MADDV_H:
case Mips::MADDV_W:
case Mips::MADD_Q_H:
case Mips::MADD_Q_W:
case Mips::MSUBR_Q_H:
case Mips::MSUBR_Q_W:
case Mips::MSUBV_B:
case Mips::MSUBV_D:
case Mips::MSUBV_H:
case Mips::MSUBV_W:
case Mips::MSUB_Q_H:
case Mips::MSUB_Q_W:
case Mips::VSHF_B:
case Mips::VSHF_D:
case Mips::VSHF_H:
case Mips::VSHF_W: {
// op: wt
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
op &= UINT64_C(31);
op <<= 16;
Value |= op;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
op &= UINT64_C(31);
op <<= 11;
Value |= op;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
op &= UINT64_C(31);
op <<= 6;
Value |= op;
break;
}
default:
std::string msg;
raw_string_ostream Msg(msg);
Msg << "Not supported instr: " << MI;
report_fatal_error(Msg.str());
}
return Value;
}
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
#undef ENABLE_INSTR_PREDICATE_VERIFIER
#include <sstream>
// Bits for subtarget features that participate in instruction matching.
enum SubtargetFeatureBits : uint8_t {
Feature_HasMips2Bit = 11,
Feature_HasMips3_32Bit = 17,
Feature_HasMips3_32r2Bit = 18,
Feature_HasMips3Bit = 12,
Feature_NotMips3Bit = 46,
Feature_HasMips4_32Bit = 19,
Feature_NotMips4_32Bit = 48,
Feature_HasMips4_32r2Bit = 20,
Feature_HasMips5_32r2Bit = 21,
Feature_HasMips32Bit = 13,
Feature_HasMips32r2Bit = 14,
Feature_HasMips32r5Bit = 15,
Feature_HasMips32r6Bit = 16,
Feature_NotMips32r6Bit = 47,
Feature_IsGP64bitBit = 32,
Feature_IsGP32bitBit = 31,
Feature_IsPTR64bitBit = 36,
Feature_IsPTR32bitBit = 35,
Feature_HasMips64Bit = 22,
Feature_NotMips64Bit = 49,
Feature_HasMips64r2Bit = 23,
Feature_HasMips64r5Bit = 24,
Feature_HasMips64r6Bit = 25,
Feature_NotMips64r6Bit = 50,
Feature_InMips16ModeBit = 29,
Feature_NotInMips16ModeBit = 45,
Feature_HasCnMipsBit = 1,
Feature_NotCnMipsBit = 41,
Feature_HasCnMipsPBit = 2,
Feature_NotCnMipsPBit = 42,
Feature_IsSym32Bit = 38,
Feature_IsSym64Bit = 39,
Feature_HasStdEncBit = 26,
Feature_InMicroMipsBit = 28,
Feature_NotInMicroMipsBit = 44,
Feature_HasEVABit = 6,
Feature_HasMSABit = 8,
Feature_HasMadd4Bit = 10,
Feature_HasMTBit = 9,
Feature_UseIndirectJumpsHazardBit = 51,
Feature_NoIndirectJumpGuardsBit = 40,
Feature_HasCRCBit = 0,
Feature_HasVirtBit = 27,
Feature_HasGINVBit = 7,
Feature_IsFP64bitBit = 30,
Feature_NotFP64bitBit = 43,
Feature_IsSingleFloatBit = 37,
Feature_IsNotSingleFloatBit = 33,
Feature_IsNotSoftFloatBit = 34,
Feature_HasDSPBit = 3,
Feature_HasDSPR2Bit = 4,
Feature_HasDSPR3Bit = 5,
};
#ifndef NDEBUG
static const char *SubtargetFeatureNames[] = {
"Feature_HasCRC",
"Feature_HasCnMips",
"Feature_HasCnMipsP",
"Feature_HasDSP",
"Feature_HasDSPR2",
"Feature_HasDSPR3",
"Feature_HasEVA",
"Feature_HasGINV",
"Feature_HasMSA",
"Feature_HasMT",
"Feature_HasMadd4",
"Feature_HasMips2",
"Feature_HasMips3",
"Feature_HasMips32",
"Feature_HasMips32r2",
"Feature_HasMips32r5",
"Feature_HasMips32r6",
"Feature_HasMips3_32",
"Feature_HasMips3_32r2",
"Feature_HasMips4_32",
"Feature_HasMips4_32r2",
"Feature_HasMips5_32r2",
"Feature_HasMips64",
"Feature_HasMips64r2",
"Feature_HasMips64r5",
"Feature_HasMips64r6",
"Feature_HasStdEnc",
"Feature_HasVirt",
"Feature_InMicroMips",
"Feature_InMips16Mode",
"Feature_IsFP64bit",
"Feature_IsGP32bit",
"Feature_IsGP64bit",
"Feature_IsNotSingleFloat",
"Feature_IsNotSoftFloat",
"Feature_IsPTR32bit",
"Feature_IsPTR64bit",
"Feature_IsSingleFloat",
"Feature_IsSym32",
"Feature_IsSym64",
"Feature_NoIndirectJumpGuards",
"Feature_NotCnMips",
"Feature_NotCnMipsP",
"Feature_NotFP64bit",
"Feature_NotInMicroMips",
"Feature_NotInMips16Mode",
"Feature_NotMips3",
"Feature_NotMips32r6",
"Feature_NotMips4_32",
"Feature_NotMips64",
"Feature_NotMips64r6",
"Feature_UseIndirectJumpsHazard",
nullptr
};
#endif // NDEBUG
FeatureBitset MipsMCCodeEmitter::
computeAvailableFeatures(const FeatureBitset& FB) const {
FeatureBitset Features;
if ((FB[Mips::FeatureMips2]))
Features.set(Feature_HasMips2Bit);
if ((FB[Mips::FeatureMips3_32]))
Features.set(Feature_HasMips3_32Bit);
if ((FB[Mips::FeatureMips3_32r2]))
Features.set(Feature_HasMips3_32r2Bit);
if ((FB[Mips::FeatureMips3]))
Features.set(Feature_HasMips3Bit);
if ((!FB[Mips::FeatureMips3]))
Features.set(Feature_NotMips3Bit);
if ((FB[Mips::FeatureMips4_32]))
Features.set(Feature_HasMips4_32Bit);
if ((!FB[Mips::FeatureMips4_32]))
Features.set(Feature_NotMips4_32Bit);
if ((FB[Mips::FeatureMips4_32r2]))
Features.set(Feature_HasMips4_32r2Bit);
if ((FB[Mips::FeatureMips5_32r2]))
Features.set(Feature_HasMips5_32r2Bit);
if ((FB[Mips::FeatureMips32]))
Features.set(Feature_HasMips32Bit);
if ((FB[Mips::FeatureMips32r2]))
Features.set(Feature_HasMips32r2Bit);
if ((FB[Mips::FeatureMips32r5]))
Features.set(Feature_HasMips32r5Bit);
if ((FB[Mips::FeatureMips32r6]))
Features.set(Feature_HasMips32r6Bit);
if ((!FB[Mips::FeatureMips32r6]))
Features.set(Feature_NotMips32r6Bit);
if ((FB[Mips::FeatureGP64Bit]))
Features.set(Feature_IsGP64bitBit);
if ((!FB[Mips::FeatureGP64Bit]))
Features.set(Feature_IsGP32bitBit);
if ((FB[Mips::FeaturePTR64Bit]))
Features.set(Feature_IsPTR64bitBit);
if ((!FB[Mips::FeaturePTR64Bit]))
Features.set(Feature_IsPTR32bitBit);
if ((FB[Mips::FeatureMips64]))
Features.set(Feature_HasMips64Bit);
if ((!FB[Mips::FeatureMips64]))
Features.set(Feature_NotMips64Bit);
if ((FB[Mips::FeatureMips64r2]))
Features.set(Feature_HasMips64r2Bit);
if ((FB[Mips::FeatureMips64r5]))
Features.set(Feature_HasMips64r5Bit);
if ((FB[Mips::FeatureMips64r6]))
Features.set(Feature_HasMips64r6Bit);
if ((!FB[Mips::FeatureMips64r6]))
Features.set(Feature_NotMips64r6Bit);
if ((FB[Mips::FeatureMips16]))
Features.set(Feature_InMips16ModeBit);
if ((!FB[Mips::FeatureMips16]))
Features.set(Feature_NotInMips16ModeBit);
if ((FB[Mips::FeatureCnMips]))
Features.set(Feature_HasCnMipsBit);
if ((!FB[Mips::FeatureCnMips]))
Features.set(Feature_NotCnMipsBit);
if ((FB[Mips::FeatureCnMipsP]))
Features.set(Feature_HasCnMipsPBit);
if ((!FB[Mips::FeatureCnMipsP]))
Features.set(Feature_NotCnMipsPBit);
if ((FB[Mips::FeatureSym32]))
Features.set(Feature_IsSym32Bit);
if ((!FB[Mips::FeatureSym32]))
Features.set(Feature_IsSym64Bit);
if ((!FB[Mips::FeatureMips16]))
Features.set(Feature_HasStdEncBit);
if ((FB[Mips::FeatureMicroMips]))
Features.set(Feature_InMicroMipsBit);
if ((!FB[Mips::FeatureMicroMips]))
Features.set(Feature_NotInMicroMipsBit);
if ((FB[Mips::FeatureEVA]))
Features.set(Feature_HasEVABit);
if ((FB[Mips::FeatureMSA]))
Features.set(Feature_HasMSABit);
if ((!FB[Mips::FeatureMadd4]))
Features.set(Feature_HasMadd4Bit);
if ((FB[Mips::FeatureMT]))
Features.set(Feature_HasMTBit);
if ((FB[Mips::FeatureUseIndirectJumpsHazard]))
Features.set(Feature_UseIndirectJumpsHazardBit);
if ((!FB[Mips::FeatureUseIndirectJumpsHazard]))
Features.set(Feature_NoIndirectJumpGuardsBit);
if ((FB[Mips::FeatureCRC]))
Features.set(Feature_HasCRCBit);
if ((FB[Mips::FeatureVirt]))
Features.set(Feature_HasVirtBit);
if ((FB[Mips::FeatureGINV]))
Features.set(Feature_HasGINVBit);
if ((FB[Mips::FeatureFP64Bit]))
Features.set(Feature_IsFP64bitBit);
if ((!FB[Mips::FeatureFP64Bit]))
Features.set(Feature_NotFP64bitBit);
if ((FB[Mips::FeatureSingleFloat]))
Features.set(Feature_IsSingleFloatBit);
if ((!FB[Mips::FeatureSingleFloat]))
Features.set(Feature_IsNotSingleFloatBit);
if ((!FB[Mips::FeatureSoftFloat]))
Features.set(Feature_IsNotSoftFloatBit);
if ((FB[Mips::FeatureDSP]))
Features.set(Feature_HasDSPBit);
if ((FB[Mips::FeatureDSPR2]))
Features.set(Feature_HasDSPR2Bit);
if ((FB[Mips::FeatureDSPR3]))
Features.set(Feature_HasDSPR3Bit);
return Features;
}
#ifndef NDEBUG
// Feature bitsets.
enum : uint8_t {
CEFBS_None,
CEFBS_HasCnMips,
CEFBS_HasCnMipsP,
CEFBS_HasDSP,
CEFBS_HasDSPR2,
CEFBS_HasMSA,
CEFBS_HasMT,
CEFBS_InMicroMips,
CEFBS_InMips16Mode,
CEFBS_IsGP32bit,
CEFBS_IsGP64bit,
CEFBS_IsNotSoftFloat,
CEFBS_NotCnMips,
CEFBS_NotInMips16Mode,
CEFBS_HasDSP_NotInMicroMips,
CEFBS_HasStdEnc_HasMSA,
CEFBS_HasStdEnc_HasMips32,
CEFBS_HasStdEnc_HasMips32r6,
CEFBS_HasStdEnc_HasMips64,
CEFBS_HasStdEnc_HasMips64r6,
CEFBS_HasStdEnc_IsNotSoftFloat,
CEFBS_HasStdEnc_NotInMicroMips,
CEFBS_HasStdEnc_NotMips3,
CEFBS_HasStdEnc_NotMips4_32,
CEFBS_InMicroMips_HasDSP,
CEFBS_InMicroMips_HasDSPR2,
CEFBS_InMicroMips_HasDSPR3,
CEFBS_InMicroMips_HasEVA,
CEFBS_InMicroMips_HasMips32r6,
CEFBS_InMicroMips_IsNotSoftFloat,
CEFBS_InMicroMips_NotMips32r6,
CEFBS_IsFP64bit_IsNotSoftFloat,
CEFBS_IsGP32bit_NotInMicroMips,
CEFBS_NotFP64bit_IsNotSoftFloat,
CEFBS_NotInMips16Mode_HasDSP,
CEFBS_NotInMips16Mode_IsGP64bit,
CEFBS_NotInMips16Mode_IsNotSoftFloat,
CEFBS_NotInMips16Mode_IsPTR64bit,
CEFBS_HasMips3_NotMips64r6_NotCnMips,
CEFBS_HasMips64_HasCnMips_NotInMicroMips,
CEFBS_HasStdEnc_HasMSA_HasMips64,
CEFBS_HasStdEnc_HasMT_NotInMicroMips,
CEFBS_HasStdEnc_HasMips2_NotInMicroMips,
CEFBS_HasStdEnc_HasMips3_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r5_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips,
CEFBS_HasStdEnc_HasMips3_32_NotInMicroMips,
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips,
CEFBS_HasStdEnc_HasMips64r5_HasVirt,
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_NotMips4_32,
CEFBS_HasStdEnc_IsGP64bit_HasMips3,
CEFBS_HasStdEnc_IsGP64bit_HasMips32r2,
CEFBS_HasStdEnc_IsGP64bit_HasMips32r6,
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6,
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat,
CEFBS_HasStdEnc_NotFP64bit_NotMips4_32,
CEFBS_HasStdEnc_NotInMicroMips_NoIndirectJumpGuards,
CEFBS_HasStdEnc_NotInMips16Mode_NotInMicroMips,
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6,
CEFBS_InMicroMips_HasMips32r5_HasVirt,
CEFBS_InMicroMips_HasMips32r6_HasGINV,
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat,
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat,
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat,
CEFBS_InMicroMips_NotMips32r6_HasDSP,
CEFBS_InMicroMips_NotMips32r6_HasEVA,
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat,
CEFBS_InMicroMips_NotMips32r6_NotMips64r6,
CEFBS_NotInMips16Mode_IsFP64bit_IsNotSoftFloat,
CEFBS_NotInMips16Mode_IsGP64bit_NotInMicroMips,
CEFBS_NotInMips16Mode_IsPTR64bit_NoIndirectJumpGuards,
CEFBS_NotInMips16Mode_IsPTR64bit_NotInMicroMips,
CEFBS_NotInMips16Mode_IsPTR64bit_UseIndirectJumpsHazard,
CEFBS_NotInMips16Mode_NotFP64bit_IsNotSoftFloat,
CEFBS_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard,
CEFBS_HasStdEnc_HasMips2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_HasMips2_NotCnMips_NotInMicroMips,
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6,
CEFBS_HasStdEnc_HasMips3_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6,
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6,
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6,
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r6_HasGINV_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_HasMips3_32r2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_HasMips64_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_HasMips64r6_HasCRC_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsGP32bit_HasMips32r6_NotInMicroMips,
CEFBS_HasStdEnc_IsPTR32bit_HasMips32r6_NotInMicroMips,
CEFBS_HasStdEnc_IsPTR64bit_HasMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_InMicroMips_IsFP64bit_HasMips32r6_IsNotSoftFloat,
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat,
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat,
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat_HasMadd4,
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards,
CEFBS_HasStdEnc_HasMips32r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard,
CEFBS_HasStdEnc_HasMips3_32_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat,
CEFBS_HasStdEnc_HasMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards,
CEFBS_HasStdEnc_HasMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard,
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32r2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat,
CEFBS_HasStdEnc_IsGP64bit_HasMips64_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_HasMips32r2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotCnMips_NotInMicroMips,
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat_HasMadd4,
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6_HasEVA_NotInMicroMips,
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat,
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_IsPTR32bit_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_IsPTR64bit_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards,
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards,
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard,
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard,
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips,
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4,
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips5_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_HasMips5_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips,
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4,
CEFBS_HasStdEnc_IsGP64bit_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips,
CEFBS_HasStdEnc_IsPTR64bit_HasMips3_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards,
CEFBS_HasStdEnc_IsPTR64bit_HasMips32r2_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard,
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips,
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4,
};
static constexpr FeatureBitset FeatureBitsets[] = {
{}, // CEFBS_None
{Feature_HasCnMipsBit, },
{Feature_HasCnMipsPBit, },
{Feature_HasDSPBit, },
{Feature_HasDSPR2Bit, },
{Feature_HasMSABit, },
{Feature_HasMTBit, },
{Feature_InMicroMipsBit, },
{Feature_InMips16ModeBit, },
{Feature_IsGP32bitBit, },
{Feature_IsGP64bitBit, },
{Feature_IsNotSoftFloatBit, },
{Feature_NotCnMipsBit, },
{Feature_NotInMips16ModeBit, },
{Feature_HasDSPBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMSABit, },
{Feature_HasStdEncBit, Feature_HasMips32Bit, },
{Feature_HasStdEncBit, Feature_HasMips32r6Bit, },
{Feature_HasStdEncBit, Feature_HasMips64Bit, },
{Feature_HasStdEncBit, Feature_HasMips64r6Bit, },
{Feature_HasStdEncBit, Feature_IsNotSoftFloatBit, },
{Feature_HasStdEncBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotMips3Bit, },
{Feature_HasStdEncBit, Feature_NotMips4_32Bit, },
{Feature_InMicroMipsBit, Feature_HasDSPBit, },
{Feature_InMicroMipsBit, Feature_HasDSPR2Bit, },
{Feature_InMicroMipsBit, Feature_HasDSPR3Bit, },
{Feature_InMicroMipsBit, Feature_HasEVABit, },
{Feature_InMicroMipsBit, Feature_HasMips32r6Bit, },
{Feature_InMicroMipsBit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_NotMips32r6Bit, },
{Feature_IsFP64bitBit, Feature_IsNotSoftFloatBit, },
{Feature_IsGP32bitBit, Feature_NotInMicroMipsBit, },
{Feature_NotFP64bitBit, Feature_IsNotSoftFloatBit, },
{Feature_NotInMips16ModeBit, Feature_HasDSPBit, },
{Feature_NotInMips16ModeBit, Feature_IsGP64bitBit, },
{Feature_NotInMips16ModeBit, Feature_IsNotSoftFloatBit, },
{Feature_NotInMips16ModeBit, Feature_IsPTR64bitBit, },
{Feature_HasMips3Bit, Feature_NotMips64r6Bit, Feature_NotCnMipsBit, },
{Feature_HasMips64Bit, Feature_HasCnMipsBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMSABit, Feature_HasMips64Bit, },
{Feature_HasStdEncBit, Feature_HasMTBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips2Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips3Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r2Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r5Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips3_32Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips64r2Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips64r5Bit, Feature_HasVirtBit, },
{Feature_HasStdEncBit, Feature_HasMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_NotMips4_32Bit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_HasMips3Bit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_HasMips32r2Bit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_HasMips32r6Bit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_HasMips64r6Bit, },
{Feature_HasStdEncBit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_IsNotSoftFloatBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_NotMips4_32Bit, },
{Feature_HasStdEncBit, Feature_NotInMicroMipsBit, Feature_NoIndirectJumpGuardsBit, },
{Feature_HasStdEncBit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, },
{Feature_InMicroMipsBit, Feature_HasMips32r5Bit, Feature_HasVirtBit, },
{Feature_InMicroMipsBit, Feature_HasMips32r6Bit, Feature_HasGINVBit, },
{Feature_InMicroMipsBit, Feature_HasMips32r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_IsFP64bitBit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_NotFP64bitBit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_NotMips32r6Bit, Feature_HasDSPBit, },
{Feature_InMicroMipsBit, Feature_NotMips32r6Bit, Feature_HasEVABit, },
{Feature_InMicroMipsBit, Feature_NotMips32r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, },
{Feature_NotInMips16ModeBit, Feature_IsFP64bitBit, Feature_IsNotSoftFloatBit, },
{Feature_NotInMips16ModeBit, Feature_IsGP64bitBit, Feature_NotInMicroMipsBit, },
{Feature_NotInMips16ModeBit, Feature_IsPTR64bitBit, Feature_NoIndirectJumpGuardsBit, },
{Feature_NotInMips16ModeBit, Feature_IsPTR64bitBit, Feature_NotInMicroMipsBit, },
{Feature_NotInMips16ModeBit, Feature_IsPTR64bitBit, Feature_UseIndirectJumpsHazardBit, },
{Feature_NotInMips16ModeBit, Feature_NotFP64bitBit, Feature_IsNotSoftFloatBit, },
{Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_UseIndirectJumpsHazardBit, },
{Feature_HasStdEncBit, Feature_HasMips2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips2Bit, Feature_NotCnMipsBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, },
{Feature_HasStdEncBit, Feature_HasMips3Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips3Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, },
{Feature_HasStdEncBit, Feature_HasMips32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, },
{Feature_HasStdEncBit, Feature_HasMips32r2Bit, Feature_HasEVABit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, },
{Feature_HasStdEncBit, Feature_HasMips32r5Bit, Feature_HasVirtBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r6Bit, Feature_HasCRCBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r6Bit, Feature_HasGINVBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips3_32r2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips4_32r2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips64Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips64r6Bit, Feature_HasCRCBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsGP32bitBit, Feature_HasMips32r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsPTR32bitBit, Feature_HasMips32r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsPTR64bitBit, Feature_HasMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_InMicroMipsBit, Feature_IsFP64bitBit, Feature_HasMips32r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_IsFP64bitBit, Feature_NotMips32r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_NotFP64bitBit, Feature_NotMips32r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_InMicroMipsBit, Feature_NotMips32r6Bit, Feature_IsNotSoftFloatBit, Feature_HasMadd4Bit, },
{Feature_HasStdEncBit, Feature_HasMips2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips3Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_NoIndirectJumpGuardsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_UseIndirectJumpsHazardBit, },
{Feature_HasStdEncBit, Feature_HasMips3_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips4_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_HasStdEncBit, Feature_HasMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_NoIndirectJumpGuardsBit, },
{Feature_HasStdEncBit, Feature_HasMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_UseIndirectJumpsHazardBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips32r2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips3_32Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips3_32r2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips4_32r2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_HasMips64Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips32r2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips4_32r2Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotCnMipsBit, Feature_NotInMicroMipsBit, },
{Feature_InMicroMipsBit, Feature_NotFP64bitBit, Feature_NotMips32r6Bit, Feature_IsNotSoftFloatBit, Feature_HasMadd4Bit, },
{Feature_HasStdEncBit, Feature_HasMips2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_HasEVABit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips4_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_HasMips4_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsPTR32bitBit, Feature_HasMips2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsPTR64bitBit, Feature_HasMips2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_NoIndirectJumpGuardsBit, },
{Feature_HasStdEncBit, Feature_HasMips3Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_NoIndirectJumpGuardsBit, },
{Feature_HasStdEncBit, Feature_HasMips32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_UseIndirectJumpsHazardBit, },
{Feature_HasStdEncBit, Feature_HasMips32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_UseIndirectJumpsHazardBit, },
{Feature_HasStdEncBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_HasMadd4Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, Feature_HasMadd4Bit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips4_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips5_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_HasMips4_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips4_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips5_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_HasMadd4Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsFP64bitBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, Feature_HasMadd4Bit, },
{Feature_HasStdEncBit, Feature_IsGP64bitBit, Feature_IsFP64bitBit, Feature_HasMips4_32Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_IsPTR64bitBit, Feature_HasMips3Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_NoIndirectJumpGuardsBit, },
{Feature_HasStdEncBit, Feature_IsPTR64bitBit, Feature_HasMips32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_NotInMips16ModeBit, Feature_NotInMicroMipsBit, Feature_UseIndirectJumpsHazardBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_HasMadd4Bit, Feature_NotInMicroMipsBit, },
{Feature_HasStdEncBit, Feature_NotFP64bitBit, Feature_HasMips4_32r2Bit, Feature_NotMips32r6Bit, Feature_NotMips64r6Bit, Feature_IsNotSoftFloatBit, Feature_NotInMicroMipsBit, Feature_HasMadd4Bit, },
};
#endif // NDEBUG
void MipsMCCodeEmitter::verifyInstructionPredicates(
const MCInst &Inst, const FeatureBitset &AvailableFeatures) const {
#ifndef NDEBUG
static uint8_t RequiredFeaturesRefs[] = {
CEFBS_None, // PHI = 0
CEFBS_None, // INLINEASM = 1
CEFBS_None, // INLINEASM_BR = 2
CEFBS_None, // CFI_INSTRUCTION = 3
CEFBS_None, // EH_LABEL = 4
CEFBS_None, // GC_LABEL = 5
CEFBS_None, // ANNOTATION_LABEL = 6
CEFBS_None, // KILL = 7
CEFBS_None, // EXTRACT_SUBREG = 8
CEFBS_None, // INSERT_SUBREG = 9
CEFBS_None, // IMPLICIT_DEF = 10
CEFBS_None, // SUBREG_TO_REG = 11
CEFBS_None, // COPY_TO_REGCLASS = 12
CEFBS_None, // DBG_VALUE = 13
CEFBS_None, // DBG_LABEL = 14
CEFBS_None, // REG_SEQUENCE = 15
CEFBS_None, // COPY = 16
CEFBS_None, // BUNDLE = 17
CEFBS_None, // LIFETIME_START = 18
CEFBS_None, // LIFETIME_END = 19
CEFBS_None, // STACKMAP = 20
CEFBS_None, // FENTRY_CALL = 21
CEFBS_None, // PATCHPOINT = 22
CEFBS_None, // LOAD_STACK_GUARD = 23
CEFBS_None, // STATEPOINT = 24
CEFBS_None, // LOCAL_ESCAPE = 25
CEFBS_None, // FAULTING_OP = 26
CEFBS_None, // PATCHABLE_OP = 27
CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 28
CEFBS_None, // PATCHABLE_RET = 29
CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 30
CEFBS_None, // PATCHABLE_TAIL_CALL = 31
CEFBS_None, // PATCHABLE_EVENT_CALL = 32
CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 33
CEFBS_None, // ICALL_BRANCH_FUNNEL = 34
CEFBS_None, // G_ADD = 35
CEFBS_None, // G_SUB = 36
CEFBS_None, // G_MUL = 37
CEFBS_None, // G_SDIV = 38
CEFBS_None, // G_UDIV = 39
CEFBS_None, // G_SREM = 40
CEFBS_None, // G_UREM = 41
CEFBS_None, // G_AND = 42
CEFBS_None, // G_OR = 43
CEFBS_None, // G_XOR = 44
CEFBS_None, // G_IMPLICIT_DEF = 45
CEFBS_None, // G_PHI = 46
CEFBS_None, // G_FRAME_INDEX = 47
CEFBS_None, // G_GLOBAL_VALUE = 48
CEFBS_None, // G_EXTRACT = 49
CEFBS_None, // G_UNMERGE_VALUES = 50
CEFBS_None, // G_INSERT = 51
CEFBS_None, // G_MERGE_VALUES = 52
CEFBS_None, // G_BUILD_VECTOR = 53
CEFBS_None, // G_BUILD_VECTOR_TRUNC = 54
CEFBS_None, // G_CONCAT_VECTORS = 55
CEFBS_None, // G_PTRTOINT = 56
CEFBS_None, // G_INTTOPTR = 57
CEFBS_None, // G_BITCAST = 58
CEFBS_None, // G_INTRINSIC_TRUNC = 59
CEFBS_None, // G_INTRINSIC_ROUND = 60
CEFBS_None, // G_READCYCLECOUNTER = 61
CEFBS_None, // G_LOAD = 62
CEFBS_None, // G_SEXTLOAD = 63
CEFBS_None, // G_ZEXTLOAD = 64
CEFBS_None, // G_INDEXED_LOAD = 65
CEFBS_None, // G_INDEXED_SEXTLOAD = 66
CEFBS_None, // G_INDEXED_ZEXTLOAD = 67
CEFBS_None, // G_STORE = 68
CEFBS_None, // G_INDEXED_STORE = 69
CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 70
CEFBS_None, // G_ATOMIC_CMPXCHG = 71
CEFBS_None, // G_ATOMICRMW_XCHG = 72
CEFBS_None, // G_ATOMICRMW_ADD = 73
CEFBS_None, // G_ATOMICRMW_SUB = 74
CEFBS_None, // G_ATOMICRMW_AND = 75
CEFBS_None, // G_ATOMICRMW_NAND = 76
CEFBS_None, // G_ATOMICRMW_OR = 77
CEFBS_None, // G_ATOMICRMW_XOR = 78
CEFBS_None, // G_ATOMICRMW_MAX = 79
CEFBS_None, // G_ATOMICRMW_MIN = 80
CEFBS_None, // G_ATOMICRMW_UMAX = 81
CEFBS_None, // G_ATOMICRMW_UMIN = 82
CEFBS_None, // G_ATOMICRMW_FADD = 83
CEFBS_None, // G_ATOMICRMW_FSUB = 84
CEFBS_None, // G_FENCE = 85
CEFBS_None, // G_BRCOND = 86
CEFBS_None, // G_BRINDIRECT = 87
CEFBS_None, // G_INTRINSIC = 88
CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 89
CEFBS_None, // G_ANYEXT = 90
CEFBS_None, // G_TRUNC = 91
CEFBS_None, // G_CONSTANT = 92
CEFBS_None, // G_FCONSTANT = 93
CEFBS_None, // G_VASTART = 94
CEFBS_None, // G_VAARG = 95
CEFBS_None, // G_SEXT = 96
CEFBS_None, // G_SEXT_INREG = 97
CEFBS_None, // G_ZEXT = 98
CEFBS_None, // G_SHL = 99
CEFBS_None, // G_LSHR = 100
CEFBS_None, // G_ASHR = 101
CEFBS_None, // G_ICMP = 102
CEFBS_None, // G_FCMP = 103
CEFBS_None, // G_SELECT = 104
CEFBS_None, // G_UADDO = 105
CEFBS_None, // G_UADDE = 106
CEFBS_None, // G_USUBO = 107
CEFBS_None, // G_USUBE = 108
CEFBS_None, // G_SADDO = 109
CEFBS_None, // G_SADDE = 110
CEFBS_None, // G_SSUBO = 111
CEFBS_None, // G_SSUBE = 112
CEFBS_None, // G_UMULO = 113
CEFBS_None, // G_SMULO = 114
CEFBS_None, // G_UMULH = 115
CEFBS_None, // G_SMULH = 116
CEFBS_None, // G_FADD = 117
CEFBS_None, // G_FSUB = 118
CEFBS_None, // G_FMUL = 119
CEFBS_None, // G_FMA = 120
CEFBS_None, // G_FMAD = 121
CEFBS_None, // G_FDIV = 122
CEFBS_None, // G_FREM = 123
CEFBS_None, // G_FPOW = 124
CEFBS_None, // G_FEXP = 125
CEFBS_None, // G_FEXP2 = 126
CEFBS_None, // G_FLOG = 127
CEFBS_None, // G_FLOG2 = 128
CEFBS_None, // G_FLOG10 = 129
CEFBS_None, // G_FNEG = 130
CEFBS_None, // G_FPEXT = 131
CEFBS_None, // G_FPTRUNC = 132
CEFBS_None, // G_FPTOSI = 133
CEFBS_None, // G_FPTOUI = 134
CEFBS_None, // G_SITOFP = 135
CEFBS_None, // G_UITOFP = 136
CEFBS_None, // G_FABS = 137
CEFBS_None, // G_FCOPYSIGN = 138
CEFBS_None, // G_FCANONICALIZE = 139
CEFBS_None, // G_FMINNUM = 140
CEFBS_None, // G_FMAXNUM = 141
CEFBS_None, // G_FMINNUM_IEEE = 142
CEFBS_None, // G_FMAXNUM_IEEE = 143
CEFBS_None, // G_FMINIMUM = 144
CEFBS_None, // G_FMAXIMUM = 145
CEFBS_None, // G_PTR_ADD = 146
CEFBS_None, // G_PTR_MASK = 147
CEFBS_None, // G_SMIN = 148
CEFBS_None, // G_SMAX = 149
CEFBS_None, // G_UMIN = 150
CEFBS_None, // G_UMAX = 151
CEFBS_None, // G_BR = 152
CEFBS_None, // G_BRJT = 153
CEFBS_None, // G_INSERT_VECTOR_ELT = 154
CEFBS_None, // G_EXTRACT_VECTOR_ELT = 155
CEFBS_None, // G_SHUFFLE_VECTOR = 156
CEFBS_None, // G_CTTZ = 157
CEFBS_None, // G_CTTZ_ZERO_UNDEF = 158
CEFBS_None, // G_CTLZ = 159
CEFBS_None, // G_CTLZ_ZERO_UNDEF = 160
CEFBS_None, // G_CTPOP = 161
CEFBS_None, // G_BSWAP = 162
CEFBS_None, // G_BITREVERSE = 163
CEFBS_None, // G_FCEIL = 164
CEFBS_None, // G_FCOS = 165
CEFBS_None, // G_FSIN = 166
CEFBS_None, // G_FSQRT = 167
CEFBS_None, // G_FFLOOR = 168
CEFBS_None, // G_FRINT = 169
CEFBS_None, // G_FNEARBYINT = 170
CEFBS_None, // G_ADDRSPACE_CAST = 171
CEFBS_None, // G_BLOCK_ADDR = 172
CEFBS_None, // G_JUMP_TABLE = 173
CEFBS_None, // G_DYN_STACKALLOC = 174
CEFBS_None, // G_READ_REGISTER = 175
CEFBS_None, // G_WRITE_REGISTER = 176
CEFBS_None, // ABSMacro = 177
CEFBS_None, // ADJCALLSTACKDOWN = 178
CEFBS_None, // ADJCALLSTACKUP = 179
CEFBS_HasStdEnc_HasMSA, // AND_V_D_PSEUDO = 180
CEFBS_HasStdEnc_HasMSA, // AND_V_H_PSEUDO = 181
CEFBS_HasStdEnc_HasMSA, // AND_V_W_PSEUDO = 182
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I16 = 183
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I16_POSTRA = 184
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I32 = 185
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I32_POSTRA = 186
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I64 = 187
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I64_POSTRA = 188
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I8 = 189
CEFBS_NotInMips16Mode, // ATOMIC_CMP_SWAP_I8_POSTRA = 190
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I16 = 191
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I16_POSTRA = 192
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I32 = 193
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I32_POSTRA = 194
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I64 = 195
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I64_POSTRA = 196
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I8 = 197
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_ADD_I8_POSTRA = 198
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I16 = 199
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I16_POSTRA = 200
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I32 = 201
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I32_POSTRA = 202
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I64 = 203
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I64_POSTRA = 204
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I8 = 205
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_AND_I8_POSTRA = 206
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I16 = 207
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I16_POSTRA = 208
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I32 = 209
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I32_POSTRA = 210
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I64 = 211
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I64_POSTRA = 212
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I8 = 213
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MAX_I8_POSTRA = 214
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I16 = 215
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I16_POSTRA = 216
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I32 = 217
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I32_POSTRA = 218
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I64 = 219
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I64_POSTRA = 220
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I8 = 221
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_MIN_I8_POSTRA = 222
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I16 = 223
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I16_POSTRA = 224
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I32 = 225
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I32_POSTRA = 226
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I64 = 227
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I64_POSTRA = 228
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I8 = 229
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_NAND_I8_POSTRA = 230
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I16 = 231
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I16_POSTRA = 232
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I32 = 233
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I32_POSTRA = 234
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I64 = 235
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I64_POSTRA = 236
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I8 = 237
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_OR_I8_POSTRA = 238
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I16 = 239
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I16_POSTRA = 240
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I32 = 241
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I32_POSTRA = 242
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I64 = 243
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I64_POSTRA = 244
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I8 = 245
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_SUB_I8_POSTRA = 246
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I16 = 247
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I16_POSTRA = 248
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I32 = 249
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I32_POSTRA = 250
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I64 = 251
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I64_POSTRA = 252
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I8 = 253
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMAX_I8_POSTRA = 254
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I16 = 255
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I16_POSTRA = 256
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I32 = 257
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I32_POSTRA = 258
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I64 = 259
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I64_POSTRA = 260
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I8 = 261
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_UMIN_I8_POSTRA = 262
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I16 = 263
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I16_POSTRA = 264
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I32 = 265
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I32_POSTRA = 266
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I64 = 267
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I64_POSTRA = 268
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I8 = 269
CEFBS_NotInMips16Mode, // ATOMIC_LOAD_XOR_I8_POSTRA = 270
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I16 = 271
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I16_POSTRA = 272
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I32 = 273
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I32_POSTRA = 274
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I64 = 275
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I64_POSTRA = 276
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I8 = 277
CEFBS_NotInMips16Mode, // ATOMIC_SWAP_I8_POSTRA = 278
CEFBS_HasStdEnc_NotInMicroMips, // B = 279
CEFBS_HasStdEnc_NotInMicroMips, // BAL_BR = 280
CEFBS_InMicroMips_NotMips32r6, // BAL_BR_MM = 281
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BEQLImmMacro = 282
CEFBS_None, // BGE = 283
CEFBS_None, // BGEImmMacro = 284
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGEL = 285
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGELImmMacro = 286
CEFBS_None, // BGEU = 287
CEFBS_None, // BGEUImmMacro = 288
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGEUL = 289
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGEULImmMacro = 290
CEFBS_None, // BGT = 291
CEFBS_None, // BGTImmMacro = 292
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGTL = 293
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGTLImmMacro = 294
CEFBS_None, // BGTU = 295
CEFBS_None, // BGTUImmMacro = 296
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGTUL = 297
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BGTULImmMacro = 298
CEFBS_None, // BLE = 299
CEFBS_None, // BLEImmMacro = 300
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLEL = 301
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLELImmMacro = 302
CEFBS_None, // BLEU = 303
CEFBS_None, // BLEUImmMacro = 304
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLEUL = 305
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLEULImmMacro = 306
CEFBS_None, // BLT = 307
CEFBS_None, // BLTImmMacro = 308
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLTL = 309
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLTLImmMacro = 310
CEFBS_None, // BLTU = 311
CEFBS_None, // BLTUImmMacro = 312
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLTUL = 313
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BLTULImmMacro = 314
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6, // BNELImmMacro = 315
CEFBS_None, // BPOSGE32_PSEUDO = 316
CEFBS_HasStdEnc_HasMSA, // BSEL_D_PSEUDO = 317
CEFBS_HasStdEnc_HasMSA, // BSEL_FD_PSEUDO = 318
CEFBS_HasStdEnc_HasMSA, // BSEL_FW_PSEUDO = 319
CEFBS_HasStdEnc_HasMSA, // BSEL_H_PSEUDO = 320
CEFBS_HasStdEnc_HasMSA, // BSEL_W_PSEUDO = 321
CEFBS_InMicroMips_NotMips32r6, // B_MM = 322
CEFBS_None, // B_MMR6_Pseudo = 323
CEFBS_InMicroMips, // B_MM_Pseudo = 324
CEFBS_None, // BeqImm = 325
CEFBS_None, // BneImm = 326
CEFBS_InMips16Mode, // BteqzT8CmpX16 = 327
CEFBS_InMips16Mode, // BteqzT8CmpiX16 = 328
CEFBS_InMips16Mode, // BteqzT8SltX16 = 329
CEFBS_InMips16Mode, // BteqzT8SltiX16 = 330
CEFBS_InMips16Mode, // BteqzT8SltiuX16 = 331
CEFBS_InMips16Mode, // BteqzT8SltuX16 = 332
CEFBS_InMips16Mode, // BtnezT8CmpX16 = 333
CEFBS_InMips16Mode, // BtnezT8CmpiX16 = 334
CEFBS_InMips16Mode, // BtnezT8SltX16 = 335
CEFBS_InMips16Mode, // BtnezT8SltiX16 = 336
CEFBS_InMips16Mode, // BtnezT8SltiuX16 = 337
CEFBS_InMips16Mode, // BtnezT8SltuX16 = 338
CEFBS_NotInMips16Mode_NotFP64bit_IsNotSoftFloat, // BuildPairF64 = 339
CEFBS_NotInMips16Mode_IsFP64bit_IsNotSoftFloat, // BuildPairF64_64 = 340
CEFBS_HasMT, // CFTC1 = 341
CEFBS_InMips16Mode, // CONSTPOOL_ENTRY = 342
CEFBS_HasStdEnc_HasMSA, // COPY_FD_PSEUDO = 343
CEFBS_HasStdEnc_HasMSA, // COPY_FW_PSEUDO = 344
CEFBS_HasMT, // CTTC1 = 345
CEFBS_InMips16Mode, // Constant32 = 346
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // DMULImmMacro = 347
CEFBS_HasMips3_NotMips64r6_NotCnMips, // DMULMacro = 348
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // DMULOMacro = 349
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // DMULOUMacro = 350
CEFBS_HasStdEnc_HasMips64, // DROL = 351
CEFBS_HasStdEnc_HasMips64, // DROLImm = 352
CEFBS_HasStdEnc_HasMips64, // DROR = 353
CEFBS_HasStdEnc_HasMips64, // DRORImm = 354
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DSDivIMacro = 355
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DSDivMacro = 356
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DSRemIMacro = 357
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DSRemMacro = 358
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DUDivIMacro = 359
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DUDivMacro = 360
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DURemIMacro = 361
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DURemMacro = 362
CEFBS_NotInMips16Mode, // ERet = 363
CEFBS_NotInMips16Mode_NotFP64bit_IsNotSoftFloat, // ExtractElementF64 = 364
CEFBS_NotInMips16Mode_IsFP64bit_IsNotSoftFloat, // ExtractElementF64_64 = 365
CEFBS_HasStdEnc_HasMSA, // FABS_D = 366
CEFBS_HasStdEnc_HasMSA, // FABS_W = 367
CEFBS_HasStdEnc_HasMSA, // FEXP2_D_1_PSEUDO = 368
CEFBS_HasStdEnc_HasMSA, // FEXP2_W_1_PSEUDO = 369
CEFBS_HasStdEnc_HasMSA, // FILL_FD_PSEUDO = 370
CEFBS_HasStdEnc_HasMSA, // FILL_FW_PSEUDO = 371
CEFBS_InMips16Mode, // GotPrologue16 = 372
CEFBS_HasStdEnc_HasMSA, // INSERT_B_VIDX64_PSEUDO = 373
CEFBS_HasStdEnc_HasMSA, // INSERT_B_VIDX_PSEUDO = 374
CEFBS_HasStdEnc_HasMSA, // INSERT_D_VIDX64_PSEUDO = 375
CEFBS_HasStdEnc_HasMSA, // INSERT_D_VIDX_PSEUDO = 376
CEFBS_HasStdEnc_HasMSA, // INSERT_FD_PSEUDO = 377
CEFBS_HasStdEnc_HasMSA, // INSERT_FD_VIDX64_PSEUDO = 378
CEFBS_HasStdEnc_HasMSA, // INSERT_FD_VIDX_PSEUDO = 379
CEFBS_HasStdEnc_HasMSA, // INSERT_FW_PSEUDO = 380
CEFBS_HasStdEnc_HasMSA, // INSERT_FW_VIDX64_PSEUDO = 381
CEFBS_HasStdEnc_HasMSA, // INSERT_FW_VIDX_PSEUDO = 382
CEFBS_HasStdEnc_HasMSA, // INSERT_H_VIDX64_PSEUDO = 383
CEFBS_HasStdEnc_HasMSA, // INSERT_H_VIDX_PSEUDO = 384
CEFBS_HasStdEnc_HasMSA, // INSERT_W_VIDX64_PSEUDO = 385
CEFBS_HasStdEnc_HasMSA, // INSERT_W_VIDX_PSEUDO = 386
CEFBS_NotInMips16Mode_IsPTR64bit_NoIndirectJumpGuards, // JALR64Pseudo = 387
CEFBS_NotInMips16Mode_IsPTR64bit_UseIndirectJumpsHazard, // JALRHB64Pseudo = 388
CEFBS_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // JALRHBPseudo = 389
CEFBS_HasStdEnc_NotInMicroMips_NoIndirectJumpGuards, // JALRPseudo = 390
CEFBS_InMicroMips_HasMips32r6, // JAL_MMR6 = 391
CEFBS_None, // JalOneReg = 392
CEFBS_None, // JalTwoReg = 393
CEFBS_HasStdEnc_NotMips3, // LDMacro = 394
CEFBS_HasMSA, // LD_F16 = 395
CEFBS_NotInMips16Mode, // LOAD_ACC128 = 396
CEFBS_NotInMips16Mode, // LOAD_ACC64 = 397
CEFBS_NotInMips16Mode, // LOAD_ACC64DSP = 398
CEFBS_NotInMips16Mode, // LOAD_CCOND_DSP = 399
CEFBS_NotInMips16Mode, // LONG_BRANCH_ADDiu = 400
CEFBS_NotInMips16Mode, // LONG_BRANCH_ADDiu2Op = 401
CEFBS_NotInMips16Mode_IsGP64bit, // LONG_BRANCH_DADDiu = 402
CEFBS_NotInMips16Mode_IsGP64bit, // LONG_BRANCH_DADDiu2Op = 403
CEFBS_NotInMips16Mode, // LONG_BRANCH_LUi = 404
CEFBS_NotInMips16Mode, // LONG_BRANCH_LUi2Op = 405
CEFBS_NotInMips16Mode_IsGP64bit, // LONG_BRANCH_LUi2Op_64 = 406
CEFBS_InMicroMips, // LWM_MM = 407
CEFBS_None, // LoadAddrImm32 = 408
CEFBS_None, // LoadAddrImm64 = 409
CEFBS_None, // LoadAddrReg32 = 410
CEFBS_None, // LoadAddrReg64 = 411
CEFBS_None, // LoadImm32 = 412
CEFBS_None, // LoadImm64 = 413
CEFBS_IsFP64bit_IsNotSoftFloat, // LoadImmDoubleFGR = 414
CEFBS_NotFP64bit_IsNotSoftFloat, // LoadImmDoubleFGR_32 = 415
CEFBS_None, // LoadImmDoubleGPR = 416
CEFBS_IsNotSoftFloat, // LoadImmSingleFGR = 417
CEFBS_None, // LoadImmSingleGPR = 418
CEFBS_InMips16Mode, // LwConstant32 = 419
CEFBS_HasMT, // MFTACX = 420
CEFBS_HasMT, // MFTC0 = 421
CEFBS_HasMT, // MFTC1 = 422
CEFBS_HasMT, // MFTDSP = 423
CEFBS_HasMT, // MFTGPR = 424
CEFBS_HasMT, // MFTHC1 = 425
CEFBS_HasMT, // MFTHI = 426
CEFBS_HasMT, // MFTLO = 427
CEFBS_None, // MIPSeh_return32 = 428
CEFBS_None, // MIPSeh_return64 = 429
CEFBS_HasMSA, // MSA_FP_EXTEND_D_PSEUDO = 430
CEFBS_HasMSA, // MSA_FP_EXTEND_W_PSEUDO = 431
CEFBS_HasMSA, // MSA_FP_ROUND_D_PSEUDO = 432
CEFBS_HasMSA, // MSA_FP_ROUND_W_PSEUDO = 433
CEFBS_HasMT, // MTTACX = 434
CEFBS_HasMT, // MTTC0 = 435
CEFBS_HasMT, // MTTC1 = 436
CEFBS_HasMT, // MTTDSP = 437
CEFBS_HasMT, // MTTGPR = 438
CEFBS_HasMT, // MTTHC1 = 439
CEFBS_HasMT, // MTTHI = 440
CEFBS_HasMT, // MTTLO = 441
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // MULImmMacro = 442
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // MULOMacro = 443
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // MULOUMacro = 444
CEFBS_InMips16Mode, // MultRxRy16 = 445
CEFBS_InMips16Mode, // MultRxRyRz16 = 446
CEFBS_InMips16Mode, // MultuRxRy16 = 447
CEFBS_InMips16Mode, // MultuRxRyRz16 = 448
CEFBS_HasStdEnc_NotInMicroMips, // NOP = 449
CEFBS_IsGP32bit, // NORImm = 450
CEFBS_IsGP64bit, // NORImm64 = 451
CEFBS_HasStdEnc_HasMSA, // NOR_V_D_PSEUDO = 452
CEFBS_HasStdEnc_HasMSA, // NOR_V_H_PSEUDO = 453
CEFBS_HasStdEnc_HasMSA, // NOR_V_W_PSEUDO = 454
CEFBS_HasStdEnc_HasMSA, // OR_V_D_PSEUDO = 455
CEFBS_HasStdEnc_HasMSA, // OR_V_H_PSEUDO = 456
CEFBS_HasStdEnc_HasMSA, // OR_V_W_PSEUDO = 457
CEFBS_HasDSP, // PseudoCMPU_EQ_QB = 458
CEFBS_HasDSP, // PseudoCMPU_LE_QB = 459
CEFBS_HasDSP, // PseudoCMPU_LT_QB = 460
CEFBS_HasDSP, // PseudoCMP_EQ_PH = 461
CEFBS_HasDSP, // PseudoCMP_LE_PH = 462
CEFBS_HasDSP, // PseudoCMP_LT_PH = 463
CEFBS_NotInMips16Mode_IsNotSoftFloat, // PseudoCVT_D32_W = 464
CEFBS_NotInMips16Mode_IsNotSoftFloat, // PseudoCVT_D64_L = 465
CEFBS_NotInMips16Mode_IsNotSoftFloat, // PseudoCVT_D64_W = 466
CEFBS_NotInMips16Mode_IsNotSoftFloat, // PseudoCVT_S_L = 467
CEFBS_NotInMips16Mode_IsNotSoftFloat, // PseudoCVT_S_W = 468
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // PseudoDMULT = 469
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // PseudoDMULTu = 470
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // PseudoDSDIV = 471
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // PseudoDUDIV = 472
CEFBS_HasStdEnc_NotMips4_32, // PseudoD_SELECT_I = 473
CEFBS_HasStdEnc_NotMips4_32, // PseudoD_SELECT_I64 = 474
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // PseudoIndirectBranch = 475
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // PseudoIndirectBranch64 = 476
CEFBS_HasStdEnc_HasMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // PseudoIndirectBranch64R6 = 477
CEFBS_HasStdEnc_HasMips32r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // PseudoIndirectBranchR6 = 478
CEFBS_InMicroMips_NotMips32r6, // PseudoIndirectBranch_MM = 479
CEFBS_InMicroMips_HasMips32r6, // PseudoIndirectBranch_MMR6 = 480
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // PseudoIndirectHazardBranch = 481
CEFBS_HasStdEnc_IsPTR64bit_HasMips32r2_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // PseudoIndirectHazardBranch64 = 482
CEFBS_HasStdEnc_HasMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // PseudoIndrectHazardBranch64R6 = 483
CEFBS_HasStdEnc_HasMips32r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // PseudoIndrectHazardBranchR6 = 484
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6, // PseudoMADD = 485
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6, // PseudoMADDU = 486
CEFBS_InMicroMips_NotMips32r6, // PseudoMADDU_MM = 487
CEFBS_InMicroMips_NotMips32r6, // PseudoMADD_MM = 488
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // PseudoMFHI = 489
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // PseudoMFHI64 = 490
CEFBS_InMicroMips_NotMips32r6, // PseudoMFHI_MM = 491
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // PseudoMFLO = 492
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // PseudoMFLO64 = 493
CEFBS_InMicroMips_NotMips32r6, // PseudoMFLO_MM = 494
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6, // PseudoMSUB = 495
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6, // PseudoMSUBU = 496
CEFBS_InMicroMips_NotMips32r6, // PseudoMSUBU_MM = 497
CEFBS_InMicroMips_NotMips32r6, // PseudoMSUB_MM = 498
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // PseudoMTLOHI = 499
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // PseudoMTLOHI64 = 500
CEFBS_NotInMips16Mode_HasDSP, // PseudoMTLOHI_DSP = 501
CEFBS_InMicroMips_NotMips32r6, // PseudoMTLOHI_MM = 502
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // PseudoMULT = 503
CEFBS_InMicroMips_NotMips32r6, // PseudoMULT_MM = 504
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // PseudoMULTu = 505
CEFBS_InMicroMips_NotMips32r6, // PseudoMULTu_MM = 506
CEFBS_HasDSP, // PseudoPICK_PH = 507
CEFBS_HasDSP, // PseudoPICK_QB = 508
CEFBS_None, // PseudoReturn = 509
CEFBS_IsGP64bit, // PseudoReturn64 = 510
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // PseudoSDIV = 511
CEFBS_HasStdEnc_NotFP64bit_NotMips4_32, // PseudoSELECTFP_F_D32 = 512
CEFBS_HasStdEnc_IsFP64bit_NotMips4_32, // PseudoSELECTFP_F_D64 = 513
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECTFP_F_I = 514
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECTFP_F_I64 = 515
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECTFP_F_S = 516
CEFBS_HasStdEnc_NotFP64bit_NotMips4_32, // PseudoSELECTFP_T_D32 = 517
CEFBS_HasStdEnc_IsFP64bit_NotMips4_32, // PseudoSELECTFP_T_D64 = 518
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECTFP_T_I = 519
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECTFP_T_I64 = 520
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECTFP_T_S = 521
CEFBS_HasStdEnc_NotFP64bit_NotMips4_32, // PseudoSELECT_D32 = 522
CEFBS_HasStdEnc_IsFP64bit_NotMips4_32, // PseudoSELECT_D64 = 523
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECT_I = 524
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECT_I64 = 525
CEFBS_HasStdEnc_NotMips4_32, // PseudoSELECT_S = 526
CEFBS_IsFP64bit_IsNotSoftFloat, // PseudoTRUNC_W_D = 527
CEFBS_NotFP64bit_IsNotSoftFloat, // PseudoTRUNC_W_D32 = 528
CEFBS_None, // PseudoTRUNC_W_S = 529
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // PseudoUDIV = 530
CEFBS_None, // ROL = 531
CEFBS_None, // ROLImm = 532
CEFBS_None, // ROR = 533
CEFBS_None, // RORImm = 534
CEFBS_NotInMips16Mode, // RetRA = 535
CEFBS_InMips16Mode, // RetRA16 = 536
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat, // SDC1_M1 = 537
CEFBS_InMicroMips_NotMips32r6_NotMips64r6, // SDIV_MM_Pseudo = 538
CEFBS_HasStdEnc_NotMips3, // SDMacro = 539
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // SDivIMacro = 540
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // SDivMacro = 541
CEFBS_NotCnMips, // SEQIMacro = 542
CEFBS_NotCnMips, // SEQMacro = 543
CEFBS_HasStdEnc_NotInMicroMips, // SGE = 544
CEFBS_IsGP32bit_NotInMicroMips, // SGEImm = 545
CEFBS_IsGP64bit, // SGEImm64 = 546
CEFBS_HasStdEnc_NotInMicroMips, // SGEU = 547
CEFBS_IsGP32bit_NotInMicroMips, // SGEUImm = 548
CEFBS_IsGP64bit, // SGEUImm64 = 549
CEFBS_IsGP32bit_NotInMicroMips, // SGTImm = 550
CEFBS_IsGP64bit, // SGTImm64 = 551
CEFBS_IsGP32bit_NotInMicroMips, // SGTUImm = 552
CEFBS_IsGP64bit, // SGTUImm64 = 553
CEFBS_IsGP64bit, // SLTImm64 = 554
CEFBS_IsGP64bit, // SLTUImm64 = 555
CEFBS_None, // SNZ_B_PSEUDO = 556
CEFBS_None, // SNZ_D_PSEUDO = 557
CEFBS_None, // SNZ_H_PSEUDO = 558
CEFBS_None, // SNZ_V_PSEUDO = 559
CEFBS_None, // SNZ_W_PSEUDO = 560
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // SRemIMacro = 561
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // SRemMacro = 562
CEFBS_NotInMips16Mode, // STORE_ACC128 = 563
CEFBS_NotInMips16Mode, // STORE_ACC64 = 564
CEFBS_NotInMips16Mode, // STORE_ACC64DSP = 565
CEFBS_NotInMips16Mode, // STORE_CCOND_DSP = 566
CEFBS_HasMSA, // ST_F16 = 567
CEFBS_InMicroMips, // SWM_MM = 568
CEFBS_None, // SZ_B_PSEUDO = 569
CEFBS_None, // SZ_D_PSEUDO = 570
CEFBS_None, // SZ_H_PSEUDO = 571
CEFBS_None, // SZ_V_PSEUDO = 572
CEFBS_None, // SZ_W_PSEUDO = 573
CEFBS_HasCnMipsP, // SaaAddr = 574
CEFBS_HasCnMipsP, // SaadAddr = 575
CEFBS_InMips16Mode, // SelBeqZ = 576
CEFBS_InMips16Mode, // SelBneZ = 577
CEFBS_InMips16Mode, // SelTBteqZCmp = 578
CEFBS_InMips16Mode, // SelTBteqZCmpi = 579
CEFBS_InMips16Mode, // SelTBteqZSlt = 580
CEFBS_InMips16Mode, // SelTBteqZSlti = 581
CEFBS_InMips16Mode, // SelTBteqZSltiu = 582
CEFBS_InMips16Mode, // SelTBteqZSltu = 583
CEFBS_InMips16Mode, // SelTBtneZCmp = 584
CEFBS_InMips16Mode, // SelTBtneZCmpi = 585
CEFBS_InMips16Mode, // SelTBtneZSlt = 586
CEFBS_InMips16Mode, // SelTBtneZSlti = 587
CEFBS_InMips16Mode, // SelTBtneZSltiu = 588
CEFBS_InMips16Mode, // SelTBtneZSltu = 589
CEFBS_InMips16Mode, // SltCCRxRy16 = 590
CEFBS_InMips16Mode, // SltiCCRxImmX16 = 591
CEFBS_InMips16Mode, // SltiuCCRxImmX16 = 592
CEFBS_InMips16Mode, // SltuCCRxRy16 = 593
CEFBS_InMips16Mode, // SltuRxRyRz16 = 594
CEFBS_HasStdEnc_NotInMips16Mode_NotInMicroMips, // TAILCALL = 595
CEFBS_HasStdEnc_HasMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // TAILCALL64R6REG = 596
CEFBS_HasStdEnc_HasMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // TAILCALLHB64R6REG = 597
CEFBS_HasStdEnc_HasMips32r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // TAILCALLHBR6REG = 598
CEFBS_HasStdEnc_HasMips32r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // TAILCALLR6REG = 599
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // TAILCALLREG = 600
CEFBS_HasStdEnc_IsPTR64bit_HasMips3_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_NoIndirectJumpGuards, // TAILCALLREG64 = 601
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // TAILCALLREGHB = 602
CEFBS_HasStdEnc_IsPTR64bit_HasMips32r2_NotMips32r6_NotMips64r6_NotInMips16Mode_NotInMicroMips_UseIndirectJumpsHazard, // TAILCALLREGHB64 = 603
CEFBS_InMicroMips_NotMips32r6, // TAILCALLREG_MM = 604
CEFBS_InMicroMips_HasMips32r6, // TAILCALLREG_MMR6 = 605
CEFBS_InMicroMips_NotMips32r6, // TAILCALL_MM = 606
CEFBS_InMicroMips_HasMips32r6, // TAILCALL_MMR6 = 607
CEFBS_HasStdEnc_NotInMicroMips, // TRAP = 608
CEFBS_InMicroMips, // TRAP_MM = 609
CEFBS_InMicroMips_NotMips32r6_NotMips64r6, // UDIV_MM_Pseudo = 610
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // UDivIMacro = 611
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // UDivMacro = 612
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // URemIMacro = 613
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6, // URemMacro = 614
CEFBS_None, // Ulh = 615
CEFBS_None, // Ulhu = 616
CEFBS_None, // Ulw = 617
CEFBS_None, // Ush = 618
CEFBS_None, // Usw = 619
CEFBS_HasStdEnc_HasMSA, // XOR_V_D_PSEUDO = 620
CEFBS_HasStdEnc_HasMSA, // XOR_V_H_PSEUDO = 621
CEFBS_HasStdEnc_HasMSA, // XOR_V_W_PSEUDO = 622
CEFBS_HasDSP, // ABSQ_S_PH = 623
CEFBS_InMicroMips_HasDSP, // ABSQ_S_PH_MM = 624
CEFBS_HasDSPR2, // ABSQ_S_QB = 625
CEFBS_InMicroMips_HasDSPR2, // ABSQ_S_QB_MMR2 = 626
CEFBS_HasDSP, // ABSQ_S_W = 627
CEFBS_InMicroMips_HasDSP, // ABSQ_S_W_MM = 628
CEFBS_HasStdEnc_NotInMicroMips, // ADD = 629
CEFBS_HasStdEnc_HasMips32r6, // ADDIUPC = 630
CEFBS_InMicroMips_NotMips32r6, // ADDIUPC_MM = 631
CEFBS_InMicroMips_HasMips32r6, // ADDIUPC_MMR6 = 632
CEFBS_InMicroMips, // ADDIUR1SP_MM = 633
CEFBS_InMicroMips, // ADDIUR2_MM = 634
CEFBS_InMicroMips, // ADDIUS5_MM = 635
CEFBS_InMicroMips, // ADDIUSP_MM = 636
CEFBS_InMicroMips_HasMips32r6, // ADDIU_MMR6 = 637
CEFBS_HasDSPR2, // ADDQH_PH = 638
CEFBS_InMicroMips_HasDSPR2, // ADDQH_PH_MMR2 = 639
CEFBS_HasDSPR2, // ADDQH_R_PH = 640
CEFBS_InMicroMips_HasDSPR2, // ADDQH_R_PH_MMR2 = 641
CEFBS_HasDSPR2, // ADDQH_R_W = 642
CEFBS_InMicroMips_HasDSPR2, // ADDQH_R_W_MMR2 = 643
CEFBS_HasDSPR2, // ADDQH_W = 644
CEFBS_InMicroMips_HasDSPR2, // ADDQH_W_MMR2 = 645
CEFBS_HasDSP, // ADDQ_PH = 646
CEFBS_InMicroMips_HasDSP, // ADDQ_PH_MM = 647
CEFBS_HasDSP, // ADDQ_S_PH = 648
CEFBS_InMicroMips_HasDSP, // ADDQ_S_PH_MM = 649
CEFBS_HasDSP, // ADDQ_S_W = 650
CEFBS_InMicroMips_HasDSP, // ADDQ_S_W_MM = 651
CEFBS_HasDSP, // ADDSC = 652
CEFBS_InMicroMips_HasDSP, // ADDSC_MM = 653
CEFBS_HasStdEnc_HasMSA, // ADDS_A_B = 654
CEFBS_HasStdEnc_HasMSA, // ADDS_A_D = 655
CEFBS_HasStdEnc_HasMSA, // ADDS_A_H = 656
CEFBS_HasStdEnc_HasMSA, // ADDS_A_W = 657
CEFBS_HasStdEnc_HasMSA, // ADDS_S_B = 658
CEFBS_HasStdEnc_HasMSA, // ADDS_S_D = 659
CEFBS_HasStdEnc_HasMSA, // ADDS_S_H = 660
CEFBS_HasStdEnc_HasMSA, // ADDS_S_W = 661
CEFBS_HasStdEnc_HasMSA, // ADDS_U_B = 662
CEFBS_HasStdEnc_HasMSA, // ADDS_U_D = 663
CEFBS_HasStdEnc_HasMSA, // ADDS_U_H = 664
CEFBS_HasStdEnc_HasMSA, // ADDS_U_W = 665
CEFBS_InMicroMips_NotMips32r6, // ADDU16_MM = 666
CEFBS_InMicroMips_HasMips32r6, // ADDU16_MMR6 = 667
CEFBS_HasDSPR2, // ADDUH_QB = 668
CEFBS_InMicroMips_HasDSPR2, // ADDUH_QB_MMR2 = 669
CEFBS_HasDSPR2, // ADDUH_R_QB = 670
CEFBS_InMicroMips_HasDSPR2, // ADDUH_R_QB_MMR2 = 671
CEFBS_InMicroMips_HasMips32r6, // ADDU_MMR6 = 672
CEFBS_HasDSPR2, // ADDU_PH = 673
CEFBS_InMicroMips_HasDSPR2, // ADDU_PH_MMR2 = 674
CEFBS_HasDSP, // ADDU_QB = 675
CEFBS_InMicroMips_HasDSP, // ADDU_QB_MM = 676
CEFBS_HasDSPR2, // ADDU_S_PH = 677
CEFBS_InMicroMips_HasDSPR2, // ADDU_S_PH_MMR2 = 678
CEFBS_HasDSP, // ADDU_S_QB = 679
CEFBS_InMicroMips_HasDSP, // ADDU_S_QB_MM = 680
CEFBS_HasStdEnc_HasMSA, // ADDVI_B = 681
CEFBS_HasStdEnc_HasMSA, // ADDVI_D = 682
CEFBS_HasStdEnc_HasMSA, // ADDVI_H = 683
CEFBS_HasStdEnc_HasMSA, // ADDVI_W = 684
CEFBS_HasStdEnc_HasMSA, // ADDV_B = 685
CEFBS_HasStdEnc_HasMSA, // ADDV_D = 686
CEFBS_HasStdEnc_HasMSA, // ADDV_H = 687
CEFBS_HasStdEnc_HasMSA, // ADDV_W = 688
CEFBS_HasDSP, // ADDWC = 689
CEFBS_InMicroMips_HasDSP, // ADDWC_MM = 690
CEFBS_HasStdEnc_HasMSA, // ADD_A_B = 691
CEFBS_HasStdEnc_HasMSA, // ADD_A_D = 692
CEFBS_HasStdEnc_HasMSA, // ADD_A_H = 693
CEFBS_HasStdEnc_HasMSA, // ADD_A_W = 694
CEFBS_InMicroMips_NotMips32r6, // ADD_MM = 695
CEFBS_InMicroMips_HasMips32r6, // ADD_MMR6 = 696
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // ADDi = 697
CEFBS_InMicroMips_NotMips32r6, // ADDi_MM = 698
CEFBS_HasStdEnc_NotInMicroMips, // ADDiu = 699
CEFBS_InMicroMips_NotMips32r6, // ADDiu_MM = 700
CEFBS_HasStdEnc_NotInMicroMips, // ADDu = 701
CEFBS_InMicroMips_NotMips32r6, // ADDu_MM = 702
CEFBS_HasStdEnc_HasMips32r6, // ALIGN = 703
CEFBS_InMicroMips_HasMips32r6, // ALIGN_MMR6 = 704
CEFBS_HasStdEnc_HasMips32r6, // ALUIPC = 705
CEFBS_InMicroMips_HasMips32r6, // ALUIPC_MMR6 = 706
CEFBS_HasStdEnc_NotInMicroMips, // AND = 707
CEFBS_InMicroMips_NotMips32r6, // AND16_MM = 708
CEFBS_InMicroMips_HasMips32r6, // AND16_MMR6 = 709
CEFBS_NotInMips16Mode_IsGP64bit, // AND64 = 710
CEFBS_InMicroMips_NotMips32r6, // ANDI16_MM = 711
CEFBS_InMicroMips_HasMips32r6, // ANDI16_MMR6 = 712
CEFBS_HasStdEnc_HasMSA, // ANDI_B = 713
CEFBS_InMicroMips_HasMips32r6, // ANDI_MMR6 = 714
CEFBS_InMicroMips_NotMips32r6, // AND_MM = 715
CEFBS_InMicroMips_HasMips32r6, // AND_MMR6 = 716
CEFBS_HasStdEnc_HasMSA, // AND_V = 717
CEFBS_HasStdEnc_NotInMicroMips, // ANDi = 718
CEFBS_NotInMips16Mode_IsGP64bit, // ANDi64 = 719
CEFBS_InMicroMips_NotMips32r6, // ANDi_MM = 720
CEFBS_HasDSPR2, // APPEND = 721
CEFBS_InMicroMips_HasDSPR2, // APPEND_MMR2 = 722
CEFBS_HasStdEnc_HasMSA, // ASUB_S_B = 723
CEFBS_HasStdEnc_HasMSA, // ASUB_S_D = 724
CEFBS_HasStdEnc_HasMSA, // ASUB_S_H = 725
CEFBS_HasStdEnc_HasMSA, // ASUB_S_W = 726
CEFBS_HasStdEnc_HasMSA, // ASUB_U_B = 727
CEFBS_HasStdEnc_HasMSA, // ASUB_U_D = 728
CEFBS_HasStdEnc_HasMSA, // ASUB_U_H = 729
CEFBS_HasStdEnc_HasMSA, // ASUB_U_W = 730
CEFBS_HasStdEnc_HasMips32r6, // AUI = 731
CEFBS_HasStdEnc_HasMips32r6, // AUIPC = 732
CEFBS_InMicroMips_HasMips32r6, // AUIPC_MMR6 = 733
CEFBS_InMicroMips_HasMips32r6, // AUI_MMR6 = 734
CEFBS_HasStdEnc_HasMSA, // AVER_S_B = 735
CEFBS_HasStdEnc_HasMSA, // AVER_S_D = 736
CEFBS_HasStdEnc_HasMSA, // AVER_S_H = 737
CEFBS_HasStdEnc_HasMSA, // AVER_S_W = 738
CEFBS_HasStdEnc_HasMSA, // AVER_U_B = 739
CEFBS_HasStdEnc_HasMSA, // AVER_U_D = 740
CEFBS_HasStdEnc_HasMSA, // AVER_U_H = 741
CEFBS_HasStdEnc_HasMSA, // AVER_U_W = 742
CEFBS_HasStdEnc_HasMSA, // AVE_S_B = 743
CEFBS_HasStdEnc_HasMSA, // AVE_S_D = 744
CEFBS_HasStdEnc_HasMSA, // AVE_S_H = 745
CEFBS_HasStdEnc_HasMSA, // AVE_S_W = 746
CEFBS_HasStdEnc_HasMSA, // AVE_U_B = 747
CEFBS_HasStdEnc_HasMSA, // AVE_U_D = 748
CEFBS_HasStdEnc_HasMSA, // AVE_U_H = 749
CEFBS_HasStdEnc_HasMSA, // AVE_U_W = 750
CEFBS_InMips16Mode, // AddiuRxImmX16 = 751
CEFBS_InMips16Mode, // AddiuRxPcImmX16 = 752
CEFBS_InMips16Mode, // AddiuRxRxImm16 = 753
CEFBS_InMips16Mode, // AddiuRxRxImmX16 = 754
CEFBS_InMips16Mode, // AddiuRxRyOffMemX16 = 755
CEFBS_InMips16Mode, // AddiuSpImm16 = 756
CEFBS_InMips16Mode, // AddiuSpImmX16 = 757
CEFBS_InMips16Mode, // AdduRxRyRz16 = 758
CEFBS_InMips16Mode, // AndRxRxRy16 = 759
CEFBS_InMicroMips, // B16_MM = 760
CEFBS_HasCnMips, // BADDu = 761
CEFBS_HasStdEnc_HasMips32r6, // BAL = 762
CEFBS_HasStdEnc_HasMips32r6, // BALC = 763
CEFBS_InMicroMips_HasMips32r6, // BALC_MMR6 = 764
CEFBS_HasDSPR2, // BALIGN = 765
CEFBS_InMicroMips_HasDSPR2, // BALIGN_MMR2 = 766
CEFBS_HasCnMips, // BBIT0 = 767
CEFBS_HasCnMips, // BBIT032 = 768
CEFBS_HasCnMips, // BBIT1 = 769
CEFBS_HasCnMips, // BBIT132 = 770
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BC = 771
CEFBS_InMicroMips_HasMips32r6, // BC16_MMR6 = 772
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // BC1EQZ = 773
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // BC1EQZC_MMR6 = 774
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // BC1F = 775
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // BC1FL = 776
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // BC1F_MM = 777
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // BC1NEZ = 778
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // BC1NEZC_MMR6 = 779
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // BC1T = 780
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // BC1TL = 781
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // BC1T_MM = 782
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BC2EQZ = 783
CEFBS_InMicroMips_HasMips32r6, // BC2EQZC_MMR6 = 784
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BC2NEZ = 785
CEFBS_InMicroMips_HasMips32r6, // BC2NEZC_MMR6 = 786
CEFBS_HasStdEnc_HasMSA, // BCLRI_B = 787
CEFBS_HasStdEnc_HasMSA, // BCLRI_D = 788
CEFBS_HasStdEnc_HasMSA, // BCLRI_H = 789
CEFBS_HasStdEnc_HasMSA, // BCLRI_W = 790
CEFBS_HasStdEnc_HasMSA, // BCLR_B = 791
CEFBS_HasStdEnc_HasMSA, // BCLR_D = 792
CEFBS_HasStdEnc_HasMSA, // BCLR_H = 793
CEFBS_HasStdEnc_HasMSA, // BCLR_W = 794
CEFBS_InMicroMips_HasMips32r6, // BC_MMR6 = 795
CEFBS_HasStdEnc_NotInMicroMips, // BEQ = 796
CEFBS_NotInMips16Mode_IsGP64bit, // BEQ64 = 797
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BEQC = 798
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BEQC64 = 799
CEFBS_InMicroMips_HasMips32r6, // BEQC_MMR6 = 800
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BEQL = 801
CEFBS_InMicroMips_NotMips32r6, // BEQZ16_MM = 802
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BEQZALC = 803
CEFBS_InMicroMips_HasMips32r6, // BEQZALC_MMR6 = 804
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BEQZC = 805
CEFBS_InMicroMips_HasMips32r6, // BEQZC16_MMR6 = 806
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BEQZC64 = 807
CEFBS_InMicroMips_NotMips32r6, // BEQZC_MM = 808
CEFBS_InMicroMips_HasMips32r6, // BEQZC_MMR6 = 809
CEFBS_InMicroMips_NotMips32r6, // BEQ_MM = 810
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BGEC = 811
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BGEC64 = 812
CEFBS_InMicroMips_HasMips32r6, // BGEC_MMR6 = 813
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BGEUC = 814
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BGEUC64 = 815
CEFBS_InMicroMips_HasMips32r6, // BGEUC_MMR6 = 816
CEFBS_HasStdEnc_NotInMicroMips, // BGEZ = 817
CEFBS_NotInMips16Mode_IsGP64bit, // BGEZ64 = 818
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // BGEZAL = 819
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BGEZALC = 820
CEFBS_InMicroMips_HasMips32r6, // BGEZALC_MMR6 = 821
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BGEZALL = 822
CEFBS_InMicroMips_NotMips32r6, // BGEZALS_MM = 823
CEFBS_InMicroMips_NotMips32r6, // BGEZAL_MM = 824
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BGEZC = 825
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BGEZC64 = 826
CEFBS_InMicroMips_HasMips32r6, // BGEZC_MMR6 = 827
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BGEZL = 828
CEFBS_InMicroMips_NotMips32r6, // BGEZ_MM = 829
CEFBS_HasStdEnc_NotInMicroMips, // BGTZ = 830
CEFBS_NotInMips16Mode_IsGP64bit, // BGTZ64 = 831
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BGTZALC = 832
CEFBS_InMicroMips_HasMips32r6, // BGTZALC_MMR6 = 833
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BGTZC = 834
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BGTZC64 = 835
CEFBS_InMicroMips_HasMips32r6, // BGTZC_MMR6 = 836
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BGTZL = 837
CEFBS_InMicroMips_NotMips32r6, // BGTZ_MM = 838
CEFBS_HasStdEnc_HasMSA, // BINSLI_B = 839
CEFBS_HasStdEnc_HasMSA, // BINSLI_D = 840
CEFBS_HasStdEnc_HasMSA, // BINSLI_H = 841
CEFBS_HasStdEnc_HasMSA, // BINSLI_W = 842
CEFBS_HasStdEnc_HasMSA, // BINSL_B = 843
CEFBS_HasStdEnc_HasMSA, // BINSL_D = 844
CEFBS_HasStdEnc_HasMSA, // BINSL_H = 845
CEFBS_HasStdEnc_HasMSA, // BINSL_W = 846
CEFBS_HasStdEnc_HasMSA, // BINSRI_B = 847
CEFBS_HasStdEnc_HasMSA, // BINSRI_D = 848
CEFBS_HasStdEnc_HasMSA, // BINSRI_H = 849
CEFBS_HasStdEnc_HasMSA, // BINSRI_W = 850
CEFBS_HasStdEnc_HasMSA, // BINSR_B = 851
CEFBS_HasStdEnc_HasMSA, // BINSR_D = 852
CEFBS_HasStdEnc_HasMSA, // BINSR_H = 853
CEFBS_HasStdEnc_HasMSA, // BINSR_W = 854
CEFBS_HasDSP, // BITREV = 855
CEFBS_InMicroMips_HasDSP, // BITREV_MM = 856
CEFBS_HasStdEnc_HasMips32r6, // BITSWAP = 857
CEFBS_InMicroMips_HasMips32r6, // BITSWAP_MMR6 = 858
CEFBS_HasStdEnc_NotInMicroMips, // BLEZ = 859
CEFBS_NotInMips16Mode_IsGP64bit, // BLEZ64 = 860
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BLEZALC = 861
CEFBS_InMicroMips_HasMips32r6, // BLEZALC_MMR6 = 862
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BLEZC = 863
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BLEZC64 = 864
CEFBS_InMicroMips_HasMips32r6, // BLEZC_MMR6 = 865
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BLEZL = 866
CEFBS_InMicroMips_NotMips32r6, // BLEZ_MM = 867
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BLTC = 868
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BLTC64 = 869
CEFBS_InMicroMips_HasMips32r6, // BLTC_MMR6 = 870
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BLTUC = 871
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BLTUC64 = 872
CEFBS_InMicroMips_HasMips32r6, // BLTUC_MMR6 = 873
CEFBS_HasStdEnc_NotInMicroMips, // BLTZ = 874
CEFBS_NotInMips16Mode_IsGP64bit, // BLTZ64 = 875
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // BLTZAL = 876
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BLTZALC = 877
CEFBS_InMicroMips_HasMips32r6, // BLTZALC_MMR6 = 878
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BLTZALL = 879
CEFBS_InMicroMips_NotMips32r6, // BLTZALS_MM = 880
CEFBS_InMicroMips_NotMips32r6, // BLTZAL_MM = 881
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BLTZC = 882
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BLTZC64 = 883
CEFBS_InMicroMips_HasMips32r6, // BLTZC_MMR6 = 884
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BLTZL = 885
CEFBS_InMicroMips_NotMips32r6, // BLTZ_MM = 886
CEFBS_HasStdEnc_HasMSA, // BMNZI_B = 887
CEFBS_HasStdEnc_HasMSA, // BMNZ_V = 888
CEFBS_HasStdEnc_HasMSA, // BMZI_B = 889
CEFBS_HasStdEnc_HasMSA, // BMZ_V = 890
CEFBS_HasStdEnc_NotInMicroMips, // BNE = 891
CEFBS_NotInMips16Mode_IsGP64bit, // BNE64 = 892
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BNEC = 893
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BNEC64 = 894
CEFBS_InMicroMips_HasMips32r6, // BNEC_MMR6 = 895
CEFBS_HasStdEnc_HasMSA, // BNEGI_B = 896
CEFBS_HasStdEnc_HasMSA, // BNEGI_D = 897
CEFBS_HasStdEnc_HasMSA, // BNEGI_H = 898
CEFBS_HasStdEnc_HasMSA, // BNEGI_W = 899
CEFBS_HasStdEnc_HasMSA, // BNEG_B = 900
CEFBS_HasStdEnc_HasMSA, // BNEG_D = 901
CEFBS_HasStdEnc_HasMSA, // BNEG_H = 902
CEFBS_HasStdEnc_HasMSA, // BNEG_W = 903
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // BNEL = 904
CEFBS_InMicroMips_NotMips32r6, // BNEZ16_MM = 905
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BNEZALC = 906
CEFBS_InMicroMips_HasMips32r6, // BNEZALC_MMR6 = 907
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BNEZC = 908
CEFBS_InMicroMips_HasMips32r6, // BNEZC16_MMR6 = 909
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // BNEZC64 = 910
CEFBS_InMicroMips_NotMips32r6, // BNEZC_MM = 911
CEFBS_InMicroMips_HasMips32r6, // BNEZC_MMR6 = 912
CEFBS_InMicroMips_NotMips32r6, // BNE_MM = 913
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BNVC = 914
CEFBS_InMicroMips_HasMips32r6, // BNVC_MMR6 = 915
CEFBS_HasStdEnc_HasMSA, // BNZ_B = 916
CEFBS_HasStdEnc_HasMSA, // BNZ_D = 917
CEFBS_HasStdEnc_HasMSA, // BNZ_H = 918
CEFBS_HasStdEnc_HasMSA, // BNZ_V = 919
CEFBS_HasStdEnc_HasMSA, // BNZ_W = 920
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // BOVC = 921
CEFBS_InMicroMips_HasMips32r6, // BOVC_MMR6 = 922
CEFBS_HasDSP_NotInMicroMips, // BPOSGE32 = 923
CEFBS_InMicroMips_HasDSPR3, // BPOSGE32C_MMR3 = 924
CEFBS_InMicroMips_NotMips32r6_HasDSP, // BPOSGE32_MM = 925
CEFBS_HasStdEnc_NotInMicroMips, // BREAK = 926
CEFBS_InMicroMips_NotMips32r6, // BREAK16_MM = 927
CEFBS_InMicroMips_HasMips32r6, // BREAK16_MMR6 = 928
CEFBS_InMicroMips, // BREAK_MM = 929
CEFBS_InMicroMips_HasMips32r6, // BREAK_MMR6 = 930
CEFBS_HasStdEnc_HasMSA, // BSELI_B = 931
CEFBS_HasStdEnc_HasMSA, // BSEL_V = 932
CEFBS_HasStdEnc_HasMSA, // BSETI_B = 933
CEFBS_HasStdEnc_HasMSA, // BSETI_D = 934
CEFBS_HasStdEnc_HasMSA, // BSETI_H = 935
CEFBS_HasStdEnc_HasMSA, // BSETI_W = 936
CEFBS_HasStdEnc_HasMSA, // BSET_B = 937
CEFBS_HasStdEnc_HasMSA, // BSET_D = 938
CEFBS_HasStdEnc_HasMSA, // BSET_H = 939
CEFBS_HasStdEnc_HasMSA, // BSET_W = 940
CEFBS_HasStdEnc_HasMSA, // BZ_B = 941
CEFBS_HasStdEnc_HasMSA, // BZ_D = 942
CEFBS_HasStdEnc_HasMSA, // BZ_H = 943
CEFBS_HasStdEnc_HasMSA, // BZ_V = 944
CEFBS_HasStdEnc_HasMSA, // BZ_W = 945
CEFBS_InMips16Mode, // BeqzRxImm16 = 946
CEFBS_InMips16Mode, // BeqzRxImmX16 = 947
CEFBS_InMips16Mode, // Bimm16 = 948
CEFBS_InMips16Mode, // BimmX16 = 949
CEFBS_InMips16Mode, // BnezRxImm16 = 950
CEFBS_InMips16Mode, // BnezRxImmX16 = 951
CEFBS_InMips16Mode, // Break16 = 952
CEFBS_InMips16Mode, // Bteqz16 = 953
CEFBS_InMips16Mode, // BteqzX16 = 954
CEFBS_InMips16Mode, // Btnez16 = 955
CEFBS_InMips16Mode, // BtnezX16 = 956
CEFBS_HasStdEnc_HasMips3_32_NotMips32r6_NotMips64r6_NotInMicroMips, // CACHE = 957
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // CACHEE = 958
CEFBS_InMicroMips_HasEVA, // CACHEE_MM = 959
CEFBS_InMicroMips_NotMips32r6, // CACHE_MM = 960
CEFBS_InMicroMips_HasMips32r6, // CACHE_MMR6 = 961
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // CACHE_R6 = 962
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32_IsNotSoftFloat_NotInMicroMips, // CEIL_L_D64 = 963
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CEIL_L_D_MMR6 = 964
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // CEIL_L_S = 965
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CEIL_L_S_MMR6 = 966
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // CEIL_W_D32 = 967
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // CEIL_W_D64 = 968
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CEIL_W_D_MMR6 = 969
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // CEIL_W_MM = 970
CEFBS_HasStdEnc_HasMips2_IsNotSoftFloat_NotInMicroMips, // CEIL_W_S = 971
CEFBS_InMicroMips_IsNotSoftFloat, // CEIL_W_S_MM = 972
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CEIL_W_S_MMR6 = 973
CEFBS_HasStdEnc_HasMSA, // CEQI_B = 974
CEFBS_HasStdEnc_HasMSA, // CEQI_D = 975
CEFBS_HasStdEnc_HasMSA, // CEQI_H = 976
CEFBS_HasStdEnc_HasMSA, // CEQI_W = 977
CEFBS_HasStdEnc_HasMSA, // CEQ_B = 978
CEFBS_HasStdEnc_HasMSA, // CEQ_D = 979
CEFBS_HasStdEnc_HasMSA, // CEQ_H = 980
CEFBS_HasStdEnc_HasMSA, // CEQ_W = 981
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // CFC1 = 982
CEFBS_InMicroMips_IsNotSoftFloat, // CFC1_MM = 983
CEFBS_InMicroMips, // CFC2_MM = 984
CEFBS_HasStdEnc_HasMSA, // CFCMSA = 985
CEFBS_HasMips64_HasCnMips_NotInMicroMips, // CINS = 986
CEFBS_HasMips64_HasCnMips_NotInMicroMips, // CINS32 = 987
CEFBS_HasMips64_HasCnMips_NotInMicroMips, // CINS64_32 = 988
CEFBS_HasMips64_HasCnMips_NotInMicroMips, // CINS_i32 = 989
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CLASS_D = 990
CEFBS_InMicroMips_HasMips32r6, // CLASS_D_MMR6 = 991
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CLASS_S = 992
CEFBS_InMicroMips_HasMips32r6, // CLASS_S_MMR6 = 993
CEFBS_HasStdEnc_HasMSA, // CLEI_S_B = 994
CEFBS_HasStdEnc_HasMSA, // CLEI_S_D = 995
CEFBS_HasStdEnc_HasMSA, // CLEI_S_H = 996
CEFBS_HasStdEnc_HasMSA, // CLEI_S_W = 997
CEFBS_HasStdEnc_HasMSA, // CLEI_U_B = 998
CEFBS_HasStdEnc_HasMSA, // CLEI_U_D = 999
CEFBS_HasStdEnc_HasMSA, // CLEI_U_H = 1000
CEFBS_HasStdEnc_HasMSA, // CLEI_U_W = 1001
CEFBS_HasStdEnc_HasMSA, // CLE_S_B = 1002
CEFBS_HasStdEnc_HasMSA, // CLE_S_D = 1003
CEFBS_HasStdEnc_HasMSA, // CLE_S_H = 1004
CEFBS_HasStdEnc_HasMSA, // CLE_S_W = 1005
CEFBS_HasStdEnc_HasMSA, // CLE_U_B = 1006
CEFBS_HasStdEnc_HasMSA, // CLE_U_D = 1007
CEFBS_HasStdEnc_HasMSA, // CLE_U_H = 1008
CEFBS_HasStdEnc_HasMSA, // CLE_U_W = 1009
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // CLO = 1010
CEFBS_InMicroMips, // CLO_MM = 1011
CEFBS_InMicroMips_HasMips32r6, // CLO_MMR6 = 1012
CEFBS_HasStdEnc_HasMips32r6, // CLO_R6 = 1013
CEFBS_HasStdEnc_HasMSA, // CLTI_S_B = 1014
CEFBS_HasStdEnc_HasMSA, // CLTI_S_D = 1015
CEFBS_HasStdEnc_HasMSA, // CLTI_S_H = 1016
CEFBS_HasStdEnc_HasMSA, // CLTI_S_W = 1017
CEFBS_HasStdEnc_HasMSA, // CLTI_U_B = 1018
CEFBS_HasStdEnc_HasMSA, // CLTI_U_D = 1019
CEFBS_HasStdEnc_HasMSA, // CLTI_U_H = 1020
CEFBS_HasStdEnc_HasMSA, // CLTI_U_W = 1021
CEFBS_HasStdEnc_HasMSA, // CLT_S_B = 1022
CEFBS_HasStdEnc_HasMSA, // CLT_S_D = 1023
CEFBS_HasStdEnc_HasMSA, // CLT_S_H = 1024
CEFBS_HasStdEnc_HasMSA, // CLT_S_W = 1025
CEFBS_HasStdEnc_HasMSA, // CLT_U_B = 1026
CEFBS_HasStdEnc_HasMSA, // CLT_U_D = 1027
CEFBS_HasStdEnc_HasMSA, // CLT_U_H = 1028
CEFBS_HasStdEnc_HasMSA, // CLT_U_W = 1029
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // CLZ = 1030
CEFBS_InMicroMips, // CLZ_MM = 1031
CEFBS_InMicroMips_HasMips32r6, // CLZ_MMR6 = 1032
CEFBS_HasStdEnc_HasMips32r6, // CLZ_R6 = 1033
CEFBS_HasDSPR2, // CMPGDU_EQ_QB = 1034
CEFBS_InMicroMips_HasDSPR2, // CMPGDU_EQ_QB_MMR2 = 1035
CEFBS_HasDSPR2, // CMPGDU_LE_QB = 1036
CEFBS_InMicroMips_HasDSPR2, // CMPGDU_LE_QB_MMR2 = 1037
CEFBS_HasDSPR2, // CMPGDU_LT_QB = 1038
CEFBS_InMicroMips_HasDSPR2, // CMPGDU_LT_QB_MMR2 = 1039
CEFBS_HasDSP, // CMPGU_EQ_QB = 1040
CEFBS_InMicroMips_HasDSP, // CMPGU_EQ_QB_MM = 1041
CEFBS_HasDSP, // CMPGU_LE_QB = 1042
CEFBS_InMicroMips_HasDSP, // CMPGU_LE_QB_MM = 1043
CEFBS_HasDSP, // CMPGU_LT_QB = 1044
CEFBS_InMicroMips_HasDSP, // CMPGU_LT_QB_MM = 1045
CEFBS_HasDSP, // CMPU_EQ_QB = 1046
CEFBS_InMicroMips_HasDSP, // CMPU_EQ_QB_MM = 1047
CEFBS_HasDSP, // CMPU_LE_QB = 1048
CEFBS_InMicroMips_HasDSP, // CMPU_LE_QB_MM = 1049
CEFBS_HasDSP, // CMPU_LT_QB = 1050
CEFBS_InMicroMips_HasDSP, // CMPU_LT_QB_MM = 1051
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_AF_D_MMR6 = 1052
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_AF_S_MMR6 = 1053
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_EQ_D = 1054
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_EQ_D_MMR6 = 1055
CEFBS_HasDSP, // CMP_EQ_PH = 1056
CEFBS_InMicroMips_HasDSP, // CMP_EQ_PH_MM = 1057
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_EQ_S = 1058
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_EQ_S_MMR6 = 1059
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_F_D = 1060
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_F_S = 1061
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_LE_D = 1062
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_LE_D_MMR6 = 1063
CEFBS_HasDSP, // CMP_LE_PH = 1064
CEFBS_InMicroMips_HasDSP, // CMP_LE_PH_MM = 1065
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_LE_S = 1066
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_LE_S_MMR6 = 1067
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_LT_D = 1068
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_LT_D_MMR6 = 1069
CEFBS_HasDSP, // CMP_LT_PH = 1070
CEFBS_InMicroMips_HasDSP, // CMP_LT_PH_MM = 1071
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_LT_S = 1072
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_LT_S_MMR6 = 1073
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SAF_D = 1074
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SAF_D_MMR6 = 1075
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SAF_S = 1076
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SAF_S_MMR6 = 1077
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SEQ_D = 1078
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SEQ_D_MMR6 = 1079
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SEQ_S = 1080
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SEQ_S_MMR6 = 1081
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SLE_D = 1082
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SLE_D_MMR6 = 1083
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SLE_S = 1084
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SLE_S_MMR6 = 1085
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SLT_D = 1086
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SLT_D_MMR6 = 1087
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SLT_S = 1088
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SLT_S_MMR6 = 1089
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SUEQ_D = 1090
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SUEQ_D_MMR6 = 1091
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SUEQ_S = 1092
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SUEQ_S_MMR6 = 1093
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SULE_D = 1094
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SULE_D_MMR6 = 1095
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SULE_S = 1096
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SULE_S_MMR6 = 1097
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SULT_D = 1098
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SULT_D_MMR6 = 1099
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SULT_S = 1100
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SULT_S_MMR6 = 1101
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SUN_D = 1102
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SUN_D_MMR6 = 1103
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_SUN_S = 1104
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_SUN_S_MMR6 = 1105
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_UEQ_D = 1106
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_UEQ_D_MMR6 = 1107
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_UEQ_S = 1108
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_UEQ_S_MMR6 = 1109
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_ULE_D = 1110
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_ULE_D_MMR6 = 1111
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_ULE_S = 1112
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_ULE_S_MMR6 = 1113
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_ULT_D = 1114
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_ULT_D_MMR6 = 1115
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_ULT_S = 1116
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_ULT_S_MMR6 = 1117
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_UN_D = 1118
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_UN_D_MMR6 = 1119
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // CMP_UN_S = 1120
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CMP_UN_S_MMR6 = 1121
CEFBS_HasStdEnc_HasMSA, // COPY_S_B = 1122
CEFBS_HasStdEnc_HasMSA_HasMips64, // COPY_S_D = 1123
CEFBS_HasStdEnc_HasMSA, // COPY_S_H = 1124
CEFBS_HasStdEnc_HasMSA, // COPY_S_W = 1125
CEFBS_HasStdEnc_HasMSA, // COPY_U_B = 1126
CEFBS_HasStdEnc_HasMSA, // COPY_U_H = 1127
CEFBS_HasStdEnc_HasMSA_HasMips64, // COPY_U_W = 1128
CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32B = 1129
CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32CB = 1130
CEFBS_HasStdEnc_HasMips64r6_HasCRC_NotInMicroMips, // CRC32CD = 1131
CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32CH = 1132
CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32CW = 1133
CEFBS_HasStdEnc_HasMips64r6_HasCRC_NotInMicroMips, // CRC32D = 1134
CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32H = 1135
CEFBS_HasStdEnc_HasMips32r6_HasCRC_NotInMicroMips, // CRC32W = 1136
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // CTC1 = 1137
CEFBS_InMicroMips_IsNotSoftFloat, // CTC1_MM = 1138
CEFBS_InMicroMips, // CTC2_MM = 1139
CEFBS_HasStdEnc_HasMSA, // CTCMSA = 1140
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_D32_S = 1141
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // CVT_D32_S_MM = 1142
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_D32_W = 1143
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // CVT_D32_W_MM = 1144
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32r2_IsNotSoftFloat_NotInMicroMips, // CVT_D64_L = 1145
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_D64_S = 1146
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // CVT_D64_S_MM = 1147
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_D64_W = 1148
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // CVT_D64_W_MM = 1149
CEFBS_InMicroMips_IsFP64bit_HasMips32r6_IsNotSoftFloat, // CVT_D_L_MMR6 = 1150
CEFBS_HasStdEnc_HasMips3_32r2_IsNotSoftFloat_NotInMicroMips, // CVT_L_D64 = 1151
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // CVT_L_D64_MM = 1152
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CVT_L_D_MMR6 = 1153
CEFBS_HasStdEnc_HasMips3_32r2_IsNotSoftFloat_NotInMicroMips, // CVT_L_S = 1154
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // CVT_L_S_MM = 1155
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CVT_L_S_MMR6 = 1156
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // CVT_PS_S64 = 1157
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_S_D32 = 1158
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // CVT_S_D32_MM = 1159
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_S_D64 = 1160
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // CVT_S_D64_MM = 1161
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32r2_IsNotSoftFloat_NotInMicroMips, // CVT_S_L = 1162
CEFBS_InMicroMips_IsFP64bit_HasMips32r6_IsNotSoftFloat, // CVT_S_L_MMR6 = 1163
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // CVT_S_PL64 = 1164
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // CVT_S_PU64 = 1165
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // CVT_S_W = 1166
CEFBS_InMicroMips_IsNotSoftFloat, // CVT_S_W_MM = 1167
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CVT_S_W_MMR6 = 1168
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_W_D32 = 1169
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // CVT_W_D32_MM = 1170
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // CVT_W_D64 = 1171
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // CVT_W_D64_MM = 1172
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // CVT_W_S = 1173
CEFBS_InMicroMips_IsNotSoftFloat, // CVT_W_S_MM = 1174
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // CVT_W_S_MMR6 = 1175
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_EQ_D32 = 1176
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_EQ_D32_MM = 1177
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_EQ_D64 = 1178
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_EQ_D64_MM = 1179
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_EQ_S = 1180
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_EQ_S_MM = 1181
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_F_D32 = 1182
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_F_D32_MM = 1183
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_F_D64 = 1184
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_F_D64_MM = 1185
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_F_S = 1186
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_F_S_MM = 1187
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_LE_D32 = 1188
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_LE_D32_MM = 1189
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_LE_D64 = 1190
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_LE_D64_MM = 1191
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_LE_S = 1192
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_LE_S_MM = 1193
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_LT_D32 = 1194
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_LT_D32_MM = 1195
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_LT_D64 = 1196
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_LT_D64_MM = 1197
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_LT_S = 1198
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_LT_S_MM = 1199
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGE_D32 = 1200
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGE_D32_MM = 1201
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGE_D64 = 1202
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGE_D64_MM = 1203
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGE_S = 1204
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_NGE_S_MM = 1205
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGLE_D32 = 1206
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGLE_D32_MM = 1207
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGLE_D64 = 1208
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGLE_D64_MM = 1209
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGLE_S = 1210
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_NGLE_S_MM = 1211
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGL_D32 = 1212
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGL_D32_MM = 1213
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGL_D64 = 1214
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGL_D64_MM = 1215
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGL_S = 1216
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_NGL_S_MM = 1217
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGT_D32 = 1218
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGT_D32_MM = 1219
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGT_D64 = 1220
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_NGT_D64_MM = 1221
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_NGT_S = 1222
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_NGT_S_MM = 1223
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_OLE_D32 = 1224
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_OLE_D32_MM = 1225
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_OLE_D64 = 1226
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_OLE_D64_MM = 1227
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_OLE_S = 1228
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_OLE_S_MM = 1229
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_OLT_D32 = 1230
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_OLT_D32_MM = 1231
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_OLT_D64 = 1232
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_OLT_D64_MM = 1233
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_OLT_S = 1234
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_OLT_S_MM = 1235
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_SEQ_D32 = 1236
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_SEQ_D32_MM = 1237
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_SEQ_D64 = 1238
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_SEQ_D64_MM = 1239
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_SEQ_S = 1240
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_SEQ_S_MM = 1241
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_SF_D32 = 1242
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_SF_D32_MM = 1243
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_SF_D64 = 1244
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_SF_D64_MM = 1245
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_SF_S = 1246
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_SF_S_MM = 1247
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_UEQ_D32 = 1248
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_UEQ_D32_MM = 1249
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_UEQ_D64 = 1250
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_UEQ_D64_MM = 1251
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_UEQ_S = 1252
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_UEQ_S_MM = 1253
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_ULE_D32 = 1254
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_ULE_D32_MM = 1255
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_ULE_D64 = 1256
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_ULE_D64_MM = 1257
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_ULE_S = 1258
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_ULE_S_MM = 1259
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_ULT_D32 = 1260
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_ULT_D32_MM = 1261
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_ULT_D64 = 1262
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_ULT_D64_MM = 1263
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_ULT_S = 1264
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_ULT_S_MM = 1265
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_UN_D32 = 1266
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // C_UN_D32_MM = 1267
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_UN_D64 = 1268
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // C_UN_D64_MM = 1269
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // C_UN_S = 1270
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // C_UN_S_MM = 1271
CEFBS_InMips16Mode, // CmpRxRy16 = 1272
CEFBS_InMips16Mode, // CmpiRxImm16 = 1273
CEFBS_InMips16Mode, // CmpiRxImmX16 = 1274
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DADD = 1275
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // DADDi = 1276
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DADDiu = 1277
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DADDu = 1278
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DAHI = 1279
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DALIGN = 1280
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DATI = 1281
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DAUI = 1282
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DBITSWAP = 1283
CEFBS_HasStdEnc_IsGP64bit_HasMips64_NotMips64r6_NotInMicroMips, // DCLO = 1284
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DCLO_R6 = 1285
CEFBS_HasStdEnc_IsGP64bit_HasMips64_NotMips64r6_NotInMicroMips, // DCLZ = 1286
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DCLZ_R6 = 1287
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DDIV = 1288
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DDIVU = 1289
CEFBS_HasStdEnc_HasMips32_NotInMicroMips, // DERET = 1290
CEFBS_InMicroMips, // DERET_MM = 1291
CEFBS_InMicroMips_HasMips32r6, // DERET_MMR6 = 1292
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DEXT = 1293
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DEXT64_32 = 1294
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DEXTM = 1295
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DEXTU = 1296
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // DI = 1297
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DINS = 1298
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DINSM = 1299
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DINSU = 1300
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // DIV = 1301
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // DIVU = 1302
CEFBS_InMicroMips_HasMips32r6, // DIVU_MMR6 = 1303
CEFBS_InMicroMips_HasMips32r6, // DIV_MMR6 = 1304
CEFBS_HasStdEnc_HasMSA, // DIV_S_B = 1305
CEFBS_HasStdEnc_HasMSA, // DIV_S_D = 1306
CEFBS_HasStdEnc_HasMSA, // DIV_S_H = 1307
CEFBS_HasStdEnc_HasMSA, // DIV_S_W = 1308
CEFBS_HasStdEnc_HasMSA, // DIV_U_B = 1309
CEFBS_HasStdEnc_HasMSA, // DIV_U_D = 1310
CEFBS_HasStdEnc_HasMSA, // DIV_U_H = 1311
CEFBS_HasStdEnc_HasMSA, // DIV_U_W = 1312
CEFBS_InMicroMips, // DI_MM = 1313
CEFBS_InMicroMips_HasMips32r6, // DI_MMR6 = 1314
CEFBS_HasStdEnc_HasMSA_HasMips64, // DLSA = 1315
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DLSA_R6 = 1316
CEFBS_HasStdEnc_IsGP64bit_HasMips3, // DMFC0 = 1317
CEFBS_HasStdEnc_HasMips3_IsNotSoftFloat_NotInMicroMips, // DMFC1 = 1318
CEFBS_HasStdEnc_IsGP64bit_HasMips3, // DMFC2 = 1319
CEFBS_HasCnMips, // DMFC2_OCTEON = 1320
CEFBS_HasStdEnc_HasMips64r5_HasVirt, // DMFGC0 = 1321
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DMOD = 1322
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DMODU = 1323
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // DMT = 1324
CEFBS_HasStdEnc_IsGP64bit_HasMips3, // DMTC0 = 1325
CEFBS_HasStdEnc_HasMips3_IsNotSoftFloat_NotInMicroMips, // DMTC1 = 1326
CEFBS_HasStdEnc_IsGP64bit_HasMips3, // DMTC2 = 1327
CEFBS_HasCnMips, // DMTC2_OCTEON = 1328
CEFBS_HasStdEnc_HasMips64r5_HasVirt, // DMTGC0 = 1329
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DMUH = 1330
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DMUHU = 1331
CEFBS_HasCnMips, // DMUL = 1332
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DMULT = 1333
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DMULTu = 1334
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DMULU = 1335
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // DMUL_R6 = 1336
CEFBS_HasStdEnc_HasMSA, // DOTP_S_D = 1337
CEFBS_HasStdEnc_HasMSA, // DOTP_S_H = 1338
CEFBS_HasStdEnc_HasMSA, // DOTP_S_W = 1339
CEFBS_HasStdEnc_HasMSA, // DOTP_U_D = 1340
CEFBS_HasStdEnc_HasMSA, // DOTP_U_H = 1341
CEFBS_HasStdEnc_HasMSA, // DOTP_U_W = 1342
CEFBS_HasStdEnc_HasMSA, // DPADD_S_D = 1343
CEFBS_HasStdEnc_HasMSA, // DPADD_S_H = 1344
CEFBS_HasStdEnc_HasMSA, // DPADD_S_W = 1345
CEFBS_HasStdEnc_HasMSA, // DPADD_U_D = 1346
CEFBS_HasStdEnc_HasMSA, // DPADD_U_H = 1347
CEFBS_HasStdEnc_HasMSA, // DPADD_U_W = 1348
CEFBS_HasDSPR2, // DPAQX_SA_W_PH = 1349
CEFBS_InMicroMips_HasDSPR2, // DPAQX_SA_W_PH_MMR2 = 1350
CEFBS_HasDSPR2, // DPAQX_S_W_PH = 1351
CEFBS_InMicroMips_HasDSPR2, // DPAQX_S_W_PH_MMR2 = 1352
CEFBS_HasDSP, // DPAQ_SA_L_W = 1353
CEFBS_InMicroMips_HasDSP, // DPAQ_SA_L_W_MM = 1354
CEFBS_HasDSP, // DPAQ_S_W_PH = 1355
CEFBS_InMicroMips_HasDSP, // DPAQ_S_W_PH_MM = 1356
CEFBS_HasDSP, // DPAU_H_QBL = 1357
CEFBS_InMicroMips_HasDSP, // DPAU_H_QBL_MM = 1358
CEFBS_HasDSP, // DPAU_H_QBR = 1359
CEFBS_InMicroMips_HasDSP, // DPAU_H_QBR_MM = 1360
CEFBS_HasDSPR2, // DPAX_W_PH = 1361
CEFBS_InMicroMips_HasDSPR2, // DPAX_W_PH_MMR2 = 1362
CEFBS_HasDSPR2, // DPA_W_PH = 1363
CEFBS_InMicroMips_HasDSPR2, // DPA_W_PH_MMR2 = 1364
CEFBS_HasCnMips, // DPOP = 1365
CEFBS_HasDSPR2, // DPSQX_SA_W_PH = 1366
CEFBS_InMicroMips_HasDSPR2, // DPSQX_SA_W_PH_MMR2 = 1367
CEFBS_HasDSPR2, // DPSQX_S_W_PH = 1368
CEFBS_InMicroMips_HasDSPR2, // DPSQX_S_W_PH_MMR2 = 1369
CEFBS_HasDSP, // DPSQ_SA_L_W = 1370
CEFBS_InMicroMips_HasDSP, // DPSQ_SA_L_W_MM = 1371
CEFBS_HasDSP, // DPSQ_S_W_PH = 1372
CEFBS_InMicroMips_HasDSP, // DPSQ_S_W_PH_MM = 1373
CEFBS_HasStdEnc_HasMSA, // DPSUB_S_D = 1374
CEFBS_HasStdEnc_HasMSA, // DPSUB_S_H = 1375
CEFBS_HasStdEnc_HasMSA, // DPSUB_S_W = 1376
CEFBS_HasStdEnc_HasMSA, // DPSUB_U_D = 1377
CEFBS_HasStdEnc_HasMSA, // DPSUB_U_H = 1378
CEFBS_HasStdEnc_HasMSA, // DPSUB_U_W = 1379
CEFBS_HasDSP, // DPSU_H_QBL = 1380
CEFBS_InMicroMips_HasDSP, // DPSU_H_QBL_MM = 1381
CEFBS_HasDSP, // DPSU_H_QBR = 1382
CEFBS_InMicroMips_HasDSP, // DPSU_H_QBR_MM = 1383
CEFBS_HasDSPR2, // DPSX_W_PH = 1384
CEFBS_InMicroMips_HasDSPR2, // DPSX_W_PH_MMR2 = 1385
CEFBS_HasDSPR2, // DPS_W_PH = 1386
CEFBS_InMicroMips_HasDSPR2, // DPS_W_PH_MMR2 = 1387
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DROTR = 1388
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DROTR32 = 1389
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DROTRV = 1390
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DSBH = 1391
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DSDIV = 1392
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // DSHD = 1393
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSLL = 1394
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSLL32 = 1395
CEFBS_NotInMips16Mode_IsGP64bit, // DSLL64_32 = 1396
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSLLV = 1397
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSRA = 1398
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSRA32 = 1399
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSRAV = 1400
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSRL = 1401
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSRL32 = 1402
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSRLV = 1403
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSUB = 1404
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // DSUBu = 1405
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // DUDIV = 1406
CEFBS_HasStdEnc_HasMips32r6, // DVP = 1407
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // DVPE = 1408
CEFBS_InMicroMips_HasMips32r6, // DVP_MMR6 = 1409
CEFBS_InMips16Mode, // DivRxRy16 = 1410
CEFBS_InMips16Mode, // DivuRxRy16 = 1411
CEFBS_HasStdEnc_NotInMicroMips, // EHB = 1412
CEFBS_InMicroMips, // EHB_MM = 1413
CEFBS_InMicroMips_HasMips32r6, // EHB_MMR6 = 1414
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // EI = 1415
CEFBS_InMicroMips, // EI_MM = 1416
CEFBS_InMicroMips_HasMips32r6, // EI_MMR6 = 1417
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // EMT = 1418
CEFBS_HasStdEnc_HasMips3_32_NotInMicroMips, // ERET = 1419
CEFBS_HasStdEnc_HasMips32r5_NotInMicroMips, // ERETNC = 1420
CEFBS_InMicroMips_HasMips32r6, // ERETNC_MMR6 = 1421
CEFBS_InMicroMips, // ERET_MM = 1422
CEFBS_InMicroMips_HasMips32r6, // ERET_MMR6 = 1423
CEFBS_HasStdEnc_HasMips32r6, // EVP = 1424
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // EVPE = 1425
CEFBS_InMicroMips_HasMips32r6, // EVP_MMR6 = 1426
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // EXT = 1427
CEFBS_HasDSP, // EXTP = 1428
CEFBS_HasDSP, // EXTPDP = 1429
CEFBS_HasDSP, // EXTPDPV = 1430
CEFBS_InMicroMips_HasDSP, // EXTPDPV_MM = 1431
CEFBS_InMicroMips_HasDSP, // EXTPDP_MM = 1432
CEFBS_HasDSP, // EXTPV = 1433
CEFBS_InMicroMips_HasDSP, // EXTPV_MM = 1434
CEFBS_InMicroMips_HasDSP, // EXTP_MM = 1435
CEFBS_HasDSP, // EXTRV_RS_W = 1436
CEFBS_InMicroMips_HasDSP, // EXTRV_RS_W_MM = 1437
CEFBS_HasDSP, // EXTRV_R_W = 1438
CEFBS_InMicroMips_HasDSP, // EXTRV_R_W_MM = 1439
CEFBS_HasDSP, // EXTRV_S_H = 1440
CEFBS_InMicroMips_HasDSP, // EXTRV_S_H_MM = 1441
CEFBS_HasDSP, // EXTRV_W = 1442
CEFBS_InMicroMips_HasDSP, // EXTRV_W_MM = 1443
CEFBS_HasDSP, // EXTR_RS_W = 1444
CEFBS_InMicroMips_HasDSP, // EXTR_RS_W_MM = 1445
CEFBS_HasDSP, // EXTR_R_W = 1446
CEFBS_InMicroMips_HasDSP, // EXTR_R_W_MM = 1447
CEFBS_HasDSP, // EXTR_S_H = 1448
CEFBS_InMicroMips_HasDSP, // EXTR_S_H_MM = 1449
CEFBS_HasDSP, // EXTR_W = 1450
CEFBS_InMicroMips_HasDSP, // EXTR_W_MM = 1451
CEFBS_HasMips64_HasCnMips_NotInMicroMips, // EXTS = 1452
CEFBS_HasMips64_HasCnMips_NotInMicroMips, // EXTS32 = 1453
CEFBS_InMicroMips_NotMips32r6, // EXT_MM = 1454
CEFBS_InMicroMips_HasMips32r6, // EXT_MMR6 = 1455
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // FABS_D32 = 1456
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FABS_D32_MM = 1457
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // FABS_D64 = 1458
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FABS_D64_MM = 1459
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // FABS_S = 1460
CEFBS_InMicroMips_IsNotSoftFloat, // FABS_S_MM = 1461
CEFBS_HasStdEnc_HasMSA, // FADD_D = 1462
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // FADD_D32 = 1463
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FADD_D32_MM = 1464
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // FADD_D64 = 1465
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FADD_D64_MM = 1466
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // FADD_S = 1467
CEFBS_InMicroMips_IsNotSoftFloat, // FADD_S_MM = 1468
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FADD_S_MMR6 = 1469
CEFBS_HasStdEnc_HasMSA, // FADD_W = 1470
CEFBS_HasStdEnc_HasMSA, // FCAF_D = 1471
CEFBS_HasStdEnc_HasMSA, // FCAF_W = 1472
CEFBS_HasStdEnc_HasMSA, // FCEQ_D = 1473
CEFBS_HasStdEnc_HasMSA, // FCEQ_W = 1474
CEFBS_HasStdEnc_HasMSA, // FCLASS_D = 1475
CEFBS_HasStdEnc_HasMSA, // FCLASS_W = 1476
CEFBS_HasStdEnc_HasMSA, // FCLE_D = 1477
CEFBS_HasStdEnc_HasMSA, // FCLE_W = 1478
CEFBS_HasStdEnc_HasMSA, // FCLT_D = 1479
CEFBS_HasStdEnc_HasMSA, // FCLT_W = 1480
CEFBS_HasStdEnc_NotFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // FCMP_D32 = 1481
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // FCMP_D32_MM = 1482
CEFBS_HasStdEnc_IsFP64bit_NotMips32r6_NotMips64r6_IsNotSoftFloat, // FCMP_D64 = 1483
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // FCMP_S32 = 1484
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // FCMP_S32_MM = 1485
CEFBS_HasStdEnc_HasMSA, // FCNE_D = 1486
CEFBS_HasStdEnc_HasMSA, // FCNE_W = 1487
CEFBS_HasStdEnc_HasMSA, // FCOR_D = 1488
CEFBS_HasStdEnc_HasMSA, // FCOR_W = 1489
CEFBS_HasStdEnc_HasMSA, // FCUEQ_D = 1490
CEFBS_HasStdEnc_HasMSA, // FCUEQ_W = 1491
CEFBS_HasStdEnc_HasMSA, // FCULE_D = 1492
CEFBS_HasStdEnc_HasMSA, // FCULE_W = 1493
CEFBS_HasStdEnc_HasMSA, // FCULT_D = 1494
CEFBS_HasStdEnc_HasMSA, // FCULT_W = 1495
CEFBS_HasStdEnc_HasMSA, // FCUNE_D = 1496
CEFBS_HasStdEnc_HasMSA, // FCUNE_W = 1497
CEFBS_HasStdEnc_HasMSA, // FCUN_D = 1498
CEFBS_HasStdEnc_HasMSA, // FCUN_W = 1499
CEFBS_HasStdEnc_HasMSA, // FDIV_D = 1500
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // FDIV_D32 = 1501
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FDIV_D32_MM = 1502
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // FDIV_D64 = 1503
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FDIV_D64_MM = 1504
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // FDIV_S = 1505
CEFBS_InMicroMips_IsNotSoftFloat, // FDIV_S_MM = 1506
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FDIV_S_MMR6 = 1507
CEFBS_HasStdEnc_HasMSA, // FDIV_W = 1508
CEFBS_HasStdEnc_HasMSA, // FEXDO_H = 1509
CEFBS_HasStdEnc_HasMSA, // FEXDO_W = 1510
CEFBS_HasStdEnc_HasMSA, // FEXP2_D = 1511
CEFBS_HasStdEnc_HasMSA, // FEXP2_W = 1512
CEFBS_HasStdEnc_HasMSA, // FEXUPL_D = 1513
CEFBS_HasStdEnc_HasMSA, // FEXUPL_W = 1514
CEFBS_HasStdEnc_HasMSA, // FEXUPR_D = 1515
CEFBS_HasStdEnc_HasMSA, // FEXUPR_W = 1516
CEFBS_HasStdEnc_HasMSA, // FFINT_S_D = 1517
CEFBS_HasStdEnc_HasMSA, // FFINT_S_W = 1518
CEFBS_HasStdEnc_HasMSA, // FFINT_U_D = 1519
CEFBS_HasStdEnc_HasMSA, // FFINT_U_W = 1520
CEFBS_HasStdEnc_HasMSA, // FFQL_D = 1521
CEFBS_HasStdEnc_HasMSA, // FFQL_W = 1522
CEFBS_HasStdEnc_HasMSA, // FFQR_D = 1523
CEFBS_HasStdEnc_HasMSA, // FFQR_W = 1524
CEFBS_HasStdEnc_HasMSA, // FILL_B = 1525
CEFBS_HasStdEnc_HasMSA_HasMips64, // FILL_D = 1526
CEFBS_HasStdEnc_HasMSA, // FILL_H = 1527
CEFBS_HasStdEnc_HasMSA, // FILL_W = 1528
CEFBS_HasStdEnc_HasMSA, // FLOG2_D = 1529
CEFBS_HasStdEnc_HasMSA, // FLOG2_W = 1530
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32_IsNotSoftFloat_NotInMicroMips, // FLOOR_L_D64 = 1531
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FLOOR_L_D_MMR6 = 1532
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // FLOOR_L_S = 1533
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FLOOR_L_S_MMR6 = 1534
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // FLOOR_W_D32 = 1535
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // FLOOR_W_D64 = 1536
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FLOOR_W_D_MMR6 = 1537
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FLOOR_W_MM = 1538
CEFBS_HasStdEnc_HasMips2_IsNotSoftFloat_NotInMicroMips, // FLOOR_W_S = 1539
CEFBS_InMicroMips_IsNotSoftFloat, // FLOOR_W_S_MM = 1540
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FLOOR_W_S_MMR6 = 1541
CEFBS_HasStdEnc_HasMSA, // FMADD_D = 1542
CEFBS_HasStdEnc_HasMSA, // FMADD_W = 1543
CEFBS_HasStdEnc_HasMSA, // FMAX_A_D = 1544
CEFBS_HasStdEnc_HasMSA, // FMAX_A_W = 1545
CEFBS_HasStdEnc_HasMSA, // FMAX_D = 1546
CEFBS_HasStdEnc_HasMSA, // FMAX_W = 1547
CEFBS_HasStdEnc_HasMSA, // FMIN_A_D = 1548
CEFBS_HasStdEnc_HasMSA, // FMIN_A_W = 1549
CEFBS_HasStdEnc_HasMSA, // FMIN_D = 1550
CEFBS_HasStdEnc_HasMSA, // FMIN_W = 1551
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // FMOV_D32 = 1552
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FMOV_D32_MM = 1553
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // FMOV_D64 = 1554
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FMOV_D64_MM = 1555
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FMOV_D_MMR6 = 1556
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // FMOV_S = 1557
CEFBS_InMicroMips_IsNotSoftFloat, // FMOV_S_MM = 1558
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FMOV_S_MMR6 = 1559
CEFBS_HasStdEnc_HasMSA, // FMSUB_D = 1560
CEFBS_HasStdEnc_HasMSA, // FMSUB_W = 1561
CEFBS_HasStdEnc_HasMSA, // FMUL_D = 1562
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // FMUL_D32 = 1563
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FMUL_D32_MM = 1564
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // FMUL_D64 = 1565
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FMUL_D64_MM = 1566
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // FMUL_S = 1567
CEFBS_InMicroMips_IsNotSoftFloat, // FMUL_S_MM = 1568
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FMUL_S_MMR6 = 1569
CEFBS_HasStdEnc_HasMSA, // FMUL_W = 1570
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // FNEG_D32 = 1571
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FNEG_D32_MM = 1572
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // FNEG_D64 = 1573
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FNEG_D64_MM = 1574
CEFBS_HasStdEnc_IsNotSoftFloat, // FNEG_S = 1575
CEFBS_InMicroMips_IsNotSoftFloat, // FNEG_S_MM = 1576
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FNEG_S_MMR6 = 1577
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // FORK = 1578
CEFBS_HasStdEnc_HasMSA, // FRCP_D = 1579
CEFBS_HasStdEnc_HasMSA, // FRCP_W = 1580
CEFBS_HasStdEnc_HasMSA, // FRINT_D = 1581
CEFBS_HasStdEnc_HasMSA, // FRINT_W = 1582
CEFBS_HasStdEnc_HasMSA, // FRSQRT_D = 1583
CEFBS_HasStdEnc_HasMSA, // FRSQRT_W = 1584
CEFBS_HasStdEnc_HasMSA, // FSAF_D = 1585
CEFBS_HasStdEnc_HasMSA, // FSAF_W = 1586
CEFBS_HasStdEnc_HasMSA, // FSEQ_D = 1587
CEFBS_HasStdEnc_HasMSA, // FSEQ_W = 1588
CEFBS_HasStdEnc_HasMSA, // FSLE_D = 1589
CEFBS_HasStdEnc_HasMSA, // FSLE_W = 1590
CEFBS_HasStdEnc_HasMSA, // FSLT_D = 1591
CEFBS_HasStdEnc_HasMSA, // FSLT_W = 1592
CEFBS_HasStdEnc_HasMSA, // FSNE_D = 1593
CEFBS_HasStdEnc_HasMSA, // FSNE_W = 1594
CEFBS_HasStdEnc_HasMSA, // FSOR_D = 1595
CEFBS_HasStdEnc_HasMSA, // FSOR_W = 1596
CEFBS_HasStdEnc_HasMSA, // FSQRT_D = 1597
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // FSQRT_D32 = 1598
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FSQRT_D32_MM = 1599
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // FSQRT_D64 = 1600
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FSQRT_D64_MM = 1601
CEFBS_HasStdEnc_HasMips2_IsNotSoftFloat_NotInMicroMips, // FSQRT_S = 1602
CEFBS_InMicroMips_IsNotSoftFloat, // FSQRT_S_MM = 1603
CEFBS_HasStdEnc_HasMSA, // FSQRT_W = 1604
CEFBS_HasStdEnc_HasMSA, // FSUB_D = 1605
CEFBS_HasStdEnc_NotFP64bit_IsNotSoftFloat_NotInMicroMips, // FSUB_D32 = 1606
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // FSUB_D32_MM = 1607
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // FSUB_D64 = 1608
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // FSUB_D64_MM = 1609
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // FSUB_S = 1610
CEFBS_InMicroMips_IsNotSoftFloat, // FSUB_S_MM = 1611
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // FSUB_S_MMR6 = 1612
CEFBS_HasStdEnc_HasMSA, // FSUB_W = 1613
CEFBS_HasStdEnc_HasMSA, // FSUEQ_D = 1614
CEFBS_HasStdEnc_HasMSA, // FSUEQ_W = 1615
CEFBS_HasStdEnc_HasMSA, // FSULE_D = 1616
CEFBS_HasStdEnc_HasMSA, // FSULE_W = 1617
CEFBS_HasStdEnc_HasMSA, // FSULT_D = 1618
CEFBS_HasStdEnc_HasMSA, // FSULT_W = 1619
CEFBS_HasStdEnc_HasMSA, // FSUNE_D = 1620
CEFBS_HasStdEnc_HasMSA, // FSUNE_W = 1621
CEFBS_HasStdEnc_HasMSA, // FSUN_D = 1622
CEFBS_HasStdEnc_HasMSA, // FSUN_W = 1623
CEFBS_HasStdEnc_HasMSA, // FTINT_S_D = 1624
CEFBS_HasStdEnc_HasMSA, // FTINT_S_W = 1625
CEFBS_HasStdEnc_HasMSA, // FTINT_U_D = 1626
CEFBS_HasStdEnc_HasMSA, // FTINT_U_W = 1627
CEFBS_HasStdEnc_HasMSA, // FTQ_H = 1628
CEFBS_HasStdEnc_HasMSA, // FTQ_W = 1629
CEFBS_HasStdEnc_HasMSA, // FTRUNC_S_D = 1630
CEFBS_HasStdEnc_HasMSA, // FTRUNC_S_W = 1631
CEFBS_HasStdEnc_HasMSA, // FTRUNC_U_D = 1632
CEFBS_HasStdEnc_HasMSA, // FTRUNC_U_W = 1633
CEFBS_HasStdEnc_HasMips32r6_HasGINV_NotInMicroMips, // GINVI = 1634
CEFBS_InMicroMips_HasMips32r6_HasGINV, // GINVI_MMR6 = 1635
CEFBS_HasStdEnc_HasMips32r6_HasGINV_NotInMicroMips, // GINVT = 1636
CEFBS_InMicroMips_HasMips32r6_HasGINV, // GINVT_MMR6 = 1637
CEFBS_HasStdEnc_HasMSA, // HADD_S_D = 1638
CEFBS_HasStdEnc_HasMSA, // HADD_S_H = 1639
CEFBS_HasStdEnc_HasMSA, // HADD_S_W = 1640
CEFBS_HasStdEnc_HasMSA, // HADD_U_D = 1641
CEFBS_HasStdEnc_HasMSA, // HADD_U_H = 1642
CEFBS_HasStdEnc_HasMSA, // HADD_U_W = 1643
CEFBS_HasStdEnc_HasMSA, // HSUB_S_D = 1644
CEFBS_HasStdEnc_HasMSA, // HSUB_S_H = 1645
CEFBS_HasStdEnc_HasMSA, // HSUB_S_W = 1646
CEFBS_HasStdEnc_HasMSA, // HSUB_U_D = 1647
CEFBS_HasStdEnc_HasMSA, // HSUB_U_H = 1648
CEFBS_HasStdEnc_HasMSA, // HSUB_U_W = 1649
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // HYPCALL = 1650
CEFBS_InMicroMips_HasMips32r5_HasVirt, // HYPCALL_MM = 1651
CEFBS_HasStdEnc_HasMSA, // ILVEV_B = 1652
CEFBS_HasStdEnc_HasMSA, // ILVEV_D = 1653
CEFBS_HasStdEnc_HasMSA, // ILVEV_H = 1654
CEFBS_HasStdEnc_HasMSA, // ILVEV_W = 1655
CEFBS_HasStdEnc_HasMSA, // ILVL_B = 1656
CEFBS_HasStdEnc_HasMSA, // ILVL_D = 1657
CEFBS_HasStdEnc_HasMSA, // ILVL_H = 1658
CEFBS_HasStdEnc_HasMSA, // ILVL_W = 1659
CEFBS_HasStdEnc_HasMSA, // ILVOD_B = 1660
CEFBS_HasStdEnc_HasMSA, // ILVOD_D = 1661
CEFBS_HasStdEnc_HasMSA, // ILVOD_H = 1662
CEFBS_HasStdEnc_HasMSA, // ILVOD_W = 1663
CEFBS_HasStdEnc_HasMSA, // ILVR_B = 1664
CEFBS_HasStdEnc_HasMSA, // ILVR_D = 1665
CEFBS_HasStdEnc_HasMSA, // ILVR_H = 1666
CEFBS_HasStdEnc_HasMSA, // ILVR_W = 1667
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // INS = 1668
CEFBS_HasStdEnc_HasMSA, // INSERT_B = 1669
CEFBS_HasStdEnc_HasMSA_HasMips64, // INSERT_D = 1670
CEFBS_HasStdEnc_HasMSA, // INSERT_H = 1671
CEFBS_HasStdEnc_HasMSA, // INSERT_W = 1672
CEFBS_HasDSP, // INSV = 1673
CEFBS_HasStdEnc_HasMSA, // INSVE_B = 1674
CEFBS_HasStdEnc_HasMSA, // INSVE_D = 1675
CEFBS_HasStdEnc_HasMSA, // INSVE_H = 1676
CEFBS_HasStdEnc_HasMSA, // INSVE_W = 1677
CEFBS_InMicroMips_HasDSP, // INSV_MM = 1678
CEFBS_InMicroMips_NotMips32r6, // INS_MM = 1679
CEFBS_InMicroMips_HasMips32r6, // INS_MMR6 = 1680
CEFBS_HasStdEnc_NotInMicroMips, // J = 1681
CEFBS_HasStdEnc_NotInMicroMips, // JAL = 1682
CEFBS_HasStdEnc_NotInMicroMips_NoIndirectJumpGuards, // JALR = 1683
CEFBS_InMicroMips_NotMips32r6, // JALR16_MM = 1684
CEFBS_NotInMips16Mode_IsPTR64bit, // JALR64 = 1685
CEFBS_InMicroMips_HasMips32r6, // JALRC16_MMR6 = 1686
CEFBS_InMicroMips_HasMips32r6, // JALRC_HB_MMR6 = 1687
CEFBS_InMicroMips_HasMips32r6, // JALRC_MMR6 = 1688
CEFBS_InMicroMips_NotMips32r6, // JALRS16_MM = 1689
CEFBS_InMicroMips_NotMips32r6, // JALRS_MM = 1690
CEFBS_HasStdEnc_HasMips32, // JALR_HB = 1691
CEFBS_HasStdEnc_HasMips64r2_NotInMicroMips, // JALR_HB64 = 1692
CEFBS_InMicroMips_NotMips32r6, // JALR_MM = 1693
CEFBS_InMicroMips_NotMips32r6, // JALS_MM = 1694
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // JALX = 1695
CEFBS_InMicroMips_NotMips32r6, // JALX_MM = 1696
CEFBS_InMicroMips_NotMips32r6, // JAL_MM = 1697
CEFBS_HasStdEnc_HasMips32r6, // JIALC = 1698
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // JIALC64 = 1699
CEFBS_InMicroMips_HasMips32r6, // JIALC_MMR6 = 1700
CEFBS_HasStdEnc_HasMips32r6, // JIC = 1701
CEFBS_HasStdEnc_IsGP64bit_HasMips64r6, // JIC64 = 1702
CEFBS_InMicroMips_HasMips32r6, // JIC_MMR6 = 1703
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // JR = 1704
CEFBS_InMicroMips_NotMips32r6, // JR16_MM = 1705
CEFBS_NotInMips16Mode_IsPTR64bit_NotInMicroMips, // JR64 = 1706
CEFBS_InMicroMips_NotMips32r6, // JRADDIUSP = 1707
CEFBS_InMicroMips_NotMips32r6, // JRC16_MM = 1708
CEFBS_InMicroMips_HasMips32r6, // JRC16_MMR6 = 1709
CEFBS_InMicroMips_HasMips32r6, // JRCADDIUSP_MMR6 = 1710
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6, // JR_HB = 1711
CEFBS_HasStdEnc_HasMips64_NotMips64r6_NotInMicroMips, // JR_HB64 = 1712
CEFBS_HasStdEnc_HasMips32r6, // JR_HB64_R6 = 1713
CEFBS_HasStdEnc_HasMips32r6, // JR_HB_R6 = 1714
CEFBS_InMicroMips_NotMips32r6, // JR_MM = 1715
CEFBS_InMicroMips_NotMips32r6, // J_MM = 1716
CEFBS_InMips16Mode, // Jal16 = 1717
CEFBS_InMips16Mode, // JalB16 = 1718
CEFBS_InMips16Mode, // JrRa16 = 1719
CEFBS_InMips16Mode, // JrcRa16 = 1720
CEFBS_InMips16Mode, // JrcRx16 = 1721
CEFBS_InMips16Mode, // JumpLinkReg16 = 1722
CEFBS_HasStdEnc_NotInMicroMips, // LB = 1723
CEFBS_NotInMips16Mode_IsGP64bit, // LB64 = 1724
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // LBE = 1725
CEFBS_InMicroMips_HasEVA, // LBE_MM = 1726
CEFBS_InMicroMips, // LBU16_MM = 1727
CEFBS_HasDSP, // LBUX = 1728
CEFBS_InMicroMips_HasDSP, // LBUX_MM = 1729
CEFBS_InMicroMips_HasMips32r6, // LBU_MMR6 = 1730
CEFBS_InMicroMips, // LB_MM = 1731
CEFBS_InMicroMips_HasMips32r6, // LB_MMR6 = 1732
CEFBS_HasStdEnc_NotInMicroMips, // LBu = 1733
CEFBS_NotInMips16Mode_IsGP64bit, // LBu64 = 1734
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // LBuE = 1735
CEFBS_InMicroMips_HasEVA, // LBuE_MM = 1736
CEFBS_InMicroMips, // LBu_MM = 1737
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // LD = 1738
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // LDC1 = 1739
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // LDC164 = 1740
CEFBS_InMicroMips_IsFP64bit_HasMips32r6_IsNotSoftFloat, // LDC1_D64_MMR6 = 1741
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // LDC1_MM = 1742
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // LDC2 = 1743
CEFBS_InMicroMips_HasMips32r6, // LDC2_MMR6 = 1744
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // LDC2_R6 = 1745
CEFBS_HasStdEnc_HasMips2_NotCnMips_NotInMicroMips, // LDC3 = 1746
CEFBS_HasStdEnc_HasMSA, // LDI_B = 1747
CEFBS_HasStdEnc_HasMSA, // LDI_D = 1748
CEFBS_HasStdEnc_HasMSA, // LDI_H = 1749
CEFBS_HasStdEnc_HasMSA, // LDI_W = 1750
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // LDL = 1751
CEFBS_HasStdEnc_HasMips64r6, // LDPC = 1752
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // LDR = 1753
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // LDXC1 = 1754
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat, // LDXC164 = 1755
CEFBS_HasStdEnc_HasMSA, // LD_B = 1756
CEFBS_HasStdEnc_HasMSA, // LD_D = 1757
CEFBS_HasStdEnc_HasMSA, // LD_H = 1758
CEFBS_HasStdEnc_HasMSA, // LD_W = 1759
CEFBS_HasStdEnc_NotInMicroMips, // LEA_ADDiu = 1760
CEFBS_NotInMips16Mode_IsGP64bit_NotInMicroMips, // LEA_ADDiu64 = 1761
CEFBS_InMicroMips, // LEA_ADDiu_MM = 1762
CEFBS_HasStdEnc_NotInMicroMips, // LH = 1763
CEFBS_NotInMips16Mode_IsGP64bit, // LH64 = 1764
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // LHE = 1765
CEFBS_InMicroMips_HasEVA, // LHE_MM = 1766
CEFBS_InMicroMips, // LHU16_MM = 1767
CEFBS_HasDSP, // LHX = 1768
CEFBS_InMicroMips_HasDSP, // LHX_MM = 1769
CEFBS_InMicroMips, // LH_MM = 1770
CEFBS_HasStdEnc_NotInMicroMips, // LHu = 1771
CEFBS_NotInMips16Mode_IsGP64bit, // LHu64 = 1772
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // LHuE = 1773
CEFBS_InMicroMips_HasEVA, // LHuE_MM = 1774
CEFBS_InMicroMips, // LHu_MM = 1775
CEFBS_InMicroMips_NotMips32r6, // LI16_MM = 1776
CEFBS_InMicroMips_HasMips32r6, // LI16_MMR6 = 1777
CEFBS_HasStdEnc_IsPTR32bit_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // LL = 1778
CEFBS_HasStdEnc_IsPTR64bit_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // LL64 = 1779
CEFBS_HasStdEnc_IsPTR64bit_HasMips64r6_NotInMicroMips, // LL64_R6 = 1780
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6_NotInMicroMips, // LLD = 1781
CEFBS_HasStdEnc_HasMips64r6_NotInMicroMips, // LLD_R6 = 1782
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // LLE = 1783
CEFBS_InMicroMips_HasEVA, // LLE_MM = 1784
CEFBS_InMicroMips_NotMips32r6, // LL_MM = 1785
CEFBS_InMicroMips_HasMips32r6, // LL_MMR6 = 1786
CEFBS_HasStdEnc_IsPTR32bit_HasMips32r6_NotInMicroMips, // LL_R6 = 1787
CEFBS_HasStdEnc_HasMSA, // LSA = 1788
CEFBS_InMicroMips_HasMips32r6, // LSA_MMR6 = 1789
CEFBS_HasStdEnc_HasMips32r6, // LSA_R6 = 1790
CEFBS_InMicroMips_HasMips32r6, // LUI_MMR6 = 1791
CEFBS_HasStdEnc_NotFP64bit_HasMips5_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // LUXC1 = 1792
CEFBS_HasStdEnc_IsFP64bit_HasMips5_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // LUXC164 = 1793
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // LUXC1_MM = 1794
CEFBS_HasStdEnc_NotInMicroMips, // LUi = 1795
CEFBS_NotInMips16Mode_IsGP64bit, // LUi64 = 1796
CEFBS_InMicroMips_NotMips32r6, // LUi_MM = 1797
CEFBS_HasStdEnc_NotInMicroMips, // LW = 1798
CEFBS_InMicroMips, // LW16_MM = 1799
CEFBS_NotInMips16Mode_IsGP64bit, // LW64 = 1800
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // LWC1 = 1801
CEFBS_InMicroMips_IsNotSoftFloat, // LWC1_MM = 1802
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // LWC2 = 1803
CEFBS_InMicroMips_HasMips32r6, // LWC2_MMR6 = 1804
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // LWC2_R6 = 1805
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotCnMips_NotInMicroMips, // LWC3 = 1806
CEFBS_NotInMips16Mode_HasDSP, // LWDSP = 1807
CEFBS_InMicroMips_HasDSP, // LWDSP_MM = 1808
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // LWE = 1809
CEFBS_InMicroMips_HasEVA, // LWE_MM = 1810
CEFBS_InMicroMips, // LWGP_MM = 1811
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // LWL = 1812
CEFBS_NotInMips16Mode_IsGP64bit, // LWL64 = 1813
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6_HasEVA_NotInMicroMips, // LWLE = 1814
CEFBS_InMicroMips_NotMips32r6_HasEVA, // LWLE_MM = 1815
CEFBS_InMicroMips_NotMips32r6, // LWL_MM = 1816
CEFBS_InMicroMips_NotMips32r6, // LWM16_MM = 1817
CEFBS_InMicroMips_HasMips32r6, // LWM16_MMR6 = 1818
CEFBS_InMicroMips, // LWM32_MM = 1819
CEFBS_HasStdEnc_HasMips32r6, // LWPC = 1820
CEFBS_InMicroMips_HasMips32r6, // LWPC_MMR6 = 1821
CEFBS_InMicroMips, // LWP_MM = 1822
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // LWR = 1823
CEFBS_NotInMips16Mode_IsGP64bit, // LWR64 = 1824
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6_HasEVA_NotInMicroMips, // LWRE = 1825
CEFBS_InMicroMips_NotMips32r6_HasEVA, // LWRE_MM = 1826
CEFBS_InMicroMips_NotMips32r6, // LWR_MM = 1827
CEFBS_InMicroMips, // LWSP_MM = 1828
CEFBS_HasStdEnc_HasMips64r6, // LWUPC = 1829
CEFBS_InMicroMips_NotMips32r6, // LWU_MM = 1830
CEFBS_HasDSP, // LWX = 1831
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat, // LWXC1 = 1832
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // LWXC1_MM = 1833
CEFBS_InMicroMips, // LWXS_MM = 1834
CEFBS_InMicroMips_HasDSP, // LWX_MM = 1835
CEFBS_InMicroMips, // LW_MM = 1836
CEFBS_InMicroMips_HasMips32r6, // LW_MMR6 = 1837
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // LWu = 1838
CEFBS_InMips16Mode, // LbRxRyOffMemX16 = 1839
CEFBS_InMips16Mode, // LbuRxRyOffMemX16 = 1840
CEFBS_InMips16Mode, // LhRxRyOffMemX16 = 1841
CEFBS_InMips16Mode, // LhuRxRyOffMemX16 = 1842
CEFBS_InMips16Mode, // LiRxImm16 = 1843
CEFBS_InMips16Mode, // LiRxImmAlignX16 = 1844
CEFBS_InMips16Mode, // LiRxImmX16 = 1845
CEFBS_InMips16Mode, // LwRxPcTcp16 = 1846
CEFBS_InMips16Mode, // LwRxPcTcpX16 = 1847
CEFBS_InMips16Mode, // LwRxRyOffMemX16 = 1848
CEFBS_InMips16Mode, // LwRxSpImmX16 = 1849
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // MADD = 1850
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MADDF_D = 1851
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MADDF_D_MMR6 = 1852
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MADDF_S = 1853
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MADDF_S_MMR6 = 1854
CEFBS_HasStdEnc_HasMSA, // MADDR_Q_H = 1855
CEFBS_HasStdEnc_HasMSA, // MADDR_Q_W = 1856
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // MADDU = 1857
CEFBS_HasDSP, // MADDU_DSP = 1858
CEFBS_InMicroMips_HasDSP, // MADDU_DSP_MM = 1859
CEFBS_InMicroMips_NotMips32r6, // MADDU_MM = 1860
CEFBS_HasStdEnc_HasMSA, // MADDV_B = 1861
CEFBS_HasStdEnc_HasMSA, // MADDV_D = 1862
CEFBS_HasStdEnc_HasMSA, // MADDV_H = 1863
CEFBS_HasStdEnc_HasMSA, // MADDV_W = 1864
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4, // MADD_D32 = 1865
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat_HasMadd4, // MADD_D32_MM = 1866
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4, // MADD_D64 = 1867
CEFBS_HasDSP, // MADD_DSP = 1868
CEFBS_InMicroMips_HasDSP, // MADD_DSP_MM = 1869
CEFBS_InMicroMips_NotMips32r6, // MADD_MM = 1870
CEFBS_HasStdEnc_HasMSA, // MADD_Q_H = 1871
CEFBS_HasStdEnc_HasMSA, // MADD_Q_W = 1872
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4, // MADD_S = 1873
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat_HasMadd4, // MADD_S_MM = 1874
CEFBS_HasDSP, // MAQ_SA_W_PHL = 1875
CEFBS_InMicroMips_HasDSP, // MAQ_SA_W_PHL_MM = 1876
CEFBS_HasDSP, // MAQ_SA_W_PHR = 1877
CEFBS_InMicroMips_HasDSP, // MAQ_SA_W_PHR_MM = 1878
CEFBS_HasDSP, // MAQ_S_W_PHL = 1879
CEFBS_InMicroMips_HasDSP, // MAQ_S_W_PHL_MM = 1880
CEFBS_HasDSP, // MAQ_S_W_PHR = 1881
CEFBS_InMicroMips_HasDSP, // MAQ_S_W_PHR_MM = 1882
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MAXA_D = 1883
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MAXA_D_MMR6 = 1884
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MAXA_S = 1885
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MAXA_S_MMR6 = 1886
CEFBS_HasStdEnc_HasMSA, // MAXI_S_B = 1887
CEFBS_HasStdEnc_HasMSA, // MAXI_S_D = 1888
CEFBS_HasStdEnc_HasMSA, // MAXI_S_H = 1889
CEFBS_HasStdEnc_HasMSA, // MAXI_S_W = 1890
CEFBS_HasStdEnc_HasMSA, // MAXI_U_B = 1891
CEFBS_HasStdEnc_HasMSA, // MAXI_U_D = 1892
CEFBS_HasStdEnc_HasMSA, // MAXI_U_H = 1893
CEFBS_HasStdEnc_HasMSA, // MAXI_U_W = 1894
CEFBS_HasStdEnc_HasMSA, // MAX_A_B = 1895
CEFBS_HasStdEnc_HasMSA, // MAX_A_D = 1896
CEFBS_HasStdEnc_HasMSA, // MAX_A_H = 1897
CEFBS_HasStdEnc_HasMSA, // MAX_A_W = 1898
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MAX_D = 1899
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MAX_D_MMR6 = 1900
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MAX_S = 1901
CEFBS_HasStdEnc_HasMSA, // MAX_S_B = 1902
CEFBS_HasStdEnc_HasMSA, // MAX_S_D = 1903
CEFBS_HasStdEnc_HasMSA, // MAX_S_H = 1904
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MAX_S_MMR6 = 1905
CEFBS_HasStdEnc_HasMSA, // MAX_S_W = 1906
CEFBS_HasStdEnc_HasMSA, // MAX_U_B = 1907
CEFBS_HasStdEnc_HasMSA, // MAX_U_D = 1908
CEFBS_HasStdEnc_HasMSA, // MAX_U_H = 1909
CEFBS_HasStdEnc_HasMSA, // MAX_U_W = 1910
CEFBS_HasStdEnc_NotInMicroMips, // MFC0 = 1911
CEFBS_InMicroMips_HasMips32r6, // MFC0_MMR6 = 1912
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // MFC1 = 1913
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // MFC1_D64 = 1914
CEFBS_InMicroMips_IsNotSoftFloat, // MFC1_MM = 1915
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MFC1_MMR6 = 1916
CEFBS_HasStdEnc_NotInMicroMips, // MFC2 = 1917
CEFBS_InMicroMips_HasMips32r6, // MFC2_MMR6 = 1918
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // MFGC0 = 1919
CEFBS_InMicroMips_HasMips32r5_HasVirt, // MFGC0_MM = 1920
CEFBS_InMicroMips_HasMips32r6, // MFHC0_MMR6 = 1921
CEFBS_HasStdEnc_NotFP64bit_HasMips32r2_IsNotSoftFloat_NotInMicroMips, // MFHC1_D32 = 1922
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // MFHC1_D32_MM = 1923
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_IsNotSoftFloat_NotInMicroMips, // MFHC1_D64 = 1924
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // MFHC1_D64_MM = 1925
CEFBS_InMicroMips_HasMips32r6, // MFHC2_MMR6 = 1926
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // MFHGC0 = 1927
CEFBS_InMicroMips_HasMips32r5_HasVirt, // MFHGC0_MM = 1928
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // MFHI = 1929
CEFBS_InMicroMips_NotMips32r6, // MFHI16_MM = 1930
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // MFHI64 = 1931
CEFBS_HasDSP, // MFHI_DSP = 1932
CEFBS_InMicroMips_HasDSP, // MFHI_DSP_MM = 1933
CEFBS_InMicroMips_NotMips32r6, // MFHI_MM = 1934
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // MFLO = 1935
CEFBS_InMicroMips_NotMips32r6, // MFLO16_MM = 1936
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // MFLO64 = 1937
CEFBS_HasDSP, // MFLO_DSP = 1938
CEFBS_InMicroMips_HasDSP, // MFLO_DSP_MM = 1939
CEFBS_InMicroMips_NotMips32r6, // MFLO_MM = 1940
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // MFTR = 1941
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MINA_D = 1942
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MINA_D_MMR6 = 1943
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MINA_S = 1944
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MINA_S_MMR6 = 1945
CEFBS_HasStdEnc_HasMSA, // MINI_S_B = 1946
CEFBS_HasStdEnc_HasMSA, // MINI_S_D = 1947
CEFBS_HasStdEnc_HasMSA, // MINI_S_H = 1948
CEFBS_HasStdEnc_HasMSA, // MINI_S_W = 1949
CEFBS_HasStdEnc_HasMSA, // MINI_U_B = 1950
CEFBS_HasStdEnc_HasMSA, // MINI_U_D = 1951
CEFBS_HasStdEnc_HasMSA, // MINI_U_H = 1952
CEFBS_HasStdEnc_HasMSA, // MINI_U_W = 1953
CEFBS_HasStdEnc_HasMSA, // MIN_A_B = 1954
CEFBS_HasStdEnc_HasMSA, // MIN_A_D = 1955
CEFBS_HasStdEnc_HasMSA, // MIN_A_H = 1956
CEFBS_HasStdEnc_HasMSA, // MIN_A_W = 1957
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MIN_D = 1958
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MIN_D_MMR6 = 1959
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MIN_S = 1960
CEFBS_HasStdEnc_HasMSA, // MIN_S_B = 1961
CEFBS_HasStdEnc_HasMSA, // MIN_S_D = 1962
CEFBS_HasStdEnc_HasMSA, // MIN_S_H = 1963
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MIN_S_MMR6 = 1964
CEFBS_HasStdEnc_HasMSA, // MIN_S_W = 1965
CEFBS_HasStdEnc_HasMSA, // MIN_U_B = 1966
CEFBS_HasStdEnc_HasMSA, // MIN_U_D = 1967
CEFBS_HasStdEnc_HasMSA, // MIN_U_H = 1968
CEFBS_HasStdEnc_HasMSA, // MIN_U_W = 1969
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MOD = 1970
CEFBS_HasDSP, // MODSUB = 1971
CEFBS_InMicroMips_HasDSP, // MODSUB_MM = 1972
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MODU = 1973
CEFBS_InMicroMips_HasMips32r6, // MODU_MMR6 = 1974
CEFBS_InMicroMips_HasMips32r6, // MOD_MMR6 = 1975
CEFBS_HasStdEnc_HasMSA, // MOD_S_B = 1976
CEFBS_HasStdEnc_HasMSA, // MOD_S_D = 1977
CEFBS_HasStdEnc_HasMSA, // MOD_S_H = 1978
CEFBS_HasStdEnc_HasMSA, // MOD_S_W = 1979
CEFBS_HasStdEnc_HasMSA, // MOD_U_B = 1980
CEFBS_HasStdEnc_HasMSA, // MOD_U_D = 1981
CEFBS_HasStdEnc_HasMSA, // MOD_U_H = 1982
CEFBS_HasStdEnc_HasMSA, // MOD_U_W = 1983
CEFBS_InMicroMips_NotMips32r6, // MOVE16_MM = 1984
CEFBS_InMicroMips_HasMips32r6, // MOVE16_MMR6 = 1985
CEFBS_InMicroMips_NotMips32r6, // MOVEP_MM = 1986
CEFBS_InMicroMips_HasMips32r6, // MOVEP_MMR6 = 1987
CEFBS_HasStdEnc_HasMSA, // MOVE_V = 1988
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVF_D32 = 1989
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // MOVF_D32_MM = 1990
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVF_D64 = 1991
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVF_I = 1992
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVF_I64 = 1993
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // MOVF_I_MM = 1994
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVF_S = 1995
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // MOVF_S_MM = 1996
CEFBS_HasStdEnc_IsGP64bit_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVN_I64_D64 = 1997
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVN_I64_I = 1998
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVN_I64_I64 = 1999
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVN_I64_S = 2000
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVN_I_D32 = 2001
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // MOVN_I_D32_MM = 2002
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVN_I_D64 = 2003
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVN_I_I = 2004
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVN_I_I64 = 2005
CEFBS_InMicroMips_NotMips32r6, // MOVN_I_MM = 2006
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVN_I_S = 2007
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // MOVN_I_S_MM = 2008
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVT_D32 = 2009
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // MOVT_D32_MM = 2010
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVT_D64 = 2011
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVT_I = 2012
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVT_I64 = 2013
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // MOVT_I_MM = 2014
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVT_S = 2015
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // MOVT_S_MM = 2016
CEFBS_HasStdEnc_IsGP64bit_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVZ_I64_D64 = 2017
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVZ_I64_I = 2018
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVZ_I64_I64 = 2019
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVZ_I64_S = 2020
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVZ_I_D32 = 2021
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat, // MOVZ_I_D32_MM = 2022
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVZ_I_D64 = 2023
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVZ_I_I = 2024
CEFBS_HasStdEnc_IsGP64bit_HasMips4_32_NotMips32r6_NotMips64r6_NotInMicroMips, // MOVZ_I_I64 = 2025
CEFBS_InMicroMips_NotMips32r6, // MOVZ_I_MM = 2026
CEFBS_HasStdEnc_HasMips4_32_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // MOVZ_I_S = 2027
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // MOVZ_I_S_MM = 2028
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // MSUB = 2029
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MSUBF_D = 2030
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MSUBF_D_MMR6 = 2031
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // MSUBF_S = 2032
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MSUBF_S_MMR6 = 2033
CEFBS_HasStdEnc_HasMSA, // MSUBR_Q_H = 2034
CEFBS_HasStdEnc_HasMSA, // MSUBR_Q_W = 2035
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // MSUBU = 2036
CEFBS_HasDSP, // MSUBU_DSP = 2037
CEFBS_InMicroMips_HasDSP, // MSUBU_DSP_MM = 2038
CEFBS_InMicroMips_NotMips32r6, // MSUBU_MM = 2039
CEFBS_HasStdEnc_HasMSA, // MSUBV_B = 2040
CEFBS_HasStdEnc_HasMSA, // MSUBV_D = 2041
CEFBS_HasStdEnc_HasMSA, // MSUBV_H = 2042
CEFBS_HasStdEnc_HasMSA, // MSUBV_W = 2043
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4, // MSUB_D32 = 2044
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat_HasMadd4, // MSUB_D32_MM = 2045
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4, // MSUB_D64 = 2046
CEFBS_HasDSP, // MSUB_DSP = 2047
CEFBS_InMicroMips_HasDSP, // MSUB_DSP_MM = 2048
CEFBS_InMicroMips_NotMips32r6, // MSUB_MM = 2049
CEFBS_HasStdEnc_HasMSA, // MSUB_Q_H = 2050
CEFBS_HasStdEnc_HasMSA, // MSUB_Q_W = 2051
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips_HasMadd4, // MSUB_S = 2052
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat_HasMadd4, // MSUB_S_MM = 2053
CEFBS_HasStdEnc_NotInMicroMips, // MTC0 = 2054
CEFBS_InMicroMips_HasMips32r6, // MTC0_MMR6 = 2055
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // MTC1 = 2056
CEFBS_HasStdEnc_IsFP64bit_IsNotSoftFloat_NotInMicroMips, // MTC1_D64 = 2057
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // MTC1_D64_MM = 2058
CEFBS_InMicroMips_IsNotSoftFloat, // MTC1_MM = 2059
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // MTC1_MMR6 = 2060
CEFBS_HasStdEnc_NotInMicroMips, // MTC2 = 2061
CEFBS_InMicroMips_HasMips32r6, // MTC2_MMR6 = 2062
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // MTGC0 = 2063
CEFBS_InMicroMips_HasMips32r5_HasVirt, // MTGC0_MM = 2064
CEFBS_InMicroMips_HasMips32r6, // MTHC0_MMR6 = 2065
CEFBS_HasStdEnc_NotFP64bit_HasMips32r2_IsNotSoftFloat_NotInMicroMips, // MTHC1_D32 = 2066
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // MTHC1_D32_MM = 2067
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_IsNotSoftFloat_NotInMicroMips, // MTHC1_D64 = 2068
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // MTHC1_D64_MM = 2069
CEFBS_InMicroMips_HasMips32r6, // MTHC2_MMR6 = 2070
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // MTHGC0 = 2071
CEFBS_InMicroMips_HasMips32r5_HasVirt, // MTHGC0_MM = 2072
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // MTHI = 2073
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // MTHI64 = 2074
CEFBS_HasDSP, // MTHI_DSP = 2075
CEFBS_InMicroMips_HasDSP, // MTHI_DSP_MM = 2076
CEFBS_InMicroMips_NotMips32r6, // MTHI_MM = 2077
CEFBS_HasDSP, // MTHLIP = 2078
CEFBS_InMicroMips_HasDSP, // MTHLIP_MM = 2079
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // MTLO = 2080
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // MTLO64 = 2081
CEFBS_HasDSP, // MTLO_DSP = 2082
CEFBS_InMicroMips_HasDSP, // MTLO_DSP_MM = 2083
CEFBS_InMicroMips_NotMips32r6, // MTLO_MM = 2084
CEFBS_HasCnMips, // MTM0 = 2085
CEFBS_HasCnMips, // MTM1 = 2086
CEFBS_HasCnMips, // MTM2 = 2087
CEFBS_HasCnMips, // MTP0 = 2088
CEFBS_HasCnMips, // MTP1 = 2089
CEFBS_HasCnMips, // MTP2 = 2090
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // MTTR = 2091
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MUH = 2092
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MUHU = 2093
CEFBS_InMicroMips_HasMips32r6, // MUHU_MMR6 = 2094
CEFBS_InMicroMips_HasMips32r6, // MUH_MMR6 = 2095
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // MUL = 2096
CEFBS_HasDSP, // MULEQ_S_W_PHL = 2097
CEFBS_InMicroMips_HasDSP, // MULEQ_S_W_PHL_MM = 2098
CEFBS_HasDSP, // MULEQ_S_W_PHR = 2099
CEFBS_InMicroMips_HasDSP, // MULEQ_S_W_PHR_MM = 2100
CEFBS_HasDSP, // MULEU_S_PH_QBL = 2101
CEFBS_InMicroMips_HasDSP, // MULEU_S_PH_QBL_MM = 2102
CEFBS_HasDSP, // MULEU_S_PH_QBR = 2103
CEFBS_InMicroMips_HasDSP, // MULEU_S_PH_QBR_MM = 2104
CEFBS_HasDSP, // MULQ_RS_PH = 2105
CEFBS_InMicroMips_HasDSP, // MULQ_RS_PH_MM = 2106
CEFBS_HasDSPR2, // MULQ_RS_W = 2107
CEFBS_InMicroMips_HasDSPR2, // MULQ_RS_W_MMR2 = 2108
CEFBS_HasDSPR2, // MULQ_S_PH = 2109
CEFBS_InMicroMips_HasDSPR2, // MULQ_S_PH_MMR2 = 2110
CEFBS_HasDSPR2, // MULQ_S_W = 2111
CEFBS_InMicroMips_HasDSPR2, // MULQ_S_W_MMR2 = 2112
CEFBS_HasStdEnc_HasMSA, // MULR_Q_H = 2113
CEFBS_HasStdEnc_HasMSA, // MULR_Q_W = 2114
CEFBS_HasDSP, // MULSAQ_S_W_PH = 2115
CEFBS_InMicroMips_HasDSP, // MULSAQ_S_W_PH_MM = 2116
CEFBS_HasDSPR2, // MULSA_W_PH = 2117
CEFBS_InMicroMips_HasDSPR2, // MULSA_W_PH_MMR2 = 2118
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // MULT = 2119
CEFBS_HasDSP, // MULTU_DSP = 2120
CEFBS_InMicroMips_HasDSP, // MULTU_DSP_MM = 2121
CEFBS_HasDSP, // MULT_DSP = 2122
CEFBS_InMicroMips_HasDSP, // MULT_DSP_MM = 2123
CEFBS_InMicroMips_NotMips32r6, // MULT_MM = 2124
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // MULTu = 2125
CEFBS_InMicroMips_NotMips32r6, // MULTu_MM = 2126
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MULU = 2127
CEFBS_InMicroMips_HasMips32r6, // MULU_MMR6 = 2128
CEFBS_HasStdEnc_HasMSA, // MULV_B = 2129
CEFBS_HasStdEnc_HasMSA, // MULV_D = 2130
CEFBS_HasStdEnc_HasMSA, // MULV_H = 2131
CEFBS_HasStdEnc_HasMSA, // MULV_W = 2132
CEFBS_InMicroMips_NotMips32r6, // MUL_MM = 2133
CEFBS_InMicroMips_HasMips32r6, // MUL_MMR6 = 2134
CEFBS_HasDSPR2, // MUL_PH = 2135
CEFBS_InMicroMips_HasDSPR2, // MUL_PH_MMR2 = 2136
CEFBS_HasStdEnc_HasMSA, // MUL_Q_H = 2137
CEFBS_HasStdEnc_HasMSA, // MUL_Q_W = 2138
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // MUL_R6 = 2139
CEFBS_HasDSPR2, // MUL_S_PH = 2140
CEFBS_InMicroMips_HasDSPR2, // MUL_S_PH_MMR2 = 2141
CEFBS_InMips16Mode, // Mfhi16 = 2142
CEFBS_InMips16Mode, // Mflo16 = 2143
CEFBS_InMips16Mode, // Move32R16 = 2144
CEFBS_InMips16Mode, // MoveR3216 = 2145
CEFBS_HasStdEnc_HasMSA, // NLOC_B = 2146
CEFBS_HasStdEnc_HasMSA, // NLOC_D = 2147
CEFBS_HasStdEnc_HasMSA, // NLOC_H = 2148
CEFBS_HasStdEnc_HasMSA, // NLOC_W = 2149
CEFBS_HasStdEnc_HasMSA, // NLZC_B = 2150
CEFBS_HasStdEnc_HasMSA, // NLZC_D = 2151
CEFBS_HasStdEnc_HasMSA, // NLZC_H = 2152
CEFBS_HasStdEnc_HasMSA, // NLZC_W = 2153
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips, // NMADD_D32 = 2154
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat_HasMadd4, // NMADD_D32_MM = 2155
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips, // NMADD_D64 = 2156
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips, // NMADD_S = 2157
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat_HasMadd4, // NMADD_S_MM = 2158
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips, // NMSUB_D32 = 2159
CEFBS_InMicroMips_NotFP64bit_NotMips32r6_IsNotSoftFloat_HasMadd4, // NMSUB_D32_MM = 2160
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips, // NMSUB_D64 = 2161
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_HasMadd4_NotInMicroMips, // NMSUB_S = 2162
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat_HasMadd4, // NMSUB_S_MM = 2163
CEFBS_HasStdEnc_NotInMicroMips, // NOR = 2164
CEFBS_NotInMips16Mode_IsGP64bit, // NOR64 = 2165
CEFBS_HasStdEnc_HasMSA, // NORI_B = 2166
CEFBS_InMicroMips_NotMips32r6, // NOR_MM = 2167
CEFBS_InMicroMips_HasMips32r6, // NOR_MMR6 = 2168
CEFBS_HasStdEnc_HasMSA, // NOR_V = 2169
CEFBS_InMicroMips_NotMips32r6, // NOT16_MM = 2170
CEFBS_InMicroMips_HasMips32r6, // NOT16_MMR6 = 2171
CEFBS_InMips16Mode, // NegRxRy16 = 2172
CEFBS_InMips16Mode, // NotRxRy16 = 2173
CEFBS_HasStdEnc_NotInMicroMips, // OR = 2174
CEFBS_InMicroMips_NotMips32r6, // OR16_MM = 2175
CEFBS_InMicroMips_HasMips32r6, // OR16_MMR6 = 2176
CEFBS_NotInMips16Mode_IsGP64bit, // OR64 = 2177
CEFBS_HasStdEnc_HasMSA, // ORI_B = 2178
CEFBS_InMicroMips_HasMips32r6, // ORI_MMR6 = 2179
CEFBS_InMicroMips_NotMips32r6, // OR_MM = 2180
CEFBS_InMicroMips_HasMips32r6, // OR_MMR6 = 2181
CEFBS_HasStdEnc_HasMSA, // OR_V = 2182
CEFBS_HasStdEnc_NotInMicroMips, // ORi = 2183
CEFBS_NotInMips16Mode_IsGP64bit, // ORi64 = 2184
CEFBS_InMicroMips_NotMips32r6, // ORi_MM = 2185
CEFBS_InMips16Mode, // OrRxRxRy16 = 2186
CEFBS_HasDSP, // PACKRL_PH = 2187
CEFBS_InMicroMips_HasDSP, // PACKRL_PH_MM = 2188
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // PAUSE = 2189
CEFBS_InMicroMips, // PAUSE_MM = 2190
CEFBS_InMicroMips_HasMips32r6, // PAUSE_MMR6 = 2191
CEFBS_HasStdEnc_HasMSA, // PCKEV_B = 2192
CEFBS_HasStdEnc_HasMSA, // PCKEV_D = 2193
CEFBS_HasStdEnc_HasMSA, // PCKEV_H = 2194
CEFBS_HasStdEnc_HasMSA, // PCKEV_W = 2195
CEFBS_HasStdEnc_HasMSA, // PCKOD_B = 2196
CEFBS_HasStdEnc_HasMSA, // PCKOD_D = 2197
CEFBS_HasStdEnc_HasMSA, // PCKOD_H = 2198
CEFBS_HasStdEnc_HasMSA, // PCKOD_W = 2199
CEFBS_HasStdEnc_HasMSA, // PCNT_B = 2200
CEFBS_HasStdEnc_HasMSA, // PCNT_D = 2201
CEFBS_HasStdEnc_HasMSA, // PCNT_H = 2202
CEFBS_HasStdEnc_HasMSA, // PCNT_W = 2203
CEFBS_HasDSP, // PICK_PH = 2204
CEFBS_InMicroMips_HasDSP, // PICK_PH_MM = 2205
CEFBS_HasDSP, // PICK_QB = 2206
CEFBS_InMicroMips_HasDSP, // PICK_QB_MM = 2207
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // PLL_PS64 = 2208
CEFBS_HasStdEnc_IsFP64bit_HasMips32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // PLU_PS64 = 2209
CEFBS_HasCnMips, // POP = 2210
CEFBS_HasDSP, // PRECEQU_PH_QBL = 2211
CEFBS_HasDSP, // PRECEQU_PH_QBLA = 2212
CEFBS_InMicroMips_HasDSP, // PRECEQU_PH_QBLA_MM = 2213
CEFBS_InMicroMips_HasDSP, // PRECEQU_PH_QBL_MM = 2214
CEFBS_HasDSP, // PRECEQU_PH_QBR = 2215
CEFBS_HasDSP, // PRECEQU_PH_QBRA = 2216
CEFBS_InMicroMips_HasDSP, // PRECEQU_PH_QBRA_MM = 2217
CEFBS_InMicroMips_HasDSP, // PRECEQU_PH_QBR_MM = 2218
CEFBS_HasDSP, // PRECEQ_W_PHL = 2219
CEFBS_InMicroMips_HasDSP, // PRECEQ_W_PHL_MM = 2220
CEFBS_HasDSP, // PRECEQ_W_PHR = 2221
CEFBS_InMicroMips_HasDSP, // PRECEQ_W_PHR_MM = 2222
CEFBS_HasDSP, // PRECEU_PH_QBL = 2223
CEFBS_HasDSP, // PRECEU_PH_QBLA = 2224
CEFBS_InMicroMips_HasDSP, // PRECEU_PH_QBLA_MM = 2225
CEFBS_InMicroMips_HasDSP, // PRECEU_PH_QBL_MM = 2226
CEFBS_HasDSP, // PRECEU_PH_QBR = 2227
CEFBS_HasDSP, // PRECEU_PH_QBRA = 2228
CEFBS_InMicroMips_HasDSP, // PRECEU_PH_QBRA_MM = 2229
CEFBS_InMicroMips_HasDSP, // PRECEU_PH_QBR_MM = 2230
CEFBS_HasDSP, // PRECRQU_S_QB_PH = 2231
CEFBS_InMicroMips_HasDSP, // PRECRQU_S_QB_PH_MM = 2232
CEFBS_HasDSP, // PRECRQ_PH_W = 2233
CEFBS_InMicroMips_HasDSP, // PRECRQ_PH_W_MM = 2234
CEFBS_HasDSP, // PRECRQ_QB_PH = 2235
CEFBS_InMicroMips_HasDSP, // PRECRQ_QB_PH_MM = 2236
CEFBS_HasDSP, // PRECRQ_RS_PH_W = 2237
CEFBS_InMicroMips_HasDSP, // PRECRQ_RS_PH_W_MM = 2238
CEFBS_HasDSPR2, // PRECR_QB_PH = 2239
CEFBS_InMicroMips_HasDSPR2, // PRECR_QB_PH_MMR2 = 2240
CEFBS_HasDSPR2, // PRECR_SRA_PH_W = 2241
CEFBS_InMicroMips_HasDSPR2, // PRECR_SRA_PH_W_MMR2 = 2242
CEFBS_HasDSPR2, // PRECR_SRA_R_PH_W = 2243
CEFBS_InMicroMips_HasDSPR2, // PRECR_SRA_R_PH_W_MMR2 = 2244
CEFBS_HasStdEnc_HasMips3_32_NotMips32r6_NotMips64r6_NotInMicroMips, // PREF = 2245
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // PREFE = 2246
CEFBS_InMicroMips_HasEVA, // PREFE_MM = 2247
CEFBS_InMicroMips_NotMips32r6, // PREFX_MM = 2248
CEFBS_InMicroMips_NotMips32r6, // PREF_MM = 2249
CEFBS_InMicroMips_HasMips32r6, // PREF_MMR6 = 2250
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // PREF_R6 = 2251
CEFBS_HasDSPR2, // PREPEND = 2252
CEFBS_InMicroMips_HasDSPR2, // PREPEND_MMR2 = 2253
CEFBS_HasDSP, // RADDU_W_QB = 2254
CEFBS_InMicroMips_HasDSP, // RADDU_W_QB_MM = 2255
CEFBS_HasDSP, // RDDSP = 2256
CEFBS_InMicroMips_HasDSP, // RDDSP_MM = 2257
CEFBS_HasStdEnc_NotInMicroMips, // RDHWR = 2258
CEFBS_NotInMips16Mode_IsGP64bit, // RDHWR64 = 2259
CEFBS_InMicroMips_NotMips32r6, // RDHWR_MM = 2260
CEFBS_InMicroMips_HasMips32r6, // RDHWR_MMR6 = 2261
CEFBS_InMicroMips_HasMips32r6, // RDPGPR_MMR6 = 2262
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips, // RECIP_D32 = 2263
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // RECIP_D32_MM = 2264
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips, // RECIP_D64 = 2265
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // RECIP_D64_MM = 2266
CEFBS_HasStdEnc_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips, // RECIP_S = 2267
CEFBS_InMicroMips_IsNotSoftFloat, // RECIP_S_MM = 2268
CEFBS_HasDSP, // REPLV_PH = 2269
CEFBS_InMicroMips_HasDSP, // REPLV_PH_MM = 2270
CEFBS_HasDSP, // REPLV_QB = 2271
CEFBS_InMicroMips_HasDSP, // REPLV_QB_MM = 2272
CEFBS_HasDSP, // REPL_PH = 2273
CEFBS_InMicroMips_HasDSP, // REPL_PH_MM = 2274
CEFBS_HasDSP, // REPL_QB = 2275
CEFBS_InMicroMips_HasDSP, // REPL_QB_MM = 2276
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // RINT_D = 2277
CEFBS_InMicroMips_HasMips32r6, // RINT_D_MMR6 = 2278
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // RINT_S = 2279
CEFBS_InMicroMips_HasMips32r6, // RINT_S_MMR6 = 2280
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // ROTR = 2281
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // ROTRV = 2282
CEFBS_InMicroMips, // ROTRV_MM = 2283
CEFBS_InMicroMips, // ROTR_MM = 2284
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32_IsNotSoftFloat_NotInMicroMips, // ROUND_L_D64 = 2285
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // ROUND_L_D_MMR6 = 2286
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // ROUND_L_S = 2287
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // ROUND_L_S_MMR6 = 2288
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // ROUND_W_D32 = 2289
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // ROUND_W_D64 = 2290
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // ROUND_W_D_MMR6 = 2291
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // ROUND_W_MM = 2292
CEFBS_HasStdEnc_HasMips2_IsNotSoftFloat_NotInMicroMips, // ROUND_W_S = 2293
CEFBS_InMicroMips_IsNotSoftFloat, // ROUND_W_S_MM = 2294
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // ROUND_W_S_MMR6 = 2295
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips, // RSQRT_D32 = 2296
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // RSQRT_D32_MM = 2297
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips, // RSQRT_D64 = 2298
CEFBS_InMicroMips_IsFP64bit_IsNotSoftFloat, // RSQRT_D64_MM = 2299
CEFBS_HasStdEnc_HasMips4_32r2_IsNotSoftFloat_NotInMicroMips, // RSQRT_S = 2300
CEFBS_InMicroMips_IsNotSoftFloat, // RSQRT_S_MM = 2301
CEFBS_InMips16Mode, // Restore16 = 2302
CEFBS_InMips16Mode, // RestoreX16 = 2303
CEFBS_HasCnMipsP, // SAA = 2304
CEFBS_HasCnMipsP, // SAAD = 2305
CEFBS_HasStdEnc_HasMSA, // SAT_S_B = 2306
CEFBS_HasStdEnc_HasMSA, // SAT_S_D = 2307
CEFBS_HasStdEnc_HasMSA, // SAT_S_H = 2308
CEFBS_HasStdEnc_HasMSA, // SAT_S_W = 2309
CEFBS_HasStdEnc_HasMSA, // SAT_U_B = 2310
CEFBS_HasStdEnc_HasMSA, // SAT_U_D = 2311
CEFBS_HasStdEnc_HasMSA, // SAT_U_H = 2312
CEFBS_HasStdEnc_HasMSA, // SAT_U_W = 2313
CEFBS_HasStdEnc_NotInMicroMips, // SB = 2314
CEFBS_InMicroMips_NotMips32r6, // SB16_MM = 2315
CEFBS_InMicroMips_HasMips32r6, // SB16_MMR6 = 2316
CEFBS_NotInMips16Mode_IsGP64bit, // SB64 = 2317
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // SBE = 2318
CEFBS_InMicroMips_HasEVA, // SBE_MM = 2319
CEFBS_InMicroMips, // SB_MM = 2320
CEFBS_InMicroMips_HasMips32r6, // SB_MMR6 = 2321
CEFBS_HasStdEnc_IsPTR32bit_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // SC = 2322
CEFBS_HasStdEnc_IsPTR64bit_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // SC64 = 2323
CEFBS_HasStdEnc_IsPTR64bit_HasMips64r6_NotInMicroMips, // SC64_R6 = 2324
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // SCD = 2325
CEFBS_HasStdEnc_HasMips32r6, // SCD_R6 = 2326
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // SCE = 2327
CEFBS_InMicroMips_HasEVA, // SCE_MM = 2328
CEFBS_InMicroMips_NotMips32r6, // SC_MM = 2329
CEFBS_InMicroMips_HasMips32r6, // SC_MMR6 = 2330
CEFBS_HasStdEnc_IsPTR32bit_HasMips32r6_NotInMicroMips, // SC_R6 = 2331
CEFBS_HasStdEnc_HasMips3_NotInMicroMips, // SD = 2332
CEFBS_HasStdEnc_HasMips32_NotMips32r6_NotMips64r6_NotInMicroMips, // SDBBP = 2333
CEFBS_InMicroMips_NotMips32r6, // SDBBP16_MM = 2334
CEFBS_InMicroMips_HasMips32r6, // SDBBP16_MMR6 = 2335
CEFBS_InMicroMips, // SDBBP_MM = 2336
CEFBS_InMicroMips_HasMips32r6, // SDBBP_MMR6 = 2337
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // SDBBP_R6 = 2338
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // SDC1 = 2339
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // SDC164 = 2340
CEFBS_InMicroMips_IsFP64bit_HasMips32r6_IsNotSoftFloat, // SDC1_D64_MMR6 = 2341
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // SDC1_MM = 2342
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // SDC2 = 2343
CEFBS_InMicroMips_HasMips32r6, // SDC2_MMR6 = 2344
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // SDC2_R6 = 2345
CEFBS_HasStdEnc_HasMips2_NotCnMips_NotInMicroMips, // SDC3 = 2346
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // SDIV = 2347
CEFBS_InMicroMips_NotMips32r6, // SDIV_MM = 2348
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // SDL = 2349
CEFBS_HasStdEnc_HasMips3_NotMips32r6_NotMips64r6, // SDR = 2350
CEFBS_HasStdEnc_NotFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // SDXC1 = 2351
CEFBS_HasStdEnc_IsFP64bit_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat, // SDXC164 = 2352
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // SEB = 2353
CEFBS_HasStdEnc_IsGP64bit_HasMips32r2, // SEB64 = 2354
CEFBS_InMicroMips, // SEB_MM = 2355
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // SEH = 2356
CEFBS_HasStdEnc_IsGP64bit_HasMips32r2, // SEH64 = 2357
CEFBS_InMicroMips, // SEH_MM = 2358
CEFBS_HasStdEnc_IsGP32bit_HasMips32r6_NotInMicroMips, // SELEQZ = 2359
CEFBS_HasStdEnc_IsGP64bit_HasMips32r6, // SELEQZ64 = 2360
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // SELEQZ_D = 2361
CEFBS_InMicroMips_HasMips32r6, // SELEQZ_D_MMR6 = 2362
CEFBS_InMicroMips_HasMips32r6, // SELEQZ_MMR6 = 2363
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // SELEQZ_S = 2364
CEFBS_InMicroMips_HasMips32r6, // SELEQZ_S_MMR6 = 2365
CEFBS_HasStdEnc_IsGP32bit_HasMips32r6_NotInMicroMips, // SELNEZ = 2366
CEFBS_HasStdEnc_IsGP64bit_HasMips32r6, // SELNEZ64 = 2367
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // SELNEZ_D = 2368
CEFBS_InMicroMips_HasMips32r6, // SELNEZ_D_MMR6 = 2369
CEFBS_InMicroMips_HasMips32r6, // SELNEZ_MMR6 = 2370
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // SELNEZ_S = 2371
CEFBS_InMicroMips_HasMips32r6, // SELNEZ_S_MMR6 = 2372
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // SEL_D = 2373
CEFBS_InMicroMips_HasMips32r6, // SEL_D_MMR6 = 2374
CEFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_NotInMicroMips, // SEL_S = 2375
CEFBS_InMicroMips_HasMips32r6, // SEL_S_MMR6 = 2376
CEFBS_HasCnMips, // SEQ = 2377
CEFBS_HasCnMips, // SEQi = 2378
CEFBS_HasStdEnc_NotInMicroMips, // SH = 2379
CEFBS_InMicroMips_NotMips32r6, // SH16_MM = 2380
CEFBS_InMicroMips_HasMips32r6, // SH16_MMR6 = 2381
CEFBS_NotInMips16Mode_IsGP64bit, // SH64 = 2382
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // SHE = 2383
CEFBS_InMicroMips_HasEVA, // SHE_MM = 2384
CEFBS_HasStdEnc_HasMSA, // SHF_B = 2385
CEFBS_HasStdEnc_HasMSA, // SHF_H = 2386
CEFBS_HasStdEnc_HasMSA, // SHF_W = 2387
CEFBS_HasDSP, // SHILO = 2388
CEFBS_HasDSP, // SHILOV = 2389
CEFBS_InMicroMips_HasDSP, // SHILOV_MM = 2390
CEFBS_InMicroMips_HasDSP, // SHILO_MM = 2391
CEFBS_HasDSP, // SHLLV_PH = 2392
CEFBS_InMicroMips_HasDSP, // SHLLV_PH_MM = 2393
CEFBS_HasDSP, // SHLLV_QB = 2394
CEFBS_InMicroMips_HasDSP, // SHLLV_QB_MM = 2395
CEFBS_HasDSP, // SHLLV_S_PH = 2396
CEFBS_InMicroMips_HasDSP, // SHLLV_S_PH_MM = 2397
CEFBS_HasDSP, // SHLLV_S_W = 2398
CEFBS_InMicroMips_HasDSP, // SHLLV_S_W_MM = 2399
CEFBS_HasDSP, // SHLL_PH = 2400
CEFBS_InMicroMips_HasDSP, // SHLL_PH_MM = 2401
CEFBS_HasDSP, // SHLL_QB = 2402
CEFBS_InMicroMips_HasDSP, // SHLL_QB_MM = 2403
CEFBS_HasDSP, // SHLL_S_PH = 2404
CEFBS_InMicroMips_HasDSP, // SHLL_S_PH_MM = 2405
CEFBS_HasDSP, // SHLL_S_W = 2406
CEFBS_InMicroMips_HasDSP, // SHLL_S_W_MM = 2407
CEFBS_HasDSP, // SHRAV_PH = 2408
CEFBS_InMicroMips_HasDSP, // SHRAV_PH_MM = 2409
CEFBS_HasDSPR2, // SHRAV_QB = 2410
CEFBS_InMicroMips_HasDSPR2, // SHRAV_QB_MMR2 = 2411
CEFBS_HasDSP, // SHRAV_R_PH = 2412
CEFBS_InMicroMips_HasDSP, // SHRAV_R_PH_MM = 2413
CEFBS_HasDSPR2, // SHRAV_R_QB = 2414
CEFBS_InMicroMips_HasDSPR2, // SHRAV_R_QB_MMR2 = 2415
CEFBS_HasDSP, // SHRAV_R_W = 2416
CEFBS_InMicroMips_HasDSP, // SHRAV_R_W_MM = 2417
CEFBS_HasDSP, // SHRA_PH = 2418
CEFBS_InMicroMips_HasDSP, // SHRA_PH_MM = 2419
CEFBS_HasDSPR2, // SHRA_QB = 2420
CEFBS_InMicroMips_HasDSPR2, // SHRA_QB_MMR2 = 2421
CEFBS_HasDSP, // SHRA_R_PH = 2422
CEFBS_InMicroMips_HasDSP, // SHRA_R_PH_MM = 2423
CEFBS_HasDSPR2, // SHRA_R_QB = 2424
CEFBS_InMicroMips_HasDSPR2, // SHRA_R_QB_MMR2 = 2425
CEFBS_HasDSP, // SHRA_R_W = 2426
CEFBS_InMicroMips_HasDSP, // SHRA_R_W_MM = 2427
CEFBS_HasDSPR2, // SHRLV_PH = 2428
CEFBS_InMicroMips_HasDSPR2, // SHRLV_PH_MMR2 = 2429
CEFBS_HasDSP, // SHRLV_QB = 2430
CEFBS_InMicroMips_HasDSP, // SHRLV_QB_MM = 2431
CEFBS_HasDSPR2, // SHRL_PH = 2432
CEFBS_InMicroMips_HasDSPR2, // SHRL_PH_MMR2 = 2433
CEFBS_HasDSP, // SHRL_QB = 2434
CEFBS_InMicroMips_HasDSP, // SHRL_QB_MM = 2435
CEFBS_InMicroMips, // SH_MM = 2436
CEFBS_InMicroMips_HasMips32r6, // SH_MMR6 = 2437
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // SIGRIE = 2438
CEFBS_InMicroMips_HasMips32r6, // SIGRIE_MMR6 = 2439
CEFBS_HasStdEnc_HasMSA, // SLDI_B = 2440
CEFBS_HasStdEnc_HasMSA, // SLDI_D = 2441
CEFBS_HasStdEnc_HasMSA, // SLDI_H = 2442
CEFBS_HasStdEnc_HasMSA, // SLDI_W = 2443
CEFBS_HasStdEnc_HasMSA, // SLD_B = 2444
CEFBS_HasStdEnc_HasMSA, // SLD_D = 2445
CEFBS_HasStdEnc_HasMSA, // SLD_H = 2446
CEFBS_HasStdEnc_HasMSA, // SLD_W = 2447
CEFBS_HasStdEnc_NotInMicroMips, // SLL = 2448
CEFBS_InMicroMips_NotMips32r6, // SLL16_MM = 2449
CEFBS_InMicroMips_HasMips32r6, // SLL16_MMR6 = 2450
CEFBS_NotInMips16Mode_IsGP64bit, // SLL64_32 = 2451
CEFBS_NotInMips16Mode_IsGP64bit, // SLL64_64 = 2452
CEFBS_HasStdEnc_HasMSA, // SLLI_B = 2453
CEFBS_HasStdEnc_HasMSA, // SLLI_D = 2454
CEFBS_HasStdEnc_HasMSA, // SLLI_H = 2455
CEFBS_HasStdEnc_HasMSA, // SLLI_W = 2456
CEFBS_HasStdEnc_NotInMicroMips, // SLLV = 2457
CEFBS_InMicroMips, // SLLV_MM = 2458
CEFBS_HasStdEnc_HasMSA, // SLL_B = 2459
CEFBS_HasStdEnc_HasMSA, // SLL_D = 2460
CEFBS_HasStdEnc_HasMSA, // SLL_H = 2461
CEFBS_InMicroMips, // SLL_MM = 2462
CEFBS_InMicroMips_HasMips32r6, // SLL_MMR6 = 2463
CEFBS_HasStdEnc_HasMSA, // SLL_W = 2464
CEFBS_HasStdEnc_NotInMicroMips, // SLT = 2465
CEFBS_NotInMips16Mode_IsGP64bit, // SLT64 = 2466
CEFBS_InMicroMips, // SLT_MM = 2467
CEFBS_HasStdEnc_NotInMicroMips, // SLTi = 2468
CEFBS_NotInMips16Mode_IsGP64bit, // SLTi64 = 2469
CEFBS_InMicroMips, // SLTi_MM = 2470
CEFBS_HasStdEnc_NotInMicroMips, // SLTiu = 2471
CEFBS_NotInMips16Mode_IsGP64bit, // SLTiu64 = 2472
CEFBS_InMicroMips, // SLTiu_MM = 2473
CEFBS_HasStdEnc_NotInMicroMips, // SLTu = 2474
CEFBS_NotInMips16Mode_IsGP64bit, // SLTu64 = 2475
CEFBS_InMicroMips, // SLTu_MM = 2476
CEFBS_HasCnMips, // SNE = 2477
CEFBS_HasCnMips, // SNEi = 2478
CEFBS_HasStdEnc_HasMSA, // SPLATI_B = 2479
CEFBS_HasStdEnc_HasMSA, // SPLATI_D = 2480
CEFBS_HasStdEnc_HasMSA, // SPLATI_H = 2481
CEFBS_HasStdEnc_HasMSA, // SPLATI_W = 2482
CEFBS_HasStdEnc_HasMSA, // SPLAT_B = 2483
CEFBS_HasStdEnc_HasMSA, // SPLAT_D = 2484
CEFBS_HasStdEnc_HasMSA, // SPLAT_H = 2485
CEFBS_HasStdEnc_HasMSA, // SPLAT_W = 2486
CEFBS_HasStdEnc_NotInMicroMips, // SRA = 2487
CEFBS_HasStdEnc_HasMSA, // SRAI_B = 2488
CEFBS_HasStdEnc_HasMSA, // SRAI_D = 2489
CEFBS_HasStdEnc_HasMSA, // SRAI_H = 2490
CEFBS_HasStdEnc_HasMSA, // SRAI_W = 2491
CEFBS_HasStdEnc_HasMSA, // SRARI_B = 2492
CEFBS_HasStdEnc_HasMSA, // SRARI_D = 2493
CEFBS_HasStdEnc_HasMSA, // SRARI_H = 2494
CEFBS_HasStdEnc_HasMSA, // SRARI_W = 2495
CEFBS_HasStdEnc_HasMSA, // SRAR_B = 2496
CEFBS_HasStdEnc_HasMSA, // SRAR_D = 2497
CEFBS_HasStdEnc_HasMSA, // SRAR_H = 2498
CEFBS_HasStdEnc_HasMSA, // SRAR_W = 2499
CEFBS_HasStdEnc_NotInMicroMips, // SRAV = 2500
CEFBS_InMicroMips, // SRAV_MM = 2501
CEFBS_HasStdEnc_HasMSA, // SRA_B = 2502
CEFBS_HasStdEnc_HasMSA, // SRA_D = 2503
CEFBS_HasStdEnc_HasMSA, // SRA_H = 2504
CEFBS_InMicroMips, // SRA_MM = 2505
CEFBS_HasStdEnc_HasMSA, // SRA_W = 2506
CEFBS_HasStdEnc_NotInMicroMips, // SRL = 2507
CEFBS_InMicroMips_NotMips32r6, // SRL16_MM = 2508
CEFBS_InMicroMips_HasMips32r6, // SRL16_MMR6 = 2509
CEFBS_HasStdEnc_HasMSA, // SRLI_B = 2510
CEFBS_HasStdEnc_HasMSA, // SRLI_D = 2511
CEFBS_HasStdEnc_HasMSA, // SRLI_H = 2512
CEFBS_HasStdEnc_HasMSA, // SRLI_W = 2513
CEFBS_HasStdEnc_HasMSA, // SRLRI_B = 2514
CEFBS_HasStdEnc_HasMSA, // SRLRI_D = 2515
CEFBS_HasStdEnc_HasMSA, // SRLRI_H = 2516
CEFBS_HasStdEnc_HasMSA, // SRLRI_W = 2517
CEFBS_HasStdEnc_HasMSA, // SRLR_B = 2518
CEFBS_HasStdEnc_HasMSA, // SRLR_D = 2519
CEFBS_HasStdEnc_HasMSA, // SRLR_H = 2520
CEFBS_HasStdEnc_HasMSA, // SRLR_W = 2521
CEFBS_HasStdEnc_NotInMicroMips, // SRLV = 2522
CEFBS_InMicroMips, // SRLV_MM = 2523
CEFBS_HasStdEnc_HasMSA, // SRL_B = 2524
CEFBS_HasStdEnc_HasMSA, // SRL_D = 2525
CEFBS_HasStdEnc_HasMSA, // SRL_H = 2526
CEFBS_InMicroMips, // SRL_MM = 2527
CEFBS_HasStdEnc_HasMSA, // SRL_W = 2528
CEFBS_HasStdEnc_NotInMicroMips, // SSNOP = 2529
CEFBS_InMicroMips, // SSNOP_MM = 2530
CEFBS_InMicroMips_HasMips32r6, // SSNOP_MMR6 = 2531
CEFBS_HasStdEnc_HasMSA, // ST_B = 2532
CEFBS_HasStdEnc_HasMSA, // ST_D = 2533
CEFBS_HasStdEnc_HasMSA, // ST_H = 2534
CEFBS_HasStdEnc_HasMSA, // ST_W = 2535
CEFBS_HasStdEnc_NotInMicroMips, // SUB = 2536
CEFBS_HasDSPR2, // SUBQH_PH = 2537
CEFBS_InMicroMips_HasDSPR2, // SUBQH_PH_MMR2 = 2538
CEFBS_HasDSPR2, // SUBQH_R_PH = 2539
CEFBS_InMicroMips_HasDSPR2, // SUBQH_R_PH_MMR2 = 2540
CEFBS_HasDSPR2, // SUBQH_R_W = 2541
CEFBS_InMicroMips_HasDSPR2, // SUBQH_R_W_MMR2 = 2542
CEFBS_HasDSPR2, // SUBQH_W = 2543
CEFBS_InMicroMips_HasDSPR2, // SUBQH_W_MMR2 = 2544
CEFBS_HasDSP, // SUBQ_PH = 2545
CEFBS_InMicroMips_HasDSP, // SUBQ_PH_MM = 2546
CEFBS_HasDSP, // SUBQ_S_PH = 2547
CEFBS_InMicroMips_HasDSP, // SUBQ_S_PH_MM = 2548
CEFBS_HasDSP, // SUBQ_S_W = 2549
CEFBS_InMicroMips_HasDSP, // SUBQ_S_W_MM = 2550
CEFBS_HasStdEnc_HasMSA, // SUBSUS_U_B = 2551
CEFBS_HasStdEnc_HasMSA, // SUBSUS_U_D = 2552
CEFBS_HasStdEnc_HasMSA, // SUBSUS_U_H = 2553
CEFBS_HasStdEnc_HasMSA, // SUBSUS_U_W = 2554
CEFBS_HasStdEnc_HasMSA, // SUBSUU_S_B = 2555
CEFBS_HasStdEnc_HasMSA, // SUBSUU_S_D = 2556
CEFBS_HasStdEnc_HasMSA, // SUBSUU_S_H = 2557
CEFBS_HasStdEnc_HasMSA, // SUBSUU_S_W = 2558
CEFBS_HasStdEnc_HasMSA, // SUBS_S_B = 2559
CEFBS_HasStdEnc_HasMSA, // SUBS_S_D = 2560
CEFBS_HasStdEnc_HasMSA, // SUBS_S_H = 2561
CEFBS_HasStdEnc_HasMSA, // SUBS_S_W = 2562
CEFBS_HasStdEnc_HasMSA, // SUBS_U_B = 2563
CEFBS_HasStdEnc_HasMSA, // SUBS_U_D = 2564
CEFBS_HasStdEnc_HasMSA, // SUBS_U_H = 2565
CEFBS_HasStdEnc_HasMSA, // SUBS_U_W = 2566
CEFBS_InMicroMips_NotMips32r6, // SUBU16_MM = 2567
CEFBS_InMicroMips_HasMips32r6, // SUBU16_MMR6 = 2568
CEFBS_HasDSPR2, // SUBUH_QB = 2569
CEFBS_InMicroMips_HasDSPR2, // SUBUH_QB_MMR2 = 2570
CEFBS_HasDSPR2, // SUBUH_R_QB = 2571
CEFBS_InMicroMips_HasDSPR2, // SUBUH_R_QB_MMR2 = 2572
CEFBS_InMicroMips_HasMips32r6, // SUBU_MMR6 = 2573
CEFBS_HasDSPR2, // SUBU_PH = 2574
CEFBS_InMicroMips_HasDSPR2, // SUBU_PH_MMR2 = 2575
CEFBS_HasDSP, // SUBU_QB = 2576
CEFBS_InMicroMips_HasDSP, // SUBU_QB_MM = 2577
CEFBS_HasDSPR2, // SUBU_S_PH = 2578
CEFBS_InMicroMips_HasDSPR2, // SUBU_S_PH_MMR2 = 2579
CEFBS_HasDSP, // SUBU_S_QB = 2580
CEFBS_InMicroMips_HasDSP, // SUBU_S_QB_MM = 2581
CEFBS_HasStdEnc_HasMSA, // SUBVI_B = 2582
CEFBS_HasStdEnc_HasMSA, // SUBVI_D = 2583
CEFBS_HasStdEnc_HasMSA, // SUBVI_H = 2584
CEFBS_HasStdEnc_HasMSA, // SUBVI_W = 2585
CEFBS_HasStdEnc_HasMSA, // SUBV_B = 2586
CEFBS_HasStdEnc_HasMSA, // SUBV_D = 2587
CEFBS_HasStdEnc_HasMSA, // SUBV_H = 2588
CEFBS_HasStdEnc_HasMSA, // SUBV_W = 2589
CEFBS_InMicroMips_NotMips32r6, // SUB_MM = 2590
CEFBS_InMicroMips_HasMips32r6, // SUB_MMR6 = 2591
CEFBS_HasStdEnc_NotInMicroMips, // SUBu = 2592
CEFBS_InMicroMips_NotMips32r6, // SUBu_MM = 2593
CEFBS_HasStdEnc_NotFP64bit_HasMips5_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // SUXC1 = 2594
CEFBS_HasStdEnc_IsFP64bit_HasMips5_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat_NotInMicroMips, // SUXC164 = 2595
CEFBS_InMicroMips_IsFP64bit_NotMips32r6_IsNotSoftFloat, // SUXC1_MM = 2596
CEFBS_HasStdEnc_NotInMicroMips, // SW = 2597
CEFBS_InMicroMips_NotMips32r6, // SW16_MM = 2598
CEFBS_InMicroMips_HasMips32r6, // SW16_MMR6 = 2599
CEFBS_NotInMips16Mode_IsGP64bit, // SW64 = 2600
CEFBS_HasStdEnc_IsNotSoftFloat_NotInMicroMips, // SWC1 = 2601
CEFBS_InMicroMips_IsNotSoftFloat, // SWC1_MM = 2602
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // SWC2 = 2603
CEFBS_InMicroMips_HasMips32r6, // SWC2_MMR6 = 2604
CEFBS_HasStdEnc_HasMips32r6_NotInMicroMips, // SWC2_R6 = 2605
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotCnMips_NotInMicroMips, // SWC3 = 2606
CEFBS_NotInMips16Mode_HasDSP, // SWDSP = 2607
CEFBS_InMicroMips_HasDSP, // SWDSP_MM = 2608
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // SWE = 2609
CEFBS_InMicroMips_HasEVA, // SWE_MM = 2610
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // SWL = 2611
CEFBS_NotInMips16Mode_IsGP64bit, // SWL64 = 2612
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6_HasEVA_NotInMicroMips, // SWLE = 2613
CEFBS_InMicroMips_NotMips32r6_HasEVA, // SWLE_MM = 2614
CEFBS_InMicroMips_NotMips32r6, // SWL_MM = 2615
CEFBS_InMicroMips_NotMips32r6, // SWM16_MM = 2616
CEFBS_InMicroMips_HasMips32r6, // SWM16_MMR6 = 2617
CEFBS_InMicroMips, // SWM32_MM = 2618
CEFBS_InMicroMips, // SWP_MM = 2619
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // SWR = 2620
CEFBS_NotInMips16Mode_IsGP64bit, // SWR64 = 2621
CEFBS_HasStdEnc_HasMips32r2_NotMips32r6_NotMips64r6_HasEVA_NotInMicroMips, // SWRE = 2622
CEFBS_InMicroMips_NotMips32r6_HasEVA, // SWRE_MM = 2623
CEFBS_InMicroMips_NotMips32r6, // SWR_MM = 2624
CEFBS_InMicroMips_NotMips32r6, // SWSP_MM = 2625
CEFBS_InMicroMips_HasMips32r6, // SWSP_MMR6 = 2626
CEFBS_HasStdEnc_HasMips4_32r2_NotMips32r6_NotMips64r6_IsNotSoftFloat, // SWXC1 = 2627
CEFBS_InMicroMips_NotMips32r6_IsNotSoftFloat, // SWXC1_MM = 2628
CEFBS_InMicroMips, // SW_MM = 2629
CEFBS_InMicroMips_HasMips32r6, // SW_MMR6 = 2630
CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // SYNC = 2631
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // SYNCI = 2632
CEFBS_InMicroMips_NotMips32r6, // SYNCI_MM = 2633
CEFBS_InMicroMips_HasMips32r6, // SYNCI_MMR6 = 2634
CEFBS_InMicroMips, // SYNC_MM = 2635
CEFBS_InMicroMips_HasMips32r6, // SYNC_MMR6 = 2636
CEFBS_HasStdEnc_NotInMicroMips, // SYSCALL = 2637
CEFBS_InMicroMips, // SYSCALL_MM = 2638
CEFBS_InMips16Mode, // Save16 = 2639
CEFBS_InMips16Mode, // SaveX16 = 2640
CEFBS_InMips16Mode, // SbRxRyOffMemX16 = 2641
CEFBS_InMips16Mode, // SebRx16 = 2642
CEFBS_InMips16Mode, // SehRx16 = 2643
CEFBS_InMips16Mode, // ShRxRyOffMemX16 = 2644
CEFBS_InMips16Mode, // SllX16 = 2645
CEFBS_InMips16Mode, // SllvRxRy16 = 2646
CEFBS_InMips16Mode, // SltRxRy16 = 2647
CEFBS_InMips16Mode, // SltiRxImm16 = 2648
CEFBS_InMips16Mode, // SltiRxImmX16 = 2649
CEFBS_InMips16Mode, // SltiuRxImm16 = 2650
CEFBS_InMips16Mode, // SltiuRxImmX16 = 2651
CEFBS_InMips16Mode, // SltuRxRy16 = 2652
CEFBS_InMips16Mode, // SraX16 = 2653
CEFBS_InMips16Mode, // SravRxRy16 = 2654
CEFBS_InMips16Mode, // SrlX16 = 2655
CEFBS_InMips16Mode, // SrlvRxRy16 = 2656
CEFBS_InMips16Mode, // SubuRxRyRz16 = 2657
CEFBS_InMips16Mode, // SwRxRyOffMemX16 = 2658
CEFBS_InMips16Mode, // SwRxSpImmX16 = 2659
CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // TEQ = 2660
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // TEQI = 2661
CEFBS_InMicroMips_NotMips32r6, // TEQI_MM = 2662
CEFBS_InMicroMips, // TEQ_MM = 2663
CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // TGE = 2664
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // TGEI = 2665
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // TGEIU = 2666
CEFBS_InMicroMips_NotMips32r6, // TGEIU_MM = 2667
CEFBS_InMicroMips_NotMips32r6, // TGEI_MM = 2668
CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // TGEU = 2669
CEFBS_InMicroMips, // TGEU_MM = 2670
CEFBS_InMicroMips, // TGE_MM = 2671
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // TLBGINV = 2672
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // TLBGINVF = 2673
CEFBS_InMicroMips_HasMips32r5_HasVirt, // TLBGINVF_MM = 2674
CEFBS_InMicroMips_HasMips32r5_HasVirt, // TLBGINV_MM = 2675
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // TLBGP = 2676
CEFBS_InMicroMips_HasMips32r5_HasVirt, // TLBGP_MM = 2677
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // TLBGR = 2678
CEFBS_InMicroMips_HasMips32r5_HasVirt, // TLBGR_MM = 2679
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // TLBGWI = 2680
CEFBS_InMicroMips_HasMips32r5_HasVirt, // TLBGWI_MM = 2681
CEFBS_HasStdEnc_HasMips32r5_HasVirt_NotInMicroMips, // TLBGWR = 2682
CEFBS_InMicroMips_HasMips32r5_HasVirt, // TLBGWR_MM = 2683
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // TLBINV = 2684
CEFBS_HasStdEnc_HasMips32r2_HasEVA_NotInMicroMips, // TLBINVF = 2685
CEFBS_InMicroMips_HasMips32r6, // TLBINVF_MMR6 = 2686
CEFBS_InMicroMips_HasMips32r6, // TLBINV_MMR6 = 2687
CEFBS_HasStdEnc_NotInMicroMips, // TLBP = 2688
CEFBS_InMicroMips, // TLBP_MM = 2689
CEFBS_HasStdEnc_NotInMicroMips, // TLBR = 2690
CEFBS_InMicroMips, // TLBR_MM = 2691
CEFBS_HasStdEnc_NotInMicroMips, // TLBWI = 2692
CEFBS_InMicroMips, // TLBWI_MM = 2693
CEFBS_HasStdEnc_NotInMicroMips, // TLBWR = 2694
CEFBS_InMicroMips, // TLBWR_MM = 2695
CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // TLT = 2696
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // TLTI = 2697
CEFBS_InMicroMips_NotMips32r6, // TLTIU_MM = 2698
CEFBS_InMicroMips_NotMips32r6, // TLTI_MM = 2699
CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // TLTU = 2700
CEFBS_InMicroMips, // TLTU_MM = 2701
CEFBS_InMicroMips, // TLT_MM = 2702
CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // TNE = 2703
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // TNEI = 2704
CEFBS_InMicroMips_NotMips32r6, // TNEI_MM = 2705
CEFBS_InMicroMips, // TNE_MM = 2706
CEFBS_HasStdEnc_IsFP64bit_HasMips3_32_IsNotSoftFloat_NotInMicroMips, // TRUNC_L_D64 = 2707
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // TRUNC_L_D_MMR6 = 2708
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // TRUNC_L_S = 2709
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // TRUNC_L_S_MMR6 = 2710
CEFBS_HasStdEnc_NotFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // TRUNC_W_D32 = 2711
CEFBS_HasStdEnc_IsFP64bit_HasMips2_IsNotSoftFloat_NotInMicroMips, // TRUNC_W_D64 = 2712
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // TRUNC_W_D_MMR6 = 2713
CEFBS_InMicroMips_NotFP64bit_IsNotSoftFloat, // TRUNC_W_MM = 2714
CEFBS_HasStdEnc_HasMips2_IsNotSoftFloat_NotInMicroMips, // TRUNC_W_S = 2715
CEFBS_InMicroMips_IsNotSoftFloat, // TRUNC_W_S_MM = 2716
CEFBS_InMicroMips_HasMips32r6_IsNotSoftFloat, // TRUNC_W_S_MMR6 = 2717
CEFBS_HasStdEnc_HasMips2_NotMips32r6_NotMips64r6_NotInMicroMips, // TTLTIU = 2718
CEFBS_HasStdEnc_NotMips32r6_NotMips64r6_NotInMicroMips, // UDIV = 2719
CEFBS_InMicroMips_NotMips32r6, // UDIV_MM = 2720
CEFBS_HasCnMips, // V3MULU = 2721
CEFBS_HasCnMips, // VMM0 = 2722
CEFBS_HasCnMips, // VMULU = 2723
CEFBS_HasStdEnc_HasMSA, // VSHF_B = 2724
CEFBS_HasStdEnc_HasMSA, // VSHF_D = 2725
CEFBS_HasStdEnc_HasMSA, // VSHF_H = 2726
CEFBS_HasStdEnc_HasMSA, // VSHF_W = 2727
CEFBS_HasStdEnc_HasMips3_32_NotInMicroMips, // WAIT = 2728
CEFBS_InMicroMips, // WAIT_MM = 2729
CEFBS_InMicroMips_HasMips32r6, // WAIT_MMR6 = 2730
CEFBS_HasDSP_NotInMicroMips, // WRDSP = 2731
CEFBS_InMicroMips_HasDSP, // WRDSP_MM = 2732
CEFBS_InMicroMips_HasMips32r6, // WRPGPR_MMR6 = 2733
CEFBS_HasStdEnc_HasMips32r2_NotInMicroMips, // WSBH = 2734
CEFBS_InMicroMips, // WSBH_MM = 2735
CEFBS_InMicroMips_HasMips32r6, // WSBH_MMR6 = 2736
CEFBS_HasStdEnc_NotInMicroMips, // XOR = 2737
CEFBS_InMicroMips_NotMips32r6, // XOR16_MM = 2738
CEFBS_InMicroMips_HasMips32r6, // XOR16_MMR6 = 2739
CEFBS_NotInMips16Mode_IsGP64bit, // XOR64 = 2740
CEFBS_HasStdEnc_HasMSA, // XORI_B = 2741
CEFBS_InMicroMips_HasMips32r6, // XORI_MMR6 = 2742
CEFBS_InMicroMips_NotMips32r6, // XOR_MM = 2743
CEFBS_InMicroMips_HasMips32r6, // XOR_MMR6 = 2744
CEFBS_HasStdEnc_HasMSA, // XOR_V = 2745
CEFBS_HasStdEnc_NotInMicroMips, // XORi = 2746
CEFBS_NotInMips16Mode_IsGP64bit, // XORi64 = 2747
CEFBS_InMicroMips_NotMips32r6, // XORi_MM = 2748
CEFBS_InMips16Mode, // XorRxRxRy16 = 2749
CEFBS_HasStdEnc_HasMT_NotInMicroMips, // YIELD = 2750
};
assert(Inst.getOpcode() < 2751);
const FeatureBitset &RequiredFeatures = FeatureBitsets[RequiredFeaturesRefs[Inst.getOpcode()]];
FeatureBitset MissingFeatures =
(AvailableFeatures & RequiredFeatures) ^
RequiredFeatures;
if (MissingFeatures.any()) {
std::ostringstream Msg;
Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
<< " instruction but the ";
for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
if (MissingFeatures.test(i))
Msg << SubtargetFeatureNames[i] << " ";
Msg << "predicate(s) are not met";
report_fatal_error(Msg.str());
}
#else
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
(void)MCII;
#endif // NDEBUG
}
#endif