| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=aarch64-- -mattr=+fuse-aes -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| |
| --- |
| # Check that we select the aarch64_crypto_aesmc and aarch64_crypto_aese |
| # intrinsics into an ARSMCrrTied and AESErr instruction sequence. |
| name: aesmc_aese |
| legalized: true |
| regBankSelected: true |
| |
| body: | |
| bb.0: |
| liveins: $q0, $q1 |
| |
| ; CHECK-LABEL: name: aesmc_aese |
| ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0 |
| ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 |
| ; CHECK: [[T0:%[0-9]+]]:fpr128 = AESErr [[COPY]], [[COPY1]] |
| ; CHECK: [[T1:%[0-9]+]]:fpr128 = AESMCrrTied [[T0]] |
| ; CHECK: $q0 = COPY [[T1]] |
| %0:fpr(<16 x s8>) = COPY $q0 |
| %1:fpr(<16 x s8>) = COPY $q1 |
| %2:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aese), %0, %1 |
| %3:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aesmc), %2 |
| $q0 = COPY %3(<16 x s8>) |
| ... |