| # RUN: llvm-mc -triple=thumbv8 -disassemble < %s | FileCheck %s | |
| # CHECK: sevl | |
| # CHECK: sevl.w | |
| 0x50 0xbf | |
| 0xaf 0xf3 0x05 0x80 | |
| # These are the only coprocessor instructions that remain defined in ARMv8 | |
| # (The operations on p10/p11 disassemble into FP/NEON instructions) | |
| 0x00 0xee 0x10 0x0e | |
| # CHECK: mcr p14 | |
| 0x00 0xee 0x10 0x0f | |
| # CHECK: mcr p15 | |
| 0x10 0xee 0x10 0x0e | |
| # CHECK: mrc p14 | |
| 0x10 0xee 0x10 0x0f | |
| # CHECK: mrc p15 | |
| 0x40 0xec 0x00 0x0e | |
| # CHECK: mcrr p14 | |
| 0x40 0xec 0x00 0x0f | |
| # CHECK: mcrr p15 | |
| 0x50 0xec 0x00 0x0e | |
| # CHECK: mrrc p14 | |
| 0x50 0xec 0x00 0x0f | |
| # CHECK: mrrc p15 | |
| 0x80 0xec 0x00 0x0e | |
| # CHECK: stc p14 | |
| 0x90 0xec 0x00 0x0e | |
| # CHECK: ldc p14 | |