| // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s | |
| // --------------------------------------------------------------------------// | |
| // Immediate not compatible with encode/decode function. | |
| eor z5.b, z5.b, #0xfa | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate | |
| // CHECK-NEXT: eor z5.b, z5.b, #0xfa | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor z5.b, z5.b, #0xfff9 | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate | |
| // CHECK-NEXT: eor z5.b, z5.b, #0xfff9 | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor z5.h, z5.h, #0xfffa | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate | |
| // CHECK-NEXT: eor z5.h, z5.h, #0xfffa | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor z5.h, z5.h, #0xfffffff9 | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate | |
| // CHECK-NEXT: eor z5.h, z5.h, #0xfffffff9 | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor z5.s, z5.s, #0xfffffffa | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate | |
| // CHECK-NEXT: eor z5.s, z5.s, #0xfffffffa | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor z5.s, z5.s, #0xffffffffffffff9 | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate | |
| // CHECK-NEXT: eor z5.s, z5.s, #0xffffffffffffff9 | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor z15.d, z15.d, #0xfffffffffffffffa | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate | |
| // CHECK-NEXT: eor z15.d, z15.d, #0xfffffffffffffffa | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| // --------------------------------------------------------------------------// | |
| // Source and Destination Registers must match | |
| eor z7.d, z8.d, #254 | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register | |
| // CHECK-NEXT: eor z7.d, z8.d, #254 | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor z0.d, p0/m, z1.d, z2.d | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register | |
| // CHECK-NEXT: eor z0.d, p0/m, z1.d, z2.d | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| // Element size specifiers should match. | |
| eor z21.d, z5.d, z26.b | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width | |
| // CHECK-NEXT: eor z21.d, z5.d, z26.b | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| // --------------------------------------------------------------------------// | |
| // Predicate out of restricted predicate range | |
| eor z0.d, p8/z, z0.d, z1.d | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7]. | |
| // CHECK-NEXT: eor z0.d, p8/z, z0.d, z1.d | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| // --------------------------------------------------------------------------// | |
| // Predicate register must have .b suffix | |
| eor p0.h, p0/z, p0.h, p1.h | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register. | |
| // CHECK-NEXT: eor p0.h, p0/z, p0.h, p1.h | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor p0.s, p0/z, p0.s, p1.s | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register. | |
| // CHECK-NEXT: eor p0.s, p0/z, p0.s, p1.s | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| eor p0.d, p0/z, p0.d, p1.d | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register. | |
| // CHECK-NEXT: eor p0.d, p0/z, p0.d, p1.d | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| // --------------------------------------------------------------------------// | |
| // Operation only has zeroing predicate behaviour (p0/z). | |
| eor p0.b, p0/m, p1.b, p2.b | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand | |
| // CHECK-NEXT: eor p0.b, p0/m, p1.b, p2.b | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| // --------------------------------------------------------------------------// | |
| // Negative tests for instructions that are incompatible with movprfx | |
| movprfx z0.d, p0/z, z7.d | |
| eor z0.d, z0.d, #0x6 | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx | |
| // CHECK-NEXT: eor z0.d, z0.d, #0x6 | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| movprfx z0.d, p0/z, z7.d | |
| eor z0.d, z0.d, z0.d | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov | |
| // CHECK-NEXT: eor z0.d, z0.d, z0.d | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: | |
| movprfx z0, z7 | |
| eor z0.d, z0.d, z0.d | |
| // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov | |
| // CHECK-NEXT: eor z0.d, z0.d, z0.d | |
| // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |