third_party/llvm-7.0/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s

@R = external global x86_mmx		; <x86_mmx*> [#uses=1]

define void @foo(<1 x i64> %A, <1 x i64> %B) nounwind {
; CHECK-LABEL: foo:
; CHECK:       ## %bb.0: ## %entry
; CHECK-NEXT:    movq %rsi, %mm0
; CHECK-NEXT:    movq %rdi, %mm1
; CHECK-NEXT:    paddusw %mm0, %mm1
; CHECK-NEXT:    movq _R@{{.*}}(%rip), %rax
; CHECK-NEXT:    movq %mm1, (%rax)
; CHECK-NEXT:    emms
; CHECK-NEXT:    retq
entry:
	%tmp4 = bitcast <1 x i64> %B to x86_mmx		; <<4 x i16>> [#uses=1]
	%tmp6 = bitcast <1 x i64> %A to x86_mmx		; <<4 x i16>> [#uses=1]
	%tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 )		; <x86_mmx> [#uses=1]
	store x86_mmx %tmp7, x86_mmx* @R
	tail call void @llvm.x86.mmx.emms( )
	ret void
}

declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
declare void @llvm.x86.mmx.emms()