third_party/llvm-7.0/llvm/test/CodeGen/SPARC/rem.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s

define i64 @test1(i64 %X, i64 %Y) {
; CHECK-LABEL: test1:
; CHECK:         .cfi_startproc
; CHECK-NEXT:  ! %bb.0:
; CHECK-NEXT:    sdivx %o0, %o1, %o2
; CHECK-NEXT:    mulx %o2, %o1, %o1
; CHECK-NEXT:    retl
; CHECK-NEXT:    sub %o0, %o1, %o0
  %tmp1 = srem i64 %X, %Y
  ret i64 %tmp1
}

define i64 @test2(i64 %X, i64 %Y) {
; CHECK-LABEL: test2:
; CHECK:         .cfi_startproc
; CHECK-NEXT:  ! %bb.0:
; CHECK-NEXT:    udivx %o0, %o1, %o2
; CHECK-NEXT:    mulx %o2, %o1, %o1
; CHECK-NEXT:    retl
; CHECK-NEXT:    sub %o0, %o1, %o0
  %tmp1 = urem i64 %X, %Y
  ret i64 %tmp1
}

; PR18150
define i64 @test3(i64 %b) {
; CHECK-LABEL: test3:
; CHECK:         .cfi_startproc
; CHECK-NEXT:  ! %bb.0: ! %entry
; CHECK-NEXT:    sethi 2545, %o1
; CHECK-NEXT:    or %o1, 379, %o1
; CHECK-NEXT:    mulx %o0, %o1, %o0
; CHECK-NEXT:    udivx %o0, 1021, %o1
; CHECK-NEXT:    mulx %o1, 1021, %o1
; CHECK-NEXT:    retl
; CHECK-NEXT:    sub %o0, %o1, %o0
entry:
  %mul = mul i64 %b, 2606459
  %rem = urem i64 %mul, 1021
  ret i64 %rem
}