| //===- ARCTargetMachine.cpp - Define TargetMachine for ARC ------*- C++ -*-===// | |
| // | |
| // The LLVM Compiler Infrastructure | |
| // | |
| // This file is distributed under the University of Illinois Open Source | |
| // License. See LICENSE.TXT for details. | |
| // | |
| //===----------------------------------------------------------------------===// | |
| // | |
| // | |
| //===----------------------------------------------------------------------===// | |
| #include "ARCTargetMachine.h" | |
| #include "ARC.h" | |
| #include "ARCTargetTransformInfo.h" | |
| #include "llvm/CodeGen/Passes.h" | |
| #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" | |
| #include "llvm/CodeGen/TargetPassConfig.h" | |
| #include "llvm/Support/TargetRegistry.h" | |
| using namespace llvm; | |
| static Reloc::Model getRelocModel(Optional<Reloc::Model> RM) { | |
| if (!RM.hasValue()) | |
| return Reloc::Static; | |
| return *RM; | |
| } | |
| static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM) { | |
| if (CM) | |
| return *CM; | |
| return CodeModel::Small; | |
| } | |
| /// ARCTargetMachine ctor - Create an ILP32 architecture model | |
| ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT, | |
| StringRef CPU, StringRef FS, | |
| const TargetOptions &Options, | |
| Optional<Reloc::Model> RM, | |
| Optional<CodeModel::Model> CM, | |
| CodeGenOpt::Level OL, bool JIT) | |
| : LLVMTargetMachine(T, | |
| "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" | |
| "f32:32:32-i64:32-f64:32-a:0:32-n32", | |
| TT, CPU, FS, Options, getRelocModel(RM), | |
| getEffectiveCodeModel(CM), OL), | |
| TLOF(make_unique<TargetLoweringObjectFileELF>()), | |
| Subtarget(TT, CPU, FS, *this) { | |
| initAsmInfo(); | |
| } | |
| ARCTargetMachine::~ARCTargetMachine() = default; | |
| namespace { | |
| /// ARC Code Generator Pass Configuration Options. | |
| class ARCPassConfig : public TargetPassConfig { | |
| public: | |
| ARCPassConfig(ARCTargetMachine &TM, PassManagerBase &PM) | |
| : TargetPassConfig(TM, PM) {} | |
| ARCTargetMachine &getARCTargetMachine() const { | |
| return getTM<ARCTargetMachine>(); | |
| } | |
| bool addInstSelector() override; | |
| void addPreEmitPass() override; | |
| void addPreRegAlloc() override; | |
| }; | |
| } // end anonymous namespace | |
| TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) { | |
| return new ARCPassConfig(*this, PM); | |
| } | |
| bool ARCPassConfig::addInstSelector() { | |
| addPass(createARCISelDag(getARCTargetMachine(), getOptLevel())); | |
| return false; | |
| } | |
| void ARCPassConfig::addPreEmitPass() { addPass(createARCBranchFinalizePass()); } | |
| void ARCPassConfig::addPreRegAlloc() { addPass(createARCExpandPseudosPass()); } | |
| // Force static initialization. | |
| extern "C" void LLVMInitializeARCTarget() { | |
| RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget()); | |
| } | |
| TargetTransformInfo | |
| ARCTargetMachine::getTargetTransformInfo(const Function &F) { | |
| return TargetTransformInfo(ARCTTIImpl(this, F)); | |
| } |