Split LLVM16 srcs based on target.

Bug: b/272710814
Test: android presubmit on aosp/2531760
Change-Id: I1d2fd70777460aa2b15ad8190e667dc9f8086ac8
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/71388
Reviewed-by: Geoff Lang <geofflang@google.com>
Tested-by: Jason Macnak <natsu@google.com>
Commit-Queue: Jason Macnak <natsu@google.com>
Kokoro-Result: kokoro <noreply+kokoro@google.com>
Presubmit-Ready: Jason Macnak <natsu@google.com>
diff --git a/third_party/llvm-16.0/Android.bp b/third_party/llvm-16.0/Android.bp
index 7821fd2..db2289c 100644
--- a/third_party/llvm-16.0/Android.bp
+++ b/third_party/llvm-16.0/Android.bp
@@ -1094,289 +1094,378 @@
         "llvm/lib/Support/BLAKE3/blake3.c",
         "llvm/lib/Support/BLAKE3/blake3_dispatch.c",
         "llvm/lib/Support/BLAKE3/blake3_portable.c",
-
-        ///////////////////////////////////////////////////////////////////////
-        // x86 / x86_64
-        ///////////////////////////////////////////////////////////////////////
-        "llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp",
-        "llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp",
-        "llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86InstrRelaxTables.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86MnemonicTables.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp",
-        "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp",
-        "llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp",
-        "llvm/lib/Target/X86/X86AsmPrinter.cpp",
-        "llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp",
-        "llvm/lib/Target/X86/X86AvoidTrailingCall.cpp",
-        "llvm/lib/Target/X86/X86CallFrameOptimization.cpp",
-        "llvm/lib/Target/X86/X86CallLowering.cpp",
-        "llvm/lib/Target/X86/X86CallingConv.cpp",
-        "llvm/lib/Target/X86/X86CmovConversion.cpp",
-        "llvm/lib/Target/X86/X86DiscriminateMemOps.cpp",
-        "llvm/lib/Target/X86/X86DomainReassignment.cpp",
-        "llvm/lib/Target/X86/X86DynAllocaExpander.cpp",
-        "llvm/lib/Target/X86/X86EvexToVex.cpp",
-        "llvm/lib/Target/X86/X86ExpandPseudo.cpp",
-        "llvm/lib/Target/X86/X86FastISel.cpp",
-        "llvm/lib/Target/X86/X86FastPreTileConfig.cpp",
-        "llvm/lib/Target/X86/X86FastTileConfig.cpp",
-        "llvm/lib/Target/X86/X86FixupBWInsts.cpp",
-        "llvm/lib/Target/X86/X86FixupLEAs.cpp",
-        "llvm/lib/Target/X86/X86FixupSetCC.cpp",
-        "llvm/lib/Target/X86/X86FlagsCopyLowering.cpp",
-        "llvm/lib/Target/X86/X86FloatingPoint.cpp",
-        "llvm/lib/Target/X86/X86FrameLowering.cpp",
-        "llvm/lib/Target/X86/X86ISelDAGToDAG.cpp",
-        "llvm/lib/Target/X86/X86ISelLowering.cpp",
-        "llvm/lib/Target/X86/X86IndirectBranchTracking.cpp",
-        "llvm/lib/Target/X86/X86IndirectThunks.cpp",
-        "llvm/lib/Target/X86/X86InsertPrefetch.cpp",
-        "llvm/lib/Target/X86/X86InsertWait.cpp",
-        "llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp",
-        "llvm/lib/Target/X86/X86InstrFMA3Info.cpp",
-        "llvm/lib/Target/X86/X86InstrFoldTables.cpp",
-        "llvm/lib/Target/X86/X86InstrInfo.cpp",
-        "llvm/lib/Target/X86/X86InstructionSelector.cpp",
-        "llvm/lib/Target/X86/X86InterleavedAccess.cpp",
-        "llvm/lib/Target/X86/X86KCFI.cpp",
-        "llvm/lib/Target/X86/X86LegalizerInfo.cpp",
-        "llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp",
-        "llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp",
-        "llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp",
-        "llvm/lib/Target/X86/X86LowerAMXType.cpp",
-        "llvm/lib/Target/X86/X86LowerTileCopy.cpp",
-        "llvm/lib/Target/X86/X86MCInstLower.cpp",
-        "llvm/lib/Target/X86/X86MachineFunctionInfo.cpp",
-        "llvm/lib/Target/X86/X86MacroFusion.cpp",
-        "llvm/lib/Target/X86/X86OptimizeLEAs.cpp",
-        "llvm/lib/Target/X86/X86PadShortFunction.cpp",
-        "llvm/lib/Target/X86/X86PartialReduction.cpp",
-        "llvm/lib/Target/X86/X86PreAMXConfig.cpp",
-        "llvm/lib/Target/X86/X86PreTileConfig.cpp",
-        "llvm/lib/Target/X86/X86RegisterBankInfo.cpp",
-        "llvm/lib/Target/X86/X86RegisterInfo.cpp",
-        "llvm/lib/Target/X86/X86ReturnThunks.cpp",
-        "llvm/lib/Target/X86/X86SelectionDAGInfo.cpp",
-        "llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp",
-        "llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp",
-        "llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp",
-        "llvm/lib/Target/X86/X86Subtarget.cpp",
-        "llvm/lib/Target/X86/X86TargetMachine.cpp",
-        "llvm/lib/Target/X86/X86TargetObjectFile.cpp",
-        "llvm/lib/Target/X86/X86TargetTransformInfo.cpp",
-        "llvm/lib/Target/X86/X86TileConfig.cpp",
-        "llvm/lib/Target/X86/X86VZeroUpper.cpp",
-        "llvm/lib/Target/X86/X86WinEHState.cpp",
-
-        ///////////////////////////////////////////////////////////////////////
-        // aarch64
-        ///////////////////////////////////////////////////////////////////////
-        "llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp",
-        "llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp",
-        "llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp",
-        "llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp",
-        "llvm/lib/Target/AArch64/AArch64BranchTargets.cpp",
-        "llvm/lib/Target/AArch64/AArch64CallingConvention.cpp",
-        "llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp",
-        "llvm/lib/Target/AArch64/AArch64CollectLOH.cpp",
-        "llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp",
-        "llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp",
-        "llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp",
-        "llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp",
-        "llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp",
-        "llvm/lib/Target/AArch64/AArch64ExpandImm.cpp",
-        "llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp",
-        "llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp",
-        "llvm/lib/Target/AArch64/AArch64FastISel.cpp",
-        "llvm/lib/Target/AArch64/AArch64FrameLowering.cpp",
-        "llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp",
-        "llvm/lib/Target/AArch64/AArch64ISelLowering.cpp",
-        "llvm/lib/Target/AArch64/AArch64InstrInfo.cpp",
-        "llvm/lib/Target/AArch64/AArch64KCFI.cpp",
-        "llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp",
-        "llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp",
-        "llvm/lib/Target/AArch64/AArch64MCInstLower.cpp",
-        "llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp",
-        "llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp",
-        "llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp",
-        "llvm/lib/Target/AArch64/AArch64MacroFusion.cpp",
-        "llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp",
-        "llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp",
-        "llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp",
-        "llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp",
-        "llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp",
-        "llvm/lib/Target/AArch64/AArch64SLSHardening.cpp",
-        "llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp",
-        "llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp",
-        "llvm/lib/Target/AArch64/AArch64StackTagging.cpp",
-        "llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp",
-        "llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp",
-        "llvm/lib/Target/AArch64/AArch64Subtarget.cpp",
-        "llvm/lib/Target/AArch64/AArch64TargetMachine.cpp",
-        "llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp",
-        "llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp",
-        "llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp",
-        "llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp",
-        "llvm/lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp",
-        "llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp",
-        "llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp",
-        "llvm/lib/Target/AArch64/SMEABIPass.cpp",
-        "llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp",
-        "llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp",
-        "llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp",
-        "llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp",
-
-        ///////////////////////////////////////////////////////////////////////
-        // arm
-        ///////////////////////////////////////////////////////////////////////
-        "llvm/lib/Target/ARM/A15SDOptimizer.cpp",
-        "llvm/lib/Target/ARM/ARMAsmPrinter.cpp",
-        "llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp",
-        "llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp",
-        "llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp",
-        "llvm/lib/Target/ARM/ARMBlockPlacement.cpp",
-        "llvm/lib/Target/ARM/ARMBranchTargets.cpp",
-        "llvm/lib/Target/ARM/ARMCallLowering.cpp",
-        "llvm/lib/Target/ARM/ARMCallingConv.cpp",
-        "llvm/lib/Target/ARM/ARMConstantIslandPass.cpp",
-        "llvm/lib/Target/ARM/ARMConstantPoolValue.cpp",
-        "llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp",
-        "llvm/lib/Target/ARM/ARMFastISel.cpp",
-        "llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp",
-        "llvm/lib/Target/ARM/ARMFrameLowering.cpp",
-        "llvm/lib/Target/ARM/ARMHazardRecognizer.cpp",
-        "llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp",
-        "llvm/lib/Target/ARM/ARMISelLowering.cpp",
-        "llvm/lib/Target/ARM/ARMInstrInfo.cpp",
-        "llvm/lib/Target/ARM/ARMInstructionSelector.cpp",
-        "llvm/lib/Target/ARM/ARMLegalizerInfo.cpp",
-        "llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp",
-        "llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp",
-        "llvm/lib/Target/ARM/ARMMCInstLower.cpp",
-        "llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp",
-        "llvm/lib/Target/ARM/ARMMacroFusion.cpp",
-        "llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp",
-        "llvm/lib/Target/ARM/ARMParallelDSP.cpp",
-        "llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp",
-        "llvm/lib/Target/ARM/ARMRegisterInfo.cpp",
-        "llvm/lib/Target/ARM/ARMSLSHardening.cpp",
-        "llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp",
-        "llvm/lib/Target/ARM/ARMSubtarget.cpp",
-        "llvm/lib/Target/ARM/ARMTargetMachine.cpp",
-        "llvm/lib/Target/ARM/ARMTargetObjectFile.cpp",
-        "llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp",
-        "llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp",
-        "llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp",
-        "llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp",
-        "llvm/lib/Target/ARM/MLxExpansionPass.cpp",
-        "llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp",
-        "llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp",
-        "llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp",
-        "llvm/lib/Target/ARM/MVETailPredication.cpp",
-        "llvm/lib/Target/ARM/MVEVPTBlockPass.cpp",
-        "llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp",
-        "llvm/lib/Target/ARM/Thumb1FrameLowering.cpp",
-        "llvm/lib/Target/ARM/Thumb1InstrInfo.cpp",
-        "llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp",
-        "llvm/lib/Target/ARM/Thumb2InstrInfo.cpp",
-        "llvm/lib/Target/ARM/Thumb2SizeReduction.cpp",
-        "llvm/lib/Target/ARM/ThumbRegisterInfo.cpp",
-        "llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp",
-
-        ///////////////////////////////////////////////////////////////////////
-        // RISC-V
-        ///////////////////////////////////////////////////////////////////////
-        "llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp",
-        "llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp",
-        "llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp",
-        "llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp",
-        "llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp",
-        "llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp",
-        "llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp",
-        "llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp",
-        "llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp",
-        "llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp",
-        "llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp",
-        "llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp",
-        "llvm/lib/Target/RISCV/RISCVFrameLowering.cpp",
-        "llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp",
-        "llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp",
-        "llvm/lib/Target/RISCV/RISCVISelLowering.cpp",
-        "llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp",
-        "llvm/lib/Target/RISCV/RISCVInstrInfo.cpp",
-        "llvm/lib/Target/RISCV/RISCVMCInstLower.cpp",
-        "llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp",
-        "llvm/lib/Target/RISCV/RISCVMacroFusion.cpp",
-        "llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp",
-        "llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp",
-        "llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp",
-        "llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp",
-        "llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp",
-        "llvm/lib/Target/RISCV/RISCVStripWSuffix.cpp",
-        "llvm/lib/Target/RISCV/RISCVSubtarget.cpp",
-        "llvm/lib/Target/RISCV/RISCVTargetMachine.cpp",
-        "llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp",
-        "llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp",
-        "llvm/lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp",
     ],
 
+    target: {
+        android_arm: {
+            srcs: [
+                "llvm/lib/Target/ARM/A15SDOptimizer.cpp",
+                "llvm/lib/Target/ARM/ARMAsmPrinter.cpp",
+                "llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp",
+                "llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp",
+                "llvm/lib/Target/ARM/ARMBasicBlockInfo.cpp",
+                "llvm/lib/Target/ARM/ARMBlockPlacement.cpp",
+                "llvm/lib/Target/ARM/ARMBranchTargets.cpp",
+                "llvm/lib/Target/ARM/ARMCallLowering.cpp",
+                "llvm/lib/Target/ARM/ARMCallingConv.cpp",
+                "llvm/lib/Target/ARM/ARMConstantIslandPass.cpp",
+                "llvm/lib/Target/ARM/ARMConstantPoolValue.cpp",
+                "llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp",
+                "llvm/lib/Target/ARM/ARMFastISel.cpp",
+                "llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp",
+                "llvm/lib/Target/ARM/ARMFrameLowering.cpp",
+                "llvm/lib/Target/ARM/ARMHazardRecognizer.cpp",
+                "llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp",
+                "llvm/lib/Target/ARM/ARMISelLowering.cpp",
+                "llvm/lib/Target/ARM/ARMInstrInfo.cpp",
+                "llvm/lib/Target/ARM/ARMInstructionSelector.cpp",
+                "llvm/lib/Target/ARM/ARMLegalizerInfo.cpp",
+                "llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp",
+                "llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp",
+                "llvm/lib/Target/ARM/ARMMCInstLower.cpp",
+                "llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp",
+                "llvm/lib/Target/ARM/ARMMacroFusion.cpp",
+                "llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp",
+                "llvm/lib/Target/ARM/ARMParallelDSP.cpp",
+                "llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp",
+                "llvm/lib/Target/ARM/ARMRegisterInfo.cpp",
+                "llvm/lib/Target/ARM/ARMSLSHardening.cpp",
+                "llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp",
+                "llvm/lib/Target/ARM/ARMSubtarget.cpp",
+                "llvm/lib/Target/ARM/ARMTargetMachine.cpp",
+                "llvm/lib/Target/ARM/ARMTargetObjectFile.cpp",
+                "llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp",
+                "llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp",
+                "llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMMachORelocationInfo.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp",
+                "llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp",
+                "llvm/lib/Target/ARM/MLxExpansionPass.cpp",
+                "llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp",
+                "llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp",
+                "llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp",
+                "llvm/lib/Target/ARM/MVETailPredication.cpp",
+                "llvm/lib/Target/ARM/MVEVPTBlockPass.cpp",
+                "llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp",
+                "llvm/lib/Target/ARM/Thumb1FrameLowering.cpp",
+                "llvm/lib/Target/ARM/Thumb1InstrInfo.cpp",
+                "llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp",
+                "llvm/lib/Target/ARM/Thumb2InstrInfo.cpp",
+                "llvm/lib/Target/ARM/Thumb2SizeReduction.cpp",
+                "llvm/lib/Target/ARM/ThumbRegisterInfo.cpp",
+                "llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp",
+            ],
+        },
+        android_arm64: {
+            srcs: [
+                "llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp",
+                "llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp",
+                "llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp",
+                "llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp",
+                "llvm/lib/Target/AArch64/AArch64BranchTargets.cpp",
+                "llvm/lib/Target/AArch64/AArch64CallingConvention.cpp",
+                "llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp",
+                "llvm/lib/Target/AArch64/AArch64CollectLOH.cpp",
+                "llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp",
+                "llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp",
+                "llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp",
+                "llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp",
+                "llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp",
+                "llvm/lib/Target/AArch64/AArch64ExpandImm.cpp",
+                "llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp",
+                "llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp",
+                "llvm/lib/Target/AArch64/AArch64FastISel.cpp",
+                "llvm/lib/Target/AArch64/AArch64FrameLowering.cpp",
+                "llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp",
+                "llvm/lib/Target/AArch64/AArch64ISelLowering.cpp",
+                "llvm/lib/Target/AArch64/AArch64InstrInfo.cpp",
+                "llvm/lib/Target/AArch64/AArch64KCFI.cpp",
+                "llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp",
+                "llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp",
+                "llvm/lib/Target/AArch64/AArch64MCInstLower.cpp",
+                "llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp",
+                "llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp",
+                "llvm/lib/Target/AArch64/AArch64MachineScheduler.cpp",
+                "llvm/lib/Target/AArch64/AArch64MacroFusion.cpp",
+                "llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp",
+                "llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp",
+                "llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp",
+                "llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp",
+                "llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp",
+                "llvm/lib/Target/AArch64/AArch64SLSHardening.cpp",
+                "llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp",
+                "llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp",
+                "llvm/lib/Target/AArch64/AArch64StackTagging.cpp",
+                "llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp",
+                "llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp",
+                "llvm/lib/Target/AArch64/AArch64Subtarget.cpp",
+                "llvm/lib/Target/AArch64/AArch64TargetMachine.cpp",
+                "llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp",
+                "llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp",
+                "llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp",
+                "llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp",
+                "llvm/lib/Target/AArch64/Disassembler/AArch64ExternalSymbolizer.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp",
+                "llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp",
+                "llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp",
+                "llvm/lib/Target/AArch64/SMEABIPass.cpp",
+                "llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp",
+                "llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp",
+                "llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp",
+                "llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp",
+            ],
+        },
+        android_riscv64: {
+            srcs: [
+                "llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp",
+                "llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp",
+                "llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp",
+                "llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp",
+                "llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp",
+                "llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp",
+                "llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCObjectFileInfo.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp",
+                "llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp",
+                "llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp",
+                "llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp",
+                "llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp",
+                "llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp",
+                "llvm/lib/Target/RISCV/RISCVFrameLowering.cpp",
+                "llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp",
+                "llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp",
+                "llvm/lib/Target/RISCV/RISCVISelLowering.cpp",
+                "llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp",
+                "llvm/lib/Target/RISCV/RISCVInstrInfo.cpp",
+                "llvm/lib/Target/RISCV/RISCVMCInstLower.cpp",
+                "llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp",
+                "llvm/lib/Target/RISCV/RISCVMacroFusion.cpp",
+                "llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp",
+                "llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp",
+                "llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp",
+                "llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp",
+                "llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp",
+                "llvm/lib/Target/RISCV/RISCVStripWSuffix.cpp",
+                "llvm/lib/Target/RISCV/RISCVSubtarget.cpp",
+                "llvm/lib/Target/RISCV/RISCVTargetMachine.cpp",
+                "llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp",
+                "llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp",
+                "llvm/lib/Target/RISCV/TargetInfo/RISCVTargetInfo.cpp",
+            ],
+        },
+        android_x86: {
+            srcs: [
+                "llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp",
+                "llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp",
+                "llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86InstrRelaxTables.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MnemonicTables.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp",
+                "llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp",
+                "llvm/lib/Target/X86/X86AsmPrinter.cpp",
+                "llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp",
+                "llvm/lib/Target/X86/X86AvoidTrailingCall.cpp",
+                "llvm/lib/Target/X86/X86CallFrameOptimization.cpp",
+                "llvm/lib/Target/X86/X86CallLowering.cpp",
+                "llvm/lib/Target/X86/X86CallingConv.cpp",
+                "llvm/lib/Target/X86/X86CmovConversion.cpp",
+                "llvm/lib/Target/X86/X86DiscriminateMemOps.cpp",
+                "llvm/lib/Target/X86/X86DomainReassignment.cpp",
+                "llvm/lib/Target/X86/X86DynAllocaExpander.cpp",
+                "llvm/lib/Target/X86/X86EvexToVex.cpp",
+                "llvm/lib/Target/X86/X86ExpandPseudo.cpp",
+                "llvm/lib/Target/X86/X86FastISel.cpp",
+                "llvm/lib/Target/X86/X86FastPreTileConfig.cpp",
+                "llvm/lib/Target/X86/X86FastTileConfig.cpp",
+                "llvm/lib/Target/X86/X86FixupBWInsts.cpp",
+                "llvm/lib/Target/X86/X86FixupLEAs.cpp",
+                "llvm/lib/Target/X86/X86FixupSetCC.cpp",
+                "llvm/lib/Target/X86/X86FlagsCopyLowering.cpp",
+                "llvm/lib/Target/X86/X86FloatingPoint.cpp",
+                "llvm/lib/Target/X86/X86FrameLowering.cpp",
+                "llvm/lib/Target/X86/X86ISelDAGToDAG.cpp",
+                "llvm/lib/Target/X86/X86ISelLowering.cpp",
+                "llvm/lib/Target/X86/X86IndirectBranchTracking.cpp",
+                "llvm/lib/Target/X86/X86IndirectThunks.cpp",
+                "llvm/lib/Target/X86/X86InsertPrefetch.cpp",
+                "llvm/lib/Target/X86/X86InsertWait.cpp",
+                "llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp",
+                "llvm/lib/Target/X86/X86InstrFMA3Info.cpp",
+                "llvm/lib/Target/X86/X86InstrFoldTables.cpp",
+                "llvm/lib/Target/X86/X86InstrInfo.cpp",
+                "llvm/lib/Target/X86/X86InstructionSelector.cpp",
+                "llvm/lib/Target/X86/X86InterleavedAccess.cpp",
+                "llvm/lib/Target/X86/X86KCFI.cpp",
+                "llvm/lib/Target/X86/X86LegalizerInfo.cpp",
+                "llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp",
+                "llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp",
+                "llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp",
+                "llvm/lib/Target/X86/X86LowerAMXType.cpp",
+                "llvm/lib/Target/X86/X86LowerTileCopy.cpp",
+                "llvm/lib/Target/X86/X86MCInstLower.cpp",
+                "llvm/lib/Target/X86/X86MachineFunctionInfo.cpp",
+                "llvm/lib/Target/X86/X86MacroFusion.cpp",
+                "llvm/lib/Target/X86/X86OptimizeLEAs.cpp",
+                "llvm/lib/Target/X86/X86PadShortFunction.cpp",
+                "llvm/lib/Target/X86/X86PartialReduction.cpp",
+                "llvm/lib/Target/X86/X86PreAMXConfig.cpp",
+                "llvm/lib/Target/X86/X86PreTileConfig.cpp",
+                "llvm/lib/Target/X86/X86RegisterBankInfo.cpp",
+                "llvm/lib/Target/X86/X86RegisterInfo.cpp",
+                "llvm/lib/Target/X86/X86ReturnThunks.cpp",
+                "llvm/lib/Target/X86/X86SelectionDAGInfo.cpp",
+                "llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp",
+                "llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp",
+                "llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp",
+                "llvm/lib/Target/X86/X86Subtarget.cpp",
+                "llvm/lib/Target/X86/X86TargetMachine.cpp",
+                "llvm/lib/Target/X86/X86TargetObjectFile.cpp",
+                "llvm/lib/Target/X86/X86TargetTransformInfo.cpp",
+                "llvm/lib/Target/X86/X86TileConfig.cpp",
+                "llvm/lib/Target/X86/X86VZeroUpper.cpp",
+                "llvm/lib/Target/X86/X86WinEHState.cpp",
+            ],
+        },
+        android_x86_64: {
+            srcs: [
+                "llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp",
+                "llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp",
+                "llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86InstrRelaxTables.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86MnemonicTables.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86ShuffleDecode.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp",
+                "llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp",
+                "llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp",
+                "llvm/lib/Target/X86/X86AsmPrinter.cpp",
+                "llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp",
+                "llvm/lib/Target/X86/X86AvoidTrailingCall.cpp",
+                "llvm/lib/Target/X86/X86CallFrameOptimization.cpp",
+                "llvm/lib/Target/X86/X86CallLowering.cpp",
+                "llvm/lib/Target/X86/X86CallingConv.cpp",
+                "llvm/lib/Target/X86/X86CmovConversion.cpp",
+                "llvm/lib/Target/X86/X86DiscriminateMemOps.cpp",
+                "llvm/lib/Target/X86/X86DomainReassignment.cpp",
+                "llvm/lib/Target/X86/X86DynAllocaExpander.cpp",
+                "llvm/lib/Target/X86/X86EvexToVex.cpp",
+                "llvm/lib/Target/X86/X86ExpandPseudo.cpp",
+                "llvm/lib/Target/X86/X86FastISel.cpp",
+                "llvm/lib/Target/X86/X86FastPreTileConfig.cpp",
+                "llvm/lib/Target/X86/X86FastTileConfig.cpp",
+                "llvm/lib/Target/X86/X86FixupBWInsts.cpp",
+                "llvm/lib/Target/X86/X86FixupLEAs.cpp",
+                "llvm/lib/Target/X86/X86FixupSetCC.cpp",
+                "llvm/lib/Target/X86/X86FlagsCopyLowering.cpp",
+                "llvm/lib/Target/X86/X86FloatingPoint.cpp",
+                "llvm/lib/Target/X86/X86FrameLowering.cpp",
+                "llvm/lib/Target/X86/X86ISelDAGToDAG.cpp",
+                "llvm/lib/Target/X86/X86ISelLowering.cpp",
+                "llvm/lib/Target/X86/X86IndirectBranchTracking.cpp",
+                "llvm/lib/Target/X86/X86IndirectThunks.cpp",
+                "llvm/lib/Target/X86/X86InsertPrefetch.cpp",
+                "llvm/lib/Target/X86/X86InsertWait.cpp",
+                "llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp",
+                "llvm/lib/Target/X86/X86InstrFMA3Info.cpp",
+                "llvm/lib/Target/X86/X86InstrFoldTables.cpp",
+                "llvm/lib/Target/X86/X86InstrInfo.cpp",
+                "llvm/lib/Target/X86/X86InstructionSelector.cpp",
+                "llvm/lib/Target/X86/X86InterleavedAccess.cpp",
+                "llvm/lib/Target/X86/X86KCFI.cpp",
+                "llvm/lib/Target/X86/X86LegalizerInfo.cpp",
+                "llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp",
+                "llvm/lib/Target/X86/X86LoadValueInjectionRetHardening.cpp",
+                "llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp",
+                "llvm/lib/Target/X86/X86LowerAMXType.cpp",
+                "llvm/lib/Target/X86/X86LowerTileCopy.cpp",
+                "llvm/lib/Target/X86/X86MCInstLower.cpp",
+                "llvm/lib/Target/X86/X86MachineFunctionInfo.cpp",
+                "llvm/lib/Target/X86/X86MacroFusion.cpp",
+                "llvm/lib/Target/X86/X86OptimizeLEAs.cpp",
+                "llvm/lib/Target/X86/X86PadShortFunction.cpp",
+                "llvm/lib/Target/X86/X86PartialReduction.cpp",
+                "llvm/lib/Target/X86/X86PreAMXConfig.cpp",
+                "llvm/lib/Target/X86/X86PreTileConfig.cpp",
+                "llvm/lib/Target/X86/X86RegisterBankInfo.cpp",
+                "llvm/lib/Target/X86/X86RegisterInfo.cpp",
+                "llvm/lib/Target/X86/X86ReturnThunks.cpp",
+                "llvm/lib/Target/X86/X86SelectionDAGInfo.cpp",
+                "llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp",
+                "llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp",
+                "llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp",
+                "llvm/lib/Target/X86/X86Subtarget.cpp",
+                "llvm/lib/Target/X86/X86TargetMachine.cpp",
+                "llvm/lib/Target/X86/X86TargetObjectFile.cpp",
+                "llvm/lib/Target/X86/X86TargetTransformInfo.cpp",
+                "llvm/lib/Target/X86/X86TileConfig.cpp",
+                "llvm/lib/Target/X86/X86VZeroUpper.cpp",
+                "llvm/lib/Target/X86/X86WinEHState.cpp",
+            ],
+        },
+    },
+
     local_include_dirs: [
         ".",
         "llvm/lib/Target/X86",
diff --git a/third_party/llvm-16.0/scripts/generate_build_files.py b/third_party/llvm-16.0/scripts/generate_build_files.py
index eafd7a1..ccd7341 100755
--- a/third_party/llvm-16.0/scripts/generate_build_files.py
+++ b/third_party/llvm-16.0/scripts/generate_build_files.py
@@ -389,15 +389,16 @@
     cmake_output.write(result)
 
 # Generate Android.bp
-def format_file_list_for_android_bp(files):
-    return '\n'.join(["        \"llvm" + s + "\"," for s in files])
+def format_file_list_for_android_bp(files, indent):
+    spaces = '    ' * indent
+    return '\n'.join([spaces + "\"llvm" + s + "\"," for s in files])
 android_bp_template_data = {
     'generated_file_comment' : "// " + generated_file_comment,
-    'files_llvm' : format_file_list_for_android_bp(files_llvm),
-    'files_x86' : format_file_list_for_android_bp(files_x86),
-    'files_AArch64' : format_file_list_for_android_bp(files_AArch64),
-    'files_ARM' : format_file_list_for_android_bp(files_ARM),
-    'files_RISCV' : format_file_list_for_android_bp(files_RISCV),
+    'files_llvm' : format_file_list_for_android_bp(files_llvm, indent=2),
+    'files_x86' : format_file_list_for_android_bp(files_x86, indent=4),
+    'files_AArch64' : format_file_list_for_android_bp(files_AArch64, indent=4),
+    'files_ARM' : format_file_list_for_android_bp(files_ARM, indent=4),
+    'files_RISCV' : format_file_list_for_android_bp(files_RISCV, indent=4),
 }
 with open(ANDROID_BP_TEMPLATE_PATH, 'r') as f:
     android_bp_template = CustomTemplate(f.read())
diff --git a/third_party/llvm-16.0/scripts/template_Android.bp b/third_party/llvm-16.0/scripts/template_Android.bp
index e33809b..d015db9 100644
--- a/third_party/llvm-16.0/scripts/template_Android.bp
+++ b/third_party/llvm-16.0/scripts/template_Android.bp
@@ -21,28 +21,36 @@
 
     srcs: [
 %$%files_llvm
-
-        ///////////////////////////////////////////////////////////////////////
-        // x86 / x86_64
-        ///////////////////////////////////////////////////////////////////////
-%$%files_x86
-
-        ///////////////////////////////////////////////////////////////////////
-        // aarch64
-        ///////////////////////////////////////////////////////////////////////
-%$%files_AArch64
-
-        ///////////////////////////////////////////////////////////////////////
-        // arm
-        ///////////////////////////////////////////////////////////////////////
-%$%files_ARM
-
-        ///////////////////////////////////////////////////////////////////////
-        // RISC-V
-        ///////////////////////////////////////////////////////////////////////
-%$%files_RISCV
     ],
 
+    target: {
+        android_arm: {
+            srcs: [
+%$%files_ARM
+            ],
+        },
+        android_arm64: {
+            srcs: [
+%$%files_AArch64
+            ],
+        },
+        android_riscv64: {
+            srcs: [
+%$%files_RISCV
+            ],
+        },
+        android_x86: {
+            srcs: [
+%$%files_x86
+            ],
+        },
+        android_x86_64: {
+            srcs: [
+%$%files_x86
+            ],
+        },
+    },
+
     local_include_dirs: [
         ".",
         "llvm/lib/Target/X86",