/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Target Register Enum Values                                                *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#ifdef GET_REGINFO_ENUM
#undef GET_REGINFO_ENUM

namespace llvm {

class MCRegisterClass;
extern const MCRegisterClass RISCVMCRegisterClasses[];

namespace RISCV {
enum {
  NoRegister,
  FFLAGS = 1,
  FRM = 2,
  VL = 3,
  VLENB = 4,
  VTYPE = 5,
  VXRM = 6,
  VXSAT = 7,
  V0 = 8,
  V1 = 9,
  V2 = 10,
  V3 = 11,
  V4 = 12,
  V5 = 13,
  V6 = 14,
  V7 = 15,
  V8 = 16,
  V9 = 17,
  V10 = 18,
  V11 = 19,
  V12 = 20,
  V13 = 21,
  V14 = 22,
  V15 = 23,
  V16 = 24,
  V17 = 25,
  V18 = 26,
  V19 = 27,
  V20 = 28,
  V21 = 29,
  V22 = 30,
  V23 = 31,
  V24 = 32,
  V25 = 33,
  V26 = 34,
  V27 = 35,
  V28 = 36,
  V29 = 37,
  V30 = 38,
  V31 = 39,
  X0 = 40,
  X1 = 41,
  X2 = 42,
  X3 = 43,
  X4 = 44,
  X5 = 45,
  X6 = 46,
  X7 = 47,
  X8 = 48,
  X9 = 49,
  X10 = 50,
  X11 = 51,
  X12 = 52,
  X13 = 53,
  X14 = 54,
  X15 = 55,
  X16 = 56,
  X17 = 57,
  X18 = 58,
  X19 = 59,
  X20 = 60,
  X21 = 61,
  X22 = 62,
  X23 = 63,
  X24 = 64,
  X25 = 65,
  X26 = 66,
  X27 = 67,
  X28 = 68,
  X29 = 69,
  X30 = 70,
  X31 = 71,
  F0_D = 72,
  F1_D = 73,
  F2_D = 74,
  F3_D = 75,
  F4_D = 76,
  F5_D = 77,
  F6_D = 78,
  F7_D = 79,
  F8_D = 80,
  F9_D = 81,
  F10_D = 82,
  F11_D = 83,
  F12_D = 84,
  F13_D = 85,
  F14_D = 86,
  F15_D = 87,
  F16_D = 88,
  F17_D = 89,
  F18_D = 90,
  F19_D = 91,
  F20_D = 92,
  F21_D = 93,
  F22_D = 94,
  F23_D = 95,
  F24_D = 96,
  F25_D = 97,
  F26_D = 98,
  F27_D = 99,
  F28_D = 100,
  F29_D = 101,
  F30_D = 102,
  F31_D = 103,
  F0_F = 104,
  F1_F = 105,
  F2_F = 106,
  F3_F = 107,
  F4_F = 108,
  F5_F = 109,
  F6_F = 110,
  F7_F = 111,
  F8_F = 112,
  F9_F = 113,
  F10_F = 114,
  F11_F = 115,
  F12_F = 116,
  F13_F = 117,
  F14_F = 118,
  F15_F = 119,
  F16_F = 120,
  F17_F = 121,
  F18_F = 122,
  F19_F = 123,
  F20_F = 124,
  F21_F = 125,
  F22_F = 126,
  F23_F = 127,
  F24_F = 128,
  F25_F = 129,
  F26_F = 130,
  F27_F = 131,
  F28_F = 132,
  F29_F = 133,
  F30_F = 134,
  F31_F = 135,
  F0_H = 136,
  F1_H = 137,
  F2_H = 138,
  F3_H = 139,
  F4_H = 140,
  F5_H = 141,
  F6_H = 142,
  F7_H = 143,
  F8_H = 144,
  F9_H = 145,
  F10_H = 146,
  F11_H = 147,
  F12_H = 148,
  F13_H = 149,
  F14_H = 150,
  F15_H = 151,
  F16_H = 152,
  F17_H = 153,
  F18_H = 154,
  F19_H = 155,
  F20_H = 156,
  F21_H = 157,
  F22_H = 158,
  F23_H = 159,
  F24_H = 160,
  F25_H = 161,
  F26_H = 162,
  F27_H = 163,
  F28_H = 164,
  F29_H = 165,
  F30_H = 166,
  F31_H = 167,
  X0_PD = 168,
  X2_PD = 169,
  X4_PD = 170,
  X6_PD = 171,
  X8_PD = 172,
  X10_PD = 173,
  X12_PD = 174,
  X14_PD = 175,
  X16_PD = 176,
  X18_PD = 177,
  X20_PD = 178,
  X22_PD = 179,
  X24_PD = 180,
  X26_PD = 181,
  X28_PD = 182,
  X30_PD = 183,
  V0M2 = 184,
  V0M4 = 185,
  V0M8 = 186,
  V2M2 = 187,
  V4M2 = 188,
  V4M4 = 189,
  V6M2 = 190,
  V8M2 = 191,
  V8M4 = 192,
  V8M8 = 193,
  V10M2 = 194,
  V12M2 = 195,
  V12M4 = 196,
  V14M2 = 197,
  V16M2 = 198,
  V16M4 = 199,
  V16M8 = 200,
  V18M2 = 201,
  V20M2 = 202,
  V20M4 = 203,
  V22M2 = 204,
  V24M2 = 205,
  V24M4 = 206,
  V24M8 = 207,
  V26M2 = 208,
  V28M2 = 209,
  V28M4 = 210,
  V30M2 = 211,
  V1_V2 = 212,
  V2_V3 = 213,
  V3_V4 = 214,
  V4_V5 = 215,
  V5_V6 = 216,
  V6_V7 = 217,
  V7_V8 = 218,
  V8_V9 = 219,
  V9_V10 = 220,
  V10_V11 = 221,
  V11_V12 = 222,
  V12_V13 = 223,
  V13_V14 = 224,
  V14_V15 = 225,
  V15_V16 = 226,
  V16_V17 = 227,
  V17_V18 = 228,
  V18_V19 = 229,
  V19_V20 = 230,
  V20_V21 = 231,
  V21_V22 = 232,
  V22_V23 = 233,
  V23_V24 = 234,
  V24_V25 = 235,
  V25_V26 = 236,
  V26_V27 = 237,
  V27_V28 = 238,
  V28_V29 = 239,
  V29_V30 = 240,
  V30_V31 = 241,
  V0_V1 = 242,
  V2M2_V4M2 = 243,
  V4M2_V6M2 = 244,
  V6M2_V8M2 = 245,
  V8M2_V10M2 = 246,
  V10M2_V12M2 = 247,
  V12M2_V14M2 = 248,
  V14M2_V16M2 = 249,
  V16M2_V18M2 = 250,
  V18M2_V20M2 = 251,
  V20M2_V22M2 = 252,
  V22M2_V24M2 = 253,
  V24M2_V26M2 = 254,
  V26M2_V28M2 = 255,
  V28M2_V30M2 = 256,
  V0M2_V2M2 = 257,
  V4M4_V8M4 = 258,
  V8M4_V12M4 = 259,
  V12M4_V16M4 = 260,
  V16M4_V20M4 = 261,
  V20M4_V24M4 = 262,
  V24M4_V28M4 = 263,
  V0M4_V4M4 = 264,
  V1_V2_V3 = 265,
  V2_V3_V4 = 266,
  V3_V4_V5 = 267,
  V4_V5_V6 = 268,
  V5_V6_V7 = 269,
  V6_V7_V8 = 270,
  V7_V8_V9 = 271,
  V8_V9_V10 = 272,
  V9_V10_V11 = 273,
  V10_V11_V12 = 274,
  V11_V12_V13 = 275,
  V12_V13_V14 = 276,
  V13_V14_V15 = 277,
  V14_V15_V16 = 278,
  V15_V16_V17 = 279,
  V16_V17_V18 = 280,
  V17_V18_V19 = 281,
  V18_V19_V20 = 282,
  V19_V20_V21 = 283,
  V20_V21_V22 = 284,
  V21_V22_V23 = 285,
  V22_V23_V24 = 286,
  V23_V24_V25 = 287,
  V24_V25_V26 = 288,
  V25_V26_V27 = 289,
  V26_V27_V28 = 290,
  V27_V28_V29 = 291,
  V28_V29_V30 = 292,
  V29_V30_V31 = 293,
  V0_V1_V2 = 294,
  V2M2_V4M2_V6M2 = 295,
  V4M2_V6M2_V8M2 = 296,
  V6M2_V8M2_V10M2 = 297,
  V8M2_V10M2_V12M2 = 298,
  V10M2_V12M2_V14M2 = 299,
  V12M2_V14M2_V16M2 = 300,
  V14M2_V16M2_V18M2 = 301,
  V16M2_V18M2_V20M2 = 302,
  V18M2_V20M2_V22M2 = 303,
  V20M2_V22M2_V24M2 = 304,
  V22M2_V24M2_V26M2 = 305,
  V24M2_V26M2_V28M2 = 306,
  V26M2_V28M2_V30M2 = 307,
  V0M2_V2M2_V4M2 = 308,
  V1_V2_V3_V4 = 309,
  V2_V3_V4_V5 = 310,
  V3_V4_V5_V6 = 311,
  V4_V5_V6_V7 = 312,
  V5_V6_V7_V8 = 313,
  V6_V7_V8_V9 = 314,
  V7_V8_V9_V10 = 315,
  V8_V9_V10_V11 = 316,
  V9_V10_V11_V12 = 317,
  V10_V11_V12_V13 = 318,
  V11_V12_V13_V14 = 319,
  V12_V13_V14_V15 = 320,
  V13_V14_V15_V16 = 321,
  V14_V15_V16_V17 = 322,
  V15_V16_V17_V18 = 323,
  V16_V17_V18_V19 = 324,
  V17_V18_V19_V20 = 325,
  V18_V19_V20_V21 = 326,
  V19_V20_V21_V22 = 327,
  V20_V21_V22_V23 = 328,
  V21_V22_V23_V24 = 329,
  V22_V23_V24_V25 = 330,
  V23_V24_V25_V26 = 331,
  V24_V25_V26_V27 = 332,
  V25_V26_V27_V28 = 333,
  V26_V27_V28_V29 = 334,
  V27_V28_V29_V30 = 335,
  V28_V29_V30_V31 = 336,
  V0_V1_V2_V3 = 337,
  V2M2_V4M2_V6M2_V8M2 = 338,
  V4M2_V6M2_V8M2_V10M2 = 339,
  V6M2_V8M2_V10M2_V12M2 = 340,
  V8M2_V10M2_V12M2_V14M2 = 341,
  V10M2_V12M2_V14M2_V16M2 = 342,
  V12M2_V14M2_V16M2_V18M2 = 343,
  V14M2_V16M2_V18M2_V20M2 = 344,
  V16M2_V18M2_V20M2_V22M2 = 345,
  V18M2_V20M2_V22M2_V24M2 = 346,
  V20M2_V22M2_V24M2_V26M2 = 347,
  V22M2_V24M2_V26M2_V28M2 = 348,
  V24M2_V26M2_V28M2_V30M2 = 349,
  V0M2_V2M2_V4M2_V6M2 = 350,
  V1_V2_V3_V4_V5 = 351,
  V2_V3_V4_V5_V6 = 352,
  V3_V4_V5_V6_V7 = 353,
  V4_V5_V6_V7_V8 = 354,
  V5_V6_V7_V8_V9 = 355,
  V6_V7_V8_V9_V10 = 356,
  V7_V8_V9_V10_V11 = 357,
  V8_V9_V10_V11_V12 = 358,
  V9_V10_V11_V12_V13 = 359,
  V10_V11_V12_V13_V14 = 360,
  V11_V12_V13_V14_V15 = 361,
  V12_V13_V14_V15_V16 = 362,
  V13_V14_V15_V16_V17 = 363,
  V14_V15_V16_V17_V18 = 364,
  V15_V16_V17_V18_V19 = 365,
  V16_V17_V18_V19_V20 = 366,
  V17_V18_V19_V20_V21 = 367,
  V18_V19_V20_V21_V22 = 368,
  V19_V20_V21_V22_V23 = 369,
  V20_V21_V22_V23_V24 = 370,
  V21_V22_V23_V24_V25 = 371,
  V22_V23_V24_V25_V26 = 372,
  V23_V24_V25_V26_V27 = 373,
  V24_V25_V26_V27_V28 = 374,
  V25_V26_V27_V28_V29 = 375,
  V26_V27_V28_V29_V30 = 376,
  V27_V28_V29_V30_V31 = 377,
  V0_V1_V2_V3_V4 = 378,
  V1_V2_V3_V4_V5_V6 = 379,
  V2_V3_V4_V5_V6_V7 = 380,
  V3_V4_V5_V6_V7_V8 = 381,
  V4_V5_V6_V7_V8_V9 = 382,
  V5_V6_V7_V8_V9_V10 = 383,
  V6_V7_V8_V9_V10_V11 = 384,
  V7_V8_V9_V10_V11_V12 = 385,
  V8_V9_V10_V11_V12_V13 = 386,
  V9_V10_V11_V12_V13_V14 = 387,
  V10_V11_V12_V13_V14_V15 = 388,
  V11_V12_V13_V14_V15_V16 = 389,
  V12_V13_V14_V15_V16_V17 = 390,
  V13_V14_V15_V16_V17_V18 = 391,
  V14_V15_V16_V17_V18_V19 = 392,
  V15_V16_V17_V18_V19_V20 = 393,
  V16_V17_V18_V19_V20_V21 = 394,
  V17_V18_V19_V20_V21_V22 = 395,
  V18_V19_V20_V21_V22_V23 = 396,
  V19_V20_V21_V22_V23_V24 = 397,
  V20_V21_V22_V23_V24_V25 = 398,
  V21_V22_V23_V24_V25_V26 = 399,
  V22_V23_V24_V25_V26_V27 = 400,
  V23_V24_V25_V26_V27_V28 = 401,
  V24_V25_V26_V27_V28_V29 = 402,
  V25_V26_V27_V28_V29_V30 = 403,
  V26_V27_V28_V29_V30_V31 = 404,
  V0_V1_V2_V3_V4_V5 = 405,
  V1_V2_V3_V4_V5_V6_V7 = 406,
  V2_V3_V4_V5_V6_V7_V8 = 407,
  V3_V4_V5_V6_V7_V8_V9 = 408,
  V4_V5_V6_V7_V8_V9_V10 = 409,
  V5_V6_V7_V8_V9_V10_V11 = 410,
  V6_V7_V8_V9_V10_V11_V12 = 411,
  V7_V8_V9_V10_V11_V12_V13 = 412,
  V8_V9_V10_V11_V12_V13_V14 = 413,
  V9_V10_V11_V12_V13_V14_V15 = 414,
  V10_V11_V12_V13_V14_V15_V16 = 415,
  V11_V12_V13_V14_V15_V16_V17 = 416,
  V12_V13_V14_V15_V16_V17_V18 = 417,
  V13_V14_V15_V16_V17_V18_V19 = 418,
  V14_V15_V16_V17_V18_V19_V20 = 419,
  V15_V16_V17_V18_V19_V20_V21 = 420,
  V16_V17_V18_V19_V20_V21_V22 = 421,
  V17_V18_V19_V20_V21_V22_V23 = 422,
  V18_V19_V20_V21_V22_V23_V24 = 423,
  V19_V20_V21_V22_V23_V24_V25 = 424,
  V20_V21_V22_V23_V24_V25_V26 = 425,
  V21_V22_V23_V24_V25_V26_V27 = 426,
  V22_V23_V24_V25_V26_V27_V28 = 427,
  V23_V24_V25_V26_V27_V28_V29 = 428,
  V24_V25_V26_V27_V28_V29_V30 = 429,
  V25_V26_V27_V28_V29_V30_V31 = 430,
  V0_V1_V2_V3_V4_V5_V6 = 431,
  V1_V2_V3_V4_V5_V6_V7_V8 = 432,
  V2_V3_V4_V5_V6_V7_V8_V9 = 433,
  V3_V4_V5_V6_V7_V8_V9_V10 = 434,
  V4_V5_V6_V7_V8_V9_V10_V11 = 435,
  V5_V6_V7_V8_V9_V10_V11_V12 = 436,
  V6_V7_V8_V9_V10_V11_V12_V13 = 437,
  V7_V8_V9_V10_V11_V12_V13_V14 = 438,
  V8_V9_V10_V11_V12_V13_V14_V15 = 439,
  V9_V10_V11_V12_V13_V14_V15_V16 = 440,
  V10_V11_V12_V13_V14_V15_V16_V17 = 441,
  V11_V12_V13_V14_V15_V16_V17_V18 = 442,
  V12_V13_V14_V15_V16_V17_V18_V19 = 443,
  V13_V14_V15_V16_V17_V18_V19_V20 = 444,
  V14_V15_V16_V17_V18_V19_V20_V21 = 445,
  V15_V16_V17_V18_V19_V20_V21_V22 = 446,
  V16_V17_V18_V19_V20_V21_V22_V23 = 447,
  V17_V18_V19_V20_V21_V22_V23_V24 = 448,
  V18_V19_V20_V21_V22_V23_V24_V25 = 449,
  V19_V20_V21_V22_V23_V24_V25_V26 = 450,
  V20_V21_V22_V23_V24_V25_V26_V27 = 451,
  V21_V22_V23_V24_V25_V26_V27_V28 = 452,
  V22_V23_V24_V25_V26_V27_V28_V29 = 453,
  V23_V24_V25_V26_V27_V28_V29_V30 = 454,
  V24_V25_V26_V27_V28_V29_V30_V31 = 455,
  V0_V1_V2_V3_V4_V5_V6_V7 = 456,
  NUM_TARGET_REGS // 457
};
} // end namespace RISCV

// Register classes

namespace RISCV {
enum {
  FPR16RegClassID = 0,
  AnyRegRegClassID = 1,
  AnyReg_with_sub_16RegClassID = 2,
  FPR32RegClassID = 3,
  GPRRegClassID = 4,
  GPRF16RegClassID = 5,
  GPRF32RegClassID = 6,
  GPRF64RegClassID = 7,
  GPRNoX0RegClassID = 8,
  GPRNoX0X2RegClassID = 9,
  GPRJALRRegClassID = 10,
  GPRTCRegClassID = 11,
  AnyReg_with_sub_16_with_sub_32_in_FPR32CRegClassID = 12,
  FPR32CRegClassID = 13,
  GPRCRegClassID = 14,
  GPRC_and_GPRTCRegClassID = 15,
  VCSRRegClassID = 16,
  GPRX0RegClassID = 17,
  SPRegClassID = 18,
  FPR64RegClassID = 19,
  VMRegClassID = 20,
  VRRegClassID = 21,
  VRNoV0RegClassID = 22,
  GPRPF64RegClassID = 23,
  GPRPF64_with_sub_32_in_GPRNoX0RegClassID = 24,
  GPRPF64_with_sub_32_in_GPRNoX0X2RegClassID = 25,
  GPRPF64_with_sub_32_in_GPRJALRRegClassID = 26,
  FPR64CRegClassID = 27,
  GPRPF64_with_sub_32_in_GPRTCRegClassID = 28,
  GPRPF64_with_sub_32_in_GPRCRegClassID = 29,
  GPRPF64_with_sub_32_in_GPRC_and_GPRTCRegClassID = 30,
  GPRPF64_with_sub_32_in_GPRX0RegClassID = 31,
  GPRPF64_with_sub_32_in_SPRegClassID = 32,
  VMV0RegClassID = 33,
  VRN2M1RegClassID = 34,
  VRN2M1NoV0RegClassID = 35,
  VRM2RegClassID = 36,
  VRM2NoV0RegClassID = 37,
  VRM2_with_sub_vrm1_0_in_VMV0RegClassID = 38,
  VRN2M1_with_sub_vrm1_0_in_VMV0RegClassID = 39,
  VRN3M1RegClassID = 40,
  VRN3M1NoV0RegClassID = 41,
  VRN3M1_with_sub_vrm1_0_in_VMV0RegClassID = 42,
  VRN4M1RegClassID = 43,
  VRN4M1NoV0RegClassID = 44,
  VRN2M2RegClassID = 45,
  VRN2M2NoV0RegClassID = 46,
  VRM4RegClassID = 47,
  VRM4NoV0RegClassID = 48,
  VRM4_with_sub_vrm1_0_in_VMV0RegClassID = 49,
  VRN2M2_with_sub_vrm1_0_in_VMV0RegClassID = 50,
  VRN4M1_with_sub_vrm1_0_in_VMV0RegClassID = 51,
  VRN5M1RegClassID = 52,
  VRN5M1NoV0RegClassID = 53,
  VRN5M1_with_sub_vrm1_0_in_VMV0RegClassID = 54,
  VRN6M1RegClassID = 55,
  VRN6M1NoV0RegClassID = 56,
  VRN3M2RegClassID = 57,
  VRN3M2NoV0RegClassID = 58,
  VRN3M2_with_sub_vrm1_0_in_VMV0RegClassID = 59,
  VRN6M1_with_sub_vrm1_0_in_VMV0RegClassID = 60,
  VRN7M1RegClassID = 61,
  VRN7M1NoV0RegClassID = 62,
  VRN7M1_with_sub_vrm1_0_in_VMV0RegClassID = 63,
  VRN8M1RegClassID = 64,
  VRN8M1NoV0RegClassID = 65,
  VRN4M2RegClassID = 66,
  VRN4M2NoV0RegClassID = 67,
  VRN2M4RegClassID = 68,
  VRN2M4NoV0RegClassID = 69,
  VRM8RegClassID = 70,
  VRM8NoV0RegClassID = 71,
  VRM8_with_sub_vrm1_0_in_VMV0RegClassID = 72,
  VRN2M4_with_sub_vrm1_0_in_VMV0RegClassID = 73,
  VRN4M2_with_sub_vrm1_0_in_VMV0RegClassID = 74,
  VRN8M1_with_sub_vrm1_0_in_VMV0RegClassID = 75,

};
} // end namespace RISCV


// Register alternate name indices

namespace RISCV {
enum {
  ABIRegAltName,	// 0
  NoRegAltName,	// 1
  NUM_TARGET_REG_ALT_NAMES = 2
};
} // end namespace RISCV


// Subregister indices

namespace RISCV {
enum : uint16_t {
  NoSubRegister,
  sub_16,	// 1
  sub_32,	// 2
  sub_32_hi,	// 3
  sub_vrm1_0,	// 4
  sub_vrm1_1,	// 5
  sub_vrm1_2,	// 6
  sub_vrm1_3,	// 7
  sub_vrm1_4,	// 8
  sub_vrm1_5,	// 9
  sub_vrm1_6,	// 10
  sub_vrm1_7,	// 11
  sub_vrm2_0,	// 12
  sub_vrm2_1,	// 13
  sub_vrm2_2,	// 14
  sub_vrm2_3,	// 15
  sub_vrm4_0,	// 16
  sub_vrm4_1,	// 17
  sub_vrm1_0_sub_vrm1_1,	// 18
  sub_vrm1_0_sub_vrm1_1_sub_vrm1_2,	// 19
  sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3,	// 20
  sub_vrm1_1_sub_vrm1_2,	// 21
  sub_vrm1_1_sub_vrm1_2_sub_vrm1_3,	// 22
  sub_vrm1_2_sub_vrm1_3,	// 23
  sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4,	// 24
  sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5,	// 25
  sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6,	// 26
  sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7,	// 27
  sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4,	// 28
  sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5,	// 29
  sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6,	// 30
  sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7,	// 31
  sub_vrm1_2_sub_vrm1_3_sub_vrm1_4,	// 32
  sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5,	// 33
  sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6,	// 34
  sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7,	// 35
  sub_vrm1_3_sub_vrm1_4,	// 36
  sub_vrm1_3_sub_vrm1_4_sub_vrm1_5,	// 37
  sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6,	// 38
  sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7,	// 39
  sub_vrm1_4_sub_vrm1_5,	// 40
  sub_vrm1_4_sub_vrm1_5_sub_vrm1_6,	// 41
  sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7,	// 42
  sub_vrm1_5_sub_vrm1_6,	// 43
  sub_vrm1_5_sub_vrm1_6_sub_vrm1_7,	// 44
  sub_vrm1_6_sub_vrm1_7,	// 45
  sub_vrm2_0_sub_vrm2_1,	// 46
  sub_vrm2_0_sub_vrm2_1_sub_vrm2_2,	// 47
  sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3,	// 48
  sub_vrm2_1_sub_vrm2_2,	// 49
  sub_vrm2_1_sub_vrm2_2_sub_vrm2_3,	// 50
  sub_vrm2_2_sub_vrm2_3,	// 51
  NUM_TARGET_SUBREGS
};
} // end namespace RISCV

// Register pressure sets enum.
namespace RISCV {
enum RegisterPressureSets {
  GPRX0 = 0,
  SP = 1,
  VCSR = 2,
  FPR32C = 3,
  GPRC = 4,
  VMV0 = 5,
  GPRTC = 6,
  VRM8NoV0 = 7,
  FPR16 = 8,
  GPR = 9,
  VM = 10,
};
} // end namespace RISCV

} // end namespace llvm

#endif // GET_REGINFO_ENUM

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* MC Register Information                                                    *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#ifdef GET_REGINFO_MC_DESC
#undef GET_REGINFO_MC_DESC

namespace llvm {

extern const MCPhysReg RISCVRegDiffLists[] = {
  /* 0 */ 7, 1, 1, 1, 1, 1, 1, 1, 0,
  /* 9 */ 15, 1, 1, 1, 1, 1, 1, 1, 0,
  /* 18 */ 23, 1, 1, 1, 1, 1, 1, 1, 0,
  /* 27 */ 31, 1, 1, 1, 1, 1, 1, 1, 0,
  /* 36 */ 64515, 1, 1, 1, 1, 1, 1, 1, 0,
  /* 45 */ 64869, 1, 1, 1, 1, 1, 1, 1, 0,
  /* 54 */ 65112, 1, 1, 1, 1, 1, 1, 1, 0,
  /* 63 */ 7, 1, 1, 1, 1, 1, 1, 0,
  /* 71 */ 65138, 1, 1, 1, 1, 1, 1, 0,
  /* 79 */ 7, 1, 1, 1, 1, 1, 0,
  /* 86 */ 64955, 1, 1, 1, 1, 1, 0,
  /* 93 */ 65165, 1, 1, 1, 1, 1, 0,
  /* 100 */ 7, 1, 1, 1, 1, 0,
  /* 106 */ 65193, 1, 1, 1, 1, 0,
  /* 112 */ 7, 1, 1, 1, 0,
  /* 117 */ 11, 1, 1, 1, 0,
  /* 122 */ 15, 1, 1, 1, 0,
  /* 127 */ 19, 1, 1, 1, 0,
  /* 132 */ 23, 1, 1, 1, 0,
  /* 137 */ 27, 1, 1, 1, 0,
  /* 142 */ 31, 1, 1, 1, 0,
  /* 147 */ 35, 1, 1, 1, 0,
  /* 152 */ 65059, 1, 1, 1, 0,
  /* 157 */ 65235, 1, 1, 1, 0,
  /* 162 */ 7, 1, 1, 0,
  /* 166 */ 65279, 1, 1, 0,
  /* 170 */ 7, 1, 0,
  /* 173 */ 65437, 65362, 1, 174, 65363, 1, 174, 65363, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 14, 1, 0,
  /* 200 */ 65435, 65363, 1, 175, 65362, 1, 174, 65363, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 15, 1, 0,
  /* 227 */ 65435, 65362, 1, 174, 65363, 1, 175, 65362, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 16, 1, 0,
  /* 254 */ 65434, 65362, 1, 175, 65362, 1, 174, 65363, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 17, 1, 0,
  /* 281 */ 65434, 65361, 1, 175, 65362, 1, 175, 65362, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 18, 1, 0,
  /* 308 */ 65432, 65362, 1, 176, 65361, 1, 175, 65362, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 19, 1, 0,
  /* 335 */ 65432, 65361, 1, 175, 65362, 1, 176, 65361, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 20, 1, 0,
  /* 362 */ 65431, 65361, 1, 176, 65361, 1, 175, 65362, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 21, 1, 0,
  /* 389 */ 65431, 65360, 1, 176, 65361, 1, 176, 65361, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 22, 1, 0,
  /* 416 */ 65429, 65361, 1, 177, 65360, 1, 176, 65361, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 23, 1, 0,
  /* 443 */ 65429, 65360, 1, 176, 65361, 1, 177, 65360, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 24, 1, 0,
  /* 470 */ 65428, 65360, 1, 177, 65360, 1, 176, 65361, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 25, 1, 0,
  /* 497 */ 65428, 65359, 1, 177, 65360, 1, 177, 65360, 1, 198, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 65451, 44, 65440, 53, 65484, 26, 1, 0,
  /* 524 */ 37, 1, 0,
  /* 527 */ 1, 55, 1, 0,
  /* 531 */ 1, 60, 1, 0,
  /* 535 */ 65533, 61, 1, 0,
  /* 539 */ 1, 65, 1, 0,
  /* 543 */ 65533, 66, 1, 0,
  /* 547 */ 65280, 1, 1, 201, 1, 0,
  /* 553 */ 65153, 1, 0,
  /* 556 */ 65157, 1, 0,
  /* 559 */ 65159, 1, 0,
  /* 562 */ 65163, 1, 0,
  /* 565 */ 65165, 1, 0,
  /* 568 */ 65169, 1, 0,
  /* 571 */ 65171, 1, 0,
  /* 574 */ 65239, 1, 0,
  /* 577 */ 65302, 1, 0,
  /* 580 */ 65332, 1, 0,
  /* 583 */ 65333, 1, 0,
  /* 586 */ 65535, 65360, 1, 178, 65359, 1, 0,
  /* 593 */ 65535, 65535, 65360, 1, 178, 65359, 1, 178, 65535, 65360, 1, 177, 65360, 1, 0,
  /* 608 */ 65535, 65361, 1, 177, 65360, 1, 0,
  /* 615 */ 65535, 65535, 65361, 1, 177, 65360, 1, 177, 65535, 65361, 1, 176, 65361, 1, 0,
  /* 630 */ 65535, 65362, 1, 176, 65361, 1, 0,
  /* 637 */ 65535, 65535, 65362, 1, 176, 65361, 1, 176, 65535, 65362, 1, 175, 65362, 1, 0,
  /* 652 */ 65535, 65363, 1, 175, 65362, 1, 0,
  /* 659 */ 65535, 65535, 65363, 1, 175, 65362, 1, 175, 65535, 65363, 1, 174, 65363, 1, 0,
  /* 674 */ 65408, 1, 0,
  /* 677 */ 65409, 1, 0,
  /* 680 */ 65410, 1, 0,
  /* 683 */ 65411, 1, 0,
  /* 686 */ 65412, 1, 0,
  /* 689 */ 65413, 1, 0,
  /* 692 */ 65414, 1, 0,
  /* 695 */ 65415, 1, 0,
  /* 698 */ 65416, 1, 0,
  /* 701 */ 65417, 1, 0,
  /* 704 */ 65418, 1, 0,
  /* 707 */ 65419, 1, 0,
  /* 710 */ 65420, 1, 0,
  /* 713 */ 65421, 1, 0,
  /* 716 */ 65422, 1, 0,
  /* 719 */ 65423, 1, 0,
  /* 722 */ 176, 65534, 1, 27, 1, 51, 1, 43, 65466, 28, 44, 65465, 68, 41, 27, 26, 65484, 27, 26, 25, 65398, 42, 65455, 59, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65395, 1, 42, 65454, 126, 26, 1, 25, 65439, 75, 26, 65437, 92, 2, 2, 2, 0,
  /* 772 */ 175, 65535, 65533, 31, 1, 51, 43, 65468, 26, 1, 43, 65467, 68, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65397, 1, 42, 65455, 95, 27, 26, 50, 65375, 55, 65450, 117, 26, 1, 25, 65441, 47, 26, 1, 25, 65439, 92, 2, 2, 2, 0,
  /* 822 */ 175, 1, 1, 25, 1, 51, 1, 43, 65467, 27, 44, 65466, 67, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65397, 1, 42, 65455, 100, 28, 27, 26, 65395, 43, 65454, 122, 26, 1, 25, 65441, 47, 26, 1, 25, 65439, 92, 2, 2, 2, 0,
  /* 872 */ 52, 1, 43, 65467, 68, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65397, 1, 42, 65455, 123, 26, 1, 25, 65441, 47, 26, 1, 25, 65439, 92, 2, 2, 2, 0,
  /* 907 */ 175, 65535, 65533, 31, 1, 51, 1, 43, 65464, 30, 44, 65463, 70, 41, 27, 26, 65484, 27, 26, 25, 65396, 42, 65454, 62, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65393, 1, 42, 65453, 129, 26, 1, 25, 65437, 77, 26, 65435, 94, 2, 2, 2, 0,
  /* 957 */ 175, 1, 65533, 29, 1, 51, 1, 43, 65465, 29, 44, 65464, 69, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65395, 1, 42, 65454, 103, 28, 27, 26, 65393, 43, 65453, 125, 26, 1, 25, 65439, 49, 26, 1, 25, 65437, 94, 2, 2, 2, 0,
  /* 1007 */ 175, 65534, 1, 28, 1, 51, 43, 65466, 28, 1, 43, 65465, 110, 27, 26, 25, 65398, 42, 65455, 59, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65395, 1, 42, 65454, 126, 26, 1, 25, 65439, 49, 26, 1, 25, 65437, 94, 2, 2, 2, 0,
  /* 1057 */ 52, 1, 43, 65465, 70, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65395, 1, 42, 65454, 126, 26, 1, 25, 65439, 49, 26, 1, 25, 65437, 94, 2, 2, 2, 0,
  /* 1092 */ 174, 1, 1, 26, 1, 51, 43, 65467, 27, 1, 43, 65466, 109, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65397, 1, 42, 65455, 59, 41, 1, 27, 1, 26, 1, 25, 65395, 43, 65454, 149, 25, 65441, 47, 26, 1, 25, 65439, 94, 2, 2, 2, 0,
  /* 1142 */ 52, 1, 43, 65466, 69, 41, 27, 26, 65484, 27, 26, 25, 65398, 42, 65455, 59, 41, 1, 27, 1, 26, 1, 25, 65395, 43, 65454, 126, 26, 1, 25, 65439, 94, 2, 2, 2, 0,
  /* 1178 */ 175, 65534, 1, 28, 1, 51, 1, 43, 65462, 32, 44, 65461, 72, 41, 27, 26, 65484, 27, 26, 25, 65394, 42, 65453, 65, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65391, 1, 42, 65452, 132, 26, 1, 25, 65435, 79, 26, 65433, 96, 2, 2, 2, 0,
  /* 1228 */ 174, 1, 1, 26, 1, 51, 1, 43, 65463, 31, 44, 65462, 71, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65393, 1, 42, 65453, 106, 28, 27, 26, 65391, 43, 65452, 128, 26, 1, 25, 65437, 51, 26, 1, 25, 65435, 96, 2, 2, 2, 0,
  /* 1278 */ 174, 65535, 65533, 32, 1, 51, 43, 65464, 30, 1, 43, 65463, 112, 27, 26, 25, 65396, 42, 65454, 62, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65393, 1, 42, 65453, 129, 26, 1, 25, 65437, 51, 26, 1, 25, 65435, 96, 2, 2, 2, 0,
  /* 1328 */ 52, 1, 43, 65463, 72, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65393, 1, 42, 65453, 129, 26, 1, 25, 65437, 51, 26, 1, 25, 65435, 96, 2, 2, 2, 0,
  /* 1363 */ 174, 1, 65533, 30, 1, 51, 43, 65465, 29, 1, 43, 65464, 111, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65395, 1, 42, 65454, 62, 41, 1, 27, 1, 26, 1, 25, 65393, 43, 65453, 152, 25, 65439, 49, 26, 1, 25, 65437, 96, 2, 2, 2, 0,
  /* 1413 */ 52, 1, 43, 65464, 71, 41, 27, 26, 65484, 27, 26, 25, 65396, 42, 65454, 62, 41, 1, 27, 1, 26, 1, 25, 65393, 43, 65453, 129, 26, 1, 25, 65437, 96, 2, 2, 2, 0,
  /* 1449 */ 174, 65535, 65533, 32, 1, 51, 1, 43, 65460, 34, 44, 65459, 74, 41, 27, 26, 65484, 27, 26, 25, 65392, 42, 65452, 68, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65389, 1, 42, 65451, 135, 26, 1, 25, 65433, 81, 26, 65431, 98, 2, 2, 2, 0,
  /* 1499 */ 174, 1, 65533, 30, 1, 51, 1, 43, 65461, 33, 44, 65460, 73, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65391, 1, 42, 65452, 109, 28, 27, 26, 65389, 43, 65451, 131, 26, 1, 25, 65435, 53, 26, 1, 25, 65433, 98, 2, 2, 2, 0,
  /* 1549 */ 174, 65534, 1, 29, 1, 51, 43, 65462, 32, 1, 43, 65461, 114, 27, 26, 25, 65394, 42, 65453, 65, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65391, 1, 42, 65452, 132, 26, 1, 25, 65435, 53, 26, 1, 25, 65433, 98, 2, 2, 2, 0,
  /* 1599 */ 52, 1, 43, 65461, 74, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65391, 1, 42, 65452, 132, 26, 1, 25, 65435, 53, 26, 1, 25, 65433, 98, 2, 2, 2, 0,
  /* 1634 */ 173, 1, 1, 27, 1, 51, 43, 65463, 31, 1, 43, 65462, 113, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65393, 1, 42, 65453, 65, 41, 1, 27, 1, 26, 1, 25, 65391, 43, 65452, 155, 25, 65437, 51, 26, 1, 25, 65435, 98, 2, 2, 2, 0,
  /* 1684 */ 52, 1, 43, 65462, 73, 41, 27, 26, 65484, 27, 26, 25, 65394, 42, 65453, 65, 41, 1, 27, 1, 26, 1, 25, 65391, 43, 65452, 132, 26, 1, 25, 65435, 98, 2, 2, 2, 0,
  /* 1720 */ 173, 1, 1, 27, 1, 51, 1, 43, 65459, 35, 44, 65458, 75, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65389, 1, 42, 65451, 112, 28, 27, 26, 65387, 43, 65450, 134, 26, 1, 25, 65433, 55, 26, 1, 25, 65431, 100, 2, 2, 2, 0,
  /* 1770 */ 173, 65535, 65533, 33, 1, 51, 43, 65460, 34, 1, 43, 65459, 116, 27, 26, 25, 65392, 42, 65452, 68, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65389, 1, 42, 65451, 135, 26, 1, 25, 65433, 55, 26, 1, 25, 65431, 100, 2, 2, 2, 0,
  /* 1820 */ 52, 1, 43, 65459, 76, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65389, 1, 42, 65451, 135, 26, 1, 25, 65433, 55, 26, 1, 25, 65431, 100, 2, 2, 2, 0,
  /* 1855 */ 173, 1, 65533, 31, 1, 51, 43, 65461, 33, 1, 43, 65460, 115, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65391, 1, 42, 65452, 68, 41, 1, 27, 1, 26, 1, 25, 65389, 43, 65451, 158, 25, 65435, 53, 26, 1, 25, 65433, 100, 2, 2, 2, 0,
  /* 1905 */ 52, 1, 43, 65460, 75, 41, 27, 26, 65484, 27, 26, 25, 65392, 42, 65452, 68, 41, 1, 27, 1, 26, 1, 25, 65389, 43, 65451, 135, 26, 1, 25, 65433, 100, 2, 2, 2, 0,
  /* 1941 */ 52, 43, 65468, 26, 44, 65467, 68, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65397, 1, 42, 65455, 95, 27, 26, 50, 65375, 55, 65450, 117, 26, 1, 25, 65441, 73, 26, 65439, 92, 2, 2, 0,
  /* 1980 */ 176, 65535, 65533, 30, 1, 51, 1, 43, 65468, 26, 44, 65467, 68, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65397, 1, 42, 65455, 53, 41, 27, 52, 65458, 27, 26, 50, 65375, 55, 65450, 117, 26, 1, 25, 65441, 73, 26, 65439, 92, 2, 2, 0,
  /* 2029 */ 44, 65467, 68, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65397, 1, 42, 65455, 123, 26, 1, 25, 65441, 73, 26, 65439, 92, 2, 2, 0,
  /* 2057 */ 52, 43, 65466, 28, 44, 65465, 110, 27, 26, 25, 65398, 42, 65455, 59, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65395, 1, 42, 65454, 126, 26, 1, 25, 65439, 75, 26, 65437, 94, 2, 2, 0,
  /* 2096 */ 44, 65465, 70, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65395, 1, 42, 65454, 126, 26, 1, 25, 65439, 75, 26, 65437, 94, 2, 2, 0,
  /* 2124 */ 52, 43, 65467, 27, 44, 65466, 109, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65397, 1, 42, 65455, 100, 28, 27, 26, 65395, 43, 65454, 149, 25, 65441, 47, 26, 1, 25, 65439, 94, 2, 2, 0,
  /* 2163 */ 43, 65467, 110, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65397, 1, 42, 65455, 150, 25, 65441, 47, 26, 1, 25, 65439, 94, 2, 2, 0,
  /* 2191 */ 44, 65466, 69, 41, 27, 26, 65484, 27, 26, 25, 65398, 42, 65455, 100, 28, 27, 26, 65395, 43, 65454, 126, 26, 1, 25, 65439, 94, 2, 2, 0,
  /* 2220 */ 41, 27, 26, 65484, 27, 26, 25, 65398, 42, 65455, 127, 26, 1, 25, 65439, 94, 2, 2, 0,
  /* 2239 */ 43, 65468, 69, 41, 1, 27, 1, 26, 1, 25, 65397, 43, 65455, 95, 27, 26, 50, 65375, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 2, 0,
  /* 2268 */ 52, 1, 43, 65468, 69, 41, 1, 27, 1, 26, 1, 25, 65397, 43, 65455, 53, 41, 27, 52, 65458, 27, 26, 50, 65375, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 2, 0,
  /* 2303 */ 175, 1, 65533, 29, 1, 51, 43, 65469, 25, 1, 43, 65468, 69, 41, 1, 27, 1, 26, 1, 25, 65397, 43, 65455, 93, 54, 65442, 41, 27, 52, 65458, 27, 26, 50, 65388, 65523, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 2, 0,
  /* 2349 */ 41, 1, 27, 1, 26, 1, 25, 65397, 43, 65455, 123, 26, 1, 25, 65441, 94, 2, 2, 0,
  /* 2368 */ 52, 43, 65464, 30, 44, 65463, 112, 27, 26, 25, 65396, 42, 65454, 62, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65393, 1, 42, 65453, 129, 26, 1, 25, 65437, 77, 26, 65435, 96, 2, 2, 0,
  /* 2407 */ 44, 65463, 72, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65393, 1, 42, 65453, 129, 26, 1, 25, 65437, 77, 26, 65435, 96, 2, 2, 0,
  /* 2435 */ 52, 43, 65465, 29, 44, 65464, 111, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65395, 1, 42, 65454, 103, 28, 27, 26, 65393, 43, 65453, 152, 25, 65439, 49, 26, 1, 25, 65437, 96, 2, 2, 0,
  /* 2474 */ 43, 65465, 112, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65395, 1, 42, 65454, 153, 25, 65439, 49, 26, 1, 25, 65437, 96, 2, 2, 0,
  /* 2502 */ 44, 65464, 71, 41, 27, 26, 65484, 27, 26, 25, 65396, 42, 65454, 103, 28, 27, 26, 65393, 43, 65453, 129, 26, 1, 25, 65437, 96, 2, 2, 0,
  /* 2531 */ 41, 27, 26, 65484, 27, 26, 25, 65396, 42, 65454, 130, 26, 1, 25, 65437, 96, 2, 2, 0,
  /* 2550 */ 43, 65466, 111, 27, 26, 25, 65398, 42, 65455, 59, 41, 1, 27, 1, 26, 1, 25, 65395, 43, 65454, 126, 26, 1, 25, 65439, 96, 2, 2, 0,
  /* 2579 */ 52, 43, 65462, 32, 44, 65461, 114, 27, 26, 25, 65394, 42, 65453, 65, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65391, 1, 42, 65452, 132, 26, 1, 25, 65435, 79, 26, 65433, 98, 2, 2, 0,
  /* 2618 */ 44, 65461, 74, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65391, 1, 42, 65452, 132, 26, 1, 25, 65435, 79, 26, 65433, 98, 2, 2, 0,
  /* 2646 */ 52, 43, 65463, 31, 44, 65462, 113, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65393, 1, 42, 65453, 106, 28, 27, 26, 65391, 43, 65452, 155, 25, 65437, 51, 26, 1, 25, 65435, 98, 2, 2, 0,
  /* 2685 */ 43, 65463, 114, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65393, 1, 42, 65453, 156, 25, 65437, 51, 26, 1, 25, 65435, 98, 2, 2, 0,
  /* 2713 */ 44, 65462, 73, 41, 27, 26, 65484, 27, 26, 25, 65394, 42, 65453, 106, 28, 27, 26, 65391, 43, 65452, 132, 26, 1, 25, 65435, 98, 2, 2, 0,
  /* 2742 */ 41, 27, 26, 65484, 27, 26, 25, 65394, 42, 65453, 133, 26, 1, 25, 65435, 98, 2, 2, 0,
  /* 2761 */ 43, 65464, 113, 27, 26, 25, 65396, 42, 65454, 62, 41, 1, 27, 1, 26, 1, 25, 65393, 43, 65453, 129, 26, 1, 25, 65437, 98, 2, 2, 0,
  /* 2790 */ 52, 43, 65460, 34, 44, 65459, 116, 27, 26, 25, 65392, 42, 65452, 68, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65389, 1, 42, 65451, 135, 26, 1, 25, 65433, 81, 26, 65431, 100, 2, 2, 0,
  /* 2829 */ 44, 65459, 76, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65389, 1, 42, 65451, 135, 26, 1, 25, 65433, 81, 26, 65431, 100, 2, 2, 0,
  /* 2857 */ 52, 43, 65461, 33, 44, 65460, 115, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65391, 1, 42, 65452, 109, 28, 27, 26, 65389, 43, 65451, 158, 25, 65435, 53, 26, 1, 25, 65433, 100, 2, 2, 0,
  /* 2896 */ 43, 65461, 116, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65391, 1, 42, 65452, 159, 25, 65435, 53, 26, 1, 25, 65433, 100, 2, 2, 0,
  /* 2924 */ 44, 65460, 75, 41, 27, 26, 65484, 27, 26, 25, 65392, 42, 65452, 109, 28, 27, 26, 65389, 43, 65451, 135, 26, 1, 25, 65433, 100, 2, 2, 0,
  /* 2953 */ 41, 27, 26, 65484, 27, 26, 25, 65392, 42, 65452, 136, 26, 1, 25, 65433, 100, 2, 2, 0,
  /* 2972 */ 43, 65462, 115, 27, 26, 25, 65394, 42, 65453, 65, 41, 1, 27, 1, 26, 1, 25, 65391, 43, 65452, 132, 26, 1, 25, 65435, 100, 2, 2, 0,
  /* 3001 */ 172, 1, 1, 28, 1, 51, 43, 65459, 35, 1, 43, 65458, 117, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65389, 1, 42, 65451, 71, 41, 1, 27, 1, 26, 1, 25, 65387, 43, 65450, 161, 25, 65433, 55, 26, 1, 25, 65431, 102, 2, 2, 0,
  /* 3050 */ 52, 43, 65459, 35, 44, 65458, 117, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65389, 1, 42, 65451, 112, 28, 27, 26, 65387, 43, 65450, 161, 25, 65433, 55, 26, 1, 25, 65431, 102, 2, 2, 0,
  /* 3089 */ 43, 65459, 118, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65389, 1, 42, 65451, 162, 25, 65433, 55, 26, 1, 25, 65431, 102, 2, 2, 0,
  /* 3117 */ 174, 65534, 1, 29, 1, 51, 1, 43, 65458, 36, 44, 65457, 76, 41, 27, 26, 65484, 27, 26, 25, 65390, 42, 65451, 71, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65387, 1, 42, 65450, 138, 26, 1, 25, 65431, 102, 2, 2, 0,
  /* 3163 */ 52, 1, 43, 65458, 77, 41, 27, 26, 65484, 27, 26, 25, 65390, 42, 65451, 71, 41, 1, 27, 1, 26, 1, 25, 65387, 43, 65450, 138, 26, 1, 25, 65431, 102, 2, 2, 0,
  /* 3198 */ 44, 65458, 77, 41, 27, 26, 65484, 27, 26, 25, 65390, 42, 65451, 112, 28, 27, 26, 65387, 43, 65450, 138, 26, 1, 25, 65431, 102, 2, 2, 0,
  /* 3227 */ 41, 27, 26, 65484, 27, 26, 25, 65390, 42, 65451, 139, 26, 1, 25, 65431, 102, 2, 2, 0,
  /* 3246 */ 43, 65460, 117, 27, 26, 25, 65392, 42, 65452, 68, 41, 1, 27, 1, 26, 1, 25, 65389, 43, 65451, 135, 26, 1, 25, 65433, 102, 2, 2, 0,
  /* 3275 */ 65535, 65533, 58, 1, 51, 1, 42, 65455, 37, 55, 65450, 74, 2, 0,
  /* 3289 */ 1, 1, 52, 1, 50, 1, 42, 65455, 40, 43, 65454, 79, 2, 0,
  /* 3303 */ 1, 65533, 54, 1, 50, 1, 42, 65454, 41, 43, 65453, 80, 2, 0,
  /* 3317 */ 51, 1, 42, 65455, 80, 2, 0,
  /* 3324 */ 1, 1, 49, 1, 50, 1, 42, 65453, 42, 43, 65452, 81, 2, 0,
  /* 3338 */ 65534, 1, 53, 1, 50, 42, 65455, 40, 1, 42, 65454, 81, 2, 0,
  /* 3352 */ 51, 1, 42, 65454, 81, 2, 0,
  /* 3359 */ 1, 65533, 51, 1, 50, 1, 42, 65452, 43, 43, 65451, 82, 2, 0,
  /* 3373 */ 65535, 65533, 55, 1, 50, 42, 65454, 41, 1, 42, 65453, 82, 2, 0,
  /* 3387 */ 51, 1, 42, 65453, 82, 2, 0,
  /* 3394 */ 1, 1, 46, 1, 50, 1, 42, 65451, 44, 43, 65450, 83, 2, 0,
  /* 3408 */ 65534, 1, 50, 1, 50, 42, 65453, 42, 1, 42, 65452, 83, 2, 0,
  /* 3422 */ 51, 1, 42, 65452, 83, 2, 0,
  /* 3429 */ 65535, 65533, 52, 1, 50, 42, 65452, 43, 1, 42, 65451, 84, 2, 0,
  /* 3443 */ 51, 1, 42, 65451, 84, 2, 0,
  /* 3450 */ 65467, 110, 27, 65510, 27, 26, 65511, 26, 25, 65397, 1, 42, 65455, 150, 25, 65441, 73, 26, 65439, 94, 2, 0,
  /* 3472 */ 27, 26, 65511, 26, 25, 65398, 42, 65455, 153, 26, 65439, 94, 2, 0,
  /* 3486 */ 65468, 110, 28, 27, 26, 65397, 43, 65455, 95, 27, 26, 50, 65375, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 0,
  /* 3509 */ 44, 65468, 110, 28, 27, 26, 65397, 43, 65455, 53, 41, 27, 52, 65458, 27, 26, 50, 65375, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 0,
  /* 3537 */ 52, 43, 65469, 25, 44, 65468, 110, 28, 27, 26, 65397, 43, 65455, 93, 54, 65442, 41, 27, 52, 65458, 27, 26, 50, 65388, 65523, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 0,
  /* 3572 */ 43, 65469, 108, 54, 65442, 41, 27, 52, 65458, 27, 26, 50, 65388, 65523, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 0,
  /* 3596 */ 176, 1, 65533, 28, 1, 51, 1, 43, 65469, 25, 44, 65468, 110, 28, 27, 26, 65397, 43, 65455, 51, 69, 65509, 54, 65442, 41, 27, 52, 65458, 27, 26, 50, 65388, 65523, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 0,
  /* 3639 */ 176, 65534, 1, 27, 1, 52, 1, 43, 65469, 22, 72, 65456, 52, 69, 65509, 54, 65442, 41, 27, 52, 65458, 27, 26, 50, 65388, 65523, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 0,
  /* 3675 */ 52, 1, 43, 65469, 66, 69, 65509, 54, 65442, 41, 27, 52, 65458, 27, 26, 50, 65388, 65523, 55, 65450, 117, 26, 1, 25, 65441, 94, 2, 0,
  /* 3703 */ 28, 27, 26, 65397, 43, 65455, 123, 26, 1, 25, 65441, 94, 2, 0,
  /* 3717 */ 65465, 112, 27, 65510, 27, 26, 65511, 26, 25, 65395, 1, 42, 65454, 153, 25, 65439, 75, 26, 65437, 96, 2, 0,
  /* 3739 */ 27, 26, 65511, 26, 25, 65396, 42, 65454, 156, 26, 65437, 96, 2, 0,
  /* 3753 */ 65466, 111, 27, 26, 25, 65398, 42, 65455, 100, 28, 27, 26, 65395, 43, 65454, 126, 26, 1, 25, 65439, 96, 2, 0,
  /* 3776 */ 27, 26, 25, 65398, 42, 65455, 127, 26, 1, 25, 65439, 96, 2, 0,
  /* 3790 */ 27, 1, 26, 1, 25, 65397, 43, 65455, 150, 25, 65441, 96, 2, 0,
  /* 3804 */ 65463, 114, 27, 65510, 27, 26, 65511, 26, 25, 65393, 1, 42, 65453, 156, 25, 65437, 77, 26, 65435, 98, 2, 0,
  /* 3826 */ 27, 26, 65511, 26, 25, 65394, 42, 65453, 159, 26, 65435, 98, 2, 0,
  /* 3840 */ 65464, 113, 27, 26, 25, 65396, 42, 65454, 103, 28, 27, 26, 65393, 43, 65453, 129, 26, 1, 25, 65437, 98, 2, 0,
  /* 3863 */ 27, 26, 25, 65396, 42, 65454, 130, 26, 1, 25, 65437, 98, 2, 0,
  /* 3877 */ 27, 1, 26, 1, 25, 65395, 43, 65454, 153, 25, 65439, 98, 2, 0,
  /* 3891 */ 65461, 116, 27, 65510, 27, 26, 65511, 26, 25, 65391, 1, 42, 65452, 159, 25, 65435, 79, 26, 65433, 100, 2, 0,
  /* 3913 */ 27, 26, 65511, 26, 25, 65392, 42, 65452, 162, 26, 65433, 100, 2, 0,
  /* 3927 */ 65462, 115, 27, 26, 25, 65394, 42, 65453, 106, 28, 27, 26, 65391, 43, 65452, 132, 26, 1, 25, 65435, 100, 2, 0,
  /* 3950 */ 27, 26, 25, 65394, 42, 65453, 133, 26, 1, 25, 65435, 100, 2, 0,
  /* 3964 */ 27, 1, 26, 1, 25, 65393, 43, 65453, 156, 25, 65437, 100, 2, 0,
  /* 3978 */ 65459, 118, 27, 65510, 27, 26, 65511, 26, 25, 65389, 1, 42, 65451, 162, 25, 65433, 81, 26, 65431, 102, 2, 0,
  /* 4000 */ 27, 26, 65511, 26, 25, 65390, 42, 65451, 165, 26, 65431, 102, 2, 0,
  /* 4014 */ 65460, 117, 27, 26, 25, 65392, 42, 65452, 109, 28, 27, 26, 65389, 43, 65451, 135, 26, 1, 25, 65433, 102, 2, 0,
  /* 4037 */ 27, 26, 25, 65392, 42, 65452, 136, 26, 1, 25, 65433, 102, 2, 0,
  /* 4051 */ 27, 1, 26, 1, 25, 65391, 43, 65452, 159, 25, 65435, 102, 2, 0,
  /* 4065 */ 173, 65534, 1, 30, 1, 51, 43, 65458, 36, 1, 43, 65457, 118, 27, 26, 25, 65390, 42, 65451, 71, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65387, 1, 42, 65450, 138, 26, 1, 25, 65431, 104, 2, 0,
  /* 4108 */ 173, 1, 65533, 31, 1, 51, 1, 43, 65457, 37, 44, 65456, 77, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65387, 1, 42, 65450, 138, 26, 1, 25, 65431, 104, 2, 0,
  /* 4144 */ 52, 1, 43, 65457, 78, 41, 1, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65387, 1, 42, 65450, 138, 26, 1, 25, 65431, 104, 2, 0,
  /* 4172 */ 52, 43, 65458, 36, 44, 65457, 118, 27, 26, 25, 65390, 42, 65451, 71, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65387, 1, 42, 65450, 138, 26, 1, 25, 65431, 104, 2, 0,
  /* 4207 */ 44, 65457, 78, 41, 1, 27, 65510, 27, 26, 65511, 26, 25, 65387, 1, 42, 65450, 138, 26, 1, 25, 65431, 104, 2, 0,
  /* 4231 */ 43, 65458, 119, 27, 26, 25, 65390, 42, 65451, 71, 41, 1, 27, 1, 26, 1, 25, 65387, 43, 65450, 138, 26, 1, 25, 65431, 104, 2, 0,
  /* 4259 */ 65458, 119, 27, 26, 25, 65390, 42, 65451, 112, 28, 27, 26, 65387, 43, 65450, 138, 26, 1, 25, 65431, 104, 2, 0,
  /* 4282 */ 27, 26, 25, 65390, 42, 65451, 139, 26, 1, 25, 65431, 104, 2, 0,
  /* 4296 */ 27, 1, 26, 1, 25, 65389, 43, 65451, 162, 25, 65433, 104, 2, 0,
  /* 4310 */ 26, 1, 25, 65440, 65455, 176, 2, 0,
  /* 4318 */ 26, 1, 25, 65438, 65454, 179, 2, 0,
  /* 4326 */ 26, 1, 25, 65436, 65453, 182, 2, 0,
  /* 4334 */ 26, 1, 25, 65434, 65452, 185, 2, 0,
  /* 4342 */ 26, 1, 25, 65432, 65451, 188, 2, 0,
  /* 4350 */ 65533, 72, 6, 0,
  /* 4354 */ 32, 32, 0,
  /* 4357 */ 65533, 56, 0,
  /* 4360 */ 52, 43, 65455, 37, 55, 65450, 74, 0,
  /* 4368 */ 1, 65533, 57, 1, 52, 43, 65455, 50, 65523, 55, 65450, 74, 0,
  /* 4381 */ 65534, 1, 57, 14, 51, 65523, 55, 65450, 74, 0,
  /* 4391 */ 65, 65523, 55, 65450, 74, 0,
  /* 4397 */ 1, 78, 0,
  /* 4400 */ 43, 65455, 80, 0,
  /* 4404 */ 51, 42, 65455, 40, 43, 65454, 81, 0,
  /* 4412 */ 51, 42, 65454, 41, 43, 65453, 82, 0,
  /* 4420 */ 42, 65455, 82, 0,
  /* 4424 */ 51, 42, 65453, 42, 43, 65452, 83, 0,
  /* 4432 */ 42, 65454, 83, 0,
  /* 4436 */ 51, 42, 65452, 43, 43, 65451, 84, 0,
  /* 4444 */ 42, 65453, 84, 0,
  /* 4448 */ 65534, 1, 47, 1, 50, 42, 65451, 44, 1, 42, 65450, 85, 0,
  /* 4461 */ 1, 65533, 48, 1, 50, 1, 42, 65450, 85, 0,
  /* 4471 */ 51, 1, 42, 65450, 85, 0,
  /* 4477 */ 51, 42, 65451, 44, 43, 65450, 85, 0,
  /* 4485 */ 42, 65452, 85, 0,
  /* 4489 */ 42, 65451, 86, 0,
  /* 4493 */ 27, 52, 65485, 26, 50, 65375, 55, 65450, 143, 26, 65441, 94, 0,
  /* 4506 */ 65469, 108, 54, 65483, 27, 52, 65485, 26, 50, 65388, 65523, 55, 65450, 143, 26, 65441, 94, 0,
  /* 4524 */ 53, 44, 65469, 22, 72, 65456, 52, 69, 65509, 54, 65483, 27, 52, 65485, 26, 50, 65388, 65523, 55, 65450, 143, 26, 65441, 94, 0,
  /* 4549 */ 177, 65534, 1, 26, 1, 53, 44, 65469, 51, 65507, 72, 65456, 52, 69, 65509, 54, 65483, 27, 52, 65485, 26, 50, 65388, 65523, 55, 65450, 143, 26, 65441, 94, 0,
  /* 4580 */ 44, 65469, 66, 69, 65509, 54, 65483, 27, 52, 65485, 26, 50, 65388, 65523, 55, 65450, 143, 26, 65441, 94, 0,
  /* 4601 */ 26, 25, 65398, 42, 65455, 153, 26, 65439, 96, 0,
  /* 4611 */ 27, 26, 65397, 43, 65455, 150, 25, 65441, 96, 0,
  /* 4621 */ 26, 25, 65396, 42, 65454, 156, 26, 65437, 98, 0,
  /* 4631 */ 27, 26, 65395, 43, 65454, 153, 25, 65439, 98, 0,
  /* 4641 */ 26, 25, 65394, 42, 65453, 159, 26, 65435, 100, 0,
  /* 4651 */ 27, 26, 65393, 43, 65453, 156, 25, 65437, 100, 0,
  /* 4661 */ 26, 25, 65392, 42, 65452, 162, 26, 65433, 102, 0,
  /* 4671 */ 27, 26, 65391, 43, 65452, 159, 25, 65435, 102, 0,
  /* 4681 */ 26, 25, 65390, 42, 65451, 165, 26, 65431, 104, 0,
  /* 4691 */ 27, 26, 65389, 43, 65451, 162, 25, 65433, 104, 0,
  /* 4701 */ 172, 1, 65533, 32, 1, 51, 43, 65457, 37, 1, 43, 65456, 119, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65387, 1, 42, 65450, 165, 25, 65431, 106, 0,
  /* 4732 */ 52, 43, 65457, 37, 44, 65456, 119, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65387, 1, 42, 65450, 165, 25, 65431, 106, 0,
  /* 4757 */ 43, 65457, 120, 27, 65469, 41, 27, 26, 65484, 27, 26, 25, 65387, 1, 42, 65450, 165, 25, 65431, 106, 0,
  /* 4778 */ 65457, 120, 27, 65510, 27, 26, 65511, 26, 25, 65387, 1, 42, 65450, 165, 25, 65431, 106, 0,
  /* 4796 */ 27, 1, 26, 1, 25, 65387, 43, 65450, 165, 25, 65431, 106, 0,
  /* 4809 */ 27, 26, 65387, 43, 65450, 165, 25, 65431, 106, 0,
  /* 4819 */ 112, 0,
  /* 4821 */ 113, 0,
  /* 4823 */ 114, 0,
  /* 4825 */ 115, 0,
  /* 4827 */ 116, 0,
  /* 4829 */ 117, 0,
  /* 4831 */ 118, 0,
  /* 4833 */ 119, 0,
  /* 4835 */ 120, 0,
  /* 4837 */ 121, 0,
  /* 4839 */ 122, 0,
  /* 4841 */ 123, 0,
  /* 4843 */ 124, 0,
  /* 4845 */ 125, 0,
  /* 4847 */ 126, 0,
  /* 4849 */ 127, 0,
  /* 4851 */ 128, 0,
  /* 4853 */ 175, 1, 1, 26, 30, 52, 65507, 72, 65456, 52, 69, 65509, 54, 65510, 52, 65511, 50, 65388, 42, 65450, 168, 0,
  /* 4875 */ 82, 65507, 72, 65456, 52, 69, 65509, 54, 65510, 52, 65511, 50, 65388, 42, 65450, 168, 0,
  /* 4892 */ 52, 65511, 50, 65430, 65450, 168, 0,
  /* 4899 */ 26, 65440, 65455, 176, 0,
  /* 4904 */ 25, 65440, 65455, 178, 0,
  /* 4909 */ 26, 65438, 65454, 179, 0,
  /* 4914 */ 25, 65438, 65454, 181, 0,
  /* 4919 */ 26, 65436, 65453, 182, 0,
  /* 4924 */ 25, 65436, 65453, 184, 0,
  /* 4929 */ 26, 65434, 65452, 185, 0,
  /* 4934 */ 25, 65434, 65452, 187, 0,
  /* 4939 */ 26, 65432, 65451, 188, 0,
  /* 4944 */ 25, 65432, 65451, 190, 0,
  /* 4949 */ 173, 65535, 65533, 33, 1, 51, 1, 43, 65456, 79, 41, 27, 26, 65484, 27, 26, 25, 65388, 42, 65450, 191, 0,
  /* 4971 */ 52, 1, 43, 65456, 79, 41, 27, 26, 65484, 27, 26, 25, 65388, 42, 65450, 191, 0,
  /* 4988 */ 44, 65456, 79, 41, 27, 26, 65484, 27, 26, 25, 65388, 42, 65450, 191, 0,
  /* 5003 */ 27, 26, 65511, 26, 25, 65388, 42, 65450, 191, 0,
  /* 5013 */ 26, 1, 25, 65430, 65450, 191, 0,
  /* 5020 */ 26, 65430, 65450, 191, 0,
  /* 5025 */ 65431, 0,
  /* 5027 */ 65433, 0,
  /* 5029 */ 65435, 0,
  /* 5031 */ 65437, 0,
  /* 5033 */ 65439, 0,
  /* 5035 */ 65441, 0,
  /* 5037 */ 65535, 65533, 49, 51, 42, 65450, 0,
  /* 5044 */ 1, 1, 71, 51, 42, 65450, 0,
  /* 5051 */ 172, 65535, 65533, 34, 52, 43, 65456, 121, 27, 26, 25, 65388, 42, 65450, 0,
  /* 5066 */ 176, 1, 1, 56, 52, 43, 65456, 121, 27, 26, 25, 65388, 42, 65450, 0,
  /* 5081 */ 25, 65430, 65450, 0,
  /* 5085 */ 65432, 65451, 0,
  /* 5088 */ 65434, 65452, 0,
  /* 5091 */ 65436, 65453, 0,
  /* 5094 */ 65438, 65454, 0,
  /* 5097 */ 65440, 65455, 0,
  /* 5100 */ 65471, 0,
  /* 5102 */ 65463, 65360, 1, 178, 65359, 1, 231, 52, 43, 65411, 53, 65484, 0,
  /* 5115 */ 65480, 65359, 1, 177, 65360, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5128 */ 65480, 65360, 1, 177, 65360, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5141 */ 65481, 65361, 1, 177, 65360, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5154 */ 65481, 65360, 1, 176, 65361, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5167 */ 65483, 65360, 1, 176, 65361, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5180 */ 65483, 65361, 1, 176, 65361, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5193 */ 65484, 65362, 1, 176, 65361, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5206 */ 65484, 65361, 1, 175, 65362, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5219 */ 65486, 65361, 1, 175, 65362, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5232 */ 65486, 65362, 1, 175, 65362, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5245 */ 65487, 65363, 1, 175, 65362, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5258 */ 65487, 65362, 1, 174, 65363, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5271 */ 65489, 65362, 1, 174, 65363, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5284 */ 65489, 65363, 1, 174, 65363, 1, 200, 53, 44, 65440, 53, 65484, 0,
  /* 5297 */ 65088, 1, 1, 1, 1, 1, 1, 1, 227, 52, 43, 65411, 53, 65484, 165, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 0,
  /* 5333 */ 65113, 1, 1, 1, 1, 1, 1, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 65440, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 0,
  /* 5369 */ 65113, 1, 1, 1, 1, 1, 1, 228, 52, 43, 65411, 53, 65484, 165, 27, 65440, 42, 28, 65423, 44, 42, 65398, 53, 44, 65440, 53, 65484, 0,
  /* 5397 */ 65139, 1, 1, 1, 1, 1, 1, 197, 53, 44, 65440, 53, 65484, 137, 28, 65467, 42, 28, 65423, 44, 42, 65398, 53, 44, 65440, 53, 65484, 0,
  /* 5425 */ 65139, 1, 1, 1, 1, 1, 229, 52, 43, 65411, 53, 65484, 165, 65467, 42, 65451, 44, 65440, 53, 65484, 0,
  /* 5446 */ 65166, 1, 1, 1, 1, 1, 198, 53, 44, 65440, 53, 65484, 137, 65495, 42, 65451, 44, 65440, 53, 65484, 0,
  /* 5467 */ 65207, 1, 1, 1, 231, 52, 65454, 53, 65484, 0,
  /* 5477 */ 65236, 1, 1, 1, 200, 53, 65484, 53, 65484, 0,
  /* 5487 */ 65166, 1, 1, 1, 1, 230, 52, 43, 65411, 53, 65484, 96, 65493, 65484, 0,
  /* 5502 */ 65194, 1, 1, 1, 1, 199, 53, 44, 65440, 53, 65484, 96, 65493, 65484, 0,
  /* 5517 */ 65457, 65535, 65360, 1, 178, 65359, 1, 178, 65535, 65360, 1, 177, 65360, 1, 227, 52, 43, 65411, 53, 65484, 165, 27, 26, 25, 65389, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 40, 51, 42, 65429, 52, 65485, 0,
  /* 5566 */ 65479, 65535, 65363, 1, 175, 65362, 1, 175, 65535, 65363, 1, 174, 65363, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 13, 52, 43, 65442, 52, 65485, 0,
  /* 5615 */ 65477, 65535, 65362, 1, 175, 65362, 1, 175, 65535, 65363, 1, 175, 65362, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 15, 52, 43, 65442, 52, 65485, 0,
  /* 5664 */ 65474, 65535, 65362, 1, 176, 65361, 1, 176, 65535, 65362, 1, 175, 65362, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 17, 52, 43, 65442, 52, 65485, 0,
  /* 5713 */ 65472, 65535, 65361, 1, 176, 65361, 1, 176, 65535, 65362, 1, 176, 65361, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 19, 52, 43, 65442, 52, 65485, 0,
  /* 5762 */ 65469, 65535, 65361, 1, 177, 65360, 1, 177, 65535, 65361, 1, 176, 65361, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 21, 52, 43, 65442, 52, 65485, 0,
  /* 5811 */ 65467, 65535, 65360, 1, 177, 65360, 1, 177, 65535, 65361, 1, 177, 65360, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 23, 52, 43, 65442, 52, 65485, 0,
  /* 5860 */ 65370, 65360, 1, 178, 65359, 1, 177, 65360, 1, 177, 65360, 1, 227, 52, 43, 65411, 53, 65484, 165, 27, 26, 25, 65389, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 40, 51, 65471, 52, 65485, 0,
  /* 5906 */ 65392, 65363, 1, 175, 65362, 1, 174, 65363, 1, 174, 65363, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 13, 52, 65485, 52, 65485, 0,
  /* 5952 */ 65392, 65362, 1, 174, 65363, 1, 175, 65362, 1, 174, 65363, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 14, 52, 65485, 52, 65485, 0,
  /* 5998 */ 65391, 65362, 1, 175, 65362, 1, 174, 65363, 1, 175, 65362, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 15, 52, 65485, 52, 65485, 0,
  /* 6044 */ 65391, 65361, 1, 175, 65362, 1, 175, 65362, 1, 174, 65363, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 16, 52, 65485, 52, 65485, 0,
  /* 6090 */ 65389, 65362, 1, 176, 65361, 1, 175, 65362, 1, 175, 65362, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 17, 52, 65485, 52, 65485, 0,
  /* 6136 */ 65389, 65361, 1, 175, 65362, 1, 176, 65361, 1, 175, 65362, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 18, 52, 65485, 52, 65485, 0,
  /* 6182 */ 65388, 65361, 1, 176, 65361, 1, 175, 65362, 1, 176, 65361, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 19, 52, 65485, 52, 65485, 0,
  /* 6228 */ 65388, 65360, 1, 176, 65361, 1, 176, 65361, 1, 175, 65362, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 20, 52, 65485, 52, 65485, 0,
  /* 6274 */ 65386, 65361, 1, 177, 65360, 1, 176, 65361, 1, 176, 65361, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 21, 52, 65485, 52, 65485, 0,
  /* 6320 */ 65386, 65360, 1, 176, 65361, 1, 177, 65360, 1, 176, 65361, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 22, 52, 65485, 52, 65485, 0,
  /* 6366 */ 65385, 65360, 1, 177, 65360, 1, 176, 65361, 1, 177, 65360, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 23, 52, 65485, 52, 65485, 0,
  /* 6412 */ 65385, 65359, 1, 177, 65360, 1, 177, 65360, 1, 176, 65361, 1, 196, 53, 44, 65440, 53, 65484, 137, 28, 27, 26, 65414, 42, 28, 27, 65396, 44, 42, 28, 65370, 53, 44, 42, 65398, 53, 44, 65440, 53, 65484, 24, 52, 65485, 52, 65485, 0,
  /* 6458 */ 65503, 0,
  /* 6460 */ 65504, 65504, 0,
  /* 6463 */ 65250, 1, 1, 232, 65506, 0,
  /* 6469 */ 65412, 65360, 1, 178, 65359, 1, 177, 65360, 1, 229, 52, 43, 65411, 53, 65484, 165, 27, 65440, 42, 65451, 44, 65440, 53, 65484, 42, 65522, 0,
  /* 6496 */ 65535, 0,
};

extern const LaneBitmask RISCVLaneMaskLists[] = {
  /* 0 */ LaneBitmask(0x0000000000000000), LaneBitmask::getAll(),
  /* 2 */ LaneBitmask(0x0000000000000001), LaneBitmask::getAll(),
  /* 4 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), LaneBitmask::getAll(),
  /* 7 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask::getAll(),
  /* 10 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask::getAll(),
  /* 14 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask::getAll(),
  /* 19 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask::getAll(),
  /* 25 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask::getAll(),
  /* 32 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask::getAll(),
  /* 40 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask::getAll(),
};

extern const uint16_t RISCVSubRegIdxLists[] = {
  /* 0 */ 2, 1, 0,
  /* 3 */ 2, 3, 0,
  /* 6 */ 4, 5, 0,
  /* 9 */ 12, 4, 5, 13, 6, 7, 0,
  /* 16 */ 16, 12, 4, 5, 13, 6, 7, 17, 14, 8, 9, 15, 10, 11, 0,
  /* 31 */ 4, 5, 6, 18, 21, 0,
  /* 37 */ 4, 5, 6, 7, 18, 19, 21, 22, 23, 0,
  /* 47 */ 12, 4, 5, 13, 6, 7, 18, 19, 20, 21, 22, 23, 0,
  /* 60 */ 4, 5, 6, 7, 8, 18, 19, 20, 21, 22, 23, 28, 32, 36, 0,
  /* 75 */ 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 28, 29, 32, 33, 36, 37, 40, 0,
  /* 96 */ 4, 5, 6, 7, 8, 9, 10, 18, 19, 20, 21, 22, 23, 24, 25, 28, 29, 30, 32, 33, 34, 36, 37, 38, 40, 41, 43, 0,
  /* 124 */ 4, 5, 6, 7, 8, 9, 10, 11, 18, 19, 20, 21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 0,
  /* 160 */ 12, 4, 5, 13, 6, 7, 14, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 28, 29, 32, 33, 36, 37, 40, 46, 49, 0,
  /* 187 */ 12, 4, 5, 13, 6, 7, 14, 8, 9, 15, 10, 11, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 49, 50, 51, 0,
  /* 233 */ 16, 12, 4, 5, 13, 6, 7, 17, 14, 8, 9, 15, 10, 11, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 0,
};

extern const MCRegisterInfo::SubRegCoveredBits RISCVSubRegIdxRanges[] = {
  { 65535, 65535 },
  { 0, 16 },	// sub_16
  { 0, 32 },	// sub_32
  { 32, 32 },	// sub_32_hi
  { 0, 64 },	// sub_vrm1_0
  { 64, 64 },	// sub_vrm1_1
  { 128, 64 },	// sub_vrm1_2
  { 192, 64 },	// sub_vrm1_3
  { 256, 64 },	// sub_vrm1_4
  { 320, 64 },	// sub_vrm1_5
  { 384, 64 },	// sub_vrm1_6
  { 448, 64 },	// sub_vrm1_7
  { 0, 128 },	// sub_vrm2_0
  { 128, 128 },	// sub_vrm2_1
  { 256, 128 },	// sub_vrm2_2
  { 384, 128 },	// sub_vrm2_3
  { 0, 256 },	// sub_vrm4_0
  { 256, 256 },	// sub_vrm4_1
  { 0, 128 },	// sub_vrm1_0_sub_vrm1_1
  { 0, 192 },	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
  { 0, 256 },	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  { 64, 128 },	// sub_vrm1_1_sub_vrm1_2
  { 64, 192 },	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  { 128, 128 },	// sub_vrm1_2_sub_vrm1_3
  { 0, 320 },	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  { 0, 384 },	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  { 0, 448 },	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  { 0, 512 },	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  { 64, 256 },	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  { 64, 320 },	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  { 64, 384 },	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  { 64, 448 },	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  { 128, 192 },	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  { 128, 256 },	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  { 128, 320 },	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  { 128, 384 },	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  { 192, 128 },	// sub_vrm1_3_sub_vrm1_4
  { 192, 192 },	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  { 192, 256 },	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  { 192, 320 },	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  { 256, 128 },	// sub_vrm1_4_sub_vrm1_5
  { 256, 192 },	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  { 256, 256 },	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  { 320, 128 },	// sub_vrm1_5_sub_vrm1_6
  { 320, 192 },	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  { 384, 128 },	// sub_vrm1_6_sub_vrm1_7
  { 0, 256 },	// sub_vrm2_0_sub_vrm2_1
  { 0, 384 },	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
  { 0, 512 },	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
  { 128, 256 },	// sub_vrm2_1_sub_vrm2_2
  { 128, 384 },	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
  { 256, 256 },	// sub_vrm2_2_sub_vrm2_3
};


#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Woverlength-strings"
#endif
extern const char RISCVRegStrings[] = {
  /* 0 */ "V3_V4_V5_V6_V7_V8_V9_V10\0"
  /* 25 */ "X10\0"
  /* 29 */ "V13_V14_V15_V16_V17_V18_V19_V20\0"
  /* 61 */ "X20\0"
  /* 65 */ "V23_V24_V25_V26_V27_V28_V29_V30\0"
  /* 97 */ "X30\0"
  /* 101 */ "V0\0"
  /* 104 */ "X0\0"
  /* 107 */ "V4_V5_V6_V7_V8_V9_V10_V11\0"
  /* 133 */ "X11\0"
  /* 137 */ "V14_V15_V16_V17_V18_V19_V20_V21\0"
  /* 169 */ "X21\0"
  /* 173 */ "V24_V25_V26_V27_V28_V29_V30_V31\0"
  /* 205 */ "X31\0"
  /* 209 */ "V0_V1\0"
  /* 215 */ "X1\0"
  /* 218 */ "V5_V6_V7_V8_V9_V10_V11_V12\0"
  /* 245 */ "X12\0"
  /* 249 */ "V15_V16_V17_V18_V19_V20_V21_V22\0"
  /* 281 */ "X22\0"
  /* 285 */ "V4M2_V6M2_V8M2_V10M2\0"
  /* 306 */ "V14M2_V16M2_V18M2_V20M2\0"
  /* 330 */ "V24M2_V26M2_V28M2_V30M2\0"
  /* 354 */ "V0M2\0"
  /* 359 */ "V6M2_V8M2_V10M2_V12M2\0"
  /* 381 */ "V16M2_V18M2_V20M2_V22M2\0"
  /* 405 */ "V0M2_V2M2\0"
  /* 415 */ "V8M2_V10M2_V12M2_V14M2\0"
  /* 438 */ "V18M2_V20M2_V22M2_V24M2\0"
  /* 462 */ "V0M2_V2M2_V4M2\0"
  /* 477 */ "V10M2_V12M2_V14M2_V16M2\0"
  /* 501 */ "V20M2_V22M2_V24M2_V26M2\0"
  /* 525 */ "V0M2_V2M2_V4M2_V6M2\0"
  /* 545 */ "V12M2_V14M2_V16M2_V18M2\0"
  /* 569 */ "V22M2_V24M2_V26M2_V28M2\0"
  /* 593 */ "V2M2_V4M2_V6M2_V8M2\0"
  /* 613 */ "V0_V1_V2\0"
  /* 622 */ "X2\0"
  /* 625 */ "V6_V7_V8_V9_V10_V11_V12_V13\0"
  /* 653 */ "X13\0"
  /* 657 */ "V16_V17_V18_V19_V20_V21_V22_V23\0"
  /* 689 */ "X23\0"
  /* 693 */ "V0_V1_V2_V3\0"
  /* 705 */ "X3\0"
  /* 708 */ "V7_V8_V9_V10_V11_V12_V13_V14\0"
  /* 737 */ "X14\0"
  /* 741 */ "V17_V18_V19_V20_V21_V22_V23_V24\0"
  /* 773 */ "X24\0"
  /* 777 */ "V16M4_V20M4\0"
  /* 789 */ "V0M4\0"
  /* 794 */ "V8M4_V12M4\0"
  /* 805 */ "V20M4_V24M4\0"
  /* 817 */ "V0M4_V4M4\0"
  /* 827 */ "V12M4_V16M4\0"
  /* 839 */ "V24M4_V28M4\0"
  /* 851 */ "V4M4_V8M4\0"
  /* 861 */ "V0_V1_V2_V3_V4\0"
  /* 876 */ "X4\0"
  /* 879 */ "V8_V9_V10_V11_V12_V13_V14_V15\0"
  /* 909 */ "X15\0"
  /* 913 */ "V18_V19_V20_V21_V22_V23_V24_V25\0"
  /* 945 */ "X25\0"
  /* 949 */ "V0_V1_V2_V3_V4_V5\0"
  /* 967 */ "X5\0"
  /* 970 */ "V9_V10_V11_V12_V13_V14_V15_V16\0"
  /* 1001 */ "X16\0"
  /* 1005 */ "V19_V20_V21_V22_V23_V24_V25_V26\0"
  /* 1037 */ "X26\0"
  /* 1041 */ "V0_V1_V2_V3_V4_V5_V6\0"
  /* 1062 */ "X6\0"
  /* 1065 */ "V10_V11_V12_V13_V14_V15_V16_V17\0"
  /* 1097 */ "X17\0"
  /* 1101 */ "V20_V21_V22_V23_V24_V25_V26_V27\0"
  /* 1133 */ "X27\0"
  /* 1137 */ "V0_V1_V2_V3_V4_V5_V6_V7\0"
  /* 1161 */ "X7\0"
  /* 1164 */ "V11_V12_V13_V14_V15_V16_V17_V18\0"
  /* 1196 */ "X18\0"
  /* 1200 */ "V21_V22_V23_V24_V25_V26_V27_V28\0"
  /* 1232 */ "X28\0"
  /* 1236 */ "V0M8\0"
  /* 1241 */ "V24M8\0"
  /* 1247 */ "V16M8\0"
  /* 1253 */ "V8M8\0"
  /* 1258 */ "V1_V2_V3_V4_V5_V6_V7_V8\0"
  /* 1282 */ "X8\0"
  /* 1285 */ "V12_V13_V14_V15_V16_V17_V18_V19\0"
  /* 1317 */ "X19\0"
  /* 1321 */ "V22_V23_V24_V25_V26_V27_V28_V29\0"
  /* 1353 */ "X29\0"
  /* 1357 */ "V2_V3_V4_V5_V6_V7_V8_V9\0"
  /* 1381 */ "X9\0"
  /* 1384 */ "VLENB\0"
  /* 1390 */ "X10_PD\0"
  /* 1397 */ "X20_PD\0"
  /* 1404 */ "X30_PD\0"
  /* 1411 */ "X0_PD\0"
  /* 1417 */ "X12_PD\0"
  /* 1424 */ "X22_PD\0"
  /* 1431 */ "X2_PD\0"
  /* 1437 */ "X14_PD\0"
  /* 1444 */ "X24_PD\0"
  /* 1451 */ "X4_PD\0"
  /* 1457 */ "X16_PD\0"
  /* 1464 */ "X26_PD\0"
  /* 1471 */ "X6_PD\0"
  /* 1477 */ "X18_PD\0"
  /* 1484 */ "X28_PD\0"
  /* 1491 */ "X8_PD\0"
  /* 1497 */ "F10_D\0"
  /* 1503 */ "F20_D\0"
  /* 1509 */ "F30_D\0"
  /* 1515 */ "F0_D\0"
  /* 1520 */ "F11_D\0"
  /* 1526 */ "F21_D\0"
  /* 1532 */ "F31_D\0"
  /* 1538 */ "F1_D\0"
  /* 1543 */ "F12_D\0"
  /* 1549 */ "F22_D\0"
  /* 1555 */ "F2_D\0"
  /* 1560 */ "F13_D\0"
  /* 1566 */ "F23_D\0"
  /* 1572 */ "F3_D\0"
  /* 1577 */ "F14_D\0"
  /* 1583 */ "F24_D\0"
  /* 1589 */ "F4_D\0"
  /* 1594 */ "F15_D\0"
  /* 1600 */ "F25_D\0"
  /* 1606 */ "F5_D\0"
  /* 1611 */ "F16_D\0"
  /* 1617 */ "F26_D\0"
  /* 1623 */ "F6_D\0"
  /* 1628 */ "F17_D\0"
  /* 1634 */ "F27_D\0"
  /* 1640 */ "F7_D\0"
  /* 1645 */ "F18_D\0"
  /* 1651 */ "F28_D\0"
  /* 1657 */ "F8_D\0"
  /* 1662 */ "F19_D\0"
  /* 1668 */ "F29_D\0"
  /* 1674 */ "F9_D\0"
  /* 1679 */ "VTYPE\0"
  /* 1685 */ "F10_F\0"
  /* 1691 */ "F20_F\0"
  /* 1697 */ "F30_F\0"
  /* 1703 */ "F0_F\0"
  /* 1708 */ "F11_F\0"
  /* 1714 */ "F21_F\0"
  /* 1720 */ "F31_F\0"
  /* 1726 */ "F1_F\0"
  /* 1731 */ "F12_F\0"
  /* 1737 */ "F22_F\0"
  /* 1743 */ "F2_F\0"
  /* 1748 */ "F13_F\0"
  /* 1754 */ "F23_F\0"
  /* 1760 */ "F3_F\0"
  /* 1765 */ "F14_F\0"
  /* 1771 */ "F24_F\0"
  /* 1777 */ "F4_F\0"
  /* 1782 */ "F15_F\0"
  /* 1788 */ "F25_F\0"
  /* 1794 */ "F5_F\0"
  /* 1799 */ "F16_F\0"
  /* 1805 */ "F26_F\0"
  /* 1811 */ "F6_F\0"
  /* 1816 */ "F17_F\0"
  /* 1822 */ "F27_F\0"
  /* 1828 */ "F7_F\0"
  /* 1833 */ "F18_F\0"
  /* 1839 */ "F28_F\0"
  /* 1845 */ "F8_F\0"
  /* 1850 */ "F19_F\0"
  /* 1856 */ "F29_F\0"
  /* 1862 */ "F9_F\0"
  /* 1867 */ "F10_H\0"
  /* 1873 */ "F20_H\0"
  /* 1879 */ "F30_H\0"
  /* 1885 */ "F0_H\0"
  /* 1890 */ "F11_H\0"
  /* 1896 */ "F21_H\0"
  /* 1902 */ "F31_H\0"
  /* 1908 */ "F1_H\0"
  /* 1913 */ "F12_H\0"
  /* 1919 */ "F22_H\0"
  /* 1925 */ "F2_H\0"
  /* 1930 */ "F13_H\0"
  /* 1936 */ "F23_H\0"
  /* 1942 */ "F3_H\0"
  /* 1947 */ "F14_H\0"
  /* 1953 */ "F24_H\0"
  /* 1959 */ "F4_H\0"
  /* 1964 */ "F15_H\0"
  /* 1970 */ "F25_H\0"
  /* 1976 */ "F5_H\0"
  /* 1981 */ "F16_H\0"
  /* 1987 */ "F26_H\0"
  /* 1993 */ "F6_H\0"
  /* 1998 */ "F17_H\0"
  /* 2004 */ "F27_H\0"
  /* 2010 */ "F7_H\0"
  /* 2015 */ "F18_H\0"
  /* 2021 */ "F28_H\0"
  /* 2027 */ "F8_H\0"
  /* 2032 */ "F19_H\0"
  /* 2038 */ "F29_H\0"
  /* 2044 */ "F9_H\0"
  /* 2049 */ "VL\0"
  /* 2052 */ "FRM\0"
  /* 2056 */ "VXRM\0"
  /* 2061 */ "FFLAGS\0"
  /* 2068 */ "VXSAT\0"
};
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif

extern const MCRegisterDesc RISCVRegDesc[] = { // Descriptors
  { 24, 0, 0, 0, 0, 0 },
  { 2061, 8, 8, 2, 103937, 0 },
  { 2052, 8, 8, 2, 103937, 0 },
  { 2049, 8, 8, 2, 103937, 0 },
  { 1384, 8, 8, 2, 103937, 0 },
  { 1679, 8, 8, 2, 103937, 0 },
  { 2056, 8, 8, 2, 103937, 0 },
  { 2068, 8, 8, 2, 103937, 0 },
  { 101, 8, 5066, 2, 103937, 0 },
  { 212, 8, 4853, 2, 103937, 0 },
  { 619, 8, 4549, 2, 103937, 0 },
  { 702, 8, 3639, 2, 103937, 0 },
  { 873, 8, 3596, 2, 103937, 0 },
  { 964, 8, 2303, 2, 103937, 0 },
  { 1059, 8, 1980, 2, 103937, 0 },
  { 1158, 8, 772, 2, 103937, 0 },
  { 1279, 8, 822, 2, 103937, 0 },
  { 1378, 8, 1092, 2, 103937, 0 },
  { 21, 8, 722, 2, 103937, 0 },
  { 129, 8, 1007, 2, 103937, 0 },
  { 241, 8, 957, 2, 103937, 0 },
  { 649, 8, 1363, 2, 103937, 0 },
  { 733, 8, 907, 2, 103937, 0 },
  { 905, 8, 1278, 2, 103937, 0 },
  { 997, 8, 1228, 2, 103937, 0 },
  { 1093, 8, 1634, 2, 103937, 0 },
  { 1192, 8, 1178, 2, 103937, 0 },
  { 1313, 8, 1549, 2, 103937, 0 },
  { 57, 8, 1499, 2, 103937, 0 },
  { 165, 8, 1855, 2, 103937, 0 },
  { 277, 8, 1449, 2, 103937, 0 },
  { 685, 8, 1770, 2, 103937, 0 },
  { 769, 8, 1720, 2, 103937, 0 },
  { 941, 8, 3001, 2, 103937, 0 },
  { 1033, 8, 3117, 2, 103937, 0 },
  { 1129, 8, 4065, 2, 103937, 0 },
  { 1228, 8, 4108, 2, 103937, 0 },
  { 1349, 8, 4701, 2, 103937, 0 },
  { 93, 8, 4949, 2, 103937, 0 },
  { 201, 8, 5051, 2, 103937, 0 },
  { 104, 8, 4851, 2, 103937, 0 },
  { 215, 8, 4849, 2, 103937, 0 },
  { 622, 8, 4849, 2, 103937, 0 },
  { 705, 8, 4847, 2, 103937, 0 },
  { 876, 8, 4847, 2, 103937, 0 },
  { 967, 8, 4845, 2, 103937, 0 },
  { 1062, 8, 4845, 2, 103937, 0 },
  { 1161, 8, 4843, 2, 103937, 0 },
  { 1282, 8, 4843, 2, 103937, 0 },
  { 1381, 8, 4841, 2, 103937, 0 },
  { 25, 8, 4841, 2, 103937, 0 },
  { 133, 8, 4839, 2, 103937, 0 },
  { 245, 8, 4839, 2, 103937, 0 },
  { 653, 8, 4837, 2, 103937, 0 },
  { 737, 8, 4837, 2, 103937, 0 },
  { 909, 8, 4835, 2, 103937, 0 },
  { 1001, 8, 4835, 2, 103937, 0 },
  { 1097, 8, 4833, 2, 103937, 0 },
  { 1196, 8, 4833, 2, 103937, 0 },
  { 1317, 8, 4831, 2, 103937, 0 },
  { 61, 8, 4831, 2, 103937, 0 },
  { 169, 8, 4829, 2, 103937, 0 },
  { 281, 8, 4829, 2, 103937, 0 },
  { 689, 8, 4827, 2, 103937, 0 },
  { 773, 8, 4827, 2, 103937, 0 },
  { 945, 8, 4825, 2, 103937, 0 },
  { 1037, 8, 4825, 2, 103937, 0 },
  { 1133, 8, 4823, 2, 103937, 0 },
  { 1232, 8, 4823, 2, 103937, 0 },
  { 1353, 8, 4821, 2, 103937, 0 },
  { 97, 8, 4821, 2, 103937, 0 },
  { 205, 8, 4819, 2, 103937, 0 },
  { 1515, 4354, 8, 0, 103937, 2 },
  { 1538, 4354, 8, 0, 103937, 2 },
  { 1555, 4354, 8, 0, 103937, 2 },
  { 1572, 4354, 8, 0, 103937, 2 },
  { 1589, 4354, 8, 0, 103937, 2 },
  { 1606, 4354, 8, 0, 103937, 2 },
  { 1623, 4354, 8, 0, 103937, 2 },
  { 1640, 4354, 8, 0, 103937, 2 },
  { 1657, 4354, 8, 0, 103937, 2 },
  { 1674, 4354, 8, 0, 103937, 2 },
  { 1497, 4354, 8, 0, 103937, 2 },
  { 1520, 4354, 8, 0, 103937, 2 },
  { 1543, 4354, 8, 0, 103937, 2 },
  { 1560, 4354, 8, 0, 103937, 2 },
  { 1577, 4354, 8, 0, 103937, 2 },
  { 1594, 4354, 8, 0, 103937, 2 },
  { 1611, 4354, 8, 0, 103937, 2 },
  { 1628, 4354, 8, 0, 103937, 2 },
  { 1645, 4354, 8, 0, 103937, 2 },
  { 1662, 4354, 8, 0, 103937, 2 },
  { 1503, 4354, 8, 0, 103937, 2 },
  { 1526, 4354, 8, 0, 103937, 2 },
  { 1549, 4354, 8, 0, 103937, 2 },
  { 1566, 4354, 8, 0, 103937, 2 },
  { 1583, 4354, 8, 0, 103937, 2 },
  { 1600, 4354, 8, 0, 103937, 2 },
  { 1617, 4354, 8, 0, 103937, 2 },
  { 1634, 4354, 8, 0, 103937, 2 },
  { 1651, 4354, 8, 0, 103937, 2 },
  { 1668, 4354, 8, 0, 103937, 2 },
  { 1509, 4354, 8, 0, 103937, 2 },
  { 1532, 4354, 8, 0, 103937, 2 },
  { 1703, 4355, 6461, 1, 103329, 2 },
  { 1726, 4355, 6461, 1, 103329, 2 },
  { 1743, 4355, 6461, 1, 103329, 2 },
  { 1760, 4355, 6461, 1, 103329, 2 },
  { 1777, 4355, 6461, 1, 103329, 2 },
  { 1794, 4355, 6461, 1, 103329, 2 },
  { 1811, 4355, 6461, 1, 103329, 2 },
  { 1828, 4355, 6461, 1, 103329, 2 },
  { 1845, 4355, 6461, 1, 103329, 2 },
  { 1862, 4355, 6461, 1, 103329, 2 },
  { 1685, 4355, 6461, 1, 103329, 2 },
  { 1708, 4355, 6461, 1, 103329, 2 },
  { 1731, 4355, 6461, 1, 103329, 2 },
  { 1748, 4355, 6461, 1, 103329, 2 },
  { 1765, 4355, 6461, 1, 103329, 2 },
  { 1782, 4355, 6461, 1, 103329, 2 },
  { 1799, 4355, 6461, 1, 103329, 2 },
  { 1816, 4355, 6461, 1, 103329, 2 },
  { 1833, 4355, 6461, 1, 103329, 2 },
  { 1850, 4355, 6461, 1, 103329, 2 },
  { 1691, 4355, 6461, 1, 103329, 2 },
  { 1714, 4355, 6461, 1, 103329, 2 },
  { 1737, 4355, 6461, 1, 103329, 2 },
  { 1754, 4355, 6461, 1, 103329, 2 },
  { 1771, 4355, 6461, 1, 103329, 2 },
  { 1788, 4355, 6461, 1, 103329, 2 },
  { 1805, 4355, 6461, 1, 103329, 2 },
  { 1822, 4355, 6461, 1, 103329, 2 },
  { 1839, 4355, 6461, 1, 103329, 2 },
  { 1856, 4355, 6461, 1, 103329, 2 },
  { 1697, 4355, 6461, 1, 103329, 2 },
  { 1720, 4355, 6461, 1, 103329, 2 },
  { 1885, 8, 6460, 2, 81601, 0 },
  { 1908, 8, 6460, 2, 81601, 0 },
  { 1925, 8, 6460, 2, 81601, 0 },
  { 1942, 8, 6460, 2, 81601, 0 },
  { 1959, 8, 6460, 2, 81601, 0 },
  { 1976, 8, 6460, 2, 81601, 0 },
  { 1993, 8, 6460, 2, 81601, 0 },
  { 2010, 8, 6460, 2, 81601, 0 },
  { 2027, 8, 6460, 2, 81601, 0 },
  { 2044, 8, 6460, 2, 81601, 0 },
  { 1867, 8, 6460, 2, 81601, 0 },
  { 1890, 8, 6460, 2, 81601, 0 },
  { 1913, 8, 6460, 2, 81601, 0 },
  { 1930, 8, 6460, 2, 81601, 0 },
  { 1947, 8, 6460, 2, 81601, 0 },
  { 1964, 8, 6460, 2, 81601, 0 },
  { 1981, 8, 6460, 2, 81601, 0 },
  { 1998, 8, 6460, 2, 81601, 0 },
  { 2015, 8, 6460, 2, 81601, 0 },
  { 2032, 8, 6460, 2, 81601, 0 },
  { 1873, 8, 6460, 2, 81601, 0 },
  { 1896, 8, 6460, 2, 81601, 0 },
  { 1919, 8, 6460, 2, 81601, 0 },
  { 1936, 8, 6460, 2, 81601, 0 },
  { 1953, 8, 6460, 2, 81601, 0 },
  { 1970, 8, 6460, 2, 81601, 0 },
  { 1987, 8, 6460, 2, 81601, 0 },
  { 2004, 8, 6460, 2, 81601, 0 },
  { 2021, 8, 6460, 2, 81601, 0 },
  { 2038, 8, 6460, 2, 81601, 0 },
  { 1879, 8, 6460, 2, 81601, 0 },
  { 1902, 8, 6460, 2, 81601, 0 },
  { 1411, 674, 8, 3, 9186, 4 },
  { 1431, 677, 8, 3, 9186, 4 },
  { 1451, 680, 8, 3, 9186, 4 },
  { 1471, 683, 8, 3, 9186, 4 },
  { 1491, 686, 8, 3, 9186, 4 },
  { 1390, 689, 8, 3, 9186, 4 },
  { 1417, 692, 8, 3, 9186, 4 },
  { 1437, 695, 8, 3, 9186, 4 },
  { 1457, 698, 8, 3, 9186, 4 },
  { 1477, 701, 8, 3, 9186, 4 },
  { 1397, 704, 8, 3, 9186, 4 },
  { 1424, 707, 8, 3, 9186, 4 },
  { 1444, 710, 8, 3, 9186, 4 },
  { 1464, 713, 8, 3, 9186, 4 },
  { 1484, 716, 8, 3, 9186, 4 },
  { 1404, 719, 8, 3, 9186, 4 },
  { 354, 605, 5044, 6, 2720, 7 },
  { 789, 586, 4397, 9, 1792, 14 },
  { 1236, 593, 8, 16, 0, 40 },
  { 410, 590, 4381, 6, 9138, 7 },
  { 472, 605, 4368, 6, 9138, 7 },
  { 822, 601, 4350, 9, 1872, 14 },
  { 540, 605, 3275, 6, 9090, 7 },
  { 608, 627, 3289, 6, 9090, 7 },
  { 856, 608, 539, 9, 1952, 14 },
  { 1253, 615, 8, 16, 144, 40 },
  { 300, 605, 3338, 6, 9042, 7 },
  { 375, 627, 3303, 6, 9042, 7 },
  { 799, 623, 543, 9, 2032, 14 },
  { 432, 627, 3373, 6, 8994, 7 },
  { 495, 649, 3324, 6, 8994, 7 },
  { 833, 630, 531, 9, 2112, 14 },
  { 1247, 637, 8, 16, 288, 40 },
  { 563, 627, 3408, 6, 8946, 7 },
  { 324, 649, 3359, 6, 8946, 7 },
  { 783, 645, 535, 9, 2192, 14 },
  { 399, 649, 3429, 6, 8898, 7 },
  { 456, 671, 3394, 6, 8898, 7 },
  { 811, 652, 527, 9, 2272, 14 },
  { 1241, 659, 8, 16, 432, 40 },
  { 519, 649, 4448, 6, 8850, 7 },
  { 587, 671, 4461, 6, 8850, 7 },
  { 845, 667, 4357, 9, 2352, 14 },
  { 348, 671, 5037, 6, 8384, 7 },
  { 616, 583, 4875, 6, 9281, 7 },
  { 699, 583, 4524, 6, 9281, 7 },
  { 870, 583, 3675, 6, 9281, 7 },
  { 961, 583, 3537, 6, 9281, 7 },
  { 1056, 583, 2268, 6, 9281, 7 },
  { 1155, 583, 1941, 6, 9281, 7 },
  { 1276, 583, 872, 6, 9281, 7 },
  { 1375, 583, 2124, 6, 9281, 7 },
  { 18, 583, 1142, 6, 9281, 7 },
  { 125, 583, 2057, 6, 9281, 7 },
  { 237, 583, 1057, 6, 9281, 7 },
  { 645, 583, 2435, 6, 9281, 7 },
  { 729, 583, 1413, 6, 9281, 7 },
  { 901, 583, 2368, 6, 9281, 7 },
  { 993, 583, 1328, 6, 9281, 7 },
  { 1089, 583, 2646, 6, 9281, 7 },
  { 1188, 583, 1684, 6, 9281, 7 },
  { 1309, 583, 2579, 6, 9281, 7 },
  { 53, 583, 1599, 6, 9281, 7 },
  { 161, 583, 2857, 6, 9281, 7 },
  { 273, 583, 1905, 6, 9281, 7 },
  { 681, 583, 2790, 6, 9281, 7 },
  { 765, 583, 1820, 6, 9281, 7 },
  { 937, 583, 3050, 6, 9281, 7 },
  { 1029, 583, 3163, 6, 9281, 7 },
  { 1125, 583, 4172, 6, 9281, 7 },
  { 1224, 583, 4144, 6, 9281, 7 },
  { 1345, 583, 4732, 6, 9281, 7 },
  { 89, 583, 4971, 6, 9281, 7 },
  { 197, 583, 5055, 6, 9281, 7 },
  { 209, 577, 5055, 6, 2720, 7 },
  { 467, 5115, 4391, 47, 2434, 14 },
  { 535, 5128, 4360, 47, 2434, 14 },
  { 603, 5154, 3317, 47, 2434, 14 },
  { 295, 5141, 4404, 47, 2434, 14 },
  { 369, 5167, 3352, 47, 2434, 14 },
  { 426, 5180, 4412, 47, 2434, 14 },
  { 489, 5206, 3387, 47, 2434, 14 },
  { 557, 5193, 4424, 47, 2434, 14 },
  { 318, 5219, 3422, 47, 2434, 14 },
  { 393, 5232, 4436, 47, 2434, 14 },
  { 450, 5258, 3443, 47, 2434, 14 },
  { 513, 5245, 4477, 47, 2434, 14 },
  { 581, 5271, 4471, 47, 2434, 14 },
  { 342, 5284, 5040, 47, 2434, 14 },
  { 405, 5102, 5040, 47, 1792, 14 },
  { 851, 5811, 8, 233, 580, 40 },
  { 794, 5762, 8, 233, 580, 40 },
  { 827, 5713, 8, 233, 580, 40 },
  { 777, 5664, 8, 233, 580, 40 },
  { 805, 5615, 8, 233, 580, 40 },
  { 839, 5566, 8, 233, 580, 40 },
  { 817, 5517, 8, 233, 0, 40 },
  { 696, 547, 4860, 31, 2657, 10 },
  { 867, 547, 4580, 31, 2657, 10 },
  { 958, 547, 3572, 31, 2657, 10 },
  { 1053, 547, 3509, 31, 2657, 10 },
  { 1152, 547, 2239, 31, 2657, 10 },
  { 1273, 547, 2029, 31, 2657, 10 },
  { 1372, 547, 2163, 31, 2657, 10 },
  { 15, 547, 2191, 31, 2657, 10 },
  { 122, 547, 2550, 31, 2657, 10 },
  { 233, 547, 2096, 31, 2657, 10 },
  { 641, 547, 2474, 31, 2657, 10 },
  { 725, 547, 2502, 31, 2657, 10 },
  { 897, 547, 2761, 31, 2657, 10 },
  { 989, 547, 2407, 31, 2657, 10 },
  { 1085, 547, 2685, 31, 2657, 10 },
  { 1184, 547, 2713, 31, 2657, 10 },
  { 1305, 547, 2972, 31, 2657, 10 },
  { 49, 547, 2618, 31, 2657, 10 },
  { 157, 547, 2896, 31, 2657, 10 },
  { 269, 547, 2924, 31, 2657, 10 },
  { 677, 547, 3246, 31, 2657, 10 },
  { 761, 547, 2829, 31, 2657, 10 },
  { 933, 547, 3089, 31, 2657, 10 },
  { 1025, 547, 3198, 31, 2657, 10 },
  { 1121, 547, 4231, 31, 2657, 10 },
  { 1220, 547, 4207, 31, 2657, 10 },
  { 1341, 547, 4757, 31, 2657, 10 },
  { 85, 547, 4988, 31, 2657, 10 },
  { 193, 547, 5056, 31, 2657, 10 },
  { 613, 6463, 5056, 31, 2592, 10 },
  { 530, 497, 4364, 160, 1378, 25 },
  { 598, 470, 4400, 160, 1378, 25 },
  { 290, 443, 4420, 160, 1378, 25 },
  { 364, 416, 4408, 160, 1378, 25 },
  { 420, 389, 4432, 160, 1378, 25 },
  { 483, 362, 4416, 160, 1378, 25 },
  { 551, 335, 4444, 160, 1378, 25 },
  { 312, 308, 4428, 160, 1378, 25 },
  { 387, 281, 4485, 160, 1378, 25 },
  { 444, 254, 4440, 160, 1378, 25 },
  { 507, 227, 4489, 160, 1378, 25 },
  { 575, 200, 4481, 160, 1378, 25 },
  { 336, 173, 5041, 160, 1378, 25 },
  { 462, 6469, 5041, 160, 1264, 25 },
  { 864, 5477, 4863, 37, 2513, 14 },
  { 955, 5477, 4506, 37, 2513, 14 },
  { 1050, 5477, 3519, 37, 2513, 14 },
  { 1149, 5477, 3486, 37, 2513, 14 },
  { 1270, 5477, 2349, 37, 2513, 14 },
  { 1369, 5477, 3450, 37, 2513, 14 },
  { 12, 5477, 2220, 37, 2513, 14 },
  { 119, 5477, 3753, 37, 2513, 14 },
  { 230, 5477, 2560, 37, 2513, 14 },
  { 637, 5477, 3717, 37, 2513, 14 },
  { 721, 5477, 2531, 37, 2513, 14 },
  { 893, 5477, 3840, 37, 2513, 14 },
  { 985, 5477, 2771, 37, 2513, 14 },
  { 1081, 5477, 3804, 37, 2513, 14 },
  { 1180, 5477, 2742, 37, 2513, 14 },
  { 1301, 5477, 3927, 37, 2513, 14 },
  { 45, 5477, 2982, 37, 2513, 14 },
  { 153, 5477, 3891, 37, 2513, 14 },
  { 265, 5477, 2953, 37, 2513, 14 },
  { 673, 5477, 4014, 37, 2513, 14 },
  { 757, 5477, 3256, 37, 2513, 14 },
  { 929, 5477, 3978, 37, 2513, 14 },
  { 1021, 5477, 3227, 37, 2513, 14 },
  { 1117, 5477, 4259, 37, 2513, 14 },
  { 1216, 5477, 4241, 37, 2513, 14 },
  { 1337, 5477, 4778, 37, 2513, 14 },
  { 81, 5477, 4959, 37, 2513, 14 },
  { 189, 5477, 5057, 37, 2513, 14 },
  { 693, 5467, 5057, 37, 1792, 14 },
  { 593, 6412, 8, 187, 722, 40 },
  { 285, 6366, 5098, 187, 722, 40 },
  { 359, 6320, 8, 187, 722, 40 },
  { 415, 6274, 5095, 187, 722, 40 },
  { 477, 6228, 8, 187, 722, 40 },
  { 545, 6182, 5092, 187, 722, 40 },
  { 306, 6136, 8, 187, 722, 40 },
  { 381, 6090, 5089, 187, 722, 40 },
  { 438, 6044, 8, 187, 722, 40 },
  { 501, 5998, 5086, 187, 722, 40 },
  { 569, 5952, 8, 187, 722, 40 },
  { 330, 5906, 5042, 187, 722, 40 },
  { 525, 5860, 5042, 187, 0, 40 },
  { 952, 5502, 4865, 60, 1697, 19 },
  { 1047, 5502, 4493, 60, 1697, 19 },
  { 1146, 5502, 3495, 60, 1697, 19 },
  { 1267, 5502, 3703, 60, 1697, 19 },
  { 1366, 5502, 3790, 60, 1697, 19 },
  { 9, 5502, 3472, 60, 1697, 19 },
  { 116, 5502, 3776, 60, 1697, 19 },
  { 227, 5502, 3762, 60, 1697, 19 },
  { 634, 5502, 3877, 60, 1697, 19 },
  { 717, 5502, 3739, 60, 1697, 19 },
  { 889, 5502, 3863, 60, 1697, 19 },
  { 981, 5502, 3849, 60, 1697, 19 },
  { 1077, 5502, 3964, 60, 1697, 19 },
  { 1176, 5502, 3826, 60, 1697, 19 },
  { 1297, 5502, 3950, 60, 1697, 19 },
  { 41, 5502, 3936, 60, 1697, 19 },
  { 149, 5502, 4051, 60, 1697, 19 },
  { 261, 5502, 3913, 60, 1697, 19 },
  { 669, 5502, 4037, 60, 1697, 19 },
  { 753, 5502, 4023, 60, 1697, 19 },
  { 925, 5502, 4296, 60, 1697, 19 },
  { 1017, 5502, 4000, 60, 1697, 19 },
  { 1113, 5502, 4282, 60, 1697, 19 },
  { 1212, 5502, 4268, 60, 1697, 19 },
  { 1333, 5502, 4796, 60, 1697, 19 },
  { 77, 5502, 5003, 60, 1697, 19 },
  { 185, 5502, 5059, 60, 1697, 19 },
  { 861, 5487, 5059, 60, 1600, 19 },
  { 1044, 5446, 4892, 75, 1489, 25 },
  { 1143, 5446, 4496, 75, 1489, 25 },
  { 1264, 5446, 3502, 75, 1489, 25 },
  { 1363, 5446, 4611, 75, 1489, 25 },
  { 6, 5446, 4310, 75, 1489, 25 },
  { 113, 5446, 4601, 75, 1489, 25 },
  { 224, 5446, 3769, 75, 1489, 25 },
  { 631, 5446, 4631, 75, 1489, 25 },
  { 714, 5446, 4318, 75, 1489, 25 },
  { 885, 5446, 4621, 75, 1489, 25 },
  { 977, 5446, 3856, 75, 1489, 25 },
  { 1073, 5446, 4651, 75, 1489, 25 },
  { 1172, 5446, 4326, 75, 1489, 25 },
  { 1293, 5446, 4641, 75, 1489, 25 },
  { 37, 5446, 3943, 75, 1489, 25 },
  { 145, 5446, 4671, 75, 1489, 25 },
  { 257, 5446, 4334, 75, 1489, 25 },
  { 665, 5446, 4661, 75, 1489, 25 },
  { 749, 5446, 4030, 75, 1489, 25 },
  { 921, 5446, 4691, 75, 1489, 25 },
  { 1013, 5446, 4342, 75, 1489, 25 },
  { 1109, 5446, 4681, 75, 1489, 25 },
  { 1208, 5446, 4101, 75, 1489, 25 },
  { 1329, 5446, 4809, 75, 1489, 25 },
  { 73, 5446, 5013, 75, 1489, 25 },
  { 181, 5446, 5060, 75, 1489, 25 },
  { 949, 5425, 5060, 75, 1264, 25 },
  { 1140, 5397, 4894, 96, 1137, 32 },
  { 1261, 5397, 4502, 96, 1137, 32 },
  { 1360, 5397, 4617, 96, 1137, 32 },
  { 3, 5397, 4899, 96, 1137, 32 },
  { 110, 5397, 4904, 96, 1137, 32 },
  { 221, 5397, 4607, 96, 1137, 32 },
  { 628, 5397, 4637, 96, 1137, 32 },
  { 711, 5397, 4909, 96, 1137, 32 },
  { 882, 5397, 4914, 96, 1137, 32 },
  { 973, 5397, 4627, 96, 1137, 32 },
  { 1069, 5397, 4657, 96, 1137, 32 },
  { 1168, 5397, 4919, 96, 1137, 32 },
  { 1289, 5397, 4924, 96, 1137, 32 },
  { 33, 5397, 4647, 96, 1137, 32 },
  { 141, 5397, 4677, 96, 1137, 32 },
  { 253, 5397, 4929, 96, 1137, 32 },
  { 661, 5397, 4934, 96, 1137, 32 },
  { 745, 5397, 4667, 96, 1137, 32 },
  { 917, 5397, 4697, 96, 1137, 32 },
  { 1009, 5397, 4939, 96, 1137, 32 },
  { 1105, 5397, 4944, 96, 1137, 32 },
  { 1204, 5397, 4687, 96, 1137, 32 },
  { 1325, 5397, 4728, 96, 1137, 32 },
  { 69, 5397, 5020, 96, 1137, 32 },
  { 177, 5397, 5081, 96, 1137, 32 },
  { 1041, 5369, 5081, 96, 1008, 32 },
  { 1258, 5333, 8, 124, 865, 40 },
  { 1357, 5333, 5035, 124, 865, 40 },
  { 0, 5333, 8, 124, 865, 40 },
  { 107, 5333, 5097, 124, 865, 40 },
  { 218, 5333, 8, 124, 865, 40 },
  { 625, 5333, 5033, 124, 865, 40 },
  { 708, 5333, 8, 124, 865, 40 },
  { 879, 5333, 5094, 124, 865, 40 },
  { 970, 5333, 8, 124, 865, 40 },
  { 1065, 5333, 5031, 124, 865, 40 },
  { 1164, 5333, 8, 124, 865, 40 },
  { 1285, 5333, 5091, 124, 865, 40 },
  { 29, 5333, 8, 124, 865, 40 },
  { 137, 5333, 5029, 124, 865, 40 },
  { 249, 5333, 8, 124, 865, 40 },
  { 657, 5333, 5088, 124, 865, 40 },
  { 741, 5333, 8, 124, 865, 40 },
  { 913, 5333, 5027, 124, 865, 40 },
  { 1005, 5333, 8, 124, 865, 40 },
  { 1101, 5333, 5085, 124, 865, 40 },
  { 1200, 5333, 8, 124, 865, 40 },
  { 1321, 5333, 5025, 124, 865, 40 },
  { 65, 5333, 8, 124, 865, 40 },
  { 173, 5333, 5082, 124, 865, 40 },
  { 1137, 5297, 5082, 124, 0, 40 },
};

extern const MCPhysReg RISCVRegUnitRoots[][2] = {
  { RISCV::FFLAGS },
  { RISCV::FRM },
  { RISCV::VL },
  { RISCV::VLENB },
  { RISCV::VTYPE },
  { RISCV::VXRM },
  { RISCV::VXSAT },
  { RISCV::V0 },
  { RISCV::V1 },
  { RISCV::V2 },
  { RISCV::V3 },
  { RISCV::V4 },
  { RISCV::V5 },
  { RISCV::V6 },
  { RISCV::V7 },
  { RISCV::V8 },
  { RISCV::V9 },
  { RISCV::V10 },
  { RISCV::V11 },
  { RISCV::V12 },
  { RISCV::V13 },
  { RISCV::V14 },
  { RISCV::V15 },
  { RISCV::V16 },
  { RISCV::V17 },
  { RISCV::V18 },
  { RISCV::V19 },
  { RISCV::V20 },
  { RISCV::V21 },
  { RISCV::V22 },
  { RISCV::V23 },
  { RISCV::V24 },
  { RISCV::V25 },
  { RISCV::V26 },
  { RISCV::V27 },
  { RISCV::V28 },
  { RISCV::V29 },
  { RISCV::V30 },
  { RISCV::V31 },
  { RISCV::X0 },
  { RISCV::X1 },
  { RISCV::X2 },
  { RISCV::X3 },
  { RISCV::X4 },
  { RISCV::X5 },
  { RISCV::X6 },
  { RISCV::X7 },
  { RISCV::X8 },
  { RISCV::X9 },
  { RISCV::X10 },
  { RISCV::X11 },
  { RISCV::X12 },
  { RISCV::X13 },
  { RISCV::X14 },
  { RISCV::X15 },
  { RISCV::X16 },
  { RISCV::X17 },
  { RISCV::X18 },
  { RISCV::X19 },
  { RISCV::X20 },
  { RISCV::X21 },
  { RISCV::X22 },
  { RISCV::X23 },
  { RISCV::X24 },
  { RISCV::X25 },
  { RISCV::X26 },
  { RISCV::X27 },
  { RISCV::X28 },
  { RISCV::X29 },
  { RISCV::X30 },
  { RISCV::X31 },
  { RISCV::F0_H },
  { RISCV::F1_H },
  { RISCV::F2_H },
  { RISCV::F3_H },
  { RISCV::F4_H },
  { RISCV::F5_H },
  { RISCV::F6_H },
  { RISCV::F7_H },
  { RISCV::F8_H },
  { RISCV::F9_H },
  { RISCV::F10_H },
  { RISCV::F11_H },
  { RISCV::F12_H },
  { RISCV::F13_H },
  { RISCV::F14_H },
  { RISCV::F15_H },
  { RISCV::F16_H },
  { RISCV::F17_H },
  { RISCV::F18_H },
  { RISCV::F19_H },
  { RISCV::F20_H },
  { RISCV::F21_H },
  { RISCV::F22_H },
  { RISCV::F23_H },
  { RISCV::F24_H },
  { RISCV::F25_H },
  { RISCV::F26_H },
  { RISCV::F27_H },
  { RISCV::F28_H },
  { RISCV::F29_H },
  { RISCV::F30_H },
  { RISCV::F31_H },
};

namespace {     // Register classes...
  // FPR16 Register Class...
  const MCPhysReg FPR16[] = {
    RISCV::F0_H, RISCV::F1_H, RISCV::F2_H, RISCV::F3_H, RISCV::F4_H, RISCV::F5_H, RISCV::F6_H, RISCV::F7_H, RISCV::F10_H, RISCV::F11_H, RISCV::F12_H, RISCV::F13_H, RISCV::F14_H, RISCV::F15_H, RISCV::F16_H, RISCV::F17_H, RISCV::F28_H, RISCV::F29_H, RISCV::F30_H, RISCV::F31_H, RISCV::F8_H, RISCV::F9_H, RISCV::F18_H, RISCV::F19_H, RISCV::F20_H, RISCV::F21_H, RISCV::F22_H, RISCV::F23_H, RISCV::F24_H, RISCV::F25_H, RISCV::F26_H, RISCV::F27_H, 
  };

  // FPR16 Bit set.
  const uint8_t FPR16Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // AnyReg Register Class...
  const MCPhysReg AnyReg[] = {
    RISCV::X0, RISCV::X1, RISCV::X2, RISCV::X3, RISCV::X4, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X8, RISCV::X9, RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::F0_D, RISCV::F1_D, RISCV::F2_D, RISCV::F3_D, RISCV::F4_D, RISCV::F5_D, RISCV::F6_D, RISCV::F7_D, RISCV::F8_D, RISCV::F9_D, RISCV::F10_D, RISCV::F11_D, RISCV::F12_D, RISCV::F13_D, RISCV::F14_D, RISCV::F15_D, RISCV::F16_D, RISCV::F17_D, RISCV::F18_D, RISCV::F19_D, RISCV::F20_D, RISCV::F21_D, RISCV::F22_D, RISCV::F23_D, RISCV::F24_D, RISCV::F25_D, RISCV::F26_D, RISCV::F27_D, RISCV::F28_D, RISCV::F29_D, RISCV::F30_D, RISCV::F31_D, RISCV::V0, RISCV::V1, RISCV::V2, RISCV::V3, RISCV::V4, RISCV::V5, RISCV::V6, RISCV::V7, RISCV::V8, RISCV::V9, RISCV::V10, RISCV::V11, RISCV::V12, RISCV::V13, RISCV::V14, RISCV::V15, RISCV::V16, RISCV::V17, RISCV::V18, RISCV::V19, RISCV::V20, RISCV::V21, RISCV::V22, RISCV::V23, RISCV::V24, RISCV::V25, RISCV::V26, RISCV::V27, RISCV::V28, RISCV::V29, RISCV::V30, RISCV::V31, 
  };

  // AnyReg Bit set.
  const uint8_t AnyRegBits[] = {
    0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
  };

  // AnyReg_with_sub_16 Register Class...
  const MCPhysReg AnyReg_with_sub_16[] = {
    RISCV::F0_D, RISCV::F1_D, RISCV::F2_D, RISCV::F3_D, RISCV::F4_D, RISCV::F5_D, RISCV::F6_D, RISCV::F7_D, RISCV::F8_D, RISCV::F9_D, RISCV::F10_D, RISCV::F11_D, RISCV::F12_D, RISCV::F13_D, RISCV::F14_D, RISCV::F15_D, RISCV::F16_D, RISCV::F17_D, RISCV::F18_D, RISCV::F19_D, RISCV::F20_D, RISCV::F21_D, RISCV::F22_D, RISCV::F23_D, RISCV::F24_D, RISCV::F25_D, RISCV::F26_D, RISCV::F27_D, RISCV::F28_D, RISCV::F29_D, RISCV::F30_D, RISCV::F31_D, 
  };

  // AnyReg_with_sub_16 Bit set.
  const uint8_t AnyReg_with_sub_16Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // FPR32 Register Class...
  const MCPhysReg FPR32[] = {
    RISCV::F0_F, RISCV::F1_F, RISCV::F2_F, RISCV::F3_F, RISCV::F4_F, RISCV::F5_F, RISCV::F6_F, RISCV::F7_F, RISCV::F10_F, RISCV::F11_F, RISCV::F12_F, RISCV::F13_F, RISCV::F14_F, RISCV::F15_F, RISCV::F16_F, RISCV::F17_F, RISCV::F28_F, RISCV::F29_F, RISCV::F30_F, RISCV::F31_F, RISCV::F8_F, RISCV::F9_F, RISCV::F18_F, RISCV::F19_F, RISCV::F20_F, RISCV::F21_F, RISCV::F22_F, RISCV::F23_F, RISCV::F24_F, RISCV::F25_F, RISCV::F26_F, RISCV::F27_F, 
  };

  // FPR32 Bit set.
  const uint8_t FPR32Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // GPR Register Class...
  const MCPhysReg GPR[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X0, RISCV::X1, RISCV::X2, RISCV::X3, RISCV::X4, 
  };

  // GPR Bit set.
  const uint8_t GPRBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // GPRF16 Register Class...
  const MCPhysReg GPRF16[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X0, RISCV::X1, RISCV::X2, RISCV::X3, RISCV::X4, 
  };

  // GPRF16 Bit set.
  const uint8_t GPRF16Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // GPRF32 Register Class...
  const MCPhysReg GPRF32[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X0, RISCV::X1, RISCV::X2, RISCV::X3, RISCV::X4, 
  };

  // GPRF32 Bit set.
  const uint8_t GPRF32Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // GPRF64 Register Class...
  const MCPhysReg GPRF64[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X0, RISCV::X1, RISCV::X2, RISCV::X3, RISCV::X4, 
  };

  // GPRF64 Bit set.
  const uint8_t GPRF64Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // GPRNoX0 Register Class...
  const MCPhysReg GPRNoX0[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X1, RISCV::X2, RISCV::X3, RISCV::X4, 
  };

  // GPRNoX0 Bit set.
  const uint8_t GPRNoX0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0xff, 
  };

  // GPRNoX0X2 Register Class...
  const MCPhysReg GPRNoX0X2[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X1, RISCV::X3, RISCV::X4, 
  };

  // GPRNoX0X2 Bit set.
  const uint8_t GPRNoX0X2Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xfa, 0xff, 0xff, 0xff, 
  };

  // GPRJALR Register Class...
  const MCPhysReg GPRJALR[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, 
  };

  // GPRJALR Bit set.
  const uint8_t GPRJALRBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 
  };

  // GPRTC Register Class...
  const MCPhysReg GPRTC[] = {
    RISCV::X6, RISCV::X7, RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, 
  };

  // GPRTC Bit set.
  const uint8_t GPRTCBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xfc, 0x03, 0xf0, 
  };

  // AnyReg_with_sub_16_with_sub_32_in_FPR32C Register Class...
  const MCPhysReg AnyReg_with_sub_16_with_sub_32_in_FPR32C[] = {
    RISCV::F8_D, RISCV::F9_D, RISCV::F10_D, RISCV::F11_D, RISCV::F12_D, RISCV::F13_D, RISCV::F14_D, RISCV::F15_D, 
  };

  // AnyReg_with_sub_16_with_sub_32_in_FPR32C Bit set.
  const uint8_t AnyReg_with_sub_16_with_sub_32_in_FPR32CBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 
  };

  // FPR32C Register Class...
  const MCPhysReg FPR32C[] = {
    RISCV::F10_F, RISCV::F11_F, RISCV::F12_F, RISCV::F13_F, RISCV::F14_F, RISCV::F15_F, RISCV::F8_F, RISCV::F9_F, 
  };

  // FPR32C Bit set.
  const uint8_t FPR32CBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 
  };

  // GPRC Register Class...
  const MCPhysReg GPRC[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X8, RISCV::X9, 
  };

  // GPRC Bit set.
  const uint8_t GPRCBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 
  };

  // GPRC_and_GPRTC Register Class...
  const MCPhysReg GPRC_and_GPRTC[] = {
    RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, 
  };

  // GPRC_and_GPRTC Bit set.
  const uint8_t GPRC_and_GPRTCBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 
  };

  // VCSR Register Class...
  const MCPhysReg VCSR[] = {
    RISCV::VTYPE, RISCV::VL, RISCV::VLENB, 
  };

  // VCSR Bit set.
  const uint8_t VCSRBits[] = {
    0x38, 
  };

  // GPRX0 Register Class...
  const MCPhysReg GPRX0[] = {
    RISCV::X0, 
  };

  // GPRX0 Bit set.
  const uint8_t GPRX0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
  };

  // SP Register Class...
  const MCPhysReg SP[] = {
    RISCV::X2, 
  };

  // SP Bit set.
  const uint8_t SPBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 
  };

  // FPR64 Register Class...
  const MCPhysReg FPR64[] = {
    RISCV::F0_D, RISCV::F1_D, RISCV::F2_D, RISCV::F3_D, RISCV::F4_D, RISCV::F5_D, RISCV::F6_D, RISCV::F7_D, RISCV::F10_D, RISCV::F11_D, RISCV::F12_D, RISCV::F13_D, RISCV::F14_D, RISCV::F15_D, RISCV::F16_D, RISCV::F17_D, RISCV::F28_D, RISCV::F29_D, RISCV::F30_D, RISCV::F31_D, RISCV::F8_D, RISCV::F9_D, RISCV::F18_D, RISCV::F19_D, RISCV::F20_D, RISCV::F21_D, RISCV::F22_D, RISCV::F23_D, RISCV::F24_D, RISCV::F25_D, RISCV::F26_D, RISCV::F27_D, 
  };

  // FPR64 Bit set.
  const uint8_t FPR64Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // VM Register Class...
  const MCPhysReg VM[] = {
    RISCV::V8, RISCV::V9, RISCV::V10, RISCV::V11, RISCV::V12, RISCV::V13, RISCV::V14, RISCV::V15, RISCV::V16, RISCV::V17, RISCV::V18, RISCV::V19, RISCV::V20, RISCV::V21, RISCV::V22, RISCV::V23, RISCV::V24, RISCV::V25, RISCV::V26, RISCV::V27, RISCV::V28, RISCV::V29, RISCV::V30, RISCV::V31, RISCV::V0, RISCV::V1, RISCV::V2, RISCV::V3, RISCV::V4, RISCV::V5, RISCV::V6, RISCV::V7, 
  };

  // VM Bit set.
  const uint8_t VMBits[] = {
    0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // VR Register Class...
  const MCPhysReg VR[] = {
    RISCV::V8, RISCV::V9, RISCV::V10, RISCV::V11, RISCV::V12, RISCV::V13, RISCV::V14, RISCV::V15, RISCV::V16, RISCV::V17, RISCV::V18, RISCV::V19, RISCV::V20, RISCV::V21, RISCV::V22, RISCV::V23, RISCV::V24, RISCV::V25, RISCV::V26, RISCV::V27, RISCV::V28, RISCV::V29, RISCV::V30, RISCV::V31, RISCV::V0, RISCV::V1, RISCV::V2, RISCV::V3, RISCV::V4, RISCV::V5, RISCV::V6, RISCV::V7, 
  };

  // VR Bit set.
  const uint8_t VRBits[] = {
    0x00, 0xff, 0xff, 0xff, 0xff, 
  };

  // VRNoV0 Register Class...
  const MCPhysReg VRNoV0[] = {
    RISCV::V8, RISCV::V9, RISCV::V10, RISCV::V11, RISCV::V12, RISCV::V13, RISCV::V14, RISCV::V15, RISCV::V16, RISCV::V17, RISCV::V18, RISCV::V19, RISCV::V20, RISCV::V21, RISCV::V22, RISCV::V23, RISCV::V24, RISCV::V25, RISCV::V26, RISCV::V27, RISCV::V28, RISCV::V29, RISCV::V30, RISCV::V31, RISCV::V1, RISCV::V2, RISCV::V3, RISCV::V4, RISCV::V5, RISCV::V6, RISCV::V7, 
  };

  // VRNoV0 Bit set.
  const uint8_t VRNoV0Bits[] = {
    0x00, 0xfe, 0xff, 0xff, 0xff, 
  };

  // GPRPF64 Register Class...
  const MCPhysReg GPRPF64[] = {
    RISCV::X10_PD, RISCV::X12_PD, RISCV::X14_PD, RISCV::X16_PD, RISCV::X6_PD, RISCV::X28_PD, RISCV::X30_PD, RISCV::X8_PD, RISCV::X18_PD, RISCV::X20_PD, RISCV::X22_PD, RISCV::X24_PD, RISCV::X26_PD, RISCV::X0_PD, RISCV::X2_PD, RISCV::X4_PD, 
  };

  // GPRPF64 Bit set.
  const uint8_t GPRPF64Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 
  };

  // GPRPF64_with_sub_32_in_GPRNoX0 Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_GPRNoX0[] = {
    RISCV::X10_PD, RISCV::X12_PD, RISCV::X14_PD, RISCV::X16_PD, RISCV::X6_PD, RISCV::X28_PD, RISCV::X30_PD, RISCV::X8_PD, RISCV::X18_PD, RISCV::X20_PD, RISCV::X22_PD, RISCV::X24_PD, RISCV::X26_PD, RISCV::X2_PD, RISCV::X4_PD, 
  };

  // GPRPF64_with_sub_32_in_GPRNoX0 Bit set.
  const uint8_t GPRPF64_with_sub_32_in_GPRNoX0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 
  };

  // GPRPF64_with_sub_32_in_GPRNoX0X2 Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_GPRNoX0X2[] = {
    RISCV::X10_PD, RISCV::X12_PD, RISCV::X14_PD, RISCV::X16_PD, RISCV::X6_PD, RISCV::X28_PD, RISCV::X30_PD, RISCV::X8_PD, RISCV::X18_PD, RISCV::X20_PD, RISCV::X22_PD, RISCV::X24_PD, RISCV::X26_PD, RISCV::X4_PD, 
  };

  // GPRPF64_with_sub_32_in_GPRNoX0X2 Bit set.
  const uint8_t GPRPF64_with_sub_32_in_GPRNoX0X2Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 
  };

  // GPRPF64_with_sub_32_in_GPRJALR Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_GPRJALR[] = {
    RISCV::X10_PD, RISCV::X12_PD, RISCV::X14_PD, RISCV::X16_PD, RISCV::X6_PD, RISCV::X28_PD, RISCV::X30_PD, RISCV::X8_PD, RISCV::X18_PD, RISCV::X20_PD, RISCV::X22_PD, RISCV::X24_PD, RISCV::X26_PD, 
  };

  // GPRPF64_with_sub_32_in_GPRJALR Bit set.
  const uint8_t GPRPF64_with_sub_32_in_GPRJALRBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 
  };

  // FPR64C Register Class...
  const MCPhysReg FPR64C[] = {
    RISCV::F10_D, RISCV::F11_D, RISCV::F12_D, RISCV::F13_D, RISCV::F14_D, RISCV::F15_D, RISCV::F8_D, RISCV::F9_D, 
  };

  // FPR64C Bit set.
  const uint8_t FPR64CBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 
  };

  // GPRPF64_with_sub_32_in_GPRTC Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_GPRTC[] = {
    RISCV::X10_PD, RISCV::X12_PD, RISCV::X14_PD, RISCV::X16_PD, RISCV::X6_PD, RISCV::X28_PD, RISCV::X30_PD, 
  };

  // GPRPF64_with_sub_32_in_GPRTC Bit set.
  const uint8_t GPRPF64_with_sub_32_in_GPRTCBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0xc1, 
  };

  // GPRPF64_with_sub_32_in_GPRC Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_GPRC[] = {
    RISCV::X10_PD, RISCV::X12_PD, RISCV::X14_PD, RISCV::X8_PD, 
  };

  // GPRPF64_with_sub_32_in_GPRC Bit set.
  const uint8_t GPRPF64_with_sub_32_in_GPRCBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 
  };

  // GPRPF64_with_sub_32_in_GPRC_and_GPRTC Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_GPRC_and_GPRTC[] = {
    RISCV::X10_PD, RISCV::X12_PD, RISCV::X14_PD, 
  };

  // GPRPF64_with_sub_32_in_GPRC_and_GPRTC Bit set.
  const uint8_t GPRPF64_with_sub_32_in_GPRC_and_GPRTCBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 
  };

  // GPRPF64_with_sub_32_in_GPRX0 Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_GPRX0[] = {
    RISCV::X0_PD, 
  };

  // GPRPF64_with_sub_32_in_GPRX0 Bit set.
  const uint8_t GPRPF64_with_sub_32_in_GPRX0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
  };

  // GPRPF64_with_sub_32_in_SP Register Class...
  const MCPhysReg GPRPF64_with_sub_32_in_SP[] = {
    RISCV::X2_PD, 
  };

  // GPRPF64_with_sub_32_in_SP Bit set.
  const uint8_t GPRPF64_with_sub_32_in_SPBits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 
  };

  // VMV0 Register Class...
  const MCPhysReg VMV0[] = {
    RISCV::V0, 
  };

  // VMV0 Bit set.
  const uint8_t VMV0Bits[] = {
    0x00, 0x01, 
  };

  // VRN2M1 Register Class...
  const MCPhysReg VRN2M1[] = {
    RISCV::V8_V9, RISCV::V9_V10, RISCV::V10_V11, RISCV::V11_V12, RISCV::V12_V13, RISCV::V13_V14, RISCV::V14_V15, RISCV::V15_V16, RISCV::V16_V17, RISCV::V17_V18, RISCV::V18_V19, RISCV::V19_V20, RISCV::V20_V21, RISCV::V21_V22, RISCV::V22_V23, RISCV::V23_V24, RISCV::V24_V25, RISCV::V25_V26, RISCV::V26_V27, RISCV::V27_V28, RISCV::V28_V29, RISCV::V29_V30, RISCV::V30_V31, RISCV::V1_V2, RISCV::V2_V3, RISCV::V3_V4, RISCV::V4_V5, RISCV::V5_V6, RISCV::V6_V7, RISCV::V7_V8, RISCV::V0_V1, 
  };

  // VRN2M1 Bit set.
  const uint8_t VRN2M1Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07, 
  };

  // VRN2M1NoV0 Register Class...
  const MCPhysReg VRN2M1NoV0[] = {
    RISCV::V8_V9, RISCV::V9_V10, RISCV::V10_V11, RISCV::V11_V12, RISCV::V12_V13, RISCV::V13_V14, RISCV::V14_V15, RISCV::V15_V16, RISCV::V16_V17, RISCV::V17_V18, RISCV::V18_V19, RISCV::V19_V20, RISCV::V20_V21, RISCV::V21_V22, RISCV::V22_V23, RISCV::V23_V24, RISCV::V24_V25, RISCV::V25_V26, RISCV::V26_V27, RISCV::V27_V28, RISCV::V28_V29, RISCV::V29_V30, RISCV::V30_V31, RISCV::V1_V2, RISCV::V2_V3, RISCV::V3_V4, RISCV::V4_V5, RISCV::V5_V6, RISCV::V6_V7, RISCV::V7_V8, 
  };

  // VRN2M1NoV0 Bit set.
  const uint8_t VRN2M1NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x03, 
  };

  // VRM2 Register Class...
  const MCPhysReg VRM2[] = {
    RISCV::V8M2, RISCV::V10M2, RISCV::V12M2, RISCV::V14M2, RISCV::V16M2, RISCV::V18M2, RISCV::V20M2, RISCV::V22M2, RISCV::V24M2, RISCV::V26M2, RISCV::V28M2, RISCV::V30M2, RISCV::V0M2, RISCV::V2M2, RISCV::V4M2, RISCV::V6M2, 
  };

  // VRM2 Bit set.
  const uint8_t VRM2Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd9, 0x6c, 0x36, 0x0b, 
  };

  // VRM2NoV0 Register Class...
  const MCPhysReg VRM2NoV0[] = {
    RISCV::V8M2, RISCV::V10M2, RISCV::V12M2, RISCV::V14M2, RISCV::V16M2, RISCV::V18M2, RISCV::V20M2, RISCV::V22M2, RISCV::V24M2, RISCV::V26M2, RISCV::V28M2, RISCV::V30M2, RISCV::V2M2, RISCV::V4M2, RISCV::V6M2, 
  };

  // VRM2NoV0 Bit set.
  const uint8_t VRM2NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd8, 0x6c, 0x36, 0x0b, 
  };

  // VRM2_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRM2_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0M2, 
  };

  // VRM2_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRM2_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
  };

  // VRN2M1_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN2M1_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0_V1, 
  };

  // VRN2M1_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN2M1_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 
  };

  // VRN3M1 Register Class...
  const MCPhysReg VRN3M1[] = {
    RISCV::V8_V9_V10, RISCV::V9_V10_V11, RISCV::V10_V11_V12, RISCV::V11_V12_V13, RISCV::V12_V13_V14, RISCV::V13_V14_V15, RISCV::V14_V15_V16, RISCV::V15_V16_V17, RISCV::V16_V17_V18, RISCV::V17_V18_V19, RISCV::V18_V19_V20, RISCV::V19_V20_V21, RISCV::V20_V21_V22, RISCV::V21_V22_V23, RISCV::V22_V23_V24, RISCV::V23_V24_V25, RISCV::V24_V25_V26, RISCV::V25_V26_V27, RISCV::V26_V27_V28, RISCV::V27_V28_V29, RISCV::V28_V29_V30, RISCV::V29_V30_V31, RISCV::V1_V2_V3, RISCV::V2_V3_V4, RISCV::V3_V4_V5, RISCV::V4_V5_V6, RISCV::V5_V6_V7, RISCV::V6_V7_V8, RISCV::V7_V8_V9, RISCV::V0_V1_V2, 
  };

  // VRN3M1 Bit set.
  const uint8_t VRN3M1Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x7f, 
  };

  // VRN3M1NoV0 Register Class...
  const MCPhysReg VRN3M1NoV0[] = {
    RISCV::V8_V9_V10, RISCV::V9_V10_V11, RISCV::V10_V11_V12, RISCV::V11_V12_V13, RISCV::V12_V13_V14, RISCV::V13_V14_V15, RISCV::V14_V15_V16, RISCV::V15_V16_V17, RISCV::V16_V17_V18, RISCV::V17_V18_V19, RISCV::V18_V19_V20, RISCV::V19_V20_V21, RISCV::V20_V21_V22, RISCV::V21_V22_V23, RISCV::V22_V23_V24, RISCV::V23_V24_V25, RISCV::V24_V25_V26, RISCV::V25_V26_V27, RISCV::V26_V27_V28, RISCV::V27_V28_V29, RISCV::V28_V29_V30, RISCV::V29_V30_V31, RISCV::V1_V2_V3, RISCV::V2_V3_V4, RISCV::V3_V4_V5, RISCV::V4_V5_V6, RISCV::V5_V6_V7, RISCV::V6_V7_V8, RISCV::V7_V8_V9, 
  };

  // VRN3M1NoV0 Bit set.
  const uint8_t VRN3M1NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0xff, 0x3f, 
  };

  // VRN3M1_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN3M1_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0_V1_V2, 
  };

  // VRN3M1_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN3M1_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 
  };

  // VRN4M1 Register Class...
  const MCPhysReg VRN4M1[] = {
    RISCV::V8_V9_V10_V11, RISCV::V9_V10_V11_V12, RISCV::V10_V11_V12_V13, RISCV::V11_V12_V13_V14, RISCV::V12_V13_V14_V15, RISCV::V13_V14_V15_V16, RISCV::V14_V15_V16_V17, RISCV::V15_V16_V17_V18, RISCV::V16_V17_V18_V19, RISCV::V17_V18_V19_V20, RISCV::V18_V19_V20_V21, RISCV::V19_V20_V21_V22, RISCV::V20_V21_V22_V23, RISCV::V21_V22_V23_V24, RISCV::V22_V23_V24_V25, RISCV::V23_V24_V25_V26, RISCV::V24_V25_V26_V27, RISCV::V25_V26_V27_V28, RISCV::V26_V27_V28_V29, RISCV::V27_V28_V29_V30, RISCV::V28_V29_V30_V31, RISCV::V1_V2_V3_V4, RISCV::V2_V3_V4_V5, RISCV::V3_V4_V5_V6, RISCV::V4_V5_V6_V7, RISCV::V5_V6_V7_V8, RISCV::V6_V7_V8_V9, RISCV::V7_V8_V9_V10, RISCV::V0_V1_V2_V3, 
  };

  // VRN4M1 Bit set.
  const uint8_t VRN4M1Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x03, 
  };

  // VRN4M1NoV0 Register Class...
  const MCPhysReg VRN4M1NoV0[] = {
    RISCV::V8_V9_V10_V11, RISCV::V9_V10_V11_V12, RISCV::V10_V11_V12_V13, RISCV::V11_V12_V13_V14, RISCV::V12_V13_V14_V15, RISCV::V13_V14_V15_V16, RISCV::V14_V15_V16_V17, RISCV::V15_V16_V17_V18, RISCV::V16_V17_V18_V19, RISCV::V17_V18_V19_V20, RISCV::V18_V19_V20_V21, RISCV::V19_V20_V21_V22, RISCV::V20_V21_V22_V23, RISCV::V21_V22_V23_V24, RISCV::V22_V23_V24_V25, RISCV::V23_V24_V25_V26, RISCV::V24_V25_V26_V27, RISCV::V25_V26_V27_V28, RISCV::V26_V27_V28_V29, RISCV::V27_V28_V29_V30, RISCV::V28_V29_V30_V31, RISCV::V1_V2_V3_V4, RISCV::V2_V3_V4_V5, RISCV::V3_V4_V5_V6, RISCV::V4_V5_V6_V7, RISCV::V5_V6_V7_V8, RISCV::V6_V7_V8_V9, RISCV::V7_V8_V9_V10, 
  };

  // VRN4M1NoV0 Bit set.
  const uint8_t VRN4M1NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x01, 
  };

  // VRN2M2 Register Class...
  const MCPhysReg VRN2M2[] = {
    RISCV::V8M2_V10M2, RISCV::V10M2_V12M2, RISCV::V12M2_V14M2, RISCV::V14M2_V16M2, RISCV::V16M2_V18M2, RISCV::V18M2_V20M2, RISCV::V20M2_V22M2, RISCV::V22M2_V24M2, RISCV::V24M2_V26M2, RISCV::V26M2_V28M2, RISCV::V28M2_V30M2, RISCV::V2M2_V4M2, RISCV::V4M2_V6M2, RISCV::V6M2_V8M2, RISCV::V0M2_V2M2, 
  };

  // VRN2M2 Bit set.
  const uint8_t VRN2M2Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 
  };

  // VRN2M2NoV0 Register Class...
  const MCPhysReg VRN2M2NoV0[] = {
    RISCV::V8M2_V10M2, RISCV::V10M2_V12M2, RISCV::V12M2_V14M2, RISCV::V14M2_V16M2, RISCV::V16M2_V18M2, RISCV::V18M2_V20M2, RISCV::V20M2_V22M2, RISCV::V22M2_V24M2, RISCV::V24M2_V26M2, RISCV::V26M2_V28M2, RISCV::V28M2_V30M2, RISCV::V2M2_V4M2, RISCV::V4M2_V6M2, RISCV::V6M2_V8M2, 
  };

  // VRN2M2NoV0 Bit set.
  const uint8_t VRN2M2NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 
  };

  // VRM4 Register Class...
  const MCPhysReg VRM4[] = {
    RISCV::V8M4, RISCV::V12M4, RISCV::V16M4, RISCV::V20M4, RISCV::V24M4, RISCV::V28M4, RISCV::V0M4, RISCV::V4M4, 
  };

  // VRM4 Bit set.
  const uint8_t VRM4Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x91, 0x48, 0x04, 
  };

  // VRM4NoV0 Register Class...
  const MCPhysReg VRM4NoV0[] = {
    RISCV::V8M4, RISCV::V12M4, RISCV::V16M4, RISCV::V20M4, RISCV::V24M4, RISCV::V28M4, RISCV::V4M4, 
  };

  // VRM4NoV0 Bit set.
  const uint8_t VRM4NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x91, 0x48, 0x04, 
  };

  // VRM4_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRM4_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0M4, 
  };

  // VRM4_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRM4_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 
  };

  // VRN2M2_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN2M2_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0M2_V2M2, 
  };

  // VRN2M2_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN2M2_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 
  };

  // VRN4M1_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN4M1_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0_V1_V2_V3, 
  };

  // VRN4M1_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN4M1_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 
  };

  // VRN5M1 Register Class...
  const MCPhysReg VRN5M1[] = {
    RISCV::V8_V9_V10_V11_V12, RISCV::V9_V10_V11_V12_V13, RISCV::V10_V11_V12_V13_V14, RISCV::V11_V12_V13_V14_V15, RISCV::V12_V13_V14_V15_V16, RISCV::V13_V14_V15_V16_V17, RISCV::V14_V15_V16_V17_V18, RISCV::V15_V16_V17_V18_V19, RISCV::V16_V17_V18_V19_V20, RISCV::V17_V18_V19_V20_V21, RISCV::V18_V19_V20_V21_V22, RISCV::V19_V20_V21_V22_V23, RISCV::V20_V21_V22_V23_V24, RISCV::V21_V22_V23_V24_V25, RISCV::V22_V23_V24_V25_V26, RISCV::V23_V24_V25_V26_V27, RISCV::V24_V25_V26_V27_V28, RISCV::V25_V26_V27_V28_V29, RISCV::V26_V27_V28_V29_V30, RISCV::V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5, RISCV::V2_V3_V4_V5_V6, RISCV::V3_V4_V5_V6_V7, RISCV::V4_V5_V6_V7_V8, RISCV::V5_V6_V7_V8_V9, RISCV::V6_V7_V8_V9_V10, RISCV::V7_V8_V9_V10_V11, RISCV::V0_V1_V2_V3_V4, 
  };

  // VRN5M1 Bit set.
  const uint8_t VRN5M1Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x07, 
  };

  // VRN5M1NoV0 Register Class...
  const MCPhysReg VRN5M1NoV0[] = {
    RISCV::V8_V9_V10_V11_V12, RISCV::V9_V10_V11_V12_V13, RISCV::V10_V11_V12_V13_V14, RISCV::V11_V12_V13_V14_V15, RISCV::V12_V13_V14_V15_V16, RISCV::V13_V14_V15_V16_V17, RISCV::V14_V15_V16_V17_V18, RISCV::V15_V16_V17_V18_V19, RISCV::V16_V17_V18_V19_V20, RISCV::V17_V18_V19_V20_V21, RISCV::V18_V19_V20_V21_V22, RISCV::V19_V20_V21_V22_V23, RISCV::V20_V21_V22_V23_V24, RISCV::V21_V22_V23_V24_V25, RISCV::V22_V23_V24_V25_V26, RISCV::V23_V24_V25_V26_V27, RISCV::V24_V25_V26_V27_V28, RISCV::V25_V26_V27_V28_V29, RISCV::V26_V27_V28_V29_V30, RISCV::V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5, RISCV::V2_V3_V4_V5_V6, RISCV::V3_V4_V5_V6_V7, RISCV::V4_V5_V6_V7_V8, RISCV::V5_V6_V7_V8_V9, RISCV::V6_V7_V8_V9_V10, RISCV::V7_V8_V9_V10_V11, 
  };

  // VRN5M1NoV0 Bit set.
  const uint8_t VRN5M1NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x03, 
  };

  // VRN5M1_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN5M1_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0_V1_V2_V3_V4, 
  };

  // VRN5M1_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN5M1_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 
  };

  // VRN6M1 Register Class...
  const MCPhysReg VRN6M1[] = {
    RISCV::V8_V9_V10_V11_V12_V13, RISCV::V9_V10_V11_V12_V13_V14, RISCV::V10_V11_V12_V13_V14_V15, RISCV::V11_V12_V13_V14_V15_V16, RISCV::V12_V13_V14_V15_V16_V17, RISCV::V13_V14_V15_V16_V17_V18, RISCV::V14_V15_V16_V17_V18_V19, RISCV::V15_V16_V17_V18_V19_V20, RISCV::V16_V17_V18_V19_V20_V21, RISCV::V17_V18_V19_V20_V21_V22, RISCV::V18_V19_V20_V21_V22_V23, RISCV::V19_V20_V21_V22_V23_V24, RISCV::V20_V21_V22_V23_V24_V25, RISCV::V21_V22_V23_V24_V25_V26, RISCV::V22_V23_V24_V25_V26_V27, RISCV::V23_V24_V25_V26_V27_V28, RISCV::V24_V25_V26_V27_V28_V29, RISCV::V25_V26_V27_V28_V29_V30, RISCV::V26_V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5_V6, RISCV::V2_V3_V4_V5_V6_V7, RISCV::V3_V4_V5_V6_V7_V8, RISCV::V4_V5_V6_V7_V8_V9, RISCV::V5_V6_V7_V8_V9_V10, RISCV::V6_V7_V8_V9_V10_V11, RISCV::V7_V8_V9_V10_V11_V12, RISCV::V0_V1_V2_V3_V4_V5, 
  };

  // VRN6M1 Bit set.
  const uint8_t VRN6M1Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x3f, 
  };

  // VRN6M1NoV0 Register Class...
  const MCPhysReg VRN6M1NoV0[] = {
    RISCV::V8_V9_V10_V11_V12_V13, RISCV::V9_V10_V11_V12_V13_V14, RISCV::V10_V11_V12_V13_V14_V15, RISCV::V11_V12_V13_V14_V15_V16, RISCV::V12_V13_V14_V15_V16_V17, RISCV::V13_V14_V15_V16_V17_V18, RISCV::V14_V15_V16_V17_V18_V19, RISCV::V15_V16_V17_V18_V19_V20, RISCV::V16_V17_V18_V19_V20_V21, RISCV::V17_V18_V19_V20_V21_V22, RISCV::V18_V19_V20_V21_V22_V23, RISCV::V19_V20_V21_V22_V23_V24, RISCV::V20_V21_V22_V23_V24_V25, RISCV::V21_V22_V23_V24_V25_V26, RISCV::V22_V23_V24_V25_V26_V27, RISCV::V23_V24_V25_V26_V27_V28, RISCV::V24_V25_V26_V27_V28_V29, RISCV::V25_V26_V27_V28_V29_V30, RISCV::V26_V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5_V6, RISCV::V2_V3_V4_V5_V6_V7, RISCV::V3_V4_V5_V6_V7_V8, RISCV::V4_V5_V6_V7_V8_V9, RISCV::V5_V6_V7_V8_V9_V10, RISCV::V6_V7_V8_V9_V10_V11, RISCV::V7_V8_V9_V10_V11_V12, 
  };

  // VRN6M1NoV0 Bit set.
  const uint8_t VRN6M1NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0x1f, 
  };

  // VRN3M2 Register Class...
  const MCPhysReg VRN3M2[] = {
    RISCV::V8M2_V10M2_V12M2, RISCV::V10M2_V12M2_V14M2, RISCV::V12M2_V14M2_V16M2, RISCV::V14M2_V16M2_V18M2, RISCV::V16M2_V18M2_V20M2, RISCV::V18M2_V20M2_V22M2, RISCV::V20M2_V22M2_V24M2, RISCV::V22M2_V24M2_V26M2, RISCV::V24M2_V26M2_V28M2, RISCV::V26M2_V28M2_V30M2, RISCV::V2M2_V4M2_V6M2, RISCV::V4M2_V6M2_V8M2, RISCV::V6M2_V8M2_V10M2, RISCV::V0M2_V2M2_V4M2, 
  };

  // VRN3M2 Bit set.
  const uint8_t VRN3M2Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, 
  };

  // VRN3M2NoV0 Register Class...
  const MCPhysReg VRN3M2NoV0[] = {
    RISCV::V8M2_V10M2_V12M2, RISCV::V10M2_V12M2_V14M2, RISCV::V12M2_V14M2_V16M2, RISCV::V14M2_V16M2_V18M2, RISCV::V16M2_V18M2_V20M2, RISCV::V18M2_V20M2_V22M2, RISCV::V20M2_V22M2_V24M2, RISCV::V22M2_V24M2_V26M2, RISCV::V24M2_V26M2_V28M2, RISCV::V26M2_V28M2_V30M2, RISCV::V2M2_V4M2_V6M2, RISCV::V4M2_V6M2_V8M2, RISCV::V6M2_V8M2_V10M2, 
  };

  // VRN3M2NoV0 Bit set.
  const uint8_t VRN3M2NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x0f, 
  };

  // VRN3M2_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN3M2_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0M2_V2M2_V4M2, 
  };

  // VRN3M2_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN3M2_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 
  };

  // VRN6M1_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN6M1_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0_V1_V2_V3_V4_V5, 
  };

  // VRN6M1_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN6M1_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 
  };

  // VRN7M1 Register Class...
  const MCPhysReg VRN7M1[] = {
    RISCV::V8_V9_V10_V11_V12_V13_V14, RISCV::V9_V10_V11_V12_V13_V14_V15, RISCV::V10_V11_V12_V13_V14_V15_V16, RISCV::V11_V12_V13_V14_V15_V16_V17, RISCV::V12_V13_V14_V15_V16_V17_V18, RISCV::V13_V14_V15_V16_V17_V18_V19, RISCV::V14_V15_V16_V17_V18_V19_V20, RISCV::V15_V16_V17_V18_V19_V20_V21, RISCV::V16_V17_V18_V19_V20_V21_V22, RISCV::V17_V18_V19_V20_V21_V22_V23, RISCV::V18_V19_V20_V21_V22_V23_V24, RISCV::V19_V20_V21_V22_V23_V24_V25, RISCV::V20_V21_V22_V23_V24_V25_V26, RISCV::V21_V22_V23_V24_V25_V26_V27, RISCV::V22_V23_V24_V25_V26_V27_V28, RISCV::V23_V24_V25_V26_V27_V28_V29, RISCV::V24_V25_V26_V27_V28_V29_V30, RISCV::V25_V26_V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5_V6_V7, RISCV::V2_V3_V4_V5_V6_V7_V8, RISCV::V3_V4_V5_V6_V7_V8_V9, RISCV::V4_V5_V6_V7_V8_V9_V10, RISCV::V5_V6_V7_V8_V9_V10_V11, RISCV::V6_V7_V8_V9_V10_V11_V12, RISCV::V7_V8_V9_V10_V11_V12_V13, RISCV::V0_V1_V2_V3_V4_V5_V6, 
  };

  // VRN7M1 Bit set.
  const uint8_t VRN7M1Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 
  };

  // VRN7M1NoV0 Register Class...
  const MCPhysReg VRN7M1NoV0[] = {
    RISCV::V8_V9_V10_V11_V12_V13_V14, RISCV::V9_V10_V11_V12_V13_V14_V15, RISCV::V10_V11_V12_V13_V14_V15_V16, RISCV::V11_V12_V13_V14_V15_V16_V17, RISCV::V12_V13_V14_V15_V16_V17_V18, RISCV::V13_V14_V15_V16_V17_V18_V19, RISCV::V14_V15_V16_V17_V18_V19_V20, RISCV::V15_V16_V17_V18_V19_V20_V21, RISCV::V16_V17_V18_V19_V20_V21_V22, RISCV::V17_V18_V19_V20_V21_V22_V23, RISCV::V18_V19_V20_V21_V22_V23_V24, RISCV::V19_V20_V21_V22_V23_V24_V25, RISCV::V20_V21_V22_V23_V24_V25_V26, RISCV::V21_V22_V23_V24_V25_V26_V27, RISCV::V22_V23_V24_V25_V26_V27_V28, RISCV::V23_V24_V25_V26_V27_V28_V29, RISCV::V24_V25_V26_V27_V28_V29_V30, RISCV::V25_V26_V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5_V6_V7, RISCV::V2_V3_V4_V5_V6_V7_V8, RISCV::V3_V4_V5_V6_V7_V8_V9, RISCV::V4_V5_V6_V7_V8_V9_V10, RISCV::V5_V6_V7_V8_V9_V10_V11, RISCV::V6_V7_V8_V9_V10_V11_V12, RISCV::V7_V8_V9_V10_V11_V12_V13, 
  };

  // VRN7M1NoV0 Bit set.
  const uint8_t VRN7M1NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0x7f, 
  };

  // VRN7M1_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN7M1_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0_V1_V2_V3_V4_V5_V6, 
  };

  // VRN7M1_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN7M1_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 
  };

  // VRN8M1 Register Class...
  const MCPhysReg VRN8M1[] = {
    RISCV::V8_V9_V10_V11_V12_V13_V14_V15, RISCV::V9_V10_V11_V12_V13_V14_V15_V16, RISCV::V10_V11_V12_V13_V14_V15_V16_V17, RISCV::V11_V12_V13_V14_V15_V16_V17_V18, RISCV::V12_V13_V14_V15_V16_V17_V18_V19, RISCV::V13_V14_V15_V16_V17_V18_V19_V20, RISCV::V14_V15_V16_V17_V18_V19_V20_V21, RISCV::V15_V16_V17_V18_V19_V20_V21_V22, RISCV::V16_V17_V18_V19_V20_V21_V22_V23, RISCV::V17_V18_V19_V20_V21_V22_V23_V24, RISCV::V18_V19_V20_V21_V22_V23_V24_V25, RISCV::V19_V20_V21_V22_V23_V24_V25_V26, RISCV::V20_V21_V22_V23_V24_V25_V26_V27, RISCV::V21_V22_V23_V24_V25_V26_V27_V28, RISCV::V22_V23_V24_V25_V26_V27_V28_V29, RISCV::V23_V24_V25_V26_V27_V28_V29_V30, RISCV::V24_V25_V26_V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5_V6_V7_V8, RISCV::V2_V3_V4_V5_V6_V7_V8_V9, RISCV::V3_V4_V5_V6_V7_V8_V9_V10, RISCV::V4_V5_V6_V7_V8_V9_V10_V11, RISCV::V5_V6_V7_V8_V9_V10_V11_V12, RISCV::V6_V7_V8_V9_V10_V11_V12_V13, RISCV::V7_V8_V9_V10_V11_V12_V13_V14, RISCV::V0_V1_V2_V3_V4_V5_V6_V7, 
  };

  // VRN8M1 Bit set.
  const uint8_t VRN8M1Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x01, 
  };

  // VRN8M1NoV0 Register Class...
  const MCPhysReg VRN8M1NoV0[] = {
    RISCV::V8_V9_V10_V11_V12_V13_V14_V15, RISCV::V9_V10_V11_V12_V13_V14_V15_V16, RISCV::V10_V11_V12_V13_V14_V15_V16_V17, RISCV::V11_V12_V13_V14_V15_V16_V17_V18, RISCV::V12_V13_V14_V15_V16_V17_V18_V19, RISCV::V13_V14_V15_V16_V17_V18_V19_V20, RISCV::V14_V15_V16_V17_V18_V19_V20_V21, RISCV::V15_V16_V17_V18_V19_V20_V21_V22, RISCV::V16_V17_V18_V19_V20_V21_V22_V23, RISCV::V17_V18_V19_V20_V21_V22_V23_V24, RISCV::V18_V19_V20_V21_V22_V23_V24_V25, RISCV::V19_V20_V21_V22_V23_V24_V25_V26, RISCV::V20_V21_V22_V23_V24_V25_V26_V27, RISCV::V21_V22_V23_V24_V25_V26_V27_V28, RISCV::V22_V23_V24_V25_V26_V27_V28_V29, RISCV::V23_V24_V25_V26_V27_V28_V29_V30, RISCV::V24_V25_V26_V27_V28_V29_V30_V31, RISCV::V1_V2_V3_V4_V5_V6_V7_V8, RISCV::V2_V3_V4_V5_V6_V7_V8_V9, RISCV::V3_V4_V5_V6_V7_V8_V9_V10, RISCV::V4_V5_V6_V7_V8_V9_V10_V11, RISCV::V5_V6_V7_V8_V9_V10_V11_V12, RISCV::V6_V7_V8_V9_V10_V11_V12_V13, RISCV::V7_V8_V9_V10_V11_V12_V13_V14, 
  };

  // VRN8M1NoV0 Bit set.
  const uint8_t VRN8M1NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 
  };

  // VRN4M2 Register Class...
  const MCPhysReg VRN4M2[] = {
    RISCV::V8M2_V10M2_V12M2_V14M2, RISCV::V10M2_V12M2_V14M2_V16M2, RISCV::V12M2_V14M2_V16M2_V18M2, RISCV::V14M2_V16M2_V18M2_V20M2, RISCV::V16M2_V18M2_V20M2_V22M2, RISCV::V18M2_V20M2_V22M2_V24M2, RISCV::V20M2_V22M2_V24M2_V26M2, RISCV::V22M2_V24M2_V26M2_V28M2, RISCV::V24M2_V26M2_V28M2_V30M2, RISCV::V2M2_V4M2_V6M2_V8M2, RISCV::V4M2_V6M2_V8M2_V10M2, RISCV::V6M2_V8M2_V10M2_V12M2, RISCV::V0M2_V2M2_V4M2_V6M2, 
  };

  // VRN4M2 Bit set.
  const uint8_t VRN4M2Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x7f, 
  };

  // VRN4M2NoV0 Register Class...
  const MCPhysReg VRN4M2NoV0[] = {
    RISCV::V8M2_V10M2_V12M2_V14M2, RISCV::V10M2_V12M2_V14M2_V16M2, RISCV::V12M2_V14M2_V16M2_V18M2, RISCV::V14M2_V16M2_V18M2_V20M2, RISCV::V16M2_V18M2_V20M2_V22M2, RISCV::V18M2_V20M2_V22M2_V24M2, RISCV::V20M2_V22M2_V24M2_V26M2, RISCV::V22M2_V24M2_V26M2_V28M2, RISCV::V24M2_V26M2_V28M2_V30M2, RISCV::V2M2_V4M2_V6M2_V8M2, RISCV::V4M2_V6M2_V8M2_V10M2, RISCV::V6M2_V8M2_V10M2_V12M2, 
  };

  // VRN4M2NoV0 Bit set.
  const uint8_t VRN4M2NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x3f, 
  };

  // VRN2M4 Register Class...
  const MCPhysReg VRN2M4[] = {
    RISCV::V8M4_V12M4, RISCV::V12M4_V16M4, RISCV::V16M4_V20M4, RISCV::V20M4_V24M4, RISCV::V24M4_V28M4, RISCV::V4M4_V8M4, RISCV::V0M4_V4M4, 
  };

  // VRN2M4 Bit set.
  const uint8_t VRN2M4Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, 
  };

  // VRN2M4NoV0 Register Class...
  const MCPhysReg VRN2M4NoV0[] = {
    RISCV::V8M4_V12M4, RISCV::V12M4_V16M4, RISCV::V16M4_V20M4, RISCV::V20M4_V24M4, RISCV::V24M4_V28M4, RISCV::V4M4_V8M4, 
  };

  // VRN2M4NoV0 Bit set.
  const uint8_t VRN2M4NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 
  };

  // VRM8 Register Class...
  const MCPhysReg VRM8[] = {
    RISCV::V8M8, RISCV::V16M8, RISCV::V24M8, RISCV::V0M8, 
  };

  // VRM8 Bit set.
  const uint8_t VRM8Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x02, 0x81, 
  };

  // VRM8NoV0 Register Class...
  const MCPhysReg VRM8NoV0[] = {
    RISCV::V8M8, RISCV::V16M8, RISCV::V24M8, 
  };

  // VRM8NoV0 Bit set.
  const uint8_t VRM8NoV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x81, 
  };

  // VRM8_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRM8_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0M8, 
  };

  // VRM8_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRM8_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 
  };

  // VRN2M4_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN2M4_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0M4_V4M4, 
  };

  // VRN2M4_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN2M4_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
  };

  // VRN4M2_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN4M2_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0M2_V2M2_V4M2_V6M2, 
  };

  // VRN4M2_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN4M2_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 
  };

  // VRN8M1_with_sub_vrm1_0_in_VMV0 Register Class...
  const MCPhysReg VRN8M1_with_sub_vrm1_0_in_VMV0[] = {
    RISCV::V0_V1_V2_V3_V4_V5_V6_V7, 
  };

  // VRN8M1_with_sub_vrm1_0_in_VMV0 Bit set.
  const uint8_t VRN8M1_with_sub_vrm1_0_in_VMV0Bits[] = {
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 
  };

} // end anonymous namespace


#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Woverlength-strings"
#endif
extern const char RISCVRegClassStrings[] = {
  /* 0 */ "VRN2M1_with_sub_vrm1_0_in_VMV0\0"
  /* 31 */ "VRN3M1_with_sub_vrm1_0_in_VMV0\0"
  /* 62 */ "VRN4M1_with_sub_vrm1_0_in_VMV0\0"
  /* 93 */ "VRN5M1_with_sub_vrm1_0_in_VMV0\0"
  /* 124 */ "VRN6M1_with_sub_vrm1_0_in_VMV0\0"
  /* 155 */ "VRN7M1_with_sub_vrm1_0_in_VMV0\0"
  /* 186 */ "VRN8M1_with_sub_vrm1_0_in_VMV0\0"
  /* 217 */ "VRN2M2_with_sub_vrm1_0_in_VMV0\0"
  /* 248 */ "VRN3M2_with_sub_vrm1_0_in_VMV0\0"
  /* 279 */ "VRN4M2_with_sub_vrm1_0_in_VMV0\0"
  /* 310 */ "VRM2_with_sub_vrm1_0_in_VMV0\0"
  /* 339 */ "VRN2M4_with_sub_vrm1_0_in_VMV0\0"
  /* 370 */ "VRM4_with_sub_vrm1_0_in_VMV0\0"
  /* 399 */ "VRM8_with_sub_vrm1_0_in_VMV0\0"
  /* 428 */ "VRN2M1NoV0\0"
  /* 439 */ "VRN3M1NoV0\0"
  /* 450 */ "VRN4M1NoV0\0"
  /* 461 */ "VRN5M1NoV0\0"
  /* 472 */ "VRN6M1NoV0\0"
  /* 483 */ "VRN7M1NoV0\0"
  /* 494 */ "VRN8M1NoV0\0"
  /* 505 */ "VRN2M2NoV0\0"
  /* 516 */ "VRN3M2NoV0\0"
  /* 527 */ "VRN4M2NoV0\0"
  /* 538 */ "VRM2NoV0\0"
  /* 547 */ "VRN2M4NoV0\0"
  /* 558 */ "VRM4NoV0\0"
  /* 567 */ "VRM8NoV0\0"
  /* 576 */ "VRNoV0\0"
  /* 583 */ "GPRPF64_with_sub_32_in_GPRX0\0"
  /* 612 */ "GPRPF64_with_sub_32_in_GPRNoX0\0"
  /* 643 */ "VRN2M1\0"
  /* 650 */ "VRN3M1\0"
  /* 657 */ "VRN4M1\0"
  /* 664 */ "VRN5M1\0"
  /* 671 */ "VRN6M1\0"
  /* 678 */ "VRN7M1\0"
  /* 685 */ "VRN8M1\0"
  /* 692 */ "GPRF32\0"
  /* 699 */ "FPR32\0"
  /* 705 */ "VRN2M2\0"
  /* 712 */ "VRN3M2\0"
  /* 719 */ "VRN4M2\0"
  /* 726 */ "VRM2\0"
  /* 731 */ "GPRPF64_with_sub_32_in_GPRNoX0X2\0"
  /* 764 */ "GPRPF64\0"
  /* 772 */ "GPRF64\0"
  /* 779 */ "FPR64\0"
  /* 785 */ "VRN2M4\0"
  /* 792 */ "VRM4\0"
  /* 797 */ "GPRF16\0"
  /* 804 */ "FPR16\0"
  /* 810 */ "AnyReg_with_sub_16\0"
  /* 829 */ "VRM8\0"
  /* 834 */ "AnyReg_with_sub_16_with_sub_32_in_FPR32C\0"
  /* 875 */ "FPR64C\0"
  /* 882 */ "GPRPF64_with_sub_32_in_GPRC\0"
  /* 910 */ "GPRPF64_with_sub_32_in_GPRC_and_GPRTC\0"
  /* 948 */ "GPRPF64_with_sub_32_in_GPRTC\0"
  /* 977 */ "VM\0"
  /* 980 */ "GPRPF64_with_sub_32_in_SP\0"
  /* 1006 */ "GPRPF64_with_sub_32_in_GPRJALR\0"
  /* 1037 */ "GPR\0"
  /* 1041 */ "VCSR\0"
  /* 1046 */ "VR\0"
  /* 1049 */ "AnyReg\0"
};
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif

extern const MCRegisterClass RISCVMCRegisterClasses[] = {
  { FPR16, FPR16Bits, 804, 32, sizeof(FPR16Bits), RISCV::FPR16RegClassID, 16, 1, true },
  { AnyReg, AnyRegBits, 1049, 96, sizeof(AnyRegBits), RISCV::AnyRegRegClassID, 32, 1, false },
  { AnyReg_with_sub_16, AnyReg_with_sub_16Bits, 810, 32, sizeof(AnyReg_with_sub_16Bits), RISCV::AnyReg_with_sub_16RegClassID, 32, 1, false },
  { FPR32, FPR32Bits, 699, 32, sizeof(FPR32Bits), RISCV::FPR32RegClassID, 32, 1, true },
  { GPR, GPRBits, 1037, 32, sizeof(GPRBits), RISCV::GPRRegClassID, 0, 1, true },
  { GPRF16, GPRF16Bits, 797, 32, sizeof(GPRF16Bits), RISCV::GPRF16RegClassID, 0, 1, true },
  { GPRF32, GPRF32Bits, 692, 32, sizeof(GPRF32Bits), RISCV::GPRF32RegClassID, 0, 1, true },
  { GPRF64, GPRF64Bits, 772, 32, sizeof(GPRF64Bits), RISCV::GPRF64RegClassID, 0, 1, true },
  { GPRNoX0, GPRNoX0Bits, 635, 31, sizeof(GPRNoX0Bits), RISCV::GPRNoX0RegClassID, 0, 1, true },
  { GPRNoX0X2, GPRNoX0X2Bits, 754, 30, sizeof(GPRNoX0X2Bits), RISCV::GPRNoX0X2RegClassID, 0, 1, true },
  { GPRJALR, GPRJALRBits, 1029, 26, sizeof(GPRJALRBits), RISCV::GPRJALRRegClassID, 0, 1, true },
  { GPRTC, GPRTCBits, 942, 14, sizeof(GPRTCBits), RISCV::GPRTCRegClassID, 0, 1, true },
  { AnyReg_with_sub_16_with_sub_32_in_FPR32C, AnyReg_with_sub_16_with_sub_32_in_FPR32CBits, 834, 8, sizeof(AnyReg_with_sub_16_with_sub_32_in_FPR32CBits), RISCV::AnyReg_with_sub_16_with_sub_32_in_FPR32CRegClassID, 32, 1, false },
  { FPR32C, FPR32CBits, 868, 8, sizeof(FPR32CBits), RISCV::FPR32CRegClassID, 32, 1, true },
  { GPRC, GPRCBits, 905, 8, sizeof(GPRCBits), RISCV::GPRCRegClassID, 0, 1, true },
  { GPRC_and_GPRTC, GPRC_and_GPRTCBits, 933, 6, sizeof(GPRC_and_GPRTCBits), RISCV::GPRC_and_GPRTCRegClassID, 0, 1, true },
  { VCSR, VCSRBits, 1041, 3, sizeof(VCSRBits), RISCV::VCSRRegClassID, 0, 1, true },
  { GPRX0, GPRX0Bits, 606, 1, sizeof(GPRX0Bits), RISCV::GPRX0RegClassID, 0, 1, true },
  { SP, SPBits, 1003, 1, sizeof(SPBits), RISCV::SPRegClassID, 0, 1, true },
  { FPR64, FPR64Bits, 779, 32, sizeof(FPR64Bits), RISCV::FPR64RegClassID, 64, 1, true },
  { VM, VMBits, 977, 32, sizeof(VMBits), RISCV::VMRegClassID, 64, 1, true },
  { VR, VRBits, 1046, 32, sizeof(VRBits), RISCV::VRRegClassID, 64, 1, true },
  { VRNoV0, VRNoV0Bits, 576, 31, sizeof(VRNoV0Bits), RISCV::VRNoV0RegClassID, 64, 1, true },
  { GPRPF64, GPRPF64Bits, 764, 16, sizeof(GPRPF64Bits), RISCV::GPRPF64RegClassID, 0, 1, true },
  { GPRPF64_with_sub_32_in_GPRNoX0, GPRPF64_with_sub_32_in_GPRNoX0Bits, 612, 15, sizeof(GPRPF64_with_sub_32_in_GPRNoX0Bits), RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClassID, 0, 1, true },
  { GPRPF64_with_sub_32_in_GPRNoX0X2, GPRPF64_with_sub_32_in_GPRNoX0X2Bits, 731, 14, sizeof(GPRPF64_with_sub_32_in_GPRNoX0X2Bits), RISCV::GPRPF64_with_sub_32_in_GPRNoX0X2RegClassID, 0, 1, true },
  { GPRPF64_with_sub_32_in_GPRJALR, GPRPF64_with_sub_32_in_GPRJALRBits, 1006, 13, sizeof(GPRPF64_with_sub_32_in_GPRJALRBits), RISCV::GPRPF64_with_sub_32_in_GPRJALRRegClassID, 0, 1, true },
  { FPR64C, FPR64CBits, 875, 8, sizeof(FPR64CBits), RISCV::FPR64CRegClassID, 64, 1, true },
  { GPRPF64_with_sub_32_in_GPRTC, GPRPF64_with_sub_32_in_GPRTCBits, 948, 7, sizeof(GPRPF64_with_sub_32_in_GPRTCBits), RISCV::GPRPF64_with_sub_32_in_GPRTCRegClassID, 0, 1, true },
  { GPRPF64_with_sub_32_in_GPRC, GPRPF64_with_sub_32_in_GPRCBits, 882, 4, sizeof(GPRPF64_with_sub_32_in_GPRCBits), RISCV::GPRPF64_with_sub_32_in_GPRCRegClassID, 0, 1, true },
  { GPRPF64_with_sub_32_in_GPRC_and_GPRTC, GPRPF64_with_sub_32_in_GPRC_and_GPRTCBits, 910, 3, sizeof(GPRPF64_with_sub_32_in_GPRC_and_GPRTCBits), RISCV::GPRPF64_with_sub_32_in_GPRC_and_GPRTCRegClassID, 0, 1, true },
  { GPRPF64_with_sub_32_in_GPRX0, GPRPF64_with_sub_32_in_GPRX0Bits, 583, 1, sizeof(GPRPF64_with_sub_32_in_GPRX0Bits), RISCV::GPRPF64_with_sub_32_in_GPRX0RegClassID, 0, 1, true },
  { GPRPF64_with_sub_32_in_SP, GPRPF64_with_sub_32_in_SPBits, 980, 1, sizeof(GPRPF64_with_sub_32_in_SPBits), RISCV::GPRPF64_with_sub_32_in_SPRegClassID, 0, 1, true },
  { VMV0, VMV0Bits, 26, 1, sizeof(VMV0Bits), RISCV::VMV0RegClassID, 64, 1, true },
  { VRN2M1, VRN2M1Bits, 643, 31, sizeof(VRN2M1Bits), RISCV::VRN2M1RegClassID, 128, 1, true },
  { VRN2M1NoV0, VRN2M1NoV0Bits, 428, 30, sizeof(VRN2M1NoV0Bits), RISCV::VRN2M1NoV0RegClassID, 128, 1, true },
  { VRM2, VRM2Bits, 726, 16, sizeof(VRM2Bits), RISCV::VRM2RegClassID, 128, 1, true },
  { VRM2NoV0, VRM2NoV0Bits, 538, 15, sizeof(VRM2NoV0Bits), RISCV::VRM2NoV0RegClassID, 128, 1, true },
  { VRM2_with_sub_vrm1_0_in_VMV0, VRM2_with_sub_vrm1_0_in_VMV0Bits, 310, 1, sizeof(VRM2_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRM2_with_sub_vrm1_0_in_VMV0RegClassID, 128, 1, true },
  { VRN2M1_with_sub_vrm1_0_in_VMV0, VRN2M1_with_sub_vrm1_0_in_VMV0Bits, 0, 1, sizeof(VRN2M1_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN2M1_with_sub_vrm1_0_in_VMV0RegClassID, 128, 1, true },
  { VRN3M1, VRN3M1Bits, 650, 30, sizeof(VRN3M1Bits), RISCV::VRN3M1RegClassID, 192, 1, true },
  { VRN3M1NoV0, VRN3M1NoV0Bits, 439, 29, sizeof(VRN3M1NoV0Bits), RISCV::VRN3M1NoV0RegClassID, 192, 1, true },
  { VRN3M1_with_sub_vrm1_0_in_VMV0, VRN3M1_with_sub_vrm1_0_in_VMV0Bits, 31, 1, sizeof(VRN3M1_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN3M1_with_sub_vrm1_0_in_VMV0RegClassID, 192, 1, true },
  { VRN4M1, VRN4M1Bits, 657, 29, sizeof(VRN4M1Bits), RISCV::VRN4M1RegClassID, 256, 1, true },
  { VRN4M1NoV0, VRN4M1NoV0Bits, 450, 28, sizeof(VRN4M1NoV0Bits), RISCV::VRN4M1NoV0RegClassID, 256, 1, true },
  { VRN2M2, VRN2M2Bits, 705, 15, sizeof(VRN2M2Bits), RISCV::VRN2M2RegClassID, 256, 1, true },
  { VRN2M2NoV0, VRN2M2NoV0Bits, 505, 14, sizeof(VRN2M2NoV0Bits), RISCV::VRN2M2NoV0RegClassID, 256, 1, true },
  { VRM4, VRM4Bits, 792, 8, sizeof(VRM4Bits), RISCV::VRM4RegClassID, 256, 1, true },
  { VRM4NoV0, VRM4NoV0Bits, 558, 7, sizeof(VRM4NoV0Bits), RISCV::VRM4NoV0RegClassID, 256, 1, true },
  { VRM4_with_sub_vrm1_0_in_VMV0, VRM4_with_sub_vrm1_0_in_VMV0Bits, 370, 1, sizeof(VRM4_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRM4_with_sub_vrm1_0_in_VMV0RegClassID, 256, 1, true },
  { VRN2M2_with_sub_vrm1_0_in_VMV0, VRN2M2_with_sub_vrm1_0_in_VMV0Bits, 217, 1, sizeof(VRN2M2_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN2M2_with_sub_vrm1_0_in_VMV0RegClassID, 256, 1, true },
  { VRN4M1_with_sub_vrm1_0_in_VMV0, VRN4M1_with_sub_vrm1_0_in_VMV0Bits, 62, 1, sizeof(VRN4M1_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN4M1_with_sub_vrm1_0_in_VMV0RegClassID, 256, 1, true },
  { VRN5M1, VRN5M1Bits, 664, 28, sizeof(VRN5M1Bits), RISCV::VRN5M1RegClassID, 320, 1, true },
  { VRN5M1NoV0, VRN5M1NoV0Bits, 461, 27, sizeof(VRN5M1NoV0Bits), RISCV::VRN5M1NoV0RegClassID, 320, 1, true },
  { VRN5M1_with_sub_vrm1_0_in_VMV0, VRN5M1_with_sub_vrm1_0_in_VMV0Bits, 93, 1, sizeof(VRN5M1_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN5M1_with_sub_vrm1_0_in_VMV0RegClassID, 320, 1, true },
  { VRN6M1, VRN6M1Bits, 671, 27, sizeof(VRN6M1Bits), RISCV::VRN6M1RegClassID, 384, 1, true },
  { VRN6M1NoV0, VRN6M1NoV0Bits, 472, 26, sizeof(VRN6M1NoV0Bits), RISCV::VRN6M1NoV0RegClassID, 384, 1, true },
  { VRN3M2, VRN3M2Bits, 712, 14, sizeof(VRN3M2Bits), RISCV::VRN3M2RegClassID, 384, 1, true },
  { VRN3M2NoV0, VRN3M2NoV0Bits, 516, 13, sizeof(VRN3M2NoV0Bits), RISCV::VRN3M2NoV0RegClassID, 384, 1, true },
  { VRN3M2_with_sub_vrm1_0_in_VMV0, VRN3M2_with_sub_vrm1_0_in_VMV0Bits, 248, 1, sizeof(VRN3M2_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN3M2_with_sub_vrm1_0_in_VMV0RegClassID, 384, 1, true },
  { VRN6M1_with_sub_vrm1_0_in_VMV0, VRN6M1_with_sub_vrm1_0_in_VMV0Bits, 124, 1, sizeof(VRN6M1_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN6M1_with_sub_vrm1_0_in_VMV0RegClassID, 384, 1, true },
  { VRN7M1, VRN7M1Bits, 678, 26, sizeof(VRN7M1Bits), RISCV::VRN7M1RegClassID, 448, 1, true },
  { VRN7M1NoV0, VRN7M1NoV0Bits, 483, 25, sizeof(VRN7M1NoV0Bits), RISCV::VRN7M1NoV0RegClassID, 448, 1, true },
  { VRN7M1_with_sub_vrm1_0_in_VMV0, VRN7M1_with_sub_vrm1_0_in_VMV0Bits, 155, 1, sizeof(VRN7M1_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN7M1_with_sub_vrm1_0_in_VMV0RegClassID, 448, 1, true },
  { VRN8M1, VRN8M1Bits, 685, 25, sizeof(VRN8M1Bits), RISCV::VRN8M1RegClassID, 512, 1, true },
  { VRN8M1NoV0, VRN8M1NoV0Bits, 494, 24, sizeof(VRN8M1NoV0Bits), RISCV::VRN8M1NoV0RegClassID, 512, 1, true },
  { VRN4M2, VRN4M2Bits, 719, 13, sizeof(VRN4M2Bits), RISCV::VRN4M2RegClassID, 512, 1, true },
  { VRN4M2NoV0, VRN4M2NoV0Bits, 527, 12, sizeof(VRN4M2NoV0Bits), RISCV::VRN4M2NoV0RegClassID, 512, 1, true },
  { VRN2M4, VRN2M4Bits, 785, 7, sizeof(VRN2M4Bits), RISCV::VRN2M4RegClassID, 512, 1, true },
  { VRN2M4NoV0, VRN2M4NoV0Bits, 547, 6, sizeof(VRN2M4NoV0Bits), RISCV::VRN2M4NoV0RegClassID, 512, 1, true },
  { VRM8, VRM8Bits, 829, 4, sizeof(VRM8Bits), RISCV::VRM8RegClassID, 512, 1, true },
  { VRM8NoV0, VRM8NoV0Bits, 567, 3, sizeof(VRM8NoV0Bits), RISCV::VRM8NoV0RegClassID, 512, 1, true },
  { VRM8_with_sub_vrm1_0_in_VMV0, VRM8_with_sub_vrm1_0_in_VMV0Bits, 399, 1, sizeof(VRM8_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRM8_with_sub_vrm1_0_in_VMV0RegClassID, 512, 1, true },
  { VRN2M4_with_sub_vrm1_0_in_VMV0, VRN2M4_with_sub_vrm1_0_in_VMV0Bits, 339, 1, sizeof(VRN2M4_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN2M4_with_sub_vrm1_0_in_VMV0RegClassID, 512, 1, true },
  { VRN4M2_with_sub_vrm1_0_in_VMV0, VRN4M2_with_sub_vrm1_0_in_VMV0Bits, 279, 1, sizeof(VRN4M2_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN4M2_with_sub_vrm1_0_in_VMV0RegClassID, 512, 1, true },
  { VRN8M1_with_sub_vrm1_0_in_VMV0, VRN8M1_with_sub_vrm1_0_in_VMV0Bits, 186, 1, sizeof(VRN8M1_with_sub_vrm1_0_in_VMV0Bits), RISCV::VRN8M1_with_sub_vrm1_0_in_VMV0RegClassID, 512, 1, true },
};

// RISCV Dwarf<->LLVM register mappings.
extern const MCRegisterInfo::DwarfLLVMRegPair RISCVDwarfFlavour0Dwarf2L[] = {
  { 0U, RISCV::X0 },
  { 1U, RISCV::X1 },
  { 2U, RISCV::X2 },
  { 3U, RISCV::X3 },
  { 4U, RISCV::X4 },
  { 5U, RISCV::X5 },
  { 6U, RISCV::X6 },
  { 7U, RISCV::X7 },
  { 8U, RISCV::X8 },
  { 9U, RISCV::X9 },
  { 10U, RISCV::X10 },
  { 11U, RISCV::X11 },
  { 12U, RISCV::X12 },
  { 13U, RISCV::X13 },
  { 14U, RISCV::X14 },
  { 15U, RISCV::X15 },
  { 16U, RISCV::X16 },
  { 17U, RISCV::X17 },
  { 18U, RISCV::X18 },
  { 19U, RISCV::X19 },
  { 20U, RISCV::X20 },
  { 21U, RISCV::X21 },
  { 22U, RISCV::X22 },
  { 23U, RISCV::X23 },
  { 24U, RISCV::X24 },
  { 25U, RISCV::X25 },
  { 26U, RISCV::X26 },
  { 27U, RISCV::X27 },
  { 28U, RISCV::X28 },
  { 29U, RISCV::X29 },
  { 30U, RISCV::X30 },
  { 31U, RISCV::X31 },
  { 32U, RISCV::F0_H },
  { 33U, RISCV::F1_H },
  { 34U, RISCV::F2_H },
  { 35U, RISCV::F3_H },
  { 36U, RISCV::F4_H },
  { 37U, RISCV::F5_H },
  { 38U, RISCV::F6_H },
  { 39U, RISCV::F7_H },
  { 40U, RISCV::F8_H },
  { 41U, RISCV::F9_H },
  { 42U, RISCV::F10_H },
  { 43U, RISCV::F11_H },
  { 44U, RISCV::F12_H },
  { 45U, RISCV::F13_H },
  { 46U, RISCV::F14_H },
  { 47U, RISCV::F15_H },
  { 48U, RISCV::F16_H },
  { 49U, RISCV::F17_H },
  { 50U, RISCV::F18_H },
  { 51U, RISCV::F19_H },
  { 52U, RISCV::F20_H },
  { 53U, RISCV::F21_H },
  { 54U, RISCV::F22_H },
  { 55U, RISCV::F23_H },
  { 56U, RISCV::F24_H },
  { 57U, RISCV::F25_H },
  { 58U, RISCV::F26_H },
  { 59U, RISCV::F27_H },
  { 60U, RISCV::F28_H },
  { 61U, RISCV::F29_H },
  { 62U, RISCV::F30_H },
  { 63U, RISCV::F31_H },
  { 96U, RISCV::V0 },
  { 97U, RISCV::V1 },
  { 98U, RISCV::V2 },
  { 99U, RISCV::V3 },
  { 100U, RISCV::V4 },
  { 101U, RISCV::V5 },
  { 102U, RISCV::V6 },
  { 103U, RISCV::V7 },
  { 104U, RISCV::V8 },
  { 105U, RISCV::V9 },
  { 106U, RISCV::V10 },
  { 107U, RISCV::V11 },
  { 108U, RISCV::V12 },
  { 109U, RISCV::V13 },
  { 110U, RISCV::V14 },
  { 111U, RISCV::V15 },
  { 112U, RISCV::V16 },
  { 113U, RISCV::V17 },
  { 114U, RISCV::V18 },
  { 115U, RISCV::V19 },
  { 116U, RISCV::V20 },
  { 117U, RISCV::V21 },
  { 118U, RISCV::V22 },
  { 119U, RISCV::V23 },
  { 120U, RISCV::V24 },
  { 121U, RISCV::V25 },
  { 122U, RISCV::V26 },
  { 123U, RISCV::V27 },
  { 124U, RISCV::V28 },
  { 125U, RISCV::V29 },
  { 126U, RISCV::V30 },
  { 127U, RISCV::V31 },
  { 7202U, RISCV::VLENB },
};
extern const unsigned RISCVDwarfFlavour0Dwarf2LSize = std::size(RISCVDwarfFlavour0Dwarf2L);

extern const MCRegisterInfo::DwarfLLVMRegPair RISCVEHFlavour0Dwarf2L[] = {
  { 0U, RISCV::X0 },
  { 1U, RISCV::X1 },
  { 2U, RISCV::X2 },
  { 3U, RISCV::X3 },
  { 4U, RISCV::X4 },
  { 5U, RISCV::X5 },
  { 6U, RISCV::X6 },
  { 7U, RISCV::X7 },
  { 8U, RISCV::X8 },
  { 9U, RISCV::X9 },
  { 10U, RISCV::X10 },
  { 11U, RISCV::X11 },
  { 12U, RISCV::X12 },
  { 13U, RISCV::X13 },
  { 14U, RISCV::X14 },
  { 15U, RISCV::X15 },
  { 16U, RISCV::X16 },
  { 17U, RISCV::X17 },
  { 18U, RISCV::X18 },
  { 19U, RISCV::X19 },
  { 20U, RISCV::X20 },
  { 21U, RISCV::X21 },
  { 22U, RISCV::X22 },
  { 23U, RISCV::X23 },
  { 24U, RISCV::X24 },
  { 25U, RISCV::X25 },
  { 26U, RISCV::X26 },
  { 27U, RISCV::X27 },
  { 28U, RISCV::X28 },
  { 29U, RISCV::X29 },
  { 30U, RISCV::X30 },
  { 31U, RISCV::X31 },
  { 32U, RISCV::F0_H },
  { 33U, RISCV::F1_H },
  { 34U, RISCV::F2_H },
  { 35U, RISCV::F3_H },
  { 36U, RISCV::F4_H },
  { 37U, RISCV::F5_H },
  { 38U, RISCV::F6_H },
  { 39U, RISCV::F7_H },
  { 40U, RISCV::F8_H },
  { 41U, RISCV::F9_H },
  { 42U, RISCV::F10_H },
  { 43U, RISCV::F11_H },
  { 44U, RISCV::F12_H },
  { 45U, RISCV::F13_H },
  { 46U, RISCV::F14_H },
  { 47U, RISCV::F15_H },
  { 48U, RISCV::F16_H },
  { 49U, RISCV::F17_H },
  { 50U, RISCV::F18_H },
  { 51U, RISCV::F19_H },
  { 52U, RISCV::F20_H },
  { 53U, RISCV::F21_H },
  { 54U, RISCV::F22_H },
  { 55U, RISCV::F23_H },
  { 56U, RISCV::F24_H },
  { 57U, RISCV::F25_H },
  { 58U, RISCV::F26_H },
  { 59U, RISCV::F27_H },
  { 60U, RISCV::F28_H },
  { 61U, RISCV::F29_H },
  { 62U, RISCV::F30_H },
  { 63U, RISCV::F31_H },
  { 96U, RISCV::V0 },
  { 97U, RISCV::V1 },
  { 98U, RISCV::V2 },
  { 99U, RISCV::V3 },
  { 100U, RISCV::V4 },
  { 101U, RISCV::V5 },
  { 102U, RISCV::V6 },
  { 103U, RISCV::V7 },
  { 104U, RISCV::V8 },
  { 105U, RISCV::V9 },
  { 106U, RISCV::V10 },
  { 107U, RISCV::V11 },
  { 108U, RISCV::V12 },
  { 109U, RISCV::V13 },
  { 110U, RISCV::V14 },
  { 111U, RISCV::V15 },
  { 112U, RISCV::V16 },
  { 113U, RISCV::V17 },
  { 114U, RISCV::V18 },
  { 115U, RISCV::V19 },
  { 116U, RISCV::V20 },
  { 117U, RISCV::V21 },
  { 118U, RISCV::V22 },
  { 119U, RISCV::V23 },
  { 120U, RISCV::V24 },
  { 121U, RISCV::V25 },
  { 122U, RISCV::V26 },
  { 123U, RISCV::V27 },
  { 124U, RISCV::V28 },
  { 125U, RISCV::V29 },
  { 126U, RISCV::V30 },
  { 127U, RISCV::V31 },
  { 7202U, RISCV::VLENB },
};
extern const unsigned RISCVEHFlavour0Dwarf2LSize = std::size(RISCVEHFlavour0Dwarf2L);

extern const MCRegisterInfo::DwarfLLVMRegPair RISCVDwarfFlavour0L2Dwarf[] = {
  { RISCV::VLENB, 7202U },
  { RISCV::V0, 96U },
  { RISCV::V1, 97U },
  { RISCV::V2, 98U },
  { RISCV::V3, 99U },
  { RISCV::V4, 100U },
  { RISCV::V5, 101U },
  { RISCV::V6, 102U },
  { RISCV::V7, 103U },
  { RISCV::V8, 104U },
  { RISCV::V9, 105U },
  { RISCV::V10, 106U },
  { RISCV::V11, 107U },
  { RISCV::V12, 108U },
  { RISCV::V13, 109U },
  { RISCV::V14, 110U },
  { RISCV::V15, 111U },
  { RISCV::V16, 112U },
  { RISCV::V17, 113U },
  { RISCV::V18, 114U },
  { RISCV::V19, 115U },
  { RISCV::V20, 116U },
  { RISCV::V21, 117U },
  { RISCV::V22, 118U },
  { RISCV::V23, 119U },
  { RISCV::V24, 120U },
  { RISCV::V25, 121U },
  { RISCV::V26, 122U },
  { RISCV::V27, 123U },
  { RISCV::V28, 124U },
  { RISCV::V29, 125U },
  { RISCV::V30, 126U },
  { RISCV::V31, 127U },
  { RISCV::X0, 0U },
  { RISCV::X1, 1U },
  { RISCV::X2, 2U },
  { RISCV::X3, 3U },
  { RISCV::X4, 4U },
  { RISCV::X5, 5U },
  { RISCV::X6, 6U },
  { RISCV::X7, 7U },
  { RISCV::X8, 8U },
  { RISCV::X9, 9U },
  { RISCV::X10, 10U },
  { RISCV::X11, 11U },
  { RISCV::X12, 12U },
  { RISCV::X13, 13U },
  { RISCV::X14, 14U },
  { RISCV::X15, 15U },
  { RISCV::X16, 16U },
  { RISCV::X17, 17U },
  { RISCV::X18, 18U },
  { RISCV::X19, 19U },
  { RISCV::X20, 20U },
  { RISCV::X21, 21U },
  { RISCV::X22, 22U },
  { RISCV::X23, 23U },
  { RISCV::X24, 24U },
  { RISCV::X25, 25U },
  { RISCV::X26, 26U },
  { RISCV::X27, 27U },
  { RISCV::X28, 28U },
  { RISCV::X29, 29U },
  { RISCV::X30, 30U },
  { RISCV::X31, 31U },
  { RISCV::F0_D, 32U },
  { RISCV::F1_D, 33U },
  { RISCV::F2_D, 34U },
  { RISCV::F3_D, 35U },
  { RISCV::F4_D, 36U },
  { RISCV::F5_D, 37U },
  { RISCV::F6_D, 38U },
  { RISCV::F7_D, 39U },
  { RISCV::F8_D, 40U },
  { RISCV::F9_D, 41U },
  { RISCV::F10_D, 42U },
  { RISCV::F11_D, 43U },
  { RISCV::F12_D, 44U },
  { RISCV::F13_D, 45U },
  { RISCV::F14_D, 46U },
  { RISCV::F15_D, 47U },
  { RISCV::F16_D, 48U },
  { RISCV::F17_D, 49U },
  { RISCV::F18_D, 50U },
  { RISCV::F19_D, 51U },
  { RISCV::F20_D, 52U },
  { RISCV::F21_D, 53U },
  { RISCV::F22_D, 54U },
  { RISCV::F23_D, 55U },
  { RISCV::F24_D, 56U },
  { RISCV::F25_D, 57U },
  { RISCV::F26_D, 58U },
  { RISCV::F27_D, 59U },
  { RISCV::F28_D, 60U },
  { RISCV::F29_D, 61U },
  { RISCV::F30_D, 62U },
  { RISCV::F31_D, 63U },
  { RISCV::F0_F, 32U },
  { RISCV::F1_F, 33U },
  { RISCV::F2_F, 34U },
  { RISCV::F3_F, 35U },
  { RISCV::F4_F, 36U },
  { RISCV::F5_F, 37U },
  { RISCV::F6_F, 38U },
  { RISCV::F7_F, 39U },
  { RISCV::F8_F, 40U },
  { RISCV::F9_F, 41U },
  { RISCV::F10_F, 42U },
  { RISCV::F11_F, 43U },
  { RISCV::F12_F, 44U },
  { RISCV::F13_F, 45U },
  { RISCV::F14_F, 46U },
  { RISCV::F15_F, 47U },
  { RISCV::F16_F, 48U },
  { RISCV::F17_F, 49U },
  { RISCV::F18_F, 50U },
  { RISCV::F19_F, 51U },
  { RISCV::F20_F, 52U },
  { RISCV::F21_F, 53U },
  { RISCV::F22_F, 54U },
  { RISCV::F23_F, 55U },
  { RISCV::F24_F, 56U },
  { RISCV::F25_F, 57U },
  { RISCV::F26_F, 58U },
  { RISCV::F27_F, 59U },
  { RISCV::F28_F, 60U },
  { RISCV::F29_F, 61U },
  { RISCV::F30_F, 62U },
  { RISCV::F31_F, 63U },
  { RISCV::F0_H, 32U },
  { RISCV::F1_H, 33U },
  { RISCV::F2_H, 34U },
  { RISCV::F3_H, 35U },
  { RISCV::F4_H, 36U },
  { RISCV::F5_H, 37U },
  { RISCV::F6_H, 38U },
  { RISCV::F7_H, 39U },
  { RISCV::F8_H, 40U },
  { RISCV::F9_H, 41U },
  { RISCV::F10_H, 42U },
  { RISCV::F11_H, 43U },
  { RISCV::F12_H, 44U },
  { RISCV::F13_H, 45U },
  { RISCV::F14_H, 46U },
  { RISCV::F15_H, 47U },
  { RISCV::F16_H, 48U },
  { RISCV::F17_H, 49U },
  { RISCV::F18_H, 50U },
  { RISCV::F19_H, 51U },
  { RISCV::F20_H, 52U },
  { RISCV::F21_H, 53U },
  { RISCV::F22_H, 54U },
  { RISCV::F23_H, 55U },
  { RISCV::F24_H, 56U },
  { RISCV::F25_H, 57U },
  { RISCV::F26_H, 58U },
  { RISCV::F27_H, 59U },
  { RISCV::F28_H, 60U },
  { RISCV::F29_H, 61U },
  { RISCV::F30_H, 62U },
  { RISCV::F31_H, 63U },
  { RISCV::V0M2, 96U },
  { RISCV::V0M4, 96U },
  { RISCV::V0M8, 96U },
  { RISCV::V2M2, 98U },
  { RISCV::V4M2, 100U },
  { RISCV::V4M4, 100U },
  { RISCV::V6M2, 102U },
  { RISCV::V8M2, 104U },
  { RISCV::V8M4, 104U },
  { RISCV::V8M8, 104U },
  { RISCV::V10M2, 106U },
  { RISCV::V12M2, 108U },
  { RISCV::V12M4, 108U },
  { RISCV::V14M2, 110U },
  { RISCV::V16M2, 112U },
  { RISCV::V16M4, 112U },
  { RISCV::V16M8, 112U },
  { RISCV::V18M2, 114U },
  { RISCV::V20M2, 116U },
  { RISCV::V20M4, 116U },
  { RISCV::V22M2, 118U },
  { RISCV::V24M2, 120U },
  { RISCV::V24M4, 120U },
  { RISCV::V24M8, 120U },
  { RISCV::V26M2, 122U },
  { RISCV::V28M2, 124U },
  { RISCV::V28M4, 124U },
  { RISCV::V30M2, 126U },
};
extern const unsigned RISCVDwarfFlavour0L2DwarfSize = std::size(RISCVDwarfFlavour0L2Dwarf);

extern const MCRegisterInfo::DwarfLLVMRegPair RISCVEHFlavour0L2Dwarf[] = {
  { RISCV::VLENB, 7202U },
  { RISCV::V0, 96U },
  { RISCV::V1, 97U },
  { RISCV::V2, 98U },
  { RISCV::V3, 99U },
  { RISCV::V4, 100U },
  { RISCV::V5, 101U },
  { RISCV::V6, 102U },
  { RISCV::V7, 103U },
  { RISCV::V8, 104U },
  { RISCV::V9, 105U },
  { RISCV::V10, 106U },
  { RISCV::V11, 107U },
  { RISCV::V12, 108U },
  { RISCV::V13, 109U },
  { RISCV::V14, 110U },
  { RISCV::V15, 111U },
  { RISCV::V16, 112U },
  { RISCV::V17, 113U },
  { RISCV::V18, 114U },
  { RISCV::V19, 115U },
  { RISCV::V20, 116U },
  { RISCV::V21, 117U },
  { RISCV::V22, 118U },
  { RISCV::V23, 119U },
  { RISCV::V24, 120U },
  { RISCV::V25, 121U },
  { RISCV::V26, 122U },
  { RISCV::V27, 123U },
  { RISCV::V28, 124U },
  { RISCV::V29, 125U },
  { RISCV::V30, 126U },
  { RISCV::V31, 127U },
  { RISCV::X0, 0U },
  { RISCV::X1, 1U },
  { RISCV::X2, 2U },
  { RISCV::X3, 3U },
  { RISCV::X4, 4U },
  { RISCV::X5, 5U },
  { RISCV::X6, 6U },
  { RISCV::X7, 7U },
  { RISCV::X8, 8U },
  { RISCV::X9, 9U },
  { RISCV::X10, 10U },
  { RISCV::X11, 11U },
  { RISCV::X12, 12U },
  { RISCV::X13, 13U },
  { RISCV::X14, 14U },
  { RISCV::X15, 15U },
  { RISCV::X16, 16U },
  { RISCV::X17, 17U },
  { RISCV::X18, 18U },
  { RISCV::X19, 19U },
  { RISCV::X20, 20U },
  { RISCV::X21, 21U },
  { RISCV::X22, 22U },
  { RISCV::X23, 23U },
  { RISCV::X24, 24U },
  { RISCV::X25, 25U },
  { RISCV::X26, 26U },
  { RISCV::X27, 27U },
  { RISCV::X28, 28U },
  { RISCV::X29, 29U },
  { RISCV::X30, 30U },
  { RISCV::X31, 31U },
  { RISCV::F0_D, 32U },
  { RISCV::F1_D, 33U },
  { RISCV::F2_D, 34U },
  { RISCV::F3_D, 35U },
  { RISCV::F4_D, 36U },
  { RISCV::F5_D, 37U },
  { RISCV::F6_D, 38U },
  { RISCV::F7_D, 39U },
  { RISCV::F8_D, 40U },
  { RISCV::F9_D, 41U },
  { RISCV::F10_D, 42U },
  { RISCV::F11_D, 43U },
  { RISCV::F12_D, 44U },
  { RISCV::F13_D, 45U },
  { RISCV::F14_D, 46U },
  { RISCV::F15_D, 47U },
  { RISCV::F16_D, 48U },
  { RISCV::F17_D, 49U },
  { RISCV::F18_D, 50U },
  { RISCV::F19_D, 51U },
  { RISCV::F20_D, 52U },
  { RISCV::F21_D, 53U },
  { RISCV::F22_D, 54U },
  { RISCV::F23_D, 55U },
  { RISCV::F24_D, 56U },
  { RISCV::F25_D, 57U },
  { RISCV::F26_D, 58U },
  { RISCV::F27_D, 59U },
  { RISCV::F28_D, 60U },
  { RISCV::F29_D, 61U },
  { RISCV::F30_D, 62U },
  { RISCV::F31_D, 63U },
  { RISCV::F0_F, 32U },
  { RISCV::F1_F, 33U },
  { RISCV::F2_F, 34U },
  { RISCV::F3_F, 35U },
  { RISCV::F4_F, 36U },
  { RISCV::F5_F, 37U },
  { RISCV::F6_F, 38U },
  { RISCV::F7_F, 39U },
  { RISCV::F8_F, 40U },
  { RISCV::F9_F, 41U },
  { RISCV::F10_F, 42U },
  { RISCV::F11_F, 43U },
  { RISCV::F12_F, 44U },
  { RISCV::F13_F, 45U },
  { RISCV::F14_F, 46U },
  { RISCV::F15_F, 47U },
  { RISCV::F16_F, 48U },
  { RISCV::F17_F, 49U },
  { RISCV::F18_F, 50U },
  { RISCV::F19_F, 51U },
  { RISCV::F20_F, 52U },
  { RISCV::F21_F, 53U },
  { RISCV::F22_F, 54U },
  { RISCV::F23_F, 55U },
  { RISCV::F24_F, 56U },
  { RISCV::F25_F, 57U },
  { RISCV::F26_F, 58U },
  { RISCV::F27_F, 59U },
  { RISCV::F28_F, 60U },
  { RISCV::F29_F, 61U },
  { RISCV::F30_F, 62U },
  { RISCV::F31_F, 63U },
  { RISCV::F0_H, 32U },
  { RISCV::F1_H, 33U },
  { RISCV::F2_H, 34U },
  { RISCV::F3_H, 35U },
  { RISCV::F4_H, 36U },
  { RISCV::F5_H, 37U },
  { RISCV::F6_H, 38U },
  { RISCV::F7_H, 39U },
  { RISCV::F8_H, 40U },
  { RISCV::F9_H, 41U },
  { RISCV::F10_H, 42U },
  { RISCV::F11_H, 43U },
  { RISCV::F12_H, 44U },
  { RISCV::F13_H, 45U },
  { RISCV::F14_H, 46U },
  { RISCV::F15_H, 47U },
  { RISCV::F16_H, 48U },
  { RISCV::F17_H, 49U },
  { RISCV::F18_H, 50U },
  { RISCV::F19_H, 51U },
  { RISCV::F20_H, 52U },
  { RISCV::F21_H, 53U },
  { RISCV::F22_H, 54U },
  { RISCV::F23_H, 55U },
  { RISCV::F24_H, 56U },
  { RISCV::F25_H, 57U },
  { RISCV::F26_H, 58U },
  { RISCV::F27_H, 59U },
  { RISCV::F28_H, 60U },
  { RISCV::F29_H, 61U },
  { RISCV::F30_H, 62U },
  { RISCV::F31_H, 63U },
  { RISCV::V0M2, 96U },
  { RISCV::V0M4, 96U },
  { RISCV::V0M8, 96U },
  { RISCV::V2M2, 98U },
  { RISCV::V4M2, 100U },
  { RISCV::V4M4, 100U },
  { RISCV::V6M2, 102U },
  { RISCV::V8M2, 104U },
  { RISCV::V8M4, 104U },
  { RISCV::V8M8, 104U },
  { RISCV::V10M2, 106U },
  { RISCV::V12M2, 108U },
  { RISCV::V12M4, 108U },
  { RISCV::V14M2, 110U },
  { RISCV::V16M2, 112U },
  { RISCV::V16M4, 112U },
  { RISCV::V16M8, 112U },
  { RISCV::V18M2, 114U },
  { RISCV::V20M2, 116U },
  { RISCV::V20M4, 116U },
  { RISCV::V22M2, 118U },
  { RISCV::V24M2, 120U },
  { RISCV::V24M4, 120U },
  { RISCV::V24M8, 120U },
  { RISCV::V26M2, 122U },
  { RISCV::V28M2, 124U },
  { RISCV::V28M4, 124U },
  { RISCV::V30M2, 126U },
};
extern const unsigned RISCVEHFlavour0L2DwarfSize = std::size(RISCVEHFlavour0L2Dwarf);

extern const uint16_t RISCVRegEncodingTable[] = {
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  29,
  30,
  31,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  29,
  30,
  31,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  29,
  30,
  31,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  29,
  30,
  31,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  29,
  30,
  31,
  0,
  2,
  4,
  6,
  8,
  10,
  12,
  14,
  16,
  18,
  20,
  22,
  24,
  26,
  28,
  30,
  0,
  0,
  0,
  2,
  4,
  4,
  6,
  8,
  8,
  8,
  10,
  12,
  12,
  14,
  16,
  16,
  16,
  18,
  20,
  20,
  22,
  24,
  24,
  24,
  26,
  28,
  28,
  30,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  29,
  30,
  0,
  2,
  4,
  6,
  8,
  10,
  12,
  14,
  16,
  18,
  20,
  22,
  24,
  26,
  28,
  0,
  4,
  8,
  12,
  16,
  20,
  24,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  29,
  0,
  2,
  4,
  6,
  8,
  10,
  12,
  14,
  16,
  18,
  20,
  22,
  24,
  26,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  28,
  0,
  2,
  4,
  6,
  8,
  10,
  12,
  14,
  16,
  18,
  20,
  22,
  24,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  27,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  26,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  25,
  0,
  1,
  2,
  3,
  4,
  5,
  6,
  7,
  8,
  9,
  10,
  11,
  12,
  13,
  14,
  15,
  16,
  17,
  18,
  19,
  20,
  21,
  22,
  23,
  24,
  0,
};
static inline void InitRISCVMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) {
  RI->InitMCRegisterInfo(RISCVRegDesc, 457, RA, PC, RISCVMCRegisterClasses, 76, RISCVRegUnitRoots, 103, RISCVRegDiffLists, RISCVLaneMaskLists, RISCVRegStrings, RISCVRegClassStrings, RISCVSubRegIdxLists, 52,
RISCVSubRegIdxRanges, RISCVRegEncodingTable);

  switch (DwarfFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    RI->mapDwarfRegsToLLVMRegs(RISCVDwarfFlavour0Dwarf2L, RISCVDwarfFlavour0Dwarf2LSize, false);
    break;
  }
  switch (EHFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    RI->mapDwarfRegsToLLVMRegs(RISCVEHFlavour0Dwarf2L, RISCVEHFlavour0Dwarf2LSize, true);
    break;
  }
  switch (DwarfFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    RI->mapLLVMRegsToDwarfRegs(RISCVDwarfFlavour0L2Dwarf, RISCVDwarfFlavour0L2DwarfSize, false);
    break;
  }
  switch (EHFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    RI->mapLLVMRegsToDwarfRegs(RISCVEHFlavour0L2Dwarf, RISCVEHFlavour0L2DwarfSize, true);
    break;
  }
}

} // end namespace llvm

#endif // GET_REGINFO_MC_DESC

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Register Information Header Fragment                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#ifdef GET_REGINFO_HEADER
#undef GET_REGINFO_HEADER

#include "llvm/CodeGen/TargetRegisterInfo.h"

namespace llvm {

class RISCVFrameLowering;

struct RISCVGenRegisterInfo : public TargetRegisterInfo {
  explicit RISCVGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0,
      unsigned PC = 0, unsigned HwMode = 0);
  unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override;
  LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
  const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override;
  const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override;
  const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override;
  unsigned getRegUnitWeight(unsigned RegUnit) const override;
  unsigned getNumRegPressureSets() const override;
  const char *getRegPressureSetName(unsigned Idx) const override;
  unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override;
  const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override;
  const int *getRegUnitPressureSets(unsigned RegUnit) const override;
  ArrayRef<const char *> getRegMaskNames() const override;
  ArrayRef<const uint32_t *> getRegMasks() const override;
  bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override;
  bool isFixedRegister(const MachineFunction &, MCRegister) const override;
  bool isArgumentRegister(const MachineFunction &, MCRegister) const override;
  bool isConstantPhysReg(MCRegister PhysReg) const override final;
  /// Devirtualized TargetFrameLowering.
  static const RISCVFrameLowering *getFrameLowering(
      const MachineFunction &MF);
};

namespace RISCV { // Register classes
  extern const TargetRegisterClass FPR16RegClass;
  extern const TargetRegisterClass AnyRegRegClass;
  extern const TargetRegisterClass AnyReg_with_sub_16RegClass;
  extern const TargetRegisterClass FPR32RegClass;
  extern const TargetRegisterClass GPRRegClass;
  extern const TargetRegisterClass GPRF16RegClass;
  extern const TargetRegisterClass GPRF32RegClass;
  extern const TargetRegisterClass GPRF64RegClass;
  extern const TargetRegisterClass GPRNoX0RegClass;
  extern const TargetRegisterClass GPRNoX0X2RegClass;
  extern const TargetRegisterClass GPRJALRRegClass;
  extern const TargetRegisterClass GPRTCRegClass;
  extern const TargetRegisterClass AnyReg_with_sub_16_with_sub_32_in_FPR32CRegClass;
  extern const TargetRegisterClass FPR32CRegClass;
  extern const TargetRegisterClass GPRCRegClass;
  extern const TargetRegisterClass GPRC_and_GPRTCRegClass;
  extern const TargetRegisterClass VCSRRegClass;
  extern const TargetRegisterClass GPRX0RegClass;
  extern const TargetRegisterClass SPRegClass;
  extern const TargetRegisterClass FPR64RegClass;
  extern const TargetRegisterClass VMRegClass;
  extern const TargetRegisterClass VRRegClass;
  extern const TargetRegisterClass VRNoV0RegClass;
  extern const TargetRegisterClass GPRPF64RegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRNoX0RegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRNoX0X2RegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRJALRRegClass;
  extern const TargetRegisterClass FPR64CRegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRTCRegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRCRegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRC_and_GPRTCRegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRX0RegClass;
  extern const TargetRegisterClass GPRPF64_with_sub_32_in_SPRegClass;
  extern const TargetRegisterClass VMV0RegClass;
  extern const TargetRegisterClass VRN2M1RegClass;
  extern const TargetRegisterClass VRN2M1NoV0RegClass;
  extern const TargetRegisterClass VRM2RegClass;
  extern const TargetRegisterClass VRM2NoV0RegClass;
  extern const TargetRegisterClass VRM2_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN2M1_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN3M1RegClass;
  extern const TargetRegisterClass VRN3M1NoV0RegClass;
  extern const TargetRegisterClass VRN3M1_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN4M1RegClass;
  extern const TargetRegisterClass VRN4M1NoV0RegClass;
  extern const TargetRegisterClass VRN2M2RegClass;
  extern const TargetRegisterClass VRN2M2NoV0RegClass;
  extern const TargetRegisterClass VRM4RegClass;
  extern const TargetRegisterClass VRM4NoV0RegClass;
  extern const TargetRegisterClass VRM4_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN2M2_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN4M1_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN5M1RegClass;
  extern const TargetRegisterClass VRN5M1NoV0RegClass;
  extern const TargetRegisterClass VRN5M1_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN6M1RegClass;
  extern const TargetRegisterClass VRN6M1NoV0RegClass;
  extern const TargetRegisterClass VRN3M2RegClass;
  extern const TargetRegisterClass VRN3M2NoV0RegClass;
  extern const TargetRegisterClass VRN3M2_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN6M1_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN7M1RegClass;
  extern const TargetRegisterClass VRN7M1NoV0RegClass;
  extern const TargetRegisterClass VRN7M1_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN8M1RegClass;
  extern const TargetRegisterClass VRN8M1NoV0RegClass;
  extern const TargetRegisterClass VRN4M2RegClass;
  extern const TargetRegisterClass VRN4M2NoV0RegClass;
  extern const TargetRegisterClass VRN2M4RegClass;
  extern const TargetRegisterClass VRN2M4NoV0RegClass;
  extern const TargetRegisterClass VRM8RegClass;
  extern const TargetRegisterClass VRM8NoV0RegClass;
  extern const TargetRegisterClass VRM8_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN2M4_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN4M2_with_sub_vrm1_0_in_VMV0RegClass;
  extern const TargetRegisterClass VRN8M1_with_sub_vrm1_0_in_VMV0RegClass;
} // end namespace RISCV

} // end namespace llvm

#endif // GET_REGINFO_HEADER

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Target Register and Register Classes Information                           *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#ifdef GET_REGINFO_TARGET_DESC
#undef GET_REGINFO_TARGET_DESC

namespace llvm {

extern const MCRegisterClass RISCVMCRegisterClasses[];

static const MVT::SimpleValueType VTLists[] = {
  /* 0 */ MVT::i32, MVT::Other,
  /* 2 */ MVT::i64, MVT::Other,
  /* 4 */ MVT::f16, MVT::Other,
  /* 6 */ MVT::f32, MVT::Other,
  /* 8 */ MVT::f64, MVT::Other,
  /* 10 */ MVT::nxv8i8, MVT::nxv4i16, MVT::nxv2i32, MVT::nxv1i64, MVT::nxv4f16, MVT::nxv2f32, MVT::nxv1f64, MVT::nxv4i8, MVT::nxv2i8, MVT::nxv1i8, MVT::nxv2i16, MVT::nxv1i16, MVT::nxv1i32, MVT::nxv1f16, MVT::nxv2f16, MVT::nxv1f32, MVT::nxv64i1, MVT::nxv32i1, MVT::nxv16i1, MVT::nxv8i1, MVT::nxv4i1, MVT::nxv2i1, MVT::nxv1i1, MVT::Other,
  /* 34 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv8f16, MVT::nxv4f32, MVT::nxv2f64, MVT::Other,
  /* 42 */ MVT::nxv32i8, MVT::nxv16i16, MVT::nxv8i32, MVT::nxv4i64, MVT::nxv16f16, MVT::nxv8f32, MVT::nxv4f64, MVT::Other,
  /* 50 */ MVT::nxv64i8, MVT::nxv32i16, MVT::nxv16i32, MVT::nxv8i64, MVT::nxv32f16, MVT::nxv16f32, MVT::nxv8f64, MVT::Other,
  /* 58 */ MVT::Untyped, MVT::Other,
};

static const char *SubRegIndexNameTable[] = { "sub_16", "sub_32", "sub_32_hi", "sub_vrm1_0", "sub_vrm1_1", "sub_vrm1_2", "sub_vrm1_3", "sub_vrm1_4", "sub_vrm1_5", "sub_vrm1_6", "sub_vrm1_7", "sub_vrm2_0", "sub_vrm2_1", "sub_vrm2_2", "sub_vrm2_3", "sub_vrm4_0", "sub_vrm4_1", "sub_vrm1_0_sub_vrm1_1", "sub_vrm1_0_sub_vrm1_1_sub_vrm1_2", "sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3", "sub_vrm1_1_sub_vrm1_2", "sub_vrm1_1_sub_vrm1_2_sub_vrm1_3", "sub_vrm1_2_sub_vrm1_3", "sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4", "sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5", "sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6", "sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7", "sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4", "sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5", "sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6", "sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7", "sub_vrm1_2_sub_vrm1_3_sub_vrm1_4", "sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5", "sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6", "sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7", "sub_vrm1_3_sub_vrm1_4", "sub_vrm1_3_sub_vrm1_4_sub_vrm1_5", "sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6", "sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7", "sub_vrm1_4_sub_vrm1_5", "sub_vrm1_4_sub_vrm1_5_sub_vrm1_6", "sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7", "sub_vrm1_5_sub_vrm1_6", "sub_vrm1_5_sub_vrm1_6_sub_vrm1_7", "sub_vrm1_6_sub_vrm1_7", "sub_vrm2_0_sub_vrm2_1", "sub_vrm2_0_sub_vrm2_1_sub_vrm2_2", "sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3", "sub_vrm2_1_sub_vrm2_2", "sub_vrm2_1_sub_vrm2_2_sub_vrm2_3", "sub_vrm2_2_sub_vrm2_3", "" };


static const LaneBitmask SubRegIndexLaneMaskTable[] = {
  LaneBitmask::getAll(),
  LaneBitmask(0x0000000000000001), // sub_16
  LaneBitmask(0x0000000000000001), // sub_32
  LaneBitmask(0x0000000000000002), // sub_32_hi
  LaneBitmask(0x0000000000000004), // sub_vrm1_0
  LaneBitmask(0x0000000000000008), // sub_vrm1_1
  LaneBitmask(0x0000000000000010), // sub_vrm1_2
  LaneBitmask(0x0000000000000020), // sub_vrm1_3
  LaneBitmask(0x0000000000000040), // sub_vrm1_4
  LaneBitmask(0x0000000000000080), // sub_vrm1_5
  LaneBitmask(0x0000000000000100), // sub_vrm1_6
  LaneBitmask(0x0000000000000200), // sub_vrm1_7
  LaneBitmask(0x000000000000000C), // sub_vrm2_0
  LaneBitmask(0x0000000000000030), // sub_vrm2_1
  LaneBitmask(0x00000000000000C0), // sub_vrm2_2
  LaneBitmask(0x0000000000000300), // sub_vrm2_3
  LaneBitmask(0x000000000000003C), // sub_vrm4_0
  LaneBitmask(0x00000000000003C0), // sub_vrm4_1
  LaneBitmask(0x000000000000000C), // sub_vrm1_0_sub_vrm1_1
  LaneBitmask(0x000000000000001C), // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
  LaneBitmask(0x000000000000003C), // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  LaneBitmask(0x0000000000000018), // sub_vrm1_1_sub_vrm1_2
  LaneBitmask(0x0000000000000038), // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  LaneBitmask(0x0000000000000030), // sub_vrm1_2_sub_vrm1_3
  LaneBitmask(0x000000000000007C), // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  LaneBitmask(0x00000000000000FC), // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  LaneBitmask(0x00000000000001FC), // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  LaneBitmask(0x00000000000003FC), // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  LaneBitmask(0x0000000000000078), // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  LaneBitmask(0x00000000000000F8), // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  LaneBitmask(0x00000000000001F8), // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  LaneBitmask(0x00000000000003F8), // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  LaneBitmask(0x0000000000000070), // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  LaneBitmask(0x00000000000000F0), // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  LaneBitmask(0x00000000000001F0), // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  LaneBitmask(0x00000000000003F0), // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  LaneBitmask(0x0000000000000060), // sub_vrm1_3_sub_vrm1_4
  LaneBitmask(0x00000000000000E0), // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  LaneBitmask(0x00000000000001E0), // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  LaneBitmask(0x00000000000003E0), // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  LaneBitmask(0x00000000000000C0), // sub_vrm1_4_sub_vrm1_5
  LaneBitmask(0x00000000000001C0), // sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  LaneBitmask(0x00000000000003C0), // sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  LaneBitmask(0x0000000000000180), // sub_vrm1_5_sub_vrm1_6
  LaneBitmask(0x0000000000000380), // sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
  LaneBitmask(0x0000000000000300), // sub_vrm1_6_sub_vrm1_7
  LaneBitmask(0x000000000000003C), // sub_vrm2_0_sub_vrm2_1
  LaneBitmask(0x00000000000000FC), // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
  LaneBitmask(0x00000000000003FC), // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
  LaneBitmask(0x00000000000000F0), // sub_vrm2_1_sub_vrm2_2
  LaneBitmask(0x00000000000003F0), // sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
  LaneBitmask(0x00000000000003C0), // sub_vrm2_2_sub_vrm2_3
 };


static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = {
  // Mode = 0 (Default)
  { 16, 16, 16, VTLists+4 },    // FPR16
  { 32, 32, 32, VTLists+58 },    // AnyReg
  { 32, 32, 32, VTLists+58 },    // AnyReg_with_sub_16
  { 32, 32, 32, VTLists+6 },    // FPR32
  { 32, 32, 32, VTLists+0 },    // GPR
  { 32, 32, 32, VTLists+4 },    // GPRF16
  { 32, 32, 32, VTLists+6 },    // GPRF32
  { 32, 32, 32, VTLists+8 },    // GPRF64
  { 32, 32, 32, VTLists+0 },    // GPRNoX0
  { 32, 32, 32, VTLists+0 },    // GPRNoX0X2
  { 32, 32, 32, VTLists+0 },    // GPRJALR
  { 32, 32, 32, VTLists+0 },    // GPRTC
  { 32, 32, 32, VTLists+58 },    // AnyReg_with_sub_16_with_sub_32_in_FPR32C
  { 32, 32, 32, VTLists+6 },    // FPR32C
  { 32, 32, 32, VTLists+0 },    // GPRC
  { 32, 32, 32, VTLists+0 },    // GPRC_and_GPRTC
  { 32, 32, 32, VTLists+0 },    // VCSR
  { 32, 32, 32, VTLists+0 },    // GPRX0
  { 32, 32, 32, VTLists+0 },    // SP
  { 64, 64, 64, VTLists+8 },    // FPR64
  { 64, 64, 64, VTLists+26 },    // VM
  { 64, 64, 64, VTLists+10 },    // VR
  { 64, 64, 64, VTLists+10 },    // VRNoV0
  { 64, 64, 64, VTLists+8 },    // GPRPF64
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRNoX0
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRNoX0X2
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRJALR
  { 64, 64, 64, VTLists+8 },    // FPR64C
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRTC
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRC
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRC_and_GPRTC
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRX0
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_SP
  { 64, 64, 64, VTLists+26 },    // VMV0
  { 128, 128, 64, VTLists+58 },    // VRN2M1
  { 128, 128, 64, VTLists+58 },    // VRN2M1NoV0
  { 128, 128, 64, VTLists+34 },    // VRM2
  { 128, 128, 64, VTLists+34 },    // VRM2NoV0
  { 128, 128, 64, VTLists+34 },    // VRM2_with_sub_vrm1_0_in_VMV0
  { 128, 128, 64, VTLists+58 },    // VRN2M1_with_sub_vrm1_0_in_VMV0
  { 192, 192, 64, VTLists+58 },    // VRN3M1
  { 192, 192, 64, VTLists+58 },    // VRN3M1NoV0
  { 192, 192, 64, VTLists+58 },    // VRN3M1_with_sub_vrm1_0_in_VMV0
  { 256, 256, 64, VTLists+58 },    // VRN4M1
  { 256, 256, 64, VTLists+58 },    // VRN4M1NoV0
  { 256, 256, 64, VTLists+58 },    // VRN2M2
  { 256, 256, 64, VTLists+58 },    // VRN2M2NoV0
  { 256, 256, 64, VTLists+42 },    // VRM4
  { 256, 256, 64, VTLists+42 },    // VRM4NoV0
  { 256, 256, 64, VTLists+42 },    // VRM4_with_sub_vrm1_0_in_VMV0
  { 256, 256, 64, VTLists+58 },    // VRN2M2_with_sub_vrm1_0_in_VMV0
  { 256, 256, 64, VTLists+58 },    // VRN4M1_with_sub_vrm1_0_in_VMV0
  { 320, 320, 64, VTLists+58 },    // VRN5M1
  { 320, 320, 64, VTLists+58 },    // VRN5M1NoV0
  { 320, 320, 64, VTLists+58 },    // VRN5M1_with_sub_vrm1_0_in_VMV0
  { 384, 384, 64, VTLists+58 },    // VRN6M1
  { 384, 384, 64, VTLists+58 },    // VRN6M1NoV0
  { 384, 384, 64, VTLists+58 },    // VRN3M2
  { 384, 384, 64, VTLists+58 },    // VRN3M2NoV0
  { 384, 384, 64, VTLists+58 },    // VRN3M2_with_sub_vrm1_0_in_VMV0
  { 384, 384, 64, VTLists+58 },    // VRN6M1_with_sub_vrm1_0_in_VMV0
  { 448, 448, 64, VTLists+58 },    // VRN7M1
  { 448, 448, 64, VTLists+58 },    // VRN7M1NoV0
  { 448, 448, 64, VTLists+58 },    // VRN7M1_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN8M1
  { 512, 512, 64, VTLists+58 },    // VRN8M1NoV0
  { 512, 512, 64, VTLists+58 },    // VRN4M2
  { 512, 512, 64, VTLists+58 },    // VRN4M2NoV0
  { 512, 512, 64, VTLists+58 },    // VRN2M4
  { 512, 512, 64, VTLists+58 },    // VRN2M4NoV0
  { 512, 512, 64, VTLists+50 },    // VRM8
  { 512, 512, 64, VTLists+50 },    // VRM8NoV0
  { 512, 512, 64, VTLists+50 },    // VRM8_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN2M4_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN4M2_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN8M1_with_sub_vrm1_0_in_VMV0
  // Mode = 1 (RV64)
  { 16, 16, 16, VTLists+4 },    // FPR16
  { 32, 32, 32, VTLists+58 },    // AnyReg
  { 32, 32, 32, VTLists+58 },    // AnyReg_with_sub_16
  { 32, 32, 32, VTLists+6 },    // FPR32
  { 64, 64, 64, VTLists+2 },    // GPR
  { 64, 64, 64, VTLists+4 },    // GPRF16
  { 64, 64, 64, VTLists+6 },    // GPRF32
  { 64, 64, 64, VTLists+8 },    // GPRF64
  { 64, 64, 64, VTLists+2 },    // GPRNoX0
  { 64, 64, 64, VTLists+2 },    // GPRNoX0X2
  { 64, 64, 64, VTLists+2 },    // GPRJALR
  { 64, 64, 64, VTLists+2 },    // GPRTC
  { 32, 32, 32, VTLists+58 },    // AnyReg_with_sub_16_with_sub_32_in_FPR32C
  { 32, 32, 32, VTLists+6 },    // FPR32C
  { 64, 64, 64, VTLists+2 },    // GPRC
  { 64, 64, 64, VTLists+2 },    // GPRC_and_GPRTC
  { 64, 64, 64, VTLists+2 },    // VCSR
  { 64, 64, 64, VTLists+2 },    // GPRX0
  { 64, 64, 64, VTLists+2 },    // SP
  { 64, 64, 64, VTLists+8 },    // FPR64
  { 64, 64, 64, VTLists+26 },    // VM
  { 64, 64, 64, VTLists+10 },    // VR
  { 64, 64, 64, VTLists+10 },    // VRNoV0
  { 64, 64, 64, VTLists+8 },    // GPRPF64
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRNoX0
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRNoX0X2
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRJALR
  { 64, 64, 64, VTLists+8 },    // FPR64C
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRTC
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRC
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRC_and_GPRTC
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_GPRX0
  { 64, 64, 64, VTLists+8 },    // GPRPF64_with_sub_32_in_SP
  { 64, 64, 64, VTLists+26 },    // VMV0
  { 128, 128, 64, VTLists+58 },    // VRN2M1
  { 128, 128, 64, VTLists+58 },    // VRN2M1NoV0
  { 128, 128, 64, VTLists+34 },    // VRM2
  { 128, 128, 64, VTLists+34 },    // VRM2NoV0
  { 128, 128, 64, VTLists+34 },    // VRM2_with_sub_vrm1_0_in_VMV0
  { 128, 128, 64, VTLists+58 },    // VRN2M1_with_sub_vrm1_0_in_VMV0
  { 192, 192, 64, VTLists+58 },    // VRN3M1
  { 192, 192, 64, VTLists+58 },    // VRN3M1NoV0
  { 192, 192, 64, VTLists+58 },    // VRN3M1_with_sub_vrm1_0_in_VMV0
  { 256, 256, 64, VTLists+58 },    // VRN4M1
  { 256, 256, 64, VTLists+58 },    // VRN4M1NoV0
  { 256, 256, 64, VTLists+58 },    // VRN2M2
  { 256, 256, 64, VTLists+58 },    // VRN2M2NoV0
  { 256, 256, 64, VTLists+42 },    // VRM4
  { 256, 256, 64, VTLists+42 },    // VRM4NoV0
  { 256, 256, 64, VTLists+42 },    // VRM4_with_sub_vrm1_0_in_VMV0
  { 256, 256, 64, VTLists+58 },    // VRN2M2_with_sub_vrm1_0_in_VMV0
  { 256, 256, 64, VTLists+58 },    // VRN4M1_with_sub_vrm1_0_in_VMV0
  { 320, 320, 64, VTLists+58 },    // VRN5M1
  { 320, 320, 64, VTLists+58 },    // VRN5M1NoV0
  { 320, 320, 64, VTLists+58 },    // VRN5M1_with_sub_vrm1_0_in_VMV0
  { 384, 384, 64, VTLists+58 },    // VRN6M1
  { 384, 384, 64, VTLists+58 },    // VRN6M1NoV0
  { 384, 384, 64, VTLists+58 },    // VRN3M2
  { 384, 384, 64, VTLists+58 },    // VRN3M2NoV0
  { 384, 384, 64, VTLists+58 },    // VRN3M2_with_sub_vrm1_0_in_VMV0
  { 384, 384, 64, VTLists+58 },    // VRN6M1_with_sub_vrm1_0_in_VMV0
  { 448, 448, 64, VTLists+58 },    // VRN7M1
  { 448, 448, 64, VTLists+58 },    // VRN7M1NoV0
  { 448, 448, 64, VTLists+58 },    // VRN7M1_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN8M1
  { 512, 512, 64, VTLists+58 },    // VRN8M1NoV0
  { 512, 512, 64, VTLists+58 },    // VRN4M2
  { 512, 512, 64, VTLists+58 },    // VRN4M2NoV0
  { 512, 512, 64, VTLists+58 },    // VRN2M4
  { 512, 512, 64, VTLists+58 },    // VRN2M4NoV0
  { 512, 512, 64, VTLists+50 },    // VRM8
  { 512, 512, 64, VTLists+50 },    // VRM8NoV0
  { 512, 512, 64, VTLists+50 },    // VRM8_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN2M4_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN4M2_with_sub_vrm1_0_in_VMV0
  { 512, 512, 64, VTLists+58 },    // VRN8M1_with_sub_vrm1_0_in_VMV0
};

static const TargetRegisterClass *const NullRegClasses[] = { nullptr };

static const uint32_t FPR16SubClassMask[] = {
  0x00000001, 0x00000000, 0x00000000, 
  0x0808300c, 0x00000000, 0x00000000, // sub_16
};

static const uint32_t AnyRegSubClassMask[] = {
  0x087edff6, 0x00000002, 0x00000000, 
  0xf7800000, 0x00000001, 0x00000000, // sub_32
  0xf7800000, 0x00000001, 0x00000000, // sub_32_hi
  0x00000000, 0xfffffffc, 0x00000fff, // sub_vrm1_0
  0x00000000, 0xfffffffc, 0x00000fff, // sub_vrm1_1
  0x00000000, 0xffffff00, 0x00000fff, // sub_vrm1_2
  0x00000000, 0xfffff800, 0x00000fff, // sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000fff, // sub_vrm1_4
  0x00000000, 0xff800000, 0x00000fff, // sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000fff, // sub_vrm1_6
  0x00000000, 0x00000000, 0x00000fff, // sub_vrm1_7
};

static const uint32_t AnyReg_with_sub_16SubClassMask[] = {
  0x08081004, 0x00000000, 0x00000000, 
};

static const uint32_t FPR32SubClassMask[] = {
  0x00002008, 0x00000000, 0x00000000, 
  0x08081004, 0x00000000, 0x00000000, // sub_32
};

static const uint32_t GPRSubClassMask[] = {
  0x0006cff0, 0x00000000, 0x00000000, 
  0xf7800000, 0x00000001, 0x00000000, // sub_32
  0xf7800000, 0x00000001, 0x00000000, // sub_32_hi
};

static const uint32_t GPRF16SubClassMask[] = {
  0x0006cff0, 0x00000000, 0x00000000, 
  0xf7800000, 0x00000001, 0x00000000, // sub_32
  0xf7800000, 0x00000001, 0x00000000, // sub_32_hi
};

static const uint32_t GPRF32SubClassMask[] = {
  0x0006cff0, 0x00000000, 0x00000000, 
  0xf7800000, 0x00000001, 0x00000000, // sub_32
  0xf7800000, 0x00000001, 0x00000000, // sub_32_hi
};

static const uint32_t GPRF64SubClassMask[] = {
  0x0006cff0, 0x00000000, 0x00000000, 
  0xf7800000, 0x00000001, 0x00000000, // sub_32
  0xf7800000, 0x00000001, 0x00000000, // sub_32_hi
};

static const uint32_t GPRNoX0SubClassMask[] = {
  0x0004cf00, 0x00000000, 0x00000000, 
  0x77000000, 0x00000001, 0x00000000, // sub_32
  0xf7800000, 0x00000001, 0x00000000, // sub_32_hi
};

static const uint32_t GPRNoX0X2SubClassMask[] = {
  0x0000ce00, 0x00000000, 0x00000000, 
  0x76000000, 0x00000000, 0x00000000, // sub_32
  0xf7800000, 0x00000001, 0x00000000, // sub_32_hi
};

static const uint32_t GPRJALRSubClassMask[] = {
  0x0000cc00, 0x00000000, 0x00000000, 
  0x74000000, 0x00000000, 0x00000000, // sub_32
  0x74000000, 0x00000000, 0x00000000, // sub_32_hi
};

static const uint32_t GPRTCSubClassMask[] = {
  0x00008800, 0x00000000, 0x00000000, 
  0x50000000, 0x00000000, 0x00000000, // sub_32
  0x50000000, 0x00000000, 0x00000000, // sub_32_hi
};

static const uint32_t AnyReg_with_sub_16_with_sub_32_in_FPR32CSubClassMask[] = {
  0x08001000, 0x00000000, 0x00000000, 
};

static const uint32_t FPR32CSubClassMask[] = {
  0x00002000, 0x00000000, 0x00000000, 
  0x08001000, 0x00000000, 0x00000000, // sub_32
};

static const uint32_t GPRCSubClassMask[] = {
  0x0000c000, 0x00000000, 0x00000000, 
  0x60000000, 0x00000000, 0x00000000, // sub_32
  0x60000000, 0x00000000, 0x00000000, // sub_32_hi
};

static const uint32_t GPRC_and_GPRTCSubClassMask[] = {
  0x00008000, 0x00000000, 0x00000000, 
  0x40000000, 0x00000000, 0x00000000, // sub_32
  0x40000000, 0x00000000, 0x00000000, // sub_32_hi
};

static const uint32_t VCSRSubClassMask[] = {
  0x00010000, 0x00000000, 0x00000000, 
};

static const uint32_t GPRX0SubClassMask[] = {
  0x00020000, 0x00000000, 0x00000000, 
  0x80000000, 0x00000000, 0x00000000, // sub_32
};

static const uint32_t SPSubClassMask[] = {
  0x00040000, 0x00000000, 0x00000000, 
  0x00000000, 0x00000001, 0x00000000, // sub_32
};

static const uint32_t FPR64SubClassMask[] = {
  0x08080000, 0x00000000, 0x00000000, 
};

static const uint32_t VMSubClassMask[] = {
  0x00700000, 0x00000002, 0x00000000, 
  0x00000000, 0xfffffffc, 0x00000fff, // sub_vrm1_0
  0x00000000, 0xfffffffc, 0x00000fff, // sub_vrm1_1
  0x00000000, 0xffffff00, 0x00000fff, // sub_vrm1_2
  0x00000000, 0xfffff800, 0x00000fff, // sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000fff, // sub_vrm1_4
  0x00000000, 0xff800000, 0x00000fff, // sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000fff, // sub_vrm1_6
  0x00000000, 0x00000000, 0x00000fff, // sub_vrm1_7
};

static const uint32_t VRSubClassMask[] = {
  0x00700000, 0x00000002, 0x00000000, 
  0x00000000, 0xfffffffc, 0x00000fff, // sub_vrm1_0
  0x00000000, 0xfffffffc, 0x00000fff, // sub_vrm1_1
  0x00000000, 0xffffff00, 0x00000fff, // sub_vrm1_2
  0x00000000, 0xfffff800, 0x00000fff, // sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000fff, // sub_vrm1_4
  0x00000000, 0xff800000, 0x00000fff, // sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000fff, // sub_vrm1_6
  0x00000000, 0x00000000, 0x00000fff, // sub_vrm1_7
};

static const uint32_t VRNoV0SubClassMask[] = {
  0x00400000, 0x00000000, 0x00000000, 
  0x00000000, 0x45215228, 0x000000aa, // sub_vrm1_0
  0x00000000, 0xfffffffc, 0x00000fff, // sub_vrm1_1
  0x00000000, 0xffffff00, 0x00000fff, // sub_vrm1_2
  0x00000000, 0xfffff800, 0x00000fff, // sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000fff, // sub_vrm1_4
  0x00000000, 0xff800000, 0x00000fff, // sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000fff, // sub_vrm1_6
  0x00000000, 0x00000000, 0x00000fff, // sub_vrm1_7
};

static const uint32_t GPRPF64SubClassMask[] = {
  0xf7800000, 0x00000001, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_GPRNoX0SubClassMask[] = {
  0x77000000, 0x00000001, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_GPRNoX0X2SubClassMask[] = {
  0x76000000, 0x00000000, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_GPRJALRSubClassMask[] = {
  0x74000000, 0x00000000, 0x00000000, 
};

static const uint32_t FPR64CSubClassMask[] = {
  0x08000000, 0x00000000, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_GPRTCSubClassMask[] = {
  0x50000000, 0x00000000, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_GPRCSubClassMask[] = {
  0x60000000, 0x00000000, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_GPRC_and_GPRTCSubClassMask[] = {
  0x40000000, 0x00000000, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_GPRX0SubClassMask[] = {
  0x80000000, 0x00000000, 0x00000000, 
};

static const uint32_t GPRPF64_with_sub_32_in_SPSubClassMask[] = {
  0x00000000, 0x00000001, 0x00000000, 
};

static const uint32_t VMV0SubClassMask[] = {
  0x00000000, 0x00000002, 0x00000000, 
  0x00000000, 0x984e04c0, 0x00000f00, // sub_vrm1_0
};

static const uint32_t VRN2M1SubClassMask[] = {
  0x00000000, 0x0000008c, 0x00000000, 
  0x00000000, 0xfffc7f00, 0x00000e3f, // sub_vrm1_0_sub_vrm1_1
  0x00000000, 0xfffc7f00, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2
  0x00000000, 0xfffc7800, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN2M1NoV0SubClassMask[] = {
  0x00000000, 0x00000008, 0x00000000, 
  0x00000000, 0x45205200, 0x0000002a, // sub_vrm1_0_sub_vrm1_1
  0x00000000, 0xfffc7f00, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2
  0x00000000, 0xfffc7800, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRM2SubClassMask[] = {
  0x00000000, 0x00000070, 0x00000000, 
  0x00000000, 0x0e07e000, 0x000007fc, // sub_vrm2_0
  0x00000000, 0x0e07e000, 0x000007fc, // sub_vrm2_1
  0x00000000, 0x0e000000, 0x000007fc, // sub_vrm2_2
  0x00000000, 0x00000000, 0x000007fc, // sub_vrm2_3
};

static const uint32_t VRM2NoV0SubClassMask[] = {
  0x00000000, 0x00000020, 0x00000000, 
  0x00000000, 0x04014000, 0x000000a8, // sub_vrm2_0
  0x00000000, 0x0e07e000, 0x000007fc, // sub_vrm2_1
  0x00000000, 0x0e000000, 0x000007fc, // sub_vrm2_2
  0x00000000, 0x00000000, 0x000007fc, // sub_vrm2_3
};

static const uint32_t VRM2_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00000040, 0x00000000, 
  0x00000000, 0x08060000, 0x00000700, // sub_vrm2_0
};

static const uint32_t VRN2M1_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00000080, 0x00000000, 
  0x00000000, 0x984c0400, 0x00000e00, // sub_vrm1_0_sub_vrm1_1
};

static const uint32_t VRN3M1SubClassMask[] = {
  0x00000000, 0x00000700, 0x00000000, 
  0x00000000, 0xfffc7800, 0x00000e3f, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
  0x00000000, 0xfffc7800, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN3M1NoV0SubClassMask[] = {
  0x00000000, 0x00000200, 0x00000000, 
  0x00000000, 0x45205000, 0x0000002a, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
  0x00000000, 0xfffc7800, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN3M1_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00000400, 0x00000000, 
  0x00000000, 0x984c0000, 0x00000e00, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
};

static const uint32_t VRN4M1SubClassMask[] = {
  0x00000000, 0x00081800, 0x00000000, 
  0x00000000, 0xfff46000, 0x00000e3f, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN4M1NoV0SubClassMask[] = {
  0x00000000, 0x00001000, 0x00000000, 
  0x00000000, 0x45204000, 0x0000002a, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
  0x00000000, 0xfff00000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN2M2SubClassMask[] = {
  0x00000000, 0x00046000, 0x00000000, 
  0x00000000, 0x0e000000, 0x0000063c, // sub_vrm2_0_sub_vrm2_1
  0x00000000, 0x0e000000, 0x0000063c, // sub_vrm2_1_sub_vrm2_2
  0x00000000, 0x00000000, 0x0000063c, // sub_vrm2_2_sub_vrm2_3
};

static const uint32_t VRN2M2NoV0SubClassMask[] = {
  0x00000000, 0x00004000, 0x00000000, 
  0x00000000, 0x04000000, 0x00000028, // sub_vrm2_0_sub_vrm2_1
  0x00000000, 0x0e000000, 0x0000063c, // sub_vrm2_1_sub_vrm2_2
  0x00000000, 0x00000000, 0x0000063c, // sub_vrm2_2_sub_vrm2_3
};

static const uint32_t VRM4SubClassMask[] = {
  0x00000000, 0x00038000, 0x00000000, 
  0x00000000, 0x00000000, 0x000003f0, // sub_vrm4_0
  0x00000000, 0x00000000, 0x000003f0, // sub_vrm4_1
};

static const uint32_t VRM4NoV0SubClassMask[] = {
  0x00000000, 0x00010000, 0x00000000, 
  0x00000000, 0x00000000, 0x000000a0, // sub_vrm4_0
  0x00000000, 0x00000000, 0x000003f0, // sub_vrm4_1
};

static const uint32_t VRM4_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00020000, 0x00000000, 
  0x00000000, 0x00000000, 0x00000300, // sub_vrm4_0
};

static const uint32_t VRN2M2_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00040000, 0x00000000, 
  0x00000000, 0x08000000, 0x00000600, // sub_vrm2_0_sub_vrm2_1
};

static const uint32_t VRN4M1_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00080000, 0x00000000, 
  0x00000000, 0x98440000, 0x00000e00, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
};

static const uint32_t VRN5M1SubClassMask[] = {
  0x00000000, 0x00700000, 0x00000000, 
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN5M1NoV0SubClassMask[] = {
  0x00000000, 0x00200000, 0x00000000, 
  0x00000000, 0x45000000, 0x0000002a, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
  0x00000000, 0xff800000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN5M1_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00400000, 0x00000000, 
  0x00000000, 0x98000000, 0x00000e00, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
};

static const uint32_t VRN6M1SubClassMask[] = {
  0x00000000, 0x11800000, 0x00000000, 
  0x00000000, 0xee000000, 0x00000e3f, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN6M1NoV0SubClassMask[] = {
  0x00000000, 0x01000000, 0x00000000, 
  0x00000000, 0x44000000, 0x0000002a, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
  0x00000000, 0xe0000000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN3M2SubClassMask[] = {
  0x00000000, 0x0e000000, 0x00000000, 
  0x00000000, 0x00000000, 0x0000063c, // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
  0x00000000, 0x00000000, 0x0000063c, // sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
};

static const uint32_t VRN3M2NoV0SubClassMask[] = {
  0x00000000, 0x04000000, 0x00000000, 
  0x00000000, 0x00000000, 0x00000028, // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
  0x00000000, 0x00000000, 0x0000063c, // sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
};

static const uint32_t VRN3M2_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x08000000, 0x00000000, 
  0x00000000, 0x00000000, 0x00000600, // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
};

static const uint32_t VRN6M1_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x10000000, 0x00000000, 
  0x00000000, 0x88000000, 0x00000e00, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
};

static const uint32_t VRN7M1SubClassMask[] = {
  0x00000000, 0xe0000000, 0x00000000, 
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN7M1NoV0SubClassMask[] = {
  0x00000000, 0x40000000, 0x00000000, 
  0x00000000, 0x00000000, 0x0000002a, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
  0x00000000, 0x00000000, 0x00000e3f, // sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN7M1_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x80000000, 0x00000000, 
  0x00000000, 0x00000000, 0x00000e00, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
};

static const uint32_t VRN8M1SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000803, 
  0x00000000, 0x00000000, 0x0000063c, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN8M1NoV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000002, 
  0x00000000, 0x00000000, 0x00000028, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint32_t VRN4M2SubClassMask[] = {
  0x00000000, 0x00000000, 0x0000040c, 
  0x00000000, 0x00000000, 0x00000230, // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
};

static const uint32_t VRN4M2NoV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000008, 
  0x00000000, 0x00000000, 0x00000020, // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
};

static const uint32_t VRN2M4SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000230, 
};

static const uint32_t VRN2M4NoV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000020, 
};

static const uint32_t VRM8SubClassMask[] = {
  0x00000000, 0x00000000, 0x000001c0, 
};

static const uint32_t VRM8NoV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000080, 
};

static const uint32_t VRM8_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000100, 
};

static const uint32_t VRN2M4_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000200, 
};

static const uint32_t VRN4M2_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000400, 
  0x00000000, 0x00000000, 0x00000200, // sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
};

static const uint32_t VRN8M1_with_sub_vrm1_0_in_VMV0SubClassMask[] = {
  0x00000000, 0x00000000, 0x00000800, 
  0x00000000, 0x00000000, 0x00000600, // sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
};

static const uint16_t SuperRegIdxSeqs[] = {
  /* 0 */ 1, 0,
  /* 2 */ 2, 0,
  /* 4 */ 2, 3, 0,
  /* 7 */ 4, 0,
  /* 9 */ 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0,
  /* 20 */ 12, 0,
  /* 22 */ 12, 13, 14, 15, 0,
  /* 27 */ 16, 0,
  /* 29 */ 16, 17, 0,
  /* 32 */ 18, 0,
  /* 34 */ 19, 0,
  /* 36 */ 20, 0,
  /* 38 */ 24, 0,
  /* 40 */ 25, 0,
  /* 42 */ 26, 0,
  /* 44 */ 27, 0,
  /* 46 */ 26, 31, 0,
  /* 49 */ 25, 30, 35, 0,
  /* 53 */ 24, 29, 34, 39, 0,
  /* 58 */ 20, 28, 33, 38, 42, 0,
  /* 64 */ 19, 22, 32, 37, 41, 44, 0,
  /* 71 */ 18, 21, 23, 36, 40, 43, 45, 0,
  /* 79 */ 46, 0,
  /* 81 */ 47, 0,
  /* 83 */ 48, 0,
  /* 85 */ 47, 50, 0,
  /* 88 */ 46, 49, 51, 0,
};

static const TargetRegisterClass *const AnyReg_with_sub_16Superclasses[] = {
  &RISCV::AnyRegRegClass,
  nullptr
};

static const TargetRegisterClass *const GPRSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRF16Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRF32Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF64RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRF64Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRNoX0Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRNoX0X2Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  &RISCV::GPRNoX0RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRJALRSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  &RISCV::GPRNoX0RegClass,
  &RISCV::GPRNoX0X2RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRTCSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  &RISCV::GPRNoX0RegClass,
  &RISCV::GPRNoX0X2RegClass,
  &RISCV::GPRJALRRegClass,
  nullptr
};

static const TargetRegisterClass *const AnyReg_with_sub_16_with_sub_32_in_FPR32CSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::AnyReg_with_sub_16RegClass,
  nullptr
};

static const TargetRegisterClass *const FPR32CSuperclasses[] = {
  &RISCV::FPR32RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRCSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  &RISCV::GPRNoX0RegClass,
  &RISCV::GPRNoX0X2RegClass,
  &RISCV::GPRJALRRegClass,
  nullptr
};

static const TargetRegisterClass *const GPRC_and_GPRTCSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  &RISCV::GPRNoX0RegClass,
  &RISCV::GPRNoX0X2RegClass,
  &RISCV::GPRJALRRegClass,
  &RISCV::GPRTCRegClass,
  &RISCV::GPRCRegClass,
  nullptr
};

static const TargetRegisterClass *const GPRX0Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  nullptr
};

static const TargetRegisterClass *const SPSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::GPRRegClass,
  &RISCV::GPRF16RegClass,
  &RISCV::GPRF32RegClass,
  &RISCV::GPRF64RegClass,
  &RISCV::GPRNoX0RegClass,
  nullptr
};

static const TargetRegisterClass *const FPR64Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::AnyReg_with_sub_16RegClass,
  nullptr
};

static const TargetRegisterClass *const VMSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::VRRegClass,
  nullptr
};

static const TargetRegisterClass *const VRSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::VMRegClass,
  nullptr
};

static const TargetRegisterClass *const VRNoV0Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::VMRegClass,
  &RISCV::VRRegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_GPRNoX0Superclasses[] = {
  &RISCV::GPRPF64RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_GPRNoX0X2Superclasses[] = {
  &RISCV::GPRPF64RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_GPRJALRSuperclasses[] = {
  &RISCV::GPRPF64RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0X2RegClass,
  nullptr
};

static const TargetRegisterClass *const FPR64CSuperclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::AnyReg_with_sub_16RegClass,
  &RISCV::AnyReg_with_sub_16_with_sub_32_in_FPR32CRegClass,
  &RISCV::FPR64RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_GPRTCSuperclasses[] = {
  &RISCV::GPRPF64RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0X2RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRJALRRegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_GPRCSuperclasses[] = {
  &RISCV::GPRPF64RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0X2RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRJALRRegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_GPRC_and_GPRTCSuperclasses[] = {
  &RISCV::GPRPF64RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0X2RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRJALRRegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRTCRegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRCRegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_GPRX0Superclasses[] = {
  &RISCV::GPRPF64RegClass,
  nullptr
};

static const TargetRegisterClass *const GPRPF64_with_sub_32_in_SPSuperclasses[] = {
  &RISCV::GPRPF64RegClass,
  &RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClass,
  nullptr
};

static const TargetRegisterClass *const VMV0Superclasses[] = {
  &RISCV::AnyRegRegClass,
  &RISCV::VMRegClass,
  &RISCV::VRRegClass,
  nullptr
};

static const TargetRegisterClass *const VRN2M1NoV0Superclasses[] = {
  &RISCV::VRN2M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRM2NoV0Superclasses[] = {
  &RISCV::VRM2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRM2_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRM2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN2M1_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN2M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN3M1NoV0Superclasses[] = {
  &RISCV::VRN3M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN3M1_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN3M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN4M1NoV0Superclasses[] = {
  &RISCV::VRN4M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN2M2NoV0Superclasses[] = {
  &RISCV::VRN2M2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRM4NoV0Superclasses[] = {
  &RISCV::VRM4RegClass,
  nullptr
};

static const TargetRegisterClass *const VRM4_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRM4RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN2M2_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN2M2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN4M1_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN4M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN5M1NoV0Superclasses[] = {
  &RISCV::VRN5M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN5M1_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN5M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN6M1NoV0Superclasses[] = {
  &RISCV::VRN6M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN3M2NoV0Superclasses[] = {
  &RISCV::VRN3M2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN3M2_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN3M2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN6M1_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN6M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN7M1NoV0Superclasses[] = {
  &RISCV::VRN7M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN7M1_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN7M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN8M1NoV0Superclasses[] = {
  &RISCV::VRN8M1RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN4M2NoV0Superclasses[] = {
  &RISCV::VRN4M2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN2M4NoV0Superclasses[] = {
  &RISCV::VRN2M4RegClass,
  nullptr
};

static const TargetRegisterClass *const VRM8NoV0Superclasses[] = {
  &RISCV::VRM8RegClass,
  nullptr
};

static const TargetRegisterClass *const VRM8_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRM8RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN2M4_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN2M4RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN4M2_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN4M2RegClass,
  nullptr
};

static const TargetRegisterClass *const VRN8M1_with_sub_vrm1_0_in_VMV0Superclasses[] = {
  &RISCV::VRN8M1RegClass,
  nullptr
};


namespace RISCV {   // Register class instances
  extern const TargetRegisterClass FPR16RegClass = {
    &RISCVMCRegisterClasses[FPR16RegClassID],
    FPR16SubClassMask,
    SuperRegIdxSeqs + 0,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass AnyRegRegClass = {
    &RISCVMCRegisterClasses[AnyRegRegClassID],
    AnyRegSubClassMask,
    SuperRegIdxSeqs + 9,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass AnyReg_with_sub_16RegClass = {
    &RISCVMCRegisterClasses[AnyReg_with_sub_16RegClassID],
    AnyReg_with_sub_16SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    AnyReg_with_sub_16Superclasses,
    nullptr
  };

  extern const TargetRegisterClass FPR32RegClass = {
    &RISCVMCRegisterClasses[FPR32RegClassID],
    FPR32SubClassMask,
    SuperRegIdxSeqs + 2,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass GPRRegClass = {
    &RISCVMCRegisterClasses[GPRRegClassID],
    GPRSubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRF16RegClass = {
    &RISCVMCRegisterClasses[GPRF16RegClassID],
    GPRF16SubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRF16Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRF32RegClass = {
    &RISCVMCRegisterClasses[GPRF32RegClassID],
    GPRF32SubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRF32Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRF64RegClass = {
    &RISCVMCRegisterClasses[GPRF64RegClassID],
    GPRF64SubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRF64Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRNoX0RegClass = {
    &RISCVMCRegisterClasses[GPRNoX0RegClassID],
    GPRNoX0SubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRNoX0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRNoX0X2RegClass = {
    &RISCVMCRegisterClasses[GPRNoX0X2RegClassID],
    GPRNoX0X2SubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRNoX0X2Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRJALRRegClass = {
    &RISCVMCRegisterClasses[GPRJALRRegClassID],
    GPRJALRSubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRJALRSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRTCRegClass = {
    &RISCVMCRegisterClasses[GPRTCRegClassID],
    GPRTCSubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRTCSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass AnyReg_with_sub_16_with_sub_32_in_FPR32CRegClass = {
    &RISCVMCRegisterClasses[AnyReg_with_sub_16_with_sub_32_in_FPR32CRegClassID],
    AnyReg_with_sub_16_with_sub_32_in_FPR32CSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    AnyReg_with_sub_16_with_sub_32_in_FPR32CSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass FPR32CRegClass = {
    &RISCVMCRegisterClasses[FPR32CRegClassID],
    FPR32CSubClassMask,
    SuperRegIdxSeqs + 2,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    FPR32CSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRCRegClass = {
    &RISCVMCRegisterClasses[GPRCRegClassID],
    GPRCSubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRCSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRC_and_GPRTCRegClass = {
    &RISCVMCRegisterClasses[GPRC_and_GPRTCRegClassID],
    GPRC_and_GPRTCSubClassMask,
    SuperRegIdxSeqs + 4,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRC_and_GPRTCSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass VCSRRegClass = {
    &RISCVMCRegisterClasses[VCSRRegClassID],
    VCSRSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass GPRX0RegClass = {
    &RISCVMCRegisterClasses[GPRX0RegClassID],
    GPRX0SubClassMask,
    SuperRegIdxSeqs + 2,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRX0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass SPRegClass = {
    &RISCVMCRegisterClasses[SPRegClassID],
    SPSubClassMask,
    SuperRegIdxSeqs + 2,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    SPSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass FPR64RegClass = {
    &RISCVMCRegisterClasses[FPR64RegClassID],
    FPR64SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    FPR64Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VMRegClass = {
    &RISCVMCRegisterClasses[VMRegClassID],
    VMSubClassMask,
    SuperRegIdxSeqs + 11,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VMSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass VRRegClass = {
    &RISCVMCRegisterClasses[VRRegClassID],
    VRSubClassMask,
    SuperRegIdxSeqs + 11,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass VRNoV0RegClass = {
    &RISCVMCRegisterClasses[VRNoV0RegClassID],
    VRNoV0SubClassMask,
    SuperRegIdxSeqs + 11,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRNoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64RegClass = {
    &RISCVMCRegisterClasses[GPRPF64RegClassID],
    GPRPF64SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRNoX0RegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_GPRNoX0RegClassID],
    GPRPF64_with_sub_32_in_GPRNoX0SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_GPRNoX0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRNoX0X2RegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_GPRNoX0X2RegClassID],
    GPRPF64_with_sub_32_in_GPRNoX0X2SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_GPRNoX0X2Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRJALRRegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_GPRJALRRegClassID],
    GPRPF64_with_sub_32_in_GPRJALRSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_GPRJALRSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass FPR64CRegClass = {
    &RISCVMCRegisterClasses[FPR64CRegClassID],
    FPR64CSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    FPR64CSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRTCRegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_GPRTCRegClassID],
    GPRPF64_with_sub_32_in_GPRTCSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_GPRTCSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRCRegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_GPRCRegClassID],
    GPRPF64_with_sub_32_in_GPRCSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_GPRCSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRC_and_GPRTCRegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_GPRC_and_GPRTCRegClassID],
    GPRPF64_with_sub_32_in_GPRC_and_GPRTCSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_GPRC_and_GPRTCSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_GPRX0RegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_GPRX0RegClassID],
    GPRPF64_with_sub_32_in_GPRX0SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_GPRX0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass GPRPF64_with_sub_32_in_SPRegClass = {
    &RISCVMCRegisterClasses[GPRPF64_with_sub_32_in_SPRegClassID],
    GPRPF64_with_sub_32_in_SPSubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x0000000000000003),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    GPRPF64_with_sub_32_in_SPSuperclasses,
    nullptr
  };

  extern const TargetRegisterClass VMV0RegClass = {
    &RISCVMCRegisterClasses[VMV0RegClassID],
    VMV0SubClassMask,
    SuperRegIdxSeqs + 7,
    LaneBitmask(0x0000000000000001),
    0,
    false,
    0x00, /* TSFlags */
    false, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M1RegClass = {
    &RISCVMCRegisterClasses[VRN2M1RegClassID],
    VRN2M1SubClassMask,
    SuperRegIdxSeqs + 71,
    LaneBitmask(0x000000000000000C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M1NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN2M1NoV0RegClassID],
    VRN2M1NoV0SubClassMask,
    SuperRegIdxSeqs + 71,
    LaneBitmask(0x000000000000000C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN2M1NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRM2RegClass = {
    &RISCVMCRegisterClasses[VRM2RegClassID],
    VRM2SubClassMask,
    SuperRegIdxSeqs + 22,
    LaneBitmask(0x000000000000000C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRM2NoV0RegClass = {
    &RISCVMCRegisterClasses[VRM2NoV0RegClassID],
    VRM2NoV0SubClassMask,
    SuperRegIdxSeqs + 22,
    LaneBitmask(0x000000000000000C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRM2NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRM2_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRM2_with_sub_vrm1_0_in_VMV0RegClassID],
    VRM2_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 20,
    LaneBitmask(0x000000000000000C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRM2_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M1_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN2M1_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN2M1_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 32,
    LaneBitmask(0x000000000000000C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN2M1_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN3M1RegClass = {
    &RISCVMCRegisterClasses[VRN3M1RegClassID],
    VRN3M1SubClassMask,
    SuperRegIdxSeqs + 64,
    LaneBitmask(0x000000000000001C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN3M1NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN3M1NoV0RegClassID],
    VRN3M1NoV0SubClassMask,
    SuperRegIdxSeqs + 64,
    LaneBitmask(0x000000000000001C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN3M1NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN3M1_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN3M1_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN3M1_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 34,
    LaneBitmask(0x000000000000001C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN3M1_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN4M1RegClass = {
    &RISCVMCRegisterClasses[VRN4M1RegClassID],
    VRN4M1SubClassMask,
    SuperRegIdxSeqs + 58,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN4M1NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN4M1NoV0RegClassID],
    VRN4M1NoV0SubClassMask,
    SuperRegIdxSeqs + 58,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN4M1NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M2RegClass = {
    &RISCVMCRegisterClasses[VRN2M2RegClassID],
    VRN2M2SubClassMask,
    SuperRegIdxSeqs + 88,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M2NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN2M2NoV0RegClassID],
    VRN2M2NoV0SubClassMask,
    SuperRegIdxSeqs + 88,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN2M2NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRM4RegClass = {
    &RISCVMCRegisterClasses[VRM4RegClassID],
    VRM4SubClassMask,
    SuperRegIdxSeqs + 29,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRM4NoV0RegClass = {
    &RISCVMCRegisterClasses[VRM4NoV0RegClassID],
    VRM4NoV0SubClassMask,
    SuperRegIdxSeqs + 29,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRM4NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRM4_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRM4_with_sub_vrm1_0_in_VMV0RegClassID],
    VRM4_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 27,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRM4_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M2_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN2M2_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN2M2_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 79,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN2M2_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN4M1_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN4M1_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN4M1_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 36,
    LaneBitmask(0x000000000000003C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN4M1_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN5M1RegClass = {
    &RISCVMCRegisterClasses[VRN5M1RegClassID],
    VRN5M1SubClassMask,
    SuperRegIdxSeqs + 53,
    LaneBitmask(0x000000000000007C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN5M1NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN5M1NoV0RegClassID],
    VRN5M1NoV0SubClassMask,
    SuperRegIdxSeqs + 53,
    LaneBitmask(0x000000000000007C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN5M1NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN5M1_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN5M1_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN5M1_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 38,
    LaneBitmask(0x000000000000007C),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN5M1_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN6M1RegClass = {
    &RISCVMCRegisterClasses[VRN6M1RegClassID],
    VRN6M1SubClassMask,
    SuperRegIdxSeqs + 49,
    LaneBitmask(0x00000000000000FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN6M1NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN6M1NoV0RegClassID],
    VRN6M1NoV0SubClassMask,
    SuperRegIdxSeqs + 49,
    LaneBitmask(0x00000000000000FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN6M1NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN3M2RegClass = {
    &RISCVMCRegisterClasses[VRN3M2RegClassID],
    VRN3M2SubClassMask,
    SuperRegIdxSeqs + 85,
    LaneBitmask(0x00000000000000FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN3M2NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN3M2NoV0RegClassID],
    VRN3M2NoV0SubClassMask,
    SuperRegIdxSeqs + 85,
    LaneBitmask(0x00000000000000FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN3M2NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN3M2_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN3M2_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN3M2_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 81,
    LaneBitmask(0x00000000000000FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN3M2_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN6M1_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN6M1_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN6M1_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 40,
    LaneBitmask(0x00000000000000FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN6M1_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN7M1RegClass = {
    &RISCVMCRegisterClasses[VRN7M1RegClassID],
    VRN7M1SubClassMask,
    SuperRegIdxSeqs + 46,
    LaneBitmask(0x00000000000001FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN7M1NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN7M1NoV0RegClassID],
    VRN7M1NoV0SubClassMask,
    SuperRegIdxSeqs + 46,
    LaneBitmask(0x00000000000001FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN7M1NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN7M1_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN7M1_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN7M1_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 42,
    LaneBitmask(0x00000000000001FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN7M1_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN8M1RegClass = {
    &RISCVMCRegisterClasses[VRN8M1RegClassID],
    VRN8M1SubClassMask,
    SuperRegIdxSeqs + 44,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN8M1NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN8M1NoV0RegClassID],
    VRN8M1NoV0SubClassMask,
    SuperRegIdxSeqs + 44,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN8M1NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN4M2RegClass = {
    &RISCVMCRegisterClasses[VRN4M2RegClassID],
    VRN4M2SubClassMask,
    SuperRegIdxSeqs + 83,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN4M2NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN4M2NoV0RegClassID],
    VRN4M2NoV0SubClassMask,
    SuperRegIdxSeqs + 83,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN4M2NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M4RegClass = {
    &RISCVMCRegisterClasses[VRN2M4RegClassID],
    VRN2M4SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M4NoV0RegClass = {
    &RISCVMCRegisterClasses[VRN2M4NoV0RegClassID],
    VRN2M4NoV0SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN2M4NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRM8RegClass = {
    &RISCVMCRegisterClasses[VRM8RegClassID],
    VRM8SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    NullRegClasses,
    nullptr
  };

  extern const TargetRegisterClass VRM8NoV0RegClass = {
    &RISCVMCRegisterClasses[VRM8NoV0RegClassID],
    VRM8NoV0SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRM8NoV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRM8_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRM8_with_sub_vrm1_0_in_VMV0RegClassID],
    VRM8_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    false, /* CoveredBySubRegs */
    VRM8_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN2M4_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN2M4_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN2M4_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 1,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN2M4_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN4M2_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN4M2_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN4M2_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 83,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN4M2_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

  extern const TargetRegisterClass VRN8M1_with_sub_vrm1_0_in_VMV0RegClass = {
    &RISCVMCRegisterClasses[VRN8M1_with_sub_vrm1_0_in_VMV0RegClassID],
    VRN8M1_with_sub_vrm1_0_in_VMV0SubClassMask,
    SuperRegIdxSeqs + 44,
    LaneBitmask(0x00000000000003FC),
    0,
    false,
    0x00, /* TSFlags */
    true, /* HasDisjunctSubRegs */
    true, /* CoveredBySubRegs */
    VRN8M1_with_sub_vrm1_0_in_VMV0Superclasses,
    nullptr
  };

} // end namespace RISCV

namespace {
  const TargetRegisterClass *const RegisterClasses[] = {
    &RISCV::FPR16RegClass,
    &RISCV::AnyRegRegClass,
    &RISCV::AnyReg_with_sub_16RegClass,
    &RISCV::FPR32RegClass,
    &RISCV::GPRRegClass,
    &RISCV::GPRF16RegClass,
    &RISCV::GPRF32RegClass,
    &RISCV::GPRF64RegClass,
    &RISCV::GPRNoX0RegClass,
    &RISCV::GPRNoX0X2RegClass,
    &RISCV::GPRJALRRegClass,
    &RISCV::GPRTCRegClass,
    &RISCV::AnyReg_with_sub_16_with_sub_32_in_FPR32CRegClass,
    &RISCV::FPR32CRegClass,
    &RISCV::GPRCRegClass,
    &RISCV::GPRC_and_GPRTCRegClass,
    &RISCV::VCSRRegClass,
    &RISCV::GPRX0RegClass,
    &RISCV::SPRegClass,
    &RISCV::FPR64RegClass,
    &RISCV::VMRegClass,
    &RISCV::VRRegClass,
    &RISCV::VRNoV0RegClass,
    &RISCV::GPRPF64RegClass,
    &RISCV::GPRPF64_with_sub_32_in_GPRNoX0RegClass,
    &RISCV::GPRPF64_with_sub_32_in_GPRNoX0X2RegClass,
    &RISCV::GPRPF64_with_sub_32_in_GPRJALRRegClass,
    &RISCV::FPR64CRegClass,
    &RISCV::GPRPF64_with_sub_32_in_GPRTCRegClass,
    &RISCV::GPRPF64_with_sub_32_in_GPRCRegClass,
    &RISCV::GPRPF64_with_sub_32_in_GPRC_and_GPRTCRegClass,
    &RISCV::GPRPF64_with_sub_32_in_GPRX0RegClass,
    &RISCV::GPRPF64_with_sub_32_in_SPRegClass,
    &RISCV::VMV0RegClass,
    &RISCV::VRN2M1RegClass,
    &RISCV::VRN2M1NoV0RegClass,
    &RISCV::VRM2RegClass,
    &RISCV::VRM2NoV0RegClass,
    &RISCV::VRM2_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN2M1_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN3M1RegClass,
    &RISCV::VRN3M1NoV0RegClass,
    &RISCV::VRN3M1_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN4M1RegClass,
    &RISCV::VRN4M1NoV0RegClass,
    &RISCV::VRN2M2RegClass,
    &RISCV::VRN2M2NoV0RegClass,
    &RISCV::VRM4RegClass,
    &RISCV::VRM4NoV0RegClass,
    &RISCV::VRM4_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN2M2_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN4M1_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN5M1RegClass,
    &RISCV::VRN5M1NoV0RegClass,
    &RISCV::VRN5M1_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN6M1RegClass,
    &RISCV::VRN6M1NoV0RegClass,
    &RISCV::VRN3M2RegClass,
    &RISCV::VRN3M2NoV0RegClass,
    &RISCV::VRN3M2_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN6M1_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN7M1RegClass,
    &RISCV::VRN7M1NoV0RegClass,
    &RISCV::VRN7M1_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN8M1RegClass,
    &RISCV::VRN8M1NoV0RegClass,
    &RISCV::VRN4M2RegClass,
    &RISCV::VRN4M2NoV0RegClass,
    &RISCV::VRN2M4RegClass,
    &RISCV::VRN2M4NoV0RegClass,
    &RISCV::VRM8RegClass,
    &RISCV::VRM8NoV0RegClass,
    &RISCV::VRM8_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN2M4_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN4M2_with_sub_vrm1_0_in_VMV0RegClass,
    &RISCV::VRN8M1_with_sub_vrm1_0_in_VMV0RegClass,
  };
} // end anonymous namespace

static const uint8_t CostPerUseTable[] = { 
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };


static const bool InAllocatableClassTable[] = { 
false, false, false, true, true, true, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, };


static const TargetRegisterInfoDesc RISCVRegInfoDesc = { // Extra Descriptors
CostPerUseTable, 2, InAllocatableClassTable};

unsigned RISCVGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
  static const uint8_t RowMap[51] = {
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 0, 2, 0, 0, 0, 4, 4, 1, 0, 0, 0, 0, 4, 4, 4, 4, 1, 1, 1, 1, 5, 5, 5, 5, 2, 2, 2, 6, 6, 3, 0, 0, 0, 1, 1, 2, 
  };
  static const uint8_t Rows[7][51] = {
    { RISCV::sub_16, 0, 0, RISCV::sub_vrm1_0, RISCV::sub_vrm1_1, RISCV::sub_vrm1_2, RISCV::sub_vrm1_3, RISCV::sub_vrm1_4, RISCV::sub_vrm1_5, RISCV::sub_vrm1_6, RISCV::sub_vrm1_7, RISCV::sub_vrm2_0, RISCV::sub_vrm2_1, RISCV::sub_vrm2_2, RISCV::sub_vrm2_3, 0, 0, RISCV::sub_vrm1_0_sub_vrm1_1, RISCV::sub_vrm1_0_sub_vrm1_1_sub_vrm1_2, RISCV::sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3, RISCV::sub_vrm1_1_sub_vrm1_2, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3, RISCV::sub_vrm1_2_sub_vrm1_3, RISCV::sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm2_0_sub_vrm2_1, RISCV::sub_vrm2_0_sub_vrm2_1_sub_vrm2_2, 0, RISCV::sub_vrm2_1_sub_vrm2_2, RISCV::sub_vrm2_1_sub_vrm2_2_sub_vrm2_3, RISCV::sub_vrm2_2_sub_vrm2_3, },
    { 0, 0, 0, RISCV::sub_vrm1_2, RISCV::sub_vrm1_3, RISCV::sub_vrm1_4, RISCV::sub_vrm1_5, RISCV::sub_vrm1_6, RISCV::sub_vrm1_7, 0, 0, RISCV::sub_vrm2_1, RISCV::sub_vrm2_2, RISCV::sub_vrm2_3, 0, 0, 0, RISCV::sub_vrm1_2_sub_vrm1_3, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, 0, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, 0, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, 0, RISCV::sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, 0, RISCV::sub_vrm1_6_sub_vrm1_7, 0, 0, 0, 0, 0, RISCV::sub_vrm2_1_sub_vrm2_2, 0, 0, RISCV::sub_vrm2_2_sub_vrm2_3, 0, 0, },
    { 0, 0, 0, RISCV::sub_vrm1_4, RISCV::sub_vrm1_5, RISCV::sub_vrm1_6, RISCV::sub_vrm1_7, 0, 0, 0, 0, RISCV::sub_vrm2_2, RISCV::sub_vrm2_3, 0, 0, 0, 0, RISCV::sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, RISCV::sub_vrm1_6_sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
    { 0, 0, 0, RISCV::sub_vrm1_6, RISCV::sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
    { 0, 0, 0, RISCV::sub_vrm1_1, RISCV::sub_vrm1_2, RISCV::sub_vrm1_3, RISCV::sub_vrm1_4, RISCV::sub_vrm1_5, RISCV::sub_vrm1_6, RISCV::sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, RISCV::sub_vrm1_1_sub_vrm1_2, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_2_sub_vrm1_3, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, 0, 0, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, RISCV::sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, RISCV::sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, RISCV::sub_vrm1_6_sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, 0, },
    { 0, 0, 0, RISCV::sub_vrm1_3, RISCV::sub_vrm1_4, RISCV::sub_vrm1_5, RISCV::sub_vrm1_6, RISCV::sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, RISCV::sub_vrm1_3_sub_vrm1_4, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_4_sub_vrm1_5, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6, RISCV::sub_vrm1_5_sub_vrm1_6, 0, 0, 0, 0, RISCV::sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, 0, 0, RISCV::sub_vrm1_5_sub_vrm1_6_sub_vrm1_7, 0, 0, 0, RISCV::sub_vrm1_6_sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
    { 0, 0, 0, RISCV::sub_vrm1_5, RISCV::sub_vrm1_6, RISCV::sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, RISCV::sub_vrm1_5_sub_vrm1_6, 0, 0, RISCV::sub_vrm1_6_sub_vrm1_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
  };

  --IdxA; assert(IdxA < 51); (void) IdxA;
  --IdxB; assert(IdxB < 51);
  return Rows[RowMap[IdxA]][IdxB];
}

  struct MaskRolOp {
    LaneBitmask Mask;
    uint8_t  RotateLeft;
  };
  static const MaskRolOp LaneMaskComposeSequences[] = {
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  0 }, { LaneBitmask::getNone(), 0 },   // Sequence 0
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  1 }, { LaneBitmask::getNone(), 0 },   // Sequence 2
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  2 }, { LaneBitmask::getNone(), 0 },   // Sequence 4
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  3 }, { LaneBitmask::getNone(), 0 },   // Sequence 6
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  4 }, { LaneBitmask::getNone(), 0 },   // Sequence 8
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  5 }, { LaneBitmask::getNone(), 0 },   // Sequence 10
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  6 }, { LaneBitmask::getNone(), 0 },   // Sequence 12
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  7 }, { LaneBitmask::getNone(), 0 },   // Sequence 14
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  8 }, { LaneBitmask::getNone(), 0 },   // Sequence 16
    { LaneBitmask(0xFFFFFFFFFFFFFFFF),  9 }, { LaneBitmask::getNone(), 0 }  // Sequence 18
  };
  static const uint8_t CompositeSequences[] = {
    0, // to sub_16
    0, // to sub_32
    2, // to sub_32_hi
    4, // to sub_vrm1_0
    6, // to sub_vrm1_1
    8, // to sub_vrm1_2
    10, // to sub_vrm1_3
    12, // to sub_vrm1_4
    14, // to sub_vrm1_5
    16, // to sub_vrm1_6
    18, // to sub_vrm1_7
    0, // to sub_vrm2_0
    4, // to sub_vrm2_1
    8, // to sub_vrm2_2
    12, // to sub_vrm2_3
    0, // to sub_vrm4_0
    8, // to sub_vrm4_1
    0, // to sub_vrm1_0_sub_vrm1_1
    0, // to sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
    0, // to sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
    2, // to sub_vrm1_1_sub_vrm1_2
    2, // to sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
    4, // to sub_vrm1_2_sub_vrm1_3
    0, // to sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
    0, // to sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
    0, // to sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
    0, // to sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
    2, // to sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
    2, // to sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
    2, // to sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
    2, // to sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
    4, // to sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
    4, // to sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
    4, // to sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
    4, // to sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
    6, // to sub_vrm1_3_sub_vrm1_4
    6, // to sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
    6, // to sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
    6, // to sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
    8, // to sub_vrm1_4_sub_vrm1_5
    8, // to sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
    8, // to sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
    10, // to sub_vrm1_5_sub_vrm1_6
    10, // to sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
    12, // to sub_vrm1_6_sub_vrm1_7
    0, // to sub_vrm2_0_sub_vrm2_1
    0, // to sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
    0, // to sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
    4, // to sub_vrm2_1_sub_vrm2_2
    4, // to sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
    8 // to sub_vrm2_2_sub_vrm2_3
  };

LaneBitmask RISCVGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
  --IdxA; assert(IdxA < 51 && "Subregister index out of bounds");
  LaneBitmask Result;
  for (const MaskRolOp *Ops =
       &LaneMaskComposeSequences[CompositeSequences[IdxA]];
       Ops->Mask.any(); ++Ops) {
    LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
    if (unsigned S = Ops->RotateLeft)
      Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
    else
      Result |= LaneBitmask(M);
  }
  return Result;
}

LaneBitmask RISCVGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA,  LaneBitmask LaneMask) const {
  LaneMask &= getSubRegIndexLaneMask(IdxA);
  --IdxA; assert(IdxA < 51 && "Subregister index out of bounds");
  LaneBitmask Result;
  for (const MaskRolOp *Ops =
       &LaneMaskComposeSequences[CompositeSequences[IdxA]];
       Ops->Mask.any(); ++Ops) {
    LaneBitmask::Type M = LaneMask.getAsInteger();
    if (unsigned S = Ops->RotateLeft)
      Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
    else
      Result |= LaneBitmask(M);
  }
  return Result;
}

const TargetRegisterClass *RISCVGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
  static const uint8_t Table[76][51] = {
    {	// FPR16
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// AnyReg
      3,	// sub_16 -> AnyReg_with_sub_16
      3,	// sub_32 -> AnyReg_with_sub_16
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// AnyReg_with_sub_16
      3,	// sub_16 -> AnyReg_with_sub_16
      3,	// sub_32 -> AnyReg_with_sub_16
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR32
      4,	// sub_16 -> FPR32
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPR
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRF16
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRF32
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRF64
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRNoX0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRNoX0X2
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRJALR
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRTC
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// AnyReg_with_sub_16_with_sub_32_in_FPR32C
      13,	// sub_16 -> AnyReg_with_sub_16_with_sub_32_in_FPR32C
      13,	// sub_32 -> AnyReg_with_sub_16_with_sub_32_in_FPR32C
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR32C
      14,	// sub_16 -> FPR32C
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRC
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRC_and_GPRTC
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VCSR
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRX0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// SP
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR64
      20,	// sub_16 -> FPR64
      20,	// sub_32 -> FPR64
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VM
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VR
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRNoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64
      0,	// sub_16
      24,	// sub_32 -> GPRPF64
      24,	// sub_32_hi -> GPRPF64
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRNoX0
      0,	// sub_16
      25,	// sub_32 -> GPRPF64_with_sub_32_in_GPRNoX0
      25,	// sub_32_hi -> GPRPF64_with_sub_32_in_GPRNoX0
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRNoX0X2
      0,	// sub_16
      26,	// sub_32 -> GPRPF64_with_sub_32_in_GPRNoX0X2
      26,	// sub_32_hi -> GPRPF64_with_sub_32_in_GPRNoX0X2
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRJALR
      0,	// sub_16
      27,	// sub_32 -> GPRPF64_with_sub_32_in_GPRJALR
      27,	// sub_32_hi -> GPRPF64_with_sub_32_in_GPRJALR
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR64C
      28,	// sub_16 -> FPR64C
      28,	// sub_32 -> FPR64C
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRTC
      0,	// sub_16
      29,	// sub_32 -> GPRPF64_with_sub_32_in_GPRTC
      29,	// sub_32_hi -> GPRPF64_with_sub_32_in_GPRTC
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRC
      0,	// sub_16
      30,	// sub_32 -> GPRPF64_with_sub_32_in_GPRC
      30,	// sub_32_hi -> GPRPF64_with_sub_32_in_GPRC
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC
      0,	// sub_16
      31,	// sub_32 -> GPRPF64_with_sub_32_in_GPRC_and_GPRTC
      31,	// sub_32_hi -> GPRPF64_with_sub_32_in_GPRC_and_GPRTC
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRX0
      0,	// sub_16
      32,	// sub_32 -> GPRPF64_with_sub_32_in_GPRX0
      32,	// sub_32_hi -> GPRPF64_with_sub_32_in_GPRX0
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_SP
      0,	// sub_16
      33,	// sub_32 -> GPRPF64_with_sub_32_in_SP
      33,	// sub_32_hi -> GPRPF64_with_sub_32_in_SP
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      0,	// sub_vrm1_0
      0,	// sub_vrm1_1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M1
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      35,	// sub_vrm1_0 -> VRN2M1
      35,	// sub_vrm1_1 -> VRN2M1
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M1NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      36,	// sub_vrm1_0 -> VRN2M1NoV0
      36,	// sub_vrm1_1 -> VRN2M1NoV0
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM2
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      37,	// sub_vrm1_0 -> VRM2
      37,	// sub_vrm1_1 -> VRM2
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM2NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      38,	// sub_vrm1_0 -> VRM2NoV0
      38,	// sub_vrm1_1 -> VRM2NoV0
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM2_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      39,	// sub_vrm1_0 -> VRM2_with_sub_vrm1_0_in_VMV0
      39,	// sub_vrm1_1 -> VRM2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      40,	// sub_vrm1_0 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      40,	// sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_2
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M1
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      41,	// sub_vrm1_0 -> VRN3M1
      41,	// sub_vrm1_1 -> VRN3M1
      41,	// sub_vrm1_2 -> VRN3M1
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      41,	// sub_vrm1_0_sub_vrm1_1 -> VRN3M1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      41,	// sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M1NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      42,	// sub_vrm1_0 -> VRN3M1NoV0
      42,	// sub_vrm1_1 -> VRN3M1NoV0
      42,	// sub_vrm1_2 -> VRN3M1NoV0
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      42,	// sub_vrm1_0_sub_vrm1_1 -> VRN3M1NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      42,	// sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      43,	// sub_vrm1_0 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      43,	// sub_vrm1_1 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      43,	// sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_3
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      43,	// sub_vrm1_0_sub_vrm1_1 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      43,	// sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M1
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      44,	// sub_vrm1_0 -> VRN4M1
      44,	// sub_vrm1_1 -> VRN4M1
      44,	// sub_vrm1_2 -> VRN4M1
      44,	// sub_vrm1_3 -> VRN4M1
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      44,	// sub_vrm1_0_sub_vrm1_1 -> VRN4M1
      44,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN4M1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      44,	// sub_vrm1_1_sub_vrm1_2 -> VRN4M1
      44,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      44,	// sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M1NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      45,	// sub_vrm1_0 -> VRN4M1NoV0
      45,	// sub_vrm1_1 -> VRN4M1NoV0
      45,	// sub_vrm1_2 -> VRN4M1NoV0
      45,	// sub_vrm1_3 -> VRN4M1NoV0
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      45,	// sub_vrm1_0_sub_vrm1_1 -> VRN4M1NoV0
      45,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN4M1NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      45,	// sub_vrm1_1_sub_vrm1_2 -> VRN4M1NoV0
      45,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      45,	// sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M2
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      46,	// sub_vrm1_0 -> VRN2M2
      46,	// sub_vrm1_1 -> VRN2M2
      46,	// sub_vrm1_2 -> VRN2M2
      46,	// sub_vrm1_3 -> VRN2M2
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      46,	// sub_vrm2_0 -> VRN2M2
      46,	// sub_vrm2_1 -> VRN2M2
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      46,	// sub_vrm1_0_sub_vrm1_1 -> VRN2M2
      46,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN2M2
      46,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M2
      46,	// sub_vrm1_1_sub_vrm1_2 -> VRN2M2
      46,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M2
      46,	// sub_vrm1_2_sub_vrm1_3 -> VRN2M2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M2NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      47,	// sub_vrm1_0 -> VRN2M2NoV0
      47,	// sub_vrm1_1 -> VRN2M2NoV0
      47,	// sub_vrm1_2 -> VRN2M2NoV0
      47,	// sub_vrm1_3 -> VRN2M2NoV0
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      47,	// sub_vrm2_0 -> VRN2M2NoV0
      47,	// sub_vrm2_1 -> VRN2M2NoV0
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      47,	// sub_vrm1_0_sub_vrm1_1 -> VRN2M2NoV0
      47,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN2M2NoV0
      47,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M2NoV0
      47,	// sub_vrm1_1_sub_vrm1_2 -> VRN2M2NoV0
      47,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M2NoV0
      47,	// sub_vrm1_2_sub_vrm1_3 -> VRN2M2NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM4
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      48,	// sub_vrm1_0 -> VRM4
      48,	// sub_vrm1_1 -> VRM4
      48,	// sub_vrm1_2 -> VRM4
      48,	// sub_vrm1_3 -> VRM4
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      48,	// sub_vrm2_0 -> VRM4
      48,	// sub_vrm2_1 -> VRM4
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM4NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      49,	// sub_vrm1_0 -> VRM4NoV0
      49,	// sub_vrm1_1 -> VRM4NoV0
      49,	// sub_vrm1_2 -> VRM4NoV0
      49,	// sub_vrm1_3 -> VRM4NoV0
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      49,	// sub_vrm2_0 -> VRM4NoV0
      49,	// sub_vrm2_1 -> VRM4NoV0
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM4_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      50,	// sub_vrm1_0 -> VRM4_with_sub_vrm1_0_in_VMV0
      50,	// sub_vrm1_1 -> VRM4_with_sub_vrm1_0_in_VMV0
      50,	// sub_vrm1_2 -> VRM4_with_sub_vrm1_0_in_VMV0
      50,	// sub_vrm1_3 -> VRM4_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      50,	// sub_vrm2_0 -> VRM4_with_sub_vrm1_0_in_VMV0
      50,	// sub_vrm2_1 -> VRM4_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      51,	// sub_vrm1_0 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_1 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_2 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_3 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      51,	// sub_vrm2_0 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm2_1 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      51,	// sub_vrm1_0_sub_vrm1_1 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_1_sub_vrm1_2 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      51,	// sub_vrm1_2_sub_vrm1_3 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      52,	// sub_vrm1_0 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      52,	// sub_vrm1_1 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      52,	// sub_vrm1_2 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      52,	// sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_4
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      52,	// sub_vrm1_0_sub_vrm1_1 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      52,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      52,	// sub_vrm1_1_sub_vrm1_2 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      52,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      52,	// sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN5M1
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      53,	// sub_vrm1_0 -> VRN5M1
      53,	// sub_vrm1_1 -> VRN5M1
      53,	// sub_vrm1_2 -> VRN5M1
      53,	// sub_vrm1_3 -> VRN5M1
      53,	// sub_vrm1_4 -> VRN5M1
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      53,	// sub_vrm1_0_sub_vrm1_1 -> VRN5M1
      53,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN5M1
      53,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN5M1
      53,	// sub_vrm1_1_sub_vrm1_2 -> VRN5M1
      53,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN5M1
      53,	// sub_vrm1_2_sub_vrm1_3 -> VRN5M1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      53,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      53,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      53,	// sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN5M1NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      54,	// sub_vrm1_0 -> VRN5M1NoV0
      54,	// sub_vrm1_1 -> VRN5M1NoV0
      54,	// sub_vrm1_2 -> VRN5M1NoV0
      54,	// sub_vrm1_3 -> VRN5M1NoV0
      54,	// sub_vrm1_4 -> VRN5M1NoV0
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      54,	// sub_vrm1_0_sub_vrm1_1 -> VRN5M1NoV0
      54,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN5M1NoV0
      54,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN5M1NoV0
      54,	// sub_vrm1_1_sub_vrm1_2 -> VRN5M1NoV0
      54,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN5M1NoV0
      54,	// sub_vrm1_2_sub_vrm1_3 -> VRN5M1NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      54,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      54,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      54,	// sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      55,	// sub_vrm1_0 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_1 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_2 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_3 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_5
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      55,	// sub_vrm1_0_sub_vrm1_1 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_1_sub_vrm1_2 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      55,	// sub_vrm1_2_sub_vrm1_3 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      55,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      55,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      55,	// sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN6M1
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      56,	// sub_vrm1_0 -> VRN6M1
      56,	// sub_vrm1_1 -> VRN6M1
      56,	// sub_vrm1_2 -> VRN6M1
      56,	// sub_vrm1_3 -> VRN6M1
      56,	// sub_vrm1_4 -> VRN6M1
      56,	// sub_vrm1_5 -> VRN6M1
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      56,	// sub_vrm1_0_sub_vrm1_1 -> VRN6M1
      56,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN6M1
      56,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN6M1
      56,	// sub_vrm1_1_sub_vrm1_2 -> VRN6M1
      56,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN6M1
      56,	// sub_vrm1_2_sub_vrm1_3 -> VRN6M1
      56,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      56,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1
      56,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      56,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1
      56,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      56,	// sub_vrm1_3_sub_vrm1_4 -> VRN6M1
      56,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      56,	// sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN6M1NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      57,	// sub_vrm1_0 -> VRN6M1NoV0
      57,	// sub_vrm1_1 -> VRN6M1NoV0
      57,	// sub_vrm1_2 -> VRN6M1NoV0
      57,	// sub_vrm1_3 -> VRN6M1NoV0
      57,	// sub_vrm1_4 -> VRN6M1NoV0
      57,	// sub_vrm1_5 -> VRN6M1NoV0
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      57,	// sub_vrm1_0_sub_vrm1_1 -> VRN6M1NoV0
      57,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN6M1NoV0
      57,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN6M1NoV0
      57,	// sub_vrm1_1_sub_vrm1_2 -> VRN6M1NoV0
      57,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN6M1NoV0
      57,	// sub_vrm1_2_sub_vrm1_3 -> VRN6M1NoV0
      57,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      57,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1NoV0
      57,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      57,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1NoV0
      57,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      57,	// sub_vrm1_3_sub_vrm1_4 -> VRN6M1NoV0
      57,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      57,	// sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M2
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      58,	// sub_vrm1_0 -> VRN3M2
      58,	// sub_vrm1_1 -> VRN3M2
      58,	// sub_vrm1_2 -> VRN3M2
      58,	// sub_vrm1_3 -> VRN3M2
      58,	// sub_vrm1_4 -> VRN3M2
      58,	// sub_vrm1_5 -> VRN3M2
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      58,	// sub_vrm2_0 -> VRN3M2
      58,	// sub_vrm2_1 -> VRN3M2
      58,	// sub_vrm2_2 -> VRN3M2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      58,	// sub_vrm1_0_sub_vrm1_1 -> VRN3M2
      58,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M2
      58,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M2
      58,	// sub_vrm1_1_sub_vrm1_2 -> VRN3M2
      58,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M2
      58,	// sub_vrm1_2_sub_vrm1_3 -> VRN3M2
      58,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2
      58,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      58,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2
      58,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      58,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2
      58,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      58,	// sub_vrm1_3_sub_vrm1_4 -> VRN3M2
      58,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      58,	// sub_vrm1_4_sub_vrm1_5 -> VRN3M2
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      58,	// sub_vrm2_0_sub_vrm2_1 -> VRN3M2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      58,	// sub_vrm2_1_sub_vrm2_2 -> VRN3M2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M2NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      59,	// sub_vrm1_0 -> VRN3M2NoV0
      59,	// sub_vrm1_1 -> VRN3M2NoV0
      59,	// sub_vrm1_2 -> VRN3M2NoV0
      59,	// sub_vrm1_3 -> VRN3M2NoV0
      59,	// sub_vrm1_4 -> VRN3M2NoV0
      59,	// sub_vrm1_5 -> VRN3M2NoV0
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      59,	// sub_vrm2_0 -> VRN3M2NoV0
      59,	// sub_vrm2_1 -> VRN3M2NoV0
      59,	// sub_vrm2_2 -> VRN3M2NoV0
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      59,	// sub_vrm1_0_sub_vrm1_1 -> VRN3M2NoV0
      59,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M2NoV0
      59,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M2NoV0
      59,	// sub_vrm1_1_sub_vrm1_2 -> VRN3M2NoV0
      59,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M2NoV0
      59,	// sub_vrm1_2_sub_vrm1_3 -> VRN3M2NoV0
      59,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2NoV0
      59,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      59,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2NoV0
      59,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2NoV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      59,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2NoV0
      59,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2NoV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      59,	// sub_vrm1_3_sub_vrm1_4 -> VRN3M2NoV0
      59,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2NoV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      59,	// sub_vrm1_4_sub_vrm1_5 -> VRN3M2NoV0
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      59,	// sub_vrm2_0_sub_vrm2_1 -> VRN3M2NoV0
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      59,	// sub_vrm2_1_sub_vrm2_2 -> VRN3M2NoV0
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      60,	// sub_vrm1_0 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_1 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_2 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_3 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_4 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_5 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      60,	// sub_vrm2_0 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm2_1 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm2_2 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      60,	// sub_vrm1_0_sub_vrm1_1 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_1_sub_vrm1_2 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_2_sub_vrm1_3 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      60,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      60,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      60,	// sub_vrm1_3_sub_vrm1_4 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      60,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      60,	// sub_vrm1_4_sub_vrm1_5 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      60,	// sub_vrm2_0_sub_vrm2_1 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      60,	// sub_vrm2_1_sub_vrm2_2 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      61,	// sub_vrm1_0 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_1 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_2 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_3 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_4 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_6
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      61,	// sub_vrm1_0_sub_vrm1_1 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_1_sub_vrm1_2 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_2_sub_vrm1_3 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      61,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      61,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      61,	// sub_vrm1_3_sub_vrm1_4 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      61,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      61,	// sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN7M1
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      62,	// sub_vrm1_0 -> VRN7M1
      62,	// sub_vrm1_1 -> VRN7M1
      62,	// sub_vrm1_2 -> VRN7M1
      62,	// sub_vrm1_3 -> VRN7M1
      62,	// sub_vrm1_4 -> VRN7M1
      62,	// sub_vrm1_5 -> VRN7M1
      62,	// sub_vrm1_6 -> VRN7M1
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      62,	// sub_vrm1_0_sub_vrm1_1 -> VRN7M1
      62,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN7M1
      62,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN7M1
      62,	// sub_vrm1_1_sub_vrm1_2 -> VRN7M1
      62,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN7M1
      62,	// sub_vrm1_2_sub_vrm1_3 -> VRN7M1
      62,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1
      62,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      62,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1
      62,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1
      62,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      62,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1
      62,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1
      62,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      62,	// sub_vrm1_3_sub_vrm1_4 -> VRN7M1
      62,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1
      62,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      62,	// sub_vrm1_4_sub_vrm1_5 -> VRN7M1
      62,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      62,	// sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN7M1NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      63,	// sub_vrm1_0 -> VRN7M1NoV0
      63,	// sub_vrm1_1 -> VRN7M1NoV0
      63,	// sub_vrm1_2 -> VRN7M1NoV0
      63,	// sub_vrm1_3 -> VRN7M1NoV0
      63,	// sub_vrm1_4 -> VRN7M1NoV0
      63,	// sub_vrm1_5 -> VRN7M1NoV0
      63,	// sub_vrm1_6 -> VRN7M1NoV0
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      63,	// sub_vrm1_0_sub_vrm1_1 -> VRN7M1NoV0
      63,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN7M1NoV0
      63,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN7M1NoV0
      63,	// sub_vrm1_1_sub_vrm1_2 -> VRN7M1NoV0
      63,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN7M1NoV0
      63,	// sub_vrm1_2_sub_vrm1_3 -> VRN7M1NoV0
      63,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1NoV0
      63,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      63,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1NoV0
      63,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1NoV0
      63,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      63,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1NoV0
      63,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1NoV0
      63,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      63,	// sub_vrm1_3_sub_vrm1_4 -> VRN7M1NoV0
      63,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1NoV0
      63,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      63,	// sub_vrm1_4_sub_vrm1_5 -> VRN7M1NoV0
      63,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      63,	// sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      64,	// sub_vrm1_0 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_1 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_2 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_3 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_4 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_5 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_7
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      64,	// sub_vrm1_0_sub_vrm1_1 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_1_sub_vrm1_2 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_2_sub_vrm1_3 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      64,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      64,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      64,	// sub_vrm1_3_sub_vrm1_4 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      64,	// sub_vrm1_4_sub_vrm1_5 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      64,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      64,	// sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN8M1
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      65,	// sub_vrm1_0 -> VRN8M1
      65,	// sub_vrm1_1 -> VRN8M1
      65,	// sub_vrm1_2 -> VRN8M1
      65,	// sub_vrm1_3 -> VRN8M1
      65,	// sub_vrm1_4 -> VRN8M1
      65,	// sub_vrm1_5 -> VRN8M1
      65,	// sub_vrm1_6 -> VRN8M1
      65,	// sub_vrm1_7 -> VRN8M1
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      65,	// sub_vrm1_0_sub_vrm1_1 -> VRN8M1
      65,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN8M1
      65,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN8M1
      65,	// sub_vrm1_1_sub_vrm1_2 -> VRN8M1
      65,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN8M1
      65,	// sub_vrm1_2_sub_vrm1_3 -> VRN8M1
      65,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1
      65,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1
      65,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      65,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1
      65,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1
      65,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1
      65,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      65,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1
      65,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1
      65,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1
      65,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      65,	// sub_vrm1_3_sub_vrm1_4 -> VRN8M1
      65,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1
      65,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1
      65,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      65,	// sub_vrm1_4_sub_vrm1_5 -> VRN8M1
      65,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1
      65,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      65,	// sub_vrm1_5_sub_vrm1_6 -> VRN8M1
      65,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      65,	// sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN8M1NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      66,	// sub_vrm1_0 -> VRN8M1NoV0
      66,	// sub_vrm1_1 -> VRN8M1NoV0
      66,	// sub_vrm1_2 -> VRN8M1NoV0
      66,	// sub_vrm1_3 -> VRN8M1NoV0
      66,	// sub_vrm1_4 -> VRN8M1NoV0
      66,	// sub_vrm1_5 -> VRN8M1NoV0
      66,	// sub_vrm1_6 -> VRN8M1NoV0
      66,	// sub_vrm1_7 -> VRN8M1NoV0
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      66,	// sub_vrm1_0_sub_vrm1_1 -> VRN8M1NoV0
      66,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN8M1NoV0
      66,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN8M1NoV0
      66,	// sub_vrm1_1_sub_vrm1_2 -> VRN8M1NoV0
      66,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN8M1NoV0
      66,	// sub_vrm1_2_sub_vrm1_3 -> VRN8M1NoV0
      66,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1NoV0
      66,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1NoV0
      66,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1NoV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      66,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1NoV0
      66,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1NoV0
      66,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1NoV0
      66,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      66,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1NoV0
      66,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1NoV0
      66,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1NoV0
      66,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      66,	// sub_vrm1_3_sub_vrm1_4 -> VRN8M1NoV0
      66,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1NoV0
      66,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1NoV0
      66,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      66,	// sub_vrm1_4_sub_vrm1_5 -> VRN8M1NoV0
      66,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1NoV0
      66,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      66,	// sub_vrm1_5_sub_vrm1_6 -> VRN8M1NoV0
      66,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      66,	// sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M2
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      67,	// sub_vrm1_0 -> VRN4M2
      67,	// sub_vrm1_1 -> VRN4M2
      67,	// sub_vrm1_2 -> VRN4M2
      67,	// sub_vrm1_3 -> VRN4M2
      67,	// sub_vrm1_4 -> VRN4M2
      67,	// sub_vrm1_5 -> VRN4M2
      67,	// sub_vrm1_6 -> VRN4M2
      67,	// sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm2_0 -> VRN4M2
      67,	// sub_vrm2_1 -> VRN4M2
      67,	// sub_vrm2_2 -> VRN4M2
      67,	// sub_vrm2_3 -> VRN4M2
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      67,	// sub_vrm1_0_sub_vrm1_1 -> VRN4M2
      67,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN4M2
      67,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M2
      67,	// sub_vrm1_1_sub_vrm1_2 -> VRN4M2
      67,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M2
      67,	// sub_vrm1_2_sub_vrm1_3 -> VRN4M2
      67,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2
      67,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2
      67,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2
      67,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2
      67,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2
      67,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2
      67,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2
      67,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2
      67,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2
      67,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm1_3_sub_vrm1_4 -> VRN4M2
      67,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2
      67,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2
      67,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm1_4_sub_vrm1_5 -> VRN4M2
      67,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2
      67,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm1_5_sub_vrm1_6 -> VRN4M2
      67,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm1_6_sub_vrm1_7 -> VRN4M2
      67,	// sub_vrm2_0_sub_vrm2_1 -> VRN4M2
      67,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN4M2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      67,	// sub_vrm2_1_sub_vrm2_2 -> VRN4M2
      67,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN4M2
      67,	// sub_vrm2_2_sub_vrm2_3 -> VRN4M2
    },
    {	// VRN4M2NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      68,	// sub_vrm1_0 -> VRN4M2NoV0
      68,	// sub_vrm1_1 -> VRN4M2NoV0
      68,	// sub_vrm1_2 -> VRN4M2NoV0
      68,	// sub_vrm1_3 -> VRN4M2NoV0
      68,	// sub_vrm1_4 -> VRN4M2NoV0
      68,	// sub_vrm1_5 -> VRN4M2NoV0
      68,	// sub_vrm1_6 -> VRN4M2NoV0
      68,	// sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm2_0 -> VRN4M2NoV0
      68,	// sub_vrm2_1 -> VRN4M2NoV0
      68,	// sub_vrm2_2 -> VRN4M2NoV0
      68,	// sub_vrm2_3 -> VRN4M2NoV0
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      68,	// sub_vrm1_0_sub_vrm1_1 -> VRN4M2NoV0
      68,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN4M2NoV0
      68,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M2NoV0
      68,	// sub_vrm1_1_sub_vrm1_2 -> VRN4M2NoV0
      68,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M2NoV0
      68,	// sub_vrm1_2_sub_vrm1_3 -> VRN4M2NoV0
      68,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2NoV0
      68,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2NoV0
      68,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2NoV0
      68,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2NoV0
      68,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2NoV0
      68,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2NoV0
      68,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2NoV0
      68,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2NoV0
      68,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2NoV0
      68,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm1_3_sub_vrm1_4 -> VRN4M2NoV0
      68,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2NoV0
      68,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2NoV0
      68,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm1_4_sub_vrm1_5 -> VRN4M2NoV0
      68,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2NoV0
      68,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm1_5_sub_vrm1_6 -> VRN4M2NoV0
      68,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm1_6_sub_vrm1_7 -> VRN4M2NoV0
      68,	// sub_vrm2_0_sub_vrm2_1 -> VRN4M2NoV0
      68,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN4M2NoV0
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      68,	// sub_vrm2_1_sub_vrm2_2 -> VRN4M2NoV0
      68,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN4M2NoV0
      68,	// sub_vrm2_2_sub_vrm2_3 -> VRN4M2NoV0
    },
    {	// VRN2M4
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      69,	// sub_vrm1_0 -> VRN2M4
      69,	// sub_vrm1_1 -> VRN2M4
      69,	// sub_vrm1_2 -> VRN2M4
      69,	// sub_vrm1_3 -> VRN2M4
      69,	// sub_vrm1_4 -> VRN2M4
      69,	// sub_vrm1_5 -> VRN2M4
      69,	// sub_vrm1_6 -> VRN2M4
      69,	// sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm2_0 -> VRN2M4
      69,	// sub_vrm2_1 -> VRN2M4
      69,	// sub_vrm2_2 -> VRN2M4
      69,	// sub_vrm2_3 -> VRN2M4
      69,	// sub_vrm4_0 -> VRN2M4
      69,	// sub_vrm4_1 -> VRN2M4
      69,	// sub_vrm1_0_sub_vrm1_1 -> VRN2M4
      69,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN2M4
      69,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M4
      69,	// sub_vrm1_1_sub_vrm1_2 -> VRN2M4
      69,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M4
      69,	// sub_vrm1_2_sub_vrm1_3 -> VRN2M4
      69,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4
      69,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4
      69,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4
      69,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4
      69,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4
      69,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4
      69,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4
      69,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4
      69,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4
      69,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm1_3_sub_vrm1_4 -> VRN2M4
      69,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4
      69,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4
      69,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm1_4_sub_vrm1_5 -> VRN2M4
      69,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4
      69,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm1_5_sub_vrm1_6 -> VRN2M4
      69,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm1_6_sub_vrm1_7 -> VRN2M4
      69,	// sub_vrm2_0_sub_vrm2_1 -> VRN2M4
      69,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN2M4
      69,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN2M4
      69,	// sub_vrm2_1_sub_vrm2_2 -> VRN2M4
      69,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN2M4
      69,	// sub_vrm2_2_sub_vrm2_3 -> VRN2M4
    },
    {	// VRN2M4NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      70,	// sub_vrm1_0 -> VRN2M4NoV0
      70,	// sub_vrm1_1 -> VRN2M4NoV0
      70,	// sub_vrm1_2 -> VRN2M4NoV0
      70,	// sub_vrm1_3 -> VRN2M4NoV0
      70,	// sub_vrm1_4 -> VRN2M4NoV0
      70,	// sub_vrm1_5 -> VRN2M4NoV0
      70,	// sub_vrm1_6 -> VRN2M4NoV0
      70,	// sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm2_0 -> VRN2M4NoV0
      70,	// sub_vrm2_1 -> VRN2M4NoV0
      70,	// sub_vrm2_2 -> VRN2M4NoV0
      70,	// sub_vrm2_3 -> VRN2M4NoV0
      70,	// sub_vrm4_0 -> VRN2M4NoV0
      70,	// sub_vrm4_1 -> VRN2M4NoV0
      70,	// sub_vrm1_0_sub_vrm1_1 -> VRN2M4NoV0
      70,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN2M4NoV0
      70,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M4NoV0
      70,	// sub_vrm1_1_sub_vrm1_2 -> VRN2M4NoV0
      70,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M4NoV0
      70,	// sub_vrm1_2_sub_vrm1_3 -> VRN2M4NoV0
      70,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4NoV0
      70,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4NoV0
      70,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4NoV0
      70,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4NoV0
      70,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4NoV0
      70,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4NoV0
      70,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4NoV0
      70,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4NoV0
      70,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4NoV0
      70,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm1_3_sub_vrm1_4 -> VRN2M4NoV0
      70,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4NoV0
      70,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4NoV0
      70,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm1_4_sub_vrm1_5 -> VRN2M4NoV0
      70,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4NoV0
      70,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm1_5_sub_vrm1_6 -> VRN2M4NoV0
      70,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm1_6_sub_vrm1_7 -> VRN2M4NoV0
      70,	// sub_vrm2_0_sub_vrm2_1 -> VRN2M4NoV0
      70,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN2M4NoV0
      70,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN2M4NoV0
      70,	// sub_vrm2_1_sub_vrm2_2 -> VRN2M4NoV0
      70,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN2M4NoV0
      70,	// sub_vrm2_2_sub_vrm2_3 -> VRN2M4NoV0
    },
    {	// VRM8
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      71,	// sub_vrm1_0 -> VRM8
      71,	// sub_vrm1_1 -> VRM8
      71,	// sub_vrm1_2 -> VRM8
      71,	// sub_vrm1_3 -> VRM8
      71,	// sub_vrm1_4 -> VRM8
      71,	// sub_vrm1_5 -> VRM8
      71,	// sub_vrm1_6 -> VRM8
      71,	// sub_vrm1_7 -> VRM8
      71,	// sub_vrm2_0 -> VRM8
      71,	// sub_vrm2_1 -> VRM8
      71,	// sub_vrm2_2 -> VRM8
      71,	// sub_vrm2_3 -> VRM8
      71,	// sub_vrm4_0 -> VRM8
      71,	// sub_vrm4_1 -> VRM8
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM8NoV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      72,	// sub_vrm1_0 -> VRM8NoV0
      72,	// sub_vrm1_1 -> VRM8NoV0
      72,	// sub_vrm1_2 -> VRM8NoV0
      72,	// sub_vrm1_3 -> VRM8NoV0
      72,	// sub_vrm1_4 -> VRM8NoV0
      72,	// sub_vrm1_5 -> VRM8NoV0
      72,	// sub_vrm1_6 -> VRM8NoV0
      72,	// sub_vrm1_7 -> VRM8NoV0
      72,	// sub_vrm2_0 -> VRM8NoV0
      72,	// sub_vrm2_1 -> VRM8NoV0
      72,	// sub_vrm2_2 -> VRM8NoV0
      72,	// sub_vrm2_3 -> VRM8NoV0
      72,	// sub_vrm4_0 -> VRM8NoV0
      72,	// sub_vrm4_1 -> VRM8NoV0
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM8_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      73,	// sub_vrm1_0 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm1_1 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm1_2 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm1_3 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm1_4 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm1_5 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm1_6 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm1_7 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm2_0 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm2_1 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm2_2 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm2_3 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm4_0 -> VRM8_with_sub_vrm1_0_in_VMV0
      73,	// sub_vrm4_1 -> VRM8_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_1_sub_vrm1_2
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_2_sub_vrm1_3
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_3_sub_vrm1_4
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_4_sub_vrm1_5
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_5_sub_vrm1_6
      0,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm1_6_sub_vrm1_7
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M4_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      74,	// sub_vrm1_0 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_1 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_2 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_4 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_5 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_6 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_0 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_1 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_2 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm4_0 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm4_1 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_0_sub_vrm1_1 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_1_sub_vrm1_2 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_2_sub_vrm1_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_3_sub_vrm1_4 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_4_sub_vrm1_5 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_5_sub_vrm1_6 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm1_6_sub_vrm1_7 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_0_sub_vrm2_1 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_1_sub_vrm2_2 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
      74,	// sub_vrm2_2_sub_vrm2_3 -> VRN2M4_with_sub_vrm1_0_in_VMV0
    },
    {	// VRN4M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      75,	// sub_vrm1_0 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_1 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_2 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_4 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_5 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_6 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_0 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_1 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_2 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      75,	// sub_vrm1_0_sub_vrm1_1 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_1_sub_vrm1_2 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_2_sub_vrm1_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_3_sub_vrm1_4 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_4_sub_vrm1_5 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_5_sub_vrm1_6 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm1_6_sub_vrm1_7 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_0_sub_vrm2_1 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      75,	// sub_vrm2_1_sub_vrm2_2 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      75,	// sub_vrm2_2_sub_vrm2_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
    },
    {	// VRN8M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_16
      0,	// sub_32
      0,	// sub_32_hi
      76,	// sub_vrm1_0 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_1 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_2 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_3 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_4 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_5 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_6 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_0
      0,	// sub_vrm2_1
      0,	// sub_vrm2_2
      0,	// sub_vrm2_3
      0,	// sub_vrm4_0
      0,	// sub_vrm4_1
      76,	// sub_vrm1_0_sub_vrm1_1 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_1_sub_vrm1_2 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_2_sub_vrm1_3 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      76,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_3_sub_vrm1_4 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_4_sub_vrm1_5 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_5_sub_vrm1_6 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      76,	// sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      0,	// sub_vrm2_0_sub_vrm2_1
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_1_sub_vrm2_2
      0,	// sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// sub_vrm2_2_sub_vrm2_3
    },
  };
  assert(RC && "Missing regclass");
  if (!Idx) return RC;
  --Idx;
  assert(Idx < 51 && "Bad subreg");
  unsigned TV = Table[RC->getID()][Idx];
  return TV ? getRegClass(TV - 1) : nullptr;
}

const TargetRegisterClass *RISCVGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const {
  static const uint8_t Table[76][51] = {
    {	// FPR16
      0,	// FPR16:sub_16
      0,	// FPR16:sub_32
      0,	// FPR16:sub_32_hi
      0,	// FPR16:sub_vrm1_0
      0,	// FPR16:sub_vrm1_1
      0,	// FPR16:sub_vrm1_2
      0,	// FPR16:sub_vrm1_3
      0,	// FPR16:sub_vrm1_4
      0,	// FPR16:sub_vrm1_5
      0,	// FPR16:sub_vrm1_6
      0,	// FPR16:sub_vrm1_7
      0,	// FPR16:sub_vrm2_0
      0,	// FPR16:sub_vrm2_1
      0,	// FPR16:sub_vrm2_2
      0,	// FPR16:sub_vrm2_3
      0,	// FPR16:sub_vrm4_0
      0,	// FPR16:sub_vrm4_1
      0,	// FPR16:sub_vrm1_0_sub_vrm1_1
      0,	// FPR16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// FPR16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR16:sub_vrm1_1_sub_vrm1_2
      0,	// FPR16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR16:sub_vrm1_2_sub_vrm1_3
      0,	// FPR16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR16:sub_vrm1_3_sub_vrm1_4
      0,	// FPR16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR16:sub_vrm1_4_sub_vrm1_5
      0,	// FPR16:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR16:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR16:sub_vrm1_5_sub_vrm1_6
      0,	// FPR16:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR16:sub_vrm1_6_sub_vrm1_7
      0,	// FPR16:sub_vrm2_0_sub_vrm2_1
      0,	// FPR16:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// FPR16:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR16:sub_vrm2_1_sub_vrm2_2
      0,	// FPR16:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR16:sub_vrm2_2_sub_vrm2_3
    },
    {	// AnyReg
      1,	// AnyReg:sub_16 -> FPR16
      4,	// AnyReg:sub_32 -> FPR32
      0,	// AnyReg:sub_32_hi
      0,	// AnyReg:sub_vrm1_0
      0,	// AnyReg:sub_vrm1_1
      0,	// AnyReg:sub_vrm1_2
      0,	// AnyReg:sub_vrm1_3
      0,	// AnyReg:sub_vrm1_4
      0,	// AnyReg:sub_vrm1_5
      0,	// AnyReg:sub_vrm1_6
      0,	// AnyReg:sub_vrm1_7
      0,	// AnyReg:sub_vrm2_0
      0,	// AnyReg:sub_vrm2_1
      0,	// AnyReg:sub_vrm2_2
      0,	// AnyReg:sub_vrm2_3
      0,	// AnyReg:sub_vrm4_0
      0,	// AnyReg:sub_vrm4_1
      0,	// AnyReg:sub_vrm1_0_sub_vrm1_1
      0,	// AnyReg:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// AnyReg:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg:sub_vrm1_1_sub_vrm1_2
      0,	// AnyReg:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg:sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg:sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg:sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg:sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg:sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg:sub_vrm2_0_sub_vrm2_1
      0,	// AnyReg:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// AnyReg:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// AnyReg:sub_vrm2_1_sub_vrm2_2
      0,	// AnyReg:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// AnyReg:sub_vrm2_2_sub_vrm2_3
    },
    {	// AnyReg_with_sub_16
      1,	// AnyReg_with_sub_16:sub_16 -> FPR16
      4,	// AnyReg_with_sub_16:sub_32 -> FPR32
      0,	// AnyReg_with_sub_16:sub_32_hi
      0,	// AnyReg_with_sub_16:sub_vrm1_0
      0,	// AnyReg_with_sub_16:sub_vrm1_1
      0,	// AnyReg_with_sub_16:sub_vrm1_2
      0,	// AnyReg_with_sub_16:sub_vrm1_3
      0,	// AnyReg_with_sub_16:sub_vrm1_4
      0,	// AnyReg_with_sub_16:sub_vrm1_5
      0,	// AnyReg_with_sub_16:sub_vrm1_6
      0,	// AnyReg_with_sub_16:sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm2_0
      0,	// AnyReg_with_sub_16:sub_vrm2_1
      0,	// AnyReg_with_sub_16:sub_vrm2_2
      0,	// AnyReg_with_sub_16:sub_vrm2_3
      0,	// AnyReg_with_sub_16:sub_vrm4_0
      0,	// AnyReg_with_sub_16:sub_vrm4_1
      0,	// AnyReg_with_sub_16:sub_vrm1_0_sub_vrm1_1
      0,	// AnyReg_with_sub_16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// AnyReg_with_sub_16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg_with_sub_16:sub_vrm1_1_sub_vrm1_2
      0,	// AnyReg_with_sub_16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg_with_sub_16:sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg_with_sub_16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16:sub_vrm2_0_sub_vrm2_1
      0,	// AnyReg_with_sub_16:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// AnyReg_with_sub_16:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// AnyReg_with_sub_16:sub_vrm2_1_sub_vrm2_2
      0,	// AnyReg_with_sub_16:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// AnyReg_with_sub_16:sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR32
      1,	// FPR32:sub_16 -> FPR16
      0,	// FPR32:sub_32
      0,	// FPR32:sub_32_hi
      0,	// FPR32:sub_vrm1_0
      0,	// FPR32:sub_vrm1_1
      0,	// FPR32:sub_vrm1_2
      0,	// FPR32:sub_vrm1_3
      0,	// FPR32:sub_vrm1_4
      0,	// FPR32:sub_vrm1_5
      0,	// FPR32:sub_vrm1_6
      0,	// FPR32:sub_vrm1_7
      0,	// FPR32:sub_vrm2_0
      0,	// FPR32:sub_vrm2_1
      0,	// FPR32:sub_vrm2_2
      0,	// FPR32:sub_vrm2_3
      0,	// FPR32:sub_vrm4_0
      0,	// FPR32:sub_vrm4_1
      0,	// FPR32:sub_vrm1_0_sub_vrm1_1
      0,	// FPR32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// FPR32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR32:sub_vrm1_1_sub_vrm1_2
      0,	// FPR32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR32:sub_vrm1_2_sub_vrm1_3
      0,	// FPR32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32:sub_vrm1_3_sub_vrm1_4
      0,	// FPR32:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32:sub_vrm1_4_sub_vrm1_5
      0,	// FPR32:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32:sub_vrm1_5_sub_vrm1_6
      0,	// FPR32:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32:sub_vrm1_6_sub_vrm1_7
      0,	// FPR32:sub_vrm2_0_sub_vrm2_1
      0,	// FPR32:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// FPR32:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR32:sub_vrm2_1_sub_vrm2_2
      0,	// FPR32:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR32:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPR
      0,	// GPR:sub_16
      0,	// GPR:sub_32
      0,	// GPR:sub_32_hi
      0,	// GPR:sub_vrm1_0
      0,	// GPR:sub_vrm1_1
      0,	// GPR:sub_vrm1_2
      0,	// GPR:sub_vrm1_3
      0,	// GPR:sub_vrm1_4
      0,	// GPR:sub_vrm1_5
      0,	// GPR:sub_vrm1_6
      0,	// GPR:sub_vrm1_7
      0,	// GPR:sub_vrm2_0
      0,	// GPR:sub_vrm2_1
      0,	// GPR:sub_vrm2_2
      0,	// GPR:sub_vrm2_3
      0,	// GPR:sub_vrm4_0
      0,	// GPR:sub_vrm4_1
      0,	// GPR:sub_vrm1_0_sub_vrm1_1
      0,	// GPR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPR:sub_vrm1_1_sub_vrm1_2
      0,	// GPR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPR:sub_vrm1_2_sub_vrm1_3
      0,	// GPR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPR:sub_vrm1_3_sub_vrm1_4
      0,	// GPR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPR:sub_vrm1_4_sub_vrm1_5
      0,	// GPR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPR:sub_vrm1_5_sub_vrm1_6
      0,	// GPR:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPR:sub_vrm1_6_sub_vrm1_7
      0,	// GPR:sub_vrm2_0_sub_vrm2_1
      0,	// GPR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPR:sub_vrm2_1_sub_vrm2_2
      0,	// GPR:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPR:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRF16
      0,	// GPRF16:sub_16
      0,	// GPRF16:sub_32
      0,	// GPRF16:sub_32_hi
      0,	// GPRF16:sub_vrm1_0
      0,	// GPRF16:sub_vrm1_1
      0,	// GPRF16:sub_vrm1_2
      0,	// GPRF16:sub_vrm1_3
      0,	// GPRF16:sub_vrm1_4
      0,	// GPRF16:sub_vrm1_5
      0,	// GPRF16:sub_vrm1_6
      0,	// GPRF16:sub_vrm1_7
      0,	// GPRF16:sub_vrm2_0
      0,	// GPRF16:sub_vrm2_1
      0,	// GPRF16:sub_vrm2_2
      0,	// GPRF16:sub_vrm2_3
      0,	// GPRF16:sub_vrm4_0
      0,	// GPRF16:sub_vrm4_1
      0,	// GPRF16:sub_vrm1_0_sub_vrm1_1
      0,	// GPRF16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRF16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRF16:sub_vrm1_1_sub_vrm1_2
      0,	// GPRF16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRF16:sub_vrm1_2_sub_vrm1_3
      0,	// GPRF16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF16:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF16:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF16:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF16:sub_vrm1_3_sub_vrm1_4
      0,	// GPRF16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF16:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF16:sub_vrm1_4_sub_vrm1_5
      0,	// GPRF16:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF16:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF16:sub_vrm1_5_sub_vrm1_6
      0,	// GPRF16:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF16:sub_vrm1_6_sub_vrm1_7
      0,	// GPRF16:sub_vrm2_0_sub_vrm2_1
      0,	// GPRF16:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRF16:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRF16:sub_vrm2_1_sub_vrm2_2
      0,	// GPRF16:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRF16:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRF32
      0,	// GPRF32:sub_16
      0,	// GPRF32:sub_32
      0,	// GPRF32:sub_32_hi
      0,	// GPRF32:sub_vrm1_0
      0,	// GPRF32:sub_vrm1_1
      0,	// GPRF32:sub_vrm1_2
      0,	// GPRF32:sub_vrm1_3
      0,	// GPRF32:sub_vrm1_4
      0,	// GPRF32:sub_vrm1_5
      0,	// GPRF32:sub_vrm1_6
      0,	// GPRF32:sub_vrm1_7
      0,	// GPRF32:sub_vrm2_0
      0,	// GPRF32:sub_vrm2_1
      0,	// GPRF32:sub_vrm2_2
      0,	// GPRF32:sub_vrm2_3
      0,	// GPRF32:sub_vrm4_0
      0,	// GPRF32:sub_vrm4_1
      0,	// GPRF32:sub_vrm1_0_sub_vrm1_1
      0,	// GPRF32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRF32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRF32:sub_vrm1_1_sub_vrm1_2
      0,	// GPRF32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRF32:sub_vrm1_2_sub_vrm1_3
      0,	// GPRF32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF32:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF32:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF32:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF32:sub_vrm1_3_sub_vrm1_4
      0,	// GPRF32:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF32:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF32:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF32:sub_vrm1_4_sub_vrm1_5
      0,	// GPRF32:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF32:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF32:sub_vrm1_5_sub_vrm1_6
      0,	// GPRF32:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF32:sub_vrm1_6_sub_vrm1_7
      0,	// GPRF32:sub_vrm2_0_sub_vrm2_1
      0,	// GPRF32:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRF32:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRF32:sub_vrm2_1_sub_vrm2_2
      0,	// GPRF32:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRF32:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRF64
      0,	// GPRF64:sub_16
      0,	// GPRF64:sub_32
      0,	// GPRF64:sub_32_hi
      0,	// GPRF64:sub_vrm1_0
      0,	// GPRF64:sub_vrm1_1
      0,	// GPRF64:sub_vrm1_2
      0,	// GPRF64:sub_vrm1_3
      0,	// GPRF64:sub_vrm1_4
      0,	// GPRF64:sub_vrm1_5
      0,	// GPRF64:sub_vrm1_6
      0,	// GPRF64:sub_vrm1_7
      0,	// GPRF64:sub_vrm2_0
      0,	// GPRF64:sub_vrm2_1
      0,	// GPRF64:sub_vrm2_2
      0,	// GPRF64:sub_vrm2_3
      0,	// GPRF64:sub_vrm4_0
      0,	// GPRF64:sub_vrm4_1
      0,	// GPRF64:sub_vrm1_0_sub_vrm1_1
      0,	// GPRF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRF64:sub_vrm1_1_sub_vrm1_2
      0,	// GPRF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRF64:sub_vrm1_2_sub_vrm1_3
      0,	// GPRF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF64:sub_vrm1_3_sub_vrm1_4
      0,	// GPRF64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRF64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF64:sub_vrm1_4_sub_vrm1_5
      0,	// GPRF64:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRF64:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF64:sub_vrm1_5_sub_vrm1_6
      0,	// GPRF64:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRF64:sub_vrm1_6_sub_vrm1_7
      0,	// GPRF64:sub_vrm2_0_sub_vrm2_1
      0,	// GPRF64:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRF64:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRF64:sub_vrm2_1_sub_vrm2_2
      0,	// GPRF64:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRF64:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRNoX0
      0,	// GPRNoX0:sub_16
      0,	// GPRNoX0:sub_32
      0,	// GPRNoX0:sub_32_hi
      0,	// GPRNoX0:sub_vrm1_0
      0,	// GPRNoX0:sub_vrm1_1
      0,	// GPRNoX0:sub_vrm1_2
      0,	// GPRNoX0:sub_vrm1_3
      0,	// GPRNoX0:sub_vrm1_4
      0,	// GPRNoX0:sub_vrm1_5
      0,	// GPRNoX0:sub_vrm1_6
      0,	// GPRNoX0:sub_vrm1_7
      0,	// GPRNoX0:sub_vrm2_0
      0,	// GPRNoX0:sub_vrm2_1
      0,	// GPRNoX0:sub_vrm2_2
      0,	// GPRNoX0:sub_vrm2_3
      0,	// GPRNoX0:sub_vrm4_0
      0,	// GPRNoX0:sub_vrm4_1
      0,	// GPRNoX0:sub_vrm1_0_sub_vrm1_1
      0,	// GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRNoX0:sub_vrm1_1_sub_vrm1_2
      0,	// GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRNoX0:sub_vrm1_2_sub_vrm1_3
      0,	// GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0:sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0:sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0:sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0:sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0:sub_vrm2_0_sub_vrm2_1
      0,	// GPRNoX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRNoX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRNoX0:sub_vrm2_1_sub_vrm2_2
      0,	// GPRNoX0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRNoX0:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRNoX0X2
      0,	// GPRNoX0X2:sub_16
      0,	// GPRNoX0X2:sub_32
      0,	// GPRNoX0X2:sub_32_hi
      0,	// GPRNoX0X2:sub_vrm1_0
      0,	// GPRNoX0X2:sub_vrm1_1
      0,	// GPRNoX0X2:sub_vrm1_2
      0,	// GPRNoX0X2:sub_vrm1_3
      0,	// GPRNoX0X2:sub_vrm1_4
      0,	// GPRNoX0X2:sub_vrm1_5
      0,	// GPRNoX0X2:sub_vrm1_6
      0,	// GPRNoX0X2:sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm2_0
      0,	// GPRNoX0X2:sub_vrm2_1
      0,	// GPRNoX0X2:sub_vrm2_2
      0,	// GPRNoX0X2:sub_vrm2_3
      0,	// GPRNoX0X2:sub_vrm4_0
      0,	// GPRNoX0X2:sub_vrm4_1
      0,	// GPRNoX0X2:sub_vrm1_0_sub_vrm1_1
      0,	// GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRNoX0X2:sub_vrm1_1_sub_vrm1_2
      0,	// GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRNoX0X2:sub_vrm1_2_sub_vrm1_3
      0,	// GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm1_3_sub_vrm1_4
      0,	// GPRNoX0X2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0X2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0X2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm1_4_sub_vrm1_5
      0,	// GPRNoX0X2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0X2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm1_5_sub_vrm1_6
      0,	// GPRNoX0X2:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm1_6_sub_vrm1_7
      0,	// GPRNoX0X2:sub_vrm2_0_sub_vrm2_1
      0,	// GPRNoX0X2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRNoX0X2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRNoX0X2:sub_vrm2_1_sub_vrm2_2
      0,	// GPRNoX0X2:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRNoX0X2:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRJALR
      0,	// GPRJALR:sub_16
      0,	// GPRJALR:sub_32
      0,	// GPRJALR:sub_32_hi
      0,	// GPRJALR:sub_vrm1_0
      0,	// GPRJALR:sub_vrm1_1
      0,	// GPRJALR:sub_vrm1_2
      0,	// GPRJALR:sub_vrm1_3
      0,	// GPRJALR:sub_vrm1_4
      0,	// GPRJALR:sub_vrm1_5
      0,	// GPRJALR:sub_vrm1_6
      0,	// GPRJALR:sub_vrm1_7
      0,	// GPRJALR:sub_vrm2_0
      0,	// GPRJALR:sub_vrm2_1
      0,	// GPRJALR:sub_vrm2_2
      0,	// GPRJALR:sub_vrm2_3
      0,	// GPRJALR:sub_vrm4_0
      0,	// GPRJALR:sub_vrm4_1
      0,	// GPRJALR:sub_vrm1_0_sub_vrm1_1
      0,	// GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRJALR:sub_vrm1_1_sub_vrm1_2
      0,	// GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRJALR:sub_vrm1_2_sub_vrm1_3
      0,	// GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRJALR:sub_vrm1_3_sub_vrm1_4
      0,	// GPRJALR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRJALR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRJALR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRJALR:sub_vrm1_4_sub_vrm1_5
      0,	// GPRJALR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRJALR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRJALR:sub_vrm1_5_sub_vrm1_6
      0,	// GPRJALR:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRJALR:sub_vrm1_6_sub_vrm1_7
      0,	// GPRJALR:sub_vrm2_0_sub_vrm2_1
      0,	// GPRJALR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRJALR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRJALR:sub_vrm2_1_sub_vrm2_2
      0,	// GPRJALR:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRJALR:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRTC
      0,	// GPRTC:sub_16
      0,	// GPRTC:sub_32
      0,	// GPRTC:sub_32_hi
      0,	// GPRTC:sub_vrm1_0
      0,	// GPRTC:sub_vrm1_1
      0,	// GPRTC:sub_vrm1_2
      0,	// GPRTC:sub_vrm1_3
      0,	// GPRTC:sub_vrm1_4
      0,	// GPRTC:sub_vrm1_5
      0,	// GPRTC:sub_vrm1_6
      0,	// GPRTC:sub_vrm1_7
      0,	// GPRTC:sub_vrm2_0
      0,	// GPRTC:sub_vrm2_1
      0,	// GPRTC:sub_vrm2_2
      0,	// GPRTC:sub_vrm2_3
      0,	// GPRTC:sub_vrm4_0
      0,	// GPRTC:sub_vrm4_1
      0,	// GPRTC:sub_vrm1_0_sub_vrm1_1
      0,	// GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRTC:sub_vrm1_1_sub_vrm1_2
      0,	// GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRTC:sub_vrm1_2_sub_vrm1_3
      0,	// GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRTC:sub_vrm1_3_sub_vrm1_4
      0,	// GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRTC:sub_vrm1_4_sub_vrm1_5
      0,	// GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRTC:sub_vrm1_5_sub_vrm1_6
      0,	// GPRTC:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRTC:sub_vrm1_6_sub_vrm1_7
      0,	// GPRTC:sub_vrm2_0_sub_vrm2_1
      0,	// GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRTC:sub_vrm2_1_sub_vrm2_2
      0,	// GPRTC:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRTC:sub_vrm2_2_sub_vrm2_3
    },
    {	// AnyReg_with_sub_16_with_sub_32_in_FPR32C
      1,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_16 -> FPR16
      14,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_32 -> FPR32C
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_32_hi
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_1
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_2
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_3
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_4
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_5
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_6
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_0
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_1
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_2
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_3
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm4_0
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm4_1
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0_sub_vrm1_1
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_1_sub_vrm1_2
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_2_sub_vrm1_3
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_3_sub_vrm1_4
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_4_sub_vrm1_5
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_5_sub_vrm1_6
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm1_6_sub_vrm1_7
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_0_sub_vrm2_1
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_1_sub_vrm2_2
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// AnyReg_with_sub_16_with_sub_32_in_FPR32C:sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR32C
      1,	// FPR32C:sub_16 -> FPR16
      0,	// FPR32C:sub_32
      0,	// FPR32C:sub_32_hi
      0,	// FPR32C:sub_vrm1_0
      0,	// FPR32C:sub_vrm1_1
      0,	// FPR32C:sub_vrm1_2
      0,	// FPR32C:sub_vrm1_3
      0,	// FPR32C:sub_vrm1_4
      0,	// FPR32C:sub_vrm1_5
      0,	// FPR32C:sub_vrm1_6
      0,	// FPR32C:sub_vrm1_7
      0,	// FPR32C:sub_vrm2_0
      0,	// FPR32C:sub_vrm2_1
      0,	// FPR32C:sub_vrm2_2
      0,	// FPR32C:sub_vrm2_3
      0,	// FPR32C:sub_vrm4_0
      0,	// FPR32C:sub_vrm4_1
      0,	// FPR32C:sub_vrm1_0_sub_vrm1_1
      0,	// FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR32C:sub_vrm1_1_sub_vrm1_2
      0,	// FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR32C:sub_vrm1_2_sub_vrm1_3
      0,	// FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32C:sub_vrm1_3_sub_vrm1_4
      0,	// FPR32C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR32C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32C:sub_vrm1_4_sub_vrm1_5
      0,	// FPR32C:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR32C:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32C:sub_vrm1_5_sub_vrm1_6
      0,	// FPR32C:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR32C:sub_vrm1_6_sub_vrm1_7
      0,	// FPR32C:sub_vrm2_0_sub_vrm2_1
      0,	// FPR32C:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// FPR32C:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR32C:sub_vrm2_1_sub_vrm2_2
      0,	// FPR32C:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR32C:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRC
      0,	// GPRC:sub_16
      0,	// GPRC:sub_32
      0,	// GPRC:sub_32_hi
      0,	// GPRC:sub_vrm1_0
      0,	// GPRC:sub_vrm1_1
      0,	// GPRC:sub_vrm1_2
      0,	// GPRC:sub_vrm1_3
      0,	// GPRC:sub_vrm1_4
      0,	// GPRC:sub_vrm1_5
      0,	// GPRC:sub_vrm1_6
      0,	// GPRC:sub_vrm1_7
      0,	// GPRC:sub_vrm2_0
      0,	// GPRC:sub_vrm2_1
      0,	// GPRC:sub_vrm2_2
      0,	// GPRC:sub_vrm2_3
      0,	// GPRC:sub_vrm4_0
      0,	// GPRC:sub_vrm4_1
      0,	// GPRC:sub_vrm1_0_sub_vrm1_1
      0,	// GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRC:sub_vrm1_1_sub_vrm1_2
      0,	// GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRC:sub_vrm1_2_sub_vrm1_3
      0,	// GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC:sub_vrm1_3_sub_vrm1_4
      0,	// GPRC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC:sub_vrm1_4_sub_vrm1_5
      0,	// GPRC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC:sub_vrm1_5_sub_vrm1_6
      0,	// GPRC:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC:sub_vrm1_6_sub_vrm1_7
      0,	// GPRC:sub_vrm2_0_sub_vrm2_1
      0,	// GPRC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRC:sub_vrm2_1_sub_vrm2_2
      0,	// GPRC:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRC:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRC_and_GPRTC
      0,	// GPRC_and_GPRTC:sub_16
      0,	// GPRC_and_GPRTC:sub_32
      0,	// GPRC_and_GPRTC:sub_32_hi
      0,	// GPRC_and_GPRTC:sub_vrm1_0
      0,	// GPRC_and_GPRTC:sub_vrm1_1
      0,	// GPRC_and_GPRTC:sub_vrm1_2
      0,	// GPRC_and_GPRTC:sub_vrm1_3
      0,	// GPRC_and_GPRTC:sub_vrm1_4
      0,	// GPRC_and_GPRTC:sub_vrm1_5
      0,	// GPRC_and_GPRTC:sub_vrm1_6
      0,	// GPRC_and_GPRTC:sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm2_0
      0,	// GPRC_and_GPRTC:sub_vrm2_1
      0,	// GPRC_and_GPRTC:sub_vrm2_2
      0,	// GPRC_and_GPRTC:sub_vrm2_3
      0,	// GPRC_and_GPRTC:sub_vrm4_0
      0,	// GPRC_and_GPRTC:sub_vrm4_1
      0,	// GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1
      0,	// GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2
      0,	// GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3
      0,	// GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4
      0,	// GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm1_4_sub_vrm1_5
      0,	// GPRC_and_GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRC_and_GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm1_5_sub_vrm1_6
      0,	// GPRC_and_GPRTC:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm1_6_sub_vrm1_7
      0,	// GPRC_and_GPRTC:sub_vrm2_0_sub_vrm2_1
      0,	// GPRC_and_GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRC_and_GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRC_and_GPRTC:sub_vrm2_1_sub_vrm2_2
      0,	// GPRC_and_GPRTC:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRC_and_GPRTC:sub_vrm2_2_sub_vrm2_3
    },
    {	// VCSR
      0,	// VCSR:sub_16
      0,	// VCSR:sub_32
      0,	// VCSR:sub_32_hi
      0,	// VCSR:sub_vrm1_0
      0,	// VCSR:sub_vrm1_1
      0,	// VCSR:sub_vrm1_2
      0,	// VCSR:sub_vrm1_3
      0,	// VCSR:sub_vrm1_4
      0,	// VCSR:sub_vrm1_5
      0,	// VCSR:sub_vrm1_6
      0,	// VCSR:sub_vrm1_7
      0,	// VCSR:sub_vrm2_0
      0,	// VCSR:sub_vrm2_1
      0,	// VCSR:sub_vrm2_2
      0,	// VCSR:sub_vrm2_3
      0,	// VCSR:sub_vrm4_0
      0,	// VCSR:sub_vrm4_1
      0,	// VCSR:sub_vrm1_0_sub_vrm1_1
      0,	// VCSR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VCSR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VCSR:sub_vrm1_1_sub_vrm1_2
      0,	// VCSR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VCSR:sub_vrm1_2_sub_vrm1_3
      0,	// VCSR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VCSR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VCSR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VCSR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VCSR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VCSR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VCSR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VCSR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VCSR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VCSR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VCSR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VCSR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VCSR:sub_vrm1_3_sub_vrm1_4
      0,	// VCSR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VCSR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VCSR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VCSR:sub_vrm1_4_sub_vrm1_5
      0,	// VCSR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VCSR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VCSR:sub_vrm1_5_sub_vrm1_6
      0,	// VCSR:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VCSR:sub_vrm1_6_sub_vrm1_7
      0,	// VCSR:sub_vrm2_0_sub_vrm2_1
      0,	// VCSR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VCSR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VCSR:sub_vrm2_1_sub_vrm2_2
      0,	// VCSR:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VCSR:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRX0
      0,	// GPRX0:sub_16
      0,	// GPRX0:sub_32
      0,	// GPRX0:sub_32_hi
      0,	// GPRX0:sub_vrm1_0
      0,	// GPRX0:sub_vrm1_1
      0,	// GPRX0:sub_vrm1_2
      0,	// GPRX0:sub_vrm1_3
      0,	// GPRX0:sub_vrm1_4
      0,	// GPRX0:sub_vrm1_5
      0,	// GPRX0:sub_vrm1_6
      0,	// GPRX0:sub_vrm1_7
      0,	// GPRX0:sub_vrm2_0
      0,	// GPRX0:sub_vrm2_1
      0,	// GPRX0:sub_vrm2_2
      0,	// GPRX0:sub_vrm2_3
      0,	// GPRX0:sub_vrm4_0
      0,	// GPRX0:sub_vrm4_1
      0,	// GPRX0:sub_vrm1_0_sub_vrm1_1
      0,	// GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRX0:sub_vrm1_1_sub_vrm1_2
      0,	// GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRX0:sub_vrm1_2_sub_vrm1_3
      0,	// GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRX0:sub_vrm1_3_sub_vrm1_4
      0,	// GPRX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRX0:sub_vrm1_4_sub_vrm1_5
      0,	// GPRX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRX0:sub_vrm1_5_sub_vrm1_6
      0,	// GPRX0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRX0:sub_vrm1_6_sub_vrm1_7
      0,	// GPRX0:sub_vrm2_0_sub_vrm2_1
      0,	// GPRX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRX0:sub_vrm2_1_sub_vrm2_2
      0,	// GPRX0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRX0:sub_vrm2_2_sub_vrm2_3
    },
    {	// SP
      0,	// SP:sub_16
      0,	// SP:sub_32
      0,	// SP:sub_32_hi
      0,	// SP:sub_vrm1_0
      0,	// SP:sub_vrm1_1
      0,	// SP:sub_vrm1_2
      0,	// SP:sub_vrm1_3
      0,	// SP:sub_vrm1_4
      0,	// SP:sub_vrm1_5
      0,	// SP:sub_vrm1_6
      0,	// SP:sub_vrm1_7
      0,	// SP:sub_vrm2_0
      0,	// SP:sub_vrm2_1
      0,	// SP:sub_vrm2_2
      0,	// SP:sub_vrm2_3
      0,	// SP:sub_vrm4_0
      0,	// SP:sub_vrm4_1
      0,	// SP:sub_vrm1_0_sub_vrm1_1
      0,	// SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// SP:sub_vrm1_1_sub_vrm1_2
      0,	// SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// SP:sub_vrm1_2_sub_vrm1_3
      0,	// SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// SP:sub_vrm1_3_sub_vrm1_4
      0,	// SP:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// SP:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// SP:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// SP:sub_vrm1_4_sub_vrm1_5
      0,	// SP:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// SP:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// SP:sub_vrm1_5_sub_vrm1_6
      0,	// SP:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// SP:sub_vrm1_6_sub_vrm1_7
      0,	// SP:sub_vrm2_0_sub_vrm2_1
      0,	// SP:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// SP:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// SP:sub_vrm2_1_sub_vrm2_2
      0,	// SP:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// SP:sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR64
      1,	// FPR64:sub_16 -> FPR16
      4,	// FPR64:sub_32 -> FPR32
      0,	// FPR64:sub_32_hi
      0,	// FPR64:sub_vrm1_0
      0,	// FPR64:sub_vrm1_1
      0,	// FPR64:sub_vrm1_2
      0,	// FPR64:sub_vrm1_3
      0,	// FPR64:sub_vrm1_4
      0,	// FPR64:sub_vrm1_5
      0,	// FPR64:sub_vrm1_6
      0,	// FPR64:sub_vrm1_7
      0,	// FPR64:sub_vrm2_0
      0,	// FPR64:sub_vrm2_1
      0,	// FPR64:sub_vrm2_2
      0,	// FPR64:sub_vrm2_3
      0,	// FPR64:sub_vrm4_0
      0,	// FPR64:sub_vrm4_1
      0,	// FPR64:sub_vrm1_0_sub_vrm1_1
      0,	// FPR64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// FPR64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR64:sub_vrm1_1_sub_vrm1_2
      0,	// FPR64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR64:sub_vrm1_2_sub_vrm1_3
      0,	// FPR64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64:sub_vrm1_3_sub_vrm1_4
      0,	// FPR64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64:sub_vrm1_4_sub_vrm1_5
      0,	// FPR64:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64:sub_vrm1_5_sub_vrm1_6
      0,	// FPR64:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64:sub_vrm1_6_sub_vrm1_7
      0,	// FPR64:sub_vrm2_0_sub_vrm2_1
      0,	// FPR64:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// FPR64:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR64:sub_vrm2_1_sub_vrm2_2
      0,	// FPR64:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR64:sub_vrm2_2_sub_vrm2_3
    },
    {	// VM
      0,	// VM:sub_16
      0,	// VM:sub_32
      0,	// VM:sub_32_hi
      0,	// VM:sub_vrm1_0
      0,	// VM:sub_vrm1_1
      0,	// VM:sub_vrm1_2
      0,	// VM:sub_vrm1_3
      0,	// VM:sub_vrm1_4
      0,	// VM:sub_vrm1_5
      0,	// VM:sub_vrm1_6
      0,	// VM:sub_vrm1_7
      0,	// VM:sub_vrm2_0
      0,	// VM:sub_vrm2_1
      0,	// VM:sub_vrm2_2
      0,	// VM:sub_vrm2_3
      0,	// VM:sub_vrm4_0
      0,	// VM:sub_vrm4_1
      0,	// VM:sub_vrm1_0_sub_vrm1_1
      0,	// VM:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VM:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VM:sub_vrm1_1_sub_vrm1_2
      0,	// VM:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VM:sub_vrm1_2_sub_vrm1_3
      0,	// VM:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VM:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VM:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VM:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VM:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VM:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VM:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VM:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VM:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VM:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VM:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VM:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VM:sub_vrm1_3_sub_vrm1_4
      0,	// VM:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VM:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VM:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VM:sub_vrm1_4_sub_vrm1_5
      0,	// VM:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VM:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VM:sub_vrm1_5_sub_vrm1_6
      0,	// VM:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VM:sub_vrm1_6_sub_vrm1_7
      0,	// VM:sub_vrm2_0_sub_vrm2_1
      0,	// VM:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VM:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VM:sub_vrm2_1_sub_vrm2_2
      0,	// VM:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VM:sub_vrm2_2_sub_vrm2_3
    },
    {	// VR
      0,	// VR:sub_16
      0,	// VR:sub_32
      0,	// VR:sub_32_hi
      0,	// VR:sub_vrm1_0
      0,	// VR:sub_vrm1_1
      0,	// VR:sub_vrm1_2
      0,	// VR:sub_vrm1_3
      0,	// VR:sub_vrm1_4
      0,	// VR:sub_vrm1_5
      0,	// VR:sub_vrm1_6
      0,	// VR:sub_vrm1_7
      0,	// VR:sub_vrm2_0
      0,	// VR:sub_vrm2_1
      0,	// VR:sub_vrm2_2
      0,	// VR:sub_vrm2_3
      0,	// VR:sub_vrm4_0
      0,	// VR:sub_vrm4_1
      0,	// VR:sub_vrm1_0_sub_vrm1_1
      0,	// VR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VR:sub_vrm1_1_sub_vrm1_2
      0,	// VR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VR:sub_vrm1_2_sub_vrm1_3
      0,	// VR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VR:sub_vrm1_3_sub_vrm1_4
      0,	// VR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VR:sub_vrm1_4_sub_vrm1_5
      0,	// VR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VR:sub_vrm1_5_sub_vrm1_6
      0,	// VR:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VR:sub_vrm1_6_sub_vrm1_7
      0,	// VR:sub_vrm2_0_sub_vrm2_1
      0,	// VR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VR:sub_vrm2_1_sub_vrm2_2
      0,	// VR:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VR:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRNoV0
      0,	// VRNoV0:sub_16
      0,	// VRNoV0:sub_32
      0,	// VRNoV0:sub_32_hi
      0,	// VRNoV0:sub_vrm1_0
      0,	// VRNoV0:sub_vrm1_1
      0,	// VRNoV0:sub_vrm1_2
      0,	// VRNoV0:sub_vrm1_3
      0,	// VRNoV0:sub_vrm1_4
      0,	// VRNoV0:sub_vrm1_5
      0,	// VRNoV0:sub_vrm1_6
      0,	// VRNoV0:sub_vrm1_7
      0,	// VRNoV0:sub_vrm2_0
      0,	// VRNoV0:sub_vrm2_1
      0,	// VRNoV0:sub_vrm2_2
      0,	// VRNoV0:sub_vrm2_3
      0,	// VRNoV0:sub_vrm4_0
      0,	// VRNoV0:sub_vrm4_1
      0,	// VRNoV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRNoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRNoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRNoV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRNoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRNoV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRNoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRNoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRNoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRNoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRNoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRNoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRNoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRNoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRNoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRNoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRNoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRNoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRNoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRNoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRNoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRNoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRNoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRNoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRNoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRNoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRNoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRNoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRNoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRNoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRNoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRNoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRNoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRNoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64
      0,	// GPRPF64:sub_16
      8,	// GPRPF64:sub_32 -> GPRF64
      10,	// GPRPF64:sub_32_hi -> GPRNoX0X2
      0,	// GPRPF64:sub_vrm1_0
      0,	// GPRPF64:sub_vrm1_1
      0,	// GPRPF64:sub_vrm1_2
      0,	// GPRPF64:sub_vrm1_3
      0,	// GPRPF64:sub_vrm1_4
      0,	// GPRPF64:sub_vrm1_5
      0,	// GPRPF64:sub_vrm1_6
      0,	// GPRPF64:sub_vrm1_7
      0,	// GPRPF64:sub_vrm2_0
      0,	// GPRPF64:sub_vrm2_1
      0,	// GPRPF64:sub_vrm2_2
      0,	// GPRPF64:sub_vrm2_3
      0,	// GPRPF64:sub_vrm4_0
      0,	// GPRPF64:sub_vrm4_1
      0,	// GPRPF64:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRNoX0
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_16
      9,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_32 -> GPRNoX0
      10,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_32_hi -> GPRNoX0X2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRNoX0X2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_16
      10,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_32 -> GPRNoX0X2
      10,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_32_hi -> GPRNoX0X2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRNoX0X2:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRJALR
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_16
      11,	// GPRPF64_with_sub_32_in_GPRJALR:sub_32 -> GPRJALR
      11,	// GPRPF64_with_sub_32_in_GPRJALR:sub_32_hi -> GPRJALR
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRJALR:sub_vrm2_2_sub_vrm2_3
    },
    {	// FPR64C
      1,	// FPR64C:sub_16 -> FPR16
      14,	// FPR64C:sub_32 -> FPR32C
      0,	// FPR64C:sub_32_hi
      0,	// FPR64C:sub_vrm1_0
      0,	// FPR64C:sub_vrm1_1
      0,	// FPR64C:sub_vrm1_2
      0,	// FPR64C:sub_vrm1_3
      0,	// FPR64C:sub_vrm1_4
      0,	// FPR64C:sub_vrm1_5
      0,	// FPR64C:sub_vrm1_6
      0,	// FPR64C:sub_vrm1_7
      0,	// FPR64C:sub_vrm2_0
      0,	// FPR64C:sub_vrm2_1
      0,	// FPR64C:sub_vrm2_2
      0,	// FPR64C:sub_vrm2_3
      0,	// FPR64C:sub_vrm4_0
      0,	// FPR64C:sub_vrm4_1
      0,	// FPR64C:sub_vrm1_0_sub_vrm1_1
      0,	// FPR64C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// FPR64C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR64C:sub_vrm1_1_sub_vrm1_2
      0,	// FPR64C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// FPR64C:sub_vrm1_2_sub_vrm1_3
      0,	// FPR64C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR64C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64C:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR64C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64C:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// FPR64C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64C:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64C:sub_vrm1_3_sub_vrm1_4
      0,	// FPR64C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// FPR64C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64C:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64C:sub_vrm1_4_sub_vrm1_5
      0,	// FPR64C:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// FPR64C:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64C:sub_vrm1_5_sub_vrm1_6
      0,	// FPR64C:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// FPR64C:sub_vrm1_6_sub_vrm1_7
      0,	// FPR64C:sub_vrm2_0_sub_vrm2_1
      0,	// FPR64C:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// FPR64C:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR64C:sub_vrm2_1_sub_vrm2_2
      0,	// FPR64C:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// FPR64C:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRTC
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_16
      12,	// GPRPF64_with_sub_32_in_GPRTC:sub_32 -> GPRTC
      12,	// GPRPF64_with_sub_32_in_GPRTC:sub_32_hi -> GPRTC
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRTC:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRC
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_16
      15,	// GPRPF64_with_sub_32_in_GPRC:sub_32 -> GPRC
      15,	// GPRPF64_with_sub_32_in_GPRC:sub_32_hi -> GPRC
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRC:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_16
      16,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_32 -> GPRC_and_GPRTC
      16,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_32_hi -> GPRC_and_GPRTC
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_GPRX0
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_16
      18,	// GPRPF64_with_sub_32_in_GPRX0:sub_32 -> GPRX0
      10,	// GPRPF64_with_sub_32_in_GPRX0:sub_32_hi -> GPRNoX0X2
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_GPRX0:sub_vrm2_2_sub_vrm2_3
    },
    {	// GPRPF64_with_sub_32_in_SP
      0,	// GPRPF64_with_sub_32_in_SP:sub_16
      19,	// GPRPF64_with_sub_32_in_SP:sub_32 -> SP
      10,	// GPRPF64_with_sub_32_in_SP:sub_32_hi -> GPRNoX0X2
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_0
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm4_0
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm4_1
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0_sub_vrm1_1
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_1_sub_vrm1_2
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_2_sub_vrm1_3
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_3_sub_vrm1_4
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_4_sub_vrm1_5
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_5_sub_vrm1_6
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm1_6_sub_vrm1_7
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_0_sub_vrm2_1
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_1_sub_vrm2_2
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// GPRPF64_with_sub_32_in_SP:sub_vrm2_2_sub_vrm2_3
    },
    {	// VMV0
      0,	// VMV0:sub_16
      0,	// VMV0:sub_32
      0,	// VMV0:sub_32_hi
      0,	// VMV0:sub_vrm1_0
      0,	// VMV0:sub_vrm1_1
      0,	// VMV0:sub_vrm1_2
      0,	// VMV0:sub_vrm1_3
      0,	// VMV0:sub_vrm1_4
      0,	// VMV0:sub_vrm1_5
      0,	// VMV0:sub_vrm1_6
      0,	// VMV0:sub_vrm1_7
      0,	// VMV0:sub_vrm2_0
      0,	// VMV0:sub_vrm2_1
      0,	// VMV0:sub_vrm2_2
      0,	// VMV0:sub_vrm2_3
      0,	// VMV0:sub_vrm4_0
      0,	// VMV0:sub_vrm4_1
      0,	// VMV0:sub_vrm1_0_sub_vrm1_1
      0,	// VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VMV0:sub_vrm1_1_sub_vrm1_2
      0,	// VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VMV0:sub_vrm1_2_sub_vrm1_3
      0,	// VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M1
      0,	// VRN2M1:sub_16
      0,	// VRN2M1:sub_32
      0,	// VRN2M1:sub_32_hi
      22,	// VRN2M1:sub_vrm1_0 -> VR
      23,	// VRN2M1:sub_vrm1_1 -> VRNoV0
      0,	// VRN2M1:sub_vrm1_2
      0,	// VRN2M1:sub_vrm1_3
      0,	// VRN2M1:sub_vrm1_4
      0,	// VRN2M1:sub_vrm1_5
      0,	// VRN2M1:sub_vrm1_6
      0,	// VRN2M1:sub_vrm1_7
      0,	// VRN2M1:sub_vrm2_0
      0,	// VRN2M1:sub_vrm2_1
      0,	// VRN2M1:sub_vrm2_2
      0,	// VRN2M1:sub_vrm2_3
      0,	// VRN2M1:sub_vrm4_0
      0,	// VRN2M1:sub_vrm4_1
      0,	// VRN2M1:sub_vrm1_0_sub_vrm1_1
      0,	// VRN2M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRN2M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1:sub_vrm1_1_sub_vrm1_2
      0,	// VRN2M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1:sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1:sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1:sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1:sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1:sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1:sub_vrm2_0_sub_vrm2_1
      0,	// VRN2M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M1:sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M1:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M1:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M1NoV0
      0,	// VRN2M1NoV0:sub_16
      0,	// VRN2M1NoV0:sub_32
      0,	// VRN2M1NoV0:sub_32_hi
      23,	// VRN2M1NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN2M1NoV0:sub_vrm1_1 -> VRNoV0
      0,	// VRN2M1NoV0:sub_vrm1_2
      0,	// VRN2M1NoV0:sub_vrm1_3
      0,	// VRN2M1NoV0:sub_vrm1_4
      0,	// VRN2M1NoV0:sub_vrm1_5
      0,	// VRN2M1NoV0:sub_vrm1_6
      0,	// VRN2M1NoV0:sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm2_0
      0,	// VRN2M1NoV0:sub_vrm2_1
      0,	// VRN2M1NoV0:sub_vrm2_2
      0,	// VRN2M1NoV0:sub_vrm2_3
      0,	// VRN2M1NoV0:sub_vrm4_0
      0,	// VRN2M1NoV0:sub_vrm4_1
      0,	// VRN2M1NoV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRN2M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRN2M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1NoV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRN2M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1NoV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN2M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M1NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M1NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M1NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM2
      0,	// VRM2:sub_16
      0,	// VRM2:sub_32
      0,	// VRM2:sub_32_hi
      22,	// VRM2:sub_vrm1_0 -> VR
      23,	// VRM2:sub_vrm1_1 -> VRNoV0
      0,	// VRM2:sub_vrm1_2
      0,	// VRM2:sub_vrm1_3
      0,	// VRM2:sub_vrm1_4
      0,	// VRM2:sub_vrm1_5
      0,	// VRM2:sub_vrm1_6
      0,	// VRM2:sub_vrm1_7
      0,	// VRM2:sub_vrm2_0
      0,	// VRM2:sub_vrm2_1
      0,	// VRM2:sub_vrm2_2
      0,	// VRM2:sub_vrm2_3
      0,	// VRM2:sub_vrm4_0
      0,	// VRM2:sub_vrm4_1
      0,	// VRM2:sub_vrm1_0_sub_vrm1_1
      0,	// VRM2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM2:sub_vrm1_1_sub_vrm1_2
      0,	// VRM2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM2:sub_vrm1_2_sub_vrm1_3
      0,	// VRM2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2:sub_vrm1_3_sub_vrm1_4
      0,	// VRM2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2:sub_vrm1_4_sub_vrm1_5
      0,	// VRM2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2:sub_vrm1_5_sub_vrm1_6
      0,	// VRM2:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2:sub_vrm1_6_sub_vrm1_7
      0,	// VRM2:sub_vrm2_0_sub_vrm2_1
      0,	// VRM2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM2:sub_vrm2_1_sub_vrm2_2
      0,	// VRM2:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM2:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM2NoV0
      0,	// VRM2NoV0:sub_16
      0,	// VRM2NoV0:sub_32
      0,	// VRM2NoV0:sub_32_hi
      23,	// VRM2NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRM2NoV0:sub_vrm1_1 -> VRNoV0
      0,	// VRM2NoV0:sub_vrm1_2
      0,	// VRM2NoV0:sub_vrm1_3
      0,	// VRM2NoV0:sub_vrm1_4
      0,	// VRM2NoV0:sub_vrm1_5
      0,	// VRM2NoV0:sub_vrm1_6
      0,	// VRM2NoV0:sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm2_0
      0,	// VRM2NoV0:sub_vrm2_1
      0,	// VRM2NoV0:sub_vrm2_2
      0,	// VRM2NoV0:sub_vrm2_3
      0,	// VRM2NoV0:sub_vrm4_0
      0,	// VRM2NoV0:sub_vrm4_1
      0,	// VRM2NoV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRM2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM2NoV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRM2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM2NoV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRM2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRM2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRM2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRM2NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRM2NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRM2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM2NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRM2NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM2NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM2_with_sub_vrm1_0_in_VMV0
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M1
      0,	// VRN3M1:sub_16
      0,	// VRN3M1:sub_32
      0,	// VRN3M1:sub_32_hi
      22,	// VRN3M1:sub_vrm1_0 -> VR
      23,	// VRN3M1:sub_vrm1_1 -> VRNoV0
      23,	// VRN3M1:sub_vrm1_2 -> VRNoV0
      0,	// VRN3M1:sub_vrm1_3
      0,	// VRN3M1:sub_vrm1_4
      0,	// VRN3M1:sub_vrm1_5
      0,	// VRN3M1:sub_vrm1_6
      0,	// VRN3M1:sub_vrm1_7
      0,	// VRN3M1:sub_vrm2_0
      0,	// VRN3M1:sub_vrm2_1
      0,	// VRN3M1:sub_vrm2_2
      0,	// VRN3M1:sub_vrm2_3
      0,	// VRN3M1:sub_vrm4_0
      0,	// VRN3M1:sub_vrm4_1
      35,	// VRN3M1:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      0,	// VRN3M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRN3M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      36,	// VRN3M1:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      0,	// VRN3M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN3M1:sub_vrm1_2_sub_vrm1_3
      0,	// VRN3M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1:sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1:sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1:sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1:sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1:sub_vrm2_0_sub_vrm2_1
      0,	// VRN3M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M1:sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M1:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M1:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M1NoV0
      0,	// VRN3M1NoV0:sub_16
      0,	// VRN3M1NoV0:sub_32
      0,	// VRN3M1NoV0:sub_32_hi
      23,	// VRN3M1NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN3M1NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN3M1NoV0:sub_vrm1_2 -> VRNoV0
      0,	// VRN3M1NoV0:sub_vrm1_3
      0,	// VRN3M1NoV0:sub_vrm1_4
      0,	// VRN3M1NoV0:sub_vrm1_5
      0,	// VRN3M1NoV0:sub_vrm1_6
      0,	// VRN3M1NoV0:sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm2_0
      0,	// VRN3M1NoV0:sub_vrm2_1
      0,	// VRN3M1NoV0:sub_vrm2_2
      0,	// VRN3M1NoV0:sub_vrm2_3
      0,	// VRN3M1NoV0:sub_vrm4_0
      0,	// VRN3M1NoV0:sub_vrm4_1
      36,	// VRN3M1NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      0,	// VRN3M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRN3M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      36,	// VRN3M1NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      0,	// VRN3M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN3M1NoV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRN3M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN3M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M1NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M1NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M1NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      36,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M1
      0,	// VRN4M1:sub_16
      0,	// VRN4M1:sub_32
      0,	// VRN4M1:sub_32_hi
      22,	// VRN4M1:sub_vrm1_0 -> VR
      23,	// VRN4M1:sub_vrm1_1 -> VRNoV0
      23,	// VRN4M1:sub_vrm1_2 -> VRNoV0
      23,	// VRN4M1:sub_vrm1_3 -> VRNoV0
      0,	// VRN4M1:sub_vrm1_4
      0,	// VRN4M1:sub_vrm1_5
      0,	// VRN4M1:sub_vrm1_6
      0,	// VRN4M1:sub_vrm1_7
      0,	// VRN4M1:sub_vrm2_0
      0,	// VRN4M1:sub_vrm2_1
      0,	// VRN4M1:sub_vrm2_2
      0,	// VRN4M1:sub_vrm2_3
      0,	// VRN4M1:sub_vrm4_0
      0,	// VRN4M1:sub_vrm4_1
      35,	// VRN4M1:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN4M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      0,	// VRN4M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      36,	// VRN4M1:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN4M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN4M1:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN4M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1:sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1:sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1:sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1:sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1:sub_vrm2_0_sub_vrm2_1
      0,	// VRN4M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN4M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN4M1:sub_vrm2_1_sub_vrm2_2
      0,	// VRN4M1:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN4M1:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M1NoV0
      0,	// VRN4M1NoV0:sub_16
      0,	// VRN4M1NoV0:sub_32
      0,	// VRN4M1NoV0:sub_32_hi
      23,	// VRN4M1NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN4M1NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN4M1NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN4M1NoV0:sub_vrm1_3 -> VRNoV0
      0,	// VRN4M1NoV0:sub_vrm1_4
      0,	// VRN4M1NoV0:sub_vrm1_5
      0,	// VRN4M1NoV0:sub_vrm1_6
      0,	// VRN4M1NoV0:sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm2_0
      0,	// VRN4M1NoV0:sub_vrm2_1
      0,	// VRN4M1NoV0:sub_vrm2_2
      0,	// VRN4M1NoV0:sub_vrm2_3
      0,	// VRN4M1NoV0:sub_vrm4_0
      0,	// VRN4M1NoV0:sub_vrm4_1
      36,	// VRN4M1NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN4M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      0,	// VRN4M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      36,	// VRN4M1NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN4M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN4M1NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN4M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN4M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN4M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN4M1NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN4M1NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN4M1NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M2
      0,	// VRN2M2:sub_16
      0,	// VRN2M2:sub_32
      0,	// VRN2M2:sub_32_hi
      22,	// VRN2M2:sub_vrm1_0 -> VR
      23,	// VRN2M2:sub_vrm1_1 -> VRNoV0
      23,	// VRN2M2:sub_vrm1_2 -> VRNoV0
      23,	// VRN2M2:sub_vrm1_3 -> VRNoV0
      0,	// VRN2M2:sub_vrm1_4
      0,	// VRN2M2:sub_vrm1_5
      0,	// VRN2M2:sub_vrm1_6
      0,	// VRN2M2:sub_vrm1_7
      37,	// VRN2M2:sub_vrm2_0 -> VRM2
      38,	// VRN2M2:sub_vrm2_1 -> VRM2NoV0
      0,	// VRN2M2:sub_vrm2_2
      0,	// VRN2M2:sub_vrm2_3
      0,	// VRN2M2:sub_vrm4_0
      0,	// VRN2M2:sub_vrm4_1
      35,	// VRN2M2:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN2M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN2M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN2M2:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN2M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN2M2:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN2M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2:sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2:sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2:sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2:sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2:sub_vrm2_0_sub_vrm2_1
      0,	// VRN2M2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M2:sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M2:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M2:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M2NoV0
      0,	// VRN2M2NoV0:sub_16
      0,	// VRN2M2NoV0:sub_32
      0,	// VRN2M2NoV0:sub_32_hi
      23,	// VRN2M2NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN2M2NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN2M2NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN2M2NoV0:sub_vrm1_3 -> VRNoV0
      0,	// VRN2M2NoV0:sub_vrm1_4
      0,	// VRN2M2NoV0:sub_vrm1_5
      0,	// VRN2M2NoV0:sub_vrm1_6
      0,	// VRN2M2NoV0:sub_vrm1_7
      38,	// VRN2M2NoV0:sub_vrm2_0 -> VRM2NoV0
      38,	// VRN2M2NoV0:sub_vrm2_1 -> VRM2NoV0
      0,	// VRN2M2NoV0:sub_vrm2_2
      0,	// VRN2M2NoV0:sub_vrm2_3
      0,	// VRN2M2NoV0:sub_vrm4_0
      0,	// VRN2M2NoV0:sub_vrm4_1
      36,	// VRN2M2NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN2M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN2M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN2M2NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN2M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN2M2NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN2M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2NoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN2M2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M2NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M2NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M2NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM4
      0,	// VRM4:sub_16
      0,	// VRM4:sub_32
      0,	// VRM4:sub_32_hi
      22,	// VRM4:sub_vrm1_0 -> VR
      23,	// VRM4:sub_vrm1_1 -> VRNoV0
      23,	// VRM4:sub_vrm1_2 -> VRNoV0
      23,	// VRM4:sub_vrm1_3 -> VRNoV0
      0,	// VRM4:sub_vrm1_4
      0,	// VRM4:sub_vrm1_5
      0,	// VRM4:sub_vrm1_6
      0,	// VRM4:sub_vrm1_7
      37,	// VRM4:sub_vrm2_0 -> VRM2
      38,	// VRM4:sub_vrm2_1 -> VRM2NoV0
      0,	// VRM4:sub_vrm2_2
      0,	// VRM4:sub_vrm2_3
      0,	// VRM4:sub_vrm4_0
      0,	// VRM4:sub_vrm4_1
      0,	// VRM4:sub_vrm1_0_sub_vrm1_1
      0,	// VRM4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM4:sub_vrm1_1_sub_vrm1_2
      0,	// VRM4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM4:sub_vrm1_2_sub_vrm1_3
      0,	// VRM4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4:sub_vrm1_3_sub_vrm1_4
      0,	// VRM4:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4:sub_vrm1_4_sub_vrm1_5
      0,	// VRM4:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4:sub_vrm1_5_sub_vrm1_6
      0,	// VRM4:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4:sub_vrm1_6_sub_vrm1_7
      0,	// VRM4:sub_vrm2_0_sub_vrm2_1
      0,	// VRM4:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM4:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM4:sub_vrm2_1_sub_vrm2_2
      0,	// VRM4:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM4:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM4NoV0
      0,	// VRM4NoV0:sub_16
      0,	// VRM4NoV0:sub_32
      0,	// VRM4NoV0:sub_32_hi
      23,	// VRM4NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRM4NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRM4NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRM4NoV0:sub_vrm1_3 -> VRNoV0
      0,	// VRM4NoV0:sub_vrm1_4
      0,	// VRM4NoV0:sub_vrm1_5
      0,	// VRM4NoV0:sub_vrm1_6
      0,	// VRM4NoV0:sub_vrm1_7
      38,	// VRM4NoV0:sub_vrm2_0 -> VRM2NoV0
      38,	// VRM4NoV0:sub_vrm2_1 -> VRM2NoV0
      0,	// VRM4NoV0:sub_vrm2_2
      0,	// VRM4NoV0:sub_vrm2_3
      0,	// VRM4NoV0:sub_vrm4_0
      0,	// VRM4NoV0:sub_vrm4_1
      0,	// VRM4NoV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRM4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM4NoV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRM4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM4NoV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRM4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4NoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRM4NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRM4NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRM4NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRM4NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRM4NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM4NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM4NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRM4NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM4NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM4_with_sub_vrm1_0_in_VMV0
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_5
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      39,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0 -> VRM2_with_sub_vrm1_0_in_VMV0
      38,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_1 -> VRM2NoV0
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM4_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M2_with_sub_vrm1_0_in_VMV0
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      39,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0 -> VRM2_with_sub_vrm1_0_in_VMV0
      38,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1 -> VRM2NoV0
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN2M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      36,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN4M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN5M1
      0,	// VRN5M1:sub_16
      0,	// VRN5M1:sub_32
      0,	// VRN5M1:sub_32_hi
      22,	// VRN5M1:sub_vrm1_0 -> VR
      23,	// VRN5M1:sub_vrm1_1 -> VRNoV0
      23,	// VRN5M1:sub_vrm1_2 -> VRNoV0
      23,	// VRN5M1:sub_vrm1_3 -> VRNoV0
      23,	// VRN5M1:sub_vrm1_4 -> VRNoV0
      0,	// VRN5M1:sub_vrm1_5
      0,	// VRN5M1:sub_vrm1_6
      0,	// VRN5M1:sub_vrm1_7
      0,	// VRN5M1:sub_vrm2_0
      0,	// VRN5M1:sub_vrm2_1
      0,	// VRN5M1:sub_vrm2_2
      0,	// VRN5M1:sub_vrm2_3
      0,	// VRN5M1:sub_vrm4_0
      0,	// VRN5M1:sub_vrm4_1
      35,	// VRN5M1:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN5M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN5M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN5M1:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN5M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN5M1:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN5M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN5M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN5M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      0,	// VRN5M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN5M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      0,	// VRN5M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN5M1:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      0,	// VRN5M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1:sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1:sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1:sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1:sub_vrm2_0_sub_vrm2_1
      0,	// VRN5M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN5M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN5M1:sub_vrm2_1_sub_vrm2_2
      0,	// VRN5M1:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN5M1:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN5M1NoV0
      0,	// VRN5M1NoV0:sub_16
      0,	// VRN5M1NoV0:sub_32
      0,	// VRN5M1NoV0:sub_32_hi
      23,	// VRN5M1NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN5M1NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN5M1NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN5M1NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN5M1NoV0:sub_vrm1_4 -> VRNoV0
      0,	// VRN5M1NoV0:sub_vrm1_5
      0,	// VRN5M1NoV0:sub_vrm1_6
      0,	// VRN5M1NoV0:sub_vrm1_7
      0,	// VRN5M1NoV0:sub_vrm2_0
      0,	// VRN5M1NoV0:sub_vrm2_1
      0,	// VRN5M1NoV0:sub_vrm2_2
      0,	// VRN5M1NoV0:sub_vrm2_3
      0,	// VRN5M1NoV0:sub_vrm4_0
      0,	// VRN5M1NoV0:sub_vrm4_1
      36,	// VRN5M1NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN5M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN5M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN5M1NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN5M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN5M1NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN5M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN5M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN5M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      0,	// VRN5M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN5M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      0,	// VRN5M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN5M1NoV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      0,	// VRN5M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN5M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN5M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN5M1NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN5M1NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN5M1NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN5M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN6M1
      0,	// VRN6M1:sub_16
      0,	// VRN6M1:sub_32
      0,	// VRN6M1:sub_32_hi
      22,	// VRN6M1:sub_vrm1_0 -> VR
      23,	// VRN6M1:sub_vrm1_1 -> VRNoV0
      23,	// VRN6M1:sub_vrm1_2 -> VRNoV0
      23,	// VRN6M1:sub_vrm1_3 -> VRNoV0
      23,	// VRN6M1:sub_vrm1_4 -> VRNoV0
      23,	// VRN6M1:sub_vrm1_5 -> VRNoV0
      0,	// VRN6M1:sub_vrm1_6
      0,	// VRN6M1:sub_vrm1_7
      0,	// VRN6M1:sub_vrm2_0
      0,	// VRN6M1:sub_vrm2_1
      0,	// VRN6M1:sub_vrm2_2
      0,	// VRN6M1:sub_vrm2_3
      0,	// VRN6M1:sub_vrm4_0
      0,	// VRN6M1:sub_vrm4_1
      35,	// VRN6M1:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN6M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN6M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN6M1:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN6M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN6M1:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      53,	// VRN6M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      0,	// VRN6M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN6M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN6M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN6M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      0,	// VRN6M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN6M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN6M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      0,	// VRN6M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN6M1:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN6M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      0,	// VRN6M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN6M1:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      0,	// VRN6M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1:sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1:sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1:sub_vrm2_0_sub_vrm2_1
      0,	// VRN6M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN6M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN6M1:sub_vrm2_1_sub_vrm2_2
      0,	// VRN6M1:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN6M1:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN6M1NoV0
      0,	// VRN6M1NoV0:sub_16
      0,	// VRN6M1NoV0:sub_32
      0,	// VRN6M1NoV0:sub_32_hi
      23,	// VRN6M1NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN6M1NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN6M1NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN6M1NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN6M1NoV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN6M1NoV0:sub_vrm1_5 -> VRNoV0
      0,	// VRN6M1NoV0:sub_vrm1_6
      0,	// VRN6M1NoV0:sub_vrm1_7
      0,	// VRN6M1NoV0:sub_vrm2_0
      0,	// VRN6M1NoV0:sub_vrm2_1
      0,	// VRN6M1NoV0:sub_vrm2_2
      0,	// VRN6M1NoV0:sub_vrm2_3
      0,	// VRN6M1NoV0:sub_vrm4_0
      0,	// VRN6M1NoV0:sub_vrm4_1
      36,	// VRN6M1NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN6M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN6M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN6M1NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN6M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN6M1NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      54,	// VRN6M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      0,	// VRN6M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN6M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN6M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN6M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      0,	// VRN6M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN6M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN6M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      0,	// VRN6M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN6M1NoV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN6M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      0,	// VRN6M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN6M1NoV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      0,	// VRN6M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN6M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN6M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN6M1NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN6M1NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN6M1NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M2
      0,	// VRN3M2:sub_16
      0,	// VRN3M2:sub_32
      0,	// VRN3M2:sub_32_hi
      22,	// VRN3M2:sub_vrm1_0 -> VR
      23,	// VRN3M2:sub_vrm1_1 -> VRNoV0
      23,	// VRN3M2:sub_vrm1_2 -> VRNoV0
      23,	// VRN3M2:sub_vrm1_3 -> VRNoV0
      23,	// VRN3M2:sub_vrm1_4 -> VRNoV0
      23,	// VRN3M2:sub_vrm1_5 -> VRNoV0
      0,	// VRN3M2:sub_vrm1_6
      0,	// VRN3M2:sub_vrm1_7
      37,	// VRN3M2:sub_vrm2_0 -> VRM2
      38,	// VRN3M2:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN3M2:sub_vrm2_2 -> VRM2NoV0
      0,	// VRN3M2:sub_vrm2_3
      0,	// VRN3M2:sub_vrm4_0
      0,	// VRN3M2:sub_vrm4_1
      35,	// VRN3M2:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN3M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN3M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN3M2:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN3M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN3M2:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      53,	// VRN3M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      56,	// VRN3M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      0,	// VRN3M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN3M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN3M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      0,	// VRN3M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN3M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN3M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      0,	// VRN3M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN3M2:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN3M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      0,	// VRN3M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN3M2:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      0,	// VRN3M2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M2:sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M2:sub_vrm1_6_sub_vrm1_7
      46,	// VRN3M2:sub_vrm2_0_sub_vrm2_1 -> VRN2M2
      0,	// VRN3M2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      47,	// VRN3M2:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      0,	// VRN3M2:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M2:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M2NoV0
      0,	// VRN3M2NoV0:sub_16
      0,	// VRN3M2NoV0:sub_32
      0,	// VRN3M2NoV0:sub_32_hi
      23,	// VRN3M2NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN3M2NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN3M2NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN3M2NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN3M2NoV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN3M2NoV0:sub_vrm1_5 -> VRNoV0
      0,	// VRN3M2NoV0:sub_vrm1_6
      0,	// VRN3M2NoV0:sub_vrm1_7
      38,	// VRN3M2NoV0:sub_vrm2_0 -> VRM2NoV0
      38,	// VRN3M2NoV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN3M2NoV0:sub_vrm2_2 -> VRM2NoV0
      0,	// VRN3M2NoV0:sub_vrm2_3
      0,	// VRN3M2NoV0:sub_vrm4_0
      0,	// VRN3M2NoV0:sub_vrm4_1
      36,	// VRN3M2NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN3M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN3M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN3M2NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN3M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN3M2NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      54,	// VRN3M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      57,	// VRN3M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      0,	// VRN3M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN3M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN3M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      0,	// VRN3M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN3M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN3M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      0,	// VRN3M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN3M2NoV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN3M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      0,	// VRN3M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN3M2NoV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      0,	// VRN3M2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M2NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M2NoV0:sub_vrm1_6_sub_vrm1_7
      47,	// VRN3M2NoV0:sub_vrm2_0_sub_vrm2_1 -> VRN2M2NoV0
      0,	// VRN3M2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      47,	// VRN3M2NoV0:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      0,	// VRN3M2NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M2NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5 -> VRNoV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      39,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0 -> VRM2_with_sub_vrm1_0_in_VMV0
      38,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2 -> VRM2NoV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      55,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      61,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      51,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      47,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN3M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5 -> VRNoV0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      55,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN6M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN7M1
      0,	// VRN7M1:sub_16
      0,	// VRN7M1:sub_32
      0,	// VRN7M1:sub_32_hi
      22,	// VRN7M1:sub_vrm1_0 -> VR
      23,	// VRN7M1:sub_vrm1_1 -> VRNoV0
      23,	// VRN7M1:sub_vrm1_2 -> VRNoV0
      23,	// VRN7M1:sub_vrm1_3 -> VRNoV0
      23,	// VRN7M1:sub_vrm1_4 -> VRNoV0
      23,	// VRN7M1:sub_vrm1_5 -> VRNoV0
      23,	// VRN7M1:sub_vrm1_6 -> VRNoV0
      0,	// VRN7M1:sub_vrm1_7
      0,	// VRN7M1:sub_vrm2_0
      0,	// VRN7M1:sub_vrm2_1
      0,	// VRN7M1:sub_vrm2_2
      0,	// VRN7M1:sub_vrm2_3
      0,	// VRN7M1:sub_vrm4_0
      0,	// VRN7M1:sub_vrm4_1
      35,	// VRN7M1:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN7M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN7M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN7M1:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN7M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN7M1:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      53,	// VRN7M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      56,	// VRN7M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      0,	// VRN7M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN7M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN7M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN7M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN7M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      0,	// VRN7M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN7M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN7M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN7M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      0,	// VRN7M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN7M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN7M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      0,	// VRN7M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN7M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      0,	// VRN7M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      0,	// VRN7M1:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN7M1:sub_vrm1_6_sub_vrm1_7
      0,	// VRN7M1:sub_vrm2_0_sub_vrm2_1
      0,	// VRN7M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN7M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN7M1:sub_vrm2_1_sub_vrm2_2
      0,	// VRN7M1:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN7M1:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN7M1NoV0
      0,	// VRN7M1NoV0:sub_16
      0,	// VRN7M1NoV0:sub_32
      0,	// VRN7M1NoV0:sub_32_hi
      23,	// VRN7M1NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN7M1NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN7M1NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN7M1NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN7M1NoV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN7M1NoV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN7M1NoV0:sub_vrm1_6 -> VRNoV0
      0,	// VRN7M1NoV0:sub_vrm1_7
      0,	// VRN7M1NoV0:sub_vrm2_0
      0,	// VRN7M1NoV0:sub_vrm2_1
      0,	// VRN7M1NoV0:sub_vrm2_2
      0,	// VRN7M1NoV0:sub_vrm2_3
      0,	// VRN7M1NoV0:sub_vrm4_0
      0,	// VRN7M1NoV0:sub_vrm4_1
      36,	// VRN7M1NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN7M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN7M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN7M1NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN7M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN7M1NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      54,	// VRN7M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      57,	// VRN7M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      0,	// VRN7M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN7M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN7M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN7M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN7M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      0,	// VRN7M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN7M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN7M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN7M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      0,	// VRN7M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1NoV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN7M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN7M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      0,	// VRN7M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1NoV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN7M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      0,	// VRN7M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1NoV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      0,	// VRN7M1NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN7M1NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN7M1NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN7M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN7M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN7M1NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN7M1NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN7M1NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6 -> VRNoV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_7
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      55,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      61,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      42,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      36,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN7M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN8M1
      0,	// VRN8M1:sub_16
      0,	// VRN8M1:sub_32
      0,	// VRN8M1:sub_32_hi
      22,	// VRN8M1:sub_vrm1_0 -> VR
      23,	// VRN8M1:sub_vrm1_1 -> VRNoV0
      23,	// VRN8M1:sub_vrm1_2 -> VRNoV0
      23,	// VRN8M1:sub_vrm1_3 -> VRNoV0
      23,	// VRN8M1:sub_vrm1_4 -> VRNoV0
      23,	// VRN8M1:sub_vrm1_5 -> VRNoV0
      23,	// VRN8M1:sub_vrm1_6 -> VRNoV0
      23,	// VRN8M1:sub_vrm1_7 -> VRNoV0
      0,	// VRN8M1:sub_vrm2_0
      0,	// VRN8M1:sub_vrm2_1
      0,	// VRN8M1:sub_vrm2_2
      0,	// VRN8M1:sub_vrm2_3
      0,	// VRN8M1:sub_vrm4_0
      0,	// VRN8M1:sub_vrm4_1
      35,	// VRN8M1:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN8M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN8M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN8M1:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN8M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN8M1:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      53,	// VRN8M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      56,	// VRN8M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      62,	// VRN8M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      0,	// VRN8M1:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN8M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN8M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN8M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN8M1:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN8M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN8M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN8M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN8M1:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN8M1:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN8M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN8M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN8M1:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN8M1:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN8M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN8M1:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN8M1:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN8M1:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN8M1:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      0,	// VRN8M1:sub_vrm2_0_sub_vrm2_1
      0,	// VRN8M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN8M1:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN8M1:sub_vrm2_1_sub_vrm2_2
      0,	// VRN8M1:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN8M1:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN8M1NoV0
      0,	// VRN8M1NoV0:sub_16
      0,	// VRN8M1NoV0:sub_32
      0,	// VRN8M1NoV0:sub_32_hi
      23,	// VRN8M1NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN8M1NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN8M1NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN8M1NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN8M1NoV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN8M1NoV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN8M1NoV0:sub_vrm1_6 -> VRNoV0
      23,	// VRN8M1NoV0:sub_vrm1_7 -> VRNoV0
      0,	// VRN8M1NoV0:sub_vrm2_0
      0,	// VRN8M1NoV0:sub_vrm2_1
      0,	// VRN8M1NoV0:sub_vrm2_2
      0,	// VRN8M1NoV0:sub_vrm2_3
      0,	// VRN8M1NoV0:sub_vrm4_0
      0,	// VRN8M1NoV0:sub_vrm4_1
      36,	// VRN8M1NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN8M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN8M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN8M1NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN8M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN8M1NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      54,	// VRN8M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      57,	// VRN8M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      63,	// VRN8M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      0,	// VRN8M1NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN8M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN8M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN8M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN8M1NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN8M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN8M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN8M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN8M1NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN8M1NoV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN8M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN8M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN8M1NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN8M1NoV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN8M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN8M1NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN8M1NoV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN8M1NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN8M1NoV0:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      0,	// VRN8M1NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN8M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN8M1NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN8M1NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN8M1NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN8M1NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN4M2
      0,	// VRN4M2:sub_16
      0,	// VRN4M2:sub_32
      0,	// VRN4M2:sub_32_hi
      22,	// VRN4M2:sub_vrm1_0 -> VR
      23,	// VRN4M2:sub_vrm1_1 -> VRNoV0
      23,	// VRN4M2:sub_vrm1_2 -> VRNoV0
      23,	// VRN4M2:sub_vrm1_3 -> VRNoV0
      23,	// VRN4M2:sub_vrm1_4 -> VRNoV0
      23,	// VRN4M2:sub_vrm1_5 -> VRNoV0
      23,	// VRN4M2:sub_vrm1_6 -> VRNoV0
      23,	// VRN4M2:sub_vrm1_7 -> VRNoV0
      37,	// VRN4M2:sub_vrm2_0 -> VRM2
      38,	// VRN4M2:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN4M2:sub_vrm2_2 -> VRM2NoV0
      38,	// VRN4M2:sub_vrm2_3 -> VRM2NoV0
      0,	// VRN4M2:sub_vrm4_0
      0,	// VRN4M2:sub_vrm4_1
      35,	// VRN4M2:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN4M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN4M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN4M2:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN4M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN4M2:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      53,	// VRN4M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      56,	// VRN4M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      62,	// VRN4M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      65,	// VRN4M2:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      45,	// VRN4M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN4M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN4M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN4M2:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN4M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN4M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN4M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN4M2:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN4M2:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN4M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN4M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN4M2:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN4M2:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN4M2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN4M2:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN4M2:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN4M2:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN4M2:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      46,	// VRN4M2:sub_vrm2_0_sub_vrm2_1 -> VRN2M2
      58,	// VRN4M2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN3M2
      0,	// VRN4M2:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      47,	// VRN4M2:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      59,	// VRN4M2:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN3M2NoV0
      47,	// VRN4M2:sub_vrm2_2_sub_vrm2_3 -> VRN2M2NoV0
    },
    {	// VRN4M2NoV0
      0,	// VRN4M2NoV0:sub_16
      0,	// VRN4M2NoV0:sub_32
      0,	// VRN4M2NoV0:sub_32_hi
      23,	// VRN4M2NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN4M2NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN4M2NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN4M2NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN4M2NoV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN4M2NoV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN4M2NoV0:sub_vrm1_6 -> VRNoV0
      23,	// VRN4M2NoV0:sub_vrm1_7 -> VRNoV0
      38,	// VRN4M2NoV0:sub_vrm2_0 -> VRM2NoV0
      38,	// VRN4M2NoV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN4M2NoV0:sub_vrm2_2 -> VRM2NoV0
      38,	// VRN4M2NoV0:sub_vrm2_3 -> VRM2NoV0
      0,	// VRN4M2NoV0:sub_vrm4_0
      0,	// VRN4M2NoV0:sub_vrm4_1
      36,	// VRN4M2NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN4M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN4M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN4M2NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN4M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN4M2NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      54,	// VRN4M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      57,	// VRN4M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      63,	// VRN4M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      66,	// VRN4M2NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      45,	// VRN4M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN4M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN4M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN4M2NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN4M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN4M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN4M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN4M2NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN4M2NoV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN4M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN4M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN4M2NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN4M2NoV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN4M2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN4M2NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN4M2NoV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN4M2NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN4M2NoV0:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      47,	// VRN4M2NoV0:sub_vrm2_0_sub_vrm2_1 -> VRN2M2NoV0
      59,	// VRN4M2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN3M2NoV0
      0,	// VRN4M2NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      47,	// VRN4M2NoV0:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      59,	// VRN4M2NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN3M2NoV0
      47,	// VRN4M2NoV0:sub_vrm2_2_sub_vrm2_3 -> VRN2M2NoV0
    },
    {	// VRN2M4
      0,	// VRN2M4:sub_16
      0,	// VRN2M4:sub_32
      0,	// VRN2M4:sub_32_hi
      22,	// VRN2M4:sub_vrm1_0 -> VR
      23,	// VRN2M4:sub_vrm1_1 -> VRNoV0
      23,	// VRN2M4:sub_vrm1_2 -> VRNoV0
      23,	// VRN2M4:sub_vrm1_3 -> VRNoV0
      23,	// VRN2M4:sub_vrm1_4 -> VRNoV0
      23,	// VRN2M4:sub_vrm1_5 -> VRNoV0
      23,	// VRN2M4:sub_vrm1_6 -> VRNoV0
      23,	// VRN2M4:sub_vrm1_7 -> VRNoV0
      37,	// VRN2M4:sub_vrm2_0 -> VRM2
      38,	// VRN2M4:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN2M4:sub_vrm2_2 -> VRM2NoV0
      38,	// VRN2M4:sub_vrm2_3 -> VRM2NoV0
      48,	// VRN2M4:sub_vrm4_0 -> VRM4
      49,	// VRN2M4:sub_vrm4_1 -> VRM4NoV0
      35,	// VRN2M4:sub_vrm1_0_sub_vrm1_1 -> VRN2M1
      41,	// VRN2M4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1
      44,	// VRN2M4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1
      36,	// VRN2M4:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN2M4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN2M4:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      53,	// VRN2M4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1
      56,	// VRN2M4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1
      62,	// VRN2M4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1
      65,	// VRN2M4:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1
      45,	// VRN2M4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN2M4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN2M4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN2M4:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN2M4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN2M4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN2M4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN2M4:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN2M4:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN2M4:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN2M4:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN2M4:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN2M4:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN2M4:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN2M4:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN2M4:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN2M4:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN2M4:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      46,	// VRN2M4:sub_vrm2_0_sub_vrm2_1 -> VRN2M2
      58,	// VRN2M4:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN3M2
      67,	// VRN2M4:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN4M2
      47,	// VRN2M4:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      59,	// VRN2M4:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN3M2NoV0
      47,	// VRN2M4:sub_vrm2_2_sub_vrm2_3 -> VRN2M2NoV0
    },
    {	// VRN2M4NoV0
      0,	// VRN2M4NoV0:sub_16
      0,	// VRN2M4NoV0:sub_32
      0,	// VRN2M4NoV0:sub_32_hi
      23,	// VRN2M4NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRN2M4NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN2M4NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN2M4NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN2M4NoV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN2M4NoV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN2M4NoV0:sub_vrm1_6 -> VRNoV0
      23,	// VRN2M4NoV0:sub_vrm1_7 -> VRNoV0
      38,	// VRN2M4NoV0:sub_vrm2_0 -> VRM2NoV0
      38,	// VRN2M4NoV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN2M4NoV0:sub_vrm2_2 -> VRM2NoV0
      38,	// VRN2M4NoV0:sub_vrm2_3 -> VRM2NoV0
      49,	// VRN2M4NoV0:sub_vrm4_0 -> VRM4NoV0
      49,	// VRN2M4NoV0:sub_vrm4_1 -> VRM4NoV0
      36,	// VRN2M4NoV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1NoV0
      42,	// VRN2M4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1NoV0
      45,	// VRN2M4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1NoV0
      36,	// VRN2M4NoV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN2M4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN2M4NoV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      54,	// VRN2M4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1NoV0
      57,	// VRN2M4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1NoV0
      63,	// VRN2M4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1NoV0
      66,	// VRN2M4NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1NoV0
      45,	// VRN2M4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN2M4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN2M4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN2M4NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN2M4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN2M4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN2M4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN2M4NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN2M4NoV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN2M4NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN2M4NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN2M4NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN2M4NoV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN2M4NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN2M4NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN2M4NoV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN2M4NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN2M4NoV0:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      47,	// VRN2M4NoV0:sub_vrm2_0_sub_vrm2_1 -> VRN2M2NoV0
      59,	// VRN2M4NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN3M2NoV0
      68,	// VRN2M4NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN4M2NoV0
      47,	// VRN2M4NoV0:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      59,	// VRN2M4NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN3M2NoV0
      47,	// VRN2M4NoV0:sub_vrm2_2_sub_vrm2_3 -> VRN2M2NoV0
    },
    {	// VRM8
      0,	// VRM8:sub_16
      0,	// VRM8:sub_32
      0,	// VRM8:sub_32_hi
      22,	// VRM8:sub_vrm1_0 -> VR
      23,	// VRM8:sub_vrm1_1 -> VRNoV0
      23,	// VRM8:sub_vrm1_2 -> VRNoV0
      23,	// VRM8:sub_vrm1_3 -> VRNoV0
      23,	// VRM8:sub_vrm1_4 -> VRNoV0
      23,	// VRM8:sub_vrm1_5 -> VRNoV0
      23,	// VRM8:sub_vrm1_6 -> VRNoV0
      23,	// VRM8:sub_vrm1_7 -> VRNoV0
      37,	// VRM8:sub_vrm2_0 -> VRM2
      38,	// VRM8:sub_vrm2_1 -> VRM2NoV0
      38,	// VRM8:sub_vrm2_2 -> VRM2NoV0
      38,	// VRM8:sub_vrm2_3 -> VRM2NoV0
      48,	// VRM8:sub_vrm4_0 -> VRM4
      49,	// VRM8:sub_vrm4_1 -> VRM4NoV0
      0,	// VRM8:sub_vrm1_0_sub_vrm1_1
      0,	// VRM8:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM8:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM8:sub_vrm1_1_sub_vrm1_2
      0,	// VRM8:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM8:sub_vrm1_2_sub_vrm1_3
      0,	// VRM8:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8:sub_vrm1_3_sub_vrm1_4
      0,	// VRM8:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8:sub_vrm1_4_sub_vrm1_5
      0,	// VRM8:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8:sub_vrm1_5_sub_vrm1_6
      0,	// VRM8:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8:sub_vrm1_6_sub_vrm1_7
      0,	// VRM8:sub_vrm2_0_sub_vrm2_1
      0,	// VRM8:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM8:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM8:sub_vrm2_1_sub_vrm2_2
      0,	// VRM8:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM8:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM8NoV0
      0,	// VRM8NoV0:sub_16
      0,	// VRM8NoV0:sub_32
      0,	// VRM8NoV0:sub_32_hi
      23,	// VRM8NoV0:sub_vrm1_0 -> VRNoV0
      23,	// VRM8NoV0:sub_vrm1_1 -> VRNoV0
      23,	// VRM8NoV0:sub_vrm1_2 -> VRNoV0
      23,	// VRM8NoV0:sub_vrm1_3 -> VRNoV0
      23,	// VRM8NoV0:sub_vrm1_4 -> VRNoV0
      23,	// VRM8NoV0:sub_vrm1_5 -> VRNoV0
      23,	// VRM8NoV0:sub_vrm1_6 -> VRNoV0
      23,	// VRM8NoV0:sub_vrm1_7 -> VRNoV0
      38,	// VRM8NoV0:sub_vrm2_0 -> VRM2NoV0
      38,	// VRM8NoV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRM8NoV0:sub_vrm2_2 -> VRM2NoV0
      38,	// VRM8NoV0:sub_vrm2_3 -> VRM2NoV0
      49,	// VRM8NoV0:sub_vrm4_0 -> VRM4NoV0
      49,	// VRM8NoV0:sub_vrm4_1 -> VRM4NoV0
      0,	// VRM8NoV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRM8NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM8NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM8NoV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRM8NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM8NoV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRM8NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8NoV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8NoV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8NoV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8NoV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRM8NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8NoV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8NoV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRM8NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8NoV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8NoV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRM8NoV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8NoV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRM8NoV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRM8NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM8NoV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM8NoV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRM8NoV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM8NoV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRM8_with_sub_vrm1_0_in_VMV0
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      23,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_5 -> VRNoV0
      23,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_6 -> VRNoV0
      23,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_7 -> VRNoV0
      39,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_0 -> VRM2_with_sub_vrm1_0_in_VMV0
      38,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_2 -> VRM2NoV0
      38,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_3 -> VRM2NoV0
      50,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm4_0 -> VRM4_with_sub_vrm1_0_in_VMV0
      49,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm4_1 -> VRM4NoV0
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRM8_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
    {	// VRN2M4_with_sub_vrm1_0_in_VMV0
      0,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_6 -> VRNoV0
      23,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_7 -> VRNoV0
      39,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0 -> VRM2_with_sub_vrm1_0_in_VMV0
      38,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_2 -> VRM2NoV0
      38,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_3 -> VRM2NoV0
      50,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm4_0 -> VRM4_with_sub_vrm1_0_in_VMV0
      49,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm4_1 -> VRM4NoV0
      40,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      55,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      61,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      64,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      76,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      45,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      51,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      60,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      75,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN4M2_with_sub_vrm1_0_in_VMV0
      47,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      59,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN3M2NoV0
      47,	// VRN2M4_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3 -> VRN2M2NoV0
    },
    {	// VRN4M2_with_sub_vrm1_0_in_VMV0
      0,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6 -> VRNoV0
      23,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_7 -> VRNoV0
      39,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0 -> VRM2_with_sub_vrm1_0_in_VMV0
      38,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1 -> VRM2NoV0
      38,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2 -> VRM2NoV0
      38,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_3 -> VRM2NoV0
      0,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      55,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      61,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      64,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      76,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN8M1_with_sub_vrm1_0_in_VMV0
      45,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      51,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1 -> VRN2M2_with_sub_vrm1_0_in_VMV0
      60,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2 -> VRN3M2_with_sub_vrm1_0_in_VMV0
      0,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      47,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2 -> VRN2M2NoV0
      59,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3 -> VRN3M2NoV0
      47,	// VRN4M2_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3 -> VRN2M2NoV0
    },
    {	// VRN8M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_16
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_32
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_32_hi
      34,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0 -> VMV0
      23,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1 -> VRNoV0
      23,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2 -> VRNoV0
      23,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3 -> VRNoV0
      23,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4 -> VRNoV0
      23,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5 -> VRNoV0
      23,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6 -> VRNoV0
      23,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_7 -> VRNoV0
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_3
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_0
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm4_1
      40,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1 -> VRN2M1_with_sub_vrm1_0_in_VMV0
      43,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2 -> VRN3M1_with_sub_vrm1_0_in_VMV0
      52,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN4M1_with_sub_vrm1_0_in_VMV0
      36,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2 -> VRN2M1NoV0
      42,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3 -> VRN3M1NoV0
      36,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3 -> VRN2M1NoV0
      55,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN5M1_with_sub_vrm1_0_in_VMV0
      61,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN6M1_with_sub_vrm1_0_in_VMV0
      64,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN7M1_with_sub_vrm1_0_in_VMV0
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_0_sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7
      45,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN4M1NoV0
      54,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN5M1NoV0
      57,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN6M1NoV0
      63,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_1_sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN7M1NoV0
      42,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4 -> VRN3M1NoV0
      45,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN4M1NoV0
      54,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN5M1NoV0
      57,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_2_sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN6M1NoV0
      36,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4 -> VRN2M1NoV0
      42,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5 -> VRN3M1NoV0
      45,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN4M1NoV0
      54,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_3_sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN5M1NoV0
      36,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5 -> VRN2M1NoV0
      42,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6 -> VRN3M1NoV0
      45,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_4_sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN4M1NoV0
      36,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6 -> VRN2M1NoV0
      42,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_5_sub_vrm1_6_sub_vrm1_7 -> VRN3M1NoV0
      36,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm1_6_sub_vrm1_7 -> VRN2M1NoV0
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_0_sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_1_sub_vrm2_2_sub_vrm2_3
      0,	// VRN8M1_with_sub_vrm1_0_in_VMV0:sub_vrm2_2_sub_vrm2_3
    },
  };
  assert(RC && "Missing regclass");
  if (!Idx) return RC;
  --Idx;
  assert(Idx < 51 && "Bad subreg");
  unsigned TV = Table[RC->getID()][Idx];
  return TV ? getRegClass(TV - 1) : nullptr;
}

/// Get the weight in units of pressure for this register class.
const RegClassWeight &RISCVGenRegisterInfo::
getRegClassWeight(const TargetRegisterClass *RC) const {
  static const RegClassWeight RCWeightTable[] = {
    {1, 32},  	// FPR16
    {1, 96},  	// AnyReg
    {1, 32},  	// AnyReg_with_sub_16
    {1, 32},  	// FPR32
    {1, 32},  	// GPR
    {1, 32},  	// GPRF16
    {1, 32},  	// GPRF32
    {1, 32},  	// GPRF64
    {1, 31},  	// GPRNoX0
    {1, 30},  	// GPRNoX0X2
    {1, 26},  	// GPRJALR
    {1, 14},  	// GPRTC
    {1, 8},  	// AnyReg_with_sub_16_with_sub_32_in_FPR32C
    {1, 8},  	// FPR32C
    {1, 8},  	// GPRC
    {1, 6},  	// GPRC_and_GPRTC
    {1, 3},  	// VCSR
    {1, 1},  	// GPRX0
    {1, 1},  	// SP
    {1, 32},  	// FPR64
    {1, 32},  	// VM
    {1, 32},  	// VR
    {1, 31},  	// VRNoV0
    {2, 32},  	// GPRPF64
    {2, 30},  	// GPRPF64_with_sub_32_in_GPRNoX0
    {2, 28},  	// GPRPF64_with_sub_32_in_GPRNoX0X2
    {2, 26},  	// GPRPF64_with_sub_32_in_GPRJALR
    {1, 8},  	// FPR64C
    {2, 14},  	// GPRPF64_with_sub_32_in_GPRTC
    {2, 8},  	// GPRPF64_with_sub_32_in_GPRC
    {2, 6},  	// GPRPF64_with_sub_32_in_GPRC_and_GPRTC
    {2, 2},  	// GPRPF64_with_sub_32_in_GPRX0
    {2, 2},  	// GPRPF64_with_sub_32_in_SP
    {1, 1},  	// VMV0
    {2, 32},  	// VRN2M1
    {2, 31},  	// VRN2M1NoV0
    {2, 32},  	// VRM2
    {2, 30},  	// VRM2NoV0
    {2, 2},  	// VRM2_with_sub_vrm1_0_in_VMV0
    {2, 2},  	// VRN2M1_with_sub_vrm1_0_in_VMV0
    {3, 32},  	// VRN3M1
    {3, 31},  	// VRN3M1NoV0
    {3, 3},  	// VRN3M1_with_sub_vrm1_0_in_VMV0
    {4, 32},  	// VRN4M1
    {4, 31},  	// VRN4M1NoV0
    {4, 32},  	// VRN2M2
    {4, 30},  	// VRN2M2NoV0
    {4, 32},  	// VRM4
    {4, 28},  	// VRM4NoV0
    {4, 4},  	// VRM4_with_sub_vrm1_0_in_VMV0
    {4, 4},  	// VRN2M2_with_sub_vrm1_0_in_VMV0
    {4, 4},  	// VRN4M1_with_sub_vrm1_0_in_VMV0
    {5, 32},  	// VRN5M1
    {5, 31},  	// VRN5M1NoV0
    {5, 5},  	// VRN5M1_with_sub_vrm1_0_in_VMV0
    {6, 32},  	// VRN6M1
    {6, 31},  	// VRN6M1NoV0
    {6, 32},  	// VRN3M2
    {6, 30},  	// VRN3M2NoV0
    {6, 6},  	// VRN3M2_with_sub_vrm1_0_in_VMV0
    {6, 6},  	// VRN6M1_with_sub_vrm1_0_in_VMV0
    {7, 32},  	// VRN7M1
    {7, 31},  	// VRN7M1NoV0
    {7, 7},  	// VRN7M1_with_sub_vrm1_0_in_VMV0
    {8, 32},  	// VRN8M1
    {8, 31},  	// VRN8M1NoV0
    {8, 32},  	// VRN4M2
    {8, 30},  	// VRN4M2NoV0
    {8, 32},  	// VRN2M4
    {8, 28},  	// VRN2M4NoV0
    {8, 32},  	// VRM8
    {8, 24},  	// VRM8NoV0
    {8, 8},  	// VRM8_with_sub_vrm1_0_in_VMV0
    {8, 8},  	// VRN2M4_with_sub_vrm1_0_in_VMV0
    {8, 8},  	// VRN4M2_with_sub_vrm1_0_in_VMV0
    {8, 8},  	// VRN8M1_with_sub_vrm1_0_in_VMV0
  };
  return RCWeightTable[RC->getID()];
}

/// Get the weight in units of pressure for this register unit.
unsigned RISCVGenRegisterInfo::
getRegUnitWeight(unsigned RegUnit) const {
  assert(RegUnit < 103 && "invalid register unit");
  // All register units have unit weight.
  return 1;
}


// Get the number of dimensions of register pressure.
unsigned RISCVGenRegisterInfo::getNumRegPressureSets() const {
  return 11;
}

// Get the name of this register unit pressure set.
const char *RISCVGenRegisterInfo::
getRegPressureSetName(unsigned Idx) const {
  static const char *PressureNameTable[] = {
    "GPRX0",
    "SP",
    "VCSR",
    "FPR32C",
    "GPRC",
    "VMV0",
    "GPRTC",
    "VRM8NoV0",
    "FPR16",
    "GPR",
    "VM",
  };
  return PressureNameTable[Idx];
}

// Get the register unit pressure limit for this dimension.
// This limit must be adjusted dynamically for reserved registers.
unsigned RISCVGenRegisterInfo::
getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const {
  static const uint8_t PressureLimitTable[] = {
    2,  	// 0: GPRX0
    2,  	// 1: SP
    3,  	// 2: VCSR
    8,  	// 3: FPR32C
    8,  	// 4: GPRC
    8,  	// 5: VMV0
    16,  	// 6: GPRTC
    24,  	// 7: VRM8NoV0
    32,  	// 8: FPR16
    32,  	// 9: GPR
    32,  	// 10: VM
  };
  return PressureLimitTable[Idx];
}

/// Table of pressure sets per register class or unit.
static const int RCSetsTable[] = {
  /* 0 */ 2, -1,
  /* 2 */ 3, 8, -1,
  /* 5 */ 0, 9, -1,
  /* 8 */ 1, 9, -1,
  /* 11 */ 4, 6, 9, -1,
  /* 15 */ 5, 10, -1,
  /* 18 */ 7, 10, -1,
};

/// Get the dimensions of register pressure impacted by this register class.
/// Returns a -1 terminated array of pressure set IDs
const int *RISCVGenRegisterInfo::
getRegClassPressureSets(const TargetRegisterClass *RC) const {
  static const uint8_t RCSetStartTable[] = {
    3,1,1,3,6,6,6,6,6,6,6,12,1,2,11,11,0,5,8,3,16,16,16,6,6,6,6,2,12,11,11,5,8,15,16,16,16,16,15,15,16,16,15,16,16,16,16,16,16,15,15,15,16,16,15,16,16,16,16,15,15,16,16,15,16,16,16,16,16,16,16,18,15,15,15,15,};
  return &RCSetsTable[RCSetStartTable[RC->getID()]];
}

/// Get the dimensions of register pressure impacted by this register unit.
/// Returns a -1 terminated array of pressure set IDs
const int *RISCVGenRegisterInfo::
getRegUnitPressureSets(unsigned RegUnit) const {
  assert(RegUnit < 103 && "invalid register unit");
  static const uint8_t RUSetStartTable[] = {
    1,1,0,0,0,1,1,15,15,15,15,15,15,15,15,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,5,5,8,8,6,6,12,12,11,11,11,11,11,11,11,11,12,12,6,6,6,6,6,6,6,6,6,6,12,12,12,12,3,3,3,3,3,3,3,3,2,2,2,2,2,2,2,2,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,};
  return &RCSetsTable[RUSetStartTable[RegUnit]];
}

extern const MCRegisterDesc RISCVRegDesc[];
extern const MCPhysReg RISCVRegDiffLists[];
extern const LaneBitmask RISCVLaneMaskLists[];
extern const char RISCVRegStrings[];
extern const char RISCVRegClassStrings[];
extern const MCPhysReg RISCVRegUnitRoots[][2];
extern const uint16_t RISCVSubRegIdxLists[];
extern const MCRegisterInfo::SubRegCoveredBits RISCVSubRegIdxRanges[];
extern const uint16_t RISCVRegEncodingTable[];
// RISCV Dwarf<->LLVM register mappings.
extern const MCRegisterInfo::DwarfLLVMRegPair RISCVDwarfFlavour0Dwarf2L[];
extern const unsigned RISCVDwarfFlavour0Dwarf2LSize;

extern const MCRegisterInfo::DwarfLLVMRegPair RISCVEHFlavour0Dwarf2L[];
extern const unsigned RISCVEHFlavour0Dwarf2LSize;

extern const MCRegisterInfo::DwarfLLVMRegPair RISCVDwarfFlavour0L2Dwarf[];
extern const unsigned RISCVDwarfFlavour0L2DwarfSize;

extern const MCRegisterInfo::DwarfLLVMRegPair RISCVEHFlavour0L2Dwarf[];
extern const unsigned RISCVEHFlavour0L2DwarfSize;

RISCVGenRegisterInfo::
RISCVGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour,
      unsigned PC, unsigned HwMode)
  : TargetRegisterInfo(&RISCVRegInfoDesc, RegisterClasses, RegisterClasses+76,
             SubRegIndexNameTable, SubRegIndexLaneMaskTable,
             LaneBitmask(0xFFFFFFFFFFFFFC00), RegClassInfos, HwMode) {
  InitMCRegisterInfo(RISCVRegDesc, 457, RA, PC,
                     RISCVMCRegisterClasses, 76,
                     RISCVRegUnitRoots,
                     103,
                     RISCVRegDiffLists,
                     RISCVLaneMaskLists,
                     RISCVRegStrings,
                     RISCVRegClassStrings,
                     RISCVSubRegIdxLists,
                     52,
                     RISCVSubRegIdxRanges,
                     RISCVRegEncodingTable);

  switch (DwarfFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    mapDwarfRegsToLLVMRegs(RISCVDwarfFlavour0Dwarf2L, RISCVDwarfFlavour0Dwarf2LSize, false);
    break;
  }
  switch (EHFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    mapDwarfRegsToLLVMRegs(RISCVEHFlavour0Dwarf2L, RISCVEHFlavour0Dwarf2LSize, true);
    break;
  }
  switch (DwarfFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    mapLLVMRegsToDwarfRegs(RISCVDwarfFlavour0L2Dwarf, RISCVDwarfFlavour0L2DwarfSize, false);
    break;
  }
  switch (EHFlavour) {
  default:
    llvm_unreachable("Unknown DWARF flavour");
  case 0:
    mapLLVMRegsToDwarfRegs(RISCVEHFlavour0L2Dwarf, RISCVEHFlavour0L2DwarfSize, true);
    break;
  }
}

static const MCPhysReg CSR_ILP32D_LP64D_SaveList[] = { RISCV::X1, RISCV::X3, RISCV::X4, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::F8_D, RISCV::F9_D, RISCV::F18_D, RISCV::F19_D, RISCV::F20_D, RISCV::F21_D, RISCV::F22_D, RISCV::F23_D, RISCV::F24_D, RISCV::F25_D, RISCV::F26_D, RISCV::F27_D, 0 };
static const uint32_t CSR_ILP32D_LP64D_RegMask[] = { 0x00000010, 0xfc031b00, 0xfc03000f, 0xfc03000f, 0xfc03000f, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
static const MCPhysReg CSR_ILP32F_LP64F_SaveList[] = { RISCV::X1, RISCV::X3, RISCV::X4, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::F8_F, RISCV::F9_F, RISCV::F18_F, RISCV::F19_F, RISCV::F20_F, RISCV::F21_F, RISCV::F22_F, RISCV::F23_F, RISCV::F24_F, RISCV::F25_F, RISCV::F26_F, RISCV::F27_F, 0 };
static const uint32_t CSR_ILP32F_LP64F_RegMask[] = { 0x00000010, 0xfc031b00, 0x0000000f, 0xfc030000, 0xfc03000f, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
static const MCPhysReg CSR_ILP32_LP64_SaveList[] = { RISCV::X1, RISCV::X3, RISCV::X4, RISCV::X8, RISCV::X9, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, 0 };
static const uint32_t CSR_ILP32_LP64_RegMask[] = { 0x00000010, 0xfc031b00, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
static const MCPhysReg CSR_Interrupt_SaveList[] = { RISCV::X1, RISCV::X3, RISCV::X4, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X8, RISCV::X9, RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, 0 };
static const uint32_t CSR_Interrupt_RegMask[] = { 0x00000010, 0xfffffb00, 0x000000ff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 };
static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000010, 0x00000100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
static const MCPhysReg CSR_XLEN_F32_Interrupt_SaveList[] = { RISCV::X1, RISCV::X3, RISCV::X4, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X8, RISCV::X9, RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::F0_F, RISCV::F1_F, RISCV::F2_F, RISCV::F3_F, RISCV::F4_F, RISCV::F5_F, RISCV::F6_F, RISCV::F7_F, RISCV::F10_F, RISCV::F11_F, RISCV::F12_F, RISCV::F13_F, RISCV::F14_F, RISCV::F15_F, RISCV::F16_F, RISCV::F17_F, RISCV::F28_F, RISCV::F29_F, RISCV::F30_F, RISCV::F31_F, RISCV::F8_F, RISCV::F9_F, RISCV::F18_F, RISCV::F19_F, RISCV::F20_F, RISCV::F21_F, RISCV::F22_F, RISCV::F23_F, RISCV::F24_F, RISCV::F25_F, RISCV::F26_F, RISCV::F27_F, 0 };
static const uint32_t CSR_XLEN_F32_Interrupt_RegMask[] = { 0x00000010, 0xfffffb00, 0x000000ff, 0xffffff00, 0xffffffff, 0x000000ff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };
static const MCPhysReg CSR_XLEN_F64_Interrupt_SaveList[] = { RISCV::X1, RISCV::X3, RISCV::X4, RISCV::X5, RISCV::X6, RISCV::X7, RISCV::X8, RISCV::X9, RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, RISCV::X18, RISCV::X19, RISCV::X20, RISCV::X21, RISCV::X22, RISCV::X23, RISCV::X24, RISCV::X25, RISCV::X26, RISCV::X27, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31, RISCV::F0_D, RISCV::F1_D, RISCV::F2_D, RISCV::F3_D, RISCV::F4_D, RISCV::F5_D, RISCV::F6_D, RISCV::F7_D, RISCV::F10_D, RISCV::F11_D, RISCV::F12_D, RISCV::F13_D, RISCV::F14_D, RISCV::F15_D, RISCV::F16_D, RISCV::F17_D, RISCV::F28_D, RISCV::F29_D, RISCV::F30_D, RISCV::F31_D, RISCV::F8_D, RISCV::F9_D, RISCV::F18_D, RISCV::F19_D, RISCV::F20_D, RISCV::F21_D, RISCV::F22_D, RISCV::F23_D, RISCV::F24_D, RISCV::F25_D, RISCV::F26_D, RISCV::F27_D, 0 };
static const uint32_t CSR_XLEN_F64_Interrupt_RegMask[] = { 0x00000010, 0xfffffb00, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, };


ArrayRef<const uint32_t *> RISCVGenRegisterInfo::getRegMasks() const {
  static const uint32_t *const Masks[] = {
    CSR_ILP32D_LP64D_RegMask,
    CSR_ILP32F_LP64F_RegMask,
    CSR_ILP32_LP64_RegMask,
    CSR_Interrupt_RegMask,
    CSR_NoRegs_RegMask,
    CSR_XLEN_F32_Interrupt_RegMask,
    CSR_XLEN_F64_Interrupt_RegMask,
  };
  return ArrayRef(Masks);
}

bool RISCVGenRegisterInfo::
isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const {
  return
      false;
}

bool RISCVGenRegisterInfo::
isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const {
  return
      false;
}

bool RISCVGenRegisterInfo::
isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const {
  return
      false;
}

bool RISCVGenRegisterInfo::
isConstantPhysReg(MCRegister PhysReg) const {
  return
      PhysReg == RISCV::VLENB ||
      PhysReg == RISCV::X0 ||
      false;
}

ArrayRef<const char *> RISCVGenRegisterInfo::getRegMaskNames() const {
  static const char *Names[] = {
    "CSR_ILP32D_LP64D",
    "CSR_ILP32F_LP64F",
    "CSR_ILP32_LP64",
    "CSR_Interrupt",
    "CSR_NoRegs",
    "CSR_XLEN_F32_Interrupt",
    "CSR_XLEN_F64_Interrupt",
  };
  return ArrayRef(Names);
}

const RISCVFrameLowering *
RISCVGenRegisterInfo::getFrameLowering(const MachineFunction &MF) {
  return static_cast<const RISCVFrameLowering *>(
      MF.getSubtarget().getFrameLowering());
}

} // end namespace llvm

#endif // GET_REGINFO_TARGET_DESC