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swiftshader / SwiftShader / refs/heads/master / . / third_party / llvm-16.0 / configs / common / lib / Target / PowerPC / PPCGenGlobalISel.inc
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Global Instruction Selector for the PPC target *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
#ifdef GET_GLOBALISEL_PREDICATE_BITSET
const unsigned MAX_SUBTARGET_PREDICATES = 39;
using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
#endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
#ifdef GET_GLOBALISEL_TEMPORARIES_DECL
mutable MatcherState State;
typedef ComplexRendererFns(PPCInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
typedef void(PPCInstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ISelInfo;
static PPCInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
static PPCInstructionSelector::CustomRendererFn CustomRenderers[];
bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
const int64_t *getMatchTable() const override;
bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const std::array<const MachineOperand *, 3> &Operands) const override;
#endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
#ifdef GET_GLOBALISEL_TEMPORARIES_INIT
, State(0),
ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
#endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
#ifdef GET_GLOBALISEL_IMPL
// Bits for subtarget features that participate in instruction matching.
enum SubtargetFeatureBits : uint8_t {
Feature_In32BitModeBit = 1,
Feature_In64BitModeBit = 9,
Feature_HasOnlyMSYNCBit = 23,
Feature_HasSYNCBit = 22,
Feature_HasSPEBit = 8,
Feature_HasICBTBit = 21,
Feature_HasBPERMDBit = 10,
Feature_HasExtDivBit = 3,
Feature_IsISA2_06Bit = 11,
Feature_IsISA2_07Bit = 38,
Feature_IsISA3_0Bit = 2,
Feature_HasFPUBit = 0,
Feature_PCRelativeMemopsBit = 35,
Feature_IsNotISA3_1Bit = 37,
Feature_IsAIXBit = 24,
Feature_NotAIXBit = 25,
Feature_IsISAFutureBit = 20,
Feature_IsNotISAFutureBit = 18,
Feature_HasAltivecBit = 4,
Feature_HasP8AltivecBit = 5,
Feature_HasP8CryptoBit = 6,
Feature_HasP9AltivecBit = 7,
Feature_HasVSXBit = 12,
Feature_IsLittleEndianBit = 26,
Feature_IsBigEndianBit = 27,
Feature_IsPPC64Bit = 30,
Feature_HasOnlySwappingMemOpsBit = 29,
Feature_HasP8VectorBit = 13,
Feature_HasDirectMoveBit = 14,
Feature_NoP9VectorBit = 28,
Feature_HasP9VectorBit = 15,
Feature_NoP9AltivecBit = 31,
Feature_NoP10VectorBit = 32,
Feature_HasHTMBit = 33,
Feature_IsPPC32Bit = 36,
Feature_PrefixInstrsBit = 16,
Feature_IsISA3_1Bit = 17,
Feature_PairedVectorMemopsBit = 34,
Feature_MMABit = 19,
};
PredicateBitset PPCInstructionSelector::
computeAvailableModuleFeatures(const PPCSubtarget *Subtarget) const {
PredicateBitset Features;
if (!Subtarget->isPPC64())
Features.set(Feature_In32BitModeBit);
if (Subtarget->isPPC64())
Features.set(Feature_In64BitModeBit);
if (Subtarget->hasOnlyMSYNC())
Features.set(Feature_HasOnlyMSYNCBit);
if (!Subtarget->hasOnlyMSYNC())
Features.set(Feature_HasSYNCBit);
if (Subtarget->hasSPE())
Features.set(Feature_HasSPEBit);
if (Subtarget->hasICBT())
Features.set(Feature_HasICBTBit);
if (Subtarget->hasBPERMD())
Features.set(Feature_HasBPERMDBit);
if (Subtarget->hasExtDiv())
Features.set(Feature_HasExtDivBit);
if (Subtarget->isISA2_06())
Features.set(Feature_IsISA2_06Bit);
if (Subtarget->isISA2_07())
Features.set(Feature_IsISA2_07Bit);
if (Subtarget->isISA3_0())
Features.set(Feature_IsISA3_0Bit);
if (Subtarget->hasFPU())
Features.set(Feature_HasFPUBit);
if (Subtarget->hasPCRelativeMemops())
Features.set(Feature_PCRelativeMemopsBit);
if (!Subtarget->isISA3_1())
Features.set(Feature_IsNotISA3_1Bit);
if (Subtarget->isAIXABI())
Features.set(Feature_IsAIXBit);
if (!Subtarget->isAIXABI())
Features.set(Feature_NotAIXBit);
if (Subtarget->isISAFuture())
Features.set(Feature_IsISAFutureBit);
if (!Subtarget->isISAFuture())
Features.set(Feature_IsNotISAFutureBit);
if (Subtarget->hasAltivec())
Features.set(Feature_HasAltivecBit);
if (Subtarget->hasP8Altivec())
Features.set(Feature_HasP8AltivecBit);
if (Subtarget->hasP8Crypto())
Features.set(Feature_HasP8CryptoBit);
if (Subtarget->hasP9Altivec())
Features.set(Feature_HasP9AltivecBit);
if (Subtarget->hasVSX())
Features.set(Feature_HasVSXBit);
if (Subtarget->isLittleEndian())
Features.set(Feature_IsLittleEndianBit);
if (!Subtarget->isLittleEndian())
Features.set(Feature_IsBigEndianBit);
if (Subtarget->isPPC64())
Features.set(Feature_IsPPC64Bit);
if (!Subtarget->hasP9Vector())
Features.set(Feature_HasOnlySwappingMemOpsBit);
if (Subtarget->hasP8Vector())
Features.set(Feature_HasP8VectorBit);
if (Subtarget->hasDirectMove())
Features.set(Feature_HasDirectMoveBit);
if (!Subtarget->hasP9Vector())
Features.set(Feature_NoP9VectorBit);
if (Subtarget->hasP9Vector())
Features.set(Feature_HasP9VectorBit);
if (!Subtarget->hasP9Altivec())
Features.set(Feature_NoP9AltivecBit);
if (!Subtarget->hasP10Vector())
Features.set(Feature_NoP10VectorBit);
if (Subtarget->hasHTM())
Features.set(Feature_HasHTMBit);
if (!Subtarget->isPPC64())
Features.set(Feature_IsPPC32Bit);
if (Subtarget->hasPrefixInstrs())
Features.set(Feature_PrefixInstrsBit);
if (Subtarget->isISA3_1())
Features.set(Feature_IsISA3_1Bit);
if (Subtarget->pairedVectorMemops())
Features.set(Feature_PairedVectorMemopsBit);
if (Subtarget->hasMMA())
Features.set(Feature_MMABit);
return Features;
}
void PPCInstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) {
AvailableFunctionFeatures = computeAvailableFunctionFeatures((const PPCSubtarget *)&MF.getSubtarget(), &MF);
}
PredicateBitset PPCInstructionSelector::
computeAvailableFunctionFeatures(const PPCSubtarget *Subtarget, const MachineFunction *MF) const {
PredicateBitset Features;
return Features;
}
// LLT Objects.
enum {
GILLT_s1,
GILLT_s32,
GILLT_s64,
GILLT_s128,
GILLT_v2s64,
GILLT_v4s32,
GILLT_v8s16,
GILLT_v16s8,
GILLT_v256s1,
GILLT_v512s1,
};
const static size_t NumTypeObjects = 10;
const static LLT TypeObjects[] = {
LLT::scalar(1),
LLT::scalar(32),
LLT::scalar(64),
LLT::scalar(128),
LLT::vector(ElementCount::getFixed(2), 64),
LLT::vector(ElementCount::getFixed(4), 32),
LLT::vector(ElementCount::getFixed(8), 16),
LLT::vector(ElementCount::getFixed(16), 8),
LLT::vector(ElementCount::getFixed(256), 1),
LLT::vector(ElementCount::getFixed(512), 1),
};
// Feature bitsets.
enum {
GIFBS_Invalid,
GIFBS_HasAltivec,
GIFBS_HasBPERMD,
GIFBS_HasExtDiv,
GIFBS_HasFPU,
GIFBS_HasHTM,
GIFBS_HasOnlyMSYNC,
GIFBS_HasP8Altivec,
GIFBS_HasP8Crypto,
GIFBS_HasP9Altivec,
GIFBS_HasSPE,
GIFBS_HasSYNC,
GIFBS_HasVSX,
GIFBS_IsAIX,
GIFBS_IsISA3_0,
GIFBS_IsISA3_1,
GIFBS_NotAIX,
GIFBS_PrefixInstrs,
GIFBS_HasDirectMove_HasVSX,
GIFBS_HasP8Vector_HasVSX,
GIFBS_HasP9Vector_HasVSX,
GIFBS_IsISAFuture_MMA,
GIFBS_IsNotISAFuture_MMA,
};
const static PredicateBitset FeatureBitsets[] {
{}, // GIFBS_Invalid
{Feature_HasAltivecBit, },
{Feature_HasBPERMDBit, },
{Feature_HasExtDivBit, },
{Feature_HasFPUBit, },
{Feature_HasHTMBit, },
{Feature_HasOnlyMSYNCBit, },
{Feature_HasP8AltivecBit, },
{Feature_HasP8CryptoBit, },
{Feature_HasP9AltivecBit, },
{Feature_HasSPEBit, },
{Feature_HasSYNCBit, },
{Feature_HasVSXBit, },
{Feature_IsAIXBit, },
{Feature_IsISA3_0Bit, },
{Feature_IsISA3_1Bit, },
{Feature_NotAIXBit, },
{Feature_PrefixInstrsBit, },
{Feature_HasDirectMoveBit, Feature_HasVSXBit, },
{Feature_HasP8VectorBit, Feature_HasVSXBit, },
{Feature_HasP9VectorBit, Feature_HasVSXBit, },
{Feature_IsISAFutureBit, Feature_MMABit, },
{Feature_IsNotISAFutureBit, Feature_MMABit, },
};
// ComplexPattern predicates.
enum {
GICP_Invalid,
};
// See constructor for table contents
// PatFrag predicates.
enum {
GIPFP_I64_Predicate_Msk2Imm = GIPFP_I64_Invalid + 1,
GIPFP_I64_Predicate_Msk4Imm,
GIPFP_I64_Predicate_Msk8Imm,
GIPFP_I64_Predicate_i32immNonAllOneNonZero,
GIPFP_I64_Predicate_imm32SExt16,
GIPFP_I64_Predicate_imm64SExt16,
GIPFP_I64_Predicate_imm64ZExt32,
GIPFP_I64_Predicate_immNonAllOneAnyExt8,
GIPFP_I64_Predicate_immSExt5NonZero,
};
bool PPCInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
switch (PredicateID) {
case GIPFP_I64_Predicate_Msk2Imm: {
return isUInt<2>(Imm);
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_Msk4Imm: {
return isUInt<4>(Imm);
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_Msk8Imm: {
return isUInt<8>(Imm);
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_i32immNonAllOneNonZero: {
return Imm && (Imm != -1);
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_imm32SExt16: {
// imm32SExt16 predicate - True if the i32 immediate fits in a 16-bit
// sign extended field. Used by instructions like 'addi'.
return (int32_t)Imm == (short)Imm;
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_imm64SExt16: {
// imm64SExt16 predicate - True if the i64 immediate fits in a 16-bit
// sign extended field. Used by instructions like 'addi'.
return (int64_t)Imm == (short)Imm;
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_imm64ZExt32: {
// imm64ZExt32 predicate - True if the i64 immediate fits in a 32-bit
// zero extended field.
return isUInt<32>(Imm);
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_immNonAllOneAnyExt8: {
return (isInt<8>(Imm) && (Imm != -1)) || (isUInt<8>(Imm) && (Imm != 0xFF));
llvm_unreachable("ImmediateCode should have returned");
return false;
}
case GIPFP_I64_Predicate_immSExt5NonZero: {
return Imm && isInt<5>(Imm);
llvm_unreachable("ImmediateCode should have returned");
return false;
}
}
llvm_unreachable("Unknown predicate");
return false;
}
bool PPCInstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
llvm_unreachable("Unknown predicate");
return false;
}
bool PPCInstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
llvm_unreachable("Unknown predicate");
return false;
}
bool PPCInstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const std::array<const MachineOperand *, 3> &Operands) const {
const MachineFunction &MF = *MI.getParent()->getParent();
const MachineRegisterInfo &MRI = MF.getRegInfo();
(void)MRI;
llvm_unreachable("Unknown predicate");
return false;
}
PPCInstructionSelector::ComplexMatcherMemFn
PPCInstructionSelector::ComplexPredicateFns[] = {
nullptr, // GICP_Invalid
};
// Custom renderers.
enum {
GICR_Invalid,
};
PPCInstructionSelector::CustomRendererFn
PPCInstructionSelector::CustomRenderers[] = {
nullptr, // GICR_Invalid
};
bool PPCInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
MachineFunction &MF = *I.getParent()->getParent();
MachineRegisterInfo &MRI = MF.getRegInfo();
const PredicateBitset AvailableFeatures = getAvailableFeatures();
NewMIVector OutMIs;
State.MIs.clear();
State.MIs.push_back(&I);
if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) {
return true;
}
return false;
}
const int64_t *PPCInstructionSelector::getMatchTable() const {
constexpr static int64_t MatchTable0[] = {
GIM_SwitchOpcode, /*MI*/0, /*[*/46, 227, /*)*//*default:*//*Label 57*/ 40158,
/*TargetOpcode::G_ADD*//*Label 0*/ 186,
/*TargetOpcode::G_SUB*//*Label 1*/ 436,
/*TargetOpcode::G_MUL*//*Label 2*/ 760,
/*TargetOpcode::G_SDIV*//*Label 3*/ 936,
/*TargetOpcode::G_UDIV*//*Label 4*/ 1064,
/*TargetOpcode::G_SREM*//*Label 5*/ 1192,
/*TargetOpcode::G_UREM*//*Label 6*/ 1324, 0, 0,
/*TargetOpcode::G_AND*//*Label 7*/ 1456,
/*TargetOpcode::G_OR*//*Label 8*/ 2072,
/*TargetOpcode::G_XOR*//*Label 9*/ 2688, 0, 0, 0, 0, 0, 0, 0, 0,
/*TargetOpcode::G_BUILD_VECTOR*//*Label 10*/ 4991, 0, 0, 0, 0,
/*TargetOpcode::G_BITCAST*//*Label 11*/ 5383, 0, 0,
/*TargetOpcode::G_INTRINSIC_TRUNC*//*Label 12*/ 6958,
/*TargetOpcode::G_INTRINSIC_ROUND*//*Label 13*/ 7068, 0, 0,
/*TargetOpcode::G_READCYCLECOUNTER*//*Label 14*/ 7178, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*TargetOpcode::G_FENCE*//*Label 15*/ 7196, 0, 0, 0,
/*TargetOpcode::G_INTRINSIC*//*Label 16*/ 7303,
/*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 17*/ 18995,
/*TargetOpcode::G_ANYEXT*//*Label 18*/ 21406,
/*TargetOpcode::G_TRUNC*//*Label 19*/ 24479,
/*TargetOpcode::G_CONSTANT*//*Label 20*/ 24619, 0, 0, 0,
/*TargetOpcode::G_SEXT*//*Label 21*/ 24741, 0,
/*TargetOpcode::G_ZEXT*//*Label 22*/ 27804, 0, 0,
/*TargetOpcode::G_ASHR*//*Label 23*/ 30765, 0, 0, 0,
/*TargetOpcode::G_ROTL*//*Label 24*/ 30860, 0,
/*TargetOpcode::G_FCMP*//*Label 25*/ 30992,
/*TargetOpcode::G_SELECT*//*Label 26*/ 32545, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*TargetOpcode::G_UMULH*//*Label 27*/ 32787,
/*TargetOpcode::G_SMULH*//*Label 28*/ 32891, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*TargetOpcode::G_FADD*//*Label 29*/ 32995,
/*TargetOpcode::G_FSUB*//*Label 30*/ 33226,
/*TargetOpcode::G_FMUL*//*Label 31*/ 33457,
/*TargetOpcode::G_FMA*//*Label 32*/ 33670, 0,
/*TargetOpcode::G_FDIV*//*Label 33*/ 34280, 0, 0, 0, 0, 0, 0, 0, 0,
/*TargetOpcode::G_FNEG*//*Label 34*/ 34493,
/*TargetOpcode::G_FPEXT*//*Label 35*/ 36771,
/*TargetOpcode::G_FPTRUNC*//*Label 36*/ 36820,
/*TargetOpcode::G_FPTOSI*//*Label 37*/ 36880,
/*TargetOpcode::G_FPTOUI*//*Label 38*/ 36977,
/*TargetOpcode::G_SITOFP*//*Label 39*/ 37074,
/*TargetOpcode::G_UITOFP*//*Label 40*/ 37172,
/*TargetOpcode::G_FABS*//*Label 41*/ 37270,
/*TargetOpcode::G_FCOPYSIGN*//*Label 42*/ 37442, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*TargetOpcode::G_BR*//*Label 43*/ 37670, 0, 0, 0, 0,
/*TargetOpcode::G_CTTZ*//*Label 44*/ 37683, 0,
/*TargetOpcode::G_CTLZ*//*Label 45*/ 37817, 0,
/*TargetOpcode::G_CTPOP*//*Label 46*/ 37947,
/*TargetOpcode::G_BSWAP*//*Label 47*/ 38077, 0,
/*TargetOpcode::G_FCEIL*//*Label 48*/ 38169, 0, 0,
/*TargetOpcode::G_FSQRT*//*Label 49*/ 38279,
/*TargetOpcode::G_FFLOOR*//*Label 50*/ 38442, 0, 0, 0, 0, 0, 0,
/*TargetOpcode::G_STRICT_FADD*//*Label 51*/ 38552,
/*TargetOpcode::G_STRICT_FSUB*//*Label 52*/ 38765,
/*TargetOpcode::G_STRICT_FMUL*//*Label 53*/ 38978,
/*TargetOpcode::G_STRICT_FDIV*//*Label 54*/ 39191, 0,
/*TargetOpcode::G_STRICT_FMA*//*Label 55*/ 39404,
/*TargetOpcode::G_STRICT_FSQRT*//*Label 56*/ 39995,
// Label 0: @186
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 8, /*)*//*default:*//*Label 65*/ 435,
/*GILLT_s32*//*Label 58*/ 199,
/*GILLT_s64*//*Label 59*/ 257,
/*GILLT_s128*//*Label 60*/ 315,
/*GILLT_v2s64*//*Label 61*/ 339,
/*GILLT_v4s32*//*Label 62*/ 363,
/*GILLT_v8s16*//*Label 63*/ 387,
/*GILLT_v16s8*//*Label 64*/ 411,
// Label 58: @199
GIM_Try, /*On fail goto*//*Label 66*/ 256,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
GIM_Try, /*On fail goto*//*Label 67*/ 246, // Rule ID 104 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm32SExt16,
// MIs[1] Operand 1
// No operand predicates
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (add:{ *:[i32] } i32:{ *:[i32] }:$rA, (imm:{ *:[i32] })<<P:Predicate_imm32SExt16>>:$imm) => (ADDI:{ *:[i32] } i32:{ *:[i32] }:$rA, (imm:{ *:[i32] }):$imm)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ADDI,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rA
GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 104,
GIR_Done,
// Label 67: @246
GIM_Try, /*On fail goto*//*Label 68*/ 255, // Rule ID 196 //
// (add:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB) => (ADD4:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::ADD4,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 196,
GIR_Done,
// Label 68: @255
GIM_Reject,
// Label 66: @256
GIM_Reject,
// Label 59: @257
GIM_Try, /*On fail goto*//*Label 69*/ 314,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
GIM_Try, /*On fail goto*//*Label 70*/ 304, // Rule ID 655 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm64SExt16,
// MIs[1] Operand 1
// No operand predicates
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (add:{ *:[i64] } i64:{ *:[i64] }:$rA, (imm:{ *:[i64] })<<P:Predicate_imm64SExt16>>:$imm) => (ADDI8:{ *:[i64] } i64:{ *:[i64] }:$rA, (imm:{ *:[i64] }):$imm)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ADDI8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rA
GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 655,
GIR_Done,
// Label 70: @304
GIM_Try, /*On fail goto*//*Label 71*/ 313, // Rule ID 651 //
// (add:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB) => (ADD8:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::ADD8,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 651,
GIR_Done,
// Label 71: @313
GIM_Reject,
// Label 69: @314
GIM_Reject,
// Label 60: @315
GIM_Try, /*On fail goto*//*Label 72*/ 338, // Rule ID 466 //
GIM_CheckFeatures, GIFBS_HasP8Altivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (add:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB) => (VADDUQM:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VADDUQM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 466,
GIR_Done,
// Label 72: @338
GIM_Reject,
// Label 61: @339
GIM_Try, /*On fail goto*//*Label 73*/ 362, // Rule ID 465 //
GIM_CheckFeatures, GIFBS_HasP8Altivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (add:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB) => (VADDUDM:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VADDUDM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 465,
GIR_Done,
// Label 73: @362
GIM_Reject,
// Label 62: @363
GIM_Try, /*On fail goto*//*Label 74*/ 386, // Rule ID 299 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (add:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VADDUWM:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VADDUWM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 299,
GIR_Done,
// Label 74: @386
GIM_Reject,
// Label 63: @387
GIM_Try, /*On fail goto*//*Label 75*/ 410, // Rule ID 298 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (add:{ *:[v8i16] } v8i16:{ *:[v8i16] }:$vA, v8i16:{ *:[v8i16] }:$vB) => (VADDUHM:{ *:[v8i16] } v8i16:{ *:[v8i16] }:$vA, v8i16:{ *:[v8i16] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VADDUHM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 298,
GIR_Done,
// Label 75: @410
GIM_Reject,
// Label 64: @411
GIM_Try, /*On fail goto*//*Label 76*/ 434, // Rule ID 297 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (add:{ *:[v16i8] } v16i8:{ *:[v16i8] }:$vA, v16i8:{ *:[v16i8] }:$vB) => (VADDUBM:{ *:[v16i8] } v16i8:{ *:[v16i8] }:$vA, v16i8:{ *:[v16i8] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VADDUBM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 297,
GIR_Done,
// Label 76: @434
GIM_Reject,
// Label 65: @435
GIM_Reject,
// Label 1: @436
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 8, /*)*//*default:*//*Label 84*/ 759,
/*GILLT_s32*//*Label 77*/ 449,
/*GILLT_s64*//*Label 78*/ 509,
/*GILLT_s128*//*Label 79*/ 569,
/*GILLT_v2s64*//*Label 80*/ 593,
/*GILLT_v4s32*//*Label 81*/ 652,
/*GILLT_v8s16*//*Label 82*/ 711,
/*GILLT_v16s8*//*Label 83*/ 735,
// Label 77: @449
GIM_Try, /*On fail goto*//*Label 85*/ 508,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
GIM_Try, /*On fail goto*//*Label 86*/ 485, // Rule ID 208 //
GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
// (sub:{ *:[i32] } 0:{ *:[i32] }, i32:{ *:[i32] }:$rA) => (NEG:{ *:[i32] } i32:{ *:[i32] }:$rA)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::NEG,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rA
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 208,
GIR_Done,
// Label 86: @485
GIM_Try, /*On fail goto*//*Label 87*/ 507, // Rule ID 206 //
// (sub:{ *:[i32] } i32:{ *:[i32] }:$rB, i32:{ *:[i32] }:$rA) => (SUBF:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::SUBF,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 206,
GIR_Done,
// Label 87: @507
GIM_Reject,
// Label 85: @508
GIM_Reject,
// Label 78: @509
GIM_Try, /*On fail goto*//*Label 88*/ 568,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
GIM_Try, /*On fail goto*//*Label 89*/ 545, // Rule ID 661 //
GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
// (sub:{ *:[i64] } 0:{ *:[i64] }, i64:{ *:[i64] }:$rA) => (NEG8:{ *:[i64] } i64:{ *:[i64] }:$rA)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::NEG8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rA
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 661,
GIR_Done,
// Label 89: @545
GIM_Try, /*On fail goto*//*Label 90*/ 567, // Rule ID 660 //
// (sub:{ *:[i64] } i64:{ *:[i64] }:$rB, i64:{ *:[i64] }:$rA) => (SUBF8:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::SUBF8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 660,
GIR_Done,
// Label 90: @567
GIM_Reject,
// Label 88: @568
GIM_Reject,
// Label 79: @569
GIM_Try, /*On fail goto*//*Label 91*/ 592, // Rule ID 471 //
GIM_CheckFeatures, GIFBS_HasP8Altivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (sub:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB) => (VSUBUQM:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VSUBUQM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 471,
GIR_Done,
// Label 91: @592
GIM_Reject,
// Label 80: @593
GIM_Try, /*On fail goto*//*Label 92*/ 651,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
GIM_Try, /*On fail goto*//*Label 93*/ 639, // Rule ID 538 //
GIM_CheckFeatures, GIFBS_HasP9Altivec,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (sub:{ *:[v2i64] } immAllZerosV:{ *:[v2i64] }, v2i64:{ *:[v2i64] }:$vB) => (VNEGD:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::VNEGD,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // vD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // vB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 538,
GIR_Done,
// Label 93: @639
GIM_Try, /*On fail goto*//*Label 94*/ 650, // Rule ID 470 //
GIM_CheckFeatures, GIFBS_HasP8Altivec,
// (sub:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB) => (VSUBUDM:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VSUBUDM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 470,
GIR_Done,
// Label 94: @650
GIM_Reject,
// Label 92: @651
GIM_Reject,
// Label 81: @652
GIM_Try, /*On fail goto*//*Label 95*/ 710,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
GIM_Try, /*On fail goto*//*Label 96*/ 698, // Rule ID 537 //
GIM_CheckFeatures, GIFBS_HasP9Altivec,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcodeIsEither, /*MI*/1, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (sub:{ *:[v4i32] } immAllZerosV:{ *:[v4i32] }, v4i32:{ *:[v4i32] }:$vB) => (VNEGW:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::VNEGW,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // vD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // vB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 537,
GIR_Done,
// Label 96: @698
GIM_Try, /*On fail goto*//*Label 97*/ 709, // Rule ID 369 //
GIM_CheckFeatures, GIFBS_HasAltivec,
// (sub:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VSUBUWM:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VSUBUWM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 369,
GIR_Done,
// Label 97: @709
GIM_Reject,
// Label 95: @710
GIM_Reject,
// Label 82: @711
GIM_Try, /*On fail goto*//*Label 98*/ 734, // Rule ID 368 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (sub:{ *:[v8i16] } v8i16:{ *:[v8i16] }:$vA, v8i16:{ *:[v8i16] }:$vB) => (VSUBUHM:{ *:[v8i16] } v8i16:{ *:[v8i16] }:$vA, v8i16:{ *:[v8i16] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VSUBUHM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 368,
GIR_Done,
// Label 98: @734
GIM_Reject,
// Label 83: @735
GIM_Try, /*On fail goto*//*Label 99*/ 758, // Rule ID 367 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (sub:{ *:[v16i8] } v16i8:{ *:[v16i8] }:$vA, v16i8:{ *:[v16i8] }:$vB) => (VSUBUBM:{ *:[v16i8] } v16i8:{ *:[v16i8] }:$vA, v16i8:{ *:[v16i8] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VSUBUBM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 367,
GIR_Done,
// Label 99: @758
GIM_Reject,
// Label 84: @759
GIM_Reject,
// Label 2: @760
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 6, /*)*//*default:*//*Label 104*/ 935,
/*GILLT_s32*//*Label 100*/ 771,
/*GILLT_s64*//*Label 101*/ 829, 0,
/*GILLT_v2s64*//*Label 102*/ 887,
/*GILLT_v4s32*//*Label 103*/ 911,
// Label 100: @771
GIM_Try, /*On fail goto*//*Label 105*/ 828,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
GIM_Try, /*On fail goto*//*Label 106*/ 818, // Rule ID 108 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm32SExt16,
// MIs[1] Operand 1
// No operand predicates
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (mul:{ *:[i32] } i32:{ *:[i32] }:$rA, (imm:{ *:[i32] })<<P:Predicate_imm32SExt16>>:$imm) => (MULLI:{ *:[i32] } i32:{ *:[i32] }:$rA, (imm:{ *:[i32] }):$imm)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::MULLI,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rA
GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 108,
GIR_Done,
// Label 106: @818
GIM_Try, /*On fail goto*//*Label 107*/ 827, // Rule ID 205 //
// (mul:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB) => (MULLW:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::MULLW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 205,
GIR_Done,
// Label 107: @827
GIM_Reject,
// Label 105: @828
GIM_Reject,
// Label 101: @829
GIM_Try, /*On fail goto*//*Label 108*/ 886,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
GIM_Try, /*On fail goto*//*Label 109*/ 876, // Rule ID 695 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm64SExt16,
// MIs[1] Operand 1
// No operand predicates
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (mul:{ *:[i64] } i64:{ *:[i64] }:$rA, (imm:{ *:[i64] })<<P:Predicate_imm64SExt16>>:$imm) => (MULLI8:{ *:[i64] } i64:{ *:[i64] }:$rA, (imm:{ *:[i64] }):$imm)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::MULLI8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rA
GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 695,
GIR_Done,
// Label 109: @876
GIM_Try, /*On fail goto*//*Label 110*/ 885, // Rule ID 694 //
// (mul:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB) => (MULLD:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::MULLD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 694,
GIR_Done,
// Label 110: @885
GIM_Reject,
// Label 108: @886
GIM_Reject,
// Label 102: @887
GIM_Try, /*On fail goto*//*Label 111*/ 910, // Rule ID 1102 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (mul:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB) => (VMULLD:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMULLD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1102,
GIR_Done,
// Label 111: @910
GIM_Reject,
// Label 103: @911
GIM_Try, /*On fail goto*//*Label 112*/ 934, // Rule ID 457 //
GIM_CheckFeatures, GIFBS_HasP8Altivec,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (mul:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VMULUWM:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMULUWM,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 457,
GIR_Done,
// Label 112: @934
GIM_Reject,
// Label 104: @935
GIM_Reject,
// Label 3: @936
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 6, /*)*//*default:*//*Label 118*/ 1063,
/*GILLT_s32*//*Label 113*/ 947,
/*GILLT_s64*//*Label 114*/ 969,
/*GILLT_s128*//*Label 115*/ 991,
/*GILLT_v2s64*//*Label 116*/ 1015,
/*GILLT_v4s32*//*Label 117*/ 1039,
// Label 113: @947
GIM_Try, /*On fail goto*//*Label 119*/ 968, // Rule ID 199 //
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
// (sdiv:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB) => (DIVW:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::DIVW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 199,
GIR_Done,
// Label 119: @968
GIM_Reject,
// Label 114: @969
GIM_Try, /*On fail goto*//*Label 120*/ 990, // Rule ID 686 //
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
// (sdiv:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB) => (DIVD:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::DIVD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 686,
GIR_Done,
// Label 120: @990
GIM_Reject,
// Label 115: @991
GIM_Try, /*On fail goto*//*Label 121*/ 1014, // Rule ID 1126 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (sdiv:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB) => (VDIVSQ:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VDIVSQ,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1126,
GIR_Done,
// Label 121: @1014
GIM_Reject,
// Label 116: @1015
GIM_Try, /*On fail goto*//*Label 122*/ 1038, // Rule ID 1113 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (sdiv:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB) => (VDIVSD:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VDIVSD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1113,
GIR_Done,
// Label 122: @1038
GIM_Reject,
// Label 117: @1039
GIM_Try, /*On fail goto*//*Label 123*/ 1062, // Rule ID 1111 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (sdiv:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VDIVSW:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VDIVSW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1111,
GIR_Done,
// Label 123: @1062
GIM_Reject,
// Label 118: @1063
GIM_Reject,
// Label 4: @1064
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 6, /*)*//*default:*//*Label 129*/ 1191,
/*GILLT_s32*//*Label 124*/ 1075,
/*GILLT_s64*//*Label 125*/ 1097,
/*GILLT_s128*//*Label 126*/ 1119,
/*GILLT_v2s64*//*Label 127*/ 1143,
/*GILLT_v4s32*//*Label 128*/ 1167,
// Label 124: @1075
GIM_Try, /*On fail goto*//*Label 130*/ 1096, // Rule ID 200 //
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
// (udiv:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB) => (DIVWU:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::DIVWU,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 200,
GIR_Done,
// Label 130: @1096
GIM_Reject,
// Label 125: @1097
GIM_Try, /*On fail goto*//*Label 131*/ 1118, // Rule ID 687 //
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
// (udiv:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB) => (DIVDU:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::DIVDU,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 687,
GIR_Done,
// Label 131: @1118
GIM_Reject,
// Label 126: @1119
GIM_Try, /*On fail goto*//*Label 132*/ 1142, // Rule ID 1127 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (udiv:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB) => (VDIVUQ:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VDIVUQ,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1127,
GIR_Done,
// Label 132: @1142
GIM_Reject,
// Label 127: @1143
GIM_Try, /*On fail goto*//*Label 133*/ 1166, // Rule ID 1114 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (udiv:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB) => (VDIVUD:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VDIVUD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1114,
GIR_Done,
// Label 133: @1166
GIM_Reject,
// Label 128: @1167
GIM_Try, /*On fail goto*//*Label 134*/ 1190, // Rule ID 1112 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (udiv:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VDIVUW:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VDIVUW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1112,
GIR_Done,
// Label 134: @1190
GIM_Reject,
// Label 129: @1191
GIM_Reject,
// Label 5: @1192
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 6, /*)*//*default:*//*Label 140*/ 1323,
/*GILLT_s32*//*Label 135*/ 1203,
/*GILLT_s64*//*Label 136*/ 1227,
/*GILLT_s128*//*Label 137*/ 1251,
/*GILLT_v2s64*//*Label 138*/ 1275,
/*GILLT_v4s32*//*Label 139*/ 1299,
// Label 135: @1203
GIM_Try, /*On fail goto*//*Label 141*/ 1226, // Rule ID 194 //
GIM_CheckFeatures, GIFBS_IsISA3_0,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
// (srem:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB) => (MODSW:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::MODSW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 194,
GIR_Done,
// Label 141: @1226
GIM_Reject,
// Label 136: @1227
GIM_Try, /*On fail goto*//*Label 142*/ 1250, // Rule ID 691 //
GIM_CheckFeatures, GIFBS_IsISA3_0,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
// (srem:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB) => (MODSD:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::MODSD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 691,
GIR_Done,
// Label 142: @1250
GIM_Reject,
// Label 137: @1251
GIM_Try, /*On fail goto*//*Label 143*/ 1274, // Rule ID 1136 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (srem:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB) => (VMODSQ:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMODSQ,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1136,
GIR_Done,
// Label 143: @1274
GIM_Reject,
// Label 138: @1275
GIM_Try, /*On fail goto*//*Label 144*/ 1298, // Rule ID 1109 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (srem:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB) => (VMODSD:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMODSD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1109,
GIR_Done,
// Label 144: @1298
GIM_Reject,
// Label 139: @1299
GIM_Try, /*On fail goto*//*Label 145*/ 1322, // Rule ID 1107 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (srem:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VMODSW:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMODSW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1107,
GIR_Done,
// Label 145: @1322
GIM_Reject,
// Label 140: @1323
GIM_Reject,
// Label 6: @1324
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 6, /*)*//*default:*//*Label 151*/ 1455,
/*GILLT_s32*//*Label 146*/ 1335,
/*GILLT_s64*//*Label 147*/ 1359,
/*GILLT_s128*//*Label 148*/ 1383,
/*GILLT_v2s64*//*Label 149*/ 1407,
/*GILLT_v4s32*//*Label 150*/ 1431,
// Label 146: @1335
GIM_Try, /*On fail goto*//*Label 152*/ 1358, // Rule ID 195 //
GIM_CheckFeatures, GIFBS_IsISA3_0,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
// (urem:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB) => (MODUW:{ *:[i32] } i32:{ *:[i32] }:$rA, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::MODUW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 195,
GIR_Done,
// Label 152: @1358
GIM_Reject,
// Label 147: @1359
GIM_Try, /*On fail goto*//*Label 153*/ 1382, // Rule ID 692 //
GIM_CheckFeatures, GIFBS_IsISA3_0,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
// (urem:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB) => (MODUD:{ *:[i64] } i64:{ *:[i64] }:$rA, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::MODUD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 692,
GIR_Done,
// Label 153: @1382
GIM_Reject,
// Label 148: @1383
GIM_Try, /*On fail goto*//*Label 154*/ 1406, // Rule ID 1137 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (urem:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB) => (VMODUQ:{ *:[v1i128] } v1i128:{ *:[v1i128] }:$vA, v1i128:{ *:[v1i128] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMODUQ,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1137,
GIR_Done,
// Label 154: @1406
GIM_Reject,
// Label 149: @1407
GIM_Try, /*On fail goto*//*Label 155*/ 1430, // Rule ID 1110 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (urem:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB) => (VMODUD:{ *:[v2i64] } v2i64:{ *:[v2i64] }:$vA, v2i64:{ *:[v2i64] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMODUD,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1110,
GIR_Done,
// Label 155: @1430
GIM_Reject,
// Label 150: @1431
GIM_Try, /*On fail goto*//*Label 156*/ 1454, // Rule ID 1108 //
GIM_CheckFeatures, GIFBS_IsISA3_1,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (urem:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VMODUW:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VMODUW,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 1108,
GIR_Done,
// Label 156: @1454
GIM_Reject,
// Label 151: @1455
GIM_Reject,
// Label 7: @1456
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 6, /*)*//*default:*//*Label 161*/ 2071,
/*GILLT_s1*//*Label 157*/ 1468,
/*GILLT_s32*//*Label 158*/ 1579,
/*GILLT_s64*//*Label 159*/ 1690, 0, 0,
/*GILLT_v4s32*//*Label 160*/ 1801,
// Label 157: @1468
GIM_Try, /*On fail goto*//*Label 162*/ 1578,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_Try, /*On fail goto*//*Label 163*/ 1525, // Rule ID 4854 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (and:{ *:[i1] } (xor:{ *:[i1] } i1:{ *:[i1] }:$CRB, -1:{ *:[i1] }), i1:{ *:[i1] }:$CRA) => (CRANDC:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CRANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4854,
GIR_Done,
// Label 163: @1525
GIM_Try, /*On fail goto*//*Label 164*/ 1568, // Rule ID 179 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (and:{ *:[i1] } i1:{ *:[i1] }:$CRA, (xor:{ *:[i1] } i1:{ *:[i1] }:$CRB, -1:{ *:[i1] })) => (CRANDC:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CRANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 179,
GIR_Done,
// Label 164: @1568
GIM_Try, /*On fail goto*//*Label 165*/ 1577, // Rule ID 172 //
// (and:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB) => (CRAND:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::CRAND,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 172,
GIR_Done,
// Label 165: @1577
GIM_Reject,
// Label 162: @1578
GIM_Reject,
// Label 158: @1579
GIM_Try, /*On fail goto*//*Label 166*/ 1689,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
GIM_Try, /*On fail goto*//*Label 167*/ 1636, // Rule ID 4848 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$rB, -1:{ *:[i32] }), i32:{ *:[i32] }:$rS) => (ANDC:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4848,
GIR_Done,
// Label 167: @1636
GIM_Try, /*On fail goto*//*Label 168*/ 1679, // Rule ID 120 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (and:{ *:[i32] } i32:{ *:[i32] }:$rS, (xor:{ *:[i32] } i32:{ *:[i32] }:$rB, -1:{ *:[i32] })) => (ANDC:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 120,
GIR_Done,
// Label 168: @1679
GIM_Try, /*On fail goto*//*Label 169*/ 1688, // Rule ID 119 //
// (and:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB) => (AND:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::AND,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 119,
GIR_Done,
// Label 169: @1688
GIM_Reject,
// Label 166: @1689
GIM_Reject,
// Label 159: @1690
GIM_Try, /*On fail goto*//*Label 170*/ 1800,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
GIM_Try, /*On fail goto*//*Label 171*/ 1747, // Rule ID 4861 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$rB, -1:{ *:[i64] }), i64:{ *:[i64] }:$rS) => (ANDC8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ANDC8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4861,
GIR_Done,
// Label 171: @1747
GIM_Try, /*On fail goto*//*Label 172*/ 1790, // Rule ID 639 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (and:{ *:[i64] } i64:{ *:[i64] }:$rS, (xor:{ *:[i64] } i64:{ *:[i64] }:$rB, -1:{ *:[i64] })) => (ANDC8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ANDC8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 639,
GIR_Done,
// Label 172: @1790
GIM_Try, /*On fail goto*//*Label 173*/ 1799, // Rule ID 638 //
// (and:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB) => (AND8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::AND8,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 638,
GIR_Done,
// Label 173: @1799
GIM_Reject,
// Label 170: @1800
GIM_Reject,
// Label 160: @1801
GIM_Try, /*On fail goto*//*Label 174*/ 2070,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_Try, /*On fail goto*//*Label 175*/ 1868, // Rule ID 4869 //
GIM_CheckFeatures, GIFBS_HasVSX,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VSRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (and:{ *:[v4i32] } (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XB, immAllOnesV:{ *:[v4i32] }), v4i32:{ *:[v4i32] }:$XA) => (XXLANDC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::XXLANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // XT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // XA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // XB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4869,
GIR_Done,
// Label 175: @1868
GIM_Try, /*On fail goto*//*Label 176*/ 1925, // Rule ID 921 //
GIM_CheckFeatures, GIFBS_HasVSX,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VSRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (and:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XB, immAllOnesV:{ *:[v4i32] })) => (XXLANDC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::XXLANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // XT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // XA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // XB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 921,
GIR_Done,
// Label 176: @1925
GIM_Try, /*On fail goto*//*Label 177*/ 1940, // Rule ID 920 //
GIM_CheckFeatures, GIFBS_HasVSX,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VSRCRegClassID,
// (and:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB) => (XXLAND:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::XXLAND,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 920,
GIR_Done,
// Label 177: @1940
GIM_Try, /*On fail goto*//*Label 178*/ 1997, // Rule ID 4857 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (and:{ *:[v4i32] } (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vB, immAllOnesV:{ *:[v4i32] }), v4i32:{ *:[v4i32] }:$vA) => (VANDC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::VANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // vD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // vA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // vB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4857,
GIR_Done,
// Label 178: @1997
GIM_Try, /*On fail goto*//*Label 179*/ 2054, // Rule ID 308 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (and:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vB, immAllOnesV:{ *:[v4i32] })) => (VANDC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::VANDC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // vD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // vA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // vB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 308,
GIR_Done,
// Label 179: @2054
GIM_Try, /*On fail goto*//*Label 180*/ 2069, // Rule ID 307 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (and:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VAND:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VAND,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 307,
GIR_Done,
// Label 180: @2069
GIM_Reject,
// Label 174: @2070
GIM_Reject,
// Label 161: @2071
GIM_Reject,
// Label 8: @2072
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 6, /*)*//*default:*//*Label 185*/ 2687,
/*GILLT_s1*//*Label 181*/ 2084,
/*GILLT_s32*//*Label 182*/ 2195,
/*GILLT_s64*//*Label 183*/ 2306, 0, 0,
/*GILLT_v4s32*//*Label 184*/ 2417,
// Label 181: @2084
GIM_Try, /*On fail goto*//*Label 186*/ 2194,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_Try, /*On fail goto*//*Label 187*/ 2141, // Rule ID 4855 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (or:{ *:[i1] } (xor:{ *:[i1] } i1:{ *:[i1] }:$CRB, -1:{ *:[i1] }), i1:{ *:[i1] }:$CRA) => (CRORC:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CRORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4855,
GIR_Done,
// Label 187: @2141
GIM_Try, /*On fail goto*//*Label 188*/ 2184, // Rule ID 180 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (or:{ *:[i1] } i1:{ *:[i1] }:$CRA, (xor:{ *:[i1] } i1:{ *:[i1] }:$CRB, -1:{ *:[i1] })) => (CRORC:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CRORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 180,
GIR_Done,
// Label 188: @2184
GIM_Try, /*On fail goto*//*Label 189*/ 2193, // Rule ID 174 //
// (or:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB) => (CROR:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::CROR,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 174,
GIR_Done,
// Label 189: @2193
GIM_Reject,
// Label 186: @2194
GIM_Reject,
// Label 182: @2195
GIM_Try, /*On fail goto*//*Label 190*/ 2305,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
GIM_Try, /*On fail goto*//*Label 191*/ 2252, // Rule ID 4849 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (or:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$rB, -1:{ *:[i32] }), i32:{ *:[i32] }:$rS) => (ORC:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4849,
GIR_Done,
// Label 191: @2252
GIM_Try, /*On fail goto*//*Label 192*/ 2295, // Rule ID 123 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (or:{ *:[i32] } i32:{ *:[i32] }:$rS, (xor:{ *:[i32] } i32:{ *:[i32] }:$rB, -1:{ *:[i32] })) => (ORC:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 123,
GIR_Done,
// Label 192: @2295
GIM_Try, /*On fail goto*//*Label 193*/ 2304, // Rule ID 121 //
// (or:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB) => (OR:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::OR,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 121,
GIR_Done,
// Label 193: @2304
GIM_Reject,
// Label 190: @2305
GIM_Reject,
// Label 183: @2306
GIM_Try, /*On fail goto*//*Label 194*/ 2416,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
GIM_Try, /*On fail goto*//*Label 195*/ 2363, // Rule ID 4862 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (or:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$rB, -1:{ *:[i64] }), i64:{ *:[i64] }:$rS) => (ORC8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ORC8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4862,
GIR_Done,
// Label 195: @2363
GIM_Try, /*On fail goto*//*Label 196*/ 2406, // Rule ID 642 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (or:{ *:[i64] } i64:{ *:[i64] }:$rS, (xor:{ *:[i64] } i64:{ *:[i64] }:$rB, -1:{ *:[i64] })) => (ORC8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::ORC8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 642,
GIR_Done,
// Label 196: @2406
GIM_Try, /*On fail goto*//*Label 197*/ 2415, // Rule ID 640 //
// (or:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB) => (OR8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::OR8,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 640,
GIR_Done,
// Label 197: @2415
GIM_Reject,
// Label 194: @2416
GIM_Reject,
// Label 184: @2417
GIM_Try, /*On fail goto*//*Label 198*/ 2686,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_Try, /*On fail goto*//*Label 199*/ 2484, // Rule ID 4872 //
GIM_CheckFeatures, GIFBS_HasP8Vector_HasVSX,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VSRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (or:{ *:[v4i32] } (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XB, immAllOnesV:{ *:[v4i32] }), v4i32:{ *:[v4i32] }:$XA) => (XXLORC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::XXLORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // XT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // XA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // XB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4872,
GIR_Done,
// Label 199: @2484
GIM_Try, /*On fail goto*//*Label 200*/ 2541, // Rule ID 934 //
GIM_CheckFeatures, GIFBS_HasP8Vector_HasVSX,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VSRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (or:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XB, immAllOnesV:{ *:[v4i32] })) => (XXLORC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::XXLORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // XT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // XA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // XB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 934,
GIR_Done,
// Label 200: @2541
GIM_Try, /*On fail goto*//*Label 201*/ 2556, // Rule ID 923 //
GIM_CheckFeatures, GIFBS_HasVSX,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VSRCRegClassID,
// (or:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB) => (XXLOR:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::XXLOR,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 923,
GIR_Done,
// Label 201: @2556
GIM_Try, /*On fail goto*//*Label 202*/ 2613, // Rule ID 4860 //
GIM_CheckFeatures, GIFBS_HasP8Altivec,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (or:{ *:[v4i32] } (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vB, immAllOnesV:{ *:[v4i32] }), v4i32:{ *:[v4i32] }:$vA) => (VORC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::VORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // vD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // vA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // vB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4860,
GIR_Done,
// Label 202: @2613
GIM_Try, /*On fail goto*//*Label 203*/ 2670, // Rule ID 485 //
GIM_CheckFeatures, GIFBS_HasP8Altivec,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (or:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, (xor:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vB, immAllOnesV:{ *:[v4i32] })) => (VORC:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::VORC,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // vD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // vA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // vB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 485,
GIR_Done,
// Label 203: @2670
GIM_Try, /*On fail goto*//*Label 204*/ 2685, // Rule ID 382 //
GIM_CheckFeatures, GIFBS_HasAltivec,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VRRCRegClassID,
// (or:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB) => (VOR:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vA, v4i32:{ *:[v4i32] }:$vB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::VOR,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 382,
GIR_Done,
// Label 204: @2685
GIM_Reject,
// Label 198: @2686
GIM_Reject,
// Label 185: @2687
GIM_Reject,
// Label 9: @2688
GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 6, /*)*//*default:*//*Label 209*/ 4990,
/*GILLT_s1*//*Label 205*/ 2700,
/*GILLT_s32*//*Label 206*/ 3898,
/*GILLT_s64*//*Label 207*/ 4138, 0, 0,
/*GILLT_v4s32*//*Label 208*/ 4378,
// Label 205: @2700
GIM_Try, /*On fail goto*//*Label 210*/ 3897,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1,
GIM_Try, /*On fail goto*//*Label 211*/ 2786, // Rule ID 3955 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_UGE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2, SETUGE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUS:{ *:[i32] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2), sub_lt:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUS,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_lt,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 3955,
GIR_Done,
// Label 211: @2786
GIM_Try, /*On fail goto*//*Label 212*/ 2862, // Rule ID 3987 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_ULE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2, SETULE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUS:{ *:[i32] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2), sub_gt:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUS,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_gt,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 3987,
GIR_Done,
// Label 212: @2862
GIM_Try, /*On fail goto*//*Label 213*/ 2938, // Rule ID 4019 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_UNE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2, SETUNE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUS:{ *:[i32] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2), sub_eq:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUS,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_eq,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4019,
GIR_Done,
// Label 213: @2938
GIM_Try, /*On fail goto*//*Label 214*/ 3014, // Rule ID 4051 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2, SETO:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUS:{ *:[i32] } f32:{ *:[f32] }:$s1, f32:{ *:[f32] }:$s2), sub_un:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUS,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_un,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4051,
GIR_Done,
// Label 214: @3014
GIM_Try, /*On fail goto*//*Label 215*/ 3090, // Rule ID 4067 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_UGE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2, SETUGE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUD:{ *:[i32] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2), sub_lt:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUD,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_lt,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4067,
GIR_Done,
// Label 215: @3090
GIM_Try, /*On fail goto*//*Label 216*/ 3166, // Rule ID 4099 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_ULE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2, SETULE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUD:{ *:[i32] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2), sub_gt:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUD,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_gt,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4099,
GIR_Done,
// Label 216: @3166
GIM_Try, /*On fail goto*//*Label 217*/ 3242, // Rule ID 4131 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_UNE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2, SETUNE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUD:{ *:[i32] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2), sub_eq:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUD,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_eq,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4131,
GIR_Done,
// Label 217: @3242
GIM_Try, /*On fail goto*//*Label 218*/ 3318, // Rule ID 4163 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2, SETO:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (FCMPUD:{ *:[i32] } f64:{ *:[f64] }:$s1, f64:{ *:[f64] }:$s2), sub_un:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::FCMPUD,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_un,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4163,
GIR_Done,
// Label 218: @3318
GIM_Try, /*On fail goto*//*Label 219*/ 3394, // Rule ID 4193 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s128,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_UGE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2, SETUGE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (XSCMPUQP:{ *:[i32] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2), sub_lt:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::XSCMPUQP,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_lt,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4193,
GIR_Done,
// Label 219: @3394
GIM_Try, /*On fail goto*//*Label 220*/ 3470, // Rule ID 4225 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s128,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_ULE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2, SETULE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (XSCMPUQP:{ *:[i32] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2), sub_gt:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::XSCMPUQP,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_gt,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4225,
GIR_Done,
// Label 220: @3470
GIM_Try, /*On fail goto*//*Label 221*/ 3546, // Rule ID 4257 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s128,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_UNE,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2, SETUNE:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (XSCMPUQP:{ *:[i32] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2), sub_eq:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::XSCMPUQP,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_eq,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4257,
GIR_Done,
// Label 221: @3546
GIM_Try, /*On fail goto*//*Label 222*/ 3622, // Rule ID 4289 //
GIM_CheckFeatures, GIFBS_HasFPU,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FCMP,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s128,
GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s128,
// MIs[1] Operand 1
GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::FCMP_ORD,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (setcc:{ *:[i1] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2, SETO:{ *:[Other] }), -1:{ *:[i1] }) => (EXTRACT_SUBREG:{ *:[i1] } (XSCMPUQP:{ *:[i32] } f128:{ *:[f128] }:$s1, f128:{ *:[f128] }:$s2), sub_un:{ *:[i32] })
GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/PPC::XSCMPUQP,
GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // s1
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // s2
GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
GIR_AddTempSubRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0, PPC::sub_un,
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, PPC::CRBITRCRegClassID,
GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, PPC::CRRCRegClassID,
// GIR_Coverage, 4289,
GIR_Done,
// Label 222: @3622
GIM_Try, /*On fail goto*//*Label 223*/ 3669, // Rule ID 173 //
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (and:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB), -1:{ *:[i1] }) => (CRNAND:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CRNAND,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 173,
GIR_Done,
// Label 223: @3669
GIM_Try, /*On fail goto*//*Label 224*/ 3716, // Rule ID 176 //
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (or:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB), -1:{ *:[i1] }) => (CRNOR:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CRNOR,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 176,
GIR_Done,
// Label 224: @3716
GIM_Try, /*On fail goto*//*Label 225*/ 3763, // Rule ID 4852 //
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (xor:{ *:[i1] } i1:{ *:[i1] }:$CRA, -1:{ *:[i1] }), i1:{ *:[i1] }:$CRB) => (CREQV:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CREQV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4852,
GIR_Done,
// Label 225: @3763
GIM_Try, /*On fail goto*//*Label 226*/ 3810, // Rule ID 177 //
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } (xor:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB), -1:{ *:[i1] }) => (CREQV:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CREQV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 177,
GIR_Done,
// Label 226: @3810
GIM_Try, /*On fail goto*//*Label 227*/ 3857, // Rule ID 4853 //
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i1] } i1:{ *:[i1] }:$CRB, (xor:{ *:[i1] } i1:{ *:[i1] }:$CRA, -1:{ *:[i1] })) => (CREQV:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CREQV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // CRA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // CRB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4853,
GIR_Done,
// Label 227: @3857
GIM_Try, /*On fail goto*//*Label 228*/ 3883, // Rule ID 178 //
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
// (xor:{ *:[i1] } i1:{ *:[i1] }:$CRA, -1:{ *:[i1] }) => (CRNOT:{ *:[i1] } i1:{ *:[i1] }:$CRA)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::CRNOT,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // CRD
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // CRA
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 178,
GIR_Done,
// Label 228: @3883
GIM_Try, /*On fail goto*//*Label 229*/ 3896, // Rule ID 175 //
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::CRBITRCRegClassID,
// (xor:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB) => (CRXOR:{ *:[i1] } i1:{ *:[i1] }:$CRA, i1:{ *:[i1] }:$CRB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::CRXOR,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 175,
GIR_Done,
// Label 229: @3896
GIM_Reject,
// Label 210: @3897
GIM_Reject,
// Label 206: @3898
GIM_Try, /*On fail goto*//*Label 230*/ 4137,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::GPRCRegClassID,
GIM_Try, /*On fail goto*//*Label 231*/ 3955, // Rule ID 118 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB), -1:{ *:[i32] }) => (NAND:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::NAND,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 118,
GIR_Done,
// Label 231: @3955
GIM_Try, /*On fail goto*//*Label 232*/ 3998, // Rule ID 122 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB), -1:{ *:[i32] }) => (NOR:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::NOR,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 122,
GIR_Done,
// Label 232: @3998
GIM_Try, /*On fail goto*//*Label 233*/ 4041, // Rule ID 4850 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$rS, -1:{ *:[i32] }), i32:{ *:[i32] }:$rB) => (EQV:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::EQV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4850,
GIR_Done,
// Label 233: @4041
GIM_Try, /*On fail goto*//*Label 234*/ 4084, // Rule ID 124 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB), -1:{ *:[i32] }) => (EQV:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::EQV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 124,
GIR_Done,
// Label 234: @4084
GIM_Try, /*On fail goto*//*Label 235*/ 4127, // Rule ID 4851 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i32] } i32:{ *:[i32] }:$rB, (xor:{ *:[i32] } i32:{ *:[i32] }:$rS, -1:{ *:[i32] })) => (EQV:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::EQV,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4851,
GIR_Done,
// Label 235: @4127
GIM_Try, /*On fail goto*//*Label 236*/ 4136, // Rule ID 125 //
// (xor:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB) => (XOR:{ *:[i32] } i32:{ *:[i32] }:$rS, i32:{ *:[i32] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::XOR,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 125,
GIR_Done,
// Label 236: @4136
GIM_Reject,
// Label 230: @4137
GIM_Reject,
// Label 207: @4138
GIM_Try, /*On fail goto*//*Label 237*/ 4377,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::G8RCRegClassID,
GIM_Try, /*On fail goto*//*Label 238*/ 4195, // Rule ID 637 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB), -1:{ *:[i64] }) => (NAND8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::NAND8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 637,
GIR_Done,
// Label 238: @4195
GIM_Try, /*On fail goto*//*Label 239*/ 4238, // Rule ID 641 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB), -1:{ *:[i64] }) => (NOR8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::NOR8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 641,
GIR_Done,
// Label 239: @4238
GIM_Try, /*On fail goto*//*Label 240*/ 4281, // Rule ID 4863 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$rS, -1:{ *:[i64] }), i64:{ *:[i64] }:$rB) => (EQV8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::EQV8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4863,
GIR_Done,
// Label 240: @4281
GIM_Try, /*On fail goto*//*Label 241*/ 4324, // Rule ID 643 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB), -1:{ *:[i64] }) => (EQV8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::EQV8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 643,
GIR_Done,
// Label 241: @4324
GIM_Try, /*On fail goto*//*Label 242*/ 4367, // Rule ID 4864 //
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
GIM_CheckIsSafeToFold, /*InsnID*/1,
// (xor:{ *:[i64] } i64:{ *:[i64] }:$rB, (xor:{ *:[i64] } i64:{ *:[i64] }:$rS, -1:{ *:[i64] })) => (EQV8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::EQV8,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // rA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rS
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // rB
GIR_EraseFromParent, /*InsnID*/0,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 4864,
GIR_Done,
// Label 242: @4367
GIM_Try, /*On fail goto*//*Label 243*/ 4376, // Rule ID 644 //
// (xor:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB) => (XOR8:{ *:[i64] } i64:{ *:[i64] }:$rS, i64:{ *:[i64] }:$rB)
GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/PPC::XOR8,
GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
// GIR_Coverage, 644,
GIR_Done,
// Label 243: @4376
GIM_Reject,
// Label 237: @4377
GIM_Reject,
// Label 208: @4378
GIM_Try, /*On fail goto*//*Label 244*/ 4989,
GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_Try, /*On fail goto*//*Label 245*/ 4445, // Rule ID 932 //
GIM_CheckFeatures, GIFBS_HasP8Vector_HasVSX,
GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/PPC::VSRCRegClassID,
GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
GIM_CheckOpcodeIsEither, /*MI*/2, TargetOpcode::G_BUILD_VECTOR, TargetOpcode::G_BUILD_VECTOR_TRUNC,
GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
GIM_CheckIsSafeToFold, /*InsnID*/1,
GIM_CheckIsSafeToFold, /*InsnID*/2,
// (xor:{ *:[v4i32] } (and:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB), immAllOnesV:{ *:[v4i32] }) => (XXLNAND:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$XA, v4i32:{ *:[v4i32] }:$XB)
GIR_BuildMI, /*InsnID*/0, /*Opcode*/PPC::XXLNAND,
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // XT
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // XA
GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // XB