| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| |* *| |
| |* Target Register Enum Values *| |
| |* *| |
| |* Automatically generated file, do not edit! *| |
| |* *| |
| \*===----------------------------------------------------------------------===*/ |
| |
| |
| #ifdef GET_REGINFO_ENUM |
| #undef GET_REGINFO_ENUM |
| |
| namespace llvm { |
| |
| class MCRegisterClass; |
| extern const MCRegisterClass ARMMCRegisterClasses[]; |
| |
| namespace ARM { |
| enum { |
| NoRegister, |
| APSR = 1, |
| APSR_NZCV = 2, |
| CPSR = 3, |
| FPCXTNS = 4, |
| FPCXTS = 5, |
| FPEXC = 6, |
| FPINST = 7, |
| FPSCR = 8, |
| FPSCR_NZCV = 9, |
| FPSCR_NZCVQC = 10, |
| FPSID = 11, |
| ITSTATE = 12, |
| LR = 13, |
| PC = 14, |
| RA_AUTH_CODE = 15, |
| SP = 16, |
| SPSR = 17, |
| VPR = 18, |
| ZR = 19, |
| D0 = 20, |
| D1 = 21, |
| D2 = 22, |
| D3 = 23, |
| D4 = 24, |
| D5 = 25, |
| D6 = 26, |
| D7 = 27, |
| D8 = 28, |
| D9 = 29, |
| D10 = 30, |
| D11 = 31, |
| D12 = 32, |
| D13 = 33, |
| D14 = 34, |
| D15 = 35, |
| D16 = 36, |
| D17 = 37, |
| D18 = 38, |
| D19 = 39, |
| D20 = 40, |
| D21 = 41, |
| D22 = 42, |
| D23 = 43, |
| D24 = 44, |
| D25 = 45, |
| D26 = 46, |
| D27 = 47, |
| D28 = 48, |
| D29 = 49, |
| D30 = 50, |
| D31 = 51, |
| FPINST2 = 52, |
| MVFR0 = 53, |
| MVFR1 = 54, |
| MVFR2 = 55, |
| P0 = 56, |
| Q0 = 57, |
| Q1 = 58, |
| Q2 = 59, |
| Q3 = 60, |
| Q4 = 61, |
| Q5 = 62, |
| Q6 = 63, |
| Q7 = 64, |
| Q8 = 65, |
| Q9 = 66, |
| Q10 = 67, |
| Q11 = 68, |
| Q12 = 69, |
| Q13 = 70, |
| Q14 = 71, |
| Q15 = 72, |
| R0 = 73, |
| R1 = 74, |
| R2 = 75, |
| R3 = 76, |
| R4 = 77, |
| R5 = 78, |
| R6 = 79, |
| R7 = 80, |
| R8 = 81, |
| R9 = 82, |
| R10 = 83, |
| R11 = 84, |
| R12 = 85, |
| S0 = 86, |
| S1 = 87, |
| S2 = 88, |
| S3 = 89, |
| S4 = 90, |
| S5 = 91, |
| S6 = 92, |
| S7 = 93, |
| S8 = 94, |
| S9 = 95, |
| S10 = 96, |
| S11 = 97, |
| S12 = 98, |
| S13 = 99, |
| S14 = 100, |
| S15 = 101, |
| S16 = 102, |
| S17 = 103, |
| S18 = 104, |
| S19 = 105, |
| S20 = 106, |
| S21 = 107, |
| S22 = 108, |
| S23 = 109, |
| S24 = 110, |
| S25 = 111, |
| S26 = 112, |
| S27 = 113, |
| S28 = 114, |
| S29 = 115, |
| S30 = 116, |
| S31 = 117, |
| D0_D2 = 118, |
| D1_D3 = 119, |
| D2_D4 = 120, |
| D3_D5 = 121, |
| D4_D6 = 122, |
| D5_D7 = 123, |
| D6_D8 = 124, |
| D7_D9 = 125, |
| D8_D10 = 126, |
| D9_D11 = 127, |
| D10_D12 = 128, |
| D11_D13 = 129, |
| D12_D14 = 130, |
| D13_D15 = 131, |
| D14_D16 = 132, |
| D15_D17 = 133, |
| D16_D18 = 134, |
| D17_D19 = 135, |
| D18_D20 = 136, |
| D19_D21 = 137, |
| D20_D22 = 138, |
| D21_D23 = 139, |
| D22_D24 = 140, |
| D23_D25 = 141, |
| D24_D26 = 142, |
| D25_D27 = 143, |
| D26_D28 = 144, |
| D27_D29 = 145, |
| D28_D30 = 146, |
| D29_D31 = 147, |
| Q0_Q1 = 148, |
| Q1_Q2 = 149, |
| Q2_Q3 = 150, |
| Q3_Q4 = 151, |
| Q4_Q5 = 152, |
| Q5_Q6 = 153, |
| Q6_Q7 = 154, |
| Q7_Q8 = 155, |
| Q8_Q9 = 156, |
| Q9_Q10 = 157, |
| Q10_Q11 = 158, |
| Q11_Q12 = 159, |
| Q12_Q13 = 160, |
| Q13_Q14 = 161, |
| Q14_Q15 = 162, |
| Q0_Q1_Q2_Q3 = 163, |
| Q1_Q2_Q3_Q4 = 164, |
| Q2_Q3_Q4_Q5 = 165, |
| Q3_Q4_Q5_Q6 = 166, |
| Q4_Q5_Q6_Q7 = 167, |
| Q5_Q6_Q7_Q8 = 168, |
| Q6_Q7_Q8_Q9 = 169, |
| Q7_Q8_Q9_Q10 = 170, |
| Q8_Q9_Q10_Q11 = 171, |
| Q9_Q10_Q11_Q12 = 172, |
| Q10_Q11_Q12_Q13 = 173, |
| Q11_Q12_Q13_Q14 = 174, |
| Q12_Q13_Q14_Q15 = 175, |
| R0_R1 = 176, |
| R2_R3 = 177, |
| R4_R5 = 178, |
| R6_R7 = 179, |
| R8_R9 = 180, |
| R10_R11 = 181, |
| R12_SP = 182, |
| D0_D1_D2 = 183, |
| D1_D2_D3 = 184, |
| D2_D3_D4 = 185, |
| D3_D4_D5 = 186, |
| D4_D5_D6 = 187, |
| D5_D6_D7 = 188, |
| D6_D7_D8 = 189, |
| D7_D8_D9 = 190, |
| D8_D9_D10 = 191, |
| D9_D10_D11 = 192, |
| D10_D11_D12 = 193, |
| D11_D12_D13 = 194, |
| D12_D13_D14 = 195, |
| D13_D14_D15 = 196, |
| D14_D15_D16 = 197, |
| D15_D16_D17 = 198, |
| D16_D17_D18 = 199, |
| D17_D18_D19 = 200, |
| D18_D19_D20 = 201, |
| D19_D20_D21 = 202, |
| D20_D21_D22 = 203, |
| D21_D22_D23 = 204, |
| D22_D23_D24 = 205, |
| D23_D24_D25 = 206, |
| D24_D25_D26 = 207, |
| D25_D26_D27 = 208, |
| D26_D27_D28 = 209, |
| D27_D28_D29 = 210, |
| D28_D29_D30 = 211, |
| D29_D30_D31 = 212, |
| D0_D2_D4 = 213, |
| D1_D3_D5 = 214, |
| D2_D4_D6 = 215, |
| D3_D5_D7 = 216, |
| D4_D6_D8 = 217, |
| D5_D7_D9 = 218, |
| D6_D8_D10 = 219, |
| D7_D9_D11 = 220, |
| D8_D10_D12 = 221, |
| D9_D11_D13 = 222, |
| D10_D12_D14 = 223, |
| D11_D13_D15 = 224, |
| D12_D14_D16 = 225, |
| D13_D15_D17 = 226, |
| D14_D16_D18 = 227, |
| D15_D17_D19 = 228, |
| D16_D18_D20 = 229, |
| D17_D19_D21 = 230, |
| D18_D20_D22 = 231, |
| D19_D21_D23 = 232, |
| D20_D22_D24 = 233, |
| D21_D23_D25 = 234, |
| D22_D24_D26 = 235, |
| D23_D25_D27 = 236, |
| D24_D26_D28 = 237, |
| D25_D27_D29 = 238, |
| D26_D28_D30 = 239, |
| D27_D29_D31 = 240, |
| D0_D2_D4_D6 = 241, |
| D1_D3_D5_D7 = 242, |
| D2_D4_D6_D8 = 243, |
| D3_D5_D7_D9 = 244, |
| D4_D6_D8_D10 = 245, |
| D5_D7_D9_D11 = 246, |
| D6_D8_D10_D12 = 247, |
| D7_D9_D11_D13 = 248, |
| D8_D10_D12_D14 = 249, |
| D9_D11_D13_D15 = 250, |
| D10_D12_D14_D16 = 251, |
| D11_D13_D15_D17 = 252, |
| D12_D14_D16_D18 = 253, |
| D13_D15_D17_D19 = 254, |
| D14_D16_D18_D20 = 255, |
| D15_D17_D19_D21 = 256, |
| D16_D18_D20_D22 = 257, |
| D17_D19_D21_D23 = 258, |
| D18_D20_D22_D24 = 259, |
| D19_D21_D23_D25 = 260, |
| D20_D22_D24_D26 = 261, |
| D21_D23_D25_D27 = 262, |
| D22_D24_D26_D28 = 263, |
| D23_D25_D27_D29 = 264, |
| D24_D26_D28_D30 = 265, |
| D25_D27_D29_D31 = 266, |
| D1_D2 = 267, |
| D3_D4 = 268, |
| D5_D6 = 269, |
| D7_D8 = 270, |
| D9_D10 = 271, |
| D11_D12 = 272, |
| D13_D14 = 273, |
| D15_D16 = 274, |
| D17_D18 = 275, |
| D19_D20 = 276, |
| D21_D22 = 277, |
| D23_D24 = 278, |
| D25_D26 = 279, |
| D27_D28 = 280, |
| D29_D30 = 281, |
| D1_D2_D3_D4 = 282, |
| D3_D4_D5_D6 = 283, |
| D5_D6_D7_D8 = 284, |
| D7_D8_D9_D10 = 285, |
| D9_D10_D11_D12 = 286, |
| D11_D12_D13_D14 = 287, |
| D13_D14_D15_D16 = 288, |
| D15_D16_D17_D18 = 289, |
| D17_D18_D19_D20 = 290, |
| D19_D20_D21_D22 = 291, |
| D21_D22_D23_D24 = 292, |
| D23_D24_D25_D26 = 293, |
| D25_D26_D27_D28 = 294, |
| D27_D28_D29_D30 = 295, |
| NUM_TARGET_REGS // 296 |
| }; |
| } // end namespace ARM |
| |
| // Register classes |
| |
| namespace ARM { |
| enum { |
| HPRRegClassID = 0, |
| FPWithVPRRegClassID = 1, |
| SPRRegClassID = 2, |
| FPWithVPR_with_ssub_0RegClassID = 3, |
| GPRRegClassID = 4, |
| GPRwithAPSRRegClassID = 5, |
| GPRwithZRRegClassID = 6, |
| SPR_8RegClassID = 7, |
| GPRnopcRegClassID = 8, |
| GPRnospRegClassID = 9, |
| GPRwithAPSR_NZCVnospRegClassID = 10, |
| GPRwithAPSRnospRegClassID = 11, |
| GPRwithZRnospRegClassID = 12, |
| GPRnoipRegClassID = 13, |
| rGPRRegClassID = 14, |
| GPRnoip_and_GPRnopcRegClassID = 15, |
| GPRnoip_and_GPRnospRegClassID = 16, |
| GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID = 17, |
| tGPRwithpcRegClassID = 18, |
| FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID = 19, |
| hGPRRegClassID = 20, |
| tGPRRegClassID = 21, |
| tGPREvenRegClassID = 22, |
| GPRnopc_and_hGPRRegClassID = 23, |
| GPRnosp_and_hGPRRegClassID = 24, |
| GPRnoip_and_hGPRRegClassID = 25, |
| GPRnoip_and_tGPREvenRegClassID = 26, |
| GPRnosp_and_GPRnopc_and_hGPRRegClassID = 27, |
| tGPROddRegClassID = 28, |
| GPRnopc_and_GPRnoip_and_hGPRRegClassID = 29, |
| GPRnosp_and_GPRnoip_and_hGPRRegClassID = 30, |
| tcGPRRegClassID = 31, |
| GPRnoip_and_tcGPRRegClassID = 32, |
| GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID = 33, |
| hGPR_and_tGPREvenRegClassID = 34, |
| tGPR_and_tGPREvenRegClassID = 35, |
| tGPR_and_tGPROddRegClassID = 36, |
| tGPREven_and_tcGPRRegClassID = 37, |
| hGPR_and_GPRnoip_and_tGPREvenRegClassID = 38, |
| hGPR_and_tGPROddRegClassID = 39, |
| tGPREven_and_GPRnoip_and_tcGPRRegClassID = 40, |
| tGPROdd_and_tcGPRRegClassID = 41, |
| CCRRegClassID = 42, |
| FPCXTRegsRegClassID = 43, |
| GPRlrRegClassID = 44, |
| GPRspRegClassID = 45, |
| VCCRRegClassID = 46, |
| cl_FPSCR_NZCVRegClassID = 47, |
| hGPR_and_tGPRwithpcRegClassID = 48, |
| hGPR_and_tcGPRRegClassID = 49, |
| DPRRegClassID = 50, |
| DPR_VFP2RegClassID = 51, |
| DPR_8RegClassID = 52, |
| GPRPairRegClassID = 53, |
| GPRPairnospRegClassID = 54, |
| GPRPair_with_gsub_0_in_tGPRRegClassID = 55, |
| GPRPair_with_gsub_0_in_hGPRRegClassID = 56, |
| GPRPair_with_gsub_0_in_tcGPRRegClassID = 57, |
| GPRPair_with_gsub_1_in_tcGPRRegClassID = 58, |
| GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID = 59, |
| GPRPair_with_gsub_1_in_GPRspRegClassID = 60, |
| DPairSpcRegClassID = 61, |
| DPairSpc_with_ssub_0RegClassID = 62, |
| DPairSpc_with_ssub_4RegClassID = 63, |
| DPairSpc_with_dsub_0_in_DPR_8RegClassID = 64, |
| DPairSpc_with_dsub_2_in_DPR_8RegClassID = 65, |
| DPairRegClassID = 66, |
| DPair_with_ssub_0RegClassID = 67, |
| QPRRegClassID = 68, |
| DPair_with_ssub_2RegClassID = 69, |
| DPair_with_dsub_0_in_DPR_8RegClassID = 70, |
| MQPRRegClassID = 71, |
| QPR_VFP2RegClassID = 72, |
| DPair_with_dsub_1_in_DPR_8RegClassID = 73, |
| QPR_8RegClassID = 74, |
| DTripleRegClassID = 75, |
| DTripleSpcRegClassID = 76, |
| DTripleSpc_with_ssub_0RegClassID = 77, |
| DTriple_with_ssub_0RegClassID = 78, |
| DTriple_with_qsub_0_in_QPRRegClassID = 79, |
| DTriple_with_ssub_2RegClassID = 80, |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 81, |
| DTripleSpc_with_ssub_4RegClassID = 82, |
| DTriple_with_ssub_4RegClassID = 83, |
| DTripleSpc_with_ssub_8RegClassID = 84, |
| DTripleSpc_with_dsub_0_in_DPR_8RegClassID = 85, |
| DTriple_with_dsub_0_in_DPR_8RegClassID = 86, |
| DTriple_with_qsub_0_in_MQPRRegClassID = 87, |
| DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 88, |
| DTriple_with_dsub_1_in_DPR_8RegClassID = 89, |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 90, |
| DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID = 91, |
| DTripleSpc_with_dsub_2_in_DPR_8RegClassID = 92, |
| DTriple_with_dsub_2_in_DPR_8RegClassID = 93, |
| DTripleSpc_with_dsub_4_in_DPR_8RegClassID = 94, |
| DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 95, |
| DTriple_with_qsub_0_in_QPR_8RegClassID = 96, |
| DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClassID = 97, |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID = 98, |
| DQuadSpcRegClassID = 99, |
| DQuadSpc_with_ssub_0RegClassID = 100, |
| DQuadSpc_with_ssub_4RegClassID = 101, |
| DQuadSpc_with_ssub_8RegClassID = 102, |
| DQuadSpc_with_dsub_0_in_DPR_8RegClassID = 103, |
| DQuadSpc_with_dsub_2_in_DPR_8RegClassID = 104, |
| DQuadSpc_with_dsub_4_in_DPR_8RegClassID = 105, |
| DQuadRegClassID = 106, |
| DQuad_with_ssub_0RegClassID = 107, |
| DQuad_with_ssub_2RegClassID = 108, |
| QQPRRegClassID = 109, |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 110, |
| DQuad_with_ssub_4RegClassID = 111, |
| DQuad_with_ssub_6RegClassID = 112, |
| DQuad_with_dsub_0_in_DPR_8RegClassID = 113, |
| DQuad_with_qsub_0_in_MQPRRegClassID = 114, |
| DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID = 115, |
| DQuad_with_dsub_1_in_DPR_8RegClassID = 116, |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 117, |
| MQQPRRegClassID = 118, |
| DQuad_with_dsub_2_in_DPR_8RegClassID = 119, |
| DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 120, |
| DQuad_with_dsub_3_in_DPR_8RegClassID = 121, |
| DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 122, |
| DQuad_with_qsub_0_in_QPR_8RegClassID = 123, |
| DQuad_with_qsub_1_in_QPR_8RegClassID = 124, |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID = 125, |
| DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID = 126, |
| QQQQPRRegClassID = 127, |
| QQQQPR_with_ssub_0RegClassID = 128, |
| QQQQPR_with_ssub_4RegClassID = 129, |
| QQQQPR_with_ssub_8RegClassID = 130, |
| MQQQQPRRegClassID = 131, |
| MQQQQPR_with_dsub_0_in_DPR_8RegClassID = 132, |
| MQQQQPR_with_dsub_2_in_DPR_8RegClassID = 133, |
| MQQQQPR_with_dsub_4_in_DPR_8RegClassID = 134, |
| MQQQQPR_with_dsub_6_in_DPR_8RegClassID = 135, |
| |
| }; |
| } // end namespace ARM |
| |
| |
| // Register alternate name indices |
| |
| namespace ARM { |
| enum { |
| NoRegAltName, // 0 |
| RegNamesRaw, // 1 |
| NUM_TARGET_REG_ALT_NAMES = 2 |
| }; |
| } // end namespace ARM |
| |
| |
| // Subregister indices |
| |
| namespace ARM { |
| enum : uint16_t { |
| NoSubRegister, |
| dsub_0, // 1 |
| dsub_1, // 2 |
| dsub_2, // 3 |
| dsub_3, // 4 |
| dsub_4, // 5 |
| dsub_5, // 6 |
| dsub_6, // 7 |
| dsub_7, // 8 |
| gsub_0, // 9 |
| gsub_1, // 10 |
| qqsub_0, // 11 |
| qqsub_1, // 12 |
| qsub_0, // 13 |
| qsub_1, // 14 |
| qsub_2, // 15 |
| qsub_3, // 16 |
| ssub_0, // 17 |
| ssub_1, // 18 |
| ssub_2, // 19 |
| ssub_3, // 20 |
| ssub_4, // 21 |
| ssub_5, // 22 |
| ssub_6, // 23 |
| ssub_7, // 24 |
| ssub_8, // 25 |
| ssub_9, // 26 |
| ssub_10, // 27 |
| ssub_11, // 28 |
| ssub_12, // 29 |
| ssub_13, // 30 |
| ssub_14, // 31 |
| ssub_15, // 32 |
| ssub_0_ssub_1_ssub_4_ssub_5, // 33 |
| ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, // 34 |
| ssub_2_ssub_3_ssub_6_ssub_7, // 35 |
| ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, // 36 |
| ssub_2_ssub_3_ssub_4_ssub_5, // 37 |
| ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, // 38 |
| ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, // 39 |
| ssub_2_ssub_3_ssub_6_ssub_7_dsub_5, // 40 |
| ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7, // 41 |
| ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, // 42 |
| ssub_4_ssub_5_ssub_8_ssub_9, // 43 |
| ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, // 44 |
| ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, // 45 |
| ssub_6_ssub_7_dsub_5, // 46 |
| ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, // 47 |
| ssub_6_ssub_7_dsub_5_dsub_7, // 48 |
| ssub_6_ssub_7_ssub_8_ssub_9, // 49 |
| ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, // 50 |
| ssub_8_ssub_9_ssub_12_ssub_13, // 51 |
| ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, // 52 |
| dsub_5_dsub_7, // 53 |
| dsub_5_ssub_12_ssub_13_dsub_7, // 54 |
| dsub_5_ssub_12_ssub_13, // 55 |
| ssub_4_ssub_5_ssub_6_ssub_7_qsub_2, // 56 |
| NUM_TARGET_SUBREGS |
| }; |
| } // end namespace ARM |
| |
| // Register pressure sets enum. |
| namespace ARM { |
| enum RegisterPressureSets { |
| FPCXTRegs = 0, |
| GPRlr = 1, |
| VCCR = 2, |
| cl_FPSCR_NZCV = 3, |
| hGPR_and_tGPRwithpc = 4, |
| GPRsp = 5, |
| tGPROdd = 6, |
| tcGPR = 7, |
| hGPR = 8, |
| tGPROdd_with_tcGPR = 9, |
| tGPR = 10, |
| tGPR_with_tcGPR = 11, |
| tGPREven = 12, |
| hGPR_with_tGPREven = 13, |
| hGPR_with_tGPROdd = 14, |
| hGPR_with_tcGPR = 15, |
| tGPR_with_tGPREven = 16, |
| GPR = 17, |
| GPRwithZR = 18, |
| GPRwithAPSR_with_GPRwithZR = 19, |
| DQuad_with_dsub_0_in_DPR_8 = 20, |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR = 21, |
| HPR = 22, |
| DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 23, |
| DPair_with_ssub_0 = 24, |
| DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 25, |
| DPairSpc_with_ssub_0 = 26, |
| DQuad_with_ssub_0 = 27, |
| DTripleSpc_with_ssub_0 = 28, |
| QQQQPR_with_ssub_0 = 29, |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 30, |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR = 31, |
| DTriple_with_qsub_0_in_QPR = 32, |
| DPR = 33, |
| }; |
| } // end namespace ARM |
| |
| } // end namespace llvm |
| |
| #endif // GET_REGINFO_ENUM |
| |
| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| |* *| |
| |* MC Register Information *| |
| |* *| |
| |* Automatically generated file, do not edit! *| |
| |* *| |
| \*===----------------------------------------------------------------------===*/ |
| |
| |
| #ifdef GET_REGINFO_MC_DESC |
| #undef GET_REGINFO_MC_DESC |
| |
| namespace llvm { |
| |
| extern const MCPhysReg ARMRegDiffLists[] = { |
| /* 0 */ 64902, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| /* 17 */ 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| /* 32 */ 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| /* 45 */ 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| /* 56 */ 64428, 1, 1, 1, 1, 1, 1, 1, 0, |
| /* 65 */ 64962, 1, 1, 1, 1, 1, 1, 1, 0, |
| /* 74 */ 65244, 1, 1, 1, 1, 1, 1, 1, 0, |
| /* 83 */ 44, 1, 1, 1, 1, 1, 1, 0, |
| /* 91 */ 46, 1, 1, 1, 1, 1, 0, |
| /* 98 */ 65188, 1, 1, 1, 1, 1, 0, |
| /* 105 */ 46, 1, 1, 1, 1, 0, |
| /* 111 */ 48, 1, 1, 1, 1, 0, |
| /* 117 */ 48, 1, 1, 1, 0, |
| /* 122 */ 64488, 1, 1, 1, 0, |
| /* 127 */ 65007, 1, 1, 1, 0, |
| /* 132 */ 65274, 1, 1, 1, 0, |
| /* 137 */ 65326, 1, 1, 1, 0, |
| /* 142 */ 13, 1, 1, 0, |
| /* 146 */ 48, 1, 1, 0, |
| /* 150 */ 65387, 1, 1, 0, |
| /* 154 */ 137, 65489, 48, 65489, 12, 121, 65416, 1, 1, 0, |
| /* 164 */ 136, 65490, 47, 65490, 12, 121, 65416, 1, 1, 0, |
| /* 174 */ 135, 65491, 46, 65491, 12, 121, 65416, 1, 1, 0, |
| /* 184 */ 134, 65492, 45, 65492, 12, 121, 65416, 1, 1, 0, |
| /* 194 */ 133, 65493, 44, 65493, 12, 121, 65416, 1, 1, 0, |
| /* 204 */ 132, 65494, 43, 65494, 12, 121, 65416, 1, 1, 0, |
| /* 214 */ 131, 65495, 42, 65495, 12, 121, 65416, 1, 1, 0, |
| /* 224 */ 130, 65496, 41, 65496, 12, 121, 65416, 1, 1, 0, |
| /* 234 */ 129, 65497, 40, 65497, 12, 121, 65416, 1, 1, 0, |
| /* 244 */ 128, 65498, 39, 65498, 12, 121, 65416, 1, 1, 0, |
| /* 254 */ 65489, 133, 65416, 1, 1, 0, |
| /* 260 */ 65490, 133, 65416, 1, 1, 0, |
| /* 266 */ 65491, 133, 65416, 1, 1, 0, |
| /* 272 */ 65492, 133, 65416, 1, 1, 0, |
| /* 278 */ 65493, 133, 65416, 1, 1, 0, |
| /* 284 */ 65494, 133, 65416, 1, 1, 0, |
| /* 290 */ 65495, 133, 65416, 1, 1, 0, |
| /* 296 */ 65496, 133, 65416, 1, 1, 0, |
| /* 302 */ 65497, 133, 65416, 1, 1, 0, |
| /* 308 */ 65498, 133, 65416, 1, 1, 0, |
| /* 314 */ 127, 65499, 38, 65499, 133, 65416, 1, 1, 0, |
| /* 323 */ 65072, 1, 3, 1, 3, 1, 3, 1, 0, |
| /* 332 */ 65128, 1, 3, 1, 3, 1, 0, |
| /* 339 */ 65318, 1, 3, 1, 0, |
| /* 344 */ 13, 1, 0, |
| /* 347 */ 14, 1, 0, |
| /* 350 */ 66, 1, 0, |
| /* 353 */ 65499, 66, 1, 65470, 67, 1, 0, |
| /* 360 */ 65290, 67, 1, 65469, 68, 1, 0, |
| /* 367 */ 65438, 66, 1, 65471, 68, 1, 0, |
| /* 374 */ 65500, 68, 1, 65468, 69, 1, 0, |
| /* 381 */ 65438, 67, 1, 65470, 69, 1, 0, |
| /* 388 */ 65291, 69, 1, 65467, 70, 1, 0, |
| /* 395 */ 65438, 68, 1, 65469, 70, 1, 0, |
| /* 402 */ 65501, 70, 1, 65466, 71, 1, 0, |
| /* 409 */ 65438, 69, 1, 65468, 71, 1, 0, |
| /* 416 */ 65292, 71, 1, 65465, 72, 1, 0, |
| /* 423 */ 65438, 70, 1, 65467, 72, 1, 0, |
| /* 430 */ 65502, 72, 1, 65464, 73, 1, 0, |
| /* 437 */ 65438, 71, 1, 65466, 73, 1, 0, |
| /* 444 */ 65293, 73, 1, 65463, 74, 1, 0, |
| /* 451 */ 65438, 72, 1, 65465, 74, 1, 0, |
| /* 458 */ 65503, 74, 1, 65462, 75, 1, 0, |
| /* 465 */ 65438, 73, 1, 65464, 75, 1, 0, |
| /* 472 */ 65294, 75, 1, 65461, 76, 1, 0, |
| /* 479 */ 65438, 74, 1, 65463, 76, 1, 0, |
| /* 486 */ 65504, 76, 1, 65460, 77, 1, 0, |
| /* 493 */ 65438, 75, 1, 65462, 77, 1, 0, |
| /* 500 */ 65295, 77, 1, 65459, 78, 1, 0, |
| /* 507 */ 65438, 76, 1, 65461, 78, 1, 0, |
| /* 514 */ 65505, 78, 1, 65458, 79, 1, 0, |
| /* 521 */ 65438, 77, 1, 65460, 79, 1, 0, |
| /* 528 */ 65296, 79, 1, 65457, 80, 1, 0, |
| /* 535 */ 65438, 78, 1, 65459, 80, 1, 0, |
| /* 542 */ 65506, 80, 1, 65456, 81, 1, 0, |
| /* 549 */ 65438, 79, 1, 65458, 81, 1, 0, |
| /* 556 */ 65037, 1, 0, |
| /* 559 */ 65255, 1, 0, |
| /* 562 */ 65298, 1, 0, |
| /* 565 */ 65299, 1, 0, |
| /* 568 */ 65300, 1, 0, |
| /* 571 */ 65301, 1, 0, |
| /* 574 */ 65302, 1, 0, |
| /* 577 */ 65303, 1, 0, |
| /* 580 */ 65304, 1, 0, |
| /* 583 */ 65453, 1, 65499, 133, 1, 65416, 1, 0, |
| /* 591 */ 138, 65488, 49, 65488, 12, 121, 65416, 1, 0, |
| /* 600 */ 65488, 13, 121, 65416, 1, 0, |
| /* 606 */ 65489, 13, 121, 65416, 1, 0, |
| /* 612 */ 65490, 13, 121, 65416, 1, 0, |
| /* 618 */ 65491, 13, 121, 65416, 1, 0, |
| /* 624 */ 65492, 13, 121, 65416, 1, 0, |
| /* 630 */ 65493, 13, 121, 65416, 1, 0, |
| /* 636 */ 65494, 13, 121, 65416, 1, 0, |
| /* 642 */ 65495, 13, 121, 65416, 1, 0, |
| /* 648 */ 65496, 13, 121, 65416, 1, 0, |
| /* 654 */ 65497, 13, 121, 65416, 1, 0, |
| /* 660 */ 65498, 13, 121, 65416, 1, 0, |
| /* 666 */ 65464, 1, 65488, 133, 65416, 121, 65416, 1, 0, |
| /* 675 */ 65463, 1, 65489, 133, 65416, 121, 65416, 1, 0, |
| /* 684 */ 65462, 1, 65490, 133, 65416, 121, 65416, 1, 0, |
| /* 693 */ 65461, 1, 65491, 133, 65416, 121, 65416, 1, 0, |
| /* 702 */ 65460, 1, 65492, 133, 65416, 121, 65416, 1, 0, |
| /* 711 */ 65459, 1, 65493, 133, 65416, 121, 65416, 1, 0, |
| /* 720 */ 65458, 1, 65494, 133, 65416, 121, 65416, 1, 0, |
| /* 729 */ 65457, 1, 65495, 133, 65416, 121, 65416, 1, 0, |
| /* 738 */ 65456, 1, 65496, 133, 65416, 121, 65416, 1, 0, |
| /* 747 */ 65455, 1, 65497, 133, 65416, 121, 65416, 1, 0, |
| /* 756 */ 65454, 1, 65498, 133, 65416, 121, 65416, 1, 0, |
| /* 765 */ 65488, 133, 65416, 1, 0, |
| /* 770 */ 65499, 134, 65416, 1, 0, |
| /* 775 */ 126, 65500, 37, 65500, 133, 65417, 1, 0, |
| /* 783 */ 65433, 1, 0, |
| /* 786 */ 65434, 1, 0, |
| /* 789 */ 65435, 1, 0, |
| /* 792 */ 65436, 1, 0, |
| /* 795 */ 65437, 1, 0, |
| /* 798 */ 65438, 1, 0, |
| /* 801 */ 65456, 1, 0, |
| /* 804 */ 65507, 1, 0, |
| /* 807 */ 65508, 1, 0, |
| /* 810 */ 65509, 1, 0, |
| /* 813 */ 65510, 1, 0, |
| /* 816 */ 65511, 1, 0, |
| /* 819 */ 65512, 1, 0, |
| /* 822 */ 65513, 1, 0, |
| /* 825 */ 65514, 1, 0, |
| /* 828 */ 65072, 1, 3, 1, 3, 1, 2, 0, |
| /* 836 */ 65128, 1, 3, 1, 2, 0, |
| /* 842 */ 65318, 1, 2, 0, |
| /* 846 */ 65072, 1, 3, 1, 2, 2, 0, |
| /* 853 */ 65128, 1, 2, 2, 0, |
| /* 858 */ 65072, 1, 2, 2, 2, 0, |
| /* 864 */ 65329, 2, 2, 2, 0, |
| /* 869 */ 65072, 1, 3, 2, 2, 0, |
| /* 875 */ 65357, 2, 2, 0, |
| /* 879 */ 65072, 1, 3, 1, 3, 2, 0, |
| /* 886 */ 65128, 1, 3, 2, 0, |
| /* 891 */ 65343, 77, 1, 65460, 79, 1, 65458, 81, 1, 12, 2, 0, |
| /* 903 */ 65343, 76, 1, 65461, 78, 1, 65459, 80, 1, 13, 2, 0, |
| /* 915 */ 65343, 75, 1, 65462, 77, 1, 65460, 79, 1, 14, 2, 0, |
| /* 927 */ 65343, 74, 1, 65463, 76, 1, 65461, 78, 1, 15, 2, 0, |
| /* 939 */ 65343, 73, 1, 65464, 75, 1, 65462, 77, 1, 16, 2, 0, |
| /* 951 */ 65343, 72, 1, 65465, 74, 1, 65463, 76, 1, 17, 2, 0, |
| /* 963 */ 65343, 71, 1, 65466, 73, 1, 65464, 75, 1, 18, 2, 0, |
| /* 975 */ 65343, 70, 1, 65467, 72, 1, 65465, 74, 1, 19, 2, 0, |
| /* 987 */ 65343, 69, 1, 65468, 71, 1, 65466, 73, 1, 20, 2, 0, |
| /* 999 */ 65343, 68, 1, 65469, 70, 1, 65467, 72, 1, 21, 2, 0, |
| /* 1011 */ 65343, 67, 1, 65470, 69, 1, 65468, 71, 1, 22, 2, 0, |
| /* 1023 */ 65343, 66, 1, 65471, 68, 1, 65469, 70, 1, 23, 2, 0, |
| /* 1035 */ 65343, 2, 2, 94, 2, 0, |
| /* 1041 */ 65343, 81, 1, 65456, 2, 94, 2, 0, |
| /* 1049 */ 65343, 80, 1, 65457, 2, 94, 2, 0, |
| /* 1057 */ 65343, 79, 1, 65458, 81, 1, 65456, 94, 2, 0, |
| /* 1067 */ 65343, 78, 1, 65459, 80, 1, 65457, 94, 2, 0, |
| /* 1077 */ 65438, 2, 0, |
| /* 1080 */ 65452, 2, 0, |
| /* 1083 */ 65072, 1, 3, 1, 3, 1, 3, 0, |
| /* 1091 */ 65128, 1, 3, 1, 3, 0, |
| /* 1097 */ 65318, 1, 3, 0, |
| /* 1101 */ 7, 0, |
| /* 1103 */ 140, 65486, 13, 0, |
| /* 1107 */ 14, 0, |
| /* 1109 */ 126, 65501, 15, 0, |
| /* 1113 */ 14, 69, 0, |
| /* 1116 */ 65445, 65513, 1, 23, 65514, 1, 95, 65, 65472, 65, 69, 0, |
| /* 1128 */ 65445, 65512, 1, 24, 65513, 1, 95, 65, 65472, 65, 70, 0, |
| /* 1140 */ 65445, 65511, 1, 25, 65512, 1, 95, 65, 65472, 65, 71, 0, |
| /* 1152 */ 65445, 65510, 1, 26, 65511, 1, 95, 65, 65472, 65, 72, 0, |
| /* 1164 */ 65445, 65509, 1, 27, 65510, 1, 95, 65, 65472, 65, 73, 0, |
| /* 1176 */ 65445, 65508, 1, 28, 65509, 1, 95, 65, 65472, 65, 74, 0, |
| /* 1188 */ 65445, 65507, 1, 29, 65508, 1, 95, 65, 65472, 65, 75, 0, |
| /* 1200 */ 65445, 65506, 80, 1, 65456, 81, 1, 65484, 65507, 1, 95, 65, 65472, 65, 76, 0, |
| /* 1216 */ 65445, 65505, 78, 1, 65458, 79, 1, 65487, 65506, 80, 1, 65456, 81, 1, 13, 65, 65472, 65, 77, 0, |
| /* 1236 */ 65445, 65504, 76, 1, 65460, 77, 1, 65490, 65505, 78, 1, 65458, 79, 1, 15, 65, 65472, 65, 78, 0, |
| /* 1256 */ 65445, 65503, 74, 1, 65462, 75, 1, 65493, 65504, 76, 1, 65460, 77, 1, 17, 65, 65472, 65, 79, 0, |
| /* 1276 */ 65445, 65502, 72, 1, 65464, 73, 1, 65496, 65503, 74, 1, 65462, 75, 1, 19, 65, 65472, 65, 80, 0, |
| /* 1296 */ 65445, 65501, 70, 1, 65466, 71, 1, 65499, 65502, 72, 1, 65464, 73, 1, 21, 65, 65472, 65, 81, 0, |
| /* 1316 */ 65445, 65500, 68, 1, 65468, 69, 1, 65502, 65501, 70, 1, 65466, 71, 1, 23, 65, 65472, 65, 82, 0, |
| /* 1336 */ 65445, 65499, 66, 1, 65470, 67, 1, 65505, 65500, 68, 1, 65468, 69, 1, 25, 65, 65472, 65, 83, 0, |
| /* 1356 */ 97, 0, |
| /* 1358 */ 98, 0, |
| /* 1360 */ 99, 0, |
| /* 1362 */ 100, 0, |
| /* 1364 */ 101, 0, |
| /* 1366 */ 102, 0, |
| /* 1368 */ 103, 0, |
| /* 1370 */ 65373, 1, 1, 21, 75, 135, 0, |
| /* 1377 */ 65373, 1, 1, 22, 74, 136, 0, |
| /* 1384 */ 65373, 1, 1, 23, 73, 137, 0, |
| /* 1391 */ 65373, 1, 1, 24, 72, 138, 0, |
| /* 1398 */ 65373, 1, 1, 25, 71, 139, 0, |
| /* 1405 */ 65373, 1, 1, 26, 70, 140, 0, |
| /* 1412 */ 65373, 1, 1, 27, 69, 141, 0, |
| /* 1419 */ 65373, 80, 1, 65456, 81, 1, 65455, 28, 68, 142, 0, |
| /* 1430 */ 65373, 78, 1, 65458, 79, 1, 65457, 80, 1, 65484, 67, 143, 0, |
| /* 1443 */ 65373, 76, 1, 65460, 77, 1, 65459, 78, 1, 65487, 66, 144, 0, |
| /* 1456 */ 65373, 74, 1, 65462, 75, 1, 65461, 76, 1, 65490, 65, 145, 0, |
| /* 1469 */ 65373, 72, 1, 65464, 73, 1, 65463, 74, 1, 65493, 64, 146, 0, |
| /* 1482 */ 65373, 70, 1, 65466, 71, 1, 65465, 72, 1, 65496, 63, 147, 0, |
| /* 1495 */ 65373, 68, 1, 65468, 69, 1, 65467, 70, 1, 65499, 62, 148, 0, |
| /* 1508 */ 65373, 66, 1, 65470, 67, 1, 65469, 68, 1, 65502, 61, 149, 0, |
| /* 1521 */ 166, 0, |
| /* 1523 */ 65288, 1, 1, 1, 230, 1, 65400, 65, 65472, 65, 65396, 0, |
| /* 1535 */ 65287, 1, 1, 1, 231, 1, 65399, 65, 65472, 65, 65397, 0, |
| /* 1547 */ 65286, 1, 1, 1, 232, 1, 65398, 65, 65472, 65, 65398, 0, |
| /* 1559 */ 65285, 1, 1, 1, 233, 1, 65397, 65, 65472, 65, 65399, 0, |
| /* 1571 */ 65284, 1, 1, 1, 234, 1, 65396, 65, 65472, 65, 65400, 0, |
| /* 1583 */ 65283, 1, 1, 1, 235, 1, 65395, 65, 65472, 65, 65401, 0, |
| /* 1595 */ 65521, 65445, 65511, 1, 25, 65512, 1, 95, 65, 65472, 65, 71, 65419, 65445, 65513, 1, 23, 65514, 1, 95, 65, 65472, 65, 69, 65492, 28, 65509, 28, 28, 65386, 65, 30, 65442, 65, 30, 40, 15, 65402, 0, |
| /* 1634 */ 65521, 65445, 65510, 1, 26, 65511, 1, 95, 65, 65472, 65, 72, 65419, 65445, 65512, 1, 24, 65513, 1, 95, 65, 65472, 65, 70, 65491, 28, 65509, 28, 29, 65385, 65, 30, 65442, 65, 30, 41, 15, 65402, 0, |
| /* 1673 */ 65521, 65445, 65509, 1, 27, 65510, 1, 95, 65, 65472, 65, 73, 65419, 65445, 65511, 1, 25, 65512, 1, 95, 65, 65472, 65, 71, 65490, 28, 65509, 28, 30, 65384, 65, 30, 65442, 65, 30, 42, 15, 65402, 0, |
| /* 1712 */ 65521, 65445, 65508, 1, 28, 65509, 1, 95, 65, 65472, 65, 74, 65419, 65445, 65510, 1, 26, 65511, 1, 95, 65, 65472, 65, 72, 65489, 28, 65509, 28, 31, 65383, 65, 30, 65442, 65, 30, 43, 15, 65402, 0, |
| /* 1751 */ 65521, 65445, 65507, 1, 29, 65508, 1, 95, 65, 65472, 65, 75, 65419, 65445, 65509, 1, 27, 65510, 1, 95, 65, 65472, 65, 73, 65488, 28, 65509, 28, 32, 65382, 65, 30, 65442, 65, 30, 44, 15, 65402, 0, |
| /* 1790 */ 65521, 65445, 65506, 80, 1, 65456, 81, 1, 65484, 65507, 1, 95, 65, 65472, 65, 76, 65419, 65445, 65508, 1, 28, 65509, 1, 95, 65, 65472, 65, 74, 65487, 28, 65509, 28, 33, 65381, 65, 30, 65442, 65, 30, 45, 15, 65402, 0, |
| /* 1833 */ 65521, 65445, 65505, 78, 1, 65458, 79, 1, 65487, 65506, 80, 1, 65456, 81, 1, 13, 65, 65472, 65, 77, 65419, 65445, 65507, 1, 29, 65508, 1, 95, 65, 65472, 65, 75, 65486, 28, 65509, 28, 34, 65380, 65, 30, 65442, 65, 30, 46, 15, 65402, 0, |
| /* 1880 */ 65521, 65445, 65504, 76, 1, 65460, 77, 1, 65490, 65505, 78, 1, 65458, 79, 1, 15, 65, 65472, 65, 78, 65419, 65445, 65506, 80, 1, 65456, 81, 1, 65484, 65507, 1, 95, 65, 65472, 65, 76, 65485, 28, 65509, 28, 35, 65379, 65, 30, 65442, 65, 30, 47, 15, 65402, 0, |
| /* 1931 */ 65521, 65445, 65503, 74, 1, 65462, 75, 1, 65493, 65504, 76, 1, 65460, 77, 1, 17, 65, 65472, 65, 79, 65419, 65445, 65505, 78, 1, 65458, 79, 1, 65487, 65506, 80, 1, 65456, 81, 1, 13, 65, 65472, 65, 77, 65484, 28, 65509, 28, 36, 65378, 65, 30, 65442, 65, 30, 48, 15, 65402, 0, |
| /* 1986 */ 65521, 65445, 65502, 72, 1, 65464, 73, 1, 65496, 65503, 74, 1, 65462, 75, 1, 19, 65, 65472, 65, 80, 65419, 65445, 65504, 76, 1, 65460, 77, 1, 65490, 65505, 78, 1, 65458, 79, 1, 15, 65, 65472, 65, 78, 65483, 28, 65509, 28, 37, 65377, 65, 30, 65442, 65, 30, 49, 15, 65402, 0, |
| /* 2041 */ 65521, 65445, 65501, 70, 1, 65466, 71, 1, 65499, 65502, 72, 1, 65464, 73, 1, 21, 65, 65472, 65, 81, 65419, 65445, 65503, 74, 1, 65462, 75, 1, 65493, 65504, 76, 1, 65460, 77, 1, 17, 65, 65472, 65, 79, 65482, 28, 65509, 28, 38, 65376, 65, 30, 65442, 65, 30, 50, 15, 65402, 0, |
| /* 2096 */ 65521, 65445, 65500, 68, 1, 65468, 69, 1, 65502, 65501, 70, 1, 65466, 71, 1, 23, 65, 65472, 65, 82, 65419, 65445, 65502, 72, 1, 65464, 73, 1, 65496, 65503, 74, 1, 65462, 75, 1, 19, 65, 65472, 65, 80, 65481, 28, 65509, 28, 39, 65375, 65, 30, 65442, 65, 30, 51, 15, 65402, 0, |
| /* 2151 */ 65521, 65445, 65499, 66, 1, 65470, 67, 1, 65505, 65500, 68, 1, 65468, 69, 1, 25, 65, 65472, 65, 83, 65419, 65445, 65501, 70, 1, 65466, 71, 1, 65499, 65502, 72, 1, 65464, 73, 1, 21, 65, 65472, 65, 81, 65480, 28, 65509, 28, 40, 65374, 65, 30, 65442, 65, 30, 52, 15, 65402, 0, |
| /* 2206 */ 65282, 81, 1, 65455, 1, 1, 236, 1, 65394, 65, 65472, 65, 65402, 0, |
| /* 2220 */ 65281, 79, 1, 65457, 80, 1, 65456, 81, 1, 65455, 237, 1, 65393, 65, 65472, 65, 65403, 0, |
| /* 2238 */ 65280, 77, 1, 65459, 78, 1, 65458, 79, 1, 65457, 80, 1, 157, 1, 65392, 65, 65472, 65, 65404, 0, |
| /* 2258 */ 65279, 75, 1, 65461, 76, 1, 65460, 77, 1, 65459, 78, 1, 160, 1, 65391, 65, 65472, 65, 65405, 0, |
| /* 2278 */ 65278, 73, 1, 65463, 74, 1, 65462, 75, 1, 65461, 76, 1, 163, 1, 65390, 65, 65472, 65, 65406, 0, |
| /* 2298 */ 65277, 71, 1, 65465, 72, 1, 65464, 73, 1, 65463, 74, 1, 166, 1, 65389, 65, 65472, 65, 65407, 0, |
| /* 2318 */ 65276, 69, 1, 65467, 70, 1, 65466, 71, 1, 65465, 72, 1, 169, 1, 65388, 65, 65472, 65, 65408, 0, |
| /* 2338 */ 65275, 67, 1, 65469, 68, 1, 65468, 69, 1, 65467, 70, 1, 172, 1, 65387, 65, 65472, 65, 65409, 0, |
| /* 2358 */ 23, 73, 2, 63, 65488, 120, 65465, 1, 65487, 75, 26, 65447, 65, 26, 30, 65416, 66, 26, 29, 65416, 0, |
| /* 2379 */ 22, 74, 2, 63, 65487, 120, 65466, 1, 65486, 76, 26, 65446, 66, 26, 29, 65416, 0, |
| /* 2396 */ 65, 65487, 77, 26, 65446, 66, 26, 29, 65416, 0, |
| /* 2406 */ 23, 73, 2, 134, 65465, 1, 65487, 50, 65487, 75, 26, 31, 65416, 65, 26, 30, 65416, 0, |
| /* 2424 */ 22, 74, 135, 65466, 1, 65486, 77, 26, 30, 65416, 0, |
| /* 2435 */ 65, 65487, 77, 26, 30, 65416, 0, |
| /* 2442 */ 139, 65487, 50, 65487, 12, 121, 65416, 0, |
| /* 2450 */ 65487, 13, 121, 65416, 0, |
| /* 2455 */ 65465, 1, 65487, 133, 65416, 121, 65416, 0, |
| /* 2463 */ 65466, 1, 65486, 133, 65416, 0, |
| /* 2469 */ 65487, 133, 65416, 0, |
| /* 2473 */ 65468, 36, 62, 148, 65452, 1, 65500, 66, 28, 40, 65417, 0, |
| /* 2485 */ 65469, 36, 62, 148, 65452, 1, 65500, 66, 28, 40, 65417, 0, |
| /* 2497 */ 65, 65500, 66, 28, 40, 65417, 0, |
| /* 2504 */ 65452, 1, 65500, 134, 65417, 0, |
| /* 2510 */ 65315, 75, 1, 65462, 77, 1, 65460, 79, 1, 65458, 81, 1, 10, 95, 65443, 95, 65443, 0, |
| /* 2528 */ 65315, 74, 1, 65463, 76, 1, 65461, 78, 1, 65459, 80, 1, 11, 95, 65443, 95, 65443, 0, |
| /* 2546 */ 65315, 73, 1, 65464, 75, 1, 65462, 77, 1, 65460, 79, 1, 12, 95, 65443, 95, 65443, 0, |
| /* 2564 */ 65315, 72, 1, 65465, 74, 1, 65463, 76, 1, 65461, 78, 1, 13, 95, 65443, 95, 65443, 0, |
| /* 2582 */ 65315, 71, 1, 65466, 73, 1, 65464, 75, 1, 65462, 77, 1, 14, 95, 65443, 95, 65443, 0, |
| /* 2600 */ 65315, 70, 1, 65467, 72, 1, 65465, 74, 1, 65463, 76, 1, 15, 95, 65443, 95, 65443, 0, |
| /* 2618 */ 65315, 69, 1, 65468, 71, 1, 65466, 73, 1, 65464, 75, 1, 16, 95, 65443, 95, 65443, 0, |
| /* 2636 */ 65315, 68, 1, 65469, 70, 1, 65467, 72, 1, 65465, 74, 1, 17, 95, 65443, 95, 65443, 0, |
| /* 2654 */ 65315, 67, 1, 65470, 69, 1, 65468, 71, 1, 65466, 73, 1, 18, 95, 65443, 95, 65443, 0, |
| /* 2672 */ 65315, 66, 1, 65471, 68, 1, 65469, 70, 1, 65467, 72, 1, 19, 95, 65443, 95, 65443, 0, |
| /* 2690 */ 65315, 2, 2, 2, 92, 95, 65443, 95, 65443, 0, |
| /* 2700 */ 65315, 81, 1, 65456, 2, 2, 92, 95, 65443, 95, 65443, 0, |
| /* 2712 */ 65315, 80, 1, 65457, 2, 2, 92, 95, 65443, 95, 65443, 0, |
| /* 2724 */ 65315, 79, 1, 65458, 81, 1, 65456, 2, 92, 95, 65443, 95, 65443, 0, |
| /* 2738 */ 65315, 78, 1, 65459, 80, 1, 65457, 2, 92, 95, 65443, 95, 65443, 0, |
| /* 2752 */ 65315, 77, 1, 65460, 79, 1, 65458, 81, 1, 65456, 92, 95, 65443, 95, 65443, 0, |
| /* 2768 */ 65315, 76, 1, 65461, 78, 1, 65459, 80, 1, 65457, 92, 95, 65443, 95, 65443, 0, |
| /* 2784 */ 21, 75, 65, 65486, 78, 26, 65445, 0, |
| /* 2792 */ 24, 72, 2, 63, 65489, 120, 65464, 1, 65488, 74, 26, 65448, 64, 26, 31, 65416, 65, 26, 30, 65416, 92, 65445, 0, |
| /* 2815 */ 65, 65488, 76, 26, 65447, 65, 26, 30, 65416, 92, 65445, 0, |
| /* 2827 */ 26, 65446, 92, 65445, 0, |
| /* 2832 */ 24, 72, 2, 135, 65464, 1, 65488, 49, 65488, 74, 26, 32, 65416, 64, 26, 31, 65416, 65, 26, 65446, 0, |
| /* 2853 */ 65, 65488, 76, 26, 31, 65416, 65, 26, 65446, 0, |
| /* 2863 */ 25, 71, 2, 63, 65490, 120, 65463, 1, 65489, 73, 26, 65449, 63, 26, 32, 65416, 64, 26, 31, 65416, 91, 65446, 0, |
| /* 2886 */ 65, 65489, 75, 26, 65448, 64, 26, 31, 65416, 91, 65446, 0, |
| /* 2898 */ 25, 71, 2, 136, 65463, 1, 65489, 48, 65489, 73, 26, 33, 65416, 63, 26, 32, 65416, 64, 26, 65447, 91, 65446, 0, |
| /* 2921 */ 65, 65489, 75, 26, 32, 65416, 64, 26, 65447, 91, 65446, 0, |
| /* 2933 */ 26, 70, 2, 63, 65491, 120, 65462, 1, 65490, 72, 26, 65450, 62, 26, 33, 65416, 63, 26, 32, 65416, 90, 65447, 0, |
| /* 2956 */ 65, 65490, 74, 26, 65449, 63, 26, 32, 65416, 90, 65447, 0, |
| /* 2968 */ 26, 70, 2, 137, 65462, 1, 65490, 47, 65490, 72, 26, 34, 65416, 62, 26, 33, 65416, 63, 26, 65448, 90, 65447, 0, |
| /* 2991 */ 65, 65490, 74, 26, 33, 65416, 63, 26, 65448, 90, 65447, 0, |
| /* 3003 */ 27, 69, 2, 63, 65492, 120, 65461, 1, 65491, 71, 26, 65451, 61, 26, 34, 65416, 62, 26, 33, 65416, 89, 65448, 0, |
| /* 3026 */ 65, 65491, 73, 26, 65450, 62, 26, 33, 65416, 89, 65448, 0, |
| /* 3038 */ 27, 69, 2, 138, 65461, 1, 65491, 46, 65491, 71, 26, 35, 65416, 61, 26, 34, 65416, 62, 26, 65449, 89, 65448, 0, |
| /* 3061 */ 65, 65491, 73, 26, 34, 65416, 62, 26, 65449, 89, 65448, 0, |
| /* 3073 */ 28, 68, 2, 63, 65493, 120, 65460, 1, 65492, 70, 26, 65452, 60, 26, 35, 65416, 61, 26, 34, 65416, 88, 65449, 0, |
| /* 3096 */ 65, 65492, 72, 26, 65451, 61, 26, 34, 65416, 88, 65449, 0, |
| /* 3108 */ 28, 68, 2, 139, 65460, 1, 65492, 45, 65492, 70, 26, 36, 65416, 60, 26, 35, 65416, 61, 26, 65450, 88, 65449, 0, |
| /* 3131 */ 65, 65492, 72, 26, 35, 65416, 61, 26, 65450, 88, 65449, 0, |
| /* 3143 */ 65454, 29, 67, 2, 63, 65494, 120, 65459, 1, 65493, 69, 26, 65453, 59, 26, 36, 65416, 60, 26, 35, 65416, 87, 65450, 0, |
| /* 3167 */ 65455, 29, 67, 2, 63, 65494, 120, 65459, 1, 65493, 69, 26, 65453, 59, 26, 36, 65416, 60, 26, 35, 65416, 87, 65450, 0, |
| /* 3191 */ 65, 65493, 71, 26, 65452, 60, 26, 35, 65416, 87, 65450, 0, |
| /* 3203 */ 29, 67, 2, 140, 65459, 1, 65493, 44, 65493, 69, 26, 37, 65416, 59, 26, 36, 65416, 60, 26, 65451, 87, 65450, 0, |
| /* 3226 */ 65, 65493, 71, 26, 36, 65416, 60, 26, 65451, 87, 65450, 0, |
| /* 3238 */ 65456, 30, 66, 2, 63, 65495, 120, 65458, 1, 65494, 68, 26, 65454, 58, 26, 37, 65416, 59, 26, 36, 65416, 86, 65451, 0, |
| /* 3262 */ 65457, 30, 66, 2, 63, 65495, 120, 65458, 1, 65494, 68, 26, 65454, 58, 26, 37, 65416, 59, 26, 36, 65416, 86, 65451, 0, |
| /* 3286 */ 65, 65494, 70, 26, 65453, 59, 26, 36, 65416, 86, 65451, 0, |
| /* 3298 */ 65455, 30, 66, 2, 141, 65458, 1, 65494, 43, 65494, 68, 26, 38, 65416, 58, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, |
| /* 3322 */ 65456, 30, 66, 2, 141, 65458, 1, 65494, 43, 65494, 68, 26, 38, 65416, 58, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, |
| /* 3346 */ 65, 65494, 70, 26, 37, 65416, 59, 26, 65452, 86, 65451, 0, |
| /* 3358 */ 65458, 31, 65, 2, 63, 65496, 120, 65457, 1, 65495, 67, 26, 65455, 57, 26, 38, 65416, 58, 26, 37, 65416, 85, 65452, 0, |
| /* 3382 */ 65459, 31, 65, 2, 63, 65496, 120, 65457, 1, 65495, 67, 26, 65455, 57, 26, 38, 65416, 58, 26, 37, 65416, 85, 65452, 0, |
| /* 3406 */ 65, 65495, 69, 26, 65454, 58, 26, 37, 65416, 85, 65452, 0, |
| /* 3418 */ 65457, 31, 65, 2, 142, 65457, 1, 65495, 42, 65495, 67, 26, 39, 65416, 57, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, |
| /* 3442 */ 65458, 31, 65, 2, 142, 65457, 1, 65495, 42, 65495, 67, 26, 39, 65416, 57, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, |
| /* 3466 */ 65, 65495, 69, 26, 38, 65416, 58, 26, 65453, 85, 65452, 0, |
| /* 3478 */ 65460, 32, 64, 2, 63, 65497, 120, 65456, 1, 65496, 66, 26, 65456, 56, 26, 39, 65416, 57, 26, 38, 65416, 84, 65453, 0, |
| /* 3502 */ 65461, 32, 64, 2, 63, 65497, 120, 65456, 1, 65496, 66, 26, 65456, 56, 26, 39, 65416, 57, 26, 38, 65416, 84, 65453, 0, |
| /* 3526 */ 65, 65496, 68, 26, 65455, 57, 26, 38, 65416, 84, 65453, 0, |
| /* 3538 */ 65459, 32, 64, 2, 143, 65456, 1, 65496, 41, 65496, 66, 26, 40, 65416, 56, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, |
| /* 3562 */ 65460, 32, 64, 2, 143, 65456, 1, 65496, 41, 65496, 66, 26, 40, 65416, 56, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, |
| /* 3586 */ 65, 65496, 68, 26, 39, 65416, 57, 26, 65454, 84, 65453, 0, |
| /* 3598 */ 65462, 33, 63, 2, 63, 65498, 120, 65455, 1, 65497, 65, 26, 65457, 55, 26, 40, 65416, 56, 26, 39, 65416, 83, 65454, 0, |
| /* 3622 */ 65463, 33, 63, 2, 63, 65498, 120, 65455, 1, 65497, 65, 26, 65457, 55, 26, 40, 65416, 56, 26, 39, 65416, 83, 65454, 0, |
| /* 3646 */ 65, 65497, 67, 26, 65456, 56, 26, 39, 65416, 83, 65454, 0, |
| /* 3658 */ 65461, 33, 63, 2, 144, 65455, 1, 65497, 40, 65497, 65, 26, 41, 65416, 55, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, |
| /* 3682 */ 65462, 33, 63, 2, 144, 65455, 1, 65497, 40, 65497, 65, 26, 41, 65416, 55, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, |
| /* 3706 */ 65, 65497, 67, 26, 40, 65416, 56, 26, 65455, 83, 65454, 0, |
| /* 3718 */ 65297, 81, 1, 65455, 0, |
| /* 3723 */ 65464, 34, 62, 2, 63, 65499, 120, 65454, 1, 65498, 64, 2, 26, 41, 65416, 55, 26, 40, 65416, 82, 65455, 0, |
| /* 3745 */ 65465, 34, 62, 2, 63, 65499, 120, 65454, 1, 65498, 64, 2, 26, 41, 65416, 55, 26, 40, 65416, 82, 65455, 0, |
| /* 3767 */ 65, 65498, 66, 26, 65457, 55, 26, 40, 65416, 82, 65455, 0, |
| /* 3779 */ 65463, 34, 62, 2, 145, 65454, 1, 65498, 39, 65498, 64, 26, 42, 65416, 54, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, |
| /* 3803 */ 65464, 34, 62, 2, 145, 65454, 1, 65498, 39, 65498, 64, 26, 42, 65416, 54, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, |
| /* 3827 */ 65, 65498, 66, 26, 41, 65416, 55, 26, 65456, 82, 65455, 0, |
| /* 3839 */ 65438, 81, 1, 65456, 0, |
| /* 3844 */ 65466, 35, 61, 2, 63, 65500, 120, 65453, 1, 65499, 65, 2, 26, 40, 1, 65416, 81, 65456, 0, |
| /* 3863 */ 65467, 35, 61, 2, 63, 65500, 120, 65453, 1, 65499, 65, 2, 26, 40, 1, 65416, 81, 65456, 0, |
| /* 3882 */ 65, 65499, 65, 2, 26, 41, 65416, 81, 65456, 0, |
| /* 3892 */ 65465, 35, 61, 2, 146, 65453, 1, 65499, 38, 65499, 63, 2, 26, 41, 1, 65416, 54, 26, 65457, 81, 65456, 0, |
| /* 3914 */ 65466, 35, 61, 2, 146, 65453, 1, 65499, 38, 65499, 63, 2, 26, 41, 1, 65416, 54, 26, 65457, 81, 65456, 0, |
| /* 3936 */ 65, 65499, 65, 26, 42, 65416, 54, 26, 65457, 81, 65456, 0, |
| /* 3948 */ 65438, 80, 1, 65457, 0, |
| /* 3953 */ 28, 65457, 0, |
| /* 3956 */ 65467, 36, 60, 2, 147, 65452, 1, 65500, 37, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, |
| /* 3974 */ 65468, 36, 60, 2, 147, 65452, 1, 65500, 37, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, |
| /* 3992 */ 65, 65500, 64, 2, 26, 41, 65417, 80, 65457, 0, |
| /* 4002 */ 26, 65458, 80, 65457, 0, |
| /* 4007 */ 65469, 37, 61, 65, 65501, 65, 28, 65458, 0, |
| /* 4016 */ 65470, 37, 61, 65, 65501, 65, 28, 65458, 0, |
| /* 4025 */ 65373, 1, 1, 230, 65402, 65461, 0, |
| /* 4032 */ 65373, 1, 1, 231, 65401, 65462, 0, |
| /* 4039 */ 65373, 1, 1, 232, 65400, 65463, 0, |
| /* 4046 */ 65373, 1, 1, 233, 65399, 65464, 0, |
| /* 4053 */ 65373, 1, 1, 234, 65398, 65465, 0, |
| /* 4060 */ 65373, 1, 1, 235, 65397, 65466, 0, |
| /* 4067 */ 65373, 1, 1, 236, 65396, 65467, 0, |
| /* 4074 */ 65439, 65467, 0, |
| /* 4077 */ 65373, 81, 1, 65455, 1, 237, 65395, 65468, 0, |
| /* 4086 */ 65373, 79, 1, 65457, 80, 1, 65456, 81, 1, 156, 65394, 65469, 0, |
| /* 4099 */ 65373, 77, 1, 65459, 78, 1, 65458, 79, 1, 159, 65393, 65470, 0, |
| /* 4112 */ 65373, 75, 1, 65461, 76, 1, 65460, 77, 1, 162, 65392, 65471, 0, |
| /* 4125 */ 65373, 73, 1, 65463, 74, 1, 65462, 75, 1, 165, 65391, 65472, 0, |
| /* 4138 */ 65373, 71, 1, 65465, 72, 1, 65464, 73, 1, 168, 65390, 65473, 0, |
| /* 4151 */ 65373, 69, 1, 65467, 70, 1, 65466, 71, 1, 171, 65389, 65474, 0, |
| /* 4164 */ 65373, 67, 1, 65469, 68, 1, 65468, 69, 1, 174, 65388, 65475, 0, |
| /* 4177 */ 65534, 0, |
| /* 4179 */ 65535, 0, |
| }; |
| |
| extern const LaneBitmask ARMLaneMaskLists[] = { |
| /* 0 */ LaneBitmask(0x0000000000000000), LaneBitmask::getAll(), |
| /* 2 */ LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(), |
| /* 5 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), LaneBitmask::getAll(), |
| /* 8 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask::getAll(), |
| /* 11 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask::getAll(), |
| /* 16 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask::getAll(), |
| /* 20 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask::getAll(), |
| /* 23 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask::getAll(), |
| /* 28 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask::getAll(), |
| /* 35 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(), |
| /* 39 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(), |
| /* 42 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(), |
| /* 48 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(), |
| /* 53 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask::getAll(), |
| /* 57 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask::getAll(), |
| /* 66 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(), |
| /* 74 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(), |
| /* 81 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(), |
| /* 87 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask::getAll(), |
| /* 92 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask::getAll(), |
| /* 99 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000C00), LaneBitmask::getAll(), |
| /* 105 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask::getAll(), |
| /* 110 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask::getAll(), |
| /* 114 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask::getAll(), |
| /* 123 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(), |
| /* 131 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(), |
| /* 138 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(), |
| /* 144 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000C00), LaneBitmask(0x000000000000C000), LaneBitmask::getAll(), |
| /* 149 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask(0x0000000000010000), LaneBitmask(0x0000000000020000), LaneBitmask::getAll(), |
| /* 166 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(), |
| /* 181 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(), |
| /* 194 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(), |
| /* 205 */ LaneBitmask(0x000000000000000C), LaneBitmask(0x0000000000000030), LaneBitmask(0x00000000000000C0), LaneBitmask(0x0000000000000300), LaneBitmask(0x0000000000000C00), LaneBitmask(0x0000000000003000), LaneBitmask(0x000000000000C000), LaneBitmask(0x0000000000030000), LaneBitmask::getAll(), |
| }; |
| |
| extern const uint16_t ARMSubRegIdxLists[] = { |
| /* 0 */ 1, 2, 0, |
| /* 3 */ 1, 17, 18, 2, 0, |
| /* 8 */ 1, 3, 0, |
| /* 11 */ 1, 17, 18, 3, 0, |
| /* 16 */ 9, 10, 0, |
| /* 19 */ 17, 18, 0, |
| /* 22 */ 1, 17, 18, 2, 19, 20, 0, |
| /* 29 */ 1, 17, 18, 3, 21, 22, 0, |
| /* 36 */ 1, 2, 3, 13, 33, 37, 0, |
| /* 43 */ 1, 17, 18, 2, 3, 13, 33, 37, 0, |
| /* 52 */ 1, 17, 18, 2, 19, 20, 3, 13, 33, 37, 0, |
| /* 63 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 13, 33, 37, 0, |
| /* 76 */ 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 0, |
| /* 88 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 0, |
| /* 104 */ 1, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0, |
| /* 116 */ 1, 17, 18, 2, 3, 4, 13, 14, 33, 34, 35, 36, 37, 0, |
| /* 130 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 13, 14, 33, 34, 35, 36, 37, 0, |
| /* 148 */ 1, 17, 18, 2, 19, 20, 3, 21, 22, 4, 23, 24, 13, 14, 33, 34, 35, 36, 37, 0, |
| /* 168 */ 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 0, |
| /* 188 */ 1, 3, 5, 33, 43, 0, |
| /* 194 */ 1, 17, 18, 3, 5, 33, 43, 0, |
| /* 202 */ 1, 17, 18, 3, 21, 22, 5, 33, 43, 0, |
| /* 212 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 33, 43, 0, |
| /* 224 */ 1, 3, 5, 7, 33, 38, 43, 45, 51, 0, |
| /* 234 */ 1, 17, 18, 3, 5, 7, 33, 38, 43, 45, 51, 0, |
| /* 246 */ 1, 17, 18, 3, 21, 22, 5, 7, 33, 38, 43, 45, 51, 0, |
| /* 260 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 7, 33, 38, 43, 45, 51, 0, |
| /* 276 */ 1, 17, 18, 3, 21, 22, 5, 25, 26, 7, 29, 30, 33, 38, 43, 45, 51, 0, |
| /* 294 */ 11, 13, 1, 2, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, |
| /* 333 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 4, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, |
| /* 376 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 6, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, |
| /* 423 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 25, 26, 6, 27, 28, 16, 7, 8, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, |
| /* 474 */ 11, 13, 1, 17, 18, 2, 19, 20, 14, 3, 21, 22, 4, 23, 24, 33, 34, 35, 36, 37, 12, 15, 5, 25, 26, 6, 27, 28, 16, 7, 29, 30, 8, 31, 32, 51, 52, 53, 54, 55, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 56, 0, |
| }; |
| |
| extern const MCRegisterInfo::SubRegCoveredBits ARMSubRegIdxRanges[] = { |
| { 65535, 65535 }, |
| { 0, 64 }, // dsub_0 |
| { 64, 64 }, // dsub_1 |
| { 128, 64 }, // dsub_2 |
| { 192, 64 }, // dsub_3 |
| { 256, 64 }, // dsub_4 |
| { 320, 64 }, // dsub_5 |
| { 384, 64 }, // dsub_6 |
| { 448, 64 }, // dsub_7 |
| { 0, 32 }, // gsub_0 |
| { 32, 32 }, // gsub_1 |
| { 0, 256 }, // qqsub_0 |
| { 256, 256 }, // qqsub_1 |
| { 0, 128 }, // qsub_0 |
| { 128, 128 }, // qsub_1 |
| { 256, 128 }, // qsub_2 |
| { 384, 128 }, // qsub_3 |
| { 0, 32 }, // ssub_0 |
| { 32, 32 }, // ssub_1 |
| { 64, 32 }, // ssub_2 |
| { 96, 32 }, // ssub_3 |
| { 128, 32 }, // ssub_4 |
| { 160, 32 }, // ssub_5 |
| { 192, 32 }, // ssub_6 |
| { 224, 32 }, // ssub_7 |
| { 256, 32 }, // ssub_8 |
| { 288, 32 }, // ssub_9 |
| { 320, 32 }, // ssub_10 |
| { 352, 32 }, // ssub_11 |
| { 384, 32 }, // ssub_12 |
| { 416, 32 }, // ssub_13 |
| { 448, 32 }, // ssub_14 |
| { 480, 32 }, // ssub_15 |
| { 65535, 128 }, // ssub_0_ssub_1_ssub_4_ssub_5 |
| { 0, 192 }, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| { 65535, 128 }, // ssub_2_ssub_3_ssub_6_ssub_7 |
| { 64, 192 }, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| { 64, 128 }, // ssub_2_ssub_3_ssub_4_ssub_5 |
| { 65535, 192 }, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| { 65535, 256 }, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| { 65535, 192 }, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| { 65535, 256 }, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| { 64, 256 }, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| { 65535, 128 }, // ssub_4_ssub_5_ssub_8_ssub_9 |
| { 128, 192 }, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| { 65535, 192 }, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| { 65535, 128 }, // ssub_6_ssub_7_dsub_5 |
| { 192, 192 }, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| { 65535, 192 }, // ssub_6_ssub_7_dsub_5_dsub_7 |
| { 192, 128 }, // ssub_6_ssub_7_ssub_8_ssub_9 |
| { 192, 256 }, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| { 65535, 128 }, // ssub_8_ssub_9_ssub_12_ssub_13 |
| { 256, 192 }, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| { 65535, 128 }, // dsub_5_dsub_7 |
| { 320, 192 }, // dsub_5_ssub_12_ssub_13_dsub_7 |
| { 320, 128 }, // dsub_5_ssub_12_ssub_13 |
| { 128, 256 }, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| extern const char ARMRegStrings[] = { |
| /* 0 */ 'D', '4', '_', 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', 0, |
| /* 13 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, |
| /* 26 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, |
| /* 39 */ 'R', '1', '0', 0, |
| /* 43 */ 'S', '1', '0', 0, |
| /* 47 */ 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', 0, |
| /* 63 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, |
| /* 79 */ 'S', '2', '0', 0, |
| /* 83 */ 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', '_', 'D', '3', '0', 0, |
| /* 99 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, |
| /* 115 */ 'S', '3', '0', 0, |
| /* 119 */ 'D', '0', 0, |
| /* 122 */ 'P', '0', 0, |
| /* 125 */ 'Q', '0', 0, |
| /* 128 */ 'M', 'V', 'F', 'R', '0', 0, |
| /* 134 */ 'S', '0', 0, |
| /* 137 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, |
| /* 148 */ 'D', '5', '_', 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', 0, |
| /* 161 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, |
| /* 175 */ 'R', '1', '0', '_', 'R', '1', '1', 0, |
| /* 183 */ 'S', '1', '1', 0, |
| /* 187 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, |
| /* 199 */ 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', 0, |
| /* 215 */ 'S', '2', '1', 0, |
| /* 219 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, |
| /* 231 */ 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', '_', 'D', '3', '1', 0, |
| /* 247 */ 'S', '3', '1', 0, |
| /* 251 */ 'D', '1', 0, |
| /* 254 */ 'Q', '0', '_', 'Q', '1', 0, |
| /* 260 */ 'M', 'V', 'F', 'R', '1', 0, |
| /* 266 */ 'R', '0', '_', 'R', '1', 0, |
| /* 272 */ 'S', '1', 0, |
| /* 275 */ 'D', '6', '_', 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', 0, |
| /* 289 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, |
| /* 304 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, |
| /* 319 */ 'R', '1', '2', 0, |
| /* 323 */ 'S', '1', '2', 0, |
| /* 327 */ 'D', '1', '6', '_', 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', 0, |
| /* 343 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, |
| /* 359 */ 'S', '2', '2', 0, |
| /* 363 */ 'D', '0', '_', 'D', '2', 0, |
| /* 369 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, |
| /* 378 */ 'Q', '1', '_', 'Q', '2', 0, |
| /* 384 */ 'M', 'V', 'F', 'R', '2', 0, |
| /* 390 */ 'S', '2', 0, |
| /* 393 */ 'F', 'P', 'I', 'N', 'S', 'T', '2', 0, |
| /* 401 */ 'D', '7', '_', 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', 0, |
| /* 415 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, |
| /* 427 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, |
| /* 443 */ 'S', '1', '3', 0, |
| /* 447 */ 'D', '1', '7', '_', 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', 0, |
| /* 463 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, |
| /* 475 */ 'S', '2', '3', 0, |
| /* 479 */ 'D', '1', '_', 'D', '3', 0, |
| /* 485 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, |
| /* 494 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, |
| /* 506 */ 'R', '2', '_', 'R', '3', 0, |
| /* 512 */ 'S', '3', 0, |
| /* 515 */ 'D', '8', '_', 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', 0, |
| /* 530 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, |
| /* 546 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, |
| /* 562 */ 'S', '1', '4', 0, |
| /* 566 */ 'D', '1', '8', '_', 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', 0, |
| /* 582 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, |
| /* 598 */ 'S', '2', '4', 0, |
| /* 602 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', 0, |
| /* 611 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, |
| /* 623 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, |
| /* 635 */ 'R', '4', 0, |
| /* 638 */ 'S', '4', 0, |
| /* 641 */ 'D', '9', '_', 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', 0, |
| /* 656 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, |
| /* 668 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, |
| /* 684 */ 'S', '1', '5', 0, |
| /* 688 */ 'D', '1', '9', '_', 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', 0, |
| /* 704 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, |
| /* 716 */ 'S', '2', '5', 0, |
| /* 720 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', 0, |
| /* 729 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, |
| /* 738 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, |
| /* 750 */ 'R', '4', '_', 'R', '5', 0, |
| /* 756 */ 'S', '5', 0, |
| /* 759 */ 'D', '1', '0', '_', 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', 0, |
| /* 775 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, |
| /* 791 */ 'S', '1', '6', 0, |
| /* 795 */ 'D', '2', '0', '_', 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', 0, |
| /* 811 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, |
| /* 827 */ 'S', '2', '6', 0, |
| /* 831 */ 'D', '0', '_', 'D', '2', '_', 'D', '4', '_', 'D', '6', 0, |
| /* 843 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, |
| /* 855 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, |
| /* 867 */ 'R', '6', 0, |
| /* 870 */ 'S', '6', 0, |
| /* 873 */ 'D', '1', '1', '_', 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', 0, |
| /* 889 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, |
| /* 901 */ 'S', '1', '7', 0, |
| /* 905 */ 'D', '2', '1', '_', 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', 0, |
| /* 921 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, |
| /* 933 */ 'S', '2', '7', 0, |
| /* 937 */ 'D', '1', '_', 'D', '3', '_', 'D', '5', '_', 'D', '7', 0, |
| /* 949 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, |
| /* 958 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, |
| /* 970 */ 'R', '6', '_', 'R', '7', 0, |
| /* 976 */ 'S', '7', 0, |
| /* 979 */ 'D', '1', '2', '_', 'D', '1', '4', '_', 'D', '1', '6', '_', 'D', '1', '8', 0, |
| /* 995 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, |
| /* 1011 */ 'S', '1', '8', 0, |
| /* 1015 */ 'D', '2', '2', '_', 'D', '2', '4', '_', 'D', '2', '6', '_', 'D', '2', '8', 0, |
| /* 1031 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, |
| /* 1047 */ 'S', '2', '8', 0, |
| /* 1051 */ 'D', '2', '_', 'D', '4', '_', 'D', '6', '_', 'D', '8', 0, |
| /* 1063 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, |
| /* 1075 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, |
| /* 1087 */ 'R', '8', 0, |
| /* 1090 */ 'S', '8', 0, |
| /* 1093 */ 'D', '1', '3', '_', 'D', '1', '5', '_', 'D', '1', '7', '_', 'D', '1', '9', 0, |
| /* 1109 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, |
| /* 1121 */ 'S', '1', '9', 0, |
| /* 1125 */ 'D', '2', '3', '_', 'D', '2', '5', '_', 'D', '2', '7', '_', 'D', '2', '9', 0, |
| /* 1141 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, |
| /* 1153 */ 'S', '2', '9', 0, |
| /* 1157 */ 'D', '3', '_', 'D', '5', '_', 'D', '7', '_', 'D', '9', 0, |
| /* 1169 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, |
| /* 1178 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, |
| /* 1190 */ 'R', '8', '_', 'R', '9', 0, |
| /* 1196 */ 'S', '9', 0, |
| /* 1199 */ 'P', 'C', 0, |
| /* 1202 */ 'F', 'P', 'S', 'C', 'R', '_', 'N', 'Z', 'C', 'V', 'Q', 'C', 0, |
| /* 1215 */ 'F', 'P', 'E', 'X', 'C', 0, |
| /* 1221 */ 'F', 'P', 'S', 'I', 'D', 0, |
| /* 1227 */ 'R', 'A', '_', 'A', 'U', 'T', 'H', '_', 'C', 'O', 'D', 'E', 0, |
| /* 1240 */ 'I', 'T', 'S', 'T', 'A', 'T', 'E', 0, |
| /* 1248 */ 'R', '1', '2', '_', 'S', 'P', 0, |
| /* 1255 */ 'F', 'P', 'S', 'C', 'R', 0, |
| /* 1261 */ 'L', 'R', 0, |
| /* 1264 */ 'V', 'P', 'R', 0, |
| /* 1268 */ 'A', 'P', 'S', 'R', 0, |
| /* 1273 */ 'C', 'P', 'S', 'R', 0, |
| /* 1278 */ 'S', 'P', 'S', 'R', 0, |
| /* 1283 */ 'Z', 'R', 0, |
| /* 1286 */ 'F', 'P', 'C', 'X', 'T', 'N', 'S', 0, |
| /* 1294 */ 'F', 'P', 'C', 'X', 'T', 'S', 0, |
| /* 1301 */ 'F', 'P', 'I', 'N', 'S', 'T', 0, |
| /* 1308 */ 'F', 'P', 'S', 'C', 'R', '_', 'N', 'Z', 'C', 'V', 0, |
| /* 1319 */ 'A', 'P', 'S', 'R', '_', 'N', 'Z', 'C', 'V', 0, |
| 0 |
| }; |
| |
| extern const MCRegisterDesc ARMRegDesc[] = { // Descriptors |
| { 12, 0, 0, 0, 0, 0 }, |
| { 1268, 16, 16, 2, 66865, 0 }, |
| { 1319, 16, 16, 2, 66865, 0 }, |
| { 1273, 16, 16, 2, 66865, 0 }, |
| { 1286, 16, 16, 2, 66865, 0 }, |
| { 1294, 16, 16, 2, 66865, 0 }, |
| { 1215, 16, 16, 2, 66865, 0 }, |
| { 1301, 16, 16, 2, 66865, 0 }, |
| { 1255, 16, 16, 2, 17616, 0 }, |
| { 1308, 16, 16, 2, 17616, 0 }, |
| { 1202, 16, 16, 2, 66833, 0 }, |
| { 1221, 16, 16, 2, 66833, 0 }, |
| { 1240, 16, 16, 2, 66833, 0 }, |
| { 1261, 16, 16, 2, 66833, 0 }, |
| { 1199, 16, 16, 2, 66833, 0 }, |
| { 1227, 16, 16, 2, 66833, 0 }, |
| { 1252, 16, 1521, 2, 66833, 0 }, |
| { 1278, 16, 16, 2, 66833, 0 }, |
| { 1264, 16, 16, 2, 66833, 0 }, |
| { 1283, 16, 16, 2, 66833, 0 }, |
| { 119, 350, 4008, 19, 13202, 8 }, |
| { 251, 357, 2474, 19, 13202, 8 }, |
| { 366, 364, 3957, 19, 13202, 8 }, |
| { 482, 378, 3845, 19, 13202, 8 }, |
| { 608, 392, 3893, 19, 13202, 8 }, |
| { 726, 406, 3724, 19, 13202, 8 }, |
| { 840, 420, 3780, 19, 13202, 8 }, |
| { 946, 434, 3599, 19, 13202, 8 }, |
| { 1060, 448, 3659, 19, 13202, 8 }, |
| { 1166, 462, 3479, 19, 13202, 8 }, |
| { 9, 476, 3539, 19, 13202, 8 }, |
| { 144, 490, 3359, 19, 13202, 8 }, |
| { 285, 504, 3419, 19, 13202, 8 }, |
| { 411, 518, 3239, 19, 13202, 8 }, |
| { 526, 532, 3299, 19, 13202, 8 }, |
| { 652, 546, 3144, 19, 13202, 8 }, |
| { 771, 16, 3203, 2, 17713, 0 }, |
| { 885, 16, 3073, 2, 17713, 0 }, |
| { 991, 16, 3108, 2, 17713, 0 }, |
| { 1105, 16, 3003, 2, 17713, 0 }, |
| { 59, 16, 3038, 2, 17713, 0 }, |
| { 195, 16, 2933, 2, 17713, 0 }, |
| { 339, 16, 2968, 2, 17713, 0 }, |
| { 459, 16, 2863, 2, 17713, 0 }, |
| { 578, 16, 2898, 2, 17713, 0 }, |
| { 700, 16, 2792, 2, 17713, 0 }, |
| { 807, 16, 2832, 2, 17713, 0 }, |
| { 917, 16, 2358, 2, 17713, 0 }, |
| { 1027, 16, 2406, 2, 17713, 0 }, |
| { 1137, 16, 2379, 2, 17713, 0 }, |
| { 95, 16, 2424, 2, 17713, 0 }, |
| { 227, 16, 2784, 2, 17713, 0 }, |
| { 393, 16, 16, 2, 17713, 0 }, |
| { 128, 16, 16, 2, 17713, 0 }, |
| { 260, 16, 16, 2, 17713, 0 }, |
| { 384, 16, 16, 2, 17713, 0 }, |
| { 122, 16, 16, 2, 17713, 0 }, |
| { 125, 353, 1109, 22, 2196, 11 }, |
| { 257, 374, 775, 22, 2196, 11 }, |
| { 381, 402, 314, 22, 2196, 11 }, |
| { 503, 430, 244, 22, 2196, 11 }, |
| { 632, 458, 234, 22, 2196, 11 }, |
| { 747, 486, 224, 22, 2196, 11 }, |
| { 864, 514, 214, 22, 2196, 11 }, |
| { 967, 542, 204, 22, 2196, 11 }, |
| { 1084, 804, 194, 0, 12818, 20 }, |
| { 1187, 807, 184, 0, 12818, 20 }, |
| { 35, 810, 174, 0, 12818, 20 }, |
| { 171, 813, 164, 0, 12818, 20 }, |
| { 315, 816, 154, 0, 12818, 20 }, |
| { 439, 819, 591, 0, 12818, 20 }, |
| { 558, 822, 2442, 0, 12818, 20 }, |
| { 680, 825, 1103, 0, 12818, 20 }, |
| { 131, 16, 1368, 2, 66833, 0 }, |
| { 263, 16, 1366, 2, 66833, 0 }, |
| { 387, 16, 1366, 2, 66833, 0 }, |
| { 509, 16, 1364, 2, 66833, 0 }, |
| { 635, 16, 1364, 2, 66833, 0 }, |
| { 753, 16, 1362, 2, 66833, 0 }, |
| { 867, 16, 1362, 2, 66833, 0 }, |
| { 973, 16, 1360, 2, 66833, 0 }, |
| { 1087, 16, 1360, 2, 66833, 0 }, |
| { 1193, 16, 1358, 2, 66833, 0 }, |
| { 39, 16, 1358, 2, 66833, 0 }, |
| { 179, 16, 1356, 2, 66833, 0 }, |
| { 319, 16, 1356, 2, 66833, 0 }, |
| { 134, 16, 4016, 2, 65345, 0 }, |
| { 272, 16, 4007, 2, 65345, 0 }, |
| { 390, 16, 2485, 2, 65345, 0 }, |
| { 512, 16, 2473, 2, 65345, 0 }, |
| { 638, 16, 3974, 2, 65345, 0 }, |
| { 756, 16, 3956, 2, 65345, 0 }, |
| { 870, 16, 3863, 2, 65345, 0 }, |
| { 976, 16, 3844, 2, 65345, 0 }, |
| { 1090, 16, 3914, 2, 65345, 0 }, |
| { 1196, 16, 3892, 2, 65345, 0 }, |
| { 43, 16, 3745, 2, 65345, 0 }, |
| { 183, 16, 3723, 2, 65345, 0 }, |
| { 323, 16, 3803, 2, 65345, 0 }, |
| { 443, 16, 3779, 2, 65345, 0 }, |
| { 562, 16, 3622, 2, 65345, 0 }, |
| { 684, 16, 3598, 2, 65345, 0 }, |
| { 791, 16, 3682, 2, 65345, 0 }, |
| { 901, 16, 3658, 2, 65345, 0 }, |
| { 1011, 16, 3502, 2, 65345, 0 }, |
| { 1121, 16, 3478, 2, 65345, 0 }, |
| { 79, 16, 3562, 2, 65345, 0 }, |
| { 215, 16, 3538, 2, 65345, 0 }, |
| { 359, 16, 3382, 2, 65345, 0 }, |
| { 475, 16, 3358, 2, 65345, 0 }, |
| { 598, 16, 3442, 2, 65345, 0 }, |
| { 716, 16, 3418, 2, 65345, 0 }, |
| { 827, 16, 3262, 2, 65345, 0 }, |
| { 933, 16, 3238, 2, 65345, 0 }, |
| { 1047, 16, 3322, 2, 65345, 0 }, |
| { 1153, 16, 3298, 2, 65345, 0 }, |
| { 115, 16, 3167, 2, 65345, 0 }, |
| { 247, 16, 3143, 2, 65345, 0 }, |
| { 363, 367, 4010, 29, 5426, 23 }, |
| { 479, 381, 2497, 29, 5426, 23 }, |
| { 605, 395, 3992, 29, 5426, 23 }, |
| { 723, 409, 3882, 29, 5426, 23 }, |
| { 837, 423, 3936, 29, 5426, 23 }, |
| { 943, 437, 3767, 29, 5426, 23 }, |
| { 1057, 451, 3827, 29, 5426, 23 }, |
| { 1163, 465, 3646, 29, 5426, 23 }, |
| { 6, 479, 3706, 29, 5426, 23 }, |
| { 154, 493, 3526, 29, 5426, 23 }, |
| { 281, 507, 3586, 29, 5426, 23 }, |
| { 407, 521, 3406, 29, 5426, 23 }, |
| { 522, 535, 3466, 29, 5426, 23 }, |
| { 648, 549, 3286, 29, 5426, 23 }, |
| { 767, 3948, 3346, 11, 17554, 35 }, |
| { 881, 3839, 3191, 11, 13474, 35 }, |
| { 987, 1077, 3226, 8, 17281, 39 }, |
| { 1101, 1077, 3096, 8, 17281, 39 }, |
| { 55, 1077, 3131, 8, 17281, 39 }, |
| { 207, 1077, 3026, 8, 17281, 39 }, |
| { 335, 1077, 3061, 8, 17281, 39 }, |
| { 455, 1077, 2956, 8, 17281, 39 }, |
| { 574, 1077, 2991, 8, 17281, 39 }, |
| { 696, 1077, 2886, 8, 17281, 39 }, |
| { 803, 1077, 2921, 8, 17281, 39 }, |
| { 913, 1077, 2815, 8, 17281, 39 }, |
| { 1023, 1077, 2853, 8, 17281, 39 }, |
| { 1133, 1077, 2396, 8, 17281, 39 }, |
| { 91, 1077, 2435, 8, 17281, 39 }, |
| { 239, 1077, 2786, 8, 17281, 39 }, |
| { 254, 1336, 1111, 168, 1044, 57 }, |
| { 378, 1316, 347, 168, 1044, 57 }, |
| { 500, 1296, 142, 168, 1044, 57 }, |
| { 629, 1276, 142, 168, 1044, 57 }, |
| { 744, 1256, 142, 168, 1044, 57 }, |
| { 861, 1236, 142, 168, 1044, 57 }, |
| { 964, 1216, 142, 168, 1044, 57 }, |
| { 1081, 1200, 142, 88, 1456, 74 }, |
| { 1184, 1188, 142, 76, 2114, 87 }, |
| { 32, 1176, 142, 76, 2114, 87 }, |
| { 167, 1164, 142, 76, 2114, 87 }, |
| { 311, 1152, 142, 76, 2114, 87 }, |
| { 435, 1140, 142, 76, 2114, 87 }, |
| { 554, 1128, 344, 76, 2114, 87 }, |
| { 676, 1116, 1105, 76, 2114, 87 }, |
| { 494, 2151, 16, 474, 4, 149 }, |
| { 623, 2096, 16, 474, 4, 149 }, |
| { 738, 2041, 16, 474, 4, 149 }, |
| { 855, 1986, 16, 474, 4, 149 }, |
| { 958, 1931, 16, 474, 4, 149 }, |
| { 1075, 1880, 16, 423, 272, 166 }, |
| { 1178, 1833, 16, 376, 512, 181 }, |
| { 26, 1790, 16, 333, 720, 194 }, |
| { 161, 1751, 16, 294, 1186, 205 }, |
| { 304, 1712, 16, 294, 1186, 205 }, |
| { 427, 1673, 16, 294, 1186, 205 }, |
| { 546, 1634, 16, 294, 1186, 205 }, |
| { 668, 1595, 16, 294, 1186, 205 }, |
| { 266, 783, 16, 16, 8946, 5 }, |
| { 506, 786, 16, 16, 8946, 5 }, |
| { 750, 789, 16, 16, 8946, 5 }, |
| { 970, 792, 16, 16, 8946, 5 }, |
| { 1190, 795, 16, 16, 8946, 5 }, |
| { 175, 798, 16, 16, 8946, 5 }, |
| { 1248, 4074, 16, 16, 17808, 2 }, |
| { 369, 1508, 1110, 63, 1570, 28 }, |
| { 485, 4164, 2506, 63, 1570, 28 }, |
| { 614, 1495, 778, 63, 1570, 28 }, |
| { 729, 4151, 770, 63, 1570, 28 }, |
| { 846, 1482, 317, 63, 1570, 28 }, |
| { 949, 4138, 660, 63, 1570, 28 }, |
| { 1066, 1469, 308, 63, 1570, 28 }, |
| { 1169, 4125, 654, 63, 1570, 28 }, |
| { 16, 1456, 302, 63, 1570, 28 }, |
| { 137, 4112, 648, 63, 1570, 28 }, |
| { 292, 1443, 296, 63, 1570, 28 }, |
| { 415, 4099, 642, 63, 1570, 28 }, |
| { 534, 1430, 290, 63, 1570, 28 }, |
| { 656, 4086, 636, 63, 1570, 28 }, |
| { 779, 1419, 284, 52, 1680, 42 }, |
| { 889, 4077, 630, 43, 1872, 48 }, |
| { 999, 1412, 278, 36, 2401, 53 }, |
| { 1109, 4067, 624, 36, 2401, 53 }, |
| { 67, 1405, 272, 36, 2401, 53 }, |
| { 187, 4060, 618, 36, 2401, 53 }, |
| { 347, 1398, 266, 36, 2401, 53 }, |
| { 463, 4053, 612, 36, 2401, 53 }, |
| { 586, 1391, 260, 36, 2401, 53 }, |
| { 704, 4046, 606, 36, 2401, 53 }, |
| { 815, 1384, 254, 36, 2401, 53 }, |
| { 921, 4039, 600, 36, 2401, 53 }, |
| { 1035, 1377, 765, 36, 2401, 53 }, |
| { 1141, 4032, 2450, 36, 2401, 53 }, |
| { 103, 1370, 2469, 36, 2401, 53 }, |
| { 219, 4025, 1104, 36, 2401, 53 }, |
| { 602, 1023, 4013, 212, 5314, 92 }, |
| { 720, 1011, 3953, 212, 5314, 92 }, |
| { 834, 999, 4002, 212, 5314, 92 }, |
| { 940, 987, 3909, 212, 5314, 92 }, |
| { 1054, 975, 3909, 212, 5314, 92 }, |
| { 1160, 963, 3798, 212, 5314, 92 }, |
| { 3, 951, 3798, 212, 5314, 92 }, |
| { 151, 939, 3677, 212, 5314, 92 }, |
| { 278, 927, 3677, 212, 5314, 92 }, |
| { 404, 915, 3557, 212, 5314, 92 }, |
| { 518, 903, 3557, 212, 5314, 92 }, |
| { 644, 891, 3437, 212, 5314, 92 }, |
| { 763, 1067, 3437, 202, 17458, 99 }, |
| { 877, 1057, 3317, 202, 13378, 99 }, |
| { 983, 1049, 3317, 194, 14178, 105 }, |
| { 1097, 1041, 3221, 194, 13650, 105 }, |
| { 51, 1035, 3221, 188, 14001, 110 }, |
| { 203, 1035, 3126, 188, 14001, 110 }, |
| { 331, 1035, 3126, 188, 14001, 110 }, |
| { 451, 1035, 3056, 188, 14001, 110 }, |
| { 570, 1035, 3056, 188, 14001, 110 }, |
| { 692, 1035, 2986, 188, 14001, 110 }, |
| { 799, 1035, 2986, 188, 14001, 110 }, |
| { 909, 1035, 2916, 188, 14001, 110 }, |
| { 1019, 1035, 2916, 188, 14001, 110 }, |
| { 1129, 1035, 2827, 188, 14001, 110 }, |
| { 87, 1035, 2850, 188, 14001, 110 }, |
| { 235, 1035, 2789, 188, 14001, 110 }, |
| { 831, 2672, 4014, 276, 5170, 114 }, |
| { 937, 2654, 3951, 276, 5170, 114 }, |
| { 1051, 2636, 3951, 276, 5170, 114 }, |
| { 1157, 2618, 3842, 276, 5170, 114 }, |
| { 0, 2600, 3842, 276, 5170, 114 }, |
| { 148, 2582, 3721, 276, 5170, 114 }, |
| { 275, 2564, 3721, 276, 5170, 114 }, |
| { 401, 2546, 3620, 276, 5170, 114 }, |
| { 515, 2528, 3620, 276, 5170, 114 }, |
| { 641, 2510, 3500, 276, 5170, 114 }, |
| { 759, 2768, 3500, 260, 17330, 123 }, |
| { 873, 2752, 3380, 260, 13250, 123 }, |
| { 979, 2738, 3380, 246, 14066, 131 }, |
| { 1093, 2724, 3260, 246, 13538, 131 }, |
| { 47, 2712, 3260, 234, 13906, 138 }, |
| { 199, 2700, 3165, 234, 13730, 138 }, |
| { 327, 2690, 3165, 224, 13825, 144 }, |
| { 447, 2690, 3094, 224, 13825, 144 }, |
| { 566, 2690, 3094, 224, 13825, 144 }, |
| { 688, 2690, 3024, 224, 13825, 144 }, |
| { 795, 2690, 3024, 224, 13825, 144 }, |
| { 905, 2690, 2954, 224, 13825, 144 }, |
| { 1015, 2690, 2954, 224, 13825, 144 }, |
| { 1125, 2690, 2851, 224, 13825, 144 }, |
| { 83, 2690, 2851, 224, 13825, 144 }, |
| { 231, 2690, 2790, 224, 13825, 144 }, |
| { 372, 360, 2504, 22, 1956, 11 }, |
| { 617, 388, 583, 22, 1956, 11 }, |
| { 849, 416, 756, 22, 1956, 11 }, |
| { 1069, 444, 747, 22, 1956, 11 }, |
| { 19, 472, 738, 22, 1956, 11 }, |
| { 296, 500, 729, 22, 1956, 11 }, |
| { 538, 528, 720, 22, 1956, 11 }, |
| { 783, 3718, 711, 3, 2336, 16 }, |
| { 1003, 562, 702, 0, 8898, 20 }, |
| { 71, 565, 693, 0, 8898, 20 }, |
| { 351, 568, 684, 0, 8898, 20 }, |
| { 590, 571, 675, 0, 8898, 20 }, |
| { 819, 574, 666, 0, 8898, 20 }, |
| { 1039, 577, 2455, 0, 8898, 20 }, |
| { 107, 580, 2463, 0, 8898, 20 }, |
| { 611, 2338, 2483, 148, 900, 57 }, |
| { 843, 2318, 588, 148, 900, 57 }, |
| { 1063, 2298, 588, 148, 900, 57 }, |
| { 13, 2278, 588, 148, 900, 57 }, |
| { 289, 2258, 588, 148, 900, 57 }, |
| { 530, 2238, 588, 148, 900, 57 }, |
| { 775, 2220, 588, 130, 1328, 66 }, |
| { 995, 2206, 588, 116, 1776, 81 }, |
| { 63, 1583, 588, 104, 2034, 87 }, |
| { 343, 1571, 588, 104, 2034, 87 }, |
| { 582, 1559, 588, 104, 2034, 87 }, |
| { 811, 1547, 588, 104, 2034, 87 }, |
| { 1031, 1535, 588, 104, 2034, 87 }, |
| { 99, 1523, 2377, 104, 2034, 87 }, |
| }; |
| |
| extern const MCPhysReg ARMRegUnitRoots[][2] = { |
| { ARM::APSR }, |
| { ARM::APSR_NZCV }, |
| { ARM::CPSR }, |
| { ARM::FPCXTNS }, |
| { ARM::FPCXTS }, |
| { ARM::FPEXC }, |
| { ARM::FPINST }, |
| { ARM::FPSCR, ARM::FPSCR_NZCV }, |
| { ARM::FPSCR_NZCVQC }, |
| { ARM::FPSID }, |
| { ARM::ITSTATE }, |
| { ARM::LR }, |
| { ARM::PC }, |
| { ARM::RA_AUTH_CODE }, |
| { ARM::SP }, |
| { ARM::SPSR }, |
| { ARM::VPR }, |
| { ARM::ZR }, |
| { ARM::S0 }, |
| { ARM::S1 }, |
| { ARM::S2 }, |
| { ARM::S3 }, |
| { ARM::S4 }, |
| { ARM::S5 }, |
| { ARM::S6 }, |
| { ARM::S7 }, |
| { ARM::S8 }, |
| { ARM::S9 }, |
| { ARM::S10 }, |
| { ARM::S11 }, |
| { ARM::S12 }, |
| { ARM::S13 }, |
| { ARM::S14 }, |
| { ARM::S15 }, |
| { ARM::S16 }, |
| { ARM::S17 }, |
| { ARM::S18 }, |
| { ARM::S19 }, |
| { ARM::S20 }, |
| { ARM::S21 }, |
| { ARM::S22 }, |
| { ARM::S23 }, |
| { ARM::S24 }, |
| { ARM::S25 }, |
| { ARM::S26 }, |
| { ARM::S27 }, |
| { ARM::S28 }, |
| { ARM::S29 }, |
| { ARM::S30 }, |
| { ARM::S31 }, |
| { ARM::D16 }, |
| { ARM::D17 }, |
| { ARM::D18 }, |
| { ARM::D19 }, |
| { ARM::D20 }, |
| { ARM::D21 }, |
| { ARM::D22 }, |
| { ARM::D23 }, |
| { ARM::D24 }, |
| { ARM::D25 }, |
| { ARM::D26 }, |
| { ARM::D27 }, |
| { ARM::D28 }, |
| { ARM::D29 }, |
| { ARM::D30 }, |
| { ARM::D31 }, |
| { ARM::FPINST2 }, |
| { ARM::MVFR0 }, |
| { ARM::MVFR1 }, |
| { ARM::MVFR2 }, |
| { ARM::P0 }, |
| { ARM::R0 }, |
| { ARM::R1 }, |
| { ARM::R2 }, |
| { ARM::R3 }, |
| { ARM::R4 }, |
| { ARM::R5 }, |
| { ARM::R6 }, |
| { ARM::R7 }, |
| { ARM::R8 }, |
| { ARM::R9 }, |
| { ARM::R10 }, |
| { ARM::R11 }, |
| { ARM::R12 }, |
| }; |
| |
| namespace { // Register classes... |
| // HPR Register Class... |
| const MCPhysReg HPR[] = { |
| ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, |
| }; |
| |
| // HPR Bit set. |
| const uint8_t HPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, |
| }; |
| |
| // FPWithVPR Register Class... |
| const MCPhysReg FPWithVPR[] = { |
| ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, ARM::VPR, |
| }; |
| |
| // FPWithVPR Bit set. |
| const uint8_t FPWithVPRBits[] = { |
| 0x00, 0x00, 0xf4, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, |
| }; |
| |
| // SPR Register Class... |
| const MCPhysReg SPR[] = { |
| ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, |
| }; |
| |
| // SPR Bit set. |
| const uint8_t SPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, |
| }; |
| |
| // FPWithVPR_with_ssub_0 Register Class... |
| const MCPhysReg FPWithVPR_with_ssub_0[] = { |
| ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, |
| }; |
| |
| // FPWithVPR_with_ssub_0 Bit set. |
| const uint8_t FPWithVPR_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0xf0, 0xff, 0x0f, |
| }; |
| |
| // GPR Register Class... |
| const MCPhysReg GPR[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC, |
| }; |
| |
| // GPR Bit set. |
| const uint8_t GPRBits[] = { |
| 0x00, 0x60, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRwithAPSR Register Class... |
| const MCPhysReg GPRwithAPSR[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::APSR_NZCV, |
| }; |
| |
| // GPRwithAPSR Bit set. |
| const uint8_t GPRwithAPSRBits[] = { |
| 0x04, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRwithZR Register Class... |
| const MCPhysReg GPRwithZR[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::ZR, |
| }; |
| |
| // GPRwithZR Bit set. |
| const uint8_t GPRwithZRBits[] = { |
| 0x00, 0x20, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // SPR_8 Register Class... |
| const MCPhysReg SPR_8[] = { |
| ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15, |
| }; |
| |
| // SPR_8 Bit set. |
| const uint8_t SPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, |
| }; |
| |
| // GPRnopc Register Class... |
| const MCPhysReg GPRnopc[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, |
| }; |
| |
| // GPRnopc Bit set. |
| const uint8_t GPRnopcBits[] = { |
| 0x00, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRnosp Register Class... |
| const MCPhysReg GPRnosp[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::PC, |
| }; |
| |
| // GPRnosp Bit set. |
| const uint8_t GPRnospBits[] = { |
| 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRwithAPSR_NZCVnosp Register Class... |
| const MCPhysReg GPRwithAPSR_NZCVnosp[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::APSR_NZCV, |
| }; |
| |
| // GPRwithAPSR_NZCVnosp Bit set. |
| const uint8_t GPRwithAPSR_NZCVnospBits[] = { |
| 0x04, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRwithAPSRnosp Register Class... |
| const MCPhysReg GPRwithAPSRnosp[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::APSR, |
| }; |
| |
| // GPRwithAPSRnosp Bit set. |
| const uint8_t GPRwithAPSRnospBits[] = { |
| 0x02, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRwithZRnosp Register Class... |
| const MCPhysReg GPRwithZRnosp[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::ZR, |
| }; |
| |
| // GPRwithZRnosp Bit set. |
| const uint8_t GPRwithZRnospBits[] = { |
| 0x00, 0x20, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRnoip Register Class... |
| const MCPhysReg GPRnoip[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC, |
| }; |
| |
| // GPRnoip Bit set. |
| const uint8_t GPRnoipBits[] = { |
| 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| }; |
| |
| // rGPR Register Class... |
| const MCPhysReg rGPR[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, |
| }; |
| |
| // rGPR Bit set. |
| const uint8_t rGPRBits[] = { |
| 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x3f, |
| }; |
| |
| // GPRnoip_and_GPRnopc Register Class... |
| const MCPhysReg GPRnoip_and_GPRnopc[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, |
| }; |
| |
| // GPRnoip_and_GPRnopc Bit set. |
| const uint8_t GPRnoip_and_GPRnopcBits[] = { |
| 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| }; |
| |
| // GPRnoip_and_GPRnosp Register Class... |
| const MCPhysReg GPRnoip_and_GPRnosp[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC, |
| }; |
| |
| // GPRnoip_and_GPRnosp Bit set. |
| const uint8_t GPRnoip_and_GPRnospBits[] = { |
| 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| }; |
| |
| // GPRnoip_and_GPRwithAPSR_NZCVnosp Register Class... |
| const MCPhysReg GPRnoip_and_GPRwithAPSR_NZCVnosp[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, |
| }; |
| |
| // GPRnoip_and_GPRwithAPSR_NZCVnosp Bit set. |
| const uint8_t GPRnoip_and_GPRwithAPSR_NZCVnospBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x1f, |
| }; |
| |
| // tGPRwithpc Register Class... |
| const MCPhysReg tGPRwithpc[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::PC, |
| }; |
| |
| // tGPRwithpc Bit set. |
| const uint8_t tGPRwithpcBits[] = { |
| 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| }; |
| |
| // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 Register Class... |
| const MCPhysReg FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8[] = { |
| ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, |
| }; |
| |
| // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 Bit set. |
| const uint8_t FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits[] = { |
| 0x00, 0x00, 0xf0, 0x0f, |
| }; |
| |
| // hGPR Register Class... |
| const MCPhysReg hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, ARM::PC, |
| }; |
| |
| // hGPR Bit set. |
| const uint8_t hGPRBits[] = { |
| 0x00, 0x60, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| }; |
| |
| // tGPR Register Class... |
| const MCPhysReg tGPR[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, |
| }; |
| |
| // tGPR Bit set. |
| const uint8_t tGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| }; |
| |
| // tGPREven Register Class... |
| const MCPhysReg tGPREven[] = { |
| ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8, ARM::R10, ARM::R12, ARM::LR, |
| }; |
| |
| // tGPREven Bit set. |
| const uint8_t tGPREvenBits[] = { |
| 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x2a, |
| }; |
| |
| // GPRnopc_and_hGPR Register Class... |
| const MCPhysReg GPRnopc_and_hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::LR, |
| }; |
| |
| // GPRnopc_and_hGPR Bit set. |
| const uint8_t GPRnopc_and_hGPRBits[] = { |
| 0x00, 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| }; |
| |
| // GPRnosp_and_hGPR Register Class... |
| const MCPhysReg GPRnosp_and_hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::PC, |
| }; |
| |
| // GPRnosp_and_hGPR Bit set. |
| const uint8_t GPRnosp_and_hGPRBits[] = { |
| 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| }; |
| |
| // GPRnoip_and_hGPR Register Class... |
| const MCPhysReg GPRnoip_and_hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC, |
| }; |
| |
| // GPRnoip_and_hGPR Bit set. |
| const uint8_t GPRnoip_and_hGPRBits[] = { |
| 0x00, 0x40, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| }; |
| |
| // GPRnoip_and_tGPREven Register Class... |
| const MCPhysReg GPRnoip_and_tGPREven[] = { |
| ARM::R0, ARM::R2, ARM::R4, ARM::R6, ARM::R8, ARM::R10, |
| }; |
| |
| // GPRnoip_and_tGPREven Bit set. |
| const uint8_t GPRnoip_and_tGPREvenBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x0a, |
| }; |
| |
| // GPRnosp_and_GPRnopc_and_hGPR Register Class... |
| const MCPhysReg GPRnosp_and_GPRnopc_and_hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, |
| }; |
| |
| // GPRnosp_and_GPRnopc_and_hGPR Bit set. |
| const uint8_t GPRnosp_and_GPRnopc_and_hGPRBits[] = { |
| 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, |
| }; |
| |
| // tGPROdd Register Class... |
| const MCPhysReg tGPROdd[] = { |
| ARM::R1, ARM::R3, ARM::R5, ARM::R7, ARM::R9, ARM::R11, |
| }; |
| |
| // tGPROdd Bit set. |
| const uint8_t tGPROddBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x15, |
| }; |
| |
| // GPRnopc_and_GPRnoip_and_hGPR Register Class... |
| const MCPhysReg GPRnopc_and_GPRnoip_and_hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, |
| }; |
| |
| // GPRnopc_and_GPRnoip_and_hGPR Bit set. |
| const uint8_t GPRnopc_and_GPRnoip_and_hGPRBits[] = { |
| 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| }; |
| |
| // GPRnosp_and_GPRnoip_and_hGPR Register Class... |
| const MCPhysReg GPRnosp_and_GPRnoip_and_hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC, |
| }; |
| |
| // GPRnosp_and_GPRnoip_and_hGPR Bit set. |
| const uint8_t GPRnosp_and_GPRnoip_and_hGPRBits[] = { |
| 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| }; |
| |
| // tcGPR Register Class... |
| const MCPhysReg tcGPR[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R12, |
| }; |
| |
| // tcGPR Bit set. |
| const uint8_t tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x20, |
| }; |
| |
| // GPRnoip_and_tcGPR Register Class... |
| const MCPhysReg GPRnoip_and_tcGPR[] = { |
| ARM::R0, ARM::R1, ARM::R2, ARM::R3, |
| }; |
| |
| // GPRnoip_and_tcGPR Bit set. |
| const uint8_t GPRnoip_and_tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| }; |
| |
| // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR Register Class... |
| const MCPhysReg GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR[] = { |
| ARM::R8, ARM::R9, ARM::R10, ARM::R11, |
| }; |
| |
| // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR Bit set. |
| const uint8_t GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| }; |
| |
| // hGPR_and_tGPREven Register Class... |
| const MCPhysReg hGPR_and_tGPREven[] = { |
| ARM::R8, ARM::R10, ARM::R12, ARM::LR, |
| }; |
| |
| // hGPR_and_tGPREven Bit set. |
| const uint8_t hGPR_and_tGPREvenBits[] = { |
| 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2a, |
| }; |
| |
| // tGPR_and_tGPREven Register Class... |
| const MCPhysReg tGPR_and_tGPREven[] = { |
| ARM::R0, ARM::R2, ARM::R4, ARM::R6, |
| }; |
| |
| // tGPR_and_tGPREven Bit set. |
| const uint8_t tGPR_and_tGPREvenBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, |
| }; |
| |
| // tGPR_and_tGPROdd Register Class... |
| const MCPhysReg tGPR_and_tGPROdd[] = { |
| ARM::R1, ARM::R3, ARM::R5, ARM::R7, |
| }; |
| |
| // tGPR_and_tGPROdd Bit set. |
| const uint8_t tGPR_and_tGPROddBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x01, |
| }; |
| |
| // tGPREven_and_tcGPR Register Class... |
| const MCPhysReg tGPREven_and_tcGPR[] = { |
| ARM::R0, ARM::R2, ARM::R12, |
| }; |
| |
| // tGPREven_and_tcGPR Bit set. |
| const uint8_t tGPREven_and_tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x20, |
| }; |
| |
| // hGPR_and_GPRnoip_and_tGPREven Register Class... |
| const MCPhysReg hGPR_and_GPRnoip_and_tGPREven[] = { |
| ARM::R8, ARM::R10, |
| }; |
| |
| // hGPR_and_GPRnoip_and_tGPREven Bit set. |
| const uint8_t hGPR_and_GPRnoip_and_tGPREvenBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, |
| }; |
| |
| // hGPR_and_tGPROdd Register Class... |
| const MCPhysReg hGPR_and_tGPROdd[] = { |
| ARM::R9, ARM::R11, |
| }; |
| |
| // hGPR_and_tGPROdd Bit set. |
| const uint8_t hGPR_and_tGPROddBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, |
| }; |
| |
| // tGPREven_and_GPRnoip_and_tcGPR Register Class... |
| const MCPhysReg tGPREven_and_GPRnoip_and_tcGPR[] = { |
| ARM::R0, ARM::R2, |
| }; |
| |
| // tGPREven_and_GPRnoip_and_tcGPR Bit set. |
| const uint8_t tGPREven_and_GPRnoip_and_tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, |
| }; |
| |
| // tGPROdd_and_tcGPR Register Class... |
| const MCPhysReg tGPROdd_and_tcGPR[] = { |
| ARM::R1, ARM::R3, |
| }; |
| |
| // tGPROdd_and_tcGPR Bit set. |
| const uint8_t tGPROdd_and_tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, |
| }; |
| |
| // CCR Register Class... |
| const MCPhysReg CCR[] = { |
| ARM::CPSR, |
| }; |
| |
| // CCR Bit set. |
| const uint8_t CCRBits[] = { |
| 0x08, |
| }; |
| |
| // FPCXTRegs Register Class... |
| const MCPhysReg FPCXTRegs[] = { |
| ARM::FPCXTNS, |
| }; |
| |
| // FPCXTRegs Bit set. |
| const uint8_t FPCXTRegsBits[] = { |
| 0x10, |
| }; |
| |
| // GPRlr Register Class... |
| const MCPhysReg GPRlr[] = { |
| ARM::LR, |
| }; |
| |
| // GPRlr Bit set. |
| const uint8_t GPRlrBits[] = { |
| 0x00, 0x20, |
| }; |
| |
| // GPRsp Register Class... |
| const MCPhysReg GPRsp[] = { |
| ARM::SP, |
| }; |
| |
| // GPRsp Bit set. |
| const uint8_t GPRspBits[] = { |
| 0x00, 0x00, 0x01, |
| }; |
| |
| // VCCR Register Class... |
| const MCPhysReg VCCR[] = { |
| ARM::VPR, |
| }; |
| |
| // VCCR Bit set. |
| const uint8_t VCCRBits[] = { |
| 0x00, 0x00, 0x04, |
| }; |
| |
| // cl_FPSCR_NZCV Register Class... |
| const MCPhysReg cl_FPSCR_NZCV[] = { |
| ARM::FPSCR_NZCV, |
| }; |
| |
| // cl_FPSCR_NZCV Bit set. |
| const uint8_t cl_FPSCR_NZCVBits[] = { |
| 0x00, 0x02, |
| }; |
| |
| // hGPR_and_tGPRwithpc Register Class... |
| const MCPhysReg hGPR_and_tGPRwithpc[] = { |
| ARM::PC, |
| }; |
| |
| // hGPR_and_tGPRwithpc Bit set. |
| const uint8_t hGPR_and_tGPRwithpcBits[] = { |
| 0x00, 0x40, |
| }; |
| |
| // hGPR_and_tcGPR Register Class... |
| const MCPhysReg hGPR_and_tcGPR[] = { |
| ARM::R12, |
| }; |
| |
| // hGPR_and_tcGPR Bit set. |
| const uint8_t hGPR_and_tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| }; |
| |
| // DPR Register Class... |
| const MCPhysReg DPR[] = { |
| ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, |
| }; |
| |
| // DPR Bit set. |
| const uint8_t DPRBits[] = { |
| 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| }; |
| |
| // DPR_VFP2 Register Class... |
| const MCPhysReg DPR_VFP2[] = { |
| ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, |
| }; |
| |
| // DPR_VFP2 Bit set. |
| const uint8_t DPR_VFP2Bits[] = { |
| 0x00, 0x00, 0xf0, 0xff, 0x0f, |
| }; |
| |
| // DPR_8 Register Class... |
| const MCPhysReg DPR_8[] = { |
| ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, |
| }; |
| |
| // DPR_8 Bit set. |
| const uint8_t DPR_8Bits[] = { |
| 0x00, 0x00, 0xf0, 0x0f, |
| }; |
| |
| // GPRPair Register Class... |
| const MCPhysReg GPRPair[] = { |
| ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11, ARM::R12_SP, |
| }; |
| |
| // GPRPair Bit set. |
| const uint8_t GPRPairBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, |
| }; |
| |
| // GPRPairnosp Register Class... |
| const MCPhysReg GPRPairnosp[] = { |
| ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, ARM::R8_R9, ARM::R10_R11, |
| }; |
| |
| // GPRPairnosp Bit set. |
| const uint8_t GPRPairnospBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, |
| }; |
| |
| // GPRPair_with_gsub_0_in_tGPR Register Class... |
| const MCPhysReg GPRPair_with_gsub_0_in_tGPR[] = { |
| ARM::R0_R1, ARM::R2_R3, ARM::R4_R5, ARM::R6_R7, |
| }; |
| |
| // GPRPair_with_gsub_0_in_tGPR Bit set. |
| const uint8_t GPRPair_with_gsub_0_in_tGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, |
| }; |
| |
| // GPRPair_with_gsub_0_in_hGPR Register Class... |
| const MCPhysReg GPRPair_with_gsub_0_in_hGPR[] = { |
| ARM::R8_R9, ARM::R10_R11, ARM::R12_SP, |
| }; |
| |
| // GPRPair_with_gsub_0_in_hGPR Bit set. |
| const uint8_t GPRPair_with_gsub_0_in_hGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, |
| }; |
| |
| // GPRPair_with_gsub_0_in_tcGPR Register Class... |
| const MCPhysReg GPRPair_with_gsub_0_in_tcGPR[] = { |
| ARM::R0_R1, ARM::R2_R3, ARM::R12_SP, |
| }; |
| |
| // GPRPair_with_gsub_0_in_tcGPR Bit set. |
| const uint8_t GPRPair_with_gsub_0_in_tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, |
| }; |
| |
| // GPRPair_with_gsub_1_in_tcGPR Register Class... |
| const MCPhysReg GPRPair_with_gsub_1_in_tcGPR[] = { |
| ARM::R0_R1, ARM::R2_R3, |
| }; |
| |
| // GPRPair_with_gsub_1_in_tcGPR Bit set. |
| const uint8_t GPRPair_with_gsub_1_in_tcGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, |
| }; |
| |
| // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR Register Class... |
| const MCPhysReg GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR[] = { |
| ARM::R8_R9, ARM::R10_R11, |
| }; |
| |
| // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR Bit set. |
| const uint8_t GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, |
| }; |
| |
| // GPRPair_with_gsub_1_in_GPRsp Register Class... |
| const MCPhysReg GPRPair_with_gsub_1_in_GPRsp[] = { |
| ARM::R12_SP, |
| }; |
| |
| // GPRPair_with_gsub_1_in_GPRsp Bit set. |
| const uint8_t GPRPair_with_gsub_1_in_GPRspBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| }; |
| |
| // DPairSpc Register Class... |
| const MCPhysReg DPairSpc[] = { |
| ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17, ARM::D16_D18, ARM::D17_D19, ARM::D18_D20, ARM::D19_D21, ARM::D20_D22, ARM::D21_D23, ARM::D22_D24, ARM::D23_D25, ARM::D24_D26, ARM::D25_D27, ARM::D26_D28, ARM::D27_D29, ARM::D28_D30, ARM::D29_D31, |
| }; |
| |
| // DPairSpc Bit set. |
| const uint8_t DPairSpcBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x0f, |
| }; |
| |
| // DPairSpc_with_ssub_0 Register Class... |
| const MCPhysReg DPairSpc_with_ssub_0[] = { |
| ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, ARM::D14_D16, ARM::D15_D17, |
| }; |
| |
| // DPairSpc_with_ssub_0 Bit set. |
| const uint8_t DPairSpc_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x3f, |
| }; |
| |
| // DPairSpc_with_ssub_4 Register Class... |
| const MCPhysReg DPairSpc_with_ssub_4[] = { |
| ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13, ARM::D12_D14, ARM::D13_D15, |
| }; |
| |
| // DPairSpc_with_ssub_4 Bit set. |
| const uint8_t DPairSpc_with_ssub_4Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0x0f, |
| }; |
| |
| // DPairSpc_with_dsub_0_in_DPR_8 Register Class... |
| const MCPhysReg DPairSpc_with_dsub_0_in_DPR_8[] = { |
| ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9, |
| }; |
| |
| // DPairSpc_with_dsub_0_in_DPR_8 Bit set. |
| const uint8_t DPairSpc_with_dsub_0_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, |
| }; |
| |
| // DPairSpc_with_dsub_2_in_DPR_8 Register Class... |
| const MCPhysReg DPairSpc_with_dsub_2_in_DPR_8[] = { |
| ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5, ARM::D4_D6, ARM::D5_D7, |
| }; |
| |
| // DPairSpc_with_dsub_2_in_DPR_8 Bit set. |
| const uint8_t DPairSpc_with_dsub_2_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f, |
| }; |
| |
| // DPair Register Class... |
| const MCPhysReg DPair[] = { |
| ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, ARM::Q8, ARM::D17_D18, ARM::Q9, ARM::D19_D20, ARM::Q10, ARM::D21_D22, ARM::Q11, ARM::D23_D24, ARM::Q12, ARM::D25_D26, ARM::Q13, ARM::D27_D28, ARM::Q14, ARM::D29_D30, ARM::Q15, |
| }; |
| |
| // DPair Bit set. |
| const uint8_t DPairBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| }; |
| |
| // DPair_with_ssub_0 Register Class... |
| const MCPhysReg DPair_with_ssub_0[] = { |
| ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, |
| }; |
| |
| // DPair_with_ssub_0 Bit set. |
| const uint8_t DPair_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| }; |
| |
| // QPR Register Class... |
| const MCPhysReg QPR[] = { |
| ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, |
| }; |
| |
| // QPR Bit set. |
| const uint8_t QPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xff, 0x01, |
| }; |
| |
| // DPair_with_ssub_2 Register Class... |
| const MCPhysReg DPair_with_ssub_2[] = { |
| ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12, ARM::Q6, ARM::D13_D14, ARM::Q7, |
| }; |
| |
| // DPair_with_ssub_2 Bit set. |
| const uint8_t DPair_with_ssub_2Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| }; |
| |
| // DPair_with_dsub_0_in_DPR_8 Register Class... |
| const MCPhysReg DPair_with_dsub_0_in_DPR_8[] = { |
| ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, ARM::D7_D8, |
| }; |
| |
| // DPair_with_dsub_0_in_DPR_8 Bit set. |
| const uint8_t DPair_with_dsub_0_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| }; |
| |
| // MQPR Register Class... |
| const MCPhysReg MQPR[] = { |
| ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, |
| }; |
| |
| // MQPR Bit set. |
| const uint8_t MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| }; |
| |
| // QPR_VFP2 Register Class... |
| const MCPhysReg QPR_VFP2[] = { |
| ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, |
| }; |
| |
| // QPR_VFP2 Bit set. |
| const uint8_t QPR_VFP2Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| }; |
| |
| // DPair_with_dsub_1_in_DPR_8 Register Class... |
| const MCPhysReg DPair_with_dsub_1_in_DPR_8[] = { |
| ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6, ARM::Q3, |
| }; |
| |
| // DPair_with_dsub_1_in_DPR_8 Bit set. |
| const uint8_t DPair_with_dsub_1_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, |
| }; |
| |
| // QPR_8 Register Class... |
| const MCPhysReg QPR_8[] = { |
| ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, |
| }; |
| |
| // QPR_8 Bit set. |
| const uint8_t QPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| }; |
| |
| // DTriple Register Class... |
| const MCPhysReg DTriple[] = { |
| ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17, ARM::D16_D17_D18, ARM::D17_D18_D19, ARM::D18_D19_D20, ARM::D19_D20_D21, ARM::D20_D21_D22, ARM::D21_D22_D23, ARM::D22_D23_D24, ARM::D23_D24_D25, ARM::D24_D25_D26, ARM::D25_D26_D27, ARM::D26_D27_D28, ARM::D27_D28_D29, ARM::D28_D29_D30, ARM::D29_D30_D31, |
| }; |
| |
| // DTriple Bit set. |
| const uint8_t DTripleBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x1f, |
| }; |
| |
| // DTripleSpc Register Class... |
| const MCPhysReg DTripleSpc[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31, |
| }; |
| |
| // DTripleSpc Bit set. |
| const uint8_t DTripleSpcBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x01, |
| }; |
| |
| // DTripleSpc_with_ssub_0 Register Class... |
| const MCPhysReg DTripleSpc_with_ssub_0[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, |
| }; |
| |
| // DTripleSpc_with_ssub_0 Bit set. |
| const uint8_t DTripleSpc_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f, |
| }; |
| |
| // DTriple_with_ssub_0 Register Class... |
| const MCPhysReg DTriple_with_ssub_0[] = { |
| ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, ARM::D15_D16_D17, |
| }; |
| |
| // DTriple_with_ssub_0 Bit set. |
| const uint8_t DTriple_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| }; |
| |
| // DTriple_with_qsub_0_in_QPR Register Class... |
| const MCPhysReg DTriple_with_qsub_0_in_QPR[] = { |
| ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16, ARM::D16_D17_D18, ARM::D18_D19_D20, ARM::D20_D21_D22, ARM::D22_D23_D24, ARM::D24_D25_D26, ARM::D26_D27_D28, ARM::D28_D29_D30, |
| }; |
| |
| // DTriple_with_qsub_0_in_QPR Bit set. |
| const uint8_t DTriple_with_qsub_0_in_QPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x0a, |
| }; |
| |
| // DTriple_with_ssub_2 Register Class... |
| const MCPhysReg DTriple_with_ssub_2[] = { |
| ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, ARM::D14_D15_D16, |
| }; |
| |
| // DTriple_with_ssub_2 Bit set. |
| const uint8_t DTriple_with_ssub_2Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, |
| }; |
| |
| // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17, ARM::D17_D18_D19, ARM::D19_D20_D21, ARM::D21_D22_D23, ARM::D23_D24_D25, ARM::D25_D26_D27, ARM::D27_D28_D29, ARM::D29_D30_D31, |
| }; |
| |
| // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x15, |
| }; |
| |
| // DTripleSpc_with_ssub_4 Register Class... |
| const MCPhysReg DTripleSpc_with_ssub_4[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, |
| }; |
| |
| // DTripleSpc_with_ssub_4 Bit set. |
| const uint8_t DTripleSpc_with_ssub_4Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, |
| }; |
| |
| // DTriple_with_ssub_4 Register Class... |
| const MCPhysReg DTriple_with_ssub_4[] = { |
| ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, ARM::D8_D9_D10, ARM::D9_D10_D11, ARM::D10_D11_D12, ARM::D11_D12_D13, ARM::D12_D13_D14, ARM::D13_D14_D15, |
| }; |
| |
| // DTriple_with_ssub_4 Bit set. |
| const uint8_t DTriple_with_ssub_4Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, |
| }; |
| |
| // DTripleSpc_with_ssub_8 Register Class... |
| const MCPhysReg DTripleSpc_with_ssub_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, |
| }; |
| |
| // DTripleSpc_with_ssub_8 Bit set. |
| const uint8_t DTripleSpc_with_ssub_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x01, |
| }; |
| |
| // DTripleSpc_with_dsub_0_in_DPR_8 Register Class... |
| const MCPhysReg DTripleSpc_with_dsub_0_in_DPR_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, |
| }; |
| |
| // DTripleSpc_with_dsub_0_in_DPR_8 Bit set. |
| const uint8_t DTripleSpc_with_dsub_0_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, |
| }; |
| |
| // DTriple_with_dsub_0_in_DPR_8 Register Class... |
| const MCPhysReg DTriple_with_dsub_0_in_DPR_8[] = { |
| ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, ARM::D7_D8_D9, |
| }; |
| |
| // DTriple_with_dsub_0_in_DPR_8 Bit set. |
| const uint8_t DTriple_with_dsub_0_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| }; |
| |
| // DTriple_with_qsub_0_in_MQPR Register Class... |
| const MCPhysReg DTriple_with_qsub_0_in_MQPR[] = { |
| ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, ARM::D14_D15_D16, |
| }; |
| |
| // DTriple_with_qsub_0_in_MQPR Bit set. |
| const uint8_t DTriple_with_qsub_0_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| }; |
| |
| // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| const MCPhysReg DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, ARM::D15_D16_D17, |
| }; |
| |
| // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| const uint8_t DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, |
| }; |
| |
| // DTriple_with_dsub_1_in_DPR_8 Register Class... |
| const MCPhysReg DTriple_with_dsub_1_in_DPR_8[] = { |
| ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, ARM::D6_D7_D8, |
| }; |
| |
| // DTriple_with_dsub_1_in_DPR_8 Bit set. |
| const uint8_t DTriple_with_dsub_1_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, |
| }; |
| |
| // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, ARM::D9_D10_D11, ARM::D11_D12_D13, ARM::D13_D14_D15, |
| }; |
| |
| // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, |
| }; |
| |
| // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR Register Class... |
| const MCPhysReg DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR[] = { |
| ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, ARM::D8_D9_D10, ARM::D10_D11_D12, ARM::D12_D13_D14, |
| }; |
| |
| // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR Bit set. |
| const uint8_t DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, |
| }; |
| |
| // DTripleSpc_with_dsub_2_in_DPR_8 Register Class... |
| const MCPhysReg DTripleSpc_with_dsub_2_in_DPR_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, |
| }; |
| |
| // DTripleSpc_with_dsub_2_in_DPR_8 Bit set. |
| const uint8_t DTripleSpc_with_dsub_2_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, |
| }; |
| |
| // DTriple_with_dsub_2_in_DPR_8 Register Class... |
| const MCPhysReg DTriple_with_dsub_2_in_DPR_8[] = { |
| ARM::D0_D1_D2, ARM::D1_D2_D3, ARM::D2_D3_D4, ARM::D3_D4_D5, ARM::D4_D5_D6, ARM::D5_D6_D7, |
| }; |
| |
| // DTriple_with_dsub_2_in_DPR_8 Bit set. |
| const uint8_t DTriple_with_dsub_2_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, |
| }; |
| |
| // DTripleSpc_with_dsub_4_in_DPR_8 Register Class... |
| const MCPhysReg DTripleSpc_with_dsub_4_in_DPR_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, |
| }; |
| |
| // DTripleSpc_with_dsub_4_in_DPR_8 Bit set. |
| const uint8_t DTripleSpc_with_dsub_4_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, |
| }; |
| |
| // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| const MCPhysReg DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, ARM::D7_D8_D9, |
| }; |
| |
| // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| const uint8_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, |
| }; |
| |
| // DTriple_with_qsub_0_in_QPR_8 Register Class... |
| const MCPhysReg DTriple_with_qsub_0_in_QPR_8[] = { |
| ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, ARM::D6_D7_D8, |
| }; |
| |
| // DTriple_with_qsub_0_in_QPR_8 Bit set. |
| const uint8_t DTriple_with_qsub_0_in_QPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| }; |
| |
| // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR Register Class... |
| const MCPhysReg DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR[] = { |
| ARM::D0_D1_D2, ARM::D2_D3_D4, ARM::D4_D5_D6, |
| }; |
| |
| // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR Bit set. |
| const uint8_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a, |
| }; |
| |
| // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Register Class... |
| const MCPhysReg DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8[] = { |
| ARM::D1_D2_D3, ARM::D3_D4_D5, ARM::D5_D6_D7, |
| }; |
| |
| // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Bit set. |
| const uint8_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, |
| }; |
| |
| // DQuadSpc Register Class... |
| const MCPhysReg DQuadSpc[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, ARM::D16_D18_D20, ARM::D17_D19_D21, ARM::D18_D20_D22, ARM::D19_D21_D23, ARM::D20_D22_D24, ARM::D21_D23_D25, ARM::D22_D24_D26, ARM::D23_D25_D27, ARM::D24_D26_D28, ARM::D25_D27_D29, ARM::D26_D28_D30, ARM::D27_D29_D31, |
| }; |
| |
| // DQuadSpc Bit set. |
| const uint8_t DQuadSpcBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0xff, 0xff, 0x01, |
| }; |
| |
| // DQuadSpc_with_ssub_0 Register Class... |
| const MCPhysReg DQuadSpc_with_ssub_0[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, ARM::D14_D16_D18, ARM::D15_D17_D19, |
| }; |
| |
| // DQuadSpc_with_ssub_0 Bit set. |
| const uint8_t DQuadSpc_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x1f, |
| }; |
| |
| // DQuadSpc_with_ssub_4 Register Class... |
| const MCPhysReg DQuadSpc_with_ssub_4[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, ARM::D12_D14_D16, ARM::D13_D15_D17, |
| }; |
| |
| // DQuadSpc_with_ssub_4 Bit set. |
| const uint8_t DQuadSpc_with_ssub_4Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x07, |
| }; |
| |
| // DQuadSpc_with_ssub_8 Register Class... |
| const MCPhysReg DQuadSpc_with_ssub_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, ARM::D8_D10_D12, ARM::D9_D11_D13, ARM::D10_D12_D14, ARM::D11_D13_D15, |
| }; |
| |
| // DQuadSpc_with_ssub_8 Bit set. |
| const uint8_t DQuadSpc_with_ssub_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x01, |
| }; |
| |
| // DQuadSpc_with_dsub_0_in_DPR_8 Register Class... |
| const MCPhysReg DQuadSpc_with_dsub_0_in_DPR_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, ARM::D6_D8_D10, ARM::D7_D9_D11, |
| }; |
| |
| // DQuadSpc_with_dsub_0_in_DPR_8 Bit set. |
| const uint8_t DQuadSpc_with_dsub_0_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, |
| }; |
| |
| // DQuadSpc_with_dsub_2_in_DPR_8 Register Class... |
| const MCPhysReg DQuadSpc_with_dsub_2_in_DPR_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, ARM::D4_D6_D8, ARM::D5_D7_D9, |
| }; |
| |
| // DQuadSpc_with_dsub_2_in_DPR_8 Bit set. |
| const uint8_t DQuadSpc_with_dsub_2_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x07, |
| }; |
| |
| // DQuadSpc_with_dsub_4_in_DPR_8 Register Class... |
| const MCPhysReg DQuadSpc_with_dsub_4_in_DPR_8[] = { |
| ARM::D0_D2_D4, ARM::D1_D3_D5, ARM::D2_D4_D6, ARM::D3_D5_D7, |
| }; |
| |
| // DQuadSpc_with_dsub_4_in_DPR_8 Bit set. |
| const uint8_t DQuadSpc_with_dsub_4_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, |
| }; |
| |
| // DQuad Register Class... |
| const MCPhysReg DQuad[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, ARM::Q8_Q9, ARM::D17_D18_D19_D20, ARM::Q9_Q10, ARM::D19_D20_D21_D22, ARM::Q10_Q11, ARM::D21_D22_D23_D24, ARM::Q11_Q12, ARM::D23_D24_D25_D26, ARM::Q12_Q13, ARM::D25_D26_D27_D28, ARM::Q13_Q14, ARM::D27_D28_D29_D30, ARM::Q14_Q15, |
| }; |
| |
| // DQuad Bit set. |
| const uint8_t DQuadBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, |
| }; |
| |
| // DQuad_with_ssub_0 Register Class... |
| const MCPhysReg DQuad_with_ssub_0[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, ARM::D15_D16_D17_D18, |
| }; |
| |
| // DQuad_with_ssub_0 Bit set. |
| const uint8_t DQuad_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, |
| }; |
| |
| // DQuad_with_ssub_2 Register Class... |
| const MCPhysReg DQuad_with_ssub_2[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, ARM::Q7_Q8, |
| }; |
| |
| // DQuad_with_ssub_2 Bit set. |
| const uint8_t DQuad_with_ssub_2Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, |
| }; |
| |
| // QQPR Register Class... |
| const MCPhysReg QQPR[] = { |
| ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15, |
| }; |
| |
| // QQPR Bit set. |
| const uint8_t QQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, |
| }; |
| |
| // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18, ARM::D17_D18_D19_D20, ARM::D19_D20_D21_D22, ARM::D21_D22_D23_D24, ARM::D23_D24_D25_D26, ARM::D25_D26_D27_D28, ARM::D27_D28_D29_D30, |
| }; |
| |
| // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, |
| }; |
| |
| // DQuad_with_ssub_4 Register Class... |
| const MCPhysReg DQuad_with_ssub_4[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, ARM::D13_D14_D15_D16, |
| }; |
| |
| // DQuad_with_ssub_4 Bit set. |
| const uint8_t DQuad_with_ssub_4Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, |
| }; |
| |
| // DQuad_with_ssub_6 Register Class... |
| const MCPhysReg DQuad_with_ssub_6[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, ARM::Q4_Q5, ARM::D9_D10_D11_D12, ARM::Q5_Q6, ARM::D11_D12_D13_D14, ARM::Q6_Q7, |
| }; |
| |
| // DQuad_with_ssub_6 Bit set. |
| const uint8_t DQuad_with_ssub_6Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, |
| }; |
| |
| // DQuad_with_dsub_0_in_DPR_8 Register Class... |
| const MCPhysReg DQuad_with_dsub_0_in_DPR_8[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, ARM::D7_D8_D9_D10, |
| }; |
| |
| // DQuad_with_dsub_0_in_DPR_8 Bit set. |
| const uint8_t DQuad_with_dsub_0_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, |
| }; |
| |
| // DQuad_with_qsub_0_in_MQPR Register Class... |
| const MCPhysReg DQuad_with_qsub_0_in_MQPR[] = { |
| ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8, |
| }; |
| |
| // DQuad_with_qsub_0_in_MQPR Bit set. |
| const uint8_t DQuad_with_qsub_0_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, |
| }; |
| |
| // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Register Class... |
| const MCPhysReg DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR[] = { |
| ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, ARM::D15_D16_D17_D18, |
| }; |
| |
| // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR Bit set. |
| const uint8_t DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, |
| }; |
| |
| // DQuad_with_dsub_1_in_DPR_8 Register Class... |
| const MCPhysReg DQuad_with_dsub_1_in_DPR_8[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, ARM::Q3_Q4, |
| }; |
| |
| // DQuad_with_dsub_1_in_DPR_8 Bit set. |
| const uint8_t DQuad_with_dsub_1_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, |
| }; |
| |
| // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, ARM::D13_D14_D15_D16, |
| }; |
| |
| // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x01, |
| }; |
| |
| // MQQPR Register Class... |
| const MCPhysReg MQQPR[] = { |
| ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, |
| }; |
| |
| // MQQPR Bit set. |
| const uint8_t MQQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, |
| }; |
| |
| // DQuad_with_dsub_2_in_DPR_8 Register Class... |
| const MCPhysReg DQuad_with_dsub_2_in_DPR_8[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, ARM::D5_D6_D7_D8, |
| }; |
| |
| // DQuad_with_dsub_2_in_DPR_8 Bit set. |
| const uint8_t DQuad_with_dsub_2_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, |
| }; |
| |
| // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| const MCPhysReg DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, ARM::D9_D10_D11_D12, ARM::D11_D12_D13_D14, |
| }; |
| |
| // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| const uint8_t DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, |
| }; |
| |
| // DQuad_with_dsub_3_in_DPR_8 Register Class... |
| const MCPhysReg DQuad_with_dsub_3_in_DPR_8[] = { |
| ARM::Q0_Q1, ARM::D1_D2_D3_D4, ARM::Q1_Q2, ARM::D3_D4_D5_D6, ARM::Q2_Q3, |
| }; |
| |
| // DQuad_with_dsub_3_in_DPR_8 Bit set. |
| const uint8_t DQuad_with_dsub_3_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, |
| }; |
| |
| // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| const MCPhysReg DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, ARM::D7_D8_D9_D10, |
| }; |
| |
| // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| const uint8_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, |
| }; |
| |
| // DQuad_with_qsub_0_in_QPR_8 Register Class... |
| const MCPhysReg DQuad_with_qsub_0_in_QPR_8[] = { |
| ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, |
| }; |
| |
| // DQuad_with_qsub_0_in_QPR_8 Bit set. |
| const uint8_t DQuad_with_qsub_0_in_QPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, |
| }; |
| |
| // DQuad_with_qsub_1_in_QPR_8 Register Class... |
| const MCPhysReg DQuad_with_qsub_1_in_QPR_8[] = { |
| ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, |
| }; |
| |
| // DQuad_with_qsub_1_in_QPR_8 Bit set. |
| const uint8_t DQuad_with_qsub_1_in_QPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, |
| }; |
| |
| // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Register Class... |
| const MCPhysReg DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8[] = { |
| ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, ARM::D5_D6_D7_D8, |
| }; |
| |
| // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 Bit set. |
| const uint8_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, |
| }; |
| |
| // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Register Class... |
| const MCPhysReg DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR[] = { |
| ARM::D1_D2_D3_D4, ARM::D3_D4_D5_D6, |
| }; |
| |
| // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR Bit set. |
| const uint8_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, |
| }; |
| |
| // QQQQPR Register Class... |
| const MCPhysReg QQQQPR[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10, ARM::Q8_Q9_Q10_Q11, ARM::Q9_Q10_Q11_Q12, ARM::Q10_Q11_Q12_Q13, ARM::Q11_Q12_Q13_Q14, ARM::Q12_Q13_Q14_Q15, |
| }; |
| |
| // QQQQPR Bit set. |
| const uint8_t QQQQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, |
| }; |
| |
| // QQQQPR_with_ssub_0 Register Class... |
| const MCPhysReg QQQQPR_with_ssub_0[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10, |
| }; |
| |
| // QQQQPR_with_ssub_0 Bit set. |
| const uint8_t QQQQPR_with_ssub_0Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| }; |
| |
| // QQQQPR_with_ssub_4 Register Class... |
| const MCPhysReg QQQQPR_with_ssub_4[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, |
| }; |
| |
| // QQQQPR_with_ssub_4 Bit set. |
| const uint8_t QQQQPR_with_ssub_4Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| }; |
| |
| // QQQQPR_with_ssub_8 Register Class... |
| const MCPhysReg QQQQPR_with_ssub_8[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, |
| }; |
| |
| // QQQQPR_with_ssub_8 Bit set. |
| const uint8_t QQQQPR_with_ssub_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, |
| }; |
| |
| // MQQQQPR Register Class... |
| const MCPhysReg MQQQQPR[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, |
| }; |
| |
| // MQQQQPR Bit set. |
| const uint8_t MQQQQPRBits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, |
| }; |
| |
| // MQQQQPR_with_dsub_0_in_DPR_8 Register Class... |
| const MCPhysReg MQQQQPR_with_dsub_0_in_DPR_8[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, |
| }; |
| |
| // MQQQQPR_with_dsub_0_in_DPR_8 Bit set. |
| const uint8_t MQQQQPR_with_dsub_0_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| }; |
| |
| // MQQQQPR_with_dsub_2_in_DPR_8 Register Class... |
| const MCPhysReg MQQQQPR_with_dsub_2_in_DPR_8[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, |
| }; |
| |
| // MQQQQPR_with_dsub_2_in_DPR_8 Bit set. |
| const uint8_t MQQQQPR_with_dsub_2_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, |
| }; |
| |
| // MQQQQPR_with_dsub_4_in_DPR_8 Register Class... |
| const MCPhysReg MQQQQPR_with_dsub_4_in_DPR_8[] = { |
| ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, |
| }; |
| |
| // MQQQQPR_with_dsub_4_in_DPR_8 Bit set. |
| const uint8_t MQQQQPR_with_dsub_4_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, |
| }; |
| |
| // MQQQQPR_with_dsub_6_in_DPR_8 Register Class... |
| const MCPhysReg MQQQQPR_with_dsub_6_in_DPR_8[] = { |
| ARM::Q0_Q1_Q2_Q3, |
| }; |
| |
| // MQQQQPR_with_dsub_6_in_DPR_8 Bit set. |
| const uint8_t MQQQQPR_with_dsub_6_in_DPR_8Bits[] = { |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| }; |
| |
| } // end anonymous namespace |
| |
| extern const char ARMRegClassStrings[] = { |
| /* 0 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 19 */ 'F', 'P', 'W', 'i', 't', 'h', 'V', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 41 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 62 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 85 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 106 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 124 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 144 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', 0, |
| /* 162 */ 'D', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, |
| /* 171 */ 'Q', 'P', 'R', '_', 'V', 'F', 'P', '2', 0, |
| /* 180 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', 0, |
| /* 198 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', 0, |
| /* 218 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', 0, |
| /* 236 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '4', 0, |
| /* 255 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '4', 0, |
| /* 276 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '4', 0, |
| /* 299 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '4', 0, |
| /* 320 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '4', 0, |
| /* 338 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '4', 0, |
| /* 358 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '6', 0, |
| /* 376 */ 'M', 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 405 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 435 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 467 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 497 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 524 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 553 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 580 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 607 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 636 */ 'D', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 663 */ 'M', 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 692 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 722 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 754 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 784 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 811 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 840 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '3', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 867 */ 'M', 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 896 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 926 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 958 */ 'M', 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', 0, |
| /* 987 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, |
| /* 1014 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, |
| /* 1043 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, |
| /* 1070 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, |
| /* 1118 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'Q', 'P', 'R', '_', '8', 0, |
| /* 1168 */ 'F', 'P', 'W', 'i', 't', 'h', 'V', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'S', 'P', 'R', '_', '8', 0, |
| /* 1211 */ 'Q', 'Q', 'Q', 'Q', 'P', 'R', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '8', 0, |
| /* 1230 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '8', 0, |
| /* 1251 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '8', 0, |
| /* 1274 */ 'V', 'C', 'C', 'R', 0, |
| /* 1279 */ 'D', 'P', 'R', 0, |
| /* 1283 */ 'h', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'c', 'G', 'P', 'R', 0, |
| /* 1298 */ 't', 'G', 'P', 'R', 'O', 'd', 'd', '_', 'a', 'n', 'd', '_', 't', 'c', 'G', 'P', 'R', 0, |
| /* 1316 */ 't', 'G', 'P', 'R', 'E', 'v', 'e', 'n', '_', 'a', 'n', 'd', '_', 't', 'c', 'G', 'P', 'R', 0, |
| /* 1335 */ 't', 'G', 'P', 'R', 'E', 'v', 'e', 'n', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 't', 'c', 'G', 'P', 'R', 0, |
| /* 1366 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', 0, |
| /* 1395 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', 0, |
| /* 1424 */ 'G', 'P', 'R', 'n', 'o', 's', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 'p', 'c', '_', 'a', 'n', 'd', '_', 'h', 'G', 'P', 'R', 0, |
| /* 1453 */ 'G', 'P', 'R', 'n', 'o', 's', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 'p', 'c', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'h', 'G', 'P', 'R', 0, |
| /* 1494 */ 'G', 'P', 'R', 'n', 'o', 's', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'h', 'G', 'P', 'R', 0, |
| /* 1523 */ 'G', 'P', 'R', 'n', 'o', 's', 'p', '_', 'a', 'n', 'd', '_', 'h', 'G', 'P', 'R', 0, |
| /* 1540 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', 'n', 'o', 's', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'h', 'G', 'P', 'R', 0, |
| /* 1584 */ 'r', 'G', 'P', 'R', 0, |
| /* 1589 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 't', 'G', 'P', 'R', 0, |
| /* 1617 */ 'H', 'P', 'R', 0, |
| /* 1621 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'M', 'Q', 'P', 'R', 0, |
| /* 1647 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '4', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'M', 'Q', 'P', 'R', 0, |
| /* 1699 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'M', 'Q', 'P', 'R', 0, |
| /* 1760 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '6', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'M', 'Q', 'P', 'R', 0, |
| /* 1829 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'M', 'Q', 'P', 'R', 0, |
| /* 1907 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '3', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'M', 'Q', 'P', 'R', 0, |
| /* 1985 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'd', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'D', 'P', 'R', '_', '8', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'M', 'Q', 'P', 'R', 0, |
| /* 2067 */ 'M', 'Q', 'Q', 'P', 'R', 0, |
| /* 2073 */ 'M', 'Q', 'Q', 'Q', 'Q', 'P', 'R', 0, |
| /* 2081 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 'q', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, |
| /* 2108 */ 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', '_', 'a', 'n', 'd', '_', 'D', 'Q', 'u', 'a', 'd', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, |
| /* 2176 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '0', '_', 'a', 'n', 'd', '_', 'D', 'T', 'r', 'i', 'p', 'l', 'e', '_', 'w', 'i', 't', 'h', '_', 's', 's', 'u', 'b', '_', '2', '_', 's', 's', 'u', 'b', '_', '3', '_', 's', 's', 'u', 'b', '_', '4', '_', 's', 's', 'u', 'b', '_', '5', '_', 'i', 'n', '_', 'Q', 'P', 'R', 0, |
| /* 2248 */ 'S', 'P', 'R', 0, |
| /* 2252 */ 'F', 'P', 'W', 'i', 't', 'h', 'V', 'P', 'R', 0, |
| /* 2262 */ 'G', 'P', 'R', 'w', 'i', 't', 'h', 'A', 'P', 'S', 'R', 0, |
| /* 2274 */ 'G', 'P', 'R', 'w', 'i', 't', 'h', 'Z', 'R', 0, |
| /* 2284 */ 'c', 'l', '_', 'F', 'P', 'S', 'C', 'R', '_', 'N', 'Z', 'C', 'V', 0, |
| /* 2298 */ 'D', 'Q', 'u', 'a', 'd', 'S', 'p', 'c', 0, |
| /* 2307 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 'S', 'p', 'c', 0, |
| /* 2318 */ 'D', 'P', 'a', 'i', 'r', 'S', 'p', 'c', 0, |
| /* 2327 */ 'h', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'G', 'P', 'R', 'w', 'i', 't', 'h', 'p', 'c', 0, |
| /* 2347 */ 'G', 'P', 'R', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 'p', 'c', 0, |
| /* 2367 */ 'D', 'Q', 'u', 'a', 'd', 0, |
| /* 2373 */ 'h', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'G', 'P', 'R', 'O', 'd', 'd', 0, |
| /* 2390 */ 't', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'G', 'P', 'R', 'O', 'd', 'd', 0, |
| /* 2407 */ 'D', 'T', 'r', 'i', 'p', 'l', 'e', 0, |
| /* 2415 */ 'h', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'G', 'P', 'R', 'E', 'v', 'e', 'n', 0, |
| /* 2433 */ 't', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 't', 'G', 'P', 'R', 'E', 'v', 'e', 'n', 0, |
| /* 2451 */ 'h', 'G', 'P', 'R', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 't', 'G', 'P', 'R', 'E', 'v', 'e', 'n', 0, |
| /* 2481 */ 'G', 'P', 'R', 'n', 'o', 'i', 'p', 0, |
| /* 2489 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', '_', 'w', 'i', 't', 'h', '_', 'g', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 'G', 'P', 'R', 's', 'p', 0, |
| /* 2518 */ 'G', 'P', 'R', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'n', 'o', 's', 'p', 0, |
| /* 2538 */ 'G', 'P', 'R', 'w', 'i', 't', 'h', 'A', 'P', 'S', 'R', 'n', 'o', 's', 'p', 0, |
| /* 2554 */ 'G', 'P', 'R', 'w', 'i', 't', 'h', 'Z', 'R', 'n', 'o', 's', 'p', 0, |
| /* 2568 */ 'G', 'P', 'R', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', 'w', 'i', 't', 'h', 'A', 'P', 'S', 'R', '_', 'N', 'Z', 'C', 'V', 'n', 'o', 's', 'p', 0, |
| /* 2601 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', 'n', 'o', 's', 'p', 0, |
| /* 2613 */ 'D', 'P', 'a', 'i', 'r', 0, |
| /* 2619 */ 'G', 'P', 'R', 'P', 'a', 'i', 'r', 0, |
| /* 2627 */ 'G', 'P', 'R', 'l', 'r', 0, |
| /* 2633 */ 'F', 'P', 'C', 'X', 'T', 'R', 'e', 'g', 's', 0, |
| 0 |
| }; |
| |
| extern const MCRegisterClass ARMMCRegisterClasses[] = { |
| { HPR, HPRBits, 1617, 32, sizeof(HPRBits), ARM::HPRRegClassID, 16, 1, true }, |
| { FPWithVPR, FPWithVPRBits, 2252, 65, sizeof(FPWithVPRBits), ARM::FPWithVPRRegClassID, 32, 1, false }, |
| { SPR, SPRBits, 2248, 32, sizeof(SPRBits), ARM::SPRRegClassID, 32, 1, true }, |
| { FPWithVPR_with_ssub_0, FPWithVPR_with_ssub_0Bits, 19, 16, sizeof(FPWithVPR_with_ssub_0Bits), ARM::FPWithVPR_with_ssub_0RegClassID, 32, 1, false }, |
| { GPR, GPRBits, 1294, 16, sizeof(GPRBits), ARM::GPRRegClassID, 32, 1, true }, |
| { GPRwithAPSR, GPRwithAPSRBits, 2262, 16, sizeof(GPRwithAPSRBits), ARM::GPRwithAPSRRegClassID, 32, 1, true }, |
| { GPRwithZR, GPRwithZRBits, 2274, 16, sizeof(GPRwithZRBits), ARM::GPRwithZRRegClassID, 32, 1, true }, |
| { SPR_8, SPR_8Bits, 1205, 16, sizeof(SPR_8Bits), ARM::SPR_8RegClassID, 32, 1, true }, |
| { GPRnopc, GPRnopcBits, 2359, 15, sizeof(GPRnopcBits), ARM::GPRnopcRegClassID, 32, 1, true }, |
| { GPRnosp, GPRnospBits, 2530, 15, sizeof(GPRnospBits), ARM::GPRnospRegClassID, 32, 1, true }, |
| { GPRwithAPSR_NZCVnosp, GPRwithAPSR_NZCVnospBits, 2580, 15, sizeof(GPRwithAPSR_NZCVnospBits), ARM::GPRwithAPSR_NZCVnospRegClassID, 32, 1, false }, |
| { GPRwithAPSRnosp, GPRwithAPSRnospBits, 2538, 15, sizeof(GPRwithAPSRnospBits), ARM::GPRwithAPSRnospRegClassID, 32, 1, false }, |
| { GPRwithZRnosp, GPRwithZRnospBits, 2554, 15, sizeof(GPRwithZRnospBits), ARM::GPRwithZRnospRegClassID, 32, 1, true }, |
| { GPRnoip, GPRnoipBits, 2481, 14, sizeof(GPRnoipBits), ARM::GPRnoipRegClassID, 32, 1, true }, |
| { rGPR, rGPRBits, 1584, 14, sizeof(rGPRBits), ARM::rGPRRegClassID, 32, 1, true }, |
| { GPRnoip_and_GPRnopc, GPRnoip_and_GPRnopcBits, 2347, 13, sizeof(GPRnoip_and_GPRnopcBits), ARM::GPRnoip_and_GPRnopcRegClassID, 32, 1, true }, |
| { GPRnoip_and_GPRnosp, GPRnoip_and_GPRnospBits, 2518, 13, sizeof(GPRnoip_and_GPRnospBits), ARM::GPRnoip_and_GPRnospRegClassID, 32, 1, true }, |
| { GPRnoip_and_GPRwithAPSR_NZCVnosp, GPRnoip_and_GPRwithAPSR_NZCVnospBits, 2568, 12, sizeof(GPRnoip_and_GPRwithAPSR_NZCVnospBits), ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID, 32, 1, true }, |
| { tGPRwithpc, tGPRwithpcBits, 2336, 9, sizeof(tGPRwithpcBits), ARM::tGPRwithpcRegClassID, 32, 1, true }, |
| { FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8, FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits, 1168, 8, sizeof(FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Bits), ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID, 32, 1, false }, |
| { hGPR, hGPRBits, 1448, 8, sizeof(hGPRBits), ARM::hGPRRegClassID, 32, 1, true }, |
| { tGPR, tGPRBits, 1612, 8, sizeof(tGPRBits), ARM::tGPRRegClassID, 32, 1, true }, |
| { tGPREven, tGPREvenBits, 2424, 8, sizeof(tGPREvenBits), ARM::tGPREvenRegClassID, 32, 1, true }, |
| { GPRnopc_and_hGPR, GPRnopc_and_hGPRBits, 1436, 7, sizeof(GPRnopc_and_hGPRBits), ARM::GPRnopc_and_hGPRRegClassID, 32, 1, true }, |
| { GPRnosp_and_hGPR, GPRnosp_and_hGPRBits, 1523, 7, sizeof(GPRnosp_and_hGPRBits), ARM::GPRnosp_and_hGPRRegClassID, 32, 1, true }, |
| { GPRnoip_and_hGPR, GPRnoip_and_hGPRBits, 1477, 6, sizeof(GPRnoip_and_hGPRBits), ARM::GPRnoip_and_hGPRRegClassID, 32, 1, true }, |
| { GPRnoip_and_tGPREven, GPRnoip_and_tGPREvenBits, 2460, 6, sizeof(GPRnoip_and_tGPREvenBits), ARM::GPRnoip_and_tGPREvenRegClassID, 32, 1, true }, |
| { GPRnosp_and_GPRnopc_and_hGPR, GPRnosp_and_GPRnopc_and_hGPRBits, 1424, 6, sizeof(GPRnosp_and_GPRnopc_and_hGPRBits), ARM::GPRnosp_and_GPRnopc_and_hGPRRegClassID, 32, 1, true }, |
| { tGPROdd, tGPROddBits, 2382, 6, sizeof(tGPROddBits), ARM::tGPROddRegClassID, 32, 1, true }, |
| { GPRnopc_and_GPRnoip_and_hGPR, GPRnopc_and_GPRnoip_and_hGPRBits, 1465, 5, sizeof(GPRnopc_and_GPRnoip_and_hGPRBits), ARM::GPRnopc_and_GPRnoip_and_hGPRRegClassID, 32, 1, true }, |
| { GPRnosp_and_GPRnoip_and_hGPR, GPRnosp_and_GPRnoip_and_hGPRBits, 1494, 5, sizeof(GPRnosp_and_GPRnoip_and_hGPRBits), ARM::GPRnosp_and_GPRnoip_and_hGPRRegClassID, 32, 1, true }, |
| { tcGPR, tcGPRBits, 1292, 5, sizeof(tcGPRBits), ARM::tcGPRRegClassID, 32, 1, true }, |
| { GPRnoip_and_tcGPR, GPRnoip_and_tcGPRBits, 1348, 4, sizeof(GPRnoip_and_tcGPRBits), ARM::GPRnoip_and_tcGPRRegClassID, 32, 1, true }, |
| { GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR, GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits, 1453, 4, sizeof(GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRBits), ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID, 32, 1, true }, |
| { hGPR_and_tGPREven, hGPR_and_tGPREvenBits, 2415, 4, sizeof(hGPR_and_tGPREvenBits), ARM::hGPR_and_tGPREvenRegClassID, 32, 1, true }, |
| { tGPR_and_tGPREven, tGPR_and_tGPREvenBits, 2433, 4, sizeof(tGPR_and_tGPREvenBits), ARM::tGPR_and_tGPREvenRegClassID, 32, 1, true }, |
| { tGPR_and_tGPROdd, tGPR_and_tGPROddBits, 2390, 4, sizeof(tGPR_and_tGPROddBits), ARM::tGPR_and_tGPROddRegClassID, 32, 1, true }, |
| { tGPREven_and_tcGPR, tGPREven_and_tcGPRBits, 1316, 3, sizeof(tGPREven_and_tcGPRBits), ARM::tGPREven_and_tcGPRRegClassID, 32, 1, true }, |
| { hGPR_and_GPRnoip_and_tGPREven, hGPR_and_GPRnoip_and_tGPREvenBits, 2451, 2, sizeof(hGPR_and_GPRnoip_and_tGPREvenBits), ARM::hGPR_and_GPRnoip_and_tGPREvenRegClassID, 32, 1, true }, |
| { hGPR_and_tGPROdd, hGPR_and_tGPROddBits, 2373, 2, sizeof(hGPR_and_tGPROddBits), ARM::hGPR_and_tGPROddRegClassID, 32, 1, true }, |
| { tGPREven_and_GPRnoip_and_tcGPR, tGPREven_and_GPRnoip_and_tcGPRBits, 1335, 2, sizeof(tGPREven_and_GPRnoip_and_tcGPRBits), ARM::tGPREven_and_GPRnoip_and_tcGPRRegClassID, 32, 1, true }, |
| { tGPROdd_and_tcGPR, tGPROdd_and_tcGPRBits, 1298, 2, sizeof(tGPROdd_and_tcGPRBits), ARM::tGPROdd_and_tcGPRRegClassID, 32, 1, true }, |
| { CCR, CCRBits, 1275, 1, sizeof(CCRBits), ARM::CCRRegClassID, 32, -1, false }, |
| { FPCXTRegs, FPCXTRegsBits, 2633, 1, sizeof(FPCXTRegsBits), ARM::FPCXTRegsRegClassID, 32, 1, true }, |
| { GPRlr, GPRlrBits, 2627, 1, sizeof(GPRlrBits), ARM::GPRlrRegClassID, 32, 1, true }, |
| { GPRsp, GPRspBits, 2512, 1, sizeof(GPRspBits), ARM::GPRspRegClassID, 32, 1, true }, |
| { VCCR, VCCRBits, 1274, 1, sizeof(VCCRBits), ARM::VCCRRegClassID, 32, 1, true }, |
| { cl_FPSCR_NZCV, cl_FPSCR_NZCVBits, 2284, 1, sizeof(cl_FPSCR_NZCVBits), ARM::cl_FPSCR_NZCVRegClassID, 32, 1, true }, |
| { hGPR_and_tGPRwithpc, hGPR_and_tGPRwithpcBits, 2327, 1, sizeof(hGPR_and_tGPRwithpcBits), ARM::hGPR_and_tGPRwithpcRegClassID, 32, 1, true }, |
| { hGPR_and_tcGPR, hGPR_and_tcGPRBits, 1283, 1, sizeof(hGPR_and_tcGPRBits), ARM::hGPR_and_tcGPRRegClassID, 32, 1, true }, |
| { DPR, DPRBits, 1279, 32, sizeof(DPRBits), ARM::DPRRegClassID, 64, 1, true }, |
| { DPR_VFP2, DPR_VFP2Bits, 162, 16, sizeof(DPR_VFP2Bits), ARM::DPR_VFP2RegClassID, 64, 1, true }, |
| { DPR_8, DPR_8Bits, 399, 8, sizeof(DPR_8Bits), ARM::DPR_8RegClassID, 64, 1, true }, |
| { GPRPair, GPRPairBits, 2619, 7, sizeof(GPRPairBits), ARM::GPRPairRegClassID, 64, 1, true }, |
| { GPRPairnosp, GPRPairnospBits, 2601, 6, sizeof(GPRPairnospBits), ARM::GPRPairnospRegClassID, 64, 1, true }, |
| { GPRPair_with_gsub_0_in_tGPR, GPRPair_with_gsub_0_in_tGPRBits, 1589, 4, sizeof(GPRPair_with_gsub_0_in_tGPRBits), ARM::GPRPair_with_gsub_0_in_tGPRRegClassID, 64, 1, true }, |
| { GPRPair_with_gsub_0_in_hGPR, GPRPair_with_gsub_0_in_hGPRBits, 1556, 3, sizeof(GPRPair_with_gsub_0_in_hGPRBits), ARM::GPRPair_with_gsub_0_in_hGPRRegClassID, 64, 1, true }, |
| { GPRPair_with_gsub_0_in_tcGPR, GPRPair_with_gsub_0_in_tcGPRBits, 1366, 3, sizeof(GPRPair_with_gsub_0_in_tcGPRBits), ARM::GPRPair_with_gsub_0_in_tcGPRRegClassID, 64, 1, true }, |
| { GPRPair_with_gsub_1_in_tcGPR, GPRPair_with_gsub_1_in_tcGPRBits, 1395, 2, sizeof(GPRPair_with_gsub_1_in_tcGPRBits), ARM::GPRPair_with_gsub_1_in_tcGPRRegClassID, 64, 1, true }, |
| { GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR, GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits, 1540, 2, sizeof(GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRBits), ARM::GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID, 64, 1, true }, |
| { GPRPair_with_gsub_1_in_GPRsp, GPRPair_with_gsub_1_in_GPRspBits, 2489, 1, sizeof(GPRPair_with_gsub_1_in_GPRspBits), ARM::GPRPair_with_gsub_1_in_GPRspRegClassID, 64, 1, true }, |
| { DPairSpc, DPairSpcBits, 2318, 30, sizeof(DPairSpcBits), ARM::DPairSpcRegClassID, 128, 1, true }, |
| { DPairSpc_with_ssub_0, DPairSpc_with_ssub_0Bits, 85, 16, sizeof(DPairSpc_with_ssub_0Bits), ARM::DPairSpc_with_ssub_0RegClassID, 128, 1, true }, |
| { DPairSpc_with_ssub_4, DPairSpc_with_ssub_4Bits, 299, 14, sizeof(DPairSpc_with_ssub_4Bits), ARM::DPairSpc_with_ssub_4RegClassID, 128, 1, true }, |
| { DPairSpc_with_dsub_0_in_DPR_8, DPairSpc_with_dsub_0_in_DPR_8Bits, 467, 8, sizeof(DPairSpc_with_dsub_0_in_DPR_8Bits), ARM::DPairSpc_with_dsub_0_in_DPR_8RegClassID, 128, 1, true }, |
| { DPairSpc_with_dsub_2_in_DPR_8, DPairSpc_with_dsub_2_in_DPR_8Bits, 754, 6, sizeof(DPairSpc_with_dsub_2_in_DPR_8Bits), ARM::DPairSpc_with_dsub_2_in_DPR_8RegClassID, 128, 1, true }, |
| { DPair, DPairBits, 2613, 31, sizeof(DPairBits), ARM::DPairRegClassID, 128, 1, true }, |
| { DPair_with_ssub_0, DPair_with_ssub_0Bits, 144, 16, sizeof(DPair_with_ssub_0Bits), ARM::DPair_with_ssub_0RegClassID, 128, 1, true }, |
| { QPR, QPRBits, 1643, 16, sizeof(QPRBits), ARM::QPRRegClassID, 128, 1, true }, |
| { DPair_with_ssub_2, DPair_with_ssub_2Bits, 218, 15, sizeof(DPair_with_ssub_2Bits), ARM::DPair_with_ssub_2RegClassID, 128, 1, true }, |
| { DPair_with_dsub_0_in_DPR_8, DPair_with_dsub_0_in_DPR_8Bits, 553, 8, sizeof(DPair_with_dsub_0_in_DPR_8Bits), ARM::DPair_with_dsub_0_in_DPR_8RegClassID, 128, 1, true }, |
| { MQPR, MQPRBits, 1642, 8, sizeof(MQPRBits), ARM::MQPRRegClassID, 128, 1, true }, |
| { QPR_VFP2, QPR_VFP2Bits, 171, 8, sizeof(QPR_VFP2Bits), ARM::QPR_VFP2RegClassID, 128, 1, true }, |
| { DPair_with_dsub_1_in_DPR_8, DPair_with_dsub_1_in_DPR_8Bits, 636, 7, sizeof(DPair_with_dsub_1_in_DPR_8Bits), ARM::DPair_with_dsub_1_in_DPR_8RegClassID, 128, 1, true }, |
| { QPR_8, QPR_8Bits, 1008, 4, sizeof(QPR_8Bits), ARM::QPR_8RegClassID, 128, 1, true }, |
| { DTriple, DTripleBits, 2407, 30, sizeof(DTripleBits), ARM::DTripleRegClassID, 192, 1, true }, |
| { DTripleSpc, DTripleSpcBits, 2307, 28, sizeof(DTripleSpcBits), ARM::DTripleSpcRegClassID, 192, 1, true }, |
| { DTripleSpc_with_ssub_0, DTripleSpc_with_ssub_0Bits, 62, 16, sizeof(DTripleSpc_with_ssub_0Bits), ARM::DTripleSpc_with_ssub_0RegClassID, 192, 1, true }, |
| { DTriple_with_ssub_0, DTriple_with_ssub_0Bits, 124, 16, sizeof(DTriple_with_ssub_0Bits), ARM::DTriple_with_ssub_0RegClassID, 192, 1, true }, |
| { DTriple_with_qsub_0_in_QPR, DTriple_with_qsub_0_in_QPRBits, 2081, 15, sizeof(DTriple_with_qsub_0_in_QPRBits), ARM::DTriple_with_qsub_0_in_QPRRegClassID, 192, 1, true }, |
| { DTriple_with_ssub_2, DTriple_with_ssub_2Bits, 198, 15, sizeof(DTriple_with_ssub_2Bits), ARM::DTriple_with_ssub_2RegClassID, 192, 1, true }, |
| { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2200, 15, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 192, 1, true }, |
| { DTripleSpc_with_ssub_4, DTripleSpc_with_ssub_4Bits, 276, 14, sizeof(DTripleSpc_with_ssub_4Bits), ARM::DTripleSpc_with_ssub_4RegClassID, 192, 1, true }, |
| { DTriple_with_ssub_4, DTriple_with_ssub_4Bits, 338, 14, sizeof(DTriple_with_ssub_4Bits), ARM::DTriple_with_ssub_4RegClassID, 192, 1, true }, |
| { DTripleSpc_with_ssub_8, DTripleSpc_with_ssub_8Bits, 1251, 12, sizeof(DTripleSpc_with_ssub_8Bits), ARM::DTripleSpc_with_ssub_8RegClassID, 192, 1, true }, |
| { DTripleSpc_with_dsub_0_in_DPR_8, DTripleSpc_with_dsub_0_in_DPR_8Bits, 435, 8, sizeof(DTripleSpc_with_dsub_0_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClassID, 192, 1, true }, |
| { DTriple_with_dsub_0_in_DPR_8, DTriple_with_dsub_0_in_DPR_8Bits, 524, 8, sizeof(DTriple_with_dsub_0_in_DPR_8Bits), ARM::DTriple_with_dsub_0_in_DPR_8RegClassID, 192, 1, true }, |
| { DTriple_with_qsub_0_in_MQPR, DTriple_with_qsub_0_in_MQPRBits, 1671, 8, sizeof(DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true }, |
| { DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2176, 8, sizeof(DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 192, 1, true }, |
| { DTriple_with_dsub_1_in_DPR_8, DTriple_with_dsub_1_in_DPR_8Bits, 607, 7, sizeof(DTriple_with_dsub_1_in_DPR_8Bits), ARM::DTriple_with_dsub_1_in_DPR_8RegClassID, 192, 1, true }, |
| { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 2018, 7, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 192, 1, true }, |
| { DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR, DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits, 1647, 7, sizeof(DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true }, |
| { DTripleSpc_with_dsub_2_in_DPR_8, DTripleSpc_with_dsub_2_in_DPR_8Bits, 722, 6, sizeof(DTripleSpc_with_dsub_2_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClassID, 192, 1, true }, |
| { DTriple_with_dsub_2_in_DPR_8, DTriple_with_dsub_2_in_DPR_8Bits, 811, 6, sizeof(DTriple_with_dsub_2_in_DPR_8Bits), ARM::DTriple_with_dsub_2_in_DPR_8RegClassID, 192, 1, true }, |
| { DTripleSpc_with_dsub_4_in_DPR_8, DTripleSpc_with_dsub_4_in_DPR_8Bits, 926, 4, sizeof(DTripleSpc_with_dsub_4_in_DPR_8Bits), ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClassID, 192, 1, true }, |
| { DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1985, 4, sizeof(DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 192, 1, true }, |
| { DTriple_with_qsub_0_in_QPR_8, DTriple_with_qsub_0_in_QPR_8Bits, 1014, 4, sizeof(DTriple_with_qsub_0_in_QPR_8Bits), ARM::DTriple_with_qsub_0_in_QPR_8RegClassID, 192, 1, true }, |
| { DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR, DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRBits, 1699, 3, sizeof(DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRBits), ARM::DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClassID, 192, 1, true }, |
| { DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8, DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits, 1118, 3, sizeof(DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits), ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID, 192, 1, true }, |
| { DQuadSpc, DQuadSpcBits, 2298, 28, sizeof(DQuadSpcBits), ARM::DQuadSpcRegClassID, 256, 1, true }, |
| { DQuadSpc_with_ssub_0, DQuadSpc_with_ssub_0Bits, 41, 16, sizeof(DQuadSpc_with_ssub_0Bits), ARM::DQuadSpc_with_ssub_0RegClassID, 256, 1, true }, |
| { DQuadSpc_with_ssub_4, DQuadSpc_with_ssub_4Bits, 255, 14, sizeof(DQuadSpc_with_ssub_4Bits), ARM::DQuadSpc_with_ssub_4RegClassID, 256, 1, true }, |
| { DQuadSpc_with_ssub_8, DQuadSpc_with_ssub_8Bits, 1230, 12, sizeof(DQuadSpc_with_ssub_8Bits), ARM::DQuadSpc_with_ssub_8RegClassID, 256, 1, true }, |
| { DQuadSpc_with_dsub_0_in_DPR_8, DQuadSpc_with_dsub_0_in_DPR_8Bits, 405, 8, sizeof(DQuadSpc_with_dsub_0_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClassID, 256, 1, true }, |
| { DQuadSpc_with_dsub_2_in_DPR_8, DQuadSpc_with_dsub_2_in_DPR_8Bits, 692, 6, sizeof(DQuadSpc_with_dsub_2_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClassID, 256, 1, true }, |
| { DQuadSpc_with_dsub_4_in_DPR_8, DQuadSpc_with_dsub_4_in_DPR_8Bits, 896, 4, sizeof(DQuadSpc_with_dsub_4_in_DPR_8Bits), ARM::DQuadSpc_with_dsub_4_in_DPR_8RegClassID, 256, 1, true }, |
| { DQuad, DQuadBits, 2367, 29, sizeof(DQuadBits), ARM::DQuadRegClassID, 256, 1, true }, |
| { DQuad_with_ssub_0, DQuad_with_ssub_0Bits, 106, 16, sizeof(DQuad_with_ssub_0Bits), ARM::DQuad_with_ssub_0RegClassID, 256, 1, true }, |
| { DQuad_with_ssub_2, DQuad_with_ssub_2Bits, 180, 15, sizeof(DQuad_with_ssub_2Bits), ARM::DQuad_with_ssub_2RegClassID, 256, 1, true }, |
| { QQPR, QQPRBits, 2068, 15, sizeof(QQPRBits), ARM::QQPRRegClassID, 256, 1, true }, |
| { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2130, 14, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 256, 1, true }, |
| { DQuad_with_ssub_4, DQuad_with_ssub_4Bits, 320, 14, sizeof(DQuad_with_ssub_4Bits), ARM::DQuad_with_ssub_4RegClassID, 256, 1, true }, |
| { DQuad_with_ssub_6, DQuad_with_ssub_6Bits, 358, 13, sizeof(DQuad_with_ssub_6Bits), ARM::DQuad_with_ssub_6RegClassID, 256, 1, true }, |
| { DQuad_with_dsub_0_in_DPR_8, DQuad_with_dsub_0_in_DPR_8Bits, 497, 8, sizeof(DQuad_with_dsub_0_in_DPR_8Bits), ARM::DQuad_with_dsub_0_in_DPR_8RegClassID, 256, 1, true }, |
| { DQuad_with_qsub_0_in_MQPR, DQuad_with_qsub_0_in_MQPRBits, 1621, 8, sizeof(DQuad_with_qsub_0_in_MQPRBits), ARM::DQuad_with_qsub_0_in_MQPRRegClassID, 256, 1, true }, |
| { DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR, DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits, 2108, 8, sizeof(DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRBits), ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID, 256, 1, true }, |
| { DQuad_with_dsub_1_in_DPR_8, DQuad_with_dsub_1_in_DPR_8Bits, 580, 7, sizeof(DQuad_with_dsub_1_in_DPR_8Bits), ARM::DQuad_with_dsub_1_in_DPR_8RegClassID, 256, 1, true }, |
| { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1782, 7, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true }, |
| { MQQPR, MQQPRBits, 2067, 7, sizeof(MQQPRBits), ARM::MQQPRRegClassID, 256, 1, true }, |
| { DQuad_with_dsub_2_in_DPR_8, DQuad_with_dsub_2_in_DPR_8Bits, 784, 6, sizeof(DQuad_with_dsub_2_in_DPR_8Bits), ARM::DQuad_with_dsub_2_in_DPR_8RegClassID, 256, 1, true }, |
| { DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1760, 6, sizeof(DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true }, |
| { DQuad_with_dsub_3_in_DPR_8, DQuad_with_dsub_3_in_DPR_8Bits, 840, 5, sizeof(DQuad_with_dsub_3_in_DPR_8Bits), ARM::DQuad_with_dsub_3_in_DPR_8RegClassID, 256, 1, true }, |
| { DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1829, 4, sizeof(DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true }, |
| { DQuad_with_qsub_0_in_QPR_8, DQuad_with_qsub_0_in_QPR_8Bits, 987, 4, sizeof(DQuad_with_qsub_0_in_QPR_8Bits), ARM::DQuad_with_qsub_0_in_QPR_8RegClassID, 256, 1, true }, |
| { DQuad_with_qsub_1_in_QPR_8, DQuad_with_qsub_1_in_QPR_8Bits, 1043, 3, sizeof(DQuad_with_qsub_1_in_QPR_8Bits), ARM::DQuad_with_qsub_1_in_QPR_8RegClassID, 256, 1, true }, |
| { DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8, DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits, 1070, 3, sizeof(DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Bits), ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID, 256, 1, true }, |
| { DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR, DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits, 1907, 2, sizeof(DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRBits), ARM::DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID, 256, 1, true }, |
| { QQQQPR, QQQQPRBits, 2074, 13, sizeof(QQQQPRBits), ARM::QQQQPRRegClassID, 512, 1, true }, |
| { QQQQPR_with_ssub_0, QQQQPR_with_ssub_0Bits, 0, 8, sizeof(QQQQPR_with_ssub_0Bits), ARM::QQQQPR_with_ssub_0RegClassID, 512, 1, true }, |
| { QQQQPR_with_ssub_4, QQQQPR_with_ssub_4Bits, 236, 7, sizeof(QQQQPR_with_ssub_4Bits), ARM::QQQQPR_with_ssub_4RegClassID, 512, 1, true }, |
| { QQQQPR_with_ssub_8, QQQQPR_with_ssub_8Bits, 1211, 6, sizeof(QQQQPR_with_ssub_8Bits), ARM::QQQQPR_with_ssub_8RegClassID, 512, 1, true }, |
| { MQQQQPR, MQQQQPRBits, 2073, 5, sizeof(MQQQQPRBits), ARM::MQQQQPRRegClassID, 512, 1, true }, |
| { MQQQQPR_with_dsub_0_in_DPR_8, MQQQQPR_with_dsub_0_in_DPR_8Bits, 376, 4, sizeof(MQQQQPR_with_dsub_0_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClassID, 512, 1, true }, |
| { MQQQQPR_with_dsub_2_in_DPR_8, MQQQQPR_with_dsub_2_in_DPR_8Bits, 663, 3, sizeof(MQQQQPR_with_dsub_2_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClassID, 512, 1, true }, |
| { MQQQQPR_with_dsub_4_in_DPR_8, MQQQQPR_with_dsub_4_in_DPR_8Bits, 867, 2, sizeof(MQQQQPR_with_dsub_4_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_4_in_DPR_8RegClassID, 512, 1, true }, |
| { MQQQQPR_with_dsub_6_in_DPR_8, MQQQQPR_with_dsub_6_in_DPR_8Bits, 958, 1, sizeof(MQQQQPR_with_dsub_6_in_DPR_8Bits), ARM::MQQQQPR_with_dsub_6_in_DPR_8RegClassID, 512, 1, true }, |
| }; |
| |
| // ARM Dwarf<->LLVM register mappings. |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0Dwarf2L[] = { |
| { 0U, ARM::R0 }, |
| { 1U, ARM::R1 }, |
| { 2U, ARM::R2 }, |
| { 3U, ARM::R3 }, |
| { 4U, ARM::R4 }, |
| { 5U, ARM::R5 }, |
| { 6U, ARM::R6 }, |
| { 7U, ARM::R7 }, |
| { 8U, ARM::R8 }, |
| { 9U, ARM::R9 }, |
| { 10U, ARM::R10 }, |
| { 11U, ARM::R11 }, |
| { 12U, ARM::R12 }, |
| { 13U, ARM::SP }, |
| { 14U, ARM::LR }, |
| { 15U, ARM::ZR }, |
| { 143U, ARM::RA_AUTH_CODE }, |
| { 256U, ARM::D0 }, |
| { 257U, ARM::D1 }, |
| { 258U, ARM::D2 }, |
| { 259U, ARM::D3 }, |
| { 260U, ARM::D4 }, |
| { 261U, ARM::D5 }, |
| { 262U, ARM::D6 }, |
| { 263U, ARM::D7 }, |
| { 264U, ARM::D8 }, |
| { 265U, ARM::D9 }, |
| { 266U, ARM::D10 }, |
| { 267U, ARM::D11 }, |
| { 268U, ARM::D12 }, |
| { 269U, ARM::D13 }, |
| { 270U, ARM::D14 }, |
| { 271U, ARM::D15 }, |
| { 272U, ARM::D16 }, |
| { 273U, ARM::D17 }, |
| { 274U, ARM::D18 }, |
| { 275U, ARM::D19 }, |
| { 276U, ARM::D20 }, |
| { 277U, ARM::D21 }, |
| { 278U, ARM::D22 }, |
| { 279U, ARM::D23 }, |
| { 280U, ARM::D24 }, |
| { 281U, ARM::D25 }, |
| { 282U, ARM::D26 }, |
| { 283U, ARM::D27 }, |
| { 284U, ARM::D28 }, |
| { 285U, ARM::D29 }, |
| { 286U, ARM::D30 }, |
| { 287U, ARM::D31 }, |
| }; |
| extern const unsigned ARMDwarfFlavour0Dwarf2LSize = std::size(ARMDwarfFlavour0Dwarf2L); |
| |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0Dwarf2L[] = { |
| { 0U, ARM::R0 }, |
| { 1U, ARM::R1 }, |
| { 2U, ARM::R2 }, |
| { 3U, ARM::R3 }, |
| { 4U, ARM::R4 }, |
| { 5U, ARM::R5 }, |
| { 6U, ARM::R6 }, |
| { 7U, ARM::R7 }, |
| { 8U, ARM::R8 }, |
| { 9U, ARM::R9 }, |
| { 10U, ARM::R10 }, |
| { 11U, ARM::R11 }, |
| { 12U, ARM::R12 }, |
| { 13U, ARM::SP }, |
| { 14U, ARM::LR }, |
| { 15U, ARM::ZR }, |
| { 143U, ARM::RA_AUTH_CODE }, |
| { 256U, ARM::D0 }, |
| { 257U, ARM::D1 }, |
| { 258U, ARM::D2 }, |
| { 259U, ARM::D3 }, |
| { 260U, ARM::D4 }, |
| { 261U, ARM::D5 }, |
| { 262U, ARM::D6 }, |
| { 263U, ARM::D7 }, |
| { 264U, ARM::D8 }, |
| { 265U, ARM::D9 }, |
| { 266U, ARM::D10 }, |
| { 267U, ARM::D11 }, |
| { 268U, ARM::D12 }, |
| { 269U, ARM::D13 }, |
| { 270U, ARM::D14 }, |
| { 271U, ARM::D15 }, |
| { 272U, ARM::D16 }, |
| { 273U, ARM::D17 }, |
| { 274U, ARM::D18 }, |
| { 275U, ARM::D19 }, |
| { 276U, ARM::D20 }, |
| { 277U, ARM::D21 }, |
| { 278U, ARM::D22 }, |
| { 279U, ARM::D23 }, |
| { 280U, ARM::D24 }, |
| { 281U, ARM::D25 }, |
| { 282U, ARM::D26 }, |
| { 283U, ARM::D27 }, |
| { 284U, ARM::D28 }, |
| { 285U, ARM::D29 }, |
| { 286U, ARM::D30 }, |
| { 287U, ARM::D31 }, |
| }; |
| extern const unsigned ARMEHFlavour0Dwarf2LSize = std::size(ARMEHFlavour0Dwarf2L); |
| |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0L2Dwarf[] = { |
| { ARM::LR, 14U }, |
| { ARM::PC, 15U }, |
| { ARM::RA_AUTH_CODE, 143U }, |
| { ARM::SP, 13U }, |
| { ARM::ZR, 15U }, |
| { ARM::D0, 256U }, |
| { ARM::D1, 257U }, |
| { ARM::D2, 258U }, |
| { ARM::D3, 259U }, |
| { ARM::D4, 260U }, |
| { ARM::D5, 261U }, |
| { ARM::D6, 262U }, |
| { ARM::D7, 263U }, |
| { ARM::D8, 264U }, |
| { ARM::D9, 265U }, |
| { ARM::D10, 266U }, |
| { ARM::D11, 267U }, |
| { ARM::D12, 268U }, |
| { ARM::D13, 269U }, |
| { ARM::D14, 270U }, |
| { ARM::D15, 271U }, |
| { ARM::D16, 272U }, |
| { ARM::D17, 273U }, |
| { ARM::D18, 274U }, |
| { ARM::D19, 275U }, |
| { ARM::D20, 276U }, |
| { ARM::D21, 277U }, |
| { ARM::D22, 278U }, |
| { ARM::D23, 279U }, |
| { ARM::D24, 280U }, |
| { ARM::D25, 281U }, |
| { ARM::D26, 282U }, |
| { ARM::D27, 283U }, |
| { ARM::D28, 284U }, |
| { ARM::D29, 285U }, |
| { ARM::D30, 286U }, |
| { ARM::D31, 287U }, |
| { ARM::R0, 0U }, |
| { ARM::R1, 1U }, |
| { ARM::R2, 2U }, |
| { ARM::R3, 3U }, |
| { ARM::R4, 4U }, |
| { ARM::R5, 5U }, |
| { ARM::R6, 6U }, |
| { ARM::R7, 7U }, |
| { ARM::R8, 8U }, |
| { ARM::R9, 9U }, |
| { ARM::R10, 10U }, |
| { ARM::R11, 11U }, |
| { ARM::R12, 12U }, |
| }; |
| extern const unsigned ARMDwarfFlavour0L2DwarfSize = std::size(ARMDwarfFlavour0L2Dwarf); |
| |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0L2Dwarf[] = { |
| { ARM::LR, 14U }, |
| { ARM::PC, 15U }, |
| { ARM::RA_AUTH_CODE, 143U }, |
| { ARM::SP, 13U }, |
| { ARM::ZR, 15U }, |
| { ARM::D0, 256U }, |
| { ARM::D1, 257U }, |
| { ARM::D2, 258U }, |
| { ARM::D3, 259U }, |
| { ARM::D4, 260U }, |
| { ARM::D5, 261U }, |
| { ARM::D6, 262U }, |
| { ARM::D7, 263U }, |
| { ARM::D8, 264U }, |
| { ARM::D9, 265U }, |
| { ARM::D10, 266U }, |
| { ARM::D11, 267U }, |
| { ARM::D12, 268U }, |
| { ARM::D13, 269U }, |
| { ARM::D14, 270U }, |
| { ARM::D15, 271U }, |
| { ARM::D16, 272U }, |
| { ARM::D17, 273U }, |
| { ARM::D18, 274U }, |
| { ARM::D19, 275U }, |
| { ARM::D20, 276U }, |
| { ARM::D21, 277U }, |
| { ARM::D22, 278U }, |
| { ARM::D23, 279U }, |
| { ARM::D24, 280U }, |
| { ARM::D25, 281U }, |
| { ARM::D26, 282U }, |
| { ARM::D27, 283U }, |
| { ARM::D28, 284U }, |
| { ARM::D29, 285U }, |
| { ARM::D30, 286U }, |
| { ARM::D31, 287U }, |
| { ARM::R0, 0U }, |
| { ARM::R1, 1U }, |
| { ARM::R2, 2U }, |
| { ARM::R3, 3U }, |
| { ARM::R4, 4U }, |
| { ARM::R5, 5U }, |
| { ARM::R6, 6U }, |
| { ARM::R7, 7U }, |
| { ARM::R8, 8U }, |
| { ARM::R9, 9U }, |
| { ARM::R10, 10U }, |
| { ARM::R11, 11U }, |
| { ARM::R12, 12U }, |
| }; |
| extern const unsigned ARMEHFlavour0L2DwarfSize = std::size(ARMEHFlavour0L2Dwarf); |
| |
| extern const uint16_t ARMRegEncodingTable[] = { |
| 0, |
| 15, |
| 15, |
| 0, |
| 14, |
| 15, |
| 8, |
| 9, |
| 3, |
| 3, |
| 2, |
| 0, |
| 4, |
| 14, |
| 15, |
| 12, |
| 13, |
| 2, |
| 32, |
| 15, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 15, |
| 16, |
| 17, |
| 18, |
| 19, |
| 20, |
| 21, |
| 22, |
| 23, |
| 24, |
| 25, |
| 26, |
| 27, |
| 28, |
| 29, |
| 30, |
| 31, |
| 10, |
| 7, |
| 6, |
| 5, |
| 13, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 15, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 15, |
| 16, |
| 17, |
| 18, |
| 19, |
| 20, |
| 21, |
| 22, |
| 23, |
| 24, |
| 25, |
| 26, |
| 27, |
| 28, |
| 29, |
| 30, |
| 31, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 15, |
| 16, |
| 17, |
| 18, |
| 19, |
| 20, |
| 21, |
| 22, |
| 23, |
| 24, |
| 25, |
| 26, |
| 27, |
| 28, |
| 29, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 0, |
| 2, |
| 4, |
| 6, |
| 8, |
| 10, |
| 12, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 15, |
| 16, |
| 17, |
| 18, |
| 19, |
| 20, |
| 21, |
| 22, |
| 23, |
| 24, |
| 25, |
| 26, |
| 27, |
| 28, |
| 29, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 15, |
| 16, |
| 17, |
| 18, |
| 19, |
| 20, |
| 21, |
| 22, |
| 23, |
| 24, |
| 25, |
| 26, |
| 27, |
| 0, |
| 1, |
| 2, |
| 3, |
| 4, |
| 5, |
| 6, |
| 7, |
| 8, |
| 9, |
| 10, |
| 11, |
| 12, |
| 13, |
| 14, |
| 15, |
| 16, |
| 17, |
| 18, |
| 19, |
| 20, |
| 21, |
| 22, |
| 23, |
| 24, |
| 25, |
| 1, |
| 3, |
| 5, |
| 7, |
| 9, |
| 11, |
| 13, |
| 15, |
| 17, |
| 19, |
| 21, |
| 23, |
| 25, |
| 27, |
| 29, |
| 1, |
| 3, |
| 5, |
| 7, |
| 9, |
| 11, |
| 13, |
| 15, |
| 17, |
| 19, |
| 21, |
| 23, |
| 25, |
| 27, |
| }; |
| static inline void InitARMMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) { |
| RI->InitMCRegisterInfo(ARMRegDesc, 296, RA, PC, ARMMCRegisterClasses, 136, ARMRegUnitRoots, 84, ARMRegDiffLists, ARMLaneMaskLists, ARMRegStrings, ARMRegClassStrings, ARMSubRegIdxLists, 57, |
| ARMSubRegIdxRanges, ARMRegEncodingTable); |
| |
| switch (DwarfFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| RI->mapDwarfRegsToLLVMRegs(ARMDwarfFlavour0Dwarf2L, ARMDwarfFlavour0Dwarf2LSize, false); |
| break; |
| } |
| switch (EHFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| RI->mapDwarfRegsToLLVMRegs(ARMEHFlavour0Dwarf2L, ARMEHFlavour0Dwarf2LSize, true); |
| break; |
| } |
| switch (DwarfFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| RI->mapLLVMRegsToDwarfRegs(ARMDwarfFlavour0L2Dwarf, ARMDwarfFlavour0L2DwarfSize, false); |
| break; |
| } |
| switch (EHFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| RI->mapLLVMRegsToDwarfRegs(ARMEHFlavour0L2Dwarf, ARMEHFlavour0L2DwarfSize, true); |
| break; |
| } |
| } |
| |
| } // end namespace llvm |
| |
| #endif // GET_REGINFO_MC_DESC |
| |
| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| |* *| |
| |* Register Information Header Fragment *| |
| |* *| |
| |* Automatically generated file, do not edit! *| |
| |* *| |
| \*===----------------------------------------------------------------------===*/ |
| |
| |
| #ifdef GET_REGINFO_HEADER |
| #undef GET_REGINFO_HEADER |
| |
| #include "llvm/CodeGen/TargetRegisterInfo.h" |
| |
| namespace llvm { |
| |
| class ARMFrameLowering; |
| |
| struct ARMGenRegisterInfo : public TargetRegisterInfo { |
| explicit ARMGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| unsigned PC = 0, unsigned HwMode = 0); |
| unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| unsigned getRegUnitWeight(unsigned RegUnit) const override; |
| unsigned getNumRegPressureSets() const override; |
| const char *getRegPressureSetName(unsigned Idx) const override; |
| unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| const int *getRegUnitPressureSets(unsigned RegUnit) const override; |
| ArrayRef<const char *> getRegMaskNames() const override; |
| ArrayRef<const uint32_t *> getRegMasks() const override; |
| bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| /// Devirtualized TargetFrameLowering. |
| static const ARMFrameLowering *getFrameLowering( |
| const MachineFunction &MF); |
| }; |
| |
| namespace ARM { // Register classes |
| extern const TargetRegisterClass HPRRegClass; |
| extern const TargetRegisterClass FPWithVPRRegClass; |
| extern const TargetRegisterClass SPRRegClass; |
| extern const TargetRegisterClass FPWithVPR_with_ssub_0RegClass; |
| extern const TargetRegisterClass GPRRegClass; |
| extern const TargetRegisterClass GPRwithAPSRRegClass; |
| extern const TargetRegisterClass GPRwithZRRegClass; |
| extern const TargetRegisterClass SPR_8RegClass; |
| extern const TargetRegisterClass GPRnopcRegClass; |
| extern const TargetRegisterClass GPRnospRegClass; |
| extern const TargetRegisterClass GPRwithAPSR_NZCVnospRegClass; |
| extern const TargetRegisterClass GPRwithAPSRnospRegClass; |
| extern const TargetRegisterClass GPRwithZRnospRegClass; |
| extern const TargetRegisterClass GPRnoipRegClass; |
| extern const TargetRegisterClass rGPRRegClass; |
| extern const TargetRegisterClass GPRnoip_and_GPRnopcRegClass; |
| extern const TargetRegisterClass GPRnoip_and_GPRnospRegClass; |
| extern const TargetRegisterClass GPRnoip_and_GPRwithAPSR_NZCVnospRegClass; |
| extern const TargetRegisterClass tGPRwithpcRegClass; |
| extern const TargetRegisterClass FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass; |
| extern const TargetRegisterClass hGPRRegClass; |
| extern const TargetRegisterClass tGPRRegClass; |
| extern const TargetRegisterClass tGPREvenRegClass; |
| extern const TargetRegisterClass GPRnopc_and_hGPRRegClass; |
| extern const TargetRegisterClass GPRnosp_and_hGPRRegClass; |
| extern const TargetRegisterClass GPRnoip_and_hGPRRegClass; |
| extern const TargetRegisterClass GPRnoip_and_tGPREvenRegClass; |
| extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_hGPRRegClass; |
| extern const TargetRegisterClass tGPROddRegClass; |
| extern const TargetRegisterClass GPRnopc_and_GPRnoip_and_hGPRRegClass; |
| extern const TargetRegisterClass GPRnosp_and_GPRnoip_and_hGPRRegClass; |
| extern const TargetRegisterClass tcGPRRegClass; |
| extern const TargetRegisterClass GPRnoip_and_tcGPRRegClass; |
| extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass; |
| extern const TargetRegisterClass hGPR_and_tGPREvenRegClass; |
| extern const TargetRegisterClass tGPR_and_tGPREvenRegClass; |
| extern const TargetRegisterClass tGPR_and_tGPROddRegClass; |
| extern const TargetRegisterClass tGPREven_and_tcGPRRegClass; |
| extern const TargetRegisterClass hGPR_and_GPRnoip_and_tGPREvenRegClass; |
| extern const TargetRegisterClass hGPR_and_tGPROddRegClass; |
| extern const TargetRegisterClass tGPREven_and_GPRnoip_and_tcGPRRegClass; |
| extern const TargetRegisterClass tGPROdd_and_tcGPRRegClass; |
| extern const TargetRegisterClass CCRRegClass; |
| extern const TargetRegisterClass FPCXTRegsRegClass; |
| extern const TargetRegisterClass GPRlrRegClass; |
| extern const TargetRegisterClass GPRspRegClass; |
| extern const TargetRegisterClass VCCRRegClass; |
| extern const TargetRegisterClass cl_FPSCR_NZCVRegClass; |
| extern const TargetRegisterClass hGPR_and_tGPRwithpcRegClass; |
| extern const TargetRegisterClass hGPR_and_tcGPRRegClass; |
| extern const TargetRegisterClass DPRRegClass; |
| extern const TargetRegisterClass DPR_VFP2RegClass; |
| extern const TargetRegisterClass DPR_8RegClass; |
| extern const TargetRegisterClass GPRPairRegClass; |
| extern const TargetRegisterClass GPRPairnospRegClass; |
| extern const TargetRegisterClass GPRPair_with_gsub_0_in_tGPRRegClass; |
| extern const TargetRegisterClass GPRPair_with_gsub_0_in_hGPRRegClass; |
| extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRRegClass; |
| extern const TargetRegisterClass GPRPair_with_gsub_1_in_tcGPRRegClass; |
| extern const TargetRegisterClass GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass; |
| extern const TargetRegisterClass GPRPair_with_gsub_1_in_GPRspRegClass; |
| extern const TargetRegisterClass DPairSpcRegClass; |
| extern const TargetRegisterClass DPairSpc_with_ssub_0RegClass; |
| extern const TargetRegisterClass DPairSpc_with_ssub_4RegClass; |
| extern const TargetRegisterClass DPairSpc_with_dsub_0_in_DPR_8RegClass; |
| extern const TargetRegisterClass DPairSpc_with_dsub_2_in_DPR_8RegClass; |
| extern const TargetRegisterClass DPairRegClass; |
| extern const TargetRegisterClass DPair_with_ssub_0RegClass; |
| extern const TargetRegisterClass QPRRegClass; |
| extern const TargetRegisterClass DPair_with_ssub_2RegClass; |
| extern const TargetRegisterClass DPair_with_dsub_0_in_DPR_8RegClass; |
| extern const TargetRegisterClass MQPRRegClass; |
| extern const TargetRegisterClass QPR_VFP2RegClass; |
| extern const TargetRegisterClass DPair_with_dsub_1_in_DPR_8RegClass; |
| extern const TargetRegisterClass QPR_8RegClass; |
| extern const TargetRegisterClass DTripleRegClass; |
| extern const TargetRegisterClass DTripleSpcRegClass; |
| extern const TargetRegisterClass DTripleSpc_with_ssub_0RegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_0RegClass; |
| extern const TargetRegisterClass DTriple_with_qsub_0_in_QPRRegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_2RegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| extern const TargetRegisterClass DTripleSpc_with_ssub_4RegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_4RegClass; |
| extern const TargetRegisterClass DTripleSpc_with_ssub_8RegClass; |
| extern const TargetRegisterClass DTripleSpc_with_dsub_0_in_DPR_8RegClass; |
| extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8RegClass; |
| extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPRRegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| extern const TargetRegisterClass DTriple_with_dsub_1_in_DPR_8RegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass; |
| extern const TargetRegisterClass DTripleSpc_with_dsub_2_in_DPR_8RegClass; |
| extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8RegClass; |
| extern const TargetRegisterClass DTripleSpc_with_dsub_4_in_DPR_8RegClass; |
| extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| extern const TargetRegisterClass DTriple_with_qsub_0_in_QPR_8RegClass; |
| extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClass; |
| extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass; |
| extern const TargetRegisterClass DQuadSpcRegClass; |
| extern const TargetRegisterClass DQuadSpc_with_ssub_0RegClass; |
| extern const TargetRegisterClass DQuadSpc_with_ssub_4RegClass; |
| extern const TargetRegisterClass DQuadSpc_with_ssub_8RegClass; |
| extern const TargetRegisterClass DQuadSpc_with_dsub_0_in_DPR_8RegClass; |
| extern const TargetRegisterClass DQuadSpc_with_dsub_2_in_DPR_8RegClass; |
| extern const TargetRegisterClass DQuadSpc_with_dsub_4_in_DPR_8RegClass; |
| extern const TargetRegisterClass DQuadRegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_0RegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_2RegClass; |
| extern const TargetRegisterClass QQPRRegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_4RegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_6RegClass; |
| extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8RegClass; |
| extern const TargetRegisterClass DQuad_with_qsub_0_in_MQPRRegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass; |
| extern const TargetRegisterClass DQuad_with_dsub_1_in_DPR_8RegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| extern const TargetRegisterClass MQQPRRegClass; |
| extern const TargetRegisterClass DQuad_with_dsub_2_in_DPR_8RegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8RegClass; |
| extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| extern const TargetRegisterClass DQuad_with_qsub_0_in_QPR_8RegClass; |
| extern const TargetRegisterClass DQuad_with_qsub_1_in_QPR_8RegClass; |
| extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass; |
| extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass; |
| extern const TargetRegisterClass QQQQPRRegClass; |
| extern const TargetRegisterClass QQQQPR_with_ssub_0RegClass; |
| extern const TargetRegisterClass QQQQPR_with_ssub_4RegClass; |
| extern const TargetRegisterClass QQQQPR_with_ssub_8RegClass; |
| extern const TargetRegisterClass MQQQQPRRegClass; |
| extern const TargetRegisterClass MQQQQPR_with_dsub_0_in_DPR_8RegClass; |
| extern const TargetRegisterClass MQQQQPR_with_dsub_2_in_DPR_8RegClass; |
| extern const TargetRegisterClass MQQQQPR_with_dsub_4_in_DPR_8RegClass; |
| extern const TargetRegisterClass MQQQQPR_with_dsub_6_in_DPR_8RegClass; |
| } // end namespace ARM |
| |
| } // end namespace llvm |
| |
| #endif // GET_REGINFO_HEADER |
| |
| /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| |* *| |
| |* Target Register and Register Classes Information *| |
| |* *| |
| |* Automatically generated file, do not edit! *| |
| |* *| |
| \*===----------------------------------------------------------------------===*/ |
| |
| |
| #ifdef GET_REGINFO_TARGET_DESC |
| #undef GET_REGINFO_TARGET_DESC |
| |
| namespace llvm { |
| |
| extern const MCRegisterClass ARMMCRegisterClasses[]; |
| |
| static const MVT::SimpleValueType VTLists[] = { |
| /* 0 */ MVT::i32, MVT::Other, |
| /* 2 */ MVT::f16, MVT::bf16, MVT::Other, |
| /* 5 */ MVT::f32, MVT::Other, |
| /* 7 */ MVT::i32, MVT::v16i1, MVT::v8i1, MVT::v4i1, MVT::v2i1, MVT::Other, |
| /* 13 */ MVT::v2i64, MVT::Other, |
| /* 15 */ MVT::v4i64, MVT::Other, |
| /* 17 */ MVT::v8i64, MVT::Other, |
| /* 19 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::Other, |
| /* 27 */ MVT::f64, MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v2f32, MVT::v4f16, MVT::v4bf16, MVT::Other, |
| /* 36 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::v8bf16, MVT::Other, |
| /* 45 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::Other, |
| /* 52 */ MVT::Untyped, MVT::Other, |
| }; |
| |
| static const char *SubRegIndexNameTable[] = { "dsub_0", "dsub_1", "dsub_2", "dsub_3", "dsub_4", "dsub_5", "dsub_6", "dsub_7", "gsub_0", "gsub_1", "qqsub_0", "qqsub_1", "qsub_0", "qsub_1", "qsub_2", "qsub_3", "ssub_0", "ssub_1", "ssub_2", "ssub_3", "ssub_4", "ssub_5", "ssub_6", "ssub_7", "ssub_8", "ssub_9", "ssub_10", "ssub_11", "ssub_12", "ssub_13", "ssub_14", "ssub_15", "ssub_0_ssub_1_ssub_4_ssub_5", "ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5", "ssub_2_ssub_3_ssub_6_ssub_7", "ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7", "ssub_2_ssub_3_ssub_4_ssub_5", "ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9", "ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13", "ssub_2_ssub_3_ssub_6_ssub_7_dsub_5", "ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7", "ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9", "ssub_4_ssub_5_ssub_8_ssub_9", "ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9", "ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13", "ssub_6_ssub_7_dsub_5", "ssub_6_ssub_7_ssub_8_ssub_9_dsub_5", "ssub_6_ssub_7_dsub_5_dsub_7", "ssub_6_ssub_7_ssub_8_ssub_9", "ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13", "ssub_8_ssub_9_ssub_12_ssub_13", "ssub_8_ssub_9_dsub_5_ssub_12_ssub_13", "dsub_5_dsub_7", "dsub_5_ssub_12_ssub_13_dsub_7", "dsub_5_ssub_12_ssub_13", "ssub_4_ssub_5_ssub_6_ssub_7_qsub_2", "" }; |
| |
| |
| static const LaneBitmask SubRegIndexLaneMaskTable[] = { |
| LaneBitmask::getAll(), |
| LaneBitmask(0x000000000000000C), // dsub_0 |
| LaneBitmask(0x0000000000000030), // dsub_1 |
| LaneBitmask(0x00000000000000C0), // dsub_2 |
| LaneBitmask(0x0000000000000300), // dsub_3 |
| LaneBitmask(0x0000000000000C00), // dsub_4 |
| LaneBitmask(0x0000000000003000), // dsub_5 |
| LaneBitmask(0x000000000000C000), // dsub_6 |
| LaneBitmask(0x0000000000030000), // dsub_7 |
| LaneBitmask(0x0000000000000001), // gsub_0 |
| LaneBitmask(0x0000000000000002), // gsub_1 |
| LaneBitmask(0x00000000000003FC), // qqsub_0 |
| LaneBitmask(0x000000000003FC00), // qqsub_1 |
| LaneBitmask(0x000000000000003C), // qsub_0 |
| LaneBitmask(0x00000000000003C0), // qsub_1 |
| LaneBitmask(0x0000000000003C00), // qsub_2 |
| LaneBitmask(0x000000000003C000), // qsub_3 |
| LaneBitmask(0x0000000000000004), // ssub_0 |
| LaneBitmask(0x0000000000000008), // ssub_1 |
| LaneBitmask(0x0000000000000010), // ssub_2 |
| LaneBitmask(0x0000000000000020), // ssub_3 |
| LaneBitmask(0x0000000000000040), // ssub_4 |
| LaneBitmask(0x0000000000000080), // ssub_5 |
| LaneBitmask(0x0000000000000100), // ssub_6 |
| LaneBitmask(0x0000000000000200), // ssub_7 |
| LaneBitmask(0x0000000000000400), // ssub_8 |
| LaneBitmask(0x0000000000000800), // ssub_9 |
| LaneBitmask(0x0000000000001000), // ssub_10 |
| LaneBitmask(0x0000000000002000), // ssub_11 |
| LaneBitmask(0x0000000000004000), // ssub_12 |
| LaneBitmask(0x0000000000008000), // ssub_13 |
| LaneBitmask(0x0000000000010000), // ssub_14 |
| LaneBitmask(0x0000000000020000), // ssub_15 |
| LaneBitmask(0x00000000000000CC), // ssub_0_ssub_1_ssub_4_ssub_5 |
| LaneBitmask(0x00000000000000FC), // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| LaneBitmask(0x0000000000000330), // ssub_2_ssub_3_ssub_6_ssub_7 |
| LaneBitmask(0x00000000000003F0), // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| LaneBitmask(0x00000000000000F0), // ssub_2_ssub_3_ssub_4_ssub_5 |
| LaneBitmask(0x0000000000000CCC), // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| LaneBitmask(0x000000000000CCCC), // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| LaneBitmask(0x0000000000003330), // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| LaneBitmask(0x0000000000033330), // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| LaneBitmask(0x0000000000000FF0), // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| LaneBitmask(0x0000000000000CC0), // ssub_4_ssub_5_ssub_8_ssub_9 |
| LaneBitmask(0x0000000000000FC0), // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| LaneBitmask(0x000000000000CCC0), // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| LaneBitmask(0x0000000000003300), // ssub_6_ssub_7_dsub_5 |
| LaneBitmask(0x0000000000003F00), // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| LaneBitmask(0x0000000000033300), // ssub_6_ssub_7_dsub_5_dsub_7 |
| LaneBitmask(0x0000000000000F00), // ssub_6_ssub_7_ssub_8_ssub_9 |
| LaneBitmask(0x000000000000FF00), // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| LaneBitmask(0x000000000000CC00), // ssub_8_ssub_9_ssub_12_ssub_13 |
| LaneBitmask(0x000000000000FC00), // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| LaneBitmask(0x0000000000033000), // dsub_5_dsub_7 |
| LaneBitmask(0x000000000003F000), // dsub_5_ssub_12_ssub_13_dsub_7 |
| LaneBitmask(0x000000000000F000), // dsub_5_ssub_12_ssub_13 |
| LaneBitmask(0x0000000000003FC0), // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| |
| |
| static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = { |
| // Mode = 0 (Default) |
| { 16, 16, 32, VTLists+2 }, // HPR |
| { 32, 32, 32, VTLists+5 }, // FPWithVPR |
| { 32, 32, 32, VTLists+5 }, // SPR |
| { 32, 32, 32, VTLists+5 }, // FPWithVPR_with_ssub_0 |
| { 32, 32, 32, VTLists+0 }, // GPR |
| { 32, 32, 32, VTLists+0 }, // GPRwithAPSR |
| { 32, 32, 32, VTLists+0 }, // GPRwithZR |
| { 32, 32, 32, VTLists+5 }, // SPR_8 |
| { 32, 32, 32, VTLists+0 }, // GPRnopc |
| { 32, 32, 32, VTLists+0 }, // GPRnosp |
| { 32, 32, 32, VTLists+0 }, // GPRwithAPSR_NZCVnosp |
| { 32, 32, 32, VTLists+0 }, // GPRwithAPSRnosp |
| { 32, 32, 32, VTLists+0 }, // GPRwithZRnosp |
| { 32, 32, 32, VTLists+0 }, // GPRnoip |
| { 32, 32, 32, VTLists+0 }, // rGPR |
| { 32, 32, 32, VTLists+0 }, // GPRnoip_and_GPRnopc |
| { 32, 32, 32, VTLists+0 }, // GPRnoip_and_GPRnosp |
| { 32, 32, 32, VTLists+0 }, // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| { 32, 32, 32, VTLists+0 }, // tGPRwithpc |
| { 32, 32, 32, VTLists+5 }, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| { 32, 32, 32, VTLists+0 }, // hGPR |
| { 32, 32, 32, VTLists+0 }, // tGPR |
| { 32, 32, 32, VTLists+0 }, // tGPREven |
| { 32, 32, 32, VTLists+0 }, // GPRnopc_and_hGPR |
| { 32, 32, 32, VTLists+0 }, // GPRnosp_and_hGPR |
| { 32, 32, 32, VTLists+0 }, // GPRnoip_and_hGPR |
| { 32, 32, 32, VTLists+0 }, // GPRnoip_and_tGPREven |
| { 32, 32, 32, VTLists+0 }, // GPRnosp_and_GPRnopc_and_hGPR |
| { 32, 32, 32, VTLists+0 }, // tGPROdd |
| { 32, 32, 32, VTLists+0 }, // GPRnopc_and_GPRnoip_and_hGPR |
| { 32, 32, 32, VTLists+0 }, // GPRnosp_and_GPRnoip_and_hGPR |
| { 32, 32, 32, VTLists+0 }, // tcGPR |
| { 32, 32, 32, VTLists+0 }, // GPRnoip_and_tcGPR |
| { 32, 32, 32, VTLists+0 }, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| { 32, 32, 32, VTLists+0 }, // hGPR_and_tGPREven |
| { 32, 32, 32, VTLists+0 }, // tGPR_and_tGPREven |
| { 32, 32, 32, VTLists+0 }, // tGPR_and_tGPROdd |
| { 32, 32, 32, VTLists+0 }, // tGPREven_and_tcGPR |
| { 32, 32, 32, VTLists+0 }, // hGPR_and_GPRnoip_and_tGPREven |
| { 32, 32, 32, VTLists+0 }, // hGPR_and_tGPROdd |
| { 32, 32, 32, VTLists+0 }, // tGPREven_and_GPRnoip_and_tcGPR |
| { 32, 32, 32, VTLists+0 }, // tGPROdd_and_tcGPR |
| { 32, 32, 32, VTLists+0 }, // CCR |
| { 32, 32, 32, VTLists+0 }, // FPCXTRegs |
| { 32, 32, 32, VTLists+0 }, // GPRlr |
| { 32, 32, 32, VTLists+0 }, // GPRsp |
| { 32, 32, 32, VTLists+7 }, // VCCR |
| { 32, 32, 32, VTLists+0 }, // cl_FPSCR_NZCV |
| { 32, 32, 32, VTLists+0 }, // hGPR_and_tGPRwithpc |
| { 32, 32, 32, VTLists+0 }, // hGPR_and_tcGPR |
| { 64, 64, 64, VTLists+27 }, // DPR |
| { 64, 64, 64, VTLists+27 }, // DPR_VFP2 |
| { 64, 64, 64, VTLists+27 }, // DPR_8 |
| { 64, 64, 64, VTLists+52 }, // GPRPair |
| { 64, 64, 64, VTLists+52 }, // GPRPairnosp |
| { 64, 64, 64, VTLists+52 }, // GPRPair_with_gsub_0_in_tGPR |
| { 64, 64, 64, VTLists+52 }, // GPRPair_with_gsub_0_in_hGPR |
| { 64, 64, 64, VTLists+52 }, // GPRPair_with_gsub_0_in_tcGPR |
| { 64, 64, 64, VTLists+52 }, // GPRPair_with_gsub_1_in_tcGPR |
| { 64, 64, 64, VTLists+52 }, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| { 64, 64, 64, VTLists+52 }, // GPRPair_with_gsub_1_in_GPRsp |
| { 128, 128, 64, VTLists+13 }, // DPairSpc |
| { 128, 128, 64, VTLists+13 }, // DPairSpc_with_ssub_0 |
| { 128, 128, 64, VTLists+13 }, // DPairSpc_with_ssub_4 |
| { 128, 128, 64, VTLists+13 }, // DPairSpc_with_dsub_0_in_DPR_8 |
| { 128, 128, 64, VTLists+13 }, // DPairSpc_with_dsub_2_in_DPR_8 |
| { 128, 128, 128, VTLists+45 }, // DPair |
| { 128, 128, 128, VTLists+45 }, // DPair_with_ssub_0 |
| { 128, 128, 128, VTLists+36 }, // QPR |
| { 128, 128, 128, VTLists+45 }, // DPair_with_ssub_2 |
| { 128, 128, 128, VTLists+45 }, // DPair_with_dsub_0_in_DPR_8 |
| { 128, 128, 128, VTLists+19 }, // MQPR |
| { 128, 128, 128, VTLists+45 }, // QPR_VFP2 |
| { 128, 128, 128, VTLists+45 }, // DPair_with_dsub_1_in_DPR_8 |
| { 128, 128, 128, VTLists+45 }, // QPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTriple |
| { 192, 192, 64, VTLists+52 }, // DTripleSpc |
| { 192, 192, 64, VTLists+52 }, // DTripleSpc_with_ssub_0 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_0 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_qsub_0_in_QPR |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_2 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| { 192, 192, 64, VTLists+52 }, // DTripleSpc_with_ssub_4 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_4 |
| { 192, 192, 64, VTLists+52 }, // DTripleSpc_with_ssub_8 |
| { 192, 192, 64, VTLists+52 }, // DTripleSpc_with_dsub_0_in_DPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_dsub_0_in_DPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_qsub_0_in_MQPR |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_dsub_1_in_DPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| { 192, 192, 64, VTLists+52 }, // DTripleSpc_with_dsub_2_in_DPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_dsub_2_in_DPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTripleSpc_with_dsub_4_in_DPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_qsub_0_in_QPR_8 |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| { 192, 192, 64, VTLists+52 }, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| { 256, 256, 64, VTLists+15 }, // DQuadSpc |
| { 256, 256, 64, VTLists+15 }, // DQuadSpc_with_ssub_0 |
| { 256, 256, 64, VTLists+15 }, // DQuadSpc_with_ssub_4 |
| { 256, 256, 64, VTLists+15 }, // DQuadSpc_with_ssub_8 |
| { 256, 256, 64, VTLists+15 }, // DQuadSpc_with_dsub_0_in_DPR_8 |
| { 256, 256, 64, VTLists+15 }, // DQuadSpc_with_dsub_2_in_DPR_8 |
| { 256, 256, 64, VTLists+15 }, // DQuadSpc_with_dsub_4_in_DPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_0 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_2 |
| { 256, 256, 256, VTLists+15 }, // QQPR |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_4 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_6 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_dsub_0_in_DPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_qsub_0_in_MQPR |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_dsub_1_in_DPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| { 256, 256, 256, VTLists+15 }, // MQQPR |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_dsub_2_in_DPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_dsub_3_in_DPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_qsub_0_in_QPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_qsub_1_in_QPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| { 256, 256, 256, VTLists+15 }, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| { 512, 512, 256, VTLists+17 }, // QQQQPR |
| { 512, 512, 256, VTLists+17 }, // QQQQPR_with_ssub_0 |
| { 512, 512, 256, VTLists+17 }, // QQQQPR_with_ssub_4 |
| { 512, 512, 256, VTLists+17 }, // QQQQPR_with_ssub_8 |
| { 512, 512, 256, VTLists+17 }, // MQQQQPR |
| { 512, 512, 256, VTLists+17 }, // MQQQQPR_with_dsub_0_in_DPR_8 |
| { 512, 512, 256, VTLists+17 }, // MQQQQPR_with_dsub_2_in_DPR_8 |
| { 512, 512, 256, VTLists+17 }, // MQQQQPR_with_dsub_4_in_DPR_8 |
| { 512, 512, 256, VTLists+17 }, // MQQQQPR_with_dsub_6_in_DPR_8 |
| }; |
| |
| static const TargetRegisterClass *const NullRegClasses[] = { nullptr }; |
| |
| static const uint32_t HPRSubClassMask[] = { |
| 0x00000085, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_0 |
| 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_1 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_2 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_3 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_4 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_7 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_8 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_10 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_11 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_12 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_14 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_15 |
| }; |
| |
| static const uint32_t FPWithVPRSubClassMask[] = { |
| 0x0008008e, 0x001c4000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0xe0000000, 0xffffffff, 0xffffffff, 0x000000ff, // dsub_0 |
| 0x00000000, 0x00000000, 0xafcbcffc, 0xfffffc07, 0x000000ff, // dsub_1 |
| 0x00000000, 0xe0000000, 0xfffff803, 0xffffffff, 0x000000ff, // dsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // dsub_3 |
| 0x00000000, 0x00000000, 0x50343000, 0x800003f8, 0x000000ff, // dsub_4 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_7 |
| 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_0 |
| 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_1 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_2 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_3 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_4 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_7 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_8 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_10 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_11 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_12 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_14 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_15 |
| }; |
| |
| static const uint32_t SPRSubClassMask[] = { |
| 0x00000084, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_0 |
| 0x00080008, 0xc0180000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // ssub_1 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_2 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // ssub_3 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_4 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_7 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_8 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_10 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_11 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_12 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_14 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_15 |
| }; |
| |
| static const uint32_t FPWithVPR_with_ssub_0SubClassMask[] = { |
| 0x00080008, 0x00180000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0xc0000000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // dsub_0 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // dsub_1 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // dsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // dsub_3 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // dsub_4 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_7 |
| }; |
| |
| static const uint32_t GPRSubClassMask[] = { |
| 0xfff7e310, 0x000333ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRwithAPSRSubClassMask[] = { |
| 0xbce2c520, 0x000233ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRwithZRSubClassMask[] = { |
| 0xbce2d140, 0x000233ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t SPR_8SubClassMask[] = { |
| 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00080000, 0x00100000, 0xf2600643, 0x7e920387, 0x000000f0, // ssub_0 |
| 0x00080000, 0x00100000, 0xf2600643, 0x7e920387, 0x000000f0, // ssub_1 |
| 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // ssub_2 |
| 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // ssub_3 |
| 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // ssub_4 |
| 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_7 |
| 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // ssub_8 |
| 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_10 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_11 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_12 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_14 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_15 |
| }; |
| |
| static const uint32_t GPRnopcSubClassMask[] = { |
| 0xbce2c100, 0x000233ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnospSubClassMask[] = { |
| 0xdd674200, 0x000313ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRwithAPSR_NZCVnospSubClassMask[] = { |
| 0x9c624400, 0x000213ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRwithAPSRnospSubClassMask[] = { |
| 0x9c624800, 0x000213ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRwithZRnospSubClassMask[] = { |
| 0x9c625000, 0x000213ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnoipSubClassMask[] = { |
| 0x7627a000, 0x000123db, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t rGPRSubClassMask[] = { |
| 0x9c624000, 0x000213ff, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnoip_and_GPRnopcSubClassMask[] = { |
| 0x34228000, 0x000023db, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnoip_and_GPRnospSubClassMask[] = { |
| 0x54270000, 0x000103db, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnoip_and_GPRwithAPSR_NZCVnospSubClassMask[] = { |
| 0x14220000, 0x000003db, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t tGPRwithpcSubClassMask[] = { |
| 0x00240000, 0x00010319, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8SubClassMask[] = { |
| 0x00080000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xf2600643, 0x7e920387, 0x000000f0, // dsub_0 |
| 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // dsub_1 |
| 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // dsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // dsub_3 |
| 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // dsub_4 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_7 |
| }; |
| |
| static const uint32_t hGPRSubClassMask[] = { |
| 0x6b900000, 0x000330c6, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t tGPRSubClassMask[] = { |
| 0x00200000, 0x00000319, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t tGPREvenSubClassMask[] = { |
| 0x04400000, 0x0002116c, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t GPRnopc_and_hGPRSubClassMask[] = { |
| 0x28800000, 0x000230c6, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnosp_and_hGPRSubClassMask[] = { |
| 0x49000000, 0x000310c6, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnoip_and_hGPRSubClassMask[] = { |
| 0x62000000, 0x000120c2, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnoip_and_tGPREvenSubClassMask[] = { |
| 0x04000000, 0x00000148, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t GPRnosp_and_GPRnopc_and_hGPRSubClassMask[] = { |
| 0x08000000, 0x000210c6, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t tGPROddSubClassMask[] = { |
| 0x10000000, 0x00000290, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnopc_and_GPRnoip_and_hGPRSubClassMask[] = { |
| 0x20000000, 0x000020c2, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnosp_and_GPRnoip_and_hGPRSubClassMask[] = { |
| 0x40000000, 0x000100c2, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t tcGPRSubClassMask[] = { |
| 0x80000000, 0x00020321, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x16000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnoip_and_tcGPRSubClassMask[] = { |
| 0x00000000, 0x00000301, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSubClassMask[] = { |
| 0x00000000, 0x000000c2, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t hGPR_and_tGPREvenSubClassMask[] = { |
| 0x00000000, 0x00021044, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t tGPR_and_tGPREvenSubClassMask[] = { |
| 0x00000000, 0x00000108, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t tGPR_and_tGPROddSubClassMask[] = { |
| 0x00000000, 0x00000210, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t tGPREven_and_tcGPRSubClassMask[] = { |
| 0x00000000, 0x00020120, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x16000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t hGPR_and_GPRnoip_and_tGPREvenSubClassMask[] = { |
| 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t hGPR_and_tGPROddSubClassMask[] = { |
| 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t tGPREven_and_GPRnoip_and_tcGPRSubClassMask[] = { |
| 0x00000000, 0x00000100, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t tGPROdd_and_tcGPRSubClassMask[] = { |
| 0x00000000, 0x00000200, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t CCRSubClassMask[] = { |
| 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t FPCXTRegsSubClassMask[] = { |
| 0x00000000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRlrSubClassMask[] = { |
| 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRspSubClassMask[] = { |
| 0x00000000, 0x00002000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_1 |
| }; |
| |
| static const uint32_t VCCRSubClassMask[] = { |
| 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t cl_FPSCR_NZCVSubClassMask[] = { |
| 0x00000000, 0x00008000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t hGPR_and_tGPRwithpcSubClassMask[] = { |
| 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t hGPR_and_tcGPRSubClassMask[] = { |
| 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // gsub_0 |
| }; |
| |
| static const uint32_t DPRSubClassMask[] = { |
| 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0xe0000000, 0xffffffff, 0xffffffff, 0x000000ff, // dsub_0 |
| 0x00000000, 0x00000000, 0xafcbcffc, 0xfffffc07, 0x000000ff, // dsub_1 |
| 0x00000000, 0xe0000000, 0xfffff803, 0xffffffff, 0x000000ff, // dsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // dsub_3 |
| 0x00000000, 0x00000000, 0x50343000, 0x800003f8, 0x000000ff, // dsub_4 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_7 |
| }; |
| |
| static const uint32_t DPR_VFP2SubClassMask[] = { |
| 0x00000000, 0x00180000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0xc0000000, 0xfffd67eb, 0x7fff9bf7, 0x000000ff, // dsub_0 |
| 0x00000000, 0x00000000, 0xaec907e0, 0x7ff79007, 0x000000ff, // dsub_1 |
| 0x00000000, 0x80000000, 0xfe7c0003, 0x7ff383e7, 0x000000fe, // dsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // dsub_3 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // dsub_4 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_7 |
| }; |
| |
| static const uint32_t DPR_8SubClassMask[] = { |
| 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xf2600643, 0x7e920387, 0x000000f0, // dsub_0 |
| 0x00000000, 0x00000000, 0x22000600, 0x7a900007, 0x000000f0, // dsub_1 |
| 0x00000000, 0x00000000, 0x70000002, 0x72800306, 0x000000e0, // dsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // dsub_3 |
| 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // dsub_4 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_6 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_7 |
| }; |
| |
| static const uint32_t GPRPairSubClassMask[] = { |
| 0x00000000, 0x1fe00000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRPairnospSubClassMask[] = { |
| 0x00000000, 0x0cc00000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRPair_with_gsub_0_in_tGPRSubClassMask[] = { |
| 0x00000000, 0x04800000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRPair_with_gsub_0_in_hGPRSubClassMask[] = { |
| 0x00000000, 0x19000000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRPair_with_gsub_0_in_tcGPRSubClassMask[] = { |
| 0x00000000, 0x16000000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRPair_with_gsub_1_in_tcGPRSubClassMask[] = { |
| 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSubClassMask[] = { |
| 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t GPRPair_with_gsub_1_in_GPRspSubClassMask[] = { |
| 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, |
| }; |
| |
| static const uint32_t DPairSpcSubClassMask[] = { |
| 0x00000000, 0xe0000000, 0x00000003, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xfffff800, 0xffffffff, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x50343000, 0x800003f8, 0x000000ff, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DPairSpc_with_ssub_0SubClassMask[] = { |
| 0x00000000, 0xc0000000, 0x00000003, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xfffd6000, 0x7fff9bf7, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x50340000, 0x000003e0, 0x000000fe, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DPairSpc_with_ssub_4SubClassMask[] = { |
| 0x00000000, 0x80000000, 0x00000003, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xfe7c0000, 0x7ff383e7, 0x000000fe, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x000000fc, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DPairSpc_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000003, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xf2600000, 0x7e920387, 0x000000f0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x000000f0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x50000000, 0x00000300, 0x000000e0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DPairSpc_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x70000000, 0x72800306, 0x000000e0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x000000c0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DPairSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x000007fc, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xafcbc800, 0xfffffc07, 0x000000ff, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_3 |
| 0x00000000, 0x00000000, 0xafcbc800, 0xfffffc07, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DPair_with_ssub_0SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x000007e8, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xafc94000, 0x7fff9807, 0x000000ff, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x000000fe, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3 |
| 0x00000000, 0x00000000, 0xaec90000, 0x7ff79007, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t QPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000590, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x08808000, 0x98442003, 0x000000ff, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x98442000, 0x000000ff, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qsub_3 |
| 0x00000000, 0x00000000, 0x85020000, 0x65284004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| }; |
| |
| static const uint32_t DPair_with_ssub_2SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x000007e0, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xaec90000, 0x7ff79007, 0x000000ff, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3 |
| 0x00000000, 0x00000000, 0xae480000, 0x7ff38007, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DPair_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000640, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0xa2400000, 0x7e920007, 0x000000f0, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x000000e0, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qsub_3 |
| 0x00000000, 0x00000000, 0x22000000, 0x7a900007, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000580, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x08800000, 0x18440003, 0x000000ff, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3 |
| 0x00000000, 0x00000000, 0x84000000, 0x65200004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| }; |
| |
| static const uint32_t QPR_VFP2SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000580, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x08800000, 0x18440003, 0x000000ff, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qsub_3 |
| 0x00000000, 0x00000000, 0x84000000, 0x65200004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| }; |
| |
| static const uint32_t DPair_with_dsub_1_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000600, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x22000000, 0x7a900007, 0x000000f0, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qsub_3 |
| 0x00000000, 0x00000000, 0x20000000, 0x72800006, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t QPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000400, 0x00000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x18000003, 0x000000f0, // qsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x000000e0, // qsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qsub_2 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qsub_3 |
| 0x00000000, 0x00000000, 0x00000000, 0x60000004, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5 |
| }; |
| |
| static const uint32_t DTripleSubClassMask[] = { |
| 0x00000000, 0x00000000, 0xafcbc800, 0x00000007, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTripleSpcSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x50343000, 0x000003f8, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DTripleSpc_with_ssub_0SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x50342000, 0x000003f0, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_0SubClassMask[] = { |
| 0x00000000, 0x00000000, 0xafc94000, 0x00000007, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x7fff9800, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_qsub_0_in_QPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x08808000, 0x00000003, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x98442000, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x65284000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_2SubClassMask[] = { |
| 0x00000000, 0x00000000, 0xaec90000, 0x00000007, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x85020000, 0x00000004, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x65284000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x98442000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTripleSpc_with_ssub_4SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x50340000, 0x000003e0, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_4SubClassMask[] = { |
| 0x00000000, 0x00000000, 0xae480000, 0x00000007, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x000000fe, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTripleSpc_with_ssub_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x50300000, 0x000003c0, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DTripleSpc_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x50200000, 0x00000380, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0xa2400000, 0x00000007, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x7e920000, 0x000000f0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_qsub_0_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x08800000, 0x00000003, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x18440000, 0x000000ff, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x65200000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x85000000, 0x00000004, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x65280000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x18440000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_dsub_1_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x22000000, 0x00000007, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x000000f0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x84000000, 0x00000004, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x65200000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x08000000, 0x00000003, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x000000fe, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x65000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DTripleSpc_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x50000000, 0x00000300, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x20000000, 0x00000006, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x000000e0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTripleSpc_with_dsub_4_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x40000000, 0x00000200, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x80000000, 0x00000004, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x64000000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x18000000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DTriple_with_qsub_0_in_QPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000003, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x18000000, 0x000000f0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x000000e0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // dsub_5_ssub_12_ssub_13_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSpcSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x000003f8, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSpc_with_ssub_0SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x000003f0, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSpc_with_ssub_4SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x000003e0, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSpc_with_ssub_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x000003c0, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSpc_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000380, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSpc_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000300, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSpc_with_dsub_4_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_dsub_5_dsub_7 |
| }; |
| |
| static const uint32_t DQuadSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x7ffffc00, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_0SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x7fff9800, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_2SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff79000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t QQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x18442000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x65284000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_4SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x7ff38000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_6SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x7fd30000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x7e920000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_qsub_0_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x18440000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x65280000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DQuad_with_dsub_1_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x7a900000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x65200000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t MQQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x18400000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x72800000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x65000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DQuad_with_dsub_3_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x64000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DQuad_with_qsub_0_in_QPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x18000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_qsub_1_in_QPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // qqsub_0 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // qqsub_1 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| static const uint32_t DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| }; |
| |
| static const uint32_t QQQQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x000000ff, |
| }; |
| |
| static const uint32_t QQQQPR_with_ssub_0SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000ff, |
| }; |
| |
| static const uint32_t QQQQPR_with_ssub_4SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fe, |
| }; |
| |
| static const uint32_t QQQQPR_with_ssub_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000fc, |
| }; |
| |
| static const uint32_t MQQQQPRSubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f8, |
| }; |
| |
| static const uint32_t MQQQQPR_with_dsub_0_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000f0, |
| }; |
| |
| static const uint32_t MQQQQPR_with_dsub_2_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000e0, |
| }; |
| |
| static const uint32_t MQQQQPR_with_dsub_4_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000c0, |
| }; |
| |
| static const uint32_t MQQQQPR_with_dsub_6_in_DPR_8SubClassMask[] = { |
| 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, |
| }; |
| |
| static const uint16_t SuperRegIdxSeqs[] = { |
| /* 0 */ 1, 2, 3, 4, 5, 6, 7, 8, 0, |
| /* 9 */ 9, 0, |
| /* 11 */ 9, 10, 0, |
| /* 14 */ 1, 2, 3, 4, 5, 6, 7, 8, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 0, |
| /* 39 */ 13, 14, 15, 16, 37, 0, |
| /* 45 */ 38, 40, 45, 48, 0, |
| /* 50 */ 42, 50, 0, |
| /* 53 */ 34, 36, 44, 52, 0, |
| /* 58 */ 33, 35, 43, 46, 51, 53, 0, |
| /* 65 */ 34, 36, 47, 54, 0, |
| /* 70 */ 34, 36, 44, 47, 52, 54, 0, |
| /* 77 */ 13, 14, 15, 16, 37, 49, 55, 0, |
| /* 85 */ 11, 12, 56, 0, |
| /* 89 */ 11, 12, 42, 50, 56, 0, |
| }; |
| |
| static const TargetRegisterClass *const SPRSuperclasses[] = { |
| &ARM::HPRRegClass, |
| &ARM::FPWithVPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const FPWithVPR_with_ssub_0Superclasses[] = { |
| &ARM::FPWithVPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const SPR_8Superclasses[] = { |
| &ARM::HPRRegClass, |
| &ARM::FPWithVPRRegClass, |
| &ARM::SPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnopcSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnospSuperclasses[] = { |
| &ARM::GPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRwithAPSR_NZCVnospSuperclasses[] = { |
| &ARM::GPRwithAPSRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRwithZRnospSuperclasses[] = { |
| &ARM::GPRwithZRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnoipSuperclasses[] = { |
| &ARM::GPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const rGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnoip_and_GPRnopcSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnoipRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnoip_and_GPRnospSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnoip_and_GPRwithAPSR_NZCVnospSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPRwithpcSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Superclasses[] = { |
| &ARM::FPWithVPRRegClass, |
| &ARM::FPWithVPR_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPREvenSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::rGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnopc_and_hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnosp_and_hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnoip_and_hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnoip_and_tGPREvenSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPREvenRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnosp_and_GPRnopc_and_hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPROddSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnopc_and_GPRnoip_and_hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnosp_and_GPRnoip_and_hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tcGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::rGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnoip_and_tcGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| &ARM::tGPRRegClass, |
| &ARM::tcGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const hGPR_and_tGPREvenSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPR_and_tGPREvenSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| &ARM::tGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::GPRnoip_and_tGPREvenRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPR_and_tGPROddSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| &ARM::tGPRRegClass, |
| &ARM::tGPROddRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPREven_and_tcGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::tcGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const hGPR_and_GPRnoip_and_tGPREvenSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnoip_and_tGPREvenRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| &ARM::hGPR_and_tGPREvenRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const hGPR_and_tGPROddSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| &ARM::tGPROddRegClass, |
| &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPREven_and_GPRnoip_and_tcGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| &ARM::tGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::GPRnoip_and_tGPREvenRegClass, |
| &ARM::tcGPRRegClass, |
| &ARM::GPRnoip_and_tcGPRRegClass, |
| &ARM::tGPR_and_tGPREvenRegClass, |
| &ARM::tGPREven_and_tcGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const tGPROdd_and_tcGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| &ARM::tGPRRegClass, |
| &ARM::tGPROddRegClass, |
| &ARM::tcGPRRegClass, |
| &ARM::GPRnoip_and_tcGPRRegClass, |
| &ARM::tGPR_and_tGPROddRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRlrSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| &ARM::hGPR_and_tGPREvenRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRspSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const VCCRSuperclasses[] = { |
| &ARM::FPWithVPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const hGPR_and_tGPRwithpcSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const hGPR_and_tcGPRSuperclasses[] = { |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::hGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| &ARM::tcGPRRegClass, |
| &ARM::hGPR_and_tGPREvenRegClass, |
| &ARM::tGPREven_and_tcGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPRSuperclasses[] = { |
| &ARM::FPWithVPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPR_VFP2Superclasses[] = { |
| &ARM::FPWithVPRRegClass, |
| &ARM::FPWithVPR_with_ssub_0RegClass, |
| &ARM::DPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPR_8Superclasses[] = { |
| &ARM::FPWithVPRRegClass, |
| &ARM::FPWithVPR_with_ssub_0RegClass, |
| &ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass, |
| &ARM::DPRRegClass, |
| &ARM::DPR_VFP2RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRPairnospSuperclasses[] = { |
| &ARM::GPRPairRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRPair_with_gsub_0_in_tGPRSuperclasses[] = { |
| &ARM::GPRPairRegClass, |
| &ARM::GPRPairnospRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRPair_with_gsub_0_in_hGPRSuperclasses[] = { |
| &ARM::GPRPairRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRPair_with_gsub_0_in_tcGPRSuperclasses[] = { |
| &ARM::GPRPairRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRPair_with_gsub_1_in_tcGPRSuperclasses[] = { |
| &ARM::GPRPairRegClass, |
| &ARM::GPRPairnospRegClass, |
| &ARM::GPRPair_with_gsub_0_in_tGPRRegClass, |
| &ARM::GPRPair_with_gsub_0_in_tcGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSuperclasses[] = { |
| &ARM::GPRPairRegClass, |
| &ARM::GPRPairnospRegClass, |
| &ARM::GPRPair_with_gsub_0_in_hGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const GPRPair_with_gsub_1_in_GPRspSuperclasses[] = { |
| &ARM::GPRPairRegClass, |
| &ARM::GPRPair_with_gsub_0_in_hGPRRegClass, |
| &ARM::GPRPair_with_gsub_0_in_tcGPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPairSpc_with_ssub_0Superclasses[] = { |
| &ARM::DPairSpcRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPairSpc_with_ssub_4Superclasses[] = { |
| &ARM::DPairSpcRegClass, |
| &ARM::DPairSpc_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPairSpc_with_dsub_0_in_DPR_8Superclasses[] = { |
| &ARM::DPairSpcRegClass, |
| &ARM::DPairSpc_with_ssub_0RegClass, |
| &ARM::DPairSpc_with_ssub_4RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPairSpc_with_dsub_2_in_DPR_8Superclasses[] = { |
| &ARM::DPairSpcRegClass, |
| &ARM::DPairSpc_with_ssub_0RegClass, |
| &ARM::DPairSpc_with_ssub_4RegClass, |
| &ARM::DPairSpc_with_dsub_0_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPair_with_ssub_0Superclasses[] = { |
| &ARM::DPairRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const QPRSuperclasses[] = { |
| &ARM::DPairRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPair_with_ssub_2Superclasses[] = { |
| &ARM::DPairRegClass, |
| &ARM::DPair_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPair_with_dsub_0_in_DPR_8Superclasses[] = { |
| &ARM::DPairRegClass, |
| &ARM::DPair_with_ssub_0RegClass, |
| &ARM::DPair_with_ssub_2RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const MQPRSuperclasses[] = { |
| &ARM::DPairRegClass, |
| &ARM::DPair_with_ssub_0RegClass, |
| &ARM::QPRRegClass, |
| &ARM::DPair_with_ssub_2RegClass, |
| &ARM::QPR_VFP2RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const QPR_VFP2Superclasses[] = { |
| &ARM::DPairRegClass, |
| &ARM::DPair_with_ssub_0RegClass, |
| &ARM::QPRRegClass, |
| &ARM::DPair_with_ssub_2RegClass, |
| &ARM::MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DPair_with_dsub_1_in_DPR_8Superclasses[] = { |
| &ARM::DPairRegClass, |
| &ARM::DPair_with_ssub_0RegClass, |
| &ARM::DPair_with_ssub_2RegClass, |
| &ARM::DPair_with_dsub_0_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const QPR_8Superclasses[] = { |
| &ARM::DPairRegClass, |
| &ARM::DPair_with_ssub_0RegClass, |
| &ARM::QPRRegClass, |
| &ARM::DPair_with_ssub_2RegClass, |
| &ARM::DPair_with_dsub_0_in_DPR_8RegClass, |
| &ARM::MQPRRegClass, |
| &ARM::QPR_VFP2RegClass, |
| &ARM::DPair_with_dsub_1_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTripleSpc_with_ssub_0Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_0Superclasses[] = { |
| &ARM::DTripleRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_qsub_0_in_QPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_2Superclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTripleSpc_with_ssub_4Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_4Superclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTripleSpc_with_ssub_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTripleSpc_with_dsub_0_in_DPR_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_dsub_0_in_DPR_8Superclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_qsub_0_in_MQPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_qsub_0_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_dsub_1_in_DPR_8Superclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_qsub_0_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_qsub_0_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTripleSpc_with_dsub_2_in_DPR_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_dsub_2_in_DPR_8Superclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTriple_with_dsub_1_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTripleSpc_with_dsub_4_in_DPR_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_qsub_0_in_QPR_8Superclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_qsub_0_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTriple_with_qsub_0_in_MQPRRegClass, |
| &ARM::DTriple_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSuperclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_qsub_0_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTriple_with_qsub_0_in_MQPRRegClass, |
| &ARM::DTriple_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass, |
| &ARM::DTriple_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DTriple_with_qsub_0_in_QPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses[] = { |
| &ARM::DTripleRegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DTriple_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DTriple_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuadSpcSuperclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuadSpc_with_ssub_0Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DQuadSpcRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuadSpc_with_ssub_4Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DQuadSpcRegClass, |
| &ARM::DQuadSpc_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuadSpc_with_ssub_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| &ARM::DQuadSpcRegClass, |
| &ARM::DQuadSpc_with_ssub_0RegClass, |
| &ARM::DQuadSpc_with_ssub_4RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuadSpc_with_dsub_0_in_DPR_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuadSpcRegClass, |
| &ARM::DQuadSpc_with_ssub_0RegClass, |
| &ARM::DQuadSpc_with_ssub_4RegClass, |
| &ARM::DQuadSpc_with_ssub_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuadSpc_with_dsub_2_in_DPR_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DQuadSpcRegClass, |
| &ARM::DQuadSpc_with_ssub_0RegClass, |
| &ARM::DQuadSpc_with_ssub_4RegClass, |
| &ARM::DQuadSpc_with_ssub_8RegClass, |
| &ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuadSpc_with_dsub_4_in_DPR_8Superclasses[] = { |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClass, |
| &ARM::DQuadSpcRegClass, |
| &ARM::DQuadSpc_with_ssub_0RegClass, |
| &ARM::DQuadSpc_with_ssub_4RegClass, |
| &ARM::DQuadSpc_with_ssub_8RegClass, |
| &ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_0Superclasses[] = { |
| &ARM::DQuadRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_2Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const QQPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_4Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_6Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_dsub_0_in_DPR_8Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_qsub_0_in_MQPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::QQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_dsub_1_in_DPR_8Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const MQQPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::QQPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_qsub_0_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_dsub_2_in_DPR_8Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_dsub_3_in_DPR_8Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DQuad_with_dsub_2_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_qsub_0_in_QPR_8Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::QQPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_qsub_0_in_MQPRRegClass, |
| &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| &ARM::MQQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_qsub_1_in_QPR_8Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::QQPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_qsub_0_in_MQPRRegClass, |
| &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| &ARM::MQQPRRegClass, |
| &ARM::DQuad_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DQuad_with_dsub_3_in_DPR_8RegClass, |
| &ARM::DQuad_with_qsub_0_in_QPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses[] = { |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_dsub_3_in_DPR_8RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const QQQQPR_with_ssub_0Superclasses[] = { |
| &ARM::QQQQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const QQQQPR_with_ssub_4Superclasses[] = { |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const QQQQPR_with_ssub_8Superclasses[] = { |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| &ARM::QQQQPR_with_ssub_4RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const MQQQQPRSuperclasses[] = { |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| &ARM::QQQQPR_with_ssub_4RegClass, |
| &ARM::QQQQPR_with_ssub_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const MQQQQPR_with_dsub_0_in_DPR_8Superclasses[] = { |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| &ARM::QQQQPR_with_ssub_4RegClass, |
| &ARM::QQQQPR_with_ssub_8RegClass, |
| &ARM::MQQQQPRRegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const MQQQQPR_with_dsub_2_in_DPR_8Superclasses[] = { |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| &ARM::QQQQPR_with_ssub_4RegClass, |
| &ARM::QQQQPR_with_ssub_8RegClass, |
| &ARM::MQQQQPRRegClass, |
| &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const MQQQQPR_with_dsub_4_in_DPR_8Superclasses[] = { |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| &ARM::QQQQPR_with_ssub_4RegClass, |
| &ARM::QQQQPR_with_ssub_8RegClass, |
| &ARM::MQQQQPRRegClass, |
| &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass, |
| &ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| static const TargetRegisterClass *const MQQQQPR_with_dsub_6_in_DPR_8Superclasses[] = { |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| &ARM::QQQQPR_with_ssub_4RegClass, |
| &ARM::QQQQPR_with_ssub_8RegClass, |
| &ARM::MQQQQPRRegClass, |
| &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass, |
| &ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClass, |
| &ARM::MQQQQPR_with_dsub_4_in_DPR_8RegClass, |
| nullptr |
| }; |
| |
| |
| static inline unsigned HPRAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs(); |
| } |
| |
| static ArrayRef<MCPhysReg> HPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 }; |
| static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::HPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = HPRAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned SPRAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs(); |
| } |
| |
| static ArrayRef<MCPhysReg> SPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::S0, ARM::S2, ARM::S4, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28, ARM::S30, ARM::S1, ARM::S3, ARM::S5, ARM::S7, ARM::S9, ARM::S11, ARM::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 }; |
| static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2, ARM::S6, ARM::S10, ARM::S14, ARM::S18, ARM::S22, ARM::S26, ARM::S30, ARM::S1, ARM::S5, ARM::S9, ARM::S13, ARM::S17, ARM::S21, ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::SPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = SPRAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::PC }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = GPRAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRwithAPSRAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRwithAPSRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithAPSRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = GPRwithAPSRAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRwithZRAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRwithZRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP, ARM::ZR }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = GPRwithZRAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnopcAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnopcGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::SP }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnopcRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = GPRnopcAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnospAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnospGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::PC }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnospRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = GPRnospAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRwithZRnospAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRwithZRnospGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::ZR }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithZRnospRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = GPRwithZRnospAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnoipAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnoipGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP, ARM::PC }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoipRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = GPRnoipAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned rGPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> rGPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::LR, ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12 }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::LR, ARM::R8, ARM::R9, ARM::R10, ARM::R11 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::rGPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = rGPRAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnoip_and_GPRnopcAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnoip_and_GPRnopcGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::SP }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRnopcRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = GPRnoip_and_GPRnopcAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnoip_and_GPRnospAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnoip_and_GPRnospGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::PC }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRnospRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = GPRnoip_and_GPRnospAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnoip_and_GPRwithAPSR_NZCVnospAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnoip_and_GPRwithAPSR_NZCVnospGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11 }; |
| static const MCPhysReg AltOrder2[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; |
| static const MCPhysReg AltOrder3[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2), |
| ArrayRef(AltOrder3) |
| }; |
| const unsigned Select = GPRnoip_and_GPRwithAPSR_NZCVnospAltOrderSelect(MF); |
| assert(Select < 4); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tGPREvenAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tGPREvenGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREvenRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tGPREvenAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnoip_and_tGPREvenAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnoip_and_tGPREvenGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_tGPREvenRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = GPRnoip_and_tGPREvenAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tGPROddAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tGPROddGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R1, ARM::R3, ARM::R5, ARM::R7 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPROddRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tGPROddAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tcGPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tcGPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tcGPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tcGPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned GPRnoip_and_tcGPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> GPRnoip_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnoip_and_tcGPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = GPRnoip_and_tcGPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tGPR_and_tGPREvenAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tGPR_and_tGPREvenGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2, ARM::R4, ARM::R6 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPREvenRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tGPR_and_tGPREvenAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tGPR_and_tGPROddAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tGPR_and_tGPROddGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R1, ARM::R3, ARM::R5, ARM::R7 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPR_and_tGPROddRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tGPR_and_tGPROddAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tGPREven_and_tcGPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tGPREven_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_tcGPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tGPREven_and_tcGPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tGPREven_and_GPRnoip_and_tcGPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tGPREven_and_GPRnoip_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R0, ARM::R2 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPREven_and_GPRnoip_and_tcGPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tGPREven_and_GPRnoip_and_tcGPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned tGPROdd_and_tcGPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> tGPROdd_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::R1, ARM::R3 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::tGPROdd_and_tcGPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = tGPROdd_and_tcGPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned hGPR_and_tcGPRAltOrderSelect(const MachineFunction &MF) { |
| return MF.getSubtarget<ARMSubtarget>().isThumb1Only(); |
| } |
| |
| static ArrayRef<MCPhysReg> hGPR_and_tcGPRGetRawAllocationOrder(const MachineFunction &MF) { |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::hGPR_and_tcGPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef<MCPhysReg>() |
| }; |
| const unsigned Select = hGPR_and_tcGPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned DPRAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs(); |
| } |
| |
| static ArrayRef<MCPhysReg> DPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15 }; |
| static const MCPhysReg AltOrder2[] = { ARM::D16, ARM::D18, ARM::D20, ARM::D22, ARM::D24, ARM::D26, ARM::D28, ARM::D30, ARM::D0, ARM::D2, ARM::D4, ARM::D6, ARM::D8, ARM::D10, ARM::D12, ARM::D14, ARM::D17, ARM::D19, ARM::D21, ARM::D23, ARM::D25, ARM::D27, ARM::D29, ARM::D31, ARM::D1, ARM::D3, ARM::D5, ARM::D7, ARM::D9, ARM::D11, ARM::D13, ARM::D15 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = DPRAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned DPairAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| } |
| |
| static ArrayRef<MCPhysReg> DPairGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D17_D18, ARM::D19_D20, ARM::D21_D22, ARM::D23_D24, ARM::D25_D26, ARM::D27_D28, ARM::D29_D30, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPairRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = DPairAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned DPair_with_ssub_0AltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| } |
| |
| static ArrayRef<MCPhysReg> DPair_with_ssub_0GetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14, ARM::D15_D16 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_0RegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = DPair_with_ssub_0AltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned QPRAltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| } |
| |
| static ArrayRef<MCPhysReg> QPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7 }; |
| static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = QPRAltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned DPair_with_ssub_2AltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| } |
| |
| static ArrayRef<MCPhysReg> DPair_with_ssub_2GetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14 }; |
| static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8, ARM::D9_D10, ARM::D11_D12, ARM::D13_D14 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_ssub_2RegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = DPair_with_ssub_2AltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned DPair_with_dsub_0_in_DPR_8AltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| } |
| |
| static ArrayRef<MCPhysReg> DPair_with_dsub_0_in_DPR_8GetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8 }; |
| static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6, ARM::D7_D8 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_0_in_DPR_8RegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = DPair_with_dsub_0_in_DPR_8AltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned DPair_with_dsub_1_in_DPR_8AltOrderSelect(const MachineFunction &MF) { |
| return 1 + MF.getSubtarget<ARMSubtarget>().hasMVEIntegerOps(); |
| } |
| |
| static ArrayRef<MCPhysReg> DPair_with_dsub_1_in_DPR_8GetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6 }; |
| static const MCPhysReg AltOrder2[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::D1_D2, ARM::D3_D4, ARM::D5_D6 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DPair_with_dsub_1_in_DPR_8RegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1), |
| ArrayRef(AltOrder2) |
| }; |
| const unsigned Select = DPair_with_dsub_1_in_DPR_8AltOrderSelect(MF); |
| assert(Select < 3); |
| return Order[Select]; |
| } |
| |
| static inline unsigned QQPRAltOrderSelect(const MachineFunction &MF) { return 1; } |
| |
| static ArrayRef<MCPhysReg> QQPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q8_Q9, ARM::Q9_Q10, ARM::Q10_Q11, ARM::Q11_Q12, ARM::Q12_Q13, ARM::Q13_Q14, ARM::Q14_Q15, ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = QQPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned DQuad_with_qsub_0_in_MQPRAltOrderSelect(const MachineFunction &MF) { return 1; } |
| |
| static ArrayRef<MCPhysReg> DQuad_with_qsub_0_in_MQPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4, ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7, ARM::Q7_Q8 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::DQuad_with_qsub_0_in_MQPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = DQuad_with_qsub_0_in_MQPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned QQQQPRAltOrderSelect(const MachineFunction &MF) { return 1; } |
| |
| static ArrayRef<MCPhysReg> QQQQPRGetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q8_Q9_Q10_Q11, ARM::Q9_Q10_Q11_Q12, ARM::Q10_Q11_Q12_Q13, ARM::Q11_Q12_Q13_Q14, ARM::Q12_Q13_Q14_Q15, ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPRRegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = QQQQPRAltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned QQQQPR_with_ssub_0AltOrderSelect(const MachineFunction &MF) { return 1; } |
| |
| static ArrayRef<MCPhysReg> QQQQPR_with_ssub_0GetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9, ARM::Q7_Q8_Q9_Q10 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_0RegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = QQQQPR_with_ssub_0AltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned QQQQPR_with_ssub_4AltOrderSelect(const MachineFunction &MF) { return 1; } |
| |
| static ArrayRef<MCPhysReg> QQQQPR_with_ssub_4GetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8, ARM::Q6_Q7_Q8_Q9 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_4RegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = QQQQPR_with_ssub_4AltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| static inline unsigned QQQQPR_with_ssub_8AltOrderSelect(const MachineFunction &MF) { return 1; } |
| |
| static ArrayRef<MCPhysReg> QQQQPR_with_ssub_8GetRawAllocationOrder(const MachineFunction &MF) { |
| static const MCPhysReg AltOrder1[] = { ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5, ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7, ARM::Q5_Q6_Q7_Q8 }; |
| const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::QQQQPR_with_ssub_8RegClassID]; |
| const ArrayRef<MCPhysReg> Order[] = { |
| ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| ArrayRef(AltOrder1) |
| }; |
| const unsigned Select = QQQQPR_with_ssub_8AltOrderSelect(MF); |
| assert(Select < 2); |
| return Order[Select]; |
| } |
| |
| namespace ARM { // Register class instances |
| extern const TargetRegisterClass HPRRegClass = { |
| &ARMMCRegisterClasses[HPRRegClassID], |
| HPRSubClassMask, |
| SuperRegIdxSeqs + 22, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| false, /* CoveredBySubRegs */ |
| NullRegClasses, |
| HPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass FPWithVPRRegClass = { |
| &ARMMCRegisterClasses[FPWithVPRRegClassID], |
| FPWithVPRSubClassMask, |
| SuperRegIdxSeqs + 14, |
| LaneBitmask(0x000000000000000C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| false, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass SPRRegClass = { |
| &ARMMCRegisterClasses[SPRRegClassID], |
| SPRSubClassMask, |
| SuperRegIdxSeqs + 22, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| false, /* CoveredBySubRegs */ |
| SPRSuperclasses, |
| SPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass FPWithVPR_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[FPWithVPR_with_ssub_0RegClassID], |
| FPWithVPR_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 0, |
| LaneBitmask(0x000000000000000C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| FPWithVPR_with_ssub_0Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRRegClass = { |
| &ARMMCRegisterClasses[GPRRegClassID], |
| GPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| GPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRwithAPSRRegClass = { |
| &ARMMCRegisterClasses[GPRwithAPSRRegClassID], |
| GPRwithAPSRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| GPRwithAPSRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRwithZRRegClass = { |
| &ARMMCRegisterClasses[GPRwithZRRegClassID], |
| GPRwithZRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| GPRwithZRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass SPR_8RegClass = { |
| &ARMMCRegisterClasses[SPR_8RegClassID], |
| SPR_8SubClassMask, |
| SuperRegIdxSeqs + 22, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| false, /* CoveredBySubRegs */ |
| SPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRnopcRegClass = { |
| &ARMMCRegisterClasses[GPRnopcRegClassID], |
| GPRnopcSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnopcSuperclasses, |
| GPRnopcGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnospRegClass = { |
| &ARMMCRegisterClasses[GPRnospRegClassID], |
| GPRnospSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnospSuperclasses, |
| GPRnospGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRwithAPSR_NZCVnospRegClass = { |
| &ARMMCRegisterClasses[GPRwithAPSR_NZCVnospRegClassID], |
| GPRwithAPSR_NZCVnospSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRwithAPSR_NZCVnospSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRwithAPSRnospRegClass = { |
| &ARMMCRegisterClasses[GPRwithAPSRnospRegClassID], |
| GPRwithAPSRnospSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRwithZRnospRegClass = { |
| &ARMMCRegisterClasses[GPRwithZRnospRegClassID], |
| GPRwithZRnospSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRwithZRnospSuperclasses, |
| GPRwithZRnospGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnoipRegClass = { |
| &ARMMCRegisterClasses[GPRnoipRegClassID], |
| GPRnoipSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnoipSuperclasses, |
| GPRnoipGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass rGPRRegClass = { |
| &ARMMCRegisterClasses[rGPRRegClassID], |
| rGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| rGPRSuperclasses, |
| rGPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnoip_and_GPRnopcRegClass = { |
| &ARMMCRegisterClasses[GPRnoip_and_GPRnopcRegClassID], |
| GPRnoip_and_GPRnopcSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnoip_and_GPRnopcSuperclasses, |
| GPRnoip_and_GPRnopcGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnoip_and_GPRnospRegClass = { |
| &ARMMCRegisterClasses[GPRnoip_and_GPRnospRegClassID], |
| GPRnoip_and_GPRnospSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnoip_and_GPRnospSuperclasses, |
| GPRnoip_and_GPRnospGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnoip_and_GPRwithAPSR_NZCVnospRegClass = { |
| &ARMMCRegisterClasses[GPRnoip_and_GPRwithAPSR_NZCVnospRegClassID], |
| GPRnoip_and_GPRwithAPSR_NZCVnospSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnoip_and_GPRwithAPSR_NZCVnospSuperclasses, |
| GPRnoip_and_GPRwithAPSR_NZCVnospGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass tGPRwithpcRegClass = { |
| &ARMMCRegisterClasses[tGPRwithpcRegClassID], |
| tGPRwithpcSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPRwithpcSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass = { |
| &ARMMCRegisterClasses[FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClassID], |
| FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8SubClassMask, |
| SuperRegIdxSeqs + 0, |
| LaneBitmask(0x000000000000000C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass hGPRRegClass = { |
| &ARMMCRegisterClasses[hGPRRegClassID], |
| hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass tGPRRegClass = { |
| &ARMMCRegisterClasses[tGPRRegClassID], |
| tGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass tGPREvenRegClass = { |
| &ARMMCRegisterClasses[tGPREvenRegClassID], |
| tGPREvenSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPREvenSuperclasses, |
| tGPREvenGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnopc_and_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnopc_and_hGPRRegClassID], |
| GPRnopc_and_hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnopc_and_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRnosp_and_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnosp_and_hGPRRegClassID], |
| GPRnosp_and_hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnosp_and_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRnoip_and_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnoip_and_hGPRRegClassID], |
| GPRnoip_and_hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnoip_and_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRnoip_and_tGPREvenRegClass = { |
| &ARMMCRegisterClasses[GPRnoip_and_tGPREvenRegClassID], |
| GPRnoip_and_tGPREvenSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnoip_and_tGPREvenSuperclasses, |
| GPRnoip_and_tGPREvenGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnosp_and_GPRnopc_and_hGPRRegClassID], |
| GPRnosp_and_GPRnopc_and_hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnosp_and_GPRnopc_and_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass tGPROddRegClass = { |
| &ARMMCRegisterClasses[tGPROddRegClassID], |
| tGPROddSubClassMask, |
| SuperRegIdxSeqs + 12, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPROddSuperclasses, |
| tGPROddGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnopc_and_GPRnoip_and_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnopc_and_GPRnoip_and_hGPRRegClassID], |
| GPRnopc_and_GPRnoip_and_hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnopc_and_GPRnoip_and_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRnosp_and_GPRnoip_and_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnosp_and_GPRnoip_and_hGPRRegClassID], |
| GPRnosp_and_GPRnoip_and_hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnosp_and_GPRnoip_and_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass tcGPRRegClass = { |
| &ARMMCRegisterClasses[tcGPRRegClassID], |
| tcGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tcGPRSuperclasses, |
| tcGPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnoip_and_tcGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnoip_and_tcGPRRegClassID], |
| GPRnoip_and_tcGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnoip_and_tcGPRSuperclasses, |
| GPRnoip_and_tcGPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClassID], |
| GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSubClassMask, |
| SuperRegIdxSeqs + 11, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass hGPR_and_tGPREvenRegClass = { |
| &ARMMCRegisterClasses[hGPR_and_tGPREvenRegClassID], |
| hGPR_and_tGPREvenSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| hGPR_and_tGPREvenSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass tGPR_and_tGPREvenRegClass = { |
| &ARMMCRegisterClasses[tGPR_and_tGPREvenRegClassID], |
| tGPR_and_tGPREvenSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPR_and_tGPREvenSuperclasses, |
| tGPR_and_tGPREvenGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass tGPR_and_tGPROddRegClass = { |
| &ARMMCRegisterClasses[tGPR_and_tGPROddRegClassID], |
| tGPR_and_tGPROddSubClassMask, |
| SuperRegIdxSeqs + 12, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPR_and_tGPROddSuperclasses, |
| tGPR_and_tGPROddGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass tGPREven_and_tcGPRRegClass = { |
| &ARMMCRegisterClasses[tGPREven_and_tcGPRRegClassID], |
| tGPREven_and_tcGPRSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPREven_and_tcGPRSuperclasses, |
| tGPREven_and_tcGPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass hGPR_and_GPRnoip_and_tGPREvenRegClass = { |
| &ARMMCRegisterClasses[hGPR_and_GPRnoip_and_tGPREvenRegClassID], |
| hGPR_and_GPRnoip_and_tGPREvenSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| hGPR_and_GPRnoip_and_tGPREvenSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass hGPR_and_tGPROddRegClass = { |
| &ARMMCRegisterClasses[hGPR_and_tGPROddRegClassID], |
| hGPR_and_tGPROddSubClassMask, |
| SuperRegIdxSeqs + 12, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| hGPR_and_tGPROddSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass tGPREven_and_GPRnoip_and_tcGPRRegClass = { |
| &ARMMCRegisterClasses[tGPREven_and_GPRnoip_and_tcGPRRegClassID], |
| tGPREven_and_GPRnoip_and_tcGPRSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPREven_and_GPRnoip_and_tcGPRSuperclasses, |
| tGPREven_and_GPRnoip_and_tcGPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass tGPROdd_and_tcGPRRegClass = { |
| &ARMMCRegisterClasses[tGPROdd_and_tcGPRRegClassID], |
| tGPROdd_and_tcGPRSubClassMask, |
| SuperRegIdxSeqs + 12, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| tGPROdd_and_tcGPRSuperclasses, |
| tGPROdd_and_tcGPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass CCRRegClass = { |
| &ARMMCRegisterClasses[CCRRegClassID], |
| CCRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass FPCXTRegsRegClass = { |
| &ARMMCRegisterClasses[FPCXTRegsRegClassID], |
| FPCXTRegsSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRlrRegClass = { |
| &ARMMCRegisterClasses[GPRlrRegClassID], |
| GPRlrSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRlrSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRspRegClass = { |
| &ARMMCRegisterClasses[GPRspRegClassID], |
| GPRspSubClassMask, |
| SuperRegIdxSeqs + 12, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRspSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass VCCRRegClass = { |
| &ARMMCRegisterClasses[VCCRRegClassID], |
| VCCRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| VCCRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass cl_FPSCR_NZCVRegClass = { |
| &ARMMCRegisterClasses[cl_FPSCR_NZCVRegClassID], |
| cl_FPSCR_NZCVSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass hGPR_and_tGPRwithpcRegClass = { |
| &ARMMCRegisterClasses[hGPR_and_tGPRwithpcRegClassID], |
| hGPR_and_tGPRwithpcSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| hGPR_and_tGPRwithpcSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass hGPR_and_tcGPRRegClass = { |
| &ARMMCRegisterClasses[hGPR_and_tcGPRRegClassID], |
| hGPR_and_tcGPRSubClassMask, |
| SuperRegIdxSeqs + 9, |
| LaneBitmask(0x0000000000000001), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| false, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| hGPR_and_tcGPRSuperclasses, |
| hGPR_and_tcGPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass DPRRegClass = { |
| &ARMMCRegisterClasses[DPRRegClassID], |
| DPRSubClassMask, |
| SuperRegIdxSeqs + 0, |
| LaneBitmask(0x000000000000000C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| false, /* CoveredBySubRegs */ |
| DPRSuperclasses, |
| DPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass DPR_VFP2RegClass = { |
| &ARMMCRegisterClasses[DPR_VFP2RegClassID], |
| DPR_VFP2SubClassMask, |
| SuperRegIdxSeqs + 0, |
| LaneBitmask(0x000000000000000C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPR_VFP2Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPR_8RegClass = { |
| &ARMMCRegisterClasses[DPR_8RegClassID], |
| DPR_8SubClassMask, |
| SuperRegIdxSeqs + 0, |
| LaneBitmask(0x000000000000000C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPairRegClass = { |
| &ARMMCRegisterClasses[GPRPairRegClassID], |
| GPRPairSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPairnospRegClass = { |
| &ARMMCRegisterClasses[GPRPairnospRegClassID], |
| GPRPairnospSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRPairnospSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPair_with_gsub_0_in_tGPRRegClass = { |
| &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tGPRRegClassID], |
| GPRPair_with_gsub_0_in_tGPRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRPair_with_gsub_0_in_tGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPair_with_gsub_0_in_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_hGPRRegClassID], |
| GPRPair_with_gsub_0_in_hGPRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRPair_with_gsub_0_in_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPair_with_gsub_0_in_tcGPRRegClass = { |
| &ARMMCRegisterClasses[GPRPair_with_gsub_0_in_tcGPRRegClassID], |
| GPRPair_with_gsub_0_in_tcGPRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRPair_with_gsub_0_in_tcGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPair_with_gsub_1_in_tcGPRRegClass = { |
| &ARMMCRegisterClasses[GPRPair_with_gsub_1_in_tcGPRRegClassID], |
| GPRPair_with_gsub_1_in_tcGPRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRPair_with_gsub_1_in_tcGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass = { |
| &ARMMCRegisterClasses[GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClassID], |
| GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass GPRPair_with_gsub_1_in_GPRspRegClass = { |
| &ARMMCRegisterClasses[GPRPair_with_gsub_1_in_GPRspRegClassID], |
| GPRPair_with_gsub_1_in_GPRspSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x0000000000000003), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| GPRPair_with_gsub_1_in_GPRspSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPairSpcRegClass = { |
| &ARMMCRegisterClasses[DPairSpcRegClassID], |
| DPairSpcSubClassMask, |
| SuperRegIdxSeqs + 58, |
| LaneBitmask(0x00000000000000CC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPairSpc_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[DPairSpc_with_ssub_0RegClassID], |
| DPairSpc_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 58, |
| LaneBitmask(0x00000000000000CC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPairSpc_with_ssub_0Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPairSpc_with_ssub_4RegClass = { |
| &ARMMCRegisterClasses[DPairSpc_with_ssub_4RegClassID], |
| DPairSpc_with_ssub_4SubClassMask, |
| SuperRegIdxSeqs + 58, |
| LaneBitmask(0x00000000000000CC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPairSpc_with_ssub_4Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPairSpc_with_dsub_0_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DPairSpc_with_dsub_0_in_DPR_8RegClassID], |
| DPairSpc_with_dsub_0_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 58, |
| LaneBitmask(0x00000000000000CC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPairSpc_with_dsub_0_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPairSpc_with_dsub_2_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DPairSpc_with_dsub_2_in_DPR_8RegClassID], |
| DPairSpc_with_dsub_2_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 58, |
| LaneBitmask(0x00000000000000CC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPairSpc_with_dsub_2_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPairRegClass = { |
| &ARMMCRegisterClasses[DPairRegClassID], |
| DPairSubClassMask, |
| SuperRegIdxSeqs + 77, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| DPairGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass DPair_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[DPair_with_ssub_0RegClassID], |
| DPair_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 77, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPair_with_ssub_0Superclasses, |
| DPair_with_ssub_0GetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass QPRRegClass = { |
| &ARMMCRegisterClasses[QPRRegClassID], |
| QPRSubClassMask, |
| SuperRegIdxSeqs + 39, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| QPRSuperclasses, |
| QPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass DPair_with_ssub_2RegClass = { |
| &ARMMCRegisterClasses[DPair_with_ssub_2RegClassID], |
| DPair_with_ssub_2SubClassMask, |
| SuperRegIdxSeqs + 77, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPair_with_ssub_2Superclasses, |
| DPair_with_ssub_2GetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass DPair_with_dsub_0_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DPair_with_dsub_0_in_DPR_8RegClassID], |
| DPair_with_dsub_0_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 77, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPair_with_dsub_0_in_DPR_8Superclasses, |
| DPair_with_dsub_0_in_DPR_8GetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass MQPRRegClass = { |
| &ARMMCRegisterClasses[MQPRRegClassID], |
| MQPRSubClassMask, |
| SuperRegIdxSeqs + 39, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass QPR_VFP2RegClass = { |
| &ARMMCRegisterClasses[QPR_VFP2RegClassID], |
| QPR_VFP2SubClassMask, |
| SuperRegIdxSeqs + 39, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| QPR_VFP2Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DPair_with_dsub_1_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DPair_with_dsub_1_in_DPR_8RegClassID], |
| DPair_with_dsub_1_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 77, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DPair_with_dsub_1_in_DPR_8Superclasses, |
| DPair_with_dsub_1_in_DPR_8GetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass QPR_8RegClass = { |
| &ARMMCRegisterClasses[QPR_8RegClassID], |
| QPR_8SubClassMask, |
| SuperRegIdxSeqs + 39, |
| LaneBitmask(0x000000000000003C), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| QPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleRegClass = { |
| &ARMMCRegisterClasses[DTripleRegClassID], |
| DTripleSubClassMask, |
| SuperRegIdxSeqs + 70, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleSpcRegClass = { |
| &ARMMCRegisterClasses[DTripleSpcRegClassID], |
| DTripleSpcSubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleSpc_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[DTripleSpc_with_ssub_0RegClassID], |
| DTripleSpc_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTripleSpc_with_ssub_0Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_0RegClassID], |
| DTriple_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 70, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_0Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_qsub_0_in_QPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPRRegClassID], |
| DTriple_with_qsub_0_in_QPRSubClassMask, |
| SuperRegIdxSeqs + 53, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_qsub_0_in_QPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_2RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_2RegClassID], |
| DTriple_with_ssub_2SubClassMask, |
| SuperRegIdxSeqs + 70, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_2Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| SuperRegIdxSeqs + 65, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleSpc_with_ssub_4RegClass = { |
| &ARMMCRegisterClasses[DTripleSpc_with_ssub_4RegClassID], |
| DTripleSpc_with_ssub_4SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTripleSpc_with_ssub_4Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_4RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_4RegClassID], |
| DTriple_with_ssub_4SubClassMask, |
| SuperRegIdxSeqs + 70, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_4Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleSpc_with_ssub_8RegClass = { |
| &ARMMCRegisterClasses[DTripleSpc_with_ssub_8RegClassID], |
| DTripleSpc_with_ssub_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTripleSpc_with_ssub_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleSpc_with_dsub_0_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DTripleSpc_with_dsub_0_in_DPR_8RegClassID], |
| DTripleSpc_with_dsub_0_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTripleSpc_with_dsub_0_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8RegClassID], |
| DTriple_with_dsub_0_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 70, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_dsub_0_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_qsub_0_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_qsub_0_in_MQPRRegClassID], |
| DTriple_with_qsub_0_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 53, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_qsub_0_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| SuperRegIdxSeqs + 65, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_dsub_1_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_dsub_1_in_DPR_8RegClassID], |
| DTriple_with_dsub_1_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 70, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_dsub_1_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 65, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClassID], |
| DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 53, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleSpc_with_dsub_2_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DTripleSpc_with_dsub_2_in_DPR_8RegClassID], |
| DTripleSpc_with_dsub_2_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTripleSpc_with_dsub_2_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_dsub_2_in_DPR_8RegClassID], |
| DTriple_with_dsub_2_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 70, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_dsub_2_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTripleSpc_with_dsub_4_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DTripleSpc_with_dsub_4_in_DPR_8RegClassID], |
| DTripleSpc_with_dsub_4_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTripleSpc_with_dsub_4_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 65, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_qsub_0_in_QPR_8RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_qsub_0_in_QPR_8RegClassID], |
| DTriple_with_qsub_0_in_QPR_8SubClassMask, |
| SuperRegIdxSeqs + 53, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_qsub_0_in_QPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClassID], |
| DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 53, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass = { |
| &ARMMCRegisterClasses[DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID], |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask, |
| SuperRegIdxSeqs + 65, |
| LaneBitmask(0x00000000000000FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadSpcRegClass = { |
| &ARMMCRegisterClasses[DQuadSpcRegClassID], |
| DQuadSpcSubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuadSpcSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadSpc_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[DQuadSpc_with_ssub_0RegClassID], |
| DQuadSpc_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuadSpc_with_ssub_0Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadSpc_with_ssub_4RegClass = { |
| &ARMMCRegisterClasses[DQuadSpc_with_ssub_4RegClassID], |
| DQuadSpc_with_ssub_4SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuadSpc_with_ssub_4Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadSpc_with_ssub_8RegClass = { |
| &ARMMCRegisterClasses[DQuadSpc_with_ssub_8RegClassID], |
| DQuadSpc_with_ssub_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuadSpc_with_ssub_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadSpc_with_dsub_0_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuadSpc_with_dsub_0_in_DPR_8RegClassID], |
| DQuadSpc_with_dsub_0_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuadSpc_with_dsub_0_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadSpc_with_dsub_2_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuadSpc_with_dsub_2_in_DPR_8RegClassID], |
| DQuadSpc_with_dsub_2_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuadSpc_with_dsub_2_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadSpc_with_dsub_4_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuadSpc_with_dsub_4_in_DPR_8RegClassID], |
| DQuadSpc_with_dsub_4_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 45, |
| LaneBitmask(0x0000000000000CCC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuadSpc_with_dsub_4_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuadRegClass = { |
| &ARMMCRegisterClasses[DQuadRegClassID], |
| DQuadSubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_0RegClassID], |
| DQuad_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_0Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_2RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_2RegClassID], |
| DQuad_with_ssub_2SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_2Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass QQPRRegClass = { |
| &ARMMCRegisterClasses[QQPRRegClassID], |
| QQPRSubClassMask, |
| SuperRegIdxSeqs + 85, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| QQPRSuperclasses, |
| QQPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| SuperRegIdxSeqs + 50, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_4RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_4RegClassID], |
| DQuad_with_ssub_4SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_4Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_6RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_6RegClassID], |
| DQuad_with_ssub_6SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_6Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_dsub_0_in_DPR_8RegClassID], |
| DQuad_with_dsub_0_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_dsub_0_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_qsub_0_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DQuad_with_qsub_0_in_MQPRRegClassID], |
| DQuad_with_qsub_0_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 85, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_qsub_0_in_MQPRSuperclasses, |
| DQuad_with_qsub_0_in_MQPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClassID], |
| DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSubClassMask, |
| SuperRegIdxSeqs + 50, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_dsub_1_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_dsub_1_in_DPR_8RegClassID], |
| DQuad_with_dsub_1_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_dsub_1_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 50, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass MQQPRRegClass = { |
| &ARMMCRegisterClasses[MQQPRRegClassID], |
| MQQPRSubClassMask, |
| SuperRegIdxSeqs + 85, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| MQQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_dsub_2_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_dsub_2_in_DPR_8RegClassID], |
| DQuad_with_dsub_2_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_dsub_2_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 50, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_dsub_3_in_DPR_8RegClassID], |
| DQuad_with_dsub_3_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 89, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_dsub_3_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 50, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_qsub_0_in_QPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_qsub_0_in_QPR_8RegClassID], |
| DQuad_with_qsub_0_in_QPR_8SubClassMask, |
| SuperRegIdxSeqs + 85, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_qsub_0_in_QPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_qsub_1_in_QPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_qsub_1_in_QPR_8RegClassID], |
| DQuad_with_qsub_1_in_QPR_8SubClassMask, |
| SuperRegIdxSeqs + 85, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_qsub_1_in_QPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass = { |
| &ARMMCRegisterClasses[DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClassID], |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8SubClassMask, |
| SuperRegIdxSeqs + 50, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass = { |
| &ARMMCRegisterClasses[DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClassID], |
| DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSubClassMask, |
| SuperRegIdxSeqs + 50, |
| LaneBitmask(0x00000000000003FC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass QQQQPRRegClass = { |
| &ARMMCRegisterClasses[QQQQPRRegClassID], |
| QQQQPRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| NullRegClasses, |
| QQQQPRGetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass QQQQPR_with_ssub_0RegClass = { |
| &ARMMCRegisterClasses[QQQQPR_with_ssub_0RegClassID], |
| QQQQPR_with_ssub_0SubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| QQQQPR_with_ssub_0Superclasses, |
| QQQQPR_with_ssub_0GetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass QQQQPR_with_ssub_4RegClass = { |
| &ARMMCRegisterClasses[QQQQPR_with_ssub_4RegClassID], |
| QQQQPR_with_ssub_4SubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| QQQQPR_with_ssub_4Superclasses, |
| QQQQPR_with_ssub_4GetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass QQQQPR_with_ssub_8RegClass = { |
| &ARMMCRegisterClasses[QQQQPR_with_ssub_8RegClassID], |
| QQQQPR_with_ssub_8SubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| QQQQPR_with_ssub_8Superclasses, |
| QQQQPR_with_ssub_8GetRawAllocationOrder |
| }; |
| |
| extern const TargetRegisterClass MQQQQPRRegClass = { |
| &ARMMCRegisterClasses[MQQQQPRRegClassID], |
| MQQQQPRSubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| MQQQQPRSuperclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass MQQQQPR_with_dsub_0_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[MQQQQPR_with_dsub_0_in_DPR_8RegClassID], |
| MQQQQPR_with_dsub_0_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| MQQQQPR_with_dsub_0_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass MQQQQPR_with_dsub_2_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[MQQQQPR_with_dsub_2_in_DPR_8RegClassID], |
| MQQQQPR_with_dsub_2_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| MQQQQPR_with_dsub_2_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass MQQQQPR_with_dsub_4_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[MQQQQPR_with_dsub_4_in_DPR_8RegClassID], |
| MQQQQPR_with_dsub_4_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| MQQQQPR_with_dsub_4_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| extern const TargetRegisterClass MQQQQPR_with_dsub_6_in_DPR_8RegClass = { |
| &ARMMCRegisterClasses[MQQQQPR_with_dsub_6_in_DPR_8RegClassID], |
| MQQQQPR_with_dsub_6_in_DPR_8SubClassMask, |
| SuperRegIdxSeqs + 8, |
| LaneBitmask(0x000000000003FFFC), |
| 0, |
| false, |
| 0x00, /* TSFlags */ |
| true, /* HasDisjunctSubRegs */ |
| true, /* CoveredBySubRegs */ |
| MQQQQPR_with_dsub_6_in_DPR_8Superclasses, |
| nullptr |
| }; |
| |
| } // end namespace ARM |
| |
| namespace { |
| const TargetRegisterClass *const RegisterClasses[] = { |
| &ARM::HPRRegClass, |
| &ARM::FPWithVPRRegClass, |
| &ARM::SPRRegClass, |
| &ARM::FPWithVPR_with_ssub_0RegClass, |
| &ARM::GPRRegClass, |
| &ARM::GPRwithAPSRRegClass, |
| &ARM::GPRwithZRRegClass, |
| &ARM::SPR_8RegClass, |
| &ARM::GPRnopcRegClass, |
| &ARM::GPRnospRegClass, |
| &ARM::GPRwithAPSR_NZCVnospRegClass, |
| &ARM::GPRwithAPSRnospRegClass, |
| &ARM::GPRwithZRnospRegClass, |
| &ARM::GPRnoipRegClass, |
| &ARM::rGPRRegClass, |
| &ARM::GPRnoip_and_GPRnopcRegClass, |
| &ARM::GPRnoip_and_GPRnospRegClass, |
| &ARM::GPRnoip_and_GPRwithAPSR_NZCVnospRegClass, |
| &ARM::tGPRwithpcRegClass, |
| &ARM::FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8RegClass, |
| &ARM::hGPRRegClass, |
| &ARM::tGPRRegClass, |
| &ARM::tGPREvenRegClass, |
| &ARM::GPRnopc_and_hGPRRegClass, |
| &ARM::GPRnosp_and_hGPRRegClass, |
| &ARM::GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnoip_and_tGPREvenRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_hGPRRegClass, |
| &ARM::tGPROddRegClass, |
| &ARM::GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| &ARM::GPRnosp_and_GPRnoip_and_hGPRRegClass, |
| &ARM::tcGPRRegClass, |
| &ARM::GPRnoip_and_tcGPRRegClass, |
| &ARM::GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPRRegClass, |
| &ARM::hGPR_and_tGPREvenRegClass, |
| &ARM::tGPR_and_tGPREvenRegClass, |
| &ARM::tGPR_and_tGPROddRegClass, |
| &ARM::tGPREven_and_tcGPRRegClass, |
| &ARM::hGPR_and_GPRnoip_and_tGPREvenRegClass, |
| &ARM::hGPR_and_tGPROddRegClass, |
| &ARM::tGPREven_and_GPRnoip_and_tcGPRRegClass, |
| &ARM::tGPROdd_and_tcGPRRegClass, |
| &ARM::CCRRegClass, |
| &ARM::FPCXTRegsRegClass, |
| &ARM::GPRlrRegClass, |
| &ARM::GPRspRegClass, |
| &ARM::VCCRRegClass, |
| &ARM::cl_FPSCR_NZCVRegClass, |
| &ARM::hGPR_and_tGPRwithpcRegClass, |
| &ARM::hGPR_and_tcGPRRegClass, |
| &ARM::DPRRegClass, |
| &ARM::DPR_VFP2RegClass, |
| &ARM::DPR_8RegClass, |
| &ARM::GPRPairRegClass, |
| &ARM::GPRPairnospRegClass, |
| &ARM::GPRPair_with_gsub_0_in_tGPRRegClass, |
| &ARM::GPRPair_with_gsub_0_in_hGPRRegClass, |
| &ARM::GPRPair_with_gsub_0_in_tcGPRRegClass, |
| &ARM::GPRPair_with_gsub_1_in_tcGPRRegClass, |
| &ARM::GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPRRegClass, |
| &ARM::GPRPair_with_gsub_1_in_GPRspRegClass, |
| &ARM::DPairSpcRegClass, |
| &ARM::DPairSpc_with_ssub_0RegClass, |
| &ARM::DPairSpc_with_ssub_4RegClass, |
| &ARM::DPairSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DPairSpc_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DPairRegClass, |
| &ARM::DPair_with_ssub_0RegClass, |
| &ARM::QPRRegClass, |
| &ARM::DPair_with_ssub_2RegClass, |
| &ARM::DPair_with_dsub_0_in_DPR_8RegClass, |
| &ARM::MQPRRegClass, |
| &ARM::QPR_VFP2RegClass, |
| &ARM::DPair_with_dsub_1_in_DPR_8RegClass, |
| &ARM::QPR_8RegClass, |
| &ARM::DTripleRegClass, |
| &ARM::DTripleSpcRegClass, |
| &ARM::DTripleSpc_with_ssub_0RegClass, |
| &ARM::DTriple_with_ssub_0RegClass, |
| &ARM::DTriple_with_qsub_0_in_QPRRegClass, |
| &ARM::DTriple_with_ssub_2RegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DTripleSpc_with_ssub_4RegClass, |
| &ARM::DTriple_with_ssub_4RegClass, |
| &ARM::DTripleSpc_with_ssub_8RegClass, |
| &ARM::DTripleSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DTriple_with_qsub_0_in_MQPRRegClass, |
| &ARM::DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DTriple_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPRRegClass, |
| &ARM::DTripleSpc_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DTriple_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DTripleSpc_with_dsub_4_in_DPR_8RegClass, |
| &ARM::DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DTriple_with_qsub_0_in_QPR_8RegClass, |
| &ARM::DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPRRegClass, |
| &ARM::DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass, |
| &ARM::DQuadSpcRegClass, |
| &ARM::DQuadSpc_with_ssub_0RegClass, |
| &ARM::DQuadSpc_with_ssub_4RegClass, |
| &ARM::DQuadSpc_with_ssub_8RegClass, |
| &ARM::DQuadSpc_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuadSpc_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DQuadSpc_with_dsub_4_in_DPR_8RegClass, |
| &ARM::DQuadRegClass, |
| &ARM::DQuad_with_ssub_0RegClass, |
| &ARM::DQuad_with_ssub_2RegClass, |
| &ARM::QQPRRegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_ssub_4RegClass, |
| &ARM::DQuad_with_ssub_6RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8RegClass, |
| &ARM::DQuad_with_qsub_0_in_MQPRRegClass, |
| &ARM::DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPRRegClass, |
| &ARM::DQuad_with_dsub_1_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::MQQPRRegClass, |
| &ARM::DQuad_with_dsub_2_in_DPR_8RegClass, |
| &ARM::DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_dsub_3_in_DPR_8RegClass, |
| &ARM::DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::DQuad_with_qsub_0_in_QPR_8RegClass, |
| &ARM::DQuad_with_qsub_1_in_QPR_8RegClass, |
| &ARM::DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8RegClass, |
| &ARM::DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPRRegClass, |
| &ARM::QQQQPRRegClass, |
| &ARM::QQQQPR_with_ssub_0RegClass, |
| &ARM::QQQQPR_with_ssub_4RegClass, |
| &ARM::QQQQPR_with_ssub_8RegClass, |
| &ARM::MQQQQPRRegClass, |
| &ARM::MQQQQPR_with_dsub_0_in_DPR_8RegClass, |
| &ARM::MQQQQPR_with_dsub_2_in_DPR_8RegClass, |
| &ARM::MQQQQPR_with_dsub_4_in_DPR_8RegClass, |
| &ARM::MQQQQPR_with_dsub_6_in_DPR_8RegClass, |
| }; |
| } // end anonymous namespace |
| |
| static const uint8_t CostPerUseTable[] = { |
| 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; |
| |
| |
| static const bool InAllocatableClassTable[] = { |
| false, false, true, false, true, false, false, false, false, true, false, false, false, true, true, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, }; |
| |
| |
| static const TargetRegisterInfoDesc ARMRegInfoDesc = { // Extra Descriptors |
| CostPerUseTable, 1, InAllocatableClassTable}; |
| |
| unsigned ARMGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const { |
| static const uint8_t RowMap[56] = { |
| 0, 1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 4, 0, 2, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 4, 4, 5, 5, 5, 2, |
| }; |
| static const uint8_t Rows[8][56] = { |
| { ARM::dsub_0, ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, 0, ARM::dsub_6, 0, 0, 0, 0, 0, ARM::qsub_0, ARM::qsub_1, 0, 0, ARM::ssub_0, ARM::ssub_1, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, 0, 0, ARM::ssub_12, ARM::ssub_13, 0, 0, ARM::ssub_0_ssub_1_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, }, |
| { ARM::dsub_1, ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, 0, ARM::dsub_7, 0, 0, 0, 0, 0, ARM::ssub_2_ssub_3_ssub_4_ssub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9, 0, 0, ARM::ssub_2, ARM::ssub_3, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, 0, 0, ARM::ssub_14, ARM::ssub_15, 0, 0, ARM::ssub_2_ssub_3_ssub_6_ssub_7, ARM::ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7, ARM::ssub_4_ssub_5_ssub_8_ssub_9, ARM::ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, ARM::qsub_1, ARM::ssub_2_ssub_3_ssub_6_ssub_7_dsub_5, 0, 0, 0, 0, ARM::ssub_6_ssub_7_dsub_5, 0, ARM::ssub_6_ssub_7_dsub_5_dsub_7, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, 0, 0, }, |
| { ARM::dsub_2, ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, 0, 0, 0, 0, 0, 0, 0, ARM::qsub_1, ARM::qsub_2, 0, 0, ARM::ssub_4, ARM::ssub_5, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, 0, 0, 0, 0, 0, 0, ARM::ssub_4_ssub_5_ssub_8_ssub_9, ARM::ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9, ARM::ssub_6_ssub_7_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| { ARM::dsub_3, ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_6_ssub_7_ssub_8_ssub_9, ARM::dsub_5_ssub_12_ssub_13, 0, 0, ARM::ssub_6, ARM::ssub_7, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, ARM::ssub_6_ssub_7_dsub_5, ARM::ssub_6_ssub_7_ssub_8_ssub_9_dsub_5, ARM::ssub_8_ssub_9_ssub_12_ssub_13, ARM::ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, ARM::qsub_2, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| { ARM::dsub_4, ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, ARM::qsub_2, ARM::qsub_3, 0, 0, ARM::ssub_8, ARM::ssub_9, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_8_ssub_9_ssub_12_ssub_13, ARM::ssub_8_ssub_9_dsub_5_ssub_12_ssub_13, ARM::dsub_5_dsub_7, ARM::dsub_5_ssub_12_ssub_13_dsub_7, ARM::dsub_5_ssub_12_ssub_13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| { ARM::dsub_5, ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::dsub_5_ssub_12_ssub_13, 0, 0, 0, ARM::ssub_10, ARM::ssub_11, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::dsub_5_dsub_7, 0, 0, 0, ARM::qsub_3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| { ARM::dsub_6, ARM::dsub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_12, ARM::ssub_13, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ARM::ssub_14, ARM::ssub_15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| }; |
| |
| --IdxA; assert(IdxA < 56); (void) IdxA; |
| --IdxB; assert(IdxB < 56); |
| return Rows[RowMap[IdxA]][IdxB]; |
| } |
| |
| struct MaskRolOp { |
| LaneBitmask Mask; |
| uint8_t RotateLeft; |
| }; |
| static const MaskRolOp LaneMaskComposeSequences[] = { |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 2 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 4 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 6 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 8 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 10 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 12 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 14 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 16 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 18 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 20 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 22 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 24 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 26 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 28 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 30 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 32 |
| { LaneBitmask(0xFFFFFFFFFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 } // Sequence 34 |
| }; |
| static const uint8_t CompositeSequences[] = { |
| 0, // to dsub_0 |
| 2, // to dsub_1 |
| 4, // to dsub_2 |
| 6, // to dsub_3 |
| 8, // to dsub_4 |
| 10, // to dsub_5 |
| 12, // to dsub_6 |
| 14, // to dsub_7 |
| 0, // to gsub_0 |
| 16, // to gsub_1 |
| 0, // to qqsub_0 |
| 8, // to qqsub_1 |
| 0, // to qsub_0 |
| 4, // to qsub_1 |
| 8, // to qsub_2 |
| 12, // to qsub_3 |
| 2, // to ssub_0 |
| 18, // to ssub_1 |
| 4, // to ssub_2 |
| 20, // to ssub_3 |
| 6, // to ssub_4 |
| 22, // to ssub_5 |
| 8, // to ssub_6 |
| 24, // to ssub_7 |
| 10, // to ssub_8 |
| 26, // to ssub_9 |
| 12, // to ssub_10 |
| 28, // to ssub_11 |
| 14, // to ssub_12 |
| 30, // to ssub_13 |
| 32, // to ssub_14 |
| 34, // to ssub_15 |
| 0, // to ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // to ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 2, // to ssub_2_ssub_3_ssub_6_ssub_7 |
| 2, // to ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 2, // to ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // to ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // to ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 2, // to ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 2, // to ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 2, // to ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4, // to ssub_4_ssub_5_ssub_8_ssub_9 |
| 4, // to ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 4, // to ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 6, // to ssub_6_ssub_7_dsub_5 |
| 6, // to ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 6, // to ssub_6_ssub_7_dsub_5_dsub_7 |
| 6, // to ssub_6_ssub_7_ssub_8_ssub_9 |
| 6, // to ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 8, // to ssub_8_ssub_9_ssub_12_ssub_13 |
| 8, // to ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 10, // to dsub_5_dsub_7 |
| 10, // to dsub_5_ssub_12_ssub_13_dsub_7 |
| 10, // to dsub_5_ssub_12_ssub_13 |
| 4 // to ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }; |
| |
| LaneBitmask ARMGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { |
| --IdxA; assert(IdxA < 56 && "Subregister index out of bounds"); |
| LaneBitmask Result; |
| for (const MaskRolOp *Ops = |
| &LaneMaskComposeSequences[CompositeSequences[IdxA]]; |
| Ops->Mask.any(); ++Ops) { |
| LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger(); |
| if (unsigned S = Ops->RotateLeft) |
| Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S))); |
| else |
| Result |= LaneBitmask(M); |
| } |
| return Result; |
| } |
| |
| LaneBitmask ARMGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { |
| LaneMask &= getSubRegIndexLaneMask(IdxA); |
| --IdxA; assert(IdxA < 56 && "Subregister index out of bounds"); |
| LaneBitmask Result; |
| for (const MaskRolOp *Ops = |
| &LaneMaskComposeSequences[CompositeSequences[IdxA]]; |
| Ops->Mask.any(); ++Ops) { |
| LaneBitmask::Type M = LaneMask.getAsInteger(); |
| if (unsigned S = Ops->RotateLeft) |
| Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S))); |
| else |
| Result |= LaneBitmask(M); |
| } |
| return Result; |
| } |
| |
| const TargetRegisterClass *ARMGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const { |
| static const uint8_t Table[136][56] = { |
| { // HPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPWithVPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 4, // ssub_0 -> FPWithVPR_with_ssub_0 |
| 4, // ssub_1 -> FPWithVPR_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // SPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPWithVPR_with_ssub_0 |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 4, // ssub_0 -> FPWithVPR_with_ssub_0 |
| 4, // ssub_1 -> FPWithVPR_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithAPSR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithZR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // SPR_8 |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnopc |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithAPSR_NZCVnosp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithAPSRnosp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithZRnosp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // rGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_GPRnopc |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_GPRnosp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPRwithpc |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 20, // ssub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 20, // ssub_1 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPREven |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnopc_and_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_tGPREven |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_GPRnopc_and_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPROdd |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnopc_and_GPRnoip_and_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_GPRnoip_and_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tGPREven |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPR_and_tGPREven |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPR_and_tGPROdd |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPREven_and_tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_GPRnoip_and_tGPREven |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tGPROdd |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPREven_and_GPRnoip_and_tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPROdd_and_tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // CCR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPCXTRegs |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRlr |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRsp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // VCCR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // cl_FPSCR_NZCV |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tGPRwithpc |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 52, // ssub_0 -> DPR_VFP2 |
| 52, // ssub_1 -> DPR_VFP2 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPR_VFP2 |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 52, // ssub_0 -> DPR_VFP2 |
| 52, // ssub_1 -> DPR_VFP2 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPR_8 |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 53, // ssub_0 -> DPR_8 |
| 53, // ssub_1 -> DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 54, // gsub_0 -> GPRPair |
| 54, // gsub_1 -> GPRPair |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPairnosp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 55, // gsub_0 -> GPRPairnosp |
| 55, // gsub_1 -> GPRPairnosp |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_0_in_tGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 56, // gsub_0 -> GPRPair_with_gsub_0_in_tGPR |
| 56, // gsub_1 -> GPRPair_with_gsub_0_in_tGPR |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_0_in_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 57, // gsub_0 -> GPRPair_with_gsub_0_in_hGPR |
| 57, // gsub_1 -> GPRPair_with_gsub_0_in_hGPR |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_0_in_tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 58, // gsub_0 -> GPRPair_with_gsub_0_in_tcGPR |
| 58, // gsub_1 -> GPRPair_with_gsub_0_in_tcGPR |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_1_in_tcGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 59, // gsub_0 -> GPRPair_with_gsub_1_in_tcGPR |
| 59, // gsub_1 -> GPRPair_with_gsub_1_in_tcGPR |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 60, // gsub_0 -> GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 60, // gsub_1 -> GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_1_in_GPRsp |
| 0, // dsub_0 |
| 0, // dsub_1 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 61, // gsub_0 -> GPRPair_with_gsub_1_in_GPRsp |
| 61, // gsub_1 -> GPRPair_with_gsub_1_in_GPRsp |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 0, // ssub_0 |
| 0, // ssub_1 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc |
| 62, // dsub_0 -> DPairSpc |
| 0, // dsub_1 |
| 62, // dsub_2 -> DPairSpc |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 63, // ssub_0 -> DPairSpc_with_ssub_0 |
| 63, // ssub_1 -> DPairSpc_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 64, // ssub_4 -> DPairSpc_with_ssub_4 |
| 64, // ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_ssub_0 |
| 63, // dsub_0 -> DPairSpc_with_ssub_0 |
| 0, // dsub_1 |
| 63, // dsub_2 -> DPairSpc_with_ssub_0 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 63, // ssub_0 -> DPairSpc_with_ssub_0 |
| 63, // ssub_1 -> DPairSpc_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 64, // ssub_4 -> DPairSpc_with_ssub_4 |
| 64, // ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_ssub_4 |
| 64, // dsub_0 -> DPairSpc_with_ssub_4 |
| 0, // dsub_1 |
| 64, // dsub_2 -> DPairSpc_with_ssub_4 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 64, // ssub_0 -> DPairSpc_with_ssub_4 |
| 64, // ssub_1 -> DPairSpc_with_ssub_4 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 64, // ssub_4 -> DPairSpc_with_ssub_4 |
| 64, // ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_dsub_0_in_DPR_8 |
| 65, // dsub_0 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_1 |
| 65, // dsub_2 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 65, // ssub_0 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 65, // ssub_1 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 65, // ssub_4 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 65, // ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_dsub_2_in_DPR_8 |
| 66, // dsub_0 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_1 |
| 66, // dsub_2 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 66, // ssub_0 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 66, // ssub_1 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 66, // ssub_4 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 66, // ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair |
| 67, // dsub_0 -> DPair |
| 67, // dsub_1 -> DPair |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 68, // ssub_0 -> DPair_with_ssub_0 |
| 68, // ssub_1 -> DPair_with_ssub_0 |
| 70, // ssub_2 -> DPair_with_ssub_2 |
| 70, // ssub_3 -> DPair_with_ssub_2 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_ssub_0 |
| 68, // dsub_0 -> DPair_with_ssub_0 |
| 68, // dsub_1 -> DPair_with_ssub_0 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 68, // ssub_0 -> DPair_with_ssub_0 |
| 68, // ssub_1 -> DPair_with_ssub_0 |
| 70, // ssub_2 -> DPair_with_ssub_2 |
| 70, // ssub_3 -> DPair_with_ssub_2 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QPR |
| 69, // dsub_0 -> QPR |
| 69, // dsub_1 -> QPR |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 72, // ssub_0 -> MQPR |
| 72, // ssub_1 -> MQPR |
| 72, // ssub_2 -> MQPR |
| 72, // ssub_3 -> MQPR |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_ssub_2 |
| 70, // dsub_0 -> DPair_with_ssub_2 |
| 70, // dsub_1 -> DPair_with_ssub_2 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 70, // ssub_0 -> DPair_with_ssub_2 |
| 70, // ssub_1 -> DPair_with_ssub_2 |
| 70, // ssub_2 -> DPair_with_ssub_2 |
| 70, // ssub_3 -> DPair_with_ssub_2 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_dsub_0_in_DPR_8 |
| 71, // dsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 71, // dsub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 71, // ssub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 71, // ssub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 71, // ssub_2 -> DPair_with_dsub_0_in_DPR_8 |
| 71, // ssub_3 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // MQPR |
| 72, // dsub_0 -> MQPR |
| 72, // dsub_1 -> MQPR |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 72, // ssub_0 -> MQPR |
| 72, // ssub_1 -> MQPR |
| 72, // ssub_2 -> MQPR |
| 72, // ssub_3 -> MQPR |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QPR_VFP2 |
| 73, // dsub_0 -> QPR_VFP2 |
| 73, // dsub_1 -> QPR_VFP2 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 73, // ssub_0 -> QPR_VFP2 |
| 73, // ssub_1 -> QPR_VFP2 |
| 73, // ssub_2 -> QPR_VFP2 |
| 73, // ssub_3 -> QPR_VFP2 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_dsub_1_in_DPR_8 |
| 74, // dsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 74, // dsub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 74, // ssub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 74, // ssub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 74, // ssub_2 -> DPair_with_dsub_1_in_DPR_8 |
| 74, // ssub_3 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QPR_8 |
| 75, // dsub_0 -> QPR_8 |
| 75, // dsub_1 -> QPR_8 |
| 0, // dsub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 75, // ssub_0 -> QPR_8 |
| 75, // ssub_1 -> QPR_8 |
| 75, // ssub_2 -> QPR_8 |
| 75, // ssub_3 -> QPR_8 |
| 0, // ssub_4 |
| 0, // ssub_5 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple |
| 76, // dsub_0 -> DTriple |
| 76, // dsub_1 -> DTriple |
| 76, // dsub_2 -> DTriple |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 76, // qsub_0 -> DTriple |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 79, // ssub_0 -> DTriple_with_ssub_0 |
| 79, // ssub_1 -> DTriple_with_ssub_0 |
| 81, // ssub_2 -> DTriple_with_ssub_2 |
| 81, // ssub_3 -> DTriple_with_ssub_2 |
| 84, // ssub_4 -> DTriple_with_ssub_4 |
| 84, // ssub_5 -> DTriple_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 76, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 76, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc |
| 77, // dsub_0 -> DTripleSpc |
| 0, // dsub_1 |
| 77, // dsub_2 -> DTripleSpc |
| 0, // dsub_3 |
| 77, // dsub_4 -> DTripleSpc |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 78, // ssub_0 -> DTripleSpc_with_ssub_0 |
| 78, // ssub_1 -> DTripleSpc_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 83, // ssub_4 -> DTripleSpc_with_ssub_4 |
| 83, // ssub_5 -> DTripleSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 85, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 85, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 77, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 77, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_ssub_0 |
| 78, // dsub_0 -> DTripleSpc_with_ssub_0 |
| 0, // dsub_1 |
| 78, // dsub_2 -> DTripleSpc_with_ssub_0 |
| 0, // dsub_3 |
| 78, // dsub_4 -> DTripleSpc_with_ssub_0 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 78, // ssub_0 -> DTripleSpc_with_ssub_0 |
| 78, // ssub_1 -> DTripleSpc_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 83, // ssub_4 -> DTripleSpc_with_ssub_4 |
| 83, // ssub_5 -> DTripleSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 85, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 85, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 78, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_0 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 78, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_0 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_0 |
| 79, // dsub_0 -> DTriple_with_ssub_0 |
| 79, // dsub_1 -> DTriple_with_ssub_0 |
| 79, // dsub_2 -> DTriple_with_ssub_0 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 79, // qsub_0 -> DTriple_with_ssub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 79, // ssub_0 -> DTriple_with_ssub_0 |
| 79, // ssub_1 -> DTriple_with_ssub_0 |
| 81, // ssub_2 -> DTriple_with_ssub_2 |
| 81, // ssub_3 -> DTriple_with_ssub_2 |
| 84, // ssub_4 -> DTriple_with_ssub_4 |
| 84, // ssub_5 -> DTriple_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 79, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_0 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 79, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_qsub_0_in_QPR |
| 80, // dsub_0 -> DTriple_with_qsub_0_in_QPR |
| 80, // dsub_1 -> DTriple_with_qsub_0_in_QPR |
| 80, // dsub_2 -> DTriple_with_qsub_0_in_QPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 80, // qsub_0 -> DTriple_with_qsub_0_in_QPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 88, // ssub_0 -> DTriple_with_qsub_0_in_MQPR |
| 88, // ssub_1 -> DTriple_with_qsub_0_in_MQPR |
| 88, // ssub_2 -> DTriple_with_qsub_0_in_MQPR |
| 88, // ssub_3 -> DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 80, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 80, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2 |
| 81, // dsub_0 -> DTriple_with_ssub_2 |
| 81, // dsub_1 -> DTriple_with_ssub_2 |
| 81, // dsub_2 -> DTriple_with_ssub_2 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 81, // qsub_0 -> DTriple_with_ssub_2 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 81, // ssub_0 -> DTriple_with_ssub_2 |
| 81, // ssub_1 -> DTriple_with_ssub_2 |
| 81, // ssub_2 -> DTriple_with_ssub_2 |
| 81, // ssub_3 -> DTriple_with_ssub_2 |
| 84, // ssub_4 -> DTriple_with_ssub_4 |
| 84, // ssub_5 -> DTriple_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 81, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 81, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 82, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 82, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 82, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 82, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 89, // ssub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 89, // ssub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 91, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 82, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 82, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_ssub_4 |
| 83, // dsub_0 -> DTripleSpc_with_ssub_4 |
| 0, // dsub_1 |
| 83, // dsub_2 -> DTripleSpc_with_ssub_4 |
| 0, // dsub_3 |
| 83, // dsub_4 -> DTripleSpc_with_ssub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 83, // ssub_0 -> DTripleSpc_with_ssub_4 |
| 83, // ssub_1 -> DTripleSpc_with_ssub_4 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 83, // ssub_4 -> DTripleSpc_with_ssub_4 |
| 83, // ssub_5 -> DTripleSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 85, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 85, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 83, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_4 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 83, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_4 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_4 |
| 84, // dsub_0 -> DTriple_with_ssub_4 |
| 84, // dsub_1 -> DTriple_with_ssub_4 |
| 84, // dsub_2 -> DTriple_with_ssub_4 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 84, // qsub_0 -> DTriple_with_ssub_4 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 84, // ssub_0 -> DTriple_with_ssub_4 |
| 84, // ssub_1 -> DTriple_with_ssub_4 |
| 84, // ssub_2 -> DTriple_with_ssub_4 |
| 84, // ssub_3 -> DTriple_with_ssub_4 |
| 84, // ssub_4 -> DTriple_with_ssub_4 |
| 84, // ssub_5 -> DTriple_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 84, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 84, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_ssub_8 |
| 85, // dsub_0 -> DTripleSpc_with_ssub_8 |
| 0, // dsub_1 |
| 85, // dsub_2 -> DTripleSpc_with_ssub_8 |
| 0, // dsub_3 |
| 85, // dsub_4 -> DTripleSpc_with_ssub_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 85, // ssub_0 -> DTripleSpc_with_ssub_8 |
| 85, // ssub_1 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 85, // ssub_4 -> DTripleSpc_with_ssub_8 |
| 85, // ssub_5 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 85, // ssub_8 -> DTripleSpc_with_ssub_8 |
| 85, // ssub_9 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 85, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 85, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_ssub_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_dsub_0_in_DPR_8 |
| 86, // dsub_0 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_1 |
| 86, // dsub_2 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_3 |
| 86, // dsub_4 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 86, // ssub_0 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 86, // ssub_1 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 86, // ssub_4 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 86, // ssub_5 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 86, // ssub_8 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 86, // ssub_9 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 86, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 86, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_0_in_DPR_8 |
| 87, // dsub_0 -> DTriple_with_dsub_0_in_DPR_8 |
| 87, // dsub_1 -> DTriple_with_dsub_0_in_DPR_8 |
| 87, // dsub_2 -> DTriple_with_dsub_0_in_DPR_8 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 87, // qsub_0 -> DTriple_with_dsub_0_in_DPR_8 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 87, // ssub_0 -> DTriple_with_dsub_0_in_DPR_8 |
| 87, // ssub_1 -> DTriple_with_dsub_0_in_DPR_8 |
| 87, // ssub_2 -> DTriple_with_dsub_0_in_DPR_8 |
| 87, // ssub_3 -> DTriple_with_dsub_0_in_DPR_8 |
| 87, // ssub_4 -> DTriple_with_dsub_0_in_DPR_8 |
| 87, // ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 87, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 87, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_qsub_0_in_MQPR |
| 88, // dsub_0 -> DTriple_with_qsub_0_in_MQPR |
| 88, // dsub_1 -> DTriple_with_qsub_0_in_MQPR |
| 88, // dsub_2 -> DTriple_with_qsub_0_in_MQPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 88, // qsub_0 -> DTriple_with_qsub_0_in_MQPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 88, // ssub_0 -> DTriple_with_qsub_0_in_MQPR |
| 88, // ssub_1 -> DTriple_with_qsub_0_in_MQPR |
| 88, // ssub_2 -> DTriple_with_qsub_0_in_MQPR |
| 88, // ssub_3 -> DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 88, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 88, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 89, // dsub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 89, // dsub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 89, // dsub_2 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 89, // qsub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 89, // ssub_0 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 89, // ssub_1 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 91, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 89, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 89, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_1_in_DPR_8 |
| 90, // dsub_0 -> DTriple_with_dsub_1_in_DPR_8 |
| 90, // dsub_1 -> DTriple_with_dsub_1_in_DPR_8 |
| 90, // dsub_2 -> DTriple_with_dsub_1_in_DPR_8 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 90, // qsub_0 -> DTriple_with_dsub_1_in_DPR_8 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 90, // ssub_0 -> DTriple_with_dsub_1_in_DPR_8 |
| 90, // ssub_1 -> DTriple_with_dsub_1_in_DPR_8 |
| 90, // ssub_2 -> DTriple_with_dsub_1_in_DPR_8 |
| 90, // ssub_3 -> DTriple_with_dsub_1_in_DPR_8 |
| 90, // ssub_4 -> DTriple_with_dsub_1_in_DPR_8 |
| 90, // ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 90, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 90, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 91, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 91, // ssub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 91, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 91, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 91, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // dsub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // dsub_1 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // dsub_2 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 92, // qsub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 92, // ssub_0 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_1 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_2 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_3 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_4 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 92, // ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 92, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 92, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_dsub_2_in_DPR_8 |
| 93, // dsub_0 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_1 |
| 93, // dsub_2 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_3 |
| 93, // dsub_4 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 93, // ssub_0 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 93, // ssub_1 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 93, // ssub_4 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 93, // ssub_5 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 93, // ssub_8 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 93, // ssub_9 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 93, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 93, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_2_in_DPR_8 |
| 94, // dsub_0 -> DTriple_with_dsub_2_in_DPR_8 |
| 94, // dsub_1 -> DTriple_with_dsub_2_in_DPR_8 |
| 94, // dsub_2 -> DTriple_with_dsub_2_in_DPR_8 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 94, // qsub_0 -> DTriple_with_dsub_2_in_DPR_8 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 94, // ssub_0 -> DTriple_with_dsub_2_in_DPR_8 |
| 94, // ssub_1 -> DTriple_with_dsub_2_in_DPR_8 |
| 94, // ssub_2 -> DTriple_with_dsub_2_in_DPR_8 |
| 94, // ssub_3 -> DTriple_with_dsub_2_in_DPR_8 |
| 94, // ssub_4 -> DTriple_with_dsub_2_in_DPR_8 |
| 94, // ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 94, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 94, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_dsub_4_in_DPR_8 |
| 95, // dsub_0 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // dsub_1 |
| 95, // dsub_2 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // dsub_3 |
| 95, // dsub_4 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 95, // ssub_0 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 95, // ssub_1 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 95, // ssub_4 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 95, // ssub_5 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 95, // ssub_8 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 95, // ssub_9 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 95, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 95, // ssub_4_ssub_5_ssub_8_ssub_9 -> DTripleSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // dsub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // dsub_1 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // dsub_2 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 96, // qsub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 96, // ssub_0 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // ssub_1 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // ssub_2 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // ssub_3 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // ssub_4 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 96, // ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 96, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 96, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_qsub_0_in_QPR_8 |
| 97, // dsub_0 -> DTriple_with_qsub_0_in_QPR_8 |
| 97, // dsub_1 -> DTriple_with_qsub_0_in_QPR_8 |
| 97, // dsub_2 -> DTriple_with_qsub_0_in_QPR_8 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 97, // qsub_0 -> DTriple_with_qsub_0_in_QPR_8 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 97, // ssub_0 -> DTriple_with_qsub_0_in_QPR_8 |
| 97, // ssub_1 -> DTriple_with_qsub_0_in_QPR_8 |
| 97, // ssub_2 -> DTriple_with_qsub_0_in_QPR_8 |
| 97, // ssub_3 -> DTriple_with_qsub_0_in_QPR_8 |
| 97, // ssub_4 -> DTriple_with_qsub_0_in_QPR_8 |
| 97, // ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 97, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 97, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // dsub_0 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // dsub_1 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // dsub_2 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 98, // qsub_0 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 98, // ssub_0 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // ssub_1 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // ssub_2 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // ssub_3 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // ssub_4 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 98, // ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 98, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 98, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // dsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // dsub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // dsub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // dsub_3 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 99, // qsub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 99, // ssub_0 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // ssub_1 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // ssub_2 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // ssub_3 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // ssub_4 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 99, // ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 99, // ssub_0_ssub_1_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 99, // ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc |
| 100, // dsub_0 -> DQuadSpc |
| 0, // dsub_1 |
| 100, // dsub_2 -> DQuadSpc |
| 0, // dsub_3 |
| 100, // dsub_4 -> DQuadSpc |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 101, // ssub_0 -> DQuadSpc_with_ssub_0 |
| 101, // ssub_1 -> DQuadSpc_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 102, // ssub_4 -> DQuadSpc_with_ssub_4 |
| 102, // ssub_5 -> DQuadSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 103, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 103, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 100, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 100, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_ssub_0 |
| 101, // dsub_0 -> DQuadSpc_with_ssub_0 |
| 0, // dsub_1 |
| 101, // dsub_2 -> DQuadSpc_with_ssub_0 |
| 0, // dsub_3 |
| 101, // dsub_4 -> DQuadSpc_with_ssub_0 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 101, // ssub_0 -> DQuadSpc_with_ssub_0 |
| 101, // ssub_1 -> DQuadSpc_with_ssub_0 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 102, // ssub_4 -> DQuadSpc_with_ssub_4 |
| 102, // ssub_5 -> DQuadSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 103, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 103, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 101, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_0 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 101, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_0 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_ssub_4 |
| 102, // dsub_0 -> DQuadSpc_with_ssub_4 |
| 0, // dsub_1 |
| 102, // dsub_2 -> DQuadSpc_with_ssub_4 |
| 0, // dsub_3 |
| 102, // dsub_4 -> DQuadSpc_with_ssub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 102, // ssub_0 -> DQuadSpc_with_ssub_4 |
| 102, // ssub_1 -> DQuadSpc_with_ssub_4 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 102, // ssub_4 -> DQuadSpc_with_ssub_4 |
| 102, // ssub_5 -> DQuadSpc_with_ssub_4 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 103, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 103, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 102, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_4 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 102, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_4 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_ssub_8 |
| 103, // dsub_0 -> DQuadSpc_with_ssub_8 |
| 0, // dsub_1 |
| 103, // dsub_2 -> DQuadSpc_with_ssub_8 |
| 0, // dsub_3 |
| 103, // dsub_4 -> DQuadSpc_with_ssub_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 103, // ssub_0 -> DQuadSpc_with_ssub_8 |
| 103, // ssub_1 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 103, // ssub_4 -> DQuadSpc_with_ssub_8 |
| 103, // ssub_5 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 103, // ssub_8 -> DQuadSpc_with_ssub_8 |
| 103, // ssub_9 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 103, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 103, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_dsub_0_in_DPR_8 |
| 104, // dsub_0 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_1 |
| 104, // dsub_2 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_3 |
| 104, // dsub_4 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 104, // ssub_0 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 104, // ssub_1 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 104, // ssub_4 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 104, // ssub_5 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 104, // ssub_8 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 104, // ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 104, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 104, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_dsub_2_in_DPR_8 |
| 105, // dsub_0 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_1 |
| 105, // dsub_2 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_3 |
| 105, // dsub_4 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 105, // ssub_0 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 105, // ssub_1 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 105, // ssub_4 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 105, // ssub_5 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 105, // ssub_8 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 105, // ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 105, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 105, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_dsub_4_in_DPR_8 |
| 106, // dsub_0 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // dsub_1 |
| 106, // dsub_2 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // dsub_3 |
| 106, // dsub_4 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 0, // qsub_0 |
| 0, // qsub_1 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 106, // ssub_0 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 106, // ssub_1 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_2 |
| 0, // ssub_3 |
| 106, // ssub_4 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 106, // ssub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_6 |
| 0, // ssub_7 |
| 106, // ssub_8 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 106, // ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 106, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 106, // ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad |
| 107, // dsub_0 -> DQuad |
| 107, // dsub_1 -> DQuad |
| 107, // dsub_2 -> DQuad |
| 107, // dsub_3 -> DQuad |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 107, // qsub_0 -> DQuad |
| 107, // qsub_1 -> DQuad |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 108, // ssub_0 -> DQuad_with_ssub_0 |
| 108, // ssub_1 -> DQuad_with_ssub_0 |
| 109, // ssub_2 -> DQuad_with_ssub_2 |
| 109, // ssub_3 -> DQuad_with_ssub_2 |
| 112, // ssub_4 -> DQuad_with_ssub_4 |
| 112, // ssub_5 -> DQuad_with_ssub_4 |
| 113, // ssub_6 -> DQuad_with_ssub_6 |
| 113, // ssub_7 -> DQuad_with_ssub_6 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 107, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad |
| 107, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad |
| 107, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad |
| 107, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad |
| 107, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_0 |
| 108, // dsub_0 -> DQuad_with_ssub_0 |
| 108, // dsub_1 -> DQuad_with_ssub_0 |
| 108, // dsub_2 -> DQuad_with_ssub_0 |
| 108, // dsub_3 -> DQuad_with_ssub_0 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 108, // qsub_0 -> DQuad_with_ssub_0 |
| 108, // qsub_1 -> DQuad_with_ssub_0 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 108, // ssub_0 -> DQuad_with_ssub_0 |
| 108, // ssub_1 -> DQuad_with_ssub_0 |
| 109, // ssub_2 -> DQuad_with_ssub_2 |
| 109, // ssub_3 -> DQuad_with_ssub_2 |
| 112, // ssub_4 -> DQuad_with_ssub_4 |
| 112, // ssub_5 -> DQuad_with_ssub_4 |
| 113, // ssub_6 -> DQuad_with_ssub_6 |
| 113, // ssub_7 -> DQuad_with_ssub_6 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 108, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_0 |
| 108, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0 |
| 108, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_0 |
| 108, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_0 |
| 108, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2 |
| 109, // dsub_0 -> DQuad_with_ssub_2 |
| 109, // dsub_1 -> DQuad_with_ssub_2 |
| 109, // dsub_2 -> DQuad_with_ssub_2 |
| 109, // dsub_3 -> DQuad_with_ssub_2 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 109, // qsub_0 -> DQuad_with_ssub_2 |
| 109, // qsub_1 -> DQuad_with_ssub_2 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 109, // ssub_0 -> DQuad_with_ssub_2 |
| 109, // ssub_1 -> DQuad_with_ssub_2 |
| 109, // ssub_2 -> DQuad_with_ssub_2 |
| 109, // ssub_3 -> DQuad_with_ssub_2 |
| 112, // ssub_4 -> DQuad_with_ssub_4 |
| 112, // ssub_5 -> DQuad_with_ssub_4 |
| 113, // ssub_6 -> DQuad_with_ssub_6 |
| 113, // ssub_7 -> DQuad_with_ssub_6 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 109, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2 |
| 109, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2 |
| 109, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2 |
| 109, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2 |
| 109, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QQPR |
| 110, // dsub_0 -> QQPR |
| 110, // dsub_1 -> QQPR |
| 110, // dsub_2 -> QQPR |
| 110, // dsub_3 -> QQPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 110, // qsub_0 -> QQPR |
| 110, // qsub_1 -> QQPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 115, // ssub_0 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_1 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_2 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_3 -> DQuad_with_qsub_0_in_MQPR |
| 119, // ssub_4 -> MQQPR |
| 119, // ssub_5 -> MQQPR |
| 119, // ssub_6 -> MQQPR |
| 119, // ssub_7 -> MQQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 110, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQPR |
| 110, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR |
| 110, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQPR |
| 110, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQPR |
| 110, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 111, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 116, // ssub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // ssub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 118, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 111, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 111, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_4 |
| 112, // dsub_0 -> DQuad_with_ssub_4 |
| 112, // dsub_1 -> DQuad_with_ssub_4 |
| 112, // dsub_2 -> DQuad_with_ssub_4 |
| 112, // dsub_3 -> DQuad_with_ssub_4 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 112, // qsub_0 -> DQuad_with_ssub_4 |
| 112, // qsub_1 -> DQuad_with_ssub_4 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 112, // ssub_0 -> DQuad_with_ssub_4 |
| 112, // ssub_1 -> DQuad_with_ssub_4 |
| 112, // ssub_2 -> DQuad_with_ssub_4 |
| 112, // ssub_3 -> DQuad_with_ssub_4 |
| 112, // ssub_4 -> DQuad_with_ssub_4 |
| 112, // ssub_5 -> DQuad_with_ssub_4 |
| 113, // ssub_6 -> DQuad_with_ssub_6 |
| 113, // ssub_7 -> DQuad_with_ssub_6 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 112, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_4 |
| 112, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_4 |
| 112, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_4 |
| 112, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_4 |
| 112, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_4 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_6 |
| 113, // dsub_0 -> DQuad_with_ssub_6 |
| 113, // dsub_1 -> DQuad_with_ssub_6 |
| 113, // dsub_2 -> DQuad_with_ssub_6 |
| 113, // dsub_3 -> DQuad_with_ssub_6 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 113, // qsub_0 -> DQuad_with_ssub_6 |
| 113, // qsub_1 -> DQuad_with_ssub_6 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 113, // ssub_0 -> DQuad_with_ssub_6 |
| 113, // ssub_1 -> DQuad_with_ssub_6 |
| 113, // ssub_2 -> DQuad_with_ssub_6 |
| 113, // ssub_3 -> DQuad_with_ssub_6 |
| 113, // ssub_4 -> DQuad_with_ssub_6 |
| 113, // ssub_5 -> DQuad_with_ssub_6 |
| 113, // ssub_6 -> DQuad_with_ssub_6 |
| 113, // ssub_7 -> DQuad_with_ssub_6 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 113, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_6 |
| 113, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6 |
| 113, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_6 |
| 113, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_6 |
| 113, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_0_in_DPR_8 |
| 114, // dsub_0 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // dsub_1 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // dsub_2 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // dsub_3 -> DQuad_with_dsub_0_in_DPR_8 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 114, // qsub_0 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // qsub_1 -> DQuad_with_dsub_0_in_DPR_8 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 114, // ssub_0 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_1 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_2 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_3 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_4 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_6 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_7 -> DQuad_with_dsub_0_in_DPR_8 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 114, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8 |
| 114, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_qsub_0_in_MQPR |
| 115, // dsub_0 -> DQuad_with_qsub_0_in_MQPR |
| 115, // dsub_1 -> DQuad_with_qsub_0_in_MQPR |
| 115, // dsub_2 -> DQuad_with_qsub_0_in_MQPR |
| 115, // dsub_3 -> DQuad_with_qsub_0_in_MQPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 115, // qsub_0 -> DQuad_with_qsub_0_in_MQPR |
| 115, // qsub_1 -> DQuad_with_qsub_0_in_MQPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 115, // ssub_0 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_1 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_2 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_3 -> DQuad_with_qsub_0_in_MQPR |
| 119, // ssub_4 -> MQQPR |
| 119, // ssub_5 -> MQQPR |
| 119, // ssub_6 -> MQQPR |
| 119, // ssub_7 -> MQQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 115, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_MQPR |
| 115, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // dsub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // dsub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // dsub_2 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // dsub_3 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 116, // qsub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // qsub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 116, // ssub_0 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // ssub_1 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 118, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 116, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 116, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_1_in_DPR_8 |
| 117, // dsub_0 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // dsub_1 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // dsub_2 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // dsub_3 -> DQuad_with_dsub_1_in_DPR_8 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 117, // qsub_0 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // qsub_1 -> DQuad_with_dsub_1_in_DPR_8 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 117, // ssub_0 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_1 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_2 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_3 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_4 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_6 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_7 -> DQuad_with_dsub_1_in_DPR_8 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 117, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_1_in_DPR_8 |
| 117, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_1_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 118, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 118, // ssub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 118, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 118, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // MQQPR |
| 119, // dsub_0 -> MQQPR |
| 119, // dsub_1 -> MQQPR |
| 119, // dsub_2 -> MQQPR |
| 119, // dsub_3 -> MQQPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 119, // qsub_0 -> MQQPR |
| 119, // qsub_1 -> MQQPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 119, // ssub_0 -> MQQPR |
| 119, // ssub_1 -> MQQPR |
| 119, // ssub_2 -> MQQPR |
| 119, // ssub_3 -> MQQPR |
| 119, // ssub_4 -> MQQPR |
| 119, // ssub_5 -> MQQPR |
| 119, // ssub_6 -> MQQPR |
| 119, // ssub_7 -> MQQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 119, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQPR |
| 119, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR |
| 119, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQPR |
| 119, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQPR |
| 119, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_2_in_DPR_8 |
| 120, // dsub_0 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // dsub_1 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // dsub_2 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // dsub_3 -> DQuad_with_dsub_2_in_DPR_8 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 120, // qsub_0 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // qsub_1 -> DQuad_with_dsub_2_in_DPR_8 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 120, // ssub_0 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_1 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_2 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_3 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_4 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_6 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_7 -> DQuad_with_dsub_2_in_DPR_8 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 120, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_2_in_DPR_8 |
| 120, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_2_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // dsub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // dsub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // dsub_2 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // dsub_3 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 121, // qsub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // qsub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 121, // ssub_0 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_1 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_2 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_3 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_4 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_6 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 121, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 121, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_3_in_DPR_8 |
| 122, // dsub_0 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // dsub_1 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // dsub_2 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // dsub_3 -> DQuad_with_dsub_3_in_DPR_8 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 122, // qsub_0 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // qsub_1 -> DQuad_with_dsub_3_in_DPR_8 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 122, // ssub_0 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_1 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_2 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_3 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_4 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_6 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_7 -> DQuad_with_dsub_3_in_DPR_8 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 122, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8 |
| 122, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // dsub_0 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // dsub_1 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // dsub_2 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // dsub_3 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 123, // qsub_0 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // qsub_1 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 123, // ssub_0 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_1 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_2 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_3 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_4 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_6 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_7 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 123, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 123, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_qsub_0_in_QPR_8 |
| 124, // dsub_0 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // dsub_1 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // dsub_2 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // dsub_3 -> DQuad_with_qsub_0_in_QPR_8 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 124, // qsub_0 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // qsub_1 -> DQuad_with_qsub_0_in_QPR_8 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 124, // ssub_0 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_1 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_2 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_3 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_4 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_5 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_6 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_7 -> DQuad_with_qsub_0_in_QPR_8 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 124, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_qsub_0_in_QPR_8 |
| 124, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_0_in_QPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_qsub_1_in_QPR_8 |
| 125, // dsub_0 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // dsub_1 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // dsub_2 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // dsub_3 -> DQuad_with_qsub_1_in_QPR_8 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 125, // qsub_0 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // qsub_1 -> DQuad_with_qsub_1_in_QPR_8 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 125, // ssub_0 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_1 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_2 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_3 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_4 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_5 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_6 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_7 -> DQuad_with_qsub_1_in_QPR_8 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 125, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_qsub_1_in_QPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // dsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // dsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // dsub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // dsub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 126, // qsub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // qsub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 126, // ssub_0 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_1 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_2 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_3 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_4 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_6 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 126, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 126, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // dsub_0 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // dsub_1 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // dsub_2 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // dsub_3 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // dsub_4 |
| 0, // dsub_5 |
| 0, // dsub_6 |
| 0, // dsub_7 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 0, // qqsub_0 |
| 0, // qqsub_1 |
| 127, // qsub_0 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // qsub_1 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // qsub_2 |
| 0, // qsub_3 |
| 127, // ssub_0 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_1 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_2 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_3 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_4 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_6 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_7 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_8 |
| 0, // ssub_9 |
| 0, // ssub_10 |
| 0, // ssub_11 |
| 0, // ssub_12 |
| 0, // ssub_13 |
| 0, // ssub_14 |
| 0, // ssub_15 |
| 127, // ssub_0_ssub_1_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_2_ssub_3_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 127, // ssub_2_ssub_3_ssub_4_ssub_5 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_6_ssub_7_dsub_5 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // dsub_5_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // dsub_5_ssub_12_ssub_13 |
| 0, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QQQQPR |
| 128, // dsub_0 -> QQQQPR |
| 128, // dsub_1 -> QQQQPR |
| 128, // dsub_2 -> QQQQPR |
| 128, // dsub_3 -> QQQQPR |
| 128, // dsub_4 -> QQQQPR |
| 128, // dsub_5 -> QQQQPR |
| 128, // dsub_6 -> QQQQPR |
| 128, // dsub_7 -> QQQQPR |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 128, // qqsub_0 -> QQQQPR |
| 128, // qqsub_1 -> QQQQPR |
| 128, // qsub_0 -> QQQQPR |
| 128, // qsub_1 -> QQQQPR |
| 128, // qsub_2 -> QQQQPR |
| 128, // qsub_3 -> QQQQPR |
| 129, // ssub_0 -> QQQQPR_with_ssub_0 |
| 129, // ssub_1 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2 -> QQQQPR_with_ssub_0 |
| 129, // ssub_3 -> QQQQPR_with_ssub_0 |
| 130, // ssub_4 -> QQQQPR_with_ssub_4 |
| 130, // ssub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6 -> QQQQPR_with_ssub_4 |
| 130, // ssub_7 -> QQQQPR_with_ssub_4 |
| 131, // ssub_8 -> QQQQPR_with_ssub_8 |
| 131, // ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_10 -> QQQQPR_with_ssub_8 |
| 131, // ssub_11 -> QQQQPR_with_ssub_8 |
| 132, // ssub_12 -> MQQQQPR |
| 132, // ssub_13 -> MQQQQPR |
| 132, // ssub_14 -> MQQQQPR |
| 132, // ssub_15 -> MQQQQPR |
| 128, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR |
| 128, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR |
| 128, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR |
| 128, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR |
| 128, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR |
| 128, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR |
| 128, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR |
| 128, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR |
| 128, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR |
| 128, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR |
| 128, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR |
| 128, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR |
| 128, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR |
| 128, // ssub_6_ssub_7_dsub_5 -> QQQQPR |
| 128, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR |
| 128, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR |
| 128, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR |
| 128, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR |
| 128, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR |
| 128, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR |
| 128, // dsub_5_dsub_7 -> QQQQPR |
| 128, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR |
| 128, // dsub_5_ssub_12_ssub_13 -> QQQQPR |
| 128, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR |
| }, |
| { // QQQQPR_with_ssub_0 |
| 129, // dsub_0 -> QQQQPR_with_ssub_0 |
| 129, // dsub_1 -> QQQQPR_with_ssub_0 |
| 129, // dsub_2 -> QQQQPR_with_ssub_0 |
| 129, // dsub_3 -> QQQQPR_with_ssub_0 |
| 129, // dsub_4 -> QQQQPR_with_ssub_0 |
| 129, // dsub_5 -> QQQQPR_with_ssub_0 |
| 129, // dsub_6 -> QQQQPR_with_ssub_0 |
| 129, // dsub_7 -> QQQQPR_with_ssub_0 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 129, // qqsub_0 -> QQQQPR_with_ssub_0 |
| 129, // qqsub_1 -> QQQQPR_with_ssub_0 |
| 129, // qsub_0 -> QQQQPR_with_ssub_0 |
| 129, // qsub_1 -> QQQQPR_with_ssub_0 |
| 129, // qsub_2 -> QQQQPR_with_ssub_0 |
| 129, // qsub_3 -> QQQQPR_with_ssub_0 |
| 129, // ssub_0 -> QQQQPR_with_ssub_0 |
| 129, // ssub_1 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2 -> QQQQPR_with_ssub_0 |
| 129, // ssub_3 -> QQQQPR_with_ssub_0 |
| 130, // ssub_4 -> QQQQPR_with_ssub_4 |
| 130, // ssub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6 -> QQQQPR_with_ssub_4 |
| 130, // ssub_7 -> QQQQPR_with_ssub_4 |
| 131, // ssub_8 -> QQQQPR_with_ssub_8 |
| 131, // ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_10 -> QQQQPR_with_ssub_8 |
| 131, // ssub_11 -> QQQQPR_with_ssub_8 |
| 132, // ssub_12 -> MQQQQPR |
| 132, // ssub_13 -> MQQQQPR |
| 132, // ssub_14 -> MQQQQPR |
| 132, // ssub_15 -> MQQQQPR |
| 129, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_0 |
| 129, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_0 |
| 129, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 129, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_0 |
| 129, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 129, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 129, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 129, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 129, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_0 |
| 129, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_0 |
| 129, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_0 |
| 129, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_0 |
| 129, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 129, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 129, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 129, // dsub_5_dsub_7 -> QQQQPR_with_ssub_0 |
| 129, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_0 |
| 129, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_0 |
| 129, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_0 |
| }, |
| { // QQQQPR_with_ssub_4 |
| 130, // dsub_0 -> QQQQPR_with_ssub_4 |
| 130, // dsub_1 -> QQQQPR_with_ssub_4 |
| 130, // dsub_2 -> QQQQPR_with_ssub_4 |
| 130, // dsub_3 -> QQQQPR_with_ssub_4 |
| 130, // dsub_4 -> QQQQPR_with_ssub_4 |
| 130, // dsub_5 -> QQQQPR_with_ssub_4 |
| 130, // dsub_6 -> QQQQPR_with_ssub_4 |
| 130, // dsub_7 -> QQQQPR_with_ssub_4 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 130, // qqsub_0 -> QQQQPR_with_ssub_4 |
| 130, // qqsub_1 -> QQQQPR_with_ssub_4 |
| 130, // qsub_0 -> QQQQPR_with_ssub_4 |
| 130, // qsub_1 -> QQQQPR_with_ssub_4 |
| 130, // qsub_2 -> QQQQPR_with_ssub_4 |
| 130, // qsub_3 -> QQQQPR_with_ssub_4 |
| 130, // ssub_0 -> QQQQPR_with_ssub_4 |
| 130, // ssub_1 -> QQQQPR_with_ssub_4 |
| 130, // ssub_2 -> QQQQPR_with_ssub_4 |
| 130, // ssub_3 -> QQQQPR_with_ssub_4 |
| 130, // ssub_4 -> QQQQPR_with_ssub_4 |
| 130, // ssub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6 -> QQQQPR_with_ssub_4 |
| 130, // ssub_7 -> QQQQPR_with_ssub_4 |
| 131, // ssub_8 -> QQQQPR_with_ssub_8 |
| 131, // ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_10 -> QQQQPR_with_ssub_8 |
| 131, // ssub_11 -> QQQQPR_with_ssub_8 |
| 132, // ssub_12 -> MQQQQPR |
| 132, // ssub_13 -> MQQQQPR |
| 132, // ssub_14 -> MQQQQPR |
| 132, // ssub_15 -> MQQQQPR |
| 130, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_4 |
| 130, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_4 |
| 130, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 130, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 130, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_4 |
| 130, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 130, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 130, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 130, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_4 |
| 130, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 130, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 130, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 130, // dsub_5_dsub_7 -> QQQQPR_with_ssub_4 |
| 130, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_4 |
| 130, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_4 |
| 130, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_4 |
| }, |
| { // QQQQPR_with_ssub_8 |
| 131, // dsub_0 -> QQQQPR_with_ssub_8 |
| 131, // dsub_1 -> QQQQPR_with_ssub_8 |
| 131, // dsub_2 -> QQQQPR_with_ssub_8 |
| 131, // dsub_3 -> QQQQPR_with_ssub_8 |
| 131, // dsub_4 -> QQQQPR_with_ssub_8 |
| 131, // dsub_5 -> QQQQPR_with_ssub_8 |
| 131, // dsub_6 -> QQQQPR_with_ssub_8 |
| 131, // dsub_7 -> QQQQPR_with_ssub_8 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 131, // qqsub_0 -> QQQQPR_with_ssub_8 |
| 131, // qqsub_1 -> QQQQPR_with_ssub_8 |
| 131, // qsub_0 -> QQQQPR_with_ssub_8 |
| 131, // qsub_1 -> QQQQPR_with_ssub_8 |
| 131, // qsub_2 -> QQQQPR_with_ssub_8 |
| 131, // qsub_3 -> QQQQPR_with_ssub_8 |
| 131, // ssub_0 -> QQQQPR_with_ssub_8 |
| 131, // ssub_1 -> QQQQPR_with_ssub_8 |
| 131, // ssub_2 -> QQQQPR_with_ssub_8 |
| 131, // ssub_3 -> QQQQPR_with_ssub_8 |
| 131, // ssub_4 -> QQQQPR_with_ssub_8 |
| 131, // ssub_5 -> QQQQPR_with_ssub_8 |
| 131, // ssub_6 -> QQQQPR_with_ssub_8 |
| 131, // ssub_7 -> QQQQPR_with_ssub_8 |
| 131, // ssub_8 -> QQQQPR_with_ssub_8 |
| 131, // ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_10 -> QQQQPR_with_ssub_8 |
| 131, // ssub_11 -> QQQQPR_with_ssub_8 |
| 132, // ssub_12 -> MQQQQPR |
| 132, // ssub_13 -> MQQQQPR |
| 132, // ssub_14 -> MQQQQPR |
| 132, // ssub_15 -> MQQQQPR |
| 131, // ssub_0_ssub_1_ssub_4_ssub_5 -> QQQQPR_with_ssub_8 |
| 131, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_8 |
| 131, // ssub_2_ssub_3_ssub_6_ssub_7 -> QQQQPR_with_ssub_8 |
| 131, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> QQQQPR_with_ssub_8 |
| 131, // ssub_2_ssub_3_ssub_4_ssub_5 -> QQQQPR_with_ssub_8 |
| 131, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 131, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_8 |
| 131, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_8 |
| 131, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_4_ssub_5_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 131, // ssub_6_ssub_7_dsub_5 -> QQQQPR_with_ssub_8 |
| 131, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> QQQQPR_with_ssub_8 |
| 131, // ssub_6_ssub_7_dsub_5_dsub_7 -> QQQQPR_with_ssub_8 |
| 131, // ssub_6_ssub_7_ssub_8_ssub_9 -> QQQQPR_with_ssub_8 |
| 131, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 131, // ssub_8_ssub_9_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 131, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 131, // dsub_5_dsub_7 -> QQQQPR_with_ssub_8 |
| 131, // dsub_5_ssub_12_ssub_13_dsub_7 -> QQQQPR_with_ssub_8 |
| 131, // dsub_5_ssub_12_ssub_13 -> QQQQPR_with_ssub_8 |
| 131, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQQQPR_with_ssub_8 |
| }, |
| { // MQQQQPR |
| 132, // dsub_0 -> MQQQQPR |
| 132, // dsub_1 -> MQQQQPR |
| 132, // dsub_2 -> MQQQQPR |
| 132, // dsub_3 -> MQQQQPR |
| 132, // dsub_4 -> MQQQQPR |
| 132, // dsub_5 -> MQQQQPR |
| 132, // dsub_6 -> MQQQQPR |
| 132, // dsub_7 -> MQQQQPR |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 132, // qqsub_0 -> MQQQQPR |
| 132, // qqsub_1 -> MQQQQPR |
| 132, // qsub_0 -> MQQQQPR |
| 132, // qsub_1 -> MQQQQPR |
| 132, // qsub_2 -> MQQQQPR |
| 132, // qsub_3 -> MQQQQPR |
| 132, // ssub_0 -> MQQQQPR |
| 132, // ssub_1 -> MQQQQPR |
| 132, // ssub_2 -> MQQQQPR |
| 132, // ssub_3 -> MQQQQPR |
| 132, // ssub_4 -> MQQQQPR |
| 132, // ssub_5 -> MQQQQPR |
| 132, // ssub_6 -> MQQQQPR |
| 132, // ssub_7 -> MQQQQPR |
| 132, // ssub_8 -> MQQQQPR |
| 132, // ssub_9 -> MQQQQPR |
| 132, // ssub_10 -> MQQQQPR |
| 132, // ssub_11 -> MQQQQPR |
| 132, // ssub_12 -> MQQQQPR |
| 132, // ssub_13 -> MQQQQPR |
| 132, // ssub_14 -> MQQQQPR |
| 132, // ssub_15 -> MQQQQPR |
| 132, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR |
| 132, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR |
| 132, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR |
| 132, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR |
| 132, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR |
| 132, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR |
| 132, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR |
| 132, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR |
| 132, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR |
| 132, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR |
| 132, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR |
| 132, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR |
| 132, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR |
| 132, // ssub_6_ssub_7_dsub_5 -> MQQQQPR |
| 132, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR |
| 132, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR |
| 132, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR |
| 132, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR |
| 132, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR |
| 132, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR |
| 132, // dsub_5_dsub_7 -> MQQQQPR |
| 132, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR |
| 132, // dsub_5_ssub_12_ssub_13 -> MQQQQPR |
| 132, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR |
| }, |
| { // MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_0 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_1 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_2 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_3 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_4 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_6 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 133, // qqsub_0 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // qqsub_1 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // qsub_0 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // qsub_1 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // qsub_2 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // qsub_3 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_0 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_1 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_2 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_3 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_4 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_6 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_8 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_10 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_11 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_12 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_14 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_15 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| 133, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_0_in_DPR_8 |
| }, |
| { // MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_0 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_1 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_2 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_3 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_4 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_6 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 134, // qqsub_0 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // qqsub_1 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // qsub_0 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // qsub_1 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // qsub_2 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // qsub_3 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_0 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_1 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_2 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_3 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_4 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_6 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_8 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_10 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_11 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_12 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_14 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_15 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| 134, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_2_in_DPR_8 |
| }, |
| { // MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_0 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_1 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_2 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_3 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_4 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_6 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 135, // qqsub_0 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // qqsub_1 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // qsub_0 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // qsub_1 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // qsub_2 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // qsub_3 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_0 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_1 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_2 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_3 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_4 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_6 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_8 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_10 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_11 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_12 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_14 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_15 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| 135, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_4_in_DPR_8 |
| }, |
| { // MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_0 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_1 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_2 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_3 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_4 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_6 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 0, // gsub_0 |
| 0, // gsub_1 |
| 136, // qqsub_0 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // qqsub_1 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // qsub_0 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // qsub_1 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // qsub_2 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // qsub_3 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_0 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_1 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_2 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_3 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_4 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_6 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_8 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_10 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_11 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_12 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_14 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_15 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_0_ssub_1_ssub_4_ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_2_ssub_3_ssub_6_ssub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_2_ssub_3_ssub_4_ssub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_4_ssub_5_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_6_ssub_7_dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_6_ssub_7_dsub_5_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_6_ssub_7_ssub_8_ssub_9 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_8_ssub_9_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_5_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_5_ssub_12_ssub_13_dsub_7 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // dsub_5_ssub_12_ssub_13 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| 136, // ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQQQPR_with_dsub_6_in_DPR_8 |
| }, |
| }; |
| assert(RC && "Missing regclass"); |
| if (!Idx) return RC; |
| --Idx; |
| assert(Idx < 56 && "Bad subreg"); |
| unsigned TV = Table[RC->getID()][Idx]; |
| return TV ? getRegClass(TV - 1) : nullptr; |
| } |
| |
| const TargetRegisterClass *ARMGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const { |
| static const uint8_t Table[136][56] = { |
| { // HPR |
| 0, // HPR:dsub_0 |
| 0, // HPR:dsub_1 |
| 0, // HPR:dsub_2 |
| 0, // HPR:dsub_3 |
| 0, // HPR:dsub_4 |
| 0, // HPR:dsub_5 |
| 0, // HPR:dsub_6 |
| 0, // HPR:dsub_7 |
| 0, // HPR:gsub_0 |
| 0, // HPR:gsub_1 |
| 0, // HPR:qqsub_0 |
| 0, // HPR:qqsub_1 |
| 0, // HPR:qsub_0 |
| 0, // HPR:qsub_1 |
| 0, // HPR:qsub_2 |
| 0, // HPR:qsub_3 |
| 0, // HPR:ssub_0 |
| 0, // HPR:ssub_1 |
| 0, // HPR:ssub_2 |
| 0, // HPR:ssub_3 |
| 0, // HPR:ssub_4 |
| 0, // HPR:ssub_5 |
| 0, // HPR:ssub_6 |
| 0, // HPR:ssub_7 |
| 0, // HPR:ssub_8 |
| 0, // HPR:ssub_9 |
| 0, // HPR:ssub_10 |
| 0, // HPR:ssub_11 |
| 0, // HPR:ssub_12 |
| 0, // HPR:ssub_13 |
| 0, // HPR:ssub_14 |
| 0, // HPR:ssub_15 |
| 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // HPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // HPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // HPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // HPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // HPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // HPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // HPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // HPR:ssub_6_ssub_7_dsub_5 |
| 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // HPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // HPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // HPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // HPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // HPR:dsub_5_dsub_7 |
| 0, // HPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // HPR:dsub_5_ssub_12_ssub_13 |
| 0, // HPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPWithVPR |
| 0, // FPWithVPR:dsub_0 |
| 0, // FPWithVPR:dsub_1 |
| 0, // FPWithVPR:dsub_2 |
| 0, // FPWithVPR:dsub_3 |
| 0, // FPWithVPR:dsub_4 |
| 0, // FPWithVPR:dsub_5 |
| 0, // FPWithVPR:dsub_6 |
| 0, // FPWithVPR:dsub_7 |
| 0, // FPWithVPR:gsub_0 |
| 0, // FPWithVPR:gsub_1 |
| 0, // FPWithVPR:qqsub_0 |
| 0, // FPWithVPR:qqsub_1 |
| 0, // FPWithVPR:qsub_0 |
| 0, // FPWithVPR:qsub_1 |
| 0, // FPWithVPR:qsub_2 |
| 0, // FPWithVPR:qsub_3 |
| 3, // FPWithVPR:ssub_0 -> SPR |
| 3, // FPWithVPR:ssub_1 -> SPR |
| 0, // FPWithVPR:ssub_2 |
| 0, // FPWithVPR:ssub_3 |
| 0, // FPWithVPR:ssub_4 |
| 0, // FPWithVPR:ssub_5 |
| 0, // FPWithVPR:ssub_6 |
| 0, // FPWithVPR:ssub_7 |
| 0, // FPWithVPR:ssub_8 |
| 0, // FPWithVPR:ssub_9 |
| 0, // FPWithVPR:ssub_10 |
| 0, // FPWithVPR:ssub_11 |
| 0, // FPWithVPR:ssub_12 |
| 0, // FPWithVPR:ssub_13 |
| 0, // FPWithVPR:ssub_14 |
| 0, // FPWithVPR:ssub_15 |
| 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // FPWithVPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPWithVPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // FPWithVPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPWithVPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPWithVPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR:ssub_6_ssub_7_dsub_5 |
| 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // FPWithVPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR:dsub_5_dsub_7 |
| 0, // FPWithVPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // FPWithVPR:dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // SPR |
| 0, // SPR:dsub_0 |
| 0, // SPR:dsub_1 |
| 0, // SPR:dsub_2 |
| 0, // SPR:dsub_3 |
| 0, // SPR:dsub_4 |
| 0, // SPR:dsub_5 |
| 0, // SPR:dsub_6 |
| 0, // SPR:dsub_7 |
| 0, // SPR:gsub_0 |
| 0, // SPR:gsub_1 |
| 0, // SPR:qqsub_0 |
| 0, // SPR:qqsub_1 |
| 0, // SPR:qsub_0 |
| 0, // SPR:qsub_1 |
| 0, // SPR:qsub_2 |
| 0, // SPR:qsub_3 |
| 0, // SPR:ssub_0 |
| 0, // SPR:ssub_1 |
| 0, // SPR:ssub_2 |
| 0, // SPR:ssub_3 |
| 0, // SPR:ssub_4 |
| 0, // SPR:ssub_5 |
| 0, // SPR:ssub_6 |
| 0, // SPR:ssub_7 |
| 0, // SPR:ssub_8 |
| 0, // SPR:ssub_9 |
| 0, // SPR:ssub_10 |
| 0, // SPR:ssub_11 |
| 0, // SPR:ssub_12 |
| 0, // SPR:ssub_13 |
| 0, // SPR:ssub_14 |
| 0, // SPR:ssub_15 |
| 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // SPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // SPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // SPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // SPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // SPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // SPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // SPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // SPR:ssub_6_ssub_7_dsub_5 |
| 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // SPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // SPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // SPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // SPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // SPR:dsub_5_dsub_7 |
| 0, // SPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // SPR:dsub_5_ssub_12_ssub_13 |
| 0, // SPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPWithVPR_with_ssub_0 |
| 0, // FPWithVPR_with_ssub_0:dsub_0 |
| 0, // FPWithVPR_with_ssub_0:dsub_1 |
| 0, // FPWithVPR_with_ssub_0:dsub_2 |
| 0, // FPWithVPR_with_ssub_0:dsub_3 |
| 0, // FPWithVPR_with_ssub_0:dsub_4 |
| 0, // FPWithVPR_with_ssub_0:dsub_5 |
| 0, // FPWithVPR_with_ssub_0:dsub_6 |
| 0, // FPWithVPR_with_ssub_0:dsub_7 |
| 0, // FPWithVPR_with_ssub_0:gsub_0 |
| 0, // FPWithVPR_with_ssub_0:gsub_1 |
| 0, // FPWithVPR_with_ssub_0:qqsub_0 |
| 0, // FPWithVPR_with_ssub_0:qqsub_1 |
| 0, // FPWithVPR_with_ssub_0:qsub_0 |
| 0, // FPWithVPR_with_ssub_0:qsub_1 |
| 0, // FPWithVPR_with_ssub_0:qsub_2 |
| 0, // FPWithVPR_with_ssub_0:qsub_3 |
| 3, // FPWithVPR_with_ssub_0:ssub_0 -> SPR |
| 3, // FPWithVPR_with_ssub_0:ssub_1 -> SPR |
| 0, // FPWithVPR_with_ssub_0:ssub_2 |
| 0, // FPWithVPR_with_ssub_0:ssub_3 |
| 0, // FPWithVPR_with_ssub_0:ssub_4 |
| 0, // FPWithVPR_with_ssub_0:ssub_5 |
| 0, // FPWithVPR_with_ssub_0:ssub_6 |
| 0, // FPWithVPR_with_ssub_0:ssub_7 |
| 0, // FPWithVPR_with_ssub_0:ssub_8 |
| 0, // FPWithVPR_with_ssub_0:ssub_9 |
| 0, // FPWithVPR_with_ssub_0:ssub_10 |
| 0, // FPWithVPR_with_ssub_0:ssub_11 |
| 0, // FPWithVPR_with_ssub_0:ssub_12 |
| 0, // FPWithVPR_with_ssub_0:ssub_13 |
| 0, // FPWithVPR_with_ssub_0:ssub_14 |
| 0, // FPWithVPR_with_ssub_0:ssub_15 |
| 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPWithVPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0:dsub_5_dsub_7 |
| 0, // FPWithVPR_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // FPWithVPR_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPR |
| 0, // GPR:dsub_0 |
| 0, // GPR:dsub_1 |
| 0, // GPR:dsub_2 |
| 0, // GPR:dsub_3 |
| 0, // GPR:dsub_4 |
| 0, // GPR:dsub_5 |
| 0, // GPR:dsub_6 |
| 0, // GPR:dsub_7 |
| 0, // GPR:gsub_0 |
| 0, // GPR:gsub_1 |
| 0, // GPR:qqsub_0 |
| 0, // GPR:qqsub_1 |
| 0, // GPR:qsub_0 |
| 0, // GPR:qsub_1 |
| 0, // GPR:qsub_2 |
| 0, // GPR:qsub_3 |
| 0, // GPR:ssub_0 |
| 0, // GPR:ssub_1 |
| 0, // GPR:ssub_2 |
| 0, // GPR:ssub_3 |
| 0, // GPR:ssub_4 |
| 0, // GPR:ssub_5 |
| 0, // GPR:ssub_6 |
| 0, // GPR:ssub_7 |
| 0, // GPR:ssub_8 |
| 0, // GPR:ssub_9 |
| 0, // GPR:ssub_10 |
| 0, // GPR:ssub_11 |
| 0, // GPR:ssub_12 |
| 0, // GPR:ssub_13 |
| 0, // GPR:ssub_14 |
| 0, // GPR:ssub_15 |
| 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPR:dsub_5_dsub_7 |
| 0, // GPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithAPSR |
| 0, // GPRwithAPSR:dsub_0 |
| 0, // GPRwithAPSR:dsub_1 |
| 0, // GPRwithAPSR:dsub_2 |
| 0, // GPRwithAPSR:dsub_3 |
| 0, // GPRwithAPSR:dsub_4 |
| 0, // GPRwithAPSR:dsub_5 |
| 0, // GPRwithAPSR:dsub_6 |
| 0, // GPRwithAPSR:dsub_7 |
| 0, // GPRwithAPSR:gsub_0 |
| 0, // GPRwithAPSR:gsub_1 |
| 0, // GPRwithAPSR:qqsub_0 |
| 0, // GPRwithAPSR:qqsub_1 |
| 0, // GPRwithAPSR:qsub_0 |
| 0, // GPRwithAPSR:qsub_1 |
| 0, // GPRwithAPSR:qsub_2 |
| 0, // GPRwithAPSR:qsub_3 |
| 0, // GPRwithAPSR:ssub_0 |
| 0, // GPRwithAPSR:ssub_1 |
| 0, // GPRwithAPSR:ssub_2 |
| 0, // GPRwithAPSR:ssub_3 |
| 0, // GPRwithAPSR:ssub_4 |
| 0, // GPRwithAPSR:ssub_5 |
| 0, // GPRwithAPSR:ssub_6 |
| 0, // GPRwithAPSR:ssub_7 |
| 0, // GPRwithAPSR:ssub_8 |
| 0, // GPRwithAPSR:ssub_9 |
| 0, // GPRwithAPSR:ssub_10 |
| 0, // GPRwithAPSR:ssub_11 |
| 0, // GPRwithAPSR:ssub_12 |
| 0, // GPRwithAPSR:ssub_13 |
| 0, // GPRwithAPSR:ssub_14 |
| 0, // GPRwithAPSR:ssub_15 |
| 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithAPSR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithAPSR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRwithAPSR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSR:dsub_5_dsub_7 |
| 0, // GPRwithAPSR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRwithAPSR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithZR |
| 0, // GPRwithZR:dsub_0 |
| 0, // GPRwithZR:dsub_1 |
| 0, // GPRwithZR:dsub_2 |
| 0, // GPRwithZR:dsub_3 |
| 0, // GPRwithZR:dsub_4 |
| 0, // GPRwithZR:dsub_5 |
| 0, // GPRwithZR:dsub_6 |
| 0, // GPRwithZR:dsub_7 |
| 0, // GPRwithZR:gsub_0 |
| 0, // GPRwithZR:gsub_1 |
| 0, // GPRwithZR:qqsub_0 |
| 0, // GPRwithZR:qqsub_1 |
| 0, // GPRwithZR:qsub_0 |
| 0, // GPRwithZR:qsub_1 |
| 0, // GPRwithZR:qsub_2 |
| 0, // GPRwithZR:qsub_3 |
| 0, // GPRwithZR:ssub_0 |
| 0, // GPRwithZR:ssub_1 |
| 0, // GPRwithZR:ssub_2 |
| 0, // GPRwithZR:ssub_3 |
| 0, // GPRwithZR:ssub_4 |
| 0, // GPRwithZR:ssub_5 |
| 0, // GPRwithZR:ssub_6 |
| 0, // GPRwithZR:ssub_7 |
| 0, // GPRwithZR:ssub_8 |
| 0, // GPRwithZR:ssub_9 |
| 0, // GPRwithZR:ssub_10 |
| 0, // GPRwithZR:ssub_11 |
| 0, // GPRwithZR:ssub_12 |
| 0, // GPRwithZR:ssub_13 |
| 0, // GPRwithZR:ssub_14 |
| 0, // GPRwithZR:ssub_15 |
| 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRwithZR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithZR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithZR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithZR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithZR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithZR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithZR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithZR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRwithZR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithZR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithZR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithZR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithZR:dsub_5_dsub_7 |
| 0, // GPRwithZR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRwithZR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithZR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // SPR_8 |
| 0, // SPR_8:dsub_0 |
| 0, // SPR_8:dsub_1 |
| 0, // SPR_8:dsub_2 |
| 0, // SPR_8:dsub_3 |
| 0, // SPR_8:dsub_4 |
| 0, // SPR_8:dsub_5 |
| 0, // SPR_8:dsub_6 |
| 0, // SPR_8:dsub_7 |
| 0, // SPR_8:gsub_0 |
| 0, // SPR_8:gsub_1 |
| 0, // SPR_8:qqsub_0 |
| 0, // SPR_8:qqsub_1 |
| 0, // SPR_8:qsub_0 |
| 0, // SPR_8:qsub_1 |
| 0, // SPR_8:qsub_2 |
| 0, // SPR_8:qsub_3 |
| 0, // SPR_8:ssub_0 |
| 0, // SPR_8:ssub_1 |
| 0, // SPR_8:ssub_2 |
| 0, // SPR_8:ssub_3 |
| 0, // SPR_8:ssub_4 |
| 0, // SPR_8:ssub_5 |
| 0, // SPR_8:ssub_6 |
| 0, // SPR_8:ssub_7 |
| 0, // SPR_8:ssub_8 |
| 0, // SPR_8:ssub_9 |
| 0, // SPR_8:ssub_10 |
| 0, // SPR_8:ssub_11 |
| 0, // SPR_8:ssub_12 |
| 0, // SPR_8:ssub_13 |
| 0, // SPR_8:ssub_14 |
| 0, // SPR_8:ssub_15 |
| 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // SPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // SPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // SPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // SPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // SPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // SPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // SPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // SPR_8:dsub_5_dsub_7 |
| 0, // SPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // SPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnopc |
| 0, // GPRnopc:dsub_0 |
| 0, // GPRnopc:dsub_1 |
| 0, // GPRnopc:dsub_2 |
| 0, // GPRnopc:dsub_3 |
| 0, // GPRnopc:dsub_4 |
| 0, // GPRnopc:dsub_5 |
| 0, // GPRnopc:dsub_6 |
| 0, // GPRnopc:dsub_7 |
| 0, // GPRnopc:gsub_0 |
| 0, // GPRnopc:gsub_1 |
| 0, // GPRnopc:qqsub_0 |
| 0, // GPRnopc:qqsub_1 |
| 0, // GPRnopc:qsub_0 |
| 0, // GPRnopc:qsub_1 |
| 0, // GPRnopc:qsub_2 |
| 0, // GPRnopc:qsub_3 |
| 0, // GPRnopc:ssub_0 |
| 0, // GPRnopc:ssub_1 |
| 0, // GPRnopc:ssub_2 |
| 0, // GPRnopc:ssub_3 |
| 0, // GPRnopc:ssub_4 |
| 0, // GPRnopc:ssub_5 |
| 0, // GPRnopc:ssub_6 |
| 0, // GPRnopc:ssub_7 |
| 0, // GPRnopc:ssub_8 |
| 0, // GPRnopc:ssub_9 |
| 0, // GPRnopc:ssub_10 |
| 0, // GPRnopc:ssub_11 |
| 0, // GPRnopc:ssub_12 |
| 0, // GPRnopc:ssub_13 |
| 0, // GPRnopc:ssub_14 |
| 0, // GPRnopc:ssub_15 |
| 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnopc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnopc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc:dsub_5_dsub_7 |
| 0, // GPRnopc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnopc:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp |
| 0, // GPRnosp:dsub_0 |
| 0, // GPRnosp:dsub_1 |
| 0, // GPRnosp:dsub_2 |
| 0, // GPRnosp:dsub_3 |
| 0, // GPRnosp:dsub_4 |
| 0, // GPRnosp:dsub_5 |
| 0, // GPRnosp:dsub_6 |
| 0, // GPRnosp:dsub_7 |
| 0, // GPRnosp:gsub_0 |
| 0, // GPRnosp:gsub_1 |
| 0, // GPRnosp:qqsub_0 |
| 0, // GPRnosp:qqsub_1 |
| 0, // GPRnosp:qsub_0 |
| 0, // GPRnosp:qsub_1 |
| 0, // GPRnosp:qsub_2 |
| 0, // GPRnosp:qsub_3 |
| 0, // GPRnosp:ssub_0 |
| 0, // GPRnosp:ssub_1 |
| 0, // GPRnosp:ssub_2 |
| 0, // GPRnosp:ssub_3 |
| 0, // GPRnosp:ssub_4 |
| 0, // GPRnosp:ssub_5 |
| 0, // GPRnosp:ssub_6 |
| 0, // GPRnosp:ssub_7 |
| 0, // GPRnosp:ssub_8 |
| 0, // GPRnosp:ssub_9 |
| 0, // GPRnosp:ssub_10 |
| 0, // GPRnosp:ssub_11 |
| 0, // GPRnosp:ssub_12 |
| 0, // GPRnosp:ssub_13 |
| 0, // GPRnosp:ssub_14 |
| 0, // GPRnosp:ssub_15 |
| 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp:dsub_5_dsub_7 |
| 0, // GPRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnosp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithAPSR_NZCVnosp |
| 0, // GPRwithAPSR_NZCVnosp:dsub_0 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_1 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_2 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_3 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_4 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_5 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_6 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_7 |
| 0, // GPRwithAPSR_NZCVnosp:gsub_0 |
| 0, // GPRwithAPSR_NZCVnosp:gsub_1 |
| 0, // GPRwithAPSR_NZCVnosp:qqsub_0 |
| 0, // GPRwithAPSR_NZCVnosp:qqsub_1 |
| 0, // GPRwithAPSR_NZCVnosp:qsub_0 |
| 0, // GPRwithAPSR_NZCVnosp:qsub_1 |
| 0, // GPRwithAPSR_NZCVnosp:qsub_2 |
| 0, // GPRwithAPSR_NZCVnosp:qsub_3 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_0 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_1 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_2 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_3 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_4 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_5 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_6 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_7 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_8 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_9 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_10 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_11 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_12 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_13 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_14 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_15 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_5_dsub_7 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithAPSRnosp |
| 0, // GPRwithAPSRnosp:dsub_0 |
| 0, // GPRwithAPSRnosp:dsub_1 |
| 0, // GPRwithAPSRnosp:dsub_2 |
| 0, // GPRwithAPSRnosp:dsub_3 |
| 0, // GPRwithAPSRnosp:dsub_4 |
| 0, // GPRwithAPSRnosp:dsub_5 |
| 0, // GPRwithAPSRnosp:dsub_6 |
| 0, // GPRwithAPSRnosp:dsub_7 |
| 0, // GPRwithAPSRnosp:gsub_0 |
| 0, // GPRwithAPSRnosp:gsub_1 |
| 0, // GPRwithAPSRnosp:qqsub_0 |
| 0, // GPRwithAPSRnosp:qqsub_1 |
| 0, // GPRwithAPSRnosp:qsub_0 |
| 0, // GPRwithAPSRnosp:qsub_1 |
| 0, // GPRwithAPSRnosp:qsub_2 |
| 0, // GPRwithAPSRnosp:qsub_3 |
| 0, // GPRwithAPSRnosp:ssub_0 |
| 0, // GPRwithAPSRnosp:ssub_1 |
| 0, // GPRwithAPSRnosp:ssub_2 |
| 0, // GPRwithAPSRnosp:ssub_3 |
| 0, // GPRwithAPSRnosp:ssub_4 |
| 0, // GPRwithAPSRnosp:ssub_5 |
| 0, // GPRwithAPSRnosp:ssub_6 |
| 0, // GPRwithAPSRnosp:ssub_7 |
| 0, // GPRwithAPSRnosp:ssub_8 |
| 0, // GPRwithAPSRnosp:ssub_9 |
| 0, // GPRwithAPSRnosp:ssub_10 |
| 0, // GPRwithAPSRnosp:ssub_11 |
| 0, // GPRwithAPSRnosp:ssub_12 |
| 0, // GPRwithAPSRnosp:ssub_13 |
| 0, // GPRwithAPSRnosp:ssub_14 |
| 0, // GPRwithAPSRnosp:ssub_15 |
| 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithAPSRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithAPSRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSRnosp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRwithAPSRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithAPSRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithAPSRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSRnosp:dsub_5_dsub_7 |
| 0, // GPRwithAPSRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRwithAPSRnosp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithAPSRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRwithZRnosp |
| 0, // GPRwithZRnosp:dsub_0 |
| 0, // GPRwithZRnosp:dsub_1 |
| 0, // GPRwithZRnosp:dsub_2 |
| 0, // GPRwithZRnosp:dsub_3 |
| 0, // GPRwithZRnosp:dsub_4 |
| 0, // GPRwithZRnosp:dsub_5 |
| 0, // GPRwithZRnosp:dsub_6 |
| 0, // GPRwithZRnosp:dsub_7 |
| 0, // GPRwithZRnosp:gsub_0 |
| 0, // GPRwithZRnosp:gsub_1 |
| 0, // GPRwithZRnosp:qqsub_0 |
| 0, // GPRwithZRnosp:qqsub_1 |
| 0, // GPRwithZRnosp:qsub_0 |
| 0, // GPRwithZRnosp:qsub_1 |
| 0, // GPRwithZRnosp:qsub_2 |
| 0, // GPRwithZRnosp:qsub_3 |
| 0, // GPRwithZRnosp:ssub_0 |
| 0, // GPRwithZRnosp:ssub_1 |
| 0, // GPRwithZRnosp:ssub_2 |
| 0, // GPRwithZRnosp:ssub_3 |
| 0, // GPRwithZRnosp:ssub_4 |
| 0, // GPRwithZRnosp:ssub_5 |
| 0, // GPRwithZRnosp:ssub_6 |
| 0, // GPRwithZRnosp:ssub_7 |
| 0, // GPRwithZRnosp:ssub_8 |
| 0, // GPRwithZRnosp:ssub_9 |
| 0, // GPRwithZRnosp:ssub_10 |
| 0, // GPRwithZRnosp:ssub_11 |
| 0, // GPRwithZRnosp:ssub_12 |
| 0, // GPRwithZRnosp:ssub_13 |
| 0, // GPRwithZRnosp:ssub_14 |
| 0, // GPRwithZRnosp:ssub_15 |
| 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithZRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithZRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithZRnosp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRwithZRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRwithZRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithZRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRwithZRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithZRnosp:dsub_5_dsub_7 |
| 0, // GPRwithZRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRwithZRnosp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRwithZRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip |
| 0, // GPRnoip:dsub_0 |
| 0, // GPRnoip:dsub_1 |
| 0, // GPRnoip:dsub_2 |
| 0, // GPRnoip:dsub_3 |
| 0, // GPRnoip:dsub_4 |
| 0, // GPRnoip:dsub_5 |
| 0, // GPRnoip:dsub_6 |
| 0, // GPRnoip:dsub_7 |
| 0, // GPRnoip:gsub_0 |
| 0, // GPRnoip:gsub_1 |
| 0, // GPRnoip:qqsub_0 |
| 0, // GPRnoip:qqsub_1 |
| 0, // GPRnoip:qsub_0 |
| 0, // GPRnoip:qsub_1 |
| 0, // GPRnoip:qsub_2 |
| 0, // GPRnoip:qsub_3 |
| 0, // GPRnoip:ssub_0 |
| 0, // GPRnoip:ssub_1 |
| 0, // GPRnoip:ssub_2 |
| 0, // GPRnoip:ssub_3 |
| 0, // GPRnoip:ssub_4 |
| 0, // GPRnoip:ssub_5 |
| 0, // GPRnoip:ssub_6 |
| 0, // GPRnoip:ssub_7 |
| 0, // GPRnoip:ssub_8 |
| 0, // GPRnoip:ssub_9 |
| 0, // GPRnoip:ssub_10 |
| 0, // GPRnoip:ssub_11 |
| 0, // GPRnoip:ssub_12 |
| 0, // GPRnoip:ssub_13 |
| 0, // GPRnoip:ssub_14 |
| 0, // GPRnoip:ssub_15 |
| 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnoip:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnoip:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip:dsub_5_dsub_7 |
| 0, // GPRnoip:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnoip:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // rGPR |
| 0, // rGPR:dsub_0 |
| 0, // rGPR:dsub_1 |
| 0, // rGPR:dsub_2 |
| 0, // rGPR:dsub_3 |
| 0, // rGPR:dsub_4 |
| 0, // rGPR:dsub_5 |
| 0, // rGPR:dsub_6 |
| 0, // rGPR:dsub_7 |
| 0, // rGPR:gsub_0 |
| 0, // rGPR:gsub_1 |
| 0, // rGPR:qqsub_0 |
| 0, // rGPR:qqsub_1 |
| 0, // rGPR:qsub_0 |
| 0, // rGPR:qsub_1 |
| 0, // rGPR:qsub_2 |
| 0, // rGPR:qsub_3 |
| 0, // rGPR:ssub_0 |
| 0, // rGPR:ssub_1 |
| 0, // rGPR:ssub_2 |
| 0, // rGPR:ssub_3 |
| 0, // rGPR:ssub_4 |
| 0, // rGPR:ssub_5 |
| 0, // rGPR:ssub_6 |
| 0, // rGPR:ssub_7 |
| 0, // rGPR:ssub_8 |
| 0, // rGPR:ssub_9 |
| 0, // rGPR:ssub_10 |
| 0, // rGPR:ssub_11 |
| 0, // rGPR:ssub_12 |
| 0, // rGPR:ssub_13 |
| 0, // rGPR:ssub_14 |
| 0, // rGPR:ssub_15 |
| 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // rGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // rGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // rGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // rGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // rGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // rGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // rGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // rGPR:ssub_6_ssub_7_dsub_5 |
| 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // rGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // rGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // rGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // rGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // rGPR:dsub_5_dsub_7 |
| 0, // rGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // rGPR:dsub_5_ssub_12_ssub_13 |
| 0, // rGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_GPRnopc |
| 0, // GPRnoip_and_GPRnopc:dsub_0 |
| 0, // GPRnoip_and_GPRnopc:dsub_1 |
| 0, // GPRnoip_and_GPRnopc:dsub_2 |
| 0, // GPRnoip_and_GPRnopc:dsub_3 |
| 0, // GPRnoip_and_GPRnopc:dsub_4 |
| 0, // GPRnoip_and_GPRnopc:dsub_5 |
| 0, // GPRnoip_and_GPRnopc:dsub_6 |
| 0, // GPRnoip_and_GPRnopc:dsub_7 |
| 0, // GPRnoip_and_GPRnopc:gsub_0 |
| 0, // GPRnoip_and_GPRnopc:gsub_1 |
| 0, // GPRnoip_and_GPRnopc:qqsub_0 |
| 0, // GPRnoip_and_GPRnopc:qqsub_1 |
| 0, // GPRnoip_and_GPRnopc:qsub_0 |
| 0, // GPRnoip_and_GPRnopc:qsub_1 |
| 0, // GPRnoip_and_GPRnopc:qsub_2 |
| 0, // GPRnoip_and_GPRnopc:qsub_3 |
| 0, // GPRnoip_and_GPRnopc:ssub_0 |
| 0, // GPRnoip_and_GPRnopc:ssub_1 |
| 0, // GPRnoip_and_GPRnopc:ssub_2 |
| 0, // GPRnoip_and_GPRnopc:ssub_3 |
| 0, // GPRnoip_and_GPRnopc:ssub_4 |
| 0, // GPRnoip_and_GPRnopc:ssub_5 |
| 0, // GPRnoip_and_GPRnopc:ssub_6 |
| 0, // GPRnoip_and_GPRnopc:ssub_7 |
| 0, // GPRnoip_and_GPRnopc:ssub_8 |
| 0, // GPRnoip_and_GPRnopc:ssub_9 |
| 0, // GPRnoip_and_GPRnopc:ssub_10 |
| 0, // GPRnoip_and_GPRnopc:ssub_11 |
| 0, // GPRnoip_and_GPRnopc:ssub_12 |
| 0, // GPRnoip_and_GPRnopc:ssub_13 |
| 0, // GPRnoip_and_GPRnopc:ssub_14 |
| 0, // GPRnoip_and_GPRnopc:ssub_15 |
| 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnopc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRnopc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnopc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnopc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnopc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnopc:dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRnopc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnoip_and_GPRnopc:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnopc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_GPRnosp |
| 0, // GPRnoip_and_GPRnosp:dsub_0 |
| 0, // GPRnoip_and_GPRnosp:dsub_1 |
| 0, // GPRnoip_and_GPRnosp:dsub_2 |
| 0, // GPRnoip_and_GPRnosp:dsub_3 |
| 0, // GPRnoip_and_GPRnosp:dsub_4 |
| 0, // GPRnoip_and_GPRnosp:dsub_5 |
| 0, // GPRnoip_and_GPRnosp:dsub_6 |
| 0, // GPRnoip_and_GPRnosp:dsub_7 |
| 0, // GPRnoip_and_GPRnosp:gsub_0 |
| 0, // GPRnoip_and_GPRnosp:gsub_1 |
| 0, // GPRnoip_and_GPRnosp:qqsub_0 |
| 0, // GPRnoip_and_GPRnosp:qqsub_1 |
| 0, // GPRnoip_and_GPRnosp:qsub_0 |
| 0, // GPRnoip_and_GPRnosp:qsub_1 |
| 0, // GPRnoip_and_GPRnosp:qsub_2 |
| 0, // GPRnoip_and_GPRnosp:qsub_3 |
| 0, // GPRnoip_and_GPRnosp:ssub_0 |
| 0, // GPRnoip_and_GPRnosp:ssub_1 |
| 0, // GPRnoip_and_GPRnosp:ssub_2 |
| 0, // GPRnoip_and_GPRnosp:ssub_3 |
| 0, // GPRnoip_and_GPRnosp:ssub_4 |
| 0, // GPRnoip_and_GPRnosp:ssub_5 |
| 0, // GPRnoip_and_GPRnosp:ssub_6 |
| 0, // GPRnoip_and_GPRnosp:ssub_7 |
| 0, // GPRnoip_and_GPRnosp:ssub_8 |
| 0, // GPRnoip_and_GPRnosp:ssub_9 |
| 0, // GPRnoip_and_GPRnosp:ssub_10 |
| 0, // GPRnoip_and_GPRnosp:ssub_11 |
| 0, // GPRnoip_and_GPRnosp:ssub_12 |
| 0, // GPRnoip_and_GPRnosp:ssub_13 |
| 0, // GPRnoip_and_GPRnosp:ssub_14 |
| 0, // GPRnoip_and_GPRnosp:ssub_15 |
| 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnosp:dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnoip_and_GPRnosp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_0 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_1 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_2 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_3 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_4 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_6 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:gsub_0 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:gsub_1 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qqsub_0 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qqsub_1 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_0 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_1 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_2 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:qsub_3 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_1 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_3 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_9 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_10 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_11 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_12 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_13 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_14 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_15 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_dsub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_GPRwithAPSR_NZCVnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPRwithpc |
| 0, // tGPRwithpc:dsub_0 |
| 0, // tGPRwithpc:dsub_1 |
| 0, // tGPRwithpc:dsub_2 |
| 0, // tGPRwithpc:dsub_3 |
| 0, // tGPRwithpc:dsub_4 |
| 0, // tGPRwithpc:dsub_5 |
| 0, // tGPRwithpc:dsub_6 |
| 0, // tGPRwithpc:dsub_7 |
| 0, // tGPRwithpc:gsub_0 |
| 0, // tGPRwithpc:gsub_1 |
| 0, // tGPRwithpc:qqsub_0 |
| 0, // tGPRwithpc:qqsub_1 |
| 0, // tGPRwithpc:qsub_0 |
| 0, // tGPRwithpc:qsub_1 |
| 0, // tGPRwithpc:qsub_2 |
| 0, // tGPRwithpc:qsub_3 |
| 0, // tGPRwithpc:ssub_0 |
| 0, // tGPRwithpc:ssub_1 |
| 0, // tGPRwithpc:ssub_2 |
| 0, // tGPRwithpc:ssub_3 |
| 0, // tGPRwithpc:ssub_4 |
| 0, // tGPRwithpc:ssub_5 |
| 0, // tGPRwithpc:ssub_6 |
| 0, // tGPRwithpc:ssub_7 |
| 0, // tGPRwithpc:ssub_8 |
| 0, // tGPRwithpc:ssub_9 |
| 0, // tGPRwithpc:ssub_10 |
| 0, // tGPRwithpc:ssub_11 |
| 0, // tGPRwithpc:ssub_12 |
| 0, // tGPRwithpc:ssub_13 |
| 0, // tGPRwithpc:ssub_14 |
| 0, // tGPRwithpc:ssub_15 |
| 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPRwithpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPRwithpc:ssub_6_ssub_7_dsub_5 |
| 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPRwithpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPRwithpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPRwithpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPRwithpc:dsub_5_dsub_7 |
| 0, // tGPRwithpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPRwithpc:dsub_5_ssub_12_ssub_13 |
| 0, // tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_0 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_1 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_2 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_3 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_4 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_6 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:gsub_0 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:gsub_1 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qqsub_0 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qqsub_1 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_0 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_1 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_2 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:qsub_3 |
| 8, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0 -> SPR_8 |
| 8, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_1 -> SPR_8 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_3 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_9 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_10 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_11 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_12 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_13 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_14 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_15 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_dsub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR |
| 0, // hGPR:dsub_0 |
| 0, // hGPR:dsub_1 |
| 0, // hGPR:dsub_2 |
| 0, // hGPR:dsub_3 |
| 0, // hGPR:dsub_4 |
| 0, // hGPR:dsub_5 |
| 0, // hGPR:dsub_6 |
| 0, // hGPR:dsub_7 |
| 0, // hGPR:gsub_0 |
| 0, // hGPR:gsub_1 |
| 0, // hGPR:qqsub_0 |
| 0, // hGPR:qqsub_1 |
| 0, // hGPR:qsub_0 |
| 0, // hGPR:qsub_1 |
| 0, // hGPR:qsub_2 |
| 0, // hGPR:qsub_3 |
| 0, // hGPR:ssub_0 |
| 0, // hGPR:ssub_1 |
| 0, // hGPR:ssub_2 |
| 0, // hGPR:ssub_3 |
| 0, // hGPR:ssub_4 |
| 0, // hGPR:ssub_5 |
| 0, // hGPR:ssub_6 |
| 0, // hGPR:ssub_7 |
| 0, // hGPR:ssub_8 |
| 0, // hGPR:ssub_9 |
| 0, // hGPR:ssub_10 |
| 0, // hGPR:ssub_11 |
| 0, // hGPR:ssub_12 |
| 0, // hGPR:ssub_13 |
| 0, // hGPR:ssub_14 |
| 0, // hGPR:ssub_15 |
| 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR:dsub_5_dsub_7 |
| 0, // hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPR |
| 0, // tGPR:dsub_0 |
| 0, // tGPR:dsub_1 |
| 0, // tGPR:dsub_2 |
| 0, // tGPR:dsub_3 |
| 0, // tGPR:dsub_4 |
| 0, // tGPR:dsub_5 |
| 0, // tGPR:dsub_6 |
| 0, // tGPR:dsub_7 |
| 0, // tGPR:gsub_0 |
| 0, // tGPR:gsub_1 |
| 0, // tGPR:qqsub_0 |
| 0, // tGPR:qqsub_1 |
| 0, // tGPR:qsub_0 |
| 0, // tGPR:qsub_1 |
| 0, // tGPR:qsub_2 |
| 0, // tGPR:qsub_3 |
| 0, // tGPR:ssub_0 |
| 0, // tGPR:ssub_1 |
| 0, // tGPR:ssub_2 |
| 0, // tGPR:ssub_3 |
| 0, // tGPR:ssub_4 |
| 0, // tGPR:ssub_5 |
| 0, // tGPR:ssub_6 |
| 0, // tGPR:ssub_7 |
| 0, // tGPR:ssub_8 |
| 0, // tGPR:ssub_9 |
| 0, // tGPR:ssub_10 |
| 0, // tGPR:ssub_11 |
| 0, // tGPR:ssub_12 |
| 0, // tGPR:ssub_13 |
| 0, // tGPR:ssub_14 |
| 0, // tGPR:ssub_15 |
| 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR:ssub_6_ssub_7_dsub_5 |
| 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPR:dsub_5_dsub_7 |
| 0, // tGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPR:dsub_5_ssub_12_ssub_13 |
| 0, // tGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPREven |
| 0, // tGPREven:dsub_0 |
| 0, // tGPREven:dsub_1 |
| 0, // tGPREven:dsub_2 |
| 0, // tGPREven:dsub_3 |
| 0, // tGPREven:dsub_4 |
| 0, // tGPREven:dsub_5 |
| 0, // tGPREven:dsub_6 |
| 0, // tGPREven:dsub_7 |
| 0, // tGPREven:gsub_0 |
| 0, // tGPREven:gsub_1 |
| 0, // tGPREven:qqsub_0 |
| 0, // tGPREven:qqsub_1 |
| 0, // tGPREven:qsub_0 |
| 0, // tGPREven:qsub_1 |
| 0, // tGPREven:qsub_2 |
| 0, // tGPREven:qsub_3 |
| 0, // tGPREven:ssub_0 |
| 0, // tGPREven:ssub_1 |
| 0, // tGPREven:ssub_2 |
| 0, // tGPREven:ssub_3 |
| 0, // tGPREven:ssub_4 |
| 0, // tGPREven:ssub_5 |
| 0, // tGPREven:ssub_6 |
| 0, // tGPREven:ssub_7 |
| 0, // tGPREven:ssub_8 |
| 0, // tGPREven:ssub_9 |
| 0, // tGPREven:ssub_10 |
| 0, // tGPREven:ssub_11 |
| 0, // tGPREven:ssub_12 |
| 0, // tGPREven:ssub_13 |
| 0, // tGPREven:ssub_14 |
| 0, // tGPREven:ssub_15 |
| 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven:ssub_6_ssub_7_dsub_5 |
| 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven:dsub_5_dsub_7 |
| 0, // tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPREven:dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnopc_and_hGPR |
| 0, // GPRnopc_and_hGPR:dsub_0 |
| 0, // GPRnopc_and_hGPR:dsub_1 |
| 0, // GPRnopc_and_hGPR:dsub_2 |
| 0, // GPRnopc_and_hGPR:dsub_3 |
| 0, // GPRnopc_and_hGPR:dsub_4 |
| 0, // GPRnopc_and_hGPR:dsub_5 |
| 0, // GPRnopc_and_hGPR:dsub_6 |
| 0, // GPRnopc_and_hGPR:dsub_7 |
| 0, // GPRnopc_and_hGPR:gsub_0 |
| 0, // GPRnopc_and_hGPR:gsub_1 |
| 0, // GPRnopc_and_hGPR:qqsub_0 |
| 0, // GPRnopc_and_hGPR:qqsub_1 |
| 0, // GPRnopc_and_hGPR:qsub_0 |
| 0, // GPRnopc_and_hGPR:qsub_1 |
| 0, // GPRnopc_and_hGPR:qsub_2 |
| 0, // GPRnopc_and_hGPR:qsub_3 |
| 0, // GPRnopc_and_hGPR:ssub_0 |
| 0, // GPRnopc_and_hGPR:ssub_1 |
| 0, // GPRnopc_and_hGPR:ssub_2 |
| 0, // GPRnopc_and_hGPR:ssub_3 |
| 0, // GPRnopc_and_hGPR:ssub_4 |
| 0, // GPRnopc_and_hGPR:ssub_5 |
| 0, // GPRnopc_and_hGPR:ssub_6 |
| 0, // GPRnopc_and_hGPR:ssub_7 |
| 0, // GPRnopc_and_hGPR:ssub_8 |
| 0, // GPRnopc_and_hGPR:ssub_9 |
| 0, // GPRnopc_and_hGPR:ssub_10 |
| 0, // GPRnopc_and_hGPR:ssub_11 |
| 0, // GPRnopc_and_hGPR:ssub_12 |
| 0, // GPRnopc_and_hGPR:ssub_13 |
| 0, // GPRnopc_and_hGPR:ssub_14 |
| 0, // GPRnopc_and_hGPR:ssub_15 |
| 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc_and_hGPR:dsub_5_dsub_7 |
| 0, // GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_hGPR |
| 0, // GPRnosp_and_hGPR:dsub_0 |
| 0, // GPRnosp_and_hGPR:dsub_1 |
| 0, // GPRnosp_and_hGPR:dsub_2 |
| 0, // GPRnosp_and_hGPR:dsub_3 |
| 0, // GPRnosp_and_hGPR:dsub_4 |
| 0, // GPRnosp_and_hGPR:dsub_5 |
| 0, // GPRnosp_and_hGPR:dsub_6 |
| 0, // GPRnosp_and_hGPR:dsub_7 |
| 0, // GPRnosp_and_hGPR:gsub_0 |
| 0, // GPRnosp_and_hGPR:gsub_1 |
| 0, // GPRnosp_and_hGPR:qqsub_0 |
| 0, // GPRnosp_and_hGPR:qqsub_1 |
| 0, // GPRnosp_and_hGPR:qsub_0 |
| 0, // GPRnosp_and_hGPR:qsub_1 |
| 0, // GPRnosp_and_hGPR:qsub_2 |
| 0, // GPRnosp_and_hGPR:qsub_3 |
| 0, // GPRnosp_and_hGPR:ssub_0 |
| 0, // GPRnosp_and_hGPR:ssub_1 |
| 0, // GPRnosp_and_hGPR:ssub_2 |
| 0, // GPRnosp_and_hGPR:ssub_3 |
| 0, // GPRnosp_and_hGPR:ssub_4 |
| 0, // GPRnosp_and_hGPR:ssub_5 |
| 0, // GPRnosp_and_hGPR:ssub_6 |
| 0, // GPRnosp_and_hGPR:ssub_7 |
| 0, // GPRnosp_and_hGPR:ssub_8 |
| 0, // GPRnosp_and_hGPR:ssub_9 |
| 0, // GPRnosp_and_hGPR:ssub_10 |
| 0, // GPRnosp_and_hGPR:ssub_11 |
| 0, // GPRnosp_and_hGPR:ssub_12 |
| 0, // GPRnosp_and_hGPR:ssub_13 |
| 0, // GPRnosp_and_hGPR:ssub_14 |
| 0, // GPRnosp_and_hGPR:ssub_15 |
| 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_hGPR:dsub_5_dsub_7 |
| 0, // GPRnosp_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnosp_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_hGPR |
| 0, // GPRnoip_and_hGPR:dsub_0 |
| 0, // GPRnoip_and_hGPR:dsub_1 |
| 0, // GPRnoip_and_hGPR:dsub_2 |
| 0, // GPRnoip_and_hGPR:dsub_3 |
| 0, // GPRnoip_and_hGPR:dsub_4 |
| 0, // GPRnoip_and_hGPR:dsub_5 |
| 0, // GPRnoip_and_hGPR:dsub_6 |
| 0, // GPRnoip_and_hGPR:dsub_7 |
| 0, // GPRnoip_and_hGPR:gsub_0 |
| 0, // GPRnoip_and_hGPR:gsub_1 |
| 0, // GPRnoip_and_hGPR:qqsub_0 |
| 0, // GPRnoip_and_hGPR:qqsub_1 |
| 0, // GPRnoip_and_hGPR:qsub_0 |
| 0, // GPRnoip_and_hGPR:qsub_1 |
| 0, // GPRnoip_and_hGPR:qsub_2 |
| 0, // GPRnoip_and_hGPR:qsub_3 |
| 0, // GPRnoip_and_hGPR:ssub_0 |
| 0, // GPRnoip_and_hGPR:ssub_1 |
| 0, // GPRnoip_and_hGPR:ssub_2 |
| 0, // GPRnoip_and_hGPR:ssub_3 |
| 0, // GPRnoip_and_hGPR:ssub_4 |
| 0, // GPRnoip_and_hGPR:ssub_5 |
| 0, // GPRnoip_and_hGPR:ssub_6 |
| 0, // GPRnoip_and_hGPR:ssub_7 |
| 0, // GPRnoip_and_hGPR:ssub_8 |
| 0, // GPRnoip_and_hGPR:ssub_9 |
| 0, // GPRnoip_and_hGPR:ssub_10 |
| 0, // GPRnoip_and_hGPR:ssub_11 |
| 0, // GPRnoip_and_hGPR:ssub_12 |
| 0, // GPRnoip_and_hGPR:ssub_13 |
| 0, // GPRnoip_and_hGPR:ssub_14 |
| 0, // GPRnoip_and_hGPR:ssub_15 |
| 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 0, // GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_tGPREven |
| 0, // GPRnoip_and_tGPREven:dsub_0 |
| 0, // GPRnoip_and_tGPREven:dsub_1 |
| 0, // GPRnoip_and_tGPREven:dsub_2 |
| 0, // GPRnoip_and_tGPREven:dsub_3 |
| 0, // GPRnoip_and_tGPREven:dsub_4 |
| 0, // GPRnoip_and_tGPREven:dsub_5 |
| 0, // GPRnoip_and_tGPREven:dsub_6 |
| 0, // GPRnoip_and_tGPREven:dsub_7 |
| 0, // GPRnoip_and_tGPREven:gsub_0 |
| 0, // GPRnoip_and_tGPREven:gsub_1 |
| 0, // GPRnoip_and_tGPREven:qqsub_0 |
| 0, // GPRnoip_and_tGPREven:qqsub_1 |
| 0, // GPRnoip_and_tGPREven:qsub_0 |
| 0, // GPRnoip_and_tGPREven:qsub_1 |
| 0, // GPRnoip_and_tGPREven:qsub_2 |
| 0, // GPRnoip_and_tGPREven:qsub_3 |
| 0, // GPRnoip_and_tGPREven:ssub_0 |
| 0, // GPRnoip_and_tGPREven:ssub_1 |
| 0, // GPRnoip_and_tGPREven:ssub_2 |
| 0, // GPRnoip_and_tGPREven:ssub_3 |
| 0, // GPRnoip_and_tGPREven:ssub_4 |
| 0, // GPRnoip_and_tGPREven:ssub_5 |
| 0, // GPRnoip_and_tGPREven:ssub_6 |
| 0, // GPRnoip_and_tGPREven:ssub_7 |
| 0, // GPRnoip_and_tGPREven:ssub_8 |
| 0, // GPRnoip_and_tGPREven:ssub_9 |
| 0, // GPRnoip_and_tGPREven:ssub_10 |
| 0, // GPRnoip_and_tGPREven:ssub_11 |
| 0, // GPRnoip_and_tGPREven:ssub_12 |
| 0, // GPRnoip_and_tGPREven:ssub_13 |
| 0, // GPRnoip_and_tGPREven:ssub_14 |
| 0, // GPRnoip_and_tGPREven:ssub_15 |
| 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tGPREven:dsub_5_dsub_7 |
| 0, // GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_GPRnopc_and_hGPR |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_2 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_3 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_4 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_6 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:gsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:gsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:qqsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:qqsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_2 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:qsub_3 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_1 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_3 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_10 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_11 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_12 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_14 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_15 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPROdd |
| 0, // tGPROdd:dsub_0 |
| 0, // tGPROdd:dsub_1 |
| 0, // tGPROdd:dsub_2 |
| 0, // tGPROdd:dsub_3 |
| 0, // tGPROdd:dsub_4 |
| 0, // tGPROdd:dsub_5 |
| 0, // tGPROdd:dsub_6 |
| 0, // tGPROdd:dsub_7 |
| 0, // tGPROdd:gsub_0 |
| 0, // tGPROdd:gsub_1 |
| 0, // tGPROdd:qqsub_0 |
| 0, // tGPROdd:qqsub_1 |
| 0, // tGPROdd:qsub_0 |
| 0, // tGPROdd:qsub_1 |
| 0, // tGPROdd:qsub_2 |
| 0, // tGPROdd:qsub_3 |
| 0, // tGPROdd:ssub_0 |
| 0, // tGPROdd:ssub_1 |
| 0, // tGPROdd:ssub_2 |
| 0, // tGPROdd:ssub_3 |
| 0, // tGPROdd:ssub_4 |
| 0, // tGPROdd:ssub_5 |
| 0, // tGPROdd:ssub_6 |
| 0, // tGPROdd:ssub_7 |
| 0, // tGPROdd:ssub_8 |
| 0, // tGPROdd:ssub_9 |
| 0, // tGPROdd:ssub_10 |
| 0, // tGPROdd:ssub_11 |
| 0, // tGPROdd:ssub_12 |
| 0, // tGPROdd:ssub_13 |
| 0, // tGPROdd:ssub_14 |
| 0, // tGPROdd:ssub_15 |
| 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPROdd:ssub_6_ssub_7_dsub_5 |
| 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPROdd:dsub_5_dsub_7 |
| 0, // tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPROdd:dsub_5_ssub_12_ssub_13 |
| 0, // tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnopc_and_GPRnoip_and_hGPR |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_0 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_1 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_2 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_3 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_4 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_6 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:gsub_0 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:gsub_1 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:qqsub_0 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:qqsub_1 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_0 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_1 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_2 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:qsub_3 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_1 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_3 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_9 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_10 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_11 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_12 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_13 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_14 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_15 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_GPRnoip_and_hGPR |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_0 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_1 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_2 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_3 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_4 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_6 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:gsub_0 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:gsub_1 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:qqsub_0 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:qqsub_1 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_0 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_1 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_2 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:qsub_3 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_1 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_3 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_9 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_10 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_11 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_12 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_13 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_14 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_15 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tcGPR |
| 0, // tcGPR:dsub_0 |
| 0, // tcGPR:dsub_1 |
| 0, // tcGPR:dsub_2 |
| 0, // tcGPR:dsub_3 |
| 0, // tcGPR:dsub_4 |
| 0, // tcGPR:dsub_5 |
| 0, // tcGPR:dsub_6 |
| 0, // tcGPR:dsub_7 |
| 0, // tcGPR:gsub_0 |
| 0, // tcGPR:gsub_1 |
| 0, // tcGPR:qqsub_0 |
| 0, // tcGPR:qqsub_1 |
| 0, // tcGPR:qsub_0 |
| 0, // tcGPR:qsub_1 |
| 0, // tcGPR:qsub_2 |
| 0, // tcGPR:qsub_3 |
| 0, // tcGPR:ssub_0 |
| 0, // tcGPR:ssub_1 |
| 0, // tcGPR:ssub_2 |
| 0, // tcGPR:ssub_3 |
| 0, // tcGPR:ssub_4 |
| 0, // tcGPR:ssub_5 |
| 0, // tcGPR:ssub_6 |
| 0, // tcGPR:ssub_7 |
| 0, // tcGPR:ssub_8 |
| 0, // tcGPR:ssub_9 |
| 0, // tcGPR:ssub_10 |
| 0, // tcGPR:ssub_11 |
| 0, // tcGPR:ssub_12 |
| 0, // tcGPR:ssub_13 |
| 0, // tcGPR:ssub_14 |
| 0, // tcGPR:ssub_15 |
| 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tcGPR:dsub_5_dsub_7 |
| 0, // tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnoip_and_tcGPR |
| 0, // GPRnoip_and_tcGPR:dsub_0 |
| 0, // GPRnoip_and_tcGPR:dsub_1 |
| 0, // GPRnoip_and_tcGPR:dsub_2 |
| 0, // GPRnoip_and_tcGPR:dsub_3 |
| 0, // GPRnoip_and_tcGPR:dsub_4 |
| 0, // GPRnoip_and_tcGPR:dsub_5 |
| 0, // GPRnoip_and_tcGPR:dsub_6 |
| 0, // GPRnoip_and_tcGPR:dsub_7 |
| 0, // GPRnoip_and_tcGPR:gsub_0 |
| 0, // GPRnoip_and_tcGPR:gsub_1 |
| 0, // GPRnoip_and_tcGPR:qqsub_0 |
| 0, // GPRnoip_and_tcGPR:qqsub_1 |
| 0, // GPRnoip_and_tcGPR:qsub_0 |
| 0, // GPRnoip_and_tcGPR:qsub_1 |
| 0, // GPRnoip_and_tcGPR:qsub_2 |
| 0, // GPRnoip_and_tcGPR:qsub_3 |
| 0, // GPRnoip_and_tcGPR:ssub_0 |
| 0, // GPRnoip_and_tcGPR:ssub_1 |
| 0, // GPRnoip_and_tcGPR:ssub_2 |
| 0, // GPRnoip_and_tcGPR:ssub_3 |
| 0, // GPRnoip_and_tcGPR:ssub_4 |
| 0, // GPRnoip_and_tcGPR:ssub_5 |
| 0, // GPRnoip_and_tcGPR:ssub_6 |
| 0, // GPRnoip_and_tcGPR:ssub_7 |
| 0, // GPRnoip_and_tcGPR:ssub_8 |
| 0, // GPRnoip_and_tcGPR:ssub_9 |
| 0, // GPRnoip_and_tcGPR:ssub_10 |
| 0, // GPRnoip_and_tcGPR:ssub_11 |
| 0, // GPRnoip_and_tcGPR:ssub_12 |
| 0, // GPRnoip_and_tcGPR:ssub_13 |
| 0, // GPRnoip_and_tcGPR:ssub_14 |
| 0, // GPRnoip_and_tcGPR:ssub_15 |
| 0, // GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnoip_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnoip_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnoip_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnoip_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tcGPR:dsub_5_dsub_7 |
| 0, // GPRnoip_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnoip_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_2 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_3 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_4 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_6 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:gsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:gsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qqsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qqsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_0 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_1 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_2 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:qsub_3 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_1 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_3 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_10 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_11 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_12 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_14 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_15 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tGPREven |
| 0, // hGPR_and_tGPREven:dsub_0 |
| 0, // hGPR_and_tGPREven:dsub_1 |
| 0, // hGPR_and_tGPREven:dsub_2 |
| 0, // hGPR_and_tGPREven:dsub_3 |
| 0, // hGPR_and_tGPREven:dsub_4 |
| 0, // hGPR_and_tGPREven:dsub_5 |
| 0, // hGPR_and_tGPREven:dsub_6 |
| 0, // hGPR_and_tGPREven:dsub_7 |
| 0, // hGPR_and_tGPREven:gsub_0 |
| 0, // hGPR_and_tGPREven:gsub_1 |
| 0, // hGPR_and_tGPREven:qqsub_0 |
| 0, // hGPR_and_tGPREven:qqsub_1 |
| 0, // hGPR_and_tGPREven:qsub_0 |
| 0, // hGPR_and_tGPREven:qsub_1 |
| 0, // hGPR_and_tGPREven:qsub_2 |
| 0, // hGPR_and_tGPREven:qsub_3 |
| 0, // hGPR_and_tGPREven:ssub_0 |
| 0, // hGPR_and_tGPREven:ssub_1 |
| 0, // hGPR_and_tGPREven:ssub_2 |
| 0, // hGPR_and_tGPREven:ssub_3 |
| 0, // hGPR_and_tGPREven:ssub_4 |
| 0, // hGPR_and_tGPREven:ssub_5 |
| 0, // hGPR_and_tGPREven:ssub_6 |
| 0, // hGPR_and_tGPREven:ssub_7 |
| 0, // hGPR_and_tGPREven:ssub_8 |
| 0, // hGPR_and_tGPREven:ssub_9 |
| 0, // hGPR_and_tGPREven:ssub_10 |
| 0, // hGPR_and_tGPREven:ssub_11 |
| 0, // hGPR_and_tGPREven:ssub_12 |
| 0, // hGPR_and_tGPREven:ssub_13 |
| 0, // hGPR_and_tGPREven:ssub_14 |
| 0, // hGPR_and_tGPREven:ssub_15 |
| 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // hGPR_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPREven:dsub_5_dsub_7 |
| 0, // hGPR_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // hGPR_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPR_and_tGPREven |
| 0, // tGPR_and_tGPREven:dsub_0 |
| 0, // tGPR_and_tGPREven:dsub_1 |
| 0, // tGPR_and_tGPREven:dsub_2 |
| 0, // tGPR_and_tGPREven:dsub_3 |
| 0, // tGPR_and_tGPREven:dsub_4 |
| 0, // tGPR_and_tGPREven:dsub_5 |
| 0, // tGPR_and_tGPREven:dsub_6 |
| 0, // tGPR_and_tGPREven:dsub_7 |
| 0, // tGPR_and_tGPREven:gsub_0 |
| 0, // tGPR_and_tGPREven:gsub_1 |
| 0, // tGPR_and_tGPREven:qqsub_0 |
| 0, // tGPR_and_tGPREven:qqsub_1 |
| 0, // tGPR_and_tGPREven:qsub_0 |
| 0, // tGPR_and_tGPREven:qsub_1 |
| 0, // tGPR_and_tGPREven:qsub_2 |
| 0, // tGPR_and_tGPREven:qsub_3 |
| 0, // tGPR_and_tGPREven:ssub_0 |
| 0, // tGPR_and_tGPREven:ssub_1 |
| 0, // tGPR_and_tGPREven:ssub_2 |
| 0, // tGPR_and_tGPREven:ssub_3 |
| 0, // tGPR_and_tGPREven:ssub_4 |
| 0, // tGPR_and_tGPREven:ssub_5 |
| 0, // tGPR_and_tGPREven:ssub_6 |
| 0, // tGPR_and_tGPREven:ssub_7 |
| 0, // tGPR_and_tGPREven:ssub_8 |
| 0, // tGPR_and_tGPREven:ssub_9 |
| 0, // tGPR_and_tGPREven:ssub_10 |
| 0, // tGPR_and_tGPREven:ssub_11 |
| 0, // tGPR_and_tGPREven:ssub_12 |
| 0, // tGPR_and_tGPREven:ssub_13 |
| 0, // tGPR_and_tGPREven:ssub_14 |
| 0, // tGPR_and_tGPREven:ssub_15 |
| 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPR_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPR_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPREven:dsub_5_dsub_7 |
| 0, // tGPR_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPR_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPR_and_tGPROdd |
| 0, // tGPR_and_tGPROdd:dsub_0 |
| 0, // tGPR_and_tGPROdd:dsub_1 |
| 0, // tGPR_and_tGPROdd:dsub_2 |
| 0, // tGPR_and_tGPROdd:dsub_3 |
| 0, // tGPR_and_tGPROdd:dsub_4 |
| 0, // tGPR_and_tGPROdd:dsub_5 |
| 0, // tGPR_and_tGPROdd:dsub_6 |
| 0, // tGPR_and_tGPROdd:dsub_7 |
| 0, // tGPR_and_tGPROdd:gsub_0 |
| 0, // tGPR_and_tGPROdd:gsub_1 |
| 0, // tGPR_and_tGPROdd:qqsub_0 |
| 0, // tGPR_and_tGPROdd:qqsub_1 |
| 0, // tGPR_and_tGPROdd:qsub_0 |
| 0, // tGPR_and_tGPROdd:qsub_1 |
| 0, // tGPR_and_tGPROdd:qsub_2 |
| 0, // tGPR_and_tGPROdd:qsub_3 |
| 0, // tGPR_and_tGPROdd:ssub_0 |
| 0, // tGPR_and_tGPROdd:ssub_1 |
| 0, // tGPR_and_tGPROdd:ssub_2 |
| 0, // tGPR_and_tGPROdd:ssub_3 |
| 0, // tGPR_and_tGPROdd:ssub_4 |
| 0, // tGPR_and_tGPROdd:ssub_5 |
| 0, // tGPR_and_tGPROdd:ssub_6 |
| 0, // tGPR_and_tGPROdd:ssub_7 |
| 0, // tGPR_and_tGPROdd:ssub_8 |
| 0, // tGPR_and_tGPROdd:ssub_9 |
| 0, // tGPR_and_tGPROdd:ssub_10 |
| 0, // tGPR_and_tGPROdd:ssub_11 |
| 0, // tGPR_and_tGPROdd:ssub_12 |
| 0, // tGPR_and_tGPROdd:ssub_13 |
| 0, // tGPR_and_tGPROdd:ssub_14 |
| 0, // tGPR_and_tGPROdd:ssub_15 |
| 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5 |
| 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPROdd:dsub_5_dsub_7 |
| 0, // tGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13 |
| 0, // tGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPREven_and_tcGPR |
| 0, // tGPREven_and_tcGPR:dsub_0 |
| 0, // tGPREven_and_tcGPR:dsub_1 |
| 0, // tGPREven_and_tcGPR:dsub_2 |
| 0, // tGPREven_and_tcGPR:dsub_3 |
| 0, // tGPREven_and_tcGPR:dsub_4 |
| 0, // tGPREven_and_tcGPR:dsub_5 |
| 0, // tGPREven_and_tcGPR:dsub_6 |
| 0, // tGPREven_and_tcGPR:dsub_7 |
| 0, // tGPREven_and_tcGPR:gsub_0 |
| 0, // tGPREven_and_tcGPR:gsub_1 |
| 0, // tGPREven_and_tcGPR:qqsub_0 |
| 0, // tGPREven_and_tcGPR:qqsub_1 |
| 0, // tGPREven_and_tcGPR:qsub_0 |
| 0, // tGPREven_and_tcGPR:qsub_1 |
| 0, // tGPREven_and_tcGPR:qsub_2 |
| 0, // tGPREven_and_tcGPR:qsub_3 |
| 0, // tGPREven_and_tcGPR:ssub_0 |
| 0, // tGPREven_and_tcGPR:ssub_1 |
| 0, // tGPREven_and_tcGPR:ssub_2 |
| 0, // tGPREven_and_tcGPR:ssub_3 |
| 0, // tGPREven_and_tcGPR:ssub_4 |
| 0, // tGPREven_and_tcGPR:ssub_5 |
| 0, // tGPREven_and_tcGPR:ssub_6 |
| 0, // tGPREven_and_tcGPR:ssub_7 |
| 0, // tGPREven_and_tcGPR:ssub_8 |
| 0, // tGPREven_and_tcGPR:ssub_9 |
| 0, // tGPREven_and_tcGPR:ssub_10 |
| 0, // tGPREven_and_tcGPR:ssub_11 |
| 0, // tGPREven_and_tcGPR:ssub_12 |
| 0, // tGPREven_and_tcGPR:ssub_13 |
| 0, // tGPREven_and_tcGPR:ssub_14 |
| 0, // tGPREven_and_tcGPR:ssub_15 |
| 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPREven_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPREven_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven_and_tcGPR:dsub_5_dsub_7 |
| 0, // tGPREven_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPREven_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_GPRnoip_and_tGPREven |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_0 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_1 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_2 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_3 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_4 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_6 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:gsub_0 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:gsub_1 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:qqsub_0 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:qqsub_1 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_0 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_1 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_2 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:qsub_3 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_1 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_3 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_9 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_10 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_11 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_12 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_13 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_14 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_15 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_dsub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_GPRnoip_and_tGPREven:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tGPROdd |
| 0, // hGPR_and_tGPROdd:dsub_0 |
| 0, // hGPR_and_tGPROdd:dsub_1 |
| 0, // hGPR_and_tGPROdd:dsub_2 |
| 0, // hGPR_and_tGPROdd:dsub_3 |
| 0, // hGPR_and_tGPROdd:dsub_4 |
| 0, // hGPR_and_tGPROdd:dsub_5 |
| 0, // hGPR_and_tGPROdd:dsub_6 |
| 0, // hGPR_and_tGPROdd:dsub_7 |
| 0, // hGPR_and_tGPROdd:gsub_0 |
| 0, // hGPR_and_tGPROdd:gsub_1 |
| 0, // hGPR_and_tGPROdd:qqsub_0 |
| 0, // hGPR_and_tGPROdd:qqsub_1 |
| 0, // hGPR_and_tGPROdd:qsub_0 |
| 0, // hGPR_and_tGPROdd:qsub_1 |
| 0, // hGPR_and_tGPROdd:qsub_2 |
| 0, // hGPR_and_tGPROdd:qsub_3 |
| 0, // hGPR_and_tGPROdd:ssub_0 |
| 0, // hGPR_and_tGPROdd:ssub_1 |
| 0, // hGPR_and_tGPROdd:ssub_2 |
| 0, // hGPR_and_tGPROdd:ssub_3 |
| 0, // hGPR_and_tGPROdd:ssub_4 |
| 0, // hGPR_and_tGPROdd:ssub_5 |
| 0, // hGPR_and_tGPROdd:ssub_6 |
| 0, // hGPR_and_tGPROdd:ssub_7 |
| 0, // hGPR_and_tGPROdd:ssub_8 |
| 0, // hGPR_and_tGPROdd:ssub_9 |
| 0, // hGPR_and_tGPROdd:ssub_10 |
| 0, // hGPR_and_tGPROdd:ssub_11 |
| 0, // hGPR_and_tGPROdd:ssub_12 |
| 0, // hGPR_and_tGPROdd:ssub_13 |
| 0, // hGPR_and_tGPROdd:ssub_14 |
| 0, // hGPR_and_tGPROdd:ssub_15 |
| 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPROdd:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tGPROdd:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPROdd:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPROdd:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPROdd:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPROdd:dsub_5_dsub_7 |
| 0, // hGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // hGPR_and_tGPROdd:dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPROdd:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPREven_and_GPRnoip_and_tcGPR |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_0 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_1 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_2 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_3 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_4 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_6 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:gsub_0 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:gsub_1 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:qqsub_0 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:qqsub_1 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:qsub_0 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:qsub_1 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:qsub_2 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:qsub_3 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_0 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_1 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_2 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_3 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_4 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_6 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_8 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_9 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_10 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_11 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_12 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_13 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_14 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_15 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_5_dsub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // tGPREven_and_GPRnoip_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // tGPROdd_and_tcGPR |
| 0, // tGPROdd_and_tcGPR:dsub_0 |
| 0, // tGPROdd_and_tcGPR:dsub_1 |
| 0, // tGPROdd_and_tcGPR:dsub_2 |
| 0, // tGPROdd_and_tcGPR:dsub_3 |
| 0, // tGPROdd_and_tcGPR:dsub_4 |
| 0, // tGPROdd_and_tcGPR:dsub_5 |
| 0, // tGPROdd_and_tcGPR:dsub_6 |
| 0, // tGPROdd_and_tcGPR:dsub_7 |
| 0, // tGPROdd_and_tcGPR:gsub_0 |
| 0, // tGPROdd_and_tcGPR:gsub_1 |
| 0, // tGPROdd_and_tcGPR:qqsub_0 |
| 0, // tGPROdd_and_tcGPR:qqsub_1 |
| 0, // tGPROdd_and_tcGPR:qsub_0 |
| 0, // tGPROdd_and_tcGPR:qsub_1 |
| 0, // tGPROdd_and_tcGPR:qsub_2 |
| 0, // tGPROdd_and_tcGPR:qsub_3 |
| 0, // tGPROdd_and_tcGPR:ssub_0 |
| 0, // tGPROdd_and_tcGPR:ssub_1 |
| 0, // tGPROdd_and_tcGPR:ssub_2 |
| 0, // tGPROdd_and_tcGPR:ssub_3 |
| 0, // tGPROdd_and_tcGPR:ssub_4 |
| 0, // tGPROdd_and_tcGPR:ssub_5 |
| 0, // tGPROdd_and_tcGPR:ssub_6 |
| 0, // tGPROdd_and_tcGPR:ssub_7 |
| 0, // tGPROdd_and_tcGPR:ssub_8 |
| 0, // tGPROdd_and_tcGPR:ssub_9 |
| 0, // tGPROdd_and_tcGPR:ssub_10 |
| 0, // tGPROdd_and_tcGPR:ssub_11 |
| 0, // tGPROdd_and_tcGPR:ssub_12 |
| 0, // tGPROdd_and_tcGPR:ssub_13 |
| 0, // tGPROdd_and_tcGPR:ssub_14 |
| 0, // tGPROdd_and_tcGPR:ssub_15 |
| 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPROdd_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPROdd_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // tGPROdd_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPROdd_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // tGPROdd_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // tGPROdd_and_tcGPR:dsub_5_dsub_7 |
| 0, // tGPROdd_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // tGPROdd_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // tGPROdd_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // CCR |
| 0, // CCR:dsub_0 |
| 0, // CCR:dsub_1 |
| 0, // CCR:dsub_2 |
| 0, // CCR:dsub_3 |
| 0, // CCR:dsub_4 |
| 0, // CCR:dsub_5 |
| 0, // CCR:dsub_6 |
| 0, // CCR:dsub_7 |
| 0, // CCR:gsub_0 |
| 0, // CCR:gsub_1 |
| 0, // CCR:qqsub_0 |
| 0, // CCR:qqsub_1 |
| 0, // CCR:qsub_0 |
| 0, // CCR:qsub_1 |
| 0, // CCR:qsub_2 |
| 0, // CCR:qsub_3 |
| 0, // CCR:ssub_0 |
| 0, // CCR:ssub_1 |
| 0, // CCR:ssub_2 |
| 0, // CCR:ssub_3 |
| 0, // CCR:ssub_4 |
| 0, // CCR:ssub_5 |
| 0, // CCR:ssub_6 |
| 0, // CCR:ssub_7 |
| 0, // CCR:ssub_8 |
| 0, // CCR:ssub_9 |
| 0, // CCR:ssub_10 |
| 0, // CCR:ssub_11 |
| 0, // CCR:ssub_12 |
| 0, // CCR:ssub_13 |
| 0, // CCR:ssub_14 |
| 0, // CCR:ssub_15 |
| 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // CCR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // CCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // CCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // CCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // CCR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // CCR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // CCR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // CCR:ssub_6_ssub_7_dsub_5 |
| 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // CCR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // CCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // CCR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // CCR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // CCR:dsub_5_dsub_7 |
| 0, // CCR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // CCR:dsub_5_ssub_12_ssub_13 |
| 0, // CCR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // FPCXTRegs |
| 0, // FPCXTRegs:dsub_0 |
| 0, // FPCXTRegs:dsub_1 |
| 0, // FPCXTRegs:dsub_2 |
| 0, // FPCXTRegs:dsub_3 |
| 0, // FPCXTRegs:dsub_4 |
| 0, // FPCXTRegs:dsub_5 |
| 0, // FPCXTRegs:dsub_6 |
| 0, // FPCXTRegs:dsub_7 |
| 0, // FPCXTRegs:gsub_0 |
| 0, // FPCXTRegs:gsub_1 |
| 0, // FPCXTRegs:qqsub_0 |
| 0, // FPCXTRegs:qqsub_1 |
| 0, // FPCXTRegs:qsub_0 |
| 0, // FPCXTRegs:qsub_1 |
| 0, // FPCXTRegs:qsub_2 |
| 0, // FPCXTRegs:qsub_3 |
| 0, // FPCXTRegs:ssub_0 |
| 0, // FPCXTRegs:ssub_1 |
| 0, // FPCXTRegs:ssub_2 |
| 0, // FPCXTRegs:ssub_3 |
| 0, // FPCXTRegs:ssub_4 |
| 0, // FPCXTRegs:ssub_5 |
| 0, // FPCXTRegs:ssub_6 |
| 0, // FPCXTRegs:ssub_7 |
| 0, // FPCXTRegs:ssub_8 |
| 0, // FPCXTRegs:ssub_9 |
| 0, // FPCXTRegs:ssub_10 |
| 0, // FPCXTRegs:ssub_11 |
| 0, // FPCXTRegs:ssub_12 |
| 0, // FPCXTRegs:ssub_13 |
| 0, // FPCXTRegs:ssub_14 |
| 0, // FPCXTRegs:ssub_15 |
| 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // FPCXTRegs:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPCXTRegs:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // FPCXTRegs:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPCXTRegs:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPCXTRegs:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // FPCXTRegs:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPCXTRegs:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPCXTRegs:ssub_6_ssub_7_dsub_5 |
| 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // FPCXTRegs:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // FPCXTRegs:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPCXTRegs:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // FPCXTRegs:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // FPCXTRegs:dsub_5_dsub_7 |
| 0, // FPCXTRegs:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // FPCXTRegs:dsub_5_ssub_12_ssub_13 |
| 0, // FPCXTRegs:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRlr |
| 0, // GPRlr:dsub_0 |
| 0, // GPRlr:dsub_1 |
| 0, // GPRlr:dsub_2 |
| 0, // GPRlr:dsub_3 |
| 0, // GPRlr:dsub_4 |
| 0, // GPRlr:dsub_5 |
| 0, // GPRlr:dsub_6 |
| 0, // GPRlr:dsub_7 |
| 0, // GPRlr:gsub_0 |
| 0, // GPRlr:gsub_1 |
| 0, // GPRlr:qqsub_0 |
| 0, // GPRlr:qqsub_1 |
| 0, // GPRlr:qsub_0 |
| 0, // GPRlr:qsub_1 |
| 0, // GPRlr:qsub_2 |
| 0, // GPRlr:qsub_3 |
| 0, // GPRlr:ssub_0 |
| 0, // GPRlr:ssub_1 |
| 0, // GPRlr:ssub_2 |
| 0, // GPRlr:ssub_3 |
| 0, // GPRlr:ssub_4 |
| 0, // GPRlr:ssub_5 |
| 0, // GPRlr:ssub_6 |
| 0, // GPRlr:ssub_7 |
| 0, // GPRlr:ssub_8 |
| 0, // GPRlr:ssub_9 |
| 0, // GPRlr:ssub_10 |
| 0, // GPRlr:ssub_11 |
| 0, // GPRlr:ssub_12 |
| 0, // GPRlr:ssub_13 |
| 0, // GPRlr:ssub_14 |
| 0, // GPRlr:ssub_15 |
| 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRlr:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRlr:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRlr:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRlr:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRlr:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRlr:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRlr:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRlr:ssub_6_ssub_7_dsub_5 |
| 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRlr:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRlr:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRlr:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRlr:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRlr:dsub_5_dsub_7 |
| 0, // GPRlr:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRlr:dsub_5_ssub_12_ssub_13 |
| 0, // GPRlr:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRsp |
| 0, // GPRsp:dsub_0 |
| 0, // GPRsp:dsub_1 |
| 0, // GPRsp:dsub_2 |
| 0, // GPRsp:dsub_3 |
| 0, // GPRsp:dsub_4 |
| 0, // GPRsp:dsub_5 |
| 0, // GPRsp:dsub_6 |
| 0, // GPRsp:dsub_7 |
| 0, // GPRsp:gsub_0 |
| 0, // GPRsp:gsub_1 |
| 0, // GPRsp:qqsub_0 |
| 0, // GPRsp:qqsub_1 |
| 0, // GPRsp:qsub_0 |
| 0, // GPRsp:qsub_1 |
| 0, // GPRsp:qsub_2 |
| 0, // GPRsp:qsub_3 |
| 0, // GPRsp:ssub_0 |
| 0, // GPRsp:ssub_1 |
| 0, // GPRsp:ssub_2 |
| 0, // GPRsp:ssub_3 |
| 0, // GPRsp:ssub_4 |
| 0, // GPRsp:ssub_5 |
| 0, // GPRsp:ssub_6 |
| 0, // GPRsp:ssub_7 |
| 0, // GPRsp:ssub_8 |
| 0, // GPRsp:ssub_9 |
| 0, // GPRsp:ssub_10 |
| 0, // GPRsp:ssub_11 |
| 0, // GPRsp:ssub_12 |
| 0, // GPRsp:ssub_13 |
| 0, // GPRsp:ssub_14 |
| 0, // GPRsp:ssub_15 |
| 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRsp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRsp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRsp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRsp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRsp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRsp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRsp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRsp:dsub_5_dsub_7 |
| 0, // GPRsp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRsp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // VCCR |
| 0, // VCCR:dsub_0 |
| 0, // VCCR:dsub_1 |
| 0, // VCCR:dsub_2 |
| 0, // VCCR:dsub_3 |
| 0, // VCCR:dsub_4 |
| 0, // VCCR:dsub_5 |
| 0, // VCCR:dsub_6 |
| 0, // VCCR:dsub_7 |
| 0, // VCCR:gsub_0 |
| 0, // VCCR:gsub_1 |
| 0, // VCCR:qqsub_0 |
| 0, // VCCR:qqsub_1 |
| 0, // VCCR:qsub_0 |
| 0, // VCCR:qsub_1 |
| 0, // VCCR:qsub_2 |
| 0, // VCCR:qsub_3 |
| 0, // VCCR:ssub_0 |
| 0, // VCCR:ssub_1 |
| 0, // VCCR:ssub_2 |
| 0, // VCCR:ssub_3 |
| 0, // VCCR:ssub_4 |
| 0, // VCCR:ssub_5 |
| 0, // VCCR:ssub_6 |
| 0, // VCCR:ssub_7 |
| 0, // VCCR:ssub_8 |
| 0, // VCCR:ssub_9 |
| 0, // VCCR:ssub_10 |
| 0, // VCCR:ssub_11 |
| 0, // VCCR:ssub_12 |
| 0, // VCCR:ssub_13 |
| 0, // VCCR:ssub_14 |
| 0, // VCCR:ssub_15 |
| 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // VCCR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // VCCR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // VCCR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // VCCR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // VCCR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // VCCR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // VCCR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // VCCR:ssub_6_ssub_7_dsub_5 |
| 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // VCCR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // VCCR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // VCCR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // VCCR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // VCCR:dsub_5_dsub_7 |
| 0, // VCCR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // VCCR:dsub_5_ssub_12_ssub_13 |
| 0, // VCCR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // cl_FPSCR_NZCV |
| 0, // cl_FPSCR_NZCV:dsub_0 |
| 0, // cl_FPSCR_NZCV:dsub_1 |
| 0, // cl_FPSCR_NZCV:dsub_2 |
| 0, // cl_FPSCR_NZCV:dsub_3 |
| 0, // cl_FPSCR_NZCV:dsub_4 |
| 0, // cl_FPSCR_NZCV:dsub_5 |
| 0, // cl_FPSCR_NZCV:dsub_6 |
| 0, // cl_FPSCR_NZCV:dsub_7 |
| 0, // cl_FPSCR_NZCV:gsub_0 |
| 0, // cl_FPSCR_NZCV:gsub_1 |
| 0, // cl_FPSCR_NZCV:qqsub_0 |
| 0, // cl_FPSCR_NZCV:qqsub_1 |
| 0, // cl_FPSCR_NZCV:qsub_0 |
| 0, // cl_FPSCR_NZCV:qsub_1 |
| 0, // cl_FPSCR_NZCV:qsub_2 |
| 0, // cl_FPSCR_NZCV:qsub_3 |
| 0, // cl_FPSCR_NZCV:ssub_0 |
| 0, // cl_FPSCR_NZCV:ssub_1 |
| 0, // cl_FPSCR_NZCV:ssub_2 |
| 0, // cl_FPSCR_NZCV:ssub_3 |
| 0, // cl_FPSCR_NZCV:ssub_4 |
| 0, // cl_FPSCR_NZCV:ssub_5 |
| 0, // cl_FPSCR_NZCV:ssub_6 |
| 0, // cl_FPSCR_NZCV:ssub_7 |
| 0, // cl_FPSCR_NZCV:ssub_8 |
| 0, // cl_FPSCR_NZCV:ssub_9 |
| 0, // cl_FPSCR_NZCV:ssub_10 |
| 0, // cl_FPSCR_NZCV:ssub_11 |
| 0, // cl_FPSCR_NZCV:ssub_12 |
| 0, // cl_FPSCR_NZCV:ssub_13 |
| 0, // cl_FPSCR_NZCV:ssub_14 |
| 0, // cl_FPSCR_NZCV:ssub_15 |
| 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // cl_FPSCR_NZCV:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // cl_FPSCR_NZCV:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_dsub_5 |
| 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // cl_FPSCR_NZCV:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // cl_FPSCR_NZCV:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // cl_FPSCR_NZCV:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // cl_FPSCR_NZCV:dsub_5_dsub_7 |
| 0, // cl_FPSCR_NZCV:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // cl_FPSCR_NZCV:dsub_5_ssub_12_ssub_13 |
| 0, // cl_FPSCR_NZCV:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tGPRwithpc |
| 0, // hGPR_and_tGPRwithpc:dsub_0 |
| 0, // hGPR_and_tGPRwithpc:dsub_1 |
| 0, // hGPR_and_tGPRwithpc:dsub_2 |
| 0, // hGPR_and_tGPRwithpc:dsub_3 |
| 0, // hGPR_and_tGPRwithpc:dsub_4 |
| 0, // hGPR_and_tGPRwithpc:dsub_5 |
| 0, // hGPR_and_tGPRwithpc:dsub_6 |
| 0, // hGPR_and_tGPRwithpc:dsub_7 |
| 0, // hGPR_and_tGPRwithpc:gsub_0 |
| 0, // hGPR_and_tGPRwithpc:gsub_1 |
| 0, // hGPR_and_tGPRwithpc:qqsub_0 |
| 0, // hGPR_and_tGPRwithpc:qqsub_1 |
| 0, // hGPR_and_tGPRwithpc:qsub_0 |
| 0, // hGPR_and_tGPRwithpc:qsub_1 |
| 0, // hGPR_and_tGPRwithpc:qsub_2 |
| 0, // hGPR_and_tGPRwithpc:qsub_3 |
| 0, // hGPR_and_tGPRwithpc:ssub_0 |
| 0, // hGPR_and_tGPRwithpc:ssub_1 |
| 0, // hGPR_and_tGPRwithpc:ssub_2 |
| 0, // hGPR_and_tGPRwithpc:ssub_3 |
| 0, // hGPR_and_tGPRwithpc:ssub_4 |
| 0, // hGPR_and_tGPRwithpc:ssub_5 |
| 0, // hGPR_and_tGPRwithpc:ssub_6 |
| 0, // hGPR_and_tGPRwithpc:ssub_7 |
| 0, // hGPR_and_tGPRwithpc:ssub_8 |
| 0, // hGPR_and_tGPRwithpc:ssub_9 |
| 0, // hGPR_and_tGPRwithpc:ssub_10 |
| 0, // hGPR_and_tGPRwithpc:ssub_11 |
| 0, // hGPR_and_tGPRwithpc:ssub_12 |
| 0, // hGPR_and_tGPRwithpc:ssub_13 |
| 0, // hGPR_and_tGPRwithpc:ssub_14 |
| 0, // hGPR_and_tGPRwithpc:ssub_15 |
| 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPRwithpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tGPRwithpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tGPRwithpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPRwithpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPRwithpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPRwithpc:dsub_5_dsub_7 |
| 0, // hGPR_and_tGPRwithpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // hGPR_and_tGPRwithpc:dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tGPRwithpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // hGPR_and_tcGPR |
| 0, // hGPR_and_tcGPR:dsub_0 |
| 0, // hGPR_and_tcGPR:dsub_1 |
| 0, // hGPR_and_tcGPR:dsub_2 |
| 0, // hGPR_and_tcGPR:dsub_3 |
| 0, // hGPR_and_tcGPR:dsub_4 |
| 0, // hGPR_and_tcGPR:dsub_5 |
| 0, // hGPR_and_tcGPR:dsub_6 |
| 0, // hGPR_and_tcGPR:dsub_7 |
| 0, // hGPR_and_tcGPR:gsub_0 |
| 0, // hGPR_and_tcGPR:gsub_1 |
| 0, // hGPR_and_tcGPR:qqsub_0 |
| 0, // hGPR_and_tcGPR:qqsub_1 |
| 0, // hGPR_and_tcGPR:qsub_0 |
| 0, // hGPR_and_tcGPR:qsub_1 |
| 0, // hGPR_and_tcGPR:qsub_2 |
| 0, // hGPR_and_tcGPR:qsub_3 |
| 0, // hGPR_and_tcGPR:ssub_0 |
| 0, // hGPR_and_tcGPR:ssub_1 |
| 0, // hGPR_and_tcGPR:ssub_2 |
| 0, // hGPR_and_tcGPR:ssub_3 |
| 0, // hGPR_and_tcGPR:ssub_4 |
| 0, // hGPR_and_tcGPR:ssub_5 |
| 0, // hGPR_and_tcGPR:ssub_6 |
| 0, // hGPR_and_tcGPR:ssub_7 |
| 0, // hGPR_and_tcGPR:ssub_8 |
| 0, // hGPR_and_tcGPR:ssub_9 |
| 0, // hGPR_and_tcGPR:ssub_10 |
| 0, // hGPR_and_tcGPR:ssub_11 |
| 0, // hGPR_and_tcGPR:ssub_12 |
| 0, // hGPR_and_tcGPR:ssub_13 |
| 0, // hGPR_and_tcGPR:ssub_14 |
| 0, // hGPR_and_tcGPR:ssub_15 |
| 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // hGPR_and_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // hGPR_and_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // hGPR_and_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tcGPR:dsub_5_dsub_7 |
| 0, // hGPR_and_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // hGPR_and_tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // hGPR_and_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPR |
| 0, // DPR:dsub_0 |
| 0, // DPR:dsub_1 |
| 0, // DPR:dsub_2 |
| 0, // DPR:dsub_3 |
| 0, // DPR:dsub_4 |
| 0, // DPR:dsub_5 |
| 0, // DPR:dsub_6 |
| 0, // DPR:dsub_7 |
| 0, // DPR:gsub_0 |
| 0, // DPR:gsub_1 |
| 0, // DPR:qqsub_0 |
| 0, // DPR:qqsub_1 |
| 0, // DPR:qsub_0 |
| 0, // DPR:qsub_1 |
| 0, // DPR:qsub_2 |
| 0, // DPR:qsub_3 |
| 3, // DPR:ssub_0 -> SPR |
| 3, // DPR:ssub_1 -> SPR |
| 0, // DPR:ssub_2 |
| 0, // DPR:ssub_3 |
| 0, // DPR:ssub_4 |
| 0, // DPR:ssub_5 |
| 0, // DPR:ssub_6 |
| 0, // DPR:ssub_7 |
| 0, // DPR:ssub_8 |
| 0, // DPR:ssub_9 |
| 0, // DPR:ssub_10 |
| 0, // DPR:ssub_11 |
| 0, // DPR:ssub_12 |
| 0, // DPR:ssub_13 |
| 0, // DPR:ssub_14 |
| 0, // DPR:ssub_15 |
| 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR:ssub_6_ssub_7_dsub_5 |
| 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPR:dsub_5_dsub_7 |
| 0, // DPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPR:dsub_5_ssub_12_ssub_13 |
| 0, // DPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPR_VFP2 |
| 0, // DPR_VFP2:dsub_0 |
| 0, // DPR_VFP2:dsub_1 |
| 0, // DPR_VFP2:dsub_2 |
| 0, // DPR_VFP2:dsub_3 |
| 0, // DPR_VFP2:dsub_4 |
| 0, // DPR_VFP2:dsub_5 |
| 0, // DPR_VFP2:dsub_6 |
| 0, // DPR_VFP2:dsub_7 |
| 0, // DPR_VFP2:gsub_0 |
| 0, // DPR_VFP2:gsub_1 |
| 0, // DPR_VFP2:qqsub_0 |
| 0, // DPR_VFP2:qqsub_1 |
| 0, // DPR_VFP2:qsub_0 |
| 0, // DPR_VFP2:qsub_1 |
| 0, // DPR_VFP2:qsub_2 |
| 0, // DPR_VFP2:qsub_3 |
| 3, // DPR_VFP2:ssub_0 -> SPR |
| 3, // DPR_VFP2:ssub_1 -> SPR |
| 0, // DPR_VFP2:ssub_2 |
| 0, // DPR_VFP2:ssub_3 |
| 0, // DPR_VFP2:ssub_4 |
| 0, // DPR_VFP2:ssub_5 |
| 0, // DPR_VFP2:ssub_6 |
| 0, // DPR_VFP2:ssub_7 |
| 0, // DPR_VFP2:ssub_8 |
| 0, // DPR_VFP2:ssub_9 |
| 0, // DPR_VFP2:ssub_10 |
| 0, // DPR_VFP2:ssub_11 |
| 0, // DPR_VFP2:ssub_12 |
| 0, // DPR_VFP2:ssub_13 |
| 0, // DPR_VFP2:ssub_14 |
| 0, // DPR_VFP2:ssub_15 |
| 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPR_VFP2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR_VFP2:ssub_6_ssub_7_dsub_5 |
| 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPR_VFP2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPR_VFP2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR_VFP2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPR_VFP2:dsub_5_dsub_7 |
| 0, // DPR_VFP2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPR_VFP2:dsub_5_ssub_12_ssub_13 |
| 0, // DPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPR_8 |
| 0, // DPR_8:dsub_0 |
| 0, // DPR_8:dsub_1 |
| 0, // DPR_8:dsub_2 |
| 0, // DPR_8:dsub_3 |
| 0, // DPR_8:dsub_4 |
| 0, // DPR_8:dsub_5 |
| 0, // DPR_8:dsub_6 |
| 0, // DPR_8:dsub_7 |
| 0, // DPR_8:gsub_0 |
| 0, // DPR_8:gsub_1 |
| 0, // DPR_8:qqsub_0 |
| 0, // DPR_8:qqsub_1 |
| 0, // DPR_8:qsub_0 |
| 0, // DPR_8:qsub_1 |
| 0, // DPR_8:qsub_2 |
| 0, // DPR_8:qsub_3 |
| 8, // DPR_8:ssub_0 -> SPR_8 |
| 8, // DPR_8:ssub_1 -> SPR_8 |
| 0, // DPR_8:ssub_2 |
| 0, // DPR_8:ssub_3 |
| 0, // DPR_8:ssub_4 |
| 0, // DPR_8:ssub_5 |
| 0, // DPR_8:ssub_6 |
| 0, // DPR_8:ssub_7 |
| 0, // DPR_8:ssub_8 |
| 0, // DPR_8:ssub_9 |
| 0, // DPR_8:ssub_10 |
| 0, // DPR_8:ssub_11 |
| 0, // DPR_8:ssub_12 |
| 0, // DPR_8:ssub_13 |
| 0, // DPR_8:ssub_14 |
| 0, // DPR_8:ssub_15 |
| 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPR_8:dsub_5_dsub_7 |
| 0, // DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair |
| 0, // GPRPair:dsub_0 |
| 0, // GPRPair:dsub_1 |
| 0, // GPRPair:dsub_2 |
| 0, // GPRPair:dsub_3 |
| 0, // GPRPair:dsub_4 |
| 0, // GPRPair:dsub_5 |
| 0, // GPRPair:dsub_6 |
| 0, // GPRPair:dsub_7 |
| 23, // GPRPair:gsub_0 -> tGPREven |
| 16, // GPRPair:gsub_1 -> GPRnoip_and_GPRnopc |
| 0, // GPRPair:qqsub_0 |
| 0, // GPRPair:qqsub_1 |
| 0, // GPRPair:qsub_0 |
| 0, // GPRPair:qsub_1 |
| 0, // GPRPair:qsub_2 |
| 0, // GPRPair:qsub_3 |
| 0, // GPRPair:ssub_0 |
| 0, // GPRPair:ssub_1 |
| 0, // GPRPair:ssub_2 |
| 0, // GPRPair:ssub_3 |
| 0, // GPRPair:ssub_4 |
| 0, // GPRPair:ssub_5 |
| 0, // GPRPair:ssub_6 |
| 0, // GPRPair:ssub_7 |
| 0, // GPRPair:ssub_8 |
| 0, // GPRPair:ssub_9 |
| 0, // GPRPair:ssub_10 |
| 0, // GPRPair:ssub_11 |
| 0, // GPRPair:ssub_12 |
| 0, // GPRPair:ssub_13 |
| 0, // GPRPair:ssub_14 |
| 0, // GPRPair:ssub_15 |
| 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPair:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPair:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair:dsub_5_dsub_7 |
| 0, // GPRPair:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPair:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPairnosp |
| 0, // GPRPairnosp:dsub_0 |
| 0, // GPRPairnosp:dsub_1 |
| 0, // GPRPairnosp:dsub_2 |
| 0, // GPRPairnosp:dsub_3 |
| 0, // GPRPairnosp:dsub_4 |
| 0, // GPRPairnosp:dsub_5 |
| 0, // GPRPairnosp:dsub_6 |
| 0, // GPRPairnosp:dsub_7 |
| 27, // GPRPairnosp:gsub_0 -> GPRnoip_and_tGPREven |
| 29, // GPRPairnosp:gsub_1 -> tGPROdd |
| 0, // GPRPairnosp:qqsub_0 |
| 0, // GPRPairnosp:qqsub_1 |
| 0, // GPRPairnosp:qsub_0 |
| 0, // GPRPairnosp:qsub_1 |
| 0, // GPRPairnosp:qsub_2 |
| 0, // GPRPairnosp:qsub_3 |
| 0, // GPRPairnosp:ssub_0 |
| 0, // GPRPairnosp:ssub_1 |
| 0, // GPRPairnosp:ssub_2 |
| 0, // GPRPairnosp:ssub_3 |
| 0, // GPRPairnosp:ssub_4 |
| 0, // GPRPairnosp:ssub_5 |
| 0, // GPRPairnosp:ssub_6 |
| 0, // GPRPairnosp:ssub_7 |
| 0, // GPRPairnosp:ssub_8 |
| 0, // GPRPairnosp:ssub_9 |
| 0, // GPRPairnosp:ssub_10 |
| 0, // GPRPairnosp:ssub_11 |
| 0, // GPRPairnosp:ssub_12 |
| 0, // GPRPairnosp:ssub_13 |
| 0, // GPRPairnosp:ssub_14 |
| 0, // GPRPairnosp:ssub_15 |
| 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPairnosp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPairnosp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPairnosp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPairnosp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPairnosp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPairnosp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPairnosp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPairnosp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPairnosp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPairnosp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPairnosp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPairnosp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPairnosp:dsub_5_dsub_7 |
| 0, // GPRPairnosp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPairnosp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPairnosp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_0_in_tGPR |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_0 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_1 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_2 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_3 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_4 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_6 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_7 |
| 36, // GPRPair_with_gsub_0_in_tGPR:gsub_0 -> tGPR_and_tGPREven |
| 37, // GPRPair_with_gsub_0_in_tGPR:gsub_1 -> tGPR_and_tGPROdd |
| 0, // GPRPair_with_gsub_0_in_tGPR:qqsub_0 |
| 0, // GPRPair_with_gsub_0_in_tGPR:qqsub_1 |
| 0, // GPRPair_with_gsub_0_in_tGPR:qsub_0 |
| 0, // GPRPair_with_gsub_0_in_tGPR:qsub_1 |
| 0, // GPRPair_with_gsub_0_in_tGPR:qsub_2 |
| 0, // GPRPair_with_gsub_0_in_tGPR:qsub_3 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_1 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_3 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_7 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_10 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_11 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_12 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_14 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_15 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_0_in_hGPR |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_0 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_1 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_2 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_3 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_4 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_6 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_7 |
| 35, // GPRPair_with_gsub_0_in_hGPR:gsub_0 -> hGPR_and_tGPREven |
| 30, // GPRPair_with_gsub_0_in_hGPR:gsub_1 -> GPRnopc_and_GPRnoip_and_hGPR |
| 0, // GPRPair_with_gsub_0_in_hGPR:qqsub_0 |
| 0, // GPRPair_with_gsub_0_in_hGPR:qqsub_1 |
| 0, // GPRPair_with_gsub_0_in_hGPR:qsub_0 |
| 0, // GPRPair_with_gsub_0_in_hGPR:qsub_1 |
| 0, // GPRPair_with_gsub_0_in_hGPR:qsub_2 |
| 0, // GPRPair_with_gsub_0_in_hGPR:qsub_3 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_1 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_3 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_7 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_9 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_10 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_11 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_12 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_13 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_14 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_15 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_0_in_tcGPR |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_0 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_1 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_2 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_3 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_4 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_6 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_7 |
| 38, // GPRPair_with_gsub_0_in_tcGPR:gsub_0 -> tGPREven_and_tcGPR |
| 16, // GPRPair_with_gsub_0_in_tcGPR:gsub_1 -> GPRnoip_and_GPRnopc |
| 0, // GPRPair_with_gsub_0_in_tcGPR:qqsub_0 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:qqsub_1 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_0 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_1 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_2 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:qsub_3 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_1 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_3 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_7 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_10 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_11 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_12 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_14 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_15 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_0_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_1_in_tcGPR |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_0 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_1 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_2 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_3 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_4 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_6 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_7 |
| 41, // GPRPair_with_gsub_1_in_tcGPR:gsub_0 -> tGPREven_and_GPRnoip_and_tcGPR |
| 42, // GPRPair_with_gsub_1_in_tcGPR:gsub_1 -> tGPROdd_and_tcGPR |
| 0, // GPRPair_with_gsub_1_in_tcGPR:qqsub_0 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:qqsub_1 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:qsub_0 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:qsub_1 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:qsub_2 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:qsub_3 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_0 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_1 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_2 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_3 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_4 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_6 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_7 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_8 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_9 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_10 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_11 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_12 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_13 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_14 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_15 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_tcGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_0 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_1 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_2 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_3 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_4 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_6 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_7 |
| 39, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:gsub_0 -> hGPR_and_GPRnoip_and_tGPREven |
| 40, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:gsub_1 -> hGPR_and_tGPROdd |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qqsub_0 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qqsub_1 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_0 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_1 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_2 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:qsub_3 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_1 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_3 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_7 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_9 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_10 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_11 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_12 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_13 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_14 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_15 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_dsub_7 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // GPRPair_with_gsub_1_in_GPRsp |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_0 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_1 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_2 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_3 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_4 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_6 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_7 |
| 50, // GPRPair_with_gsub_1_in_GPRsp:gsub_0 -> hGPR_and_tcGPR |
| 46, // GPRPair_with_gsub_1_in_GPRsp:gsub_1 -> GPRsp |
| 0, // GPRPair_with_gsub_1_in_GPRsp:qqsub_0 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:qqsub_1 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_0 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_1 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_2 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:qsub_3 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_1 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_3 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_7 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_9 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_10 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_11 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_12 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_13 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_14 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_15 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_dsub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:dsub_5_ssub_12_ssub_13 |
| 0, // GPRPair_with_gsub_1_in_GPRsp:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc |
| 51, // DPairSpc:dsub_0 -> DPR |
| 0, // DPairSpc:dsub_1 |
| 51, // DPairSpc:dsub_2 -> DPR |
| 0, // DPairSpc:dsub_3 |
| 0, // DPairSpc:dsub_4 |
| 0, // DPairSpc:dsub_5 |
| 0, // DPairSpc:dsub_6 |
| 0, // DPairSpc:dsub_7 |
| 0, // DPairSpc:gsub_0 |
| 0, // DPairSpc:gsub_1 |
| 0, // DPairSpc:qqsub_0 |
| 0, // DPairSpc:qqsub_1 |
| 0, // DPairSpc:qsub_0 |
| 0, // DPairSpc:qsub_1 |
| 0, // DPairSpc:qsub_2 |
| 0, // DPairSpc:qsub_3 |
| 3, // DPairSpc:ssub_0 -> SPR |
| 3, // DPairSpc:ssub_1 -> SPR |
| 0, // DPairSpc:ssub_2 |
| 0, // DPairSpc:ssub_3 |
| 3, // DPairSpc:ssub_4 -> SPR |
| 3, // DPairSpc:ssub_5 -> SPR |
| 0, // DPairSpc:ssub_6 |
| 0, // DPairSpc:ssub_7 |
| 0, // DPairSpc:ssub_8 |
| 0, // DPairSpc:ssub_9 |
| 0, // DPairSpc:ssub_10 |
| 0, // DPairSpc:ssub_11 |
| 0, // DPairSpc:ssub_12 |
| 0, // DPairSpc:ssub_13 |
| 0, // DPairSpc:ssub_14 |
| 0, // DPairSpc:ssub_15 |
| 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPairSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc:ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPairSpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc:dsub_5_dsub_7 |
| 0, // DPairSpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPairSpc:dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_ssub_0 |
| 4, // DPairSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 0, // DPairSpc_with_ssub_0:dsub_1 |
| 51, // DPairSpc_with_ssub_0:dsub_2 -> DPR |
| 0, // DPairSpc_with_ssub_0:dsub_3 |
| 0, // DPairSpc_with_ssub_0:dsub_4 |
| 0, // DPairSpc_with_ssub_0:dsub_5 |
| 0, // DPairSpc_with_ssub_0:dsub_6 |
| 0, // DPairSpc_with_ssub_0:dsub_7 |
| 0, // DPairSpc_with_ssub_0:gsub_0 |
| 0, // DPairSpc_with_ssub_0:gsub_1 |
| 0, // DPairSpc_with_ssub_0:qqsub_0 |
| 0, // DPairSpc_with_ssub_0:qqsub_1 |
| 0, // DPairSpc_with_ssub_0:qsub_0 |
| 0, // DPairSpc_with_ssub_0:qsub_1 |
| 0, // DPairSpc_with_ssub_0:qsub_2 |
| 0, // DPairSpc_with_ssub_0:qsub_3 |
| 3, // DPairSpc_with_ssub_0:ssub_0 -> SPR |
| 3, // DPairSpc_with_ssub_0:ssub_1 -> SPR |
| 0, // DPairSpc_with_ssub_0:ssub_2 |
| 0, // DPairSpc_with_ssub_0:ssub_3 |
| 3, // DPairSpc_with_ssub_0:ssub_4 -> SPR |
| 3, // DPairSpc_with_ssub_0:ssub_5 -> SPR |
| 0, // DPairSpc_with_ssub_0:ssub_6 |
| 0, // DPairSpc_with_ssub_0:ssub_7 |
| 0, // DPairSpc_with_ssub_0:ssub_8 |
| 0, // DPairSpc_with_ssub_0:ssub_9 |
| 0, // DPairSpc_with_ssub_0:ssub_10 |
| 0, // DPairSpc_with_ssub_0:ssub_11 |
| 0, // DPairSpc_with_ssub_0:ssub_12 |
| 0, // DPairSpc_with_ssub_0:ssub_13 |
| 0, // DPairSpc_with_ssub_0:ssub_14 |
| 0, // DPairSpc_with_ssub_0:ssub_15 |
| 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_0:dsub_5_dsub_7 |
| 0, // DPairSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPairSpc_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_ssub_4 |
| 52, // DPairSpc_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 0, // DPairSpc_with_ssub_4:dsub_1 |
| 52, // DPairSpc_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 0, // DPairSpc_with_ssub_4:dsub_3 |
| 0, // DPairSpc_with_ssub_4:dsub_4 |
| 0, // DPairSpc_with_ssub_4:dsub_5 |
| 0, // DPairSpc_with_ssub_4:dsub_6 |
| 0, // DPairSpc_with_ssub_4:dsub_7 |
| 0, // DPairSpc_with_ssub_4:gsub_0 |
| 0, // DPairSpc_with_ssub_4:gsub_1 |
| 0, // DPairSpc_with_ssub_4:qqsub_0 |
| 0, // DPairSpc_with_ssub_4:qqsub_1 |
| 0, // DPairSpc_with_ssub_4:qsub_0 |
| 0, // DPairSpc_with_ssub_4:qsub_1 |
| 0, // DPairSpc_with_ssub_4:qsub_2 |
| 0, // DPairSpc_with_ssub_4:qsub_3 |
| 3, // DPairSpc_with_ssub_4:ssub_0 -> SPR |
| 3, // DPairSpc_with_ssub_4:ssub_1 -> SPR |
| 0, // DPairSpc_with_ssub_4:ssub_2 |
| 0, // DPairSpc_with_ssub_4:ssub_3 |
| 3, // DPairSpc_with_ssub_4:ssub_4 -> SPR |
| 3, // DPairSpc_with_ssub_4:ssub_5 -> SPR |
| 0, // DPairSpc_with_ssub_4:ssub_6 |
| 0, // DPairSpc_with_ssub_4:ssub_7 |
| 0, // DPairSpc_with_ssub_4:ssub_8 |
| 0, // DPairSpc_with_ssub_4:ssub_9 |
| 0, // DPairSpc_with_ssub_4:ssub_10 |
| 0, // DPairSpc_with_ssub_4:ssub_11 |
| 0, // DPairSpc_with_ssub_4:ssub_12 |
| 0, // DPairSpc_with_ssub_4:ssub_13 |
| 0, // DPairSpc_with_ssub_4:ssub_14 |
| 0, // DPairSpc_with_ssub_4:ssub_15 |
| 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_4:dsub_5_dsub_7 |
| 0, // DPairSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPairSpc_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_dsub_0_in_DPR_8 |
| 20, // DPairSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_1 |
| 52, // DPairSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_3 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_4 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_6 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:gsub_0 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:gsub_1 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:qqsub_0 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:qqsub_1 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_0 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_1 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_2 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:qsub_3 |
| 8, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DPairSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_3 |
| 3, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 3, // DPairSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_9 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_10 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_11 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_12 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_13 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_14 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_15 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPairSpc_with_dsub_2_in_DPR_8 |
| 53, // DPairSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_1 |
| 53, // DPairSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_3 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_4 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_6 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:gsub_0 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:gsub_1 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:qqsub_0 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:qqsub_1 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_0 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_1 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_2 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:qsub_3 |
| 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_3 |
| 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DPairSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_9 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_10 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_11 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_12 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_13 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_14 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_15 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DPairSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair |
| 51, // DPair:dsub_0 -> DPR |
| 51, // DPair:dsub_1 -> DPR |
| 0, // DPair:dsub_2 |
| 0, // DPair:dsub_3 |
| 0, // DPair:dsub_4 |
| 0, // DPair:dsub_5 |
| 0, // DPair:dsub_6 |
| 0, // DPair:dsub_7 |
| 0, // DPair:gsub_0 |
| 0, // DPair:gsub_1 |
| 0, // DPair:qqsub_0 |
| 0, // DPair:qqsub_1 |
| 0, // DPair:qsub_0 |
| 0, // DPair:qsub_1 |
| 0, // DPair:qsub_2 |
| 0, // DPair:qsub_3 |
| 3, // DPair:ssub_0 -> SPR |
| 3, // DPair:ssub_1 -> SPR |
| 3, // DPair:ssub_2 -> SPR |
| 3, // DPair:ssub_3 -> SPR |
| 0, // DPair:ssub_4 |
| 0, // DPair:ssub_5 |
| 0, // DPair:ssub_6 |
| 0, // DPair:ssub_7 |
| 0, // DPair:ssub_8 |
| 0, // DPair:ssub_9 |
| 0, // DPair:ssub_10 |
| 0, // DPair:ssub_11 |
| 0, // DPair:ssub_12 |
| 0, // DPair:ssub_13 |
| 0, // DPair:ssub_14 |
| 0, // DPair:ssub_15 |
| 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPair:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPair:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair:ssub_6_ssub_7_dsub_5 |
| 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPair:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair:dsub_5_dsub_7 |
| 0, // DPair:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPair:dsub_5_ssub_12_ssub_13 |
| 0, // DPair:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_ssub_0 |
| 4, // DPair_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 51, // DPair_with_ssub_0:dsub_1 -> DPR |
| 0, // DPair_with_ssub_0:dsub_2 |
| 0, // DPair_with_ssub_0:dsub_3 |
| 0, // DPair_with_ssub_0:dsub_4 |
| 0, // DPair_with_ssub_0:dsub_5 |
| 0, // DPair_with_ssub_0:dsub_6 |
| 0, // DPair_with_ssub_0:dsub_7 |
| 0, // DPair_with_ssub_0:gsub_0 |
| 0, // DPair_with_ssub_0:gsub_1 |
| 0, // DPair_with_ssub_0:qqsub_0 |
| 0, // DPair_with_ssub_0:qqsub_1 |
| 0, // DPair_with_ssub_0:qsub_0 |
| 0, // DPair_with_ssub_0:qsub_1 |
| 0, // DPair_with_ssub_0:qsub_2 |
| 0, // DPair_with_ssub_0:qsub_3 |
| 3, // DPair_with_ssub_0:ssub_0 -> SPR |
| 3, // DPair_with_ssub_0:ssub_1 -> SPR |
| 3, // DPair_with_ssub_0:ssub_2 -> SPR |
| 3, // DPair_with_ssub_0:ssub_3 -> SPR |
| 0, // DPair_with_ssub_0:ssub_4 |
| 0, // DPair_with_ssub_0:ssub_5 |
| 0, // DPair_with_ssub_0:ssub_6 |
| 0, // DPair_with_ssub_0:ssub_7 |
| 0, // DPair_with_ssub_0:ssub_8 |
| 0, // DPair_with_ssub_0:ssub_9 |
| 0, // DPair_with_ssub_0:ssub_10 |
| 0, // DPair_with_ssub_0:ssub_11 |
| 0, // DPair_with_ssub_0:ssub_12 |
| 0, // DPair_with_ssub_0:ssub_13 |
| 0, // DPair_with_ssub_0:ssub_14 |
| 0, // DPair_with_ssub_0:ssub_15 |
| 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPair_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_0:dsub_5_dsub_7 |
| 0, // DPair_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPair_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QPR |
| 51, // QPR:dsub_0 -> DPR |
| 51, // QPR:dsub_1 -> DPR |
| 0, // QPR:dsub_2 |
| 0, // QPR:dsub_3 |
| 0, // QPR:dsub_4 |
| 0, // QPR:dsub_5 |
| 0, // QPR:dsub_6 |
| 0, // QPR:dsub_7 |
| 0, // QPR:gsub_0 |
| 0, // QPR:gsub_1 |
| 0, // QPR:qqsub_0 |
| 0, // QPR:qqsub_1 |
| 0, // QPR:qsub_0 |
| 0, // QPR:qsub_1 |
| 0, // QPR:qsub_2 |
| 0, // QPR:qsub_3 |
| 3, // QPR:ssub_0 -> SPR |
| 3, // QPR:ssub_1 -> SPR |
| 3, // QPR:ssub_2 -> SPR |
| 3, // QPR:ssub_3 -> SPR |
| 0, // QPR:ssub_4 |
| 0, // QPR:ssub_5 |
| 0, // QPR:ssub_6 |
| 0, // QPR:ssub_7 |
| 0, // QPR:ssub_8 |
| 0, // QPR:ssub_9 |
| 0, // QPR:ssub_10 |
| 0, // QPR:ssub_11 |
| 0, // QPR:ssub_12 |
| 0, // QPR:ssub_13 |
| 0, // QPR:ssub_14 |
| 0, // QPR:ssub_15 |
| 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR:ssub_6_ssub_7_dsub_5 |
| 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QPR:dsub_5_dsub_7 |
| 0, // QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // QPR:dsub_5_ssub_12_ssub_13 |
| 0, // QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_ssub_2 |
| 52, // DPair_with_ssub_2:dsub_0 -> DPR_VFP2 |
| 52, // DPair_with_ssub_2:dsub_1 -> DPR_VFP2 |
| 0, // DPair_with_ssub_2:dsub_2 |
| 0, // DPair_with_ssub_2:dsub_3 |
| 0, // DPair_with_ssub_2:dsub_4 |
| 0, // DPair_with_ssub_2:dsub_5 |
| 0, // DPair_with_ssub_2:dsub_6 |
| 0, // DPair_with_ssub_2:dsub_7 |
| 0, // DPair_with_ssub_2:gsub_0 |
| 0, // DPair_with_ssub_2:gsub_1 |
| 0, // DPair_with_ssub_2:qqsub_0 |
| 0, // DPair_with_ssub_2:qqsub_1 |
| 0, // DPair_with_ssub_2:qsub_0 |
| 0, // DPair_with_ssub_2:qsub_1 |
| 0, // DPair_with_ssub_2:qsub_2 |
| 0, // DPair_with_ssub_2:qsub_3 |
| 3, // DPair_with_ssub_2:ssub_0 -> SPR |
| 3, // DPair_with_ssub_2:ssub_1 -> SPR |
| 3, // DPair_with_ssub_2:ssub_2 -> SPR |
| 3, // DPair_with_ssub_2:ssub_3 -> SPR |
| 0, // DPair_with_ssub_2:ssub_4 |
| 0, // DPair_with_ssub_2:ssub_5 |
| 0, // DPair_with_ssub_2:ssub_6 |
| 0, // DPair_with_ssub_2:ssub_7 |
| 0, // DPair_with_ssub_2:ssub_8 |
| 0, // DPair_with_ssub_2:ssub_9 |
| 0, // DPair_with_ssub_2:ssub_10 |
| 0, // DPair_with_ssub_2:ssub_11 |
| 0, // DPair_with_ssub_2:ssub_12 |
| 0, // DPair_with_ssub_2:ssub_13 |
| 0, // DPair_with_ssub_2:ssub_14 |
| 0, // DPair_with_ssub_2:ssub_15 |
| 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_2:ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPair_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_2:dsub_5_dsub_7 |
| 0, // DPair_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPair_with_ssub_2:dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_dsub_0_in_DPR_8 |
| 20, // DPair_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 52, // DPair_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_2 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_3 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_4 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_6 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:gsub_0 |
| 0, // DPair_with_dsub_0_in_DPR_8:gsub_1 |
| 0, // DPair_with_dsub_0_in_DPR_8:qqsub_0 |
| 0, // DPair_with_dsub_0_in_DPR_8:qqsub_1 |
| 0, // DPair_with_dsub_0_in_DPR_8:qsub_0 |
| 0, // DPair_with_dsub_0_in_DPR_8:qsub_1 |
| 0, // DPair_with_dsub_0_in_DPR_8:qsub_2 |
| 0, // DPair_with_dsub_0_in_DPR_8:qsub_3 |
| 8, // DPair_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DPair_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 3, // DPair_with_dsub_0_in_DPR_8:ssub_2 -> SPR |
| 3, // DPair_with_dsub_0_in_DPR_8:ssub_3 -> SPR |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_4 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_6 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_8 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_9 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_10 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_11 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_12 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_13 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_14 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_15 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPair_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // MQPR |
| 52, // MQPR:dsub_0 -> DPR_VFP2 |
| 52, // MQPR:dsub_1 -> DPR_VFP2 |
| 0, // MQPR:dsub_2 |
| 0, // MQPR:dsub_3 |
| 0, // MQPR:dsub_4 |
| 0, // MQPR:dsub_5 |
| 0, // MQPR:dsub_6 |
| 0, // MQPR:dsub_7 |
| 0, // MQPR:gsub_0 |
| 0, // MQPR:gsub_1 |
| 0, // MQPR:qqsub_0 |
| 0, // MQPR:qqsub_1 |
| 0, // MQPR:qsub_0 |
| 0, // MQPR:qsub_1 |
| 0, // MQPR:qsub_2 |
| 0, // MQPR:qsub_3 |
| 3, // MQPR:ssub_0 -> SPR |
| 3, // MQPR:ssub_1 -> SPR |
| 3, // MQPR:ssub_2 -> SPR |
| 3, // MQPR:ssub_3 -> SPR |
| 0, // MQPR:ssub_4 |
| 0, // MQPR:ssub_5 |
| 0, // MQPR:ssub_6 |
| 0, // MQPR:ssub_7 |
| 0, // MQPR:ssub_8 |
| 0, // MQPR:ssub_9 |
| 0, // MQPR:ssub_10 |
| 0, // MQPR:ssub_11 |
| 0, // MQPR:ssub_12 |
| 0, // MQPR:ssub_13 |
| 0, // MQPR:ssub_14 |
| 0, // MQPR:ssub_15 |
| 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // MQPR:dsub_5_dsub_7 |
| 0, // MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QPR_VFP2 |
| 52, // QPR_VFP2:dsub_0 -> DPR_VFP2 |
| 52, // QPR_VFP2:dsub_1 -> DPR_VFP2 |
| 0, // QPR_VFP2:dsub_2 |
| 0, // QPR_VFP2:dsub_3 |
| 0, // QPR_VFP2:dsub_4 |
| 0, // QPR_VFP2:dsub_5 |
| 0, // QPR_VFP2:dsub_6 |
| 0, // QPR_VFP2:dsub_7 |
| 0, // QPR_VFP2:gsub_0 |
| 0, // QPR_VFP2:gsub_1 |
| 0, // QPR_VFP2:qqsub_0 |
| 0, // QPR_VFP2:qqsub_1 |
| 0, // QPR_VFP2:qsub_0 |
| 0, // QPR_VFP2:qsub_1 |
| 0, // QPR_VFP2:qsub_2 |
| 0, // QPR_VFP2:qsub_3 |
| 3, // QPR_VFP2:ssub_0 -> SPR |
| 3, // QPR_VFP2:ssub_1 -> SPR |
| 3, // QPR_VFP2:ssub_2 -> SPR |
| 3, // QPR_VFP2:ssub_3 -> SPR |
| 0, // QPR_VFP2:ssub_4 |
| 0, // QPR_VFP2:ssub_5 |
| 0, // QPR_VFP2:ssub_6 |
| 0, // QPR_VFP2:ssub_7 |
| 0, // QPR_VFP2:ssub_8 |
| 0, // QPR_VFP2:ssub_9 |
| 0, // QPR_VFP2:ssub_10 |
| 0, // QPR_VFP2:ssub_11 |
| 0, // QPR_VFP2:ssub_12 |
| 0, // QPR_VFP2:ssub_13 |
| 0, // QPR_VFP2:ssub_14 |
| 0, // QPR_VFP2:ssub_15 |
| 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // QPR_VFP2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QPR_VFP2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // QPR_VFP2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QPR_VFP2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR_VFP2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR_VFP2:ssub_6_ssub_7_dsub_5 |
| 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // QPR_VFP2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR_VFP2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QPR_VFP2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR_VFP2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QPR_VFP2:dsub_5_dsub_7 |
| 0, // QPR_VFP2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // QPR_VFP2:dsub_5_ssub_12_ssub_13 |
| 0, // QPR_VFP2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DPair_with_dsub_1_in_DPR_8 |
| 53, // DPair_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // DPair_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_2 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_3 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_4 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_6 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:gsub_0 |
| 0, // DPair_with_dsub_1_in_DPR_8:gsub_1 |
| 0, // DPair_with_dsub_1_in_DPR_8:qqsub_0 |
| 0, // DPair_with_dsub_1_in_DPR_8:qqsub_1 |
| 0, // DPair_with_dsub_1_in_DPR_8:qsub_0 |
| 0, // DPair_with_dsub_1_in_DPR_8:qsub_1 |
| 0, // DPair_with_dsub_1_in_DPR_8:qsub_2 |
| 0, // DPair_with_dsub_1_in_DPR_8:qsub_3 |
| 8, // DPair_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DPair_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // DPair_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // DPair_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_4 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_6 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_8 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_9 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_10 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_11 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_12 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_13 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_14 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_15 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_dsub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DPair_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DPair_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QPR_8 |
| 53, // QPR_8:dsub_0 -> DPR_8 |
| 53, // QPR_8:dsub_1 -> DPR_8 |
| 0, // QPR_8:dsub_2 |
| 0, // QPR_8:dsub_3 |
| 0, // QPR_8:dsub_4 |
| 0, // QPR_8:dsub_5 |
| 0, // QPR_8:dsub_6 |
| 0, // QPR_8:dsub_7 |
| 0, // QPR_8:gsub_0 |
| 0, // QPR_8:gsub_1 |
| 0, // QPR_8:qqsub_0 |
| 0, // QPR_8:qqsub_1 |
| 0, // QPR_8:qsub_0 |
| 0, // QPR_8:qsub_1 |
| 0, // QPR_8:qsub_2 |
| 0, // QPR_8:qsub_3 |
| 8, // QPR_8:ssub_0 -> SPR_8 |
| 8, // QPR_8:ssub_1 -> SPR_8 |
| 8, // QPR_8:ssub_2 -> SPR_8 |
| 8, // QPR_8:ssub_3 -> SPR_8 |
| 0, // QPR_8:ssub_4 |
| 0, // QPR_8:ssub_5 |
| 0, // QPR_8:ssub_6 |
| 0, // QPR_8:ssub_7 |
| 0, // QPR_8:ssub_8 |
| 0, // QPR_8:ssub_9 |
| 0, // QPR_8:ssub_10 |
| 0, // QPR_8:ssub_11 |
| 0, // QPR_8:ssub_12 |
| 0, // QPR_8:ssub_13 |
| 0, // QPR_8:ssub_14 |
| 0, // QPR_8:ssub_15 |
| 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 |
| 0, // QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QPR_8:dsub_5_dsub_7 |
| 0, // QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // QPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple |
| 51, // DTriple:dsub_0 -> DPR |
| 51, // DTriple:dsub_1 -> DPR |
| 51, // DTriple:dsub_2 -> DPR |
| 0, // DTriple:dsub_3 |
| 0, // DTriple:dsub_4 |
| 0, // DTriple:dsub_5 |
| 0, // DTriple:dsub_6 |
| 0, // DTriple:dsub_7 |
| 0, // DTriple:gsub_0 |
| 0, // DTriple:gsub_1 |
| 0, // DTriple:qqsub_0 |
| 0, // DTriple:qqsub_1 |
| 67, // DTriple:qsub_0 -> DPair |
| 0, // DTriple:qsub_1 |
| 0, // DTriple:qsub_2 |
| 0, // DTriple:qsub_3 |
| 3, // DTriple:ssub_0 -> SPR |
| 3, // DTriple:ssub_1 -> SPR |
| 3, // DTriple:ssub_2 -> SPR |
| 3, // DTriple:ssub_3 -> SPR |
| 3, // DTriple:ssub_4 -> SPR |
| 3, // DTriple:ssub_5 -> SPR |
| 0, // DTriple:ssub_6 |
| 0, // DTriple:ssub_7 |
| 0, // DTriple:ssub_8 |
| 0, // DTriple:ssub_9 |
| 0, // DTriple:ssub_10 |
| 0, // DTriple:ssub_11 |
| 0, // DTriple:ssub_12 |
| 0, // DTriple:ssub_13 |
| 0, // DTriple:ssub_14 |
| 0, // DTriple:ssub_15 |
| 62, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 0, // DTriple:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 67, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 0, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple:dsub_5_dsub_7 |
| 0, // DTriple:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc |
| 51, // DTripleSpc:dsub_0 -> DPR |
| 0, // DTripleSpc:dsub_1 |
| 51, // DTripleSpc:dsub_2 -> DPR |
| 0, // DTripleSpc:dsub_3 |
| 51, // DTripleSpc:dsub_4 -> DPR |
| 0, // DTripleSpc:dsub_5 |
| 0, // DTripleSpc:dsub_6 |
| 0, // DTripleSpc:dsub_7 |
| 0, // DTripleSpc:gsub_0 |
| 0, // DTripleSpc:gsub_1 |
| 0, // DTripleSpc:qqsub_0 |
| 0, // DTripleSpc:qqsub_1 |
| 0, // DTripleSpc:qsub_0 |
| 0, // DTripleSpc:qsub_1 |
| 0, // DTripleSpc:qsub_2 |
| 0, // DTripleSpc:qsub_3 |
| 3, // DTripleSpc:ssub_0 -> SPR |
| 3, // DTripleSpc:ssub_1 -> SPR |
| 0, // DTripleSpc:ssub_2 |
| 0, // DTripleSpc:ssub_3 |
| 3, // DTripleSpc:ssub_4 -> SPR |
| 3, // DTripleSpc:ssub_5 -> SPR |
| 0, // DTripleSpc:ssub_6 |
| 0, // DTripleSpc:ssub_7 |
| 3, // DTripleSpc:ssub_8 -> SPR |
| 3, // DTripleSpc:ssub_9 -> SPR |
| 0, // DTripleSpc:ssub_10 |
| 0, // DTripleSpc:ssub_11 |
| 0, // DTripleSpc:ssub_12 |
| 0, // DTripleSpc:ssub_13 |
| 0, // DTripleSpc:ssub_14 |
| 0, // DTripleSpc:ssub_15 |
| 62, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 0, // DTripleSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTripleSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 62, // DTripleSpc:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 0, // DTripleSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc:ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTripleSpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc:dsub_5_dsub_7 |
| 0, // DTripleSpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTripleSpc:dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_ssub_0 |
| 4, // DTripleSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 0, // DTripleSpc_with_ssub_0:dsub_1 |
| 51, // DTripleSpc_with_ssub_0:dsub_2 -> DPR |
| 0, // DTripleSpc_with_ssub_0:dsub_3 |
| 51, // DTripleSpc_with_ssub_0:dsub_4 -> DPR |
| 0, // DTripleSpc_with_ssub_0:dsub_5 |
| 0, // DTripleSpc_with_ssub_0:dsub_6 |
| 0, // DTripleSpc_with_ssub_0:dsub_7 |
| 0, // DTripleSpc_with_ssub_0:gsub_0 |
| 0, // DTripleSpc_with_ssub_0:gsub_1 |
| 0, // DTripleSpc_with_ssub_0:qqsub_0 |
| 0, // DTripleSpc_with_ssub_0:qqsub_1 |
| 0, // DTripleSpc_with_ssub_0:qsub_0 |
| 0, // DTripleSpc_with_ssub_0:qsub_1 |
| 0, // DTripleSpc_with_ssub_0:qsub_2 |
| 0, // DTripleSpc_with_ssub_0:qsub_3 |
| 3, // DTripleSpc_with_ssub_0:ssub_0 -> SPR |
| 3, // DTripleSpc_with_ssub_0:ssub_1 -> SPR |
| 0, // DTripleSpc_with_ssub_0:ssub_2 |
| 0, // DTripleSpc_with_ssub_0:ssub_3 |
| 3, // DTripleSpc_with_ssub_0:ssub_4 -> SPR |
| 3, // DTripleSpc_with_ssub_0:ssub_5 -> SPR |
| 0, // DTripleSpc_with_ssub_0:ssub_6 |
| 0, // DTripleSpc_with_ssub_0:ssub_7 |
| 3, // DTripleSpc_with_ssub_0:ssub_8 -> SPR |
| 3, // DTripleSpc_with_ssub_0:ssub_9 -> SPR |
| 0, // DTripleSpc_with_ssub_0:ssub_10 |
| 0, // DTripleSpc_with_ssub_0:ssub_11 |
| 0, // DTripleSpc_with_ssub_0:ssub_12 |
| 0, // DTripleSpc_with_ssub_0:ssub_13 |
| 0, // DTripleSpc_with_ssub_0:ssub_14 |
| 0, // DTripleSpc_with_ssub_0:ssub_15 |
| 63, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 62, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_0:dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTripleSpc_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_0 |
| 4, // DTriple_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 51, // DTriple_with_ssub_0:dsub_1 -> DPR |
| 51, // DTriple_with_ssub_0:dsub_2 -> DPR |
| 0, // DTriple_with_ssub_0:dsub_3 |
| 0, // DTriple_with_ssub_0:dsub_4 |
| 0, // DTriple_with_ssub_0:dsub_5 |
| 0, // DTriple_with_ssub_0:dsub_6 |
| 0, // DTriple_with_ssub_0:dsub_7 |
| 0, // DTriple_with_ssub_0:gsub_0 |
| 0, // DTriple_with_ssub_0:gsub_1 |
| 0, // DTriple_with_ssub_0:qqsub_0 |
| 0, // DTriple_with_ssub_0:qqsub_1 |
| 68, // DTriple_with_ssub_0:qsub_0 -> DPair_with_ssub_0 |
| 0, // DTriple_with_ssub_0:qsub_1 |
| 0, // DTriple_with_ssub_0:qsub_2 |
| 0, // DTriple_with_ssub_0:qsub_3 |
| 3, // DTriple_with_ssub_0:ssub_0 -> SPR |
| 3, // DTriple_with_ssub_0:ssub_1 -> SPR |
| 3, // DTriple_with_ssub_0:ssub_2 -> SPR |
| 3, // DTriple_with_ssub_0:ssub_3 -> SPR |
| 3, // DTriple_with_ssub_0:ssub_4 -> SPR |
| 3, // DTriple_with_ssub_0:ssub_5 -> SPR |
| 0, // DTriple_with_ssub_0:ssub_6 |
| 0, // DTriple_with_ssub_0:ssub_7 |
| 0, // DTriple_with_ssub_0:ssub_8 |
| 0, // DTriple_with_ssub_0:ssub_9 |
| 0, // DTriple_with_ssub_0:ssub_10 |
| 0, // DTriple_with_ssub_0:ssub_11 |
| 0, // DTriple_with_ssub_0:ssub_12 |
| 0, // DTriple_with_ssub_0:ssub_13 |
| 0, // DTriple_with_ssub_0:ssub_14 |
| 0, // DTriple_with_ssub_0:ssub_15 |
| 63, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 67, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_qsub_0_in_QPR |
| 51, // DTriple_with_qsub_0_in_QPR:dsub_0 -> DPR |
| 51, // DTriple_with_qsub_0_in_QPR:dsub_1 -> DPR |
| 51, // DTriple_with_qsub_0_in_QPR:dsub_2 -> DPR |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_3 |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_4 |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_6 |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR:gsub_0 |
| 0, // DTriple_with_qsub_0_in_QPR:gsub_1 |
| 0, // DTriple_with_qsub_0_in_QPR:qqsub_0 |
| 0, // DTriple_with_qsub_0_in_QPR:qqsub_1 |
| 69, // DTriple_with_qsub_0_in_QPR:qsub_0 -> QPR |
| 0, // DTriple_with_qsub_0_in_QPR:qsub_1 |
| 0, // DTriple_with_qsub_0_in_QPR:qsub_2 |
| 0, // DTriple_with_qsub_0_in_QPR:qsub_3 |
| 3, // DTriple_with_qsub_0_in_QPR:ssub_0 -> SPR |
| 3, // DTriple_with_qsub_0_in_QPR:ssub_1 -> SPR |
| 3, // DTriple_with_qsub_0_in_QPR:ssub_2 -> SPR |
| 3, // DTriple_with_qsub_0_in_QPR:ssub_3 -> SPR |
| 3, // DTriple_with_qsub_0_in_QPR:ssub_4 -> SPR |
| 3, // DTriple_with_qsub_0_in_QPR:ssub_5 -> SPR |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_6 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_7 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_8 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_10 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_11 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_12 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_14 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_15 |
| 62, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 67, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2 |
| 52, // DTriple_with_ssub_2:dsub_0 -> DPR_VFP2 |
| 52, // DTriple_with_ssub_2:dsub_1 -> DPR_VFP2 |
| 51, // DTriple_with_ssub_2:dsub_2 -> DPR |
| 0, // DTriple_with_ssub_2:dsub_3 |
| 0, // DTriple_with_ssub_2:dsub_4 |
| 0, // DTriple_with_ssub_2:dsub_5 |
| 0, // DTriple_with_ssub_2:dsub_6 |
| 0, // DTriple_with_ssub_2:dsub_7 |
| 0, // DTriple_with_ssub_2:gsub_0 |
| 0, // DTriple_with_ssub_2:gsub_1 |
| 0, // DTriple_with_ssub_2:qqsub_0 |
| 0, // DTriple_with_ssub_2:qqsub_1 |
| 70, // DTriple_with_ssub_2:qsub_0 -> DPair_with_ssub_2 |
| 0, // DTriple_with_ssub_2:qsub_1 |
| 0, // DTriple_with_ssub_2:qsub_2 |
| 0, // DTriple_with_ssub_2:qsub_3 |
| 3, // DTriple_with_ssub_2:ssub_0 -> SPR |
| 3, // DTriple_with_ssub_2:ssub_1 -> SPR |
| 3, // DTriple_with_ssub_2:ssub_2 -> SPR |
| 3, // DTriple_with_ssub_2:ssub_3 -> SPR |
| 3, // DTriple_with_ssub_2:ssub_4 -> SPR |
| 3, // DTriple_with_ssub_2:ssub_5 -> SPR |
| 0, // DTriple_with_ssub_2:ssub_6 |
| 0, // DTriple_with_ssub_2:ssub_7 |
| 0, // DTriple_with_ssub_2:ssub_8 |
| 0, // DTriple_with_ssub_2:ssub_9 |
| 0, // DTriple_with_ssub_2:ssub_10 |
| 0, // DTriple_with_ssub_2:ssub_11 |
| 0, // DTriple_with_ssub_2:ssub_12 |
| 0, // DTriple_with_ssub_2:ssub_13 |
| 0, // DTriple_with_ssub_2:ssub_14 |
| 0, // DTriple_with_ssub_2:ssub_15 |
| 63, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 68, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_2:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 51, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR |
| 51, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 51, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 67, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 62, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 69, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_ssub_4 |
| 52, // DTripleSpc_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 0, // DTripleSpc_with_ssub_4:dsub_1 |
| 52, // DTripleSpc_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 0, // DTripleSpc_with_ssub_4:dsub_3 |
| 51, // DTripleSpc_with_ssub_4:dsub_4 -> DPR |
| 0, // DTripleSpc_with_ssub_4:dsub_5 |
| 0, // DTripleSpc_with_ssub_4:dsub_6 |
| 0, // DTripleSpc_with_ssub_4:dsub_7 |
| 0, // DTripleSpc_with_ssub_4:gsub_0 |
| 0, // DTripleSpc_with_ssub_4:gsub_1 |
| 0, // DTripleSpc_with_ssub_4:qqsub_0 |
| 0, // DTripleSpc_with_ssub_4:qqsub_1 |
| 0, // DTripleSpc_with_ssub_4:qsub_0 |
| 0, // DTripleSpc_with_ssub_4:qsub_1 |
| 0, // DTripleSpc_with_ssub_4:qsub_2 |
| 0, // DTripleSpc_with_ssub_4:qsub_3 |
| 3, // DTripleSpc_with_ssub_4:ssub_0 -> SPR |
| 3, // DTripleSpc_with_ssub_4:ssub_1 -> SPR |
| 0, // DTripleSpc_with_ssub_4:ssub_2 |
| 0, // DTripleSpc_with_ssub_4:ssub_3 |
| 3, // DTripleSpc_with_ssub_4:ssub_4 -> SPR |
| 3, // DTripleSpc_with_ssub_4:ssub_5 -> SPR |
| 0, // DTripleSpc_with_ssub_4:ssub_6 |
| 0, // DTripleSpc_with_ssub_4:ssub_7 |
| 3, // DTripleSpc_with_ssub_4:ssub_8 -> SPR |
| 3, // DTripleSpc_with_ssub_4:ssub_9 -> SPR |
| 0, // DTripleSpc_with_ssub_4:ssub_10 |
| 0, // DTripleSpc_with_ssub_4:ssub_11 |
| 0, // DTripleSpc_with_ssub_4:ssub_12 |
| 0, // DTripleSpc_with_ssub_4:ssub_13 |
| 0, // DTripleSpc_with_ssub_4:ssub_14 |
| 0, // DTripleSpc_with_ssub_4:ssub_15 |
| 64, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 63, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0 |
| 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_4:dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTripleSpc_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_4 |
| 52, // DTriple_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 52, // DTriple_with_ssub_4:dsub_1 -> DPR_VFP2 |
| 52, // DTriple_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 0, // DTriple_with_ssub_4:dsub_3 |
| 0, // DTriple_with_ssub_4:dsub_4 |
| 0, // DTriple_with_ssub_4:dsub_5 |
| 0, // DTriple_with_ssub_4:dsub_6 |
| 0, // DTriple_with_ssub_4:dsub_7 |
| 0, // DTriple_with_ssub_4:gsub_0 |
| 0, // DTriple_with_ssub_4:gsub_1 |
| 0, // DTriple_with_ssub_4:qqsub_0 |
| 0, // DTriple_with_ssub_4:qqsub_1 |
| 70, // DTriple_with_ssub_4:qsub_0 -> DPair_with_ssub_2 |
| 0, // DTriple_with_ssub_4:qsub_1 |
| 0, // DTriple_with_ssub_4:qsub_2 |
| 0, // DTriple_with_ssub_4:qsub_3 |
| 3, // DTriple_with_ssub_4:ssub_0 -> SPR |
| 3, // DTriple_with_ssub_4:ssub_1 -> SPR |
| 3, // DTriple_with_ssub_4:ssub_2 -> SPR |
| 3, // DTriple_with_ssub_4:ssub_3 -> SPR |
| 3, // DTriple_with_ssub_4:ssub_4 -> SPR |
| 3, // DTriple_with_ssub_4:ssub_5 -> SPR |
| 0, // DTriple_with_ssub_4:ssub_6 |
| 0, // DTriple_with_ssub_4:ssub_7 |
| 0, // DTriple_with_ssub_4:ssub_8 |
| 0, // DTriple_with_ssub_4:ssub_9 |
| 0, // DTriple_with_ssub_4:ssub_10 |
| 0, // DTriple_with_ssub_4:ssub_11 |
| 0, // DTriple_with_ssub_4:ssub_12 |
| 0, // DTriple_with_ssub_4:ssub_13 |
| 0, // DTriple_with_ssub_4:ssub_14 |
| 0, // DTriple_with_ssub_4:ssub_15 |
| 64, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 70, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_ssub_8 |
| 52, // DTripleSpc_with_ssub_8:dsub_0 -> DPR_VFP2 |
| 0, // DTripleSpc_with_ssub_8:dsub_1 |
| 52, // DTripleSpc_with_ssub_8:dsub_2 -> DPR_VFP2 |
| 0, // DTripleSpc_with_ssub_8:dsub_3 |
| 52, // DTripleSpc_with_ssub_8:dsub_4 -> DPR_VFP2 |
| 0, // DTripleSpc_with_ssub_8:dsub_5 |
| 0, // DTripleSpc_with_ssub_8:dsub_6 |
| 0, // DTripleSpc_with_ssub_8:dsub_7 |
| 0, // DTripleSpc_with_ssub_8:gsub_0 |
| 0, // DTripleSpc_with_ssub_8:gsub_1 |
| 0, // DTripleSpc_with_ssub_8:qqsub_0 |
| 0, // DTripleSpc_with_ssub_8:qqsub_1 |
| 0, // DTripleSpc_with_ssub_8:qsub_0 |
| 0, // DTripleSpc_with_ssub_8:qsub_1 |
| 0, // DTripleSpc_with_ssub_8:qsub_2 |
| 0, // DTripleSpc_with_ssub_8:qsub_3 |
| 3, // DTripleSpc_with_ssub_8:ssub_0 -> SPR |
| 3, // DTripleSpc_with_ssub_8:ssub_1 -> SPR |
| 0, // DTripleSpc_with_ssub_8:ssub_2 |
| 0, // DTripleSpc_with_ssub_8:ssub_3 |
| 3, // DTripleSpc_with_ssub_8:ssub_4 -> SPR |
| 3, // DTripleSpc_with_ssub_8:ssub_5 -> SPR |
| 0, // DTripleSpc_with_ssub_8:ssub_6 |
| 0, // DTripleSpc_with_ssub_8:ssub_7 |
| 3, // DTripleSpc_with_ssub_8:ssub_8 -> SPR |
| 3, // DTripleSpc_with_ssub_8:ssub_9 -> SPR |
| 0, // DTripleSpc_with_ssub_8:ssub_10 |
| 0, // DTripleSpc_with_ssub_8:ssub_11 |
| 0, // DTripleSpc_with_ssub_8:ssub_12 |
| 0, // DTripleSpc_with_ssub_8:ssub_13 |
| 0, // DTripleSpc_with_ssub_8:ssub_14 |
| 0, // DTripleSpc_with_ssub_8:ssub_15 |
| 64, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 64, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_8:dsub_5_dsub_7 |
| 0, // DTripleSpc_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTripleSpc_with_ssub_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_dsub_0_in_DPR_8 |
| 20, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_1 |
| 52, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_3 |
| 52, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_6 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_7 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:gsub_0 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:gsub_1 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:qqsub_0 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:qqsub_1 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_0 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_1 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_2 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:qsub_3 |
| 8, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_3 |
| 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_7 |
| 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8 -> SPR |
| 3, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_9 -> SPR |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_10 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_11 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_12 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_13 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_14 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_15 |
| 65, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 64, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_0_in_DPR_8 |
| 20, // DTriple_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 52, // DTriple_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2 |
| 52, // DTriple_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_3 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_4 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_6 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8:gsub_0 |
| 0, // DTriple_with_dsub_0_in_DPR_8:gsub_1 |
| 0, // DTriple_with_dsub_0_in_DPR_8:qqsub_0 |
| 0, // DTriple_with_dsub_0_in_DPR_8:qqsub_1 |
| 71, // DTriple_with_dsub_0_in_DPR_8:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_dsub_0_in_DPR_8:qsub_1 |
| 0, // DTriple_with_dsub_0_in_DPR_8:qsub_2 |
| 0, // DTriple_with_dsub_0_in_DPR_8:qsub_3 |
| 8, // DTriple_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DTriple_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 3, // DTriple_with_dsub_0_in_DPR_8:ssub_2 -> SPR |
| 3, // DTriple_with_dsub_0_in_DPR_8:ssub_3 -> SPR |
| 3, // DTriple_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 3, // DTriple_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_10 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_11 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_12 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_14 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_15 |
| 65, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 70, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_qsub_0_in_MQPR |
| 52, // DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2 |
| 52, // DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2 |
| 51, // DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_3 |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_4 |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_5 |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_6 |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_7 |
| 0, // DTriple_with_qsub_0_in_MQPR:gsub_0 |
| 0, // DTriple_with_qsub_0_in_MQPR:gsub_1 |
| 0, // DTriple_with_qsub_0_in_MQPR:qqsub_0 |
| 0, // DTriple_with_qsub_0_in_MQPR:qqsub_1 |
| 72, // DTriple_with_qsub_0_in_MQPR:qsub_0 -> MQPR |
| 0, // DTriple_with_qsub_0_in_MQPR:qsub_1 |
| 0, // DTriple_with_qsub_0_in_MQPR:qsub_2 |
| 0, // DTriple_with_qsub_0_in_MQPR:qsub_3 |
| 3, // DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR |
| 3, // DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR |
| 3, // DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR |
| 3, // DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR |
| 3, // DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR |
| 3, // DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_6 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_7 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_8 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_9 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_10 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_11 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_12 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_13 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_14 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_15 |
| 63, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 68, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 52, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR_VFP2 |
| 51, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 51, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 68, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair_with_ssub_0 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 3, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 63, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 69, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_1_in_DPR_8 |
| 53, // DTriple_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // DTriple_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8 |
| 52, // DTriple_with_dsub_1_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_3 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_4 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_6 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_7 |
| 0, // DTriple_with_dsub_1_in_DPR_8:gsub_0 |
| 0, // DTriple_with_dsub_1_in_DPR_8:gsub_1 |
| 0, // DTriple_with_dsub_1_in_DPR_8:qqsub_0 |
| 0, // DTriple_with_dsub_1_in_DPR_8:qqsub_1 |
| 74, // DTriple_with_dsub_1_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DTriple_with_dsub_1_in_DPR_8:qsub_1 |
| 0, // DTriple_with_dsub_1_in_DPR_8:qsub_2 |
| 0, // DTriple_with_dsub_1_in_DPR_8:qsub_3 |
| 8, // DTriple_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DTriple_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // DTriple_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // DTriple_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8 |
| 3, // DTriple_with_dsub_1_in_DPR_8:ssub_4 -> SPR |
| 3, // DTriple_with_dsub_1_in_DPR_8:ssub_5 -> SPR |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_7 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_9 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_10 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_11 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_12 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_13 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_14 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_15 |
| 65, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 71, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2 |
| 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 52, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 70, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 3, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 64, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 73, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 52, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2 |
| 52, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2 |
| 52, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR_VFP2 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_3 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_4 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_6 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_7 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:gsub_0 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:gsub_1 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qqsub_0 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qqsub_1 |
| 73, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_0 -> QPR_VFP2 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_1 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_2 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:qsub_3 |
| 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR |
| 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR |
| 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR |
| 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR |
| 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR |
| 3, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_7 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_9 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_10 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_11 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_12 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_13 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_14 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_15 |
| 64, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 70, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_dsub_2_in_DPR_8 |
| 53, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_1 |
| 53, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_3 |
| 52, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_6 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_7 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:gsub_0 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:gsub_1 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:qqsub_0 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:qqsub_1 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_0 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_1 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_2 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:qsub_3 |
| 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_3 |
| 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_7 |
| 3, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8 -> SPR |
| 3, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_9 -> SPR |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_10 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_11 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_12 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_13 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_14 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_15 |
| 66, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 65, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_2_in_DPR_8 |
| 53, // DTriple_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // DTriple_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 53, // DTriple_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_3 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_4 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_6 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8:gsub_0 |
| 0, // DTriple_with_dsub_2_in_DPR_8:gsub_1 |
| 0, // DTriple_with_dsub_2_in_DPR_8:qqsub_0 |
| 0, // DTriple_with_dsub_2_in_DPR_8:qqsub_1 |
| 74, // DTriple_with_dsub_2_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8:qsub_1 |
| 0, // DTriple_with_dsub_2_in_DPR_8:qsub_2 |
| 0, // DTriple_with_dsub_2_in_DPR_8:qsub_3 |
| 8, // DTriple_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_10 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_11 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_12 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_14 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_15 |
| 66, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 74, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTripleSpc_with_dsub_4_in_DPR_8 |
| 53, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_1 |
| 53, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_3 |
| 53, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_6 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_7 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:gsub_0 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:gsub_1 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:qqsub_0 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:qqsub_1 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_0 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_1 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_2 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:qsub_3 |
| 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_3 |
| 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_7 |
| 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8 |
| 8, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_10 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_11 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_12 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_13 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_14 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_15 |
| 66, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 66, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_dsub_7 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTripleSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 53, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8 |
| 52, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 52, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 71, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 8, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8 |
| 8, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8 |
| 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 3, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 65, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 73, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_qsub_0_in_QPR_8 |
| 53, // DTriple_with_qsub_0_in_QPR_8:dsub_0 -> DPR_8 |
| 53, // DTriple_with_qsub_0_in_QPR_8:dsub_1 -> DPR_8 |
| 52, // DTriple_with_qsub_0_in_QPR_8:dsub_2 -> DPR_VFP2 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_3 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_4 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_6 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR_8:gsub_0 |
| 0, // DTriple_with_qsub_0_in_QPR_8:gsub_1 |
| 0, // DTriple_with_qsub_0_in_QPR_8:qqsub_0 |
| 0, // DTriple_with_qsub_0_in_QPR_8:qqsub_1 |
| 75, // DTriple_with_qsub_0_in_QPR_8:qsub_0 -> QPR_8 |
| 0, // DTriple_with_qsub_0_in_QPR_8:qsub_1 |
| 0, // DTriple_with_qsub_0_in_QPR_8:qsub_2 |
| 0, // DTriple_with_qsub_0_in_QPR_8:qsub_3 |
| 8, // DTriple_with_qsub_0_in_QPR_8:ssub_0 -> SPR_8 |
| 8, // DTriple_with_qsub_0_in_QPR_8:ssub_1 -> SPR_8 |
| 8, // DTriple_with_qsub_0_in_QPR_8:ssub_2 -> SPR_8 |
| 8, // DTriple_with_qsub_0_in_QPR_8:ssub_3 -> SPR_8 |
| 3, // DTriple_with_qsub_0_in_QPR_8:ssub_4 -> SPR |
| 3, // DTriple_with_qsub_0_in_QPR_8:ssub_5 -> SPR |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_7 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_10 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_11 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_12 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_14 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_15 |
| 65, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 71, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 53, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_0 -> DPR_8 |
| 53, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_1 -> DPR_8 |
| 53, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_2 -> DPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_3 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_4 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_6 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:gsub_0 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:gsub_1 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qqsub_0 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qqsub_1 |
| 75, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_0 -> QPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_1 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_2 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:qsub_3 |
| 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_1 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_3 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4 -> SPR_8 |
| 8, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_5 -> SPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_10 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_11 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_12 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_14 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_15 |
| 66, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 74, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_0 -> DPR_8 |
| 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_1 -> DPR_8 |
| 53, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_2 -> DPR_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_3 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_4 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_6 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_0 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_1 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_0 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_1 |
| 74, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_1 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_2 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_3 |
| 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0 -> SPR_8 |
| 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_1 -> SPR_8 |
| 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2 -> SPR_8 |
| 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_3 -> SPR_8 |
| 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4 -> SPR_8 |
| 8, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_5 -> SPR_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_10 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_11 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_12 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_14 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_15 |
| 66, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 75, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc |
| 51, // DQuadSpc:dsub_0 -> DPR |
| 0, // DQuadSpc:dsub_1 |
| 51, // DQuadSpc:dsub_2 -> DPR |
| 0, // DQuadSpc:dsub_3 |
| 51, // DQuadSpc:dsub_4 -> DPR |
| 0, // DQuadSpc:dsub_5 |
| 0, // DQuadSpc:dsub_6 |
| 0, // DQuadSpc:dsub_7 |
| 0, // DQuadSpc:gsub_0 |
| 0, // DQuadSpc:gsub_1 |
| 0, // DQuadSpc:qqsub_0 |
| 0, // DQuadSpc:qqsub_1 |
| 0, // DQuadSpc:qsub_0 |
| 0, // DQuadSpc:qsub_1 |
| 0, // DQuadSpc:qsub_2 |
| 0, // DQuadSpc:qsub_3 |
| 3, // DQuadSpc:ssub_0 -> SPR |
| 3, // DQuadSpc:ssub_1 -> SPR |
| 0, // DQuadSpc:ssub_2 |
| 0, // DQuadSpc:ssub_3 |
| 3, // DQuadSpc:ssub_4 -> SPR |
| 3, // DQuadSpc:ssub_5 -> SPR |
| 0, // DQuadSpc:ssub_6 |
| 0, // DQuadSpc:ssub_7 |
| 3, // DQuadSpc:ssub_8 -> SPR |
| 3, // DQuadSpc:ssub_9 -> SPR |
| 0, // DQuadSpc:ssub_10 |
| 0, // DQuadSpc:ssub_11 |
| 0, // DQuadSpc:ssub_12 |
| 0, // DQuadSpc:ssub_13 |
| 0, // DQuadSpc:ssub_14 |
| 0, // DQuadSpc:ssub_15 |
| 62, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 0, // DQuadSpc:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuadSpc:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 62, // DQuadSpc:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 0, // DQuadSpc:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc:ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuadSpc:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc:dsub_5_dsub_7 |
| 0, // DQuadSpc:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuadSpc:dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_ssub_0 |
| 4, // DQuadSpc_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 0, // DQuadSpc_with_ssub_0:dsub_1 |
| 51, // DQuadSpc_with_ssub_0:dsub_2 -> DPR |
| 0, // DQuadSpc_with_ssub_0:dsub_3 |
| 51, // DQuadSpc_with_ssub_0:dsub_4 -> DPR |
| 0, // DQuadSpc_with_ssub_0:dsub_5 |
| 0, // DQuadSpc_with_ssub_0:dsub_6 |
| 0, // DQuadSpc_with_ssub_0:dsub_7 |
| 0, // DQuadSpc_with_ssub_0:gsub_0 |
| 0, // DQuadSpc_with_ssub_0:gsub_1 |
| 0, // DQuadSpc_with_ssub_0:qqsub_0 |
| 0, // DQuadSpc_with_ssub_0:qqsub_1 |
| 0, // DQuadSpc_with_ssub_0:qsub_0 |
| 0, // DQuadSpc_with_ssub_0:qsub_1 |
| 0, // DQuadSpc_with_ssub_0:qsub_2 |
| 0, // DQuadSpc_with_ssub_0:qsub_3 |
| 3, // DQuadSpc_with_ssub_0:ssub_0 -> SPR |
| 3, // DQuadSpc_with_ssub_0:ssub_1 -> SPR |
| 0, // DQuadSpc_with_ssub_0:ssub_2 |
| 0, // DQuadSpc_with_ssub_0:ssub_3 |
| 3, // DQuadSpc_with_ssub_0:ssub_4 -> SPR |
| 3, // DQuadSpc_with_ssub_0:ssub_5 -> SPR |
| 0, // DQuadSpc_with_ssub_0:ssub_6 |
| 0, // DQuadSpc_with_ssub_0:ssub_7 |
| 3, // DQuadSpc_with_ssub_0:ssub_8 -> SPR |
| 3, // DQuadSpc_with_ssub_0:ssub_9 -> SPR |
| 0, // DQuadSpc_with_ssub_0:ssub_10 |
| 0, // DQuadSpc_with_ssub_0:ssub_11 |
| 0, // DQuadSpc_with_ssub_0:ssub_12 |
| 0, // DQuadSpc_with_ssub_0:ssub_13 |
| 0, // DQuadSpc_with_ssub_0:ssub_14 |
| 0, // DQuadSpc_with_ssub_0:ssub_15 |
| 63, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 62, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_0:dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuadSpc_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_ssub_4 |
| 52, // DQuadSpc_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 0, // DQuadSpc_with_ssub_4:dsub_1 |
| 52, // DQuadSpc_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 0, // DQuadSpc_with_ssub_4:dsub_3 |
| 51, // DQuadSpc_with_ssub_4:dsub_4 -> DPR |
| 0, // DQuadSpc_with_ssub_4:dsub_5 |
| 0, // DQuadSpc_with_ssub_4:dsub_6 |
| 0, // DQuadSpc_with_ssub_4:dsub_7 |
| 0, // DQuadSpc_with_ssub_4:gsub_0 |
| 0, // DQuadSpc_with_ssub_4:gsub_1 |
| 0, // DQuadSpc_with_ssub_4:qqsub_0 |
| 0, // DQuadSpc_with_ssub_4:qqsub_1 |
| 0, // DQuadSpc_with_ssub_4:qsub_0 |
| 0, // DQuadSpc_with_ssub_4:qsub_1 |
| 0, // DQuadSpc_with_ssub_4:qsub_2 |
| 0, // DQuadSpc_with_ssub_4:qsub_3 |
| 3, // DQuadSpc_with_ssub_4:ssub_0 -> SPR |
| 3, // DQuadSpc_with_ssub_4:ssub_1 -> SPR |
| 0, // DQuadSpc_with_ssub_4:ssub_2 |
| 0, // DQuadSpc_with_ssub_4:ssub_3 |
| 3, // DQuadSpc_with_ssub_4:ssub_4 -> SPR |
| 3, // DQuadSpc_with_ssub_4:ssub_5 -> SPR |
| 0, // DQuadSpc_with_ssub_4:ssub_6 |
| 0, // DQuadSpc_with_ssub_4:ssub_7 |
| 3, // DQuadSpc_with_ssub_4:ssub_8 -> SPR |
| 3, // DQuadSpc_with_ssub_4:ssub_9 -> SPR |
| 0, // DQuadSpc_with_ssub_4:ssub_10 |
| 0, // DQuadSpc_with_ssub_4:ssub_11 |
| 0, // DQuadSpc_with_ssub_4:ssub_12 |
| 0, // DQuadSpc_with_ssub_4:ssub_13 |
| 0, // DQuadSpc_with_ssub_4:ssub_14 |
| 0, // DQuadSpc_with_ssub_4:ssub_15 |
| 64, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 63, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0 |
| 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_4:dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuadSpc_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_ssub_8 |
| 52, // DQuadSpc_with_ssub_8:dsub_0 -> DPR_VFP2 |
| 0, // DQuadSpc_with_ssub_8:dsub_1 |
| 52, // DQuadSpc_with_ssub_8:dsub_2 -> DPR_VFP2 |
| 0, // DQuadSpc_with_ssub_8:dsub_3 |
| 52, // DQuadSpc_with_ssub_8:dsub_4 -> DPR_VFP2 |
| 0, // DQuadSpc_with_ssub_8:dsub_5 |
| 0, // DQuadSpc_with_ssub_8:dsub_6 |
| 0, // DQuadSpc_with_ssub_8:dsub_7 |
| 0, // DQuadSpc_with_ssub_8:gsub_0 |
| 0, // DQuadSpc_with_ssub_8:gsub_1 |
| 0, // DQuadSpc_with_ssub_8:qqsub_0 |
| 0, // DQuadSpc_with_ssub_8:qqsub_1 |
| 0, // DQuadSpc_with_ssub_8:qsub_0 |
| 0, // DQuadSpc_with_ssub_8:qsub_1 |
| 0, // DQuadSpc_with_ssub_8:qsub_2 |
| 0, // DQuadSpc_with_ssub_8:qsub_3 |
| 3, // DQuadSpc_with_ssub_8:ssub_0 -> SPR |
| 3, // DQuadSpc_with_ssub_8:ssub_1 -> SPR |
| 0, // DQuadSpc_with_ssub_8:ssub_2 |
| 0, // DQuadSpc_with_ssub_8:ssub_3 |
| 3, // DQuadSpc_with_ssub_8:ssub_4 -> SPR |
| 3, // DQuadSpc_with_ssub_8:ssub_5 -> SPR |
| 0, // DQuadSpc_with_ssub_8:ssub_6 |
| 0, // DQuadSpc_with_ssub_8:ssub_7 |
| 3, // DQuadSpc_with_ssub_8:ssub_8 -> SPR |
| 3, // DQuadSpc_with_ssub_8:ssub_9 -> SPR |
| 0, // DQuadSpc_with_ssub_8:ssub_10 |
| 0, // DQuadSpc_with_ssub_8:ssub_11 |
| 0, // DQuadSpc_with_ssub_8:ssub_12 |
| 0, // DQuadSpc_with_ssub_8:ssub_13 |
| 0, // DQuadSpc_with_ssub_8:ssub_14 |
| 0, // DQuadSpc_with_ssub_8:ssub_15 |
| 64, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 64, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_8:dsub_5_dsub_7 |
| 0, // DQuadSpc_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuadSpc_with_ssub_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_dsub_0_in_DPR_8 |
| 20, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_1 |
| 52, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_3 |
| 52, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_6 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_7 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:gsub_0 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:gsub_1 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:qqsub_0 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:qqsub_1 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_0 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_1 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_2 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:qsub_3 |
| 8, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_3 |
| 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_7 |
| 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8 -> SPR |
| 3, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_9 -> SPR |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_10 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_11 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_12 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_13 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_14 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_15 |
| 65, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 64, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_dsub_2_in_DPR_8 |
| 53, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_1 |
| 53, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_3 |
| 52, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_6 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_7 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:gsub_0 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:gsub_1 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:qqsub_0 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:qqsub_1 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_0 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_1 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_2 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:qsub_3 |
| 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_3 |
| 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_7 |
| 3, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8 -> SPR |
| 3, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_9 -> SPR |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_10 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_11 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_12 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_13 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_14 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_15 |
| 66, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 65, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuadSpc_with_dsub_4_in_DPR_8 |
| 53, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_1 |
| 53, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_3 |
| 53, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_6 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_7 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:gsub_0 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:gsub_1 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:qqsub_0 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:qqsub_1 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_0 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_1 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_2 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:qsub_3 |
| 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_3 |
| 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_7 |
| 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8 |
| 8, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_10 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_11 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_12 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_13 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_14 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_15 |
| 66, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 66, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_dsub_7 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuadSpc_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad |
| 51, // DQuad:dsub_0 -> DPR |
| 51, // DQuad:dsub_1 -> DPR |
| 51, // DQuad:dsub_2 -> DPR |
| 51, // DQuad:dsub_3 -> DPR |
| 0, // DQuad:dsub_4 |
| 0, // DQuad:dsub_5 |
| 0, // DQuad:dsub_6 |
| 0, // DQuad:dsub_7 |
| 0, // DQuad:gsub_0 |
| 0, // DQuad:gsub_1 |
| 0, // DQuad:qqsub_0 |
| 0, // DQuad:qqsub_1 |
| 67, // DQuad:qsub_0 -> DPair |
| 67, // DQuad:qsub_1 -> DPair |
| 0, // DQuad:qsub_2 |
| 0, // DQuad:qsub_3 |
| 3, // DQuad:ssub_0 -> SPR |
| 3, // DQuad:ssub_1 -> SPR |
| 3, // DQuad:ssub_2 -> SPR |
| 3, // DQuad:ssub_3 -> SPR |
| 3, // DQuad:ssub_4 -> SPR |
| 3, // DQuad:ssub_5 -> SPR |
| 3, // DQuad:ssub_6 -> SPR |
| 3, // DQuad:ssub_7 -> SPR |
| 0, // DQuad:ssub_8 |
| 0, // DQuad:ssub_9 |
| 0, // DQuad:ssub_10 |
| 0, // DQuad:ssub_11 |
| 0, // DQuad:ssub_12 |
| 0, // DQuad:ssub_13 |
| 0, // DQuad:ssub_14 |
| 0, // DQuad:ssub_15 |
| 62, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 76, // DQuad:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple |
| 62, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 76, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple |
| 67, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 0, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad:dsub_5_dsub_7 |
| 0, // DQuad:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_0 |
| 4, // DQuad_with_ssub_0:dsub_0 -> FPWithVPR_with_ssub_0 |
| 51, // DQuad_with_ssub_0:dsub_1 -> DPR |
| 51, // DQuad_with_ssub_0:dsub_2 -> DPR |
| 51, // DQuad_with_ssub_0:dsub_3 -> DPR |
| 0, // DQuad_with_ssub_0:dsub_4 |
| 0, // DQuad_with_ssub_0:dsub_5 |
| 0, // DQuad_with_ssub_0:dsub_6 |
| 0, // DQuad_with_ssub_0:dsub_7 |
| 0, // DQuad_with_ssub_0:gsub_0 |
| 0, // DQuad_with_ssub_0:gsub_1 |
| 0, // DQuad_with_ssub_0:qqsub_0 |
| 0, // DQuad_with_ssub_0:qqsub_1 |
| 68, // DQuad_with_ssub_0:qsub_0 -> DPair_with_ssub_0 |
| 67, // DQuad_with_ssub_0:qsub_1 -> DPair |
| 0, // DQuad_with_ssub_0:qsub_2 |
| 0, // DQuad_with_ssub_0:qsub_3 |
| 3, // DQuad_with_ssub_0:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_0:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_0:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_0:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_0:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_0:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_0:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_0:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_0:ssub_8 |
| 0, // DQuad_with_ssub_0:ssub_9 |
| 0, // DQuad_with_ssub_0:ssub_10 |
| 0, // DQuad_with_ssub_0:ssub_11 |
| 0, // DQuad_with_ssub_0:ssub_12 |
| 0, // DQuad_with_ssub_0:ssub_13 |
| 0, // DQuad_with_ssub_0:ssub_14 |
| 0, // DQuad_with_ssub_0:ssub_15 |
| 63, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 79, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0 |
| 62, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 76, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple |
| 67, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 0, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_0:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2 |
| 52, // DQuad_with_ssub_2:dsub_0 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_2:dsub_1 -> DPR_VFP2 |
| 51, // DQuad_with_ssub_2:dsub_2 -> DPR |
| 51, // DQuad_with_ssub_2:dsub_3 -> DPR |
| 0, // DQuad_with_ssub_2:dsub_4 |
| 0, // DQuad_with_ssub_2:dsub_5 |
| 0, // DQuad_with_ssub_2:dsub_6 |
| 0, // DQuad_with_ssub_2:dsub_7 |
| 0, // DQuad_with_ssub_2:gsub_0 |
| 0, // DQuad_with_ssub_2:gsub_1 |
| 0, // DQuad_with_ssub_2:qqsub_0 |
| 0, // DQuad_with_ssub_2:qqsub_1 |
| 70, // DQuad_with_ssub_2:qsub_0 -> DPair_with_ssub_2 |
| 67, // DQuad_with_ssub_2:qsub_1 -> DPair |
| 0, // DQuad_with_ssub_2:qsub_2 |
| 0, // DQuad_with_ssub_2:qsub_3 |
| 3, // DQuad_with_ssub_2:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_2:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_2:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_2:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_2:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_2:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_2:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_2:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_2:ssub_8 |
| 0, // DQuad_with_ssub_2:ssub_9 |
| 0, // DQuad_with_ssub_2:ssub_10 |
| 0, // DQuad_with_ssub_2:ssub_11 |
| 0, // DQuad_with_ssub_2:ssub_12 |
| 0, // DQuad_with_ssub_2:ssub_13 |
| 0, // DQuad_with_ssub_2:ssub_14 |
| 0, // DQuad_with_ssub_2:ssub_15 |
| 63, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 81, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2 |
| 63, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 79, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0 |
| 68, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 0, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_2:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_2:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QQPR |
| 51, // QQPR:dsub_0 -> DPR |
| 51, // QQPR:dsub_1 -> DPR |
| 51, // QQPR:dsub_2 -> DPR |
| 51, // QQPR:dsub_3 -> DPR |
| 0, // QQPR:dsub_4 |
| 0, // QQPR:dsub_5 |
| 0, // QQPR:dsub_6 |
| 0, // QQPR:dsub_7 |
| 0, // QQPR:gsub_0 |
| 0, // QQPR:gsub_1 |
| 0, // QQPR:qqsub_0 |
| 0, // QQPR:qqsub_1 |
| 69, // QQPR:qsub_0 -> QPR |
| 69, // QQPR:qsub_1 -> QPR |
| 0, // QQPR:qsub_2 |
| 0, // QQPR:qsub_3 |
| 3, // QQPR:ssub_0 -> SPR |
| 3, // QQPR:ssub_1 -> SPR |
| 3, // QQPR:ssub_2 -> SPR |
| 3, // QQPR:ssub_3 -> SPR |
| 3, // QQPR:ssub_4 -> SPR |
| 3, // QQPR:ssub_5 -> SPR |
| 3, // QQPR:ssub_6 -> SPR |
| 3, // QQPR:ssub_7 -> SPR |
| 0, // QQPR:ssub_8 |
| 0, // QQPR:ssub_9 |
| 0, // QQPR:ssub_10 |
| 0, // QQPR:ssub_11 |
| 0, // QQPR:ssub_12 |
| 0, // QQPR:ssub_13 |
| 0, // QQPR:ssub_14 |
| 0, // QQPR:ssub_15 |
| 62, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 80, // QQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 62, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 82, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 67, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 0, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // QQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // QQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QQPR:ssub_6_ssub_7_dsub_5 |
| 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // QQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // QQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // QQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // QQPR:dsub_5_dsub_7 |
| 0, // QQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // QQPR:dsub_5_ssub_12_ssub_13 |
| 0, // QQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR |
| 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 -> DPR |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 67, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair |
| 67, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 -> DPair |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 62, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 82, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 80, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR |
| 69, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_4 |
| 52, // DQuad_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_4:dsub_1 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 51, // DQuad_with_ssub_4:dsub_3 -> DPR |
| 0, // DQuad_with_ssub_4:dsub_4 |
| 0, // DQuad_with_ssub_4:dsub_5 |
| 0, // DQuad_with_ssub_4:dsub_6 |
| 0, // DQuad_with_ssub_4:dsub_7 |
| 0, // DQuad_with_ssub_4:gsub_0 |
| 0, // DQuad_with_ssub_4:gsub_1 |
| 0, // DQuad_with_ssub_4:qqsub_0 |
| 0, // DQuad_with_ssub_4:qqsub_1 |
| 70, // DQuad_with_ssub_4:qsub_0 -> DPair_with_ssub_2 |
| 68, // DQuad_with_ssub_4:qsub_1 -> DPair_with_ssub_0 |
| 0, // DQuad_with_ssub_4:qsub_2 |
| 0, // DQuad_with_ssub_4:qsub_3 |
| 3, // DQuad_with_ssub_4:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_4:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_4:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_4:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_4:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_4:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_4:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_4:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_4:ssub_8 |
| 0, // DQuad_with_ssub_4:ssub_9 |
| 0, // DQuad_with_ssub_4:ssub_10 |
| 0, // DQuad_with_ssub_4:ssub_11 |
| 0, // DQuad_with_ssub_4:ssub_12 |
| 0, // DQuad_with_ssub_4:ssub_13 |
| 0, // DQuad_with_ssub_4:ssub_14 |
| 0, // DQuad_with_ssub_4:ssub_15 |
| 64, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 84, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 63, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 81, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2 |
| 70, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 0, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_4:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_4:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_4:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_6 |
| 52, // DQuad_with_ssub_6:dsub_0 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_6:dsub_1 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_6:dsub_2 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_6:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_ssub_6:dsub_4 |
| 0, // DQuad_with_ssub_6:dsub_5 |
| 0, // DQuad_with_ssub_6:dsub_6 |
| 0, // DQuad_with_ssub_6:dsub_7 |
| 0, // DQuad_with_ssub_6:gsub_0 |
| 0, // DQuad_with_ssub_6:gsub_1 |
| 0, // DQuad_with_ssub_6:qqsub_0 |
| 0, // DQuad_with_ssub_6:qqsub_1 |
| 70, // DQuad_with_ssub_6:qsub_0 -> DPair_with_ssub_2 |
| 70, // DQuad_with_ssub_6:qsub_1 -> DPair_with_ssub_2 |
| 0, // DQuad_with_ssub_6:qsub_2 |
| 0, // DQuad_with_ssub_6:qsub_3 |
| 3, // DQuad_with_ssub_6:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_6:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_6:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_6:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_6:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_6:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_6:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_6:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_6:ssub_8 |
| 0, // DQuad_with_ssub_6:ssub_9 |
| 0, // DQuad_with_ssub_6:ssub_10 |
| 0, // DQuad_with_ssub_6:ssub_11 |
| 0, // DQuad_with_ssub_6:ssub_12 |
| 0, // DQuad_with_ssub_6:ssub_13 |
| 0, // DQuad_with_ssub_6:ssub_14 |
| 0, // DQuad_with_ssub_6:ssub_15 |
| 64, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 84, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4 |
| 64, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 84, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4 |
| 70, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 0, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_6:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_6:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_6:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_6:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_0_in_DPR_8 |
| 20, // DQuad_with_dsub_0_in_DPR_8:dsub_0 -> FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| 52, // DQuad_with_dsub_0_in_DPR_8:dsub_1 -> DPR_VFP2 |
| 52, // DQuad_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 52, // DQuad_with_dsub_0_in_DPR_8:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_dsub_0_in_DPR_8:dsub_4 |
| 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8:dsub_6 |
| 0, // DQuad_with_dsub_0_in_DPR_8:dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8:gsub_0 |
| 0, // DQuad_with_dsub_0_in_DPR_8:gsub_1 |
| 0, // DQuad_with_dsub_0_in_DPR_8:qqsub_0 |
| 0, // DQuad_with_dsub_0_in_DPR_8:qqsub_1 |
| 71, // DQuad_with_dsub_0_in_DPR_8:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 70, // DQuad_with_dsub_0_in_DPR_8:qsub_1 -> DPair_with_ssub_2 |
| 0, // DQuad_with_dsub_0_in_DPR_8:qsub_2 |
| 0, // DQuad_with_dsub_0_in_DPR_8:qsub_3 |
| 8, // DQuad_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DQuad_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 3, // DQuad_with_dsub_0_in_DPR_8:ssub_2 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8:ssub_3 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8:ssub_6 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8:ssub_7 -> SPR |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_10 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_11 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_12 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_14 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_15 |
| 65, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 87, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8 |
| 64, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 84, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4 |
| 70, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_qsub_0_in_MQPR |
| 52, // DQuad_with_qsub_0_in_MQPR:dsub_0 -> DPR_VFP2 |
| 52, // DQuad_with_qsub_0_in_MQPR:dsub_1 -> DPR_VFP2 |
| 51, // DQuad_with_qsub_0_in_MQPR:dsub_2 -> DPR |
| 51, // DQuad_with_qsub_0_in_MQPR:dsub_3 -> DPR |
| 0, // DQuad_with_qsub_0_in_MQPR:dsub_4 |
| 0, // DQuad_with_qsub_0_in_MQPR:dsub_5 |
| 0, // DQuad_with_qsub_0_in_MQPR:dsub_6 |
| 0, // DQuad_with_qsub_0_in_MQPR:dsub_7 |
| 0, // DQuad_with_qsub_0_in_MQPR:gsub_0 |
| 0, // DQuad_with_qsub_0_in_MQPR:gsub_1 |
| 0, // DQuad_with_qsub_0_in_MQPR:qqsub_0 |
| 0, // DQuad_with_qsub_0_in_MQPR:qqsub_1 |
| 72, // DQuad_with_qsub_0_in_MQPR:qsub_0 -> MQPR |
| 69, // DQuad_with_qsub_0_in_MQPR:qsub_1 -> QPR |
| 0, // DQuad_with_qsub_0_in_MQPR:qsub_2 |
| 0, // DQuad_with_qsub_0_in_MQPR:qsub_3 |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_0 -> SPR |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_1 -> SPR |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_2 -> SPR |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_3 -> SPR |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_4 -> SPR |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_5 -> SPR |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_6 -> SPR |
| 3, // DQuad_with_qsub_0_in_MQPR:ssub_7 -> SPR |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_8 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_9 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_10 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_11 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_12 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_13 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_14 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_15 |
| 63, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 88, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 63, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 89, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 68, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_MQPR:dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_qsub_0_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 52, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_0 -> DPR_VFP2 |
| 51, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_1 -> DPR |
| 51, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_2 -> DPR |
| 51, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_3 -> DPR |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_4 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_6 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_7 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_0 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:gsub_1 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_0 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qqsub_1 |
| 68, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_0 -> DPair_with_ssub_0 |
| 67, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_1 -> DPair |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_2 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:qsub_3 |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_9 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_10 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_11 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_12 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_13 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_14 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_15 |
| 63, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 89, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 80, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR |
| 69, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_1_in_DPR_8 |
| 53, // DQuad_with_dsub_1_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // DQuad_with_dsub_1_in_DPR_8:dsub_1 -> DPR_8 |
| 52, // DQuad_with_dsub_1_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 52, // DQuad_with_dsub_1_in_DPR_8:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_dsub_1_in_DPR_8:dsub_4 |
| 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5 |
| 0, // DQuad_with_dsub_1_in_DPR_8:dsub_6 |
| 0, // DQuad_with_dsub_1_in_DPR_8:dsub_7 |
| 0, // DQuad_with_dsub_1_in_DPR_8:gsub_0 |
| 0, // DQuad_with_dsub_1_in_DPR_8:gsub_1 |
| 0, // DQuad_with_dsub_1_in_DPR_8:qqsub_0 |
| 0, // DQuad_with_dsub_1_in_DPR_8:qqsub_1 |
| 74, // DQuad_with_dsub_1_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 70, // DQuad_with_dsub_1_in_DPR_8:qsub_1 -> DPair_with_ssub_2 |
| 0, // DQuad_with_dsub_1_in_DPR_8:qsub_2 |
| 0, // DQuad_with_dsub_1_in_DPR_8:qsub_3 |
| 8, // DQuad_with_dsub_1_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DQuad_with_dsub_1_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // DQuad_with_dsub_1_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // DQuad_with_dsub_1_in_DPR_8:ssub_3 -> SPR_8 |
| 3, // DQuad_with_dsub_1_in_DPR_8:ssub_4 -> SPR |
| 3, // DQuad_with_dsub_1_in_DPR_8:ssub_5 -> SPR |
| 3, // DQuad_with_dsub_1_in_DPR_8:ssub_6 -> SPR |
| 3, // DQuad_with_dsub_1_in_DPR_8:ssub_7 -> SPR |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_9 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_10 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_11 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_12 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_13 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_14 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_15 |
| 65, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 90, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_1_in_DPR_8 |
| 65, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 87, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8 |
| 71, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_dsub_1_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_1_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 51, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 70, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2 |
| 68, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_0 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 64, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 91, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 63, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 88, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_MQPR |
| 73, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // MQQPR |
| 52, // MQQPR:dsub_0 -> DPR_VFP2 |
| 52, // MQQPR:dsub_1 -> DPR_VFP2 |
| 52, // MQQPR:dsub_2 -> DPR_VFP2 |
| 52, // MQQPR:dsub_3 -> DPR_VFP2 |
| 0, // MQQPR:dsub_4 |
| 0, // MQQPR:dsub_5 |
| 0, // MQQPR:dsub_6 |
| 0, // MQQPR:dsub_7 |
| 0, // MQQPR:gsub_0 |
| 0, // MQQPR:gsub_1 |
| 0, // MQQPR:qqsub_0 |
| 0, // MQQPR:qqsub_1 |
| 73, // MQQPR:qsub_0 -> QPR_VFP2 |
| 73, // MQQPR:qsub_1 -> QPR_VFP2 |
| 0, // MQQPR:qsub_2 |
| 0, // MQQPR:qsub_3 |
| 3, // MQQPR:ssub_0 -> SPR |
| 3, // MQQPR:ssub_1 -> SPR |
| 3, // MQQPR:ssub_2 -> SPR |
| 3, // MQQPR:ssub_3 -> SPR |
| 3, // MQQPR:ssub_4 -> SPR |
| 3, // MQQPR:ssub_5 -> SPR |
| 3, // MQQPR:ssub_6 -> SPR |
| 3, // MQQPR:ssub_7 -> SPR |
| 0, // MQQPR:ssub_8 |
| 0, // MQQPR:ssub_9 |
| 0, // MQQPR:ssub_10 |
| 0, // MQQPR:ssub_11 |
| 0, // MQQPR:ssub_12 |
| 0, // MQQPR:ssub_13 |
| 0, // MQQPR:ssub_14 |
| 0, // MQQPR:ssub_15 |
| 64, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 92, // MQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 64, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 91, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 70, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 0, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // MQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // MQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // MQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // MQQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // MQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // MQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // MQQPR:ssub_6_ssub_7_dsub_5 |
| 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // MQQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // MQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // MQQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // MQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // MQQPR:dsub_5_dsub_7 |
| 0, // MQQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // MQQPR:dsub_5_ssub_12_ssub_13 |
| 0, // MQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_2_in_DPR_8 |
| 53, // DQuad_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // DQuad_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 53, // DQuad_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 52, // DQuad_with_dsub_2_in_DPR_8:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_dsub_2_in_DPR_8:dsub_4 |
| 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5 |
| 0, // DQuad_with_dsub_2_in_DPR_8:dsub_6 |
| 0, // DQuad_with_dsub_2_in_DPR_8:dsub_7 |
| 0, // DQuad_with_dsub_2_in_DPR_8:gsub_0 |
| 0, // DQuad_with_dsub_2_in_DPR_8:gsub_1 |
| 0, // DQuad_with_dsub_2_in_DPR_8:qqsub_0 |
| 0, // DQuad_with_dsub_2_in_DPR_8:qqsub_1 |
| 74, // DQuad_with_dsub_2_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 71, // DQuad_with_dsub_2_in_DPR_8:qsub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DQuad_with_dsub_2_in_DPR_8:qsub_2 |
| 0, // DQuad_with_dsub_2_in_DPR_8:qsub_3 |
| 8, // DQuad_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DQuad_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // DQuad_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // DQuad_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 8, // DQuad_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DQuad_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 3, // DQuad_with_dsub_2_in_DPR_8:ssub_6 -> SPR |
| 3, // DQuad_with_dsub_2_in_DPR_8:ssub_7 -> SPR |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_9 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_10 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_11 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_12 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_13 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_14 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_15 |
| 66, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 94, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 65, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 90, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_1_in_DPR_8 |
| 74, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 52, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 70, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_ssub_2 |
| 70, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_2 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 64, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 91, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 92, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 73, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_3_in_DPR_8 |
| 53, // DQuad_with_dsub_3_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // DQuad_with_dsub_3_in_DPR_8:dsub_1 -> DPR_8 |
| 53, // DQuad_with_dsub_3_in_DPR_8:dsub_2 -> DPR_8 |
| 53, // DQuad_with_dsub_3_in_DPR_8:dsub_3 -> DPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8:dsub_4 |
| 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8:dsub_6 |
| 0, // DQuad_with_dsub_3_in_DPR_8:dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8:gsub_0 |
| 0, // DQuad_with_dsub_3_in_DPR_8:gsub_1 |
| 0, // DQuad_with_dsub_3_in_DPR_8:qqsub_0 |
| 0, // DQuad_with_dsub_3_in_DPR_8:qqsub_1 |
| 74, // DQuad_with_dsub_3_in_DPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 74, // DQuad_with_dsub_3_in_DPR_8:qsub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8:qsub_2 |
| 0, // DQuad_with_dsub_3_in_DPR_8:qsub_3 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_3 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_5 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_6 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8:ssub_7 -> SPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_10 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_11 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_12 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_14 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_15 |
| 66, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 94, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8 |
| 66, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 94, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_2_in_DPR_8 |
| 74, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 53, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8 |
| 52, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_VFP2 |
| 52, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_VFP2 |
| 52, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 71, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_0_in_DPR_8 |
| 70, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_ssub_2 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 8, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8 |
| 8, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8 |
| 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR |
| 3, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 65, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 96, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 92, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 73, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_VFP2 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_qsub_0_in_QPR_8 |
| 53, // DQuad_with_qsub_0_in_QPR_8:dsub_0 -> DPR_8 |
| 53, // DQuad_with_qsub_0_in_QPR_8:dsub_1 -> DPR_8 |
| 52, // DQuad_with_qsub_0_in_QPR_8:dsub_2 -> DPR_VFP2 |
| 52, // DQuad_with_qsub_0_in_QPR_8:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_qsub_0_in_QPR_8:dsub_4 |
| 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5 |
| 0, // DQuad_with_qsub_0_in_QPR_8:dsub_6 |
| 0, // DQuad_with_qsub_0_in_QPR_8:dsub_7 |
| 0, // DQuad_with_qsub_0_in_QPR_8:gsub_0 |
| 0, // DQuad_with_qsub_0_in_QPR_8:gsub_1 |
| 0, // DQuad_with_qsub_0_in_QPR_8:qqsub_0 |
| 0, // DQuad_with_qsub_0_in_QPR_8:qqsub_1 |
| 75, // DQuad_with_qsub_0_in_QPR_8:qsub_0 -> QPR_8 |
| 73, // DQuad_with_qsub_0_in_QPR_8:qsub_1 -> QPR_VFP2 |
| 0, // DQuad_with_qsub_0_in_QPR_8:qsub_2 |
| 0, // DQuad_with_qsub_0_in_QPR_8:qsub_3 |
| 8, // DQuad_with_qsub_0_in_QPR_8:ssub_0 -> SPR_8 |
| 8, // DQuad_with_qsub_0_in_QPR_8:ssub_1 -> SPR_8 |
| 8, // DQuad_with_qsub_0_in_QPR_8:ssub_2 -> SPR_8 |
| 8, // DQuad_with_qsub_0_in_QPR_8:ssub_3 -> SPR_8 |
| 3, // DQuad_with_qsub_0_in_QPR_8:ssub_4 -> SPR |
| 3, // DQuad_with_qsub_0_in_QPR_8:ssub_5 -> SPR |
| 3, // DQuad_with_qsub_0_in_QPR_8:ssub_6 -> SPR |
| 3, // DQuad_with_qsub_0_in_QPR_8:ssub_7 -> SPR |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_8 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_9 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_10 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_11 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_12 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_13 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_14 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_15 |
| 65, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 97, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 65, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 96, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 71, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_qsub_0_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_0_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_qsub_1_in_QPR_8 |
| 53, // DQuad_with_qsub_1_in_QPR_8:dsub_0 -> DPR_8 |
| 53, // DQuad_with_qsub_1_in_QPR_8:dsub_1 -> DPR_8 |
| 53, // DQuad_with_qsub_1_in_QPR_8:dsub_2 -> DPR_8 |
| 53, // DQuad_with_qsub_1_in_QPR_8:dsub_3 -> DPR_8 |
| 0, // DQuad_with_qsub_1_in_QPR_8:dsub_4 |
| 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5 |
| 0, // DQuad_with_qsub_1_in_QPR_8:dsub_6 |
| 0, // DQuad_with_qsub_1_in_QPR_8:dsub_7 |
| 0, // DQuad_with_qsub_1_in_QPR_8:gsub_0 |
| 0, // DQuad_with_qsub_1_in_QPR_8:gsub_1 |
| 0, // DQuad_with_qsub_1_in_QPR_8:qqsub_0 |
| 0, // DQuad_with_qsub_1_in_QPR_8:qqsub_1 |
| 75, // DQuad_with_qsub_1_in_QPR_8:qsub_0 -> QPR_8 |
| 75, // DQuad_with_qsub_1_in_QPR_8:qsub_1 -> QPR_8 |
| 0, // DQuad_with_qsub_1_in_QPR_8:qsub_2 |
| 0, // DQuad_with_qsub_1_in_QPR_8:qsub_3 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_0 -> SPR_8 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_1 -> SPR_8 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_2 -> SPR_8 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_3 -> SPR_8 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_4 -> SPR_8 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_5 -> SPR_8 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_6 -> SPR_8 |
| 8, // DQuad_with_qsub_1_in_QPR_8:ssub_7 -> SPR_8 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_8 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_9 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_10 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_11 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_12 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_13 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_14 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_15 |
| 66, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 66, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 74, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5_dsub_7 |
| 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_qsub_1_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_qsub_1_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_0 -> DPR_8 |
| 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_1 -> DPR_8 |
| 53, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_2 -> DPR_8 |
| 52, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_3 -> DPR_VFP2 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_4 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_6 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_0 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:gsub_1 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_0 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qqsub_1 |
| 74, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 71, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_1 -> DPair_with_dsub_0_in_DPR_8 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_2 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:qsub_3 |
| 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0 -> SPR_8 |
| 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_1 -> SPR_8 |
| 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2 -> SPR_8 |
| 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_3 -> SPR_8 |
| 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4 -> SPR_8 |
| 8, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_5 -> SPR_8 |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6 -> SPR |
| 3, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_7 -> SPR |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_10 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_11 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_12 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_14 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_15 |
| 66, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 65, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 97, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_qsub_0_in_QPR_8 |
| 75, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_0 -> DPR_8 |
| 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_1 -> DPR_8 |
| 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_2 -> DPR_8 |
| 53, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_3 -> DPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_4 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_6 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_0 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:gsub_1 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_0 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qqsub_1 |
| 74, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_0 -> DPair_with_dsub_1_in_DPR_8 |
| 74, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_1 -> DPair_with_dsub_1_in_DPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_2 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:qsub_3 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_1 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_3 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_5 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6 -> SPR_8 |
| 8, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_7 -> SPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_10 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_11 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_12 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_14 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_15 |
| 66, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 66, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 75, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> QPR_8 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13_dsub_7 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:dsub_5_ssub_12_ssub_13 |
| 0, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 |
| }, |
| { // QQQQPR |
| 51, // QQQQPR:dsub_0 -> DPR |
| 51, // QQQQPR:dsub_1 -> DPR |
| 51, // QQQQPR:dsub_2 -> DPR |
| 51, // QQQQPR:dsub_3 -> DPR |
| 51, // QQQQPR:dsub_4 -> DPR |
| 51, // QQQQPR:dsub_5 -> DPR |
| 51, // QQQQPR:dsub_6 -> DPR |
| 51, // QQQQPR:dsub_7 -> DPR |
| 0, // QQQQPR:gsub_0 |
| 0, // QQQQPR:gsub_1 |
| 110, // QQQQPR:qqsub_0 -> QQPR |
| 110, // QQQQPR:qqsub_1 -> QQPR |
| 69, // QQQQPR:qsub_0 -> QPR |
| 69, // QQQQPR:qsub_1 -> QPR |
| 69, // QQQQPR:qsub_2 -> QPR |
| 69, // QQQQPR:qsub_3 -> QPR |
| 3, // QQQQPR:ssub_0 -> SPR |
| 3, // QQQQPR:ssub_1 -> SPR |
| 3, // QQQQPR:ssub_2 -> SPR |
| 3, // QQQQPR:ssub_3 -> SPR |
| 3, // QQQQPR:ssub_4 -> SPR |
| 3, // QQQQPR:ssub_5 -> SPR |
| 3, // QQQQPR:ssub_6 -> SPR |
| 3, // QQQQPR:ssub_7 -> SPR |
| 3, // QQQQPR:ssub_8 -> SPR |
| 3, // QQQQPR:ssub_9 -> SPR |
| 3, // QQQQPR:ssub_10 -> SPR |
| 3, // QQQQPR:ssub_11 -> SPR |
| 3, // QQQQPR:ssub_12 -> SPR |
| 3, // QQQQPR:ssub_13 -> SPR |
| 3, // QQQQPR:ssub_14 -> SPR |
| 3, // QQQQPR:ssub_15 -> SPR |
| 62, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc |
| 80, // QQQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR |
| 62, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc |
| 82, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 67, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair |
| 100, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc |
| 0, // QQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 100, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc |
| 0, // QQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 111, // QQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // QQQQPR:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 80, // QQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR |
| 100, // QQQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc |
| 62, // QQQQPR:ssub_6_ssub_7_dsub_5 -> DPairSpc |
| 82, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 100, // QQQQPR:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc |
| 67, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair |
| 111, // QQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // QQQQPR:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc |
| 80, // QQQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR |
| 62, // QQQQPR:dsub_5_dsub_7 -> DPairSpc |
| 82, // QQQQPR:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 67, // QQQQPR:dsub_5_ssub_12_ssub_13 -> DPair |
| 110, // QQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQPR |
| }, |
| { // QQQQPR_with_ssub_0 |
| 52, // QQQQPR_with_ssub_0:dsub_0 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_0:dsub_1 -> DPR_VFP2 |
| 51, // QQQQPR_with_ssub_0:dsub_2 -> DPR |
| 51, // QQQQPR_with_ssub_0:dsub_3 -> DPR |
| 51, // QQQQPR_with_ssub_0:dsub_4 -> DPR |
| 51, // QQQQPR_with_ssub_0:dsub_5 -> DPR |
| 51, // QQQQPR_with_ssub_0:dsub_6 -> DPR |
| 51, // QQQQPR_with_ssub_0:dsub_7 -> DPR |
| 0, // QQQQPR_with_ssub_0:gsub_0 |
| 0, // QQQQPR_with_ssub_0:gsub_1 |
| 115, // QQQQPR_with_ssub_0:qqsub_0 -> DQuad_with_qsub_0_in_MQPR |
| 110, // QQQQPR_with_ssub_0:qqsub_1 -> QQPR |
| 72, // QQQQPR_with_ssub_0:qsub_0 -> MQPR |
| 69, // QQQQPR_with_ssub_0:qsub_1 -> QPR |
| 69, // QQQQPR_with_ssub_0:qsub_2 -> QPR |
| 69, // QQQQPR_with_ssub_0:qsub_3 -> QPR |
| 3, // QQQQPR_with_ssub_0:ssub_0 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_1 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_2 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_3 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_4 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_5 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_6 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_7 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_8 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_9 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_10 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_11 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_12 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_13 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_14 -> SPR |
| 3, // QQQQPR_with_ssub_0:ssub_15 -> SPR |
| 63, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_0 |
| 88, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_MQPR |
| 63, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_0 |
| 89, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 68, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_0 |
| 101, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_0 |
| 0, // QQQQPR_with_ssub_0:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 101, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_0 |
| 0, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 116, // QQQQPR_with_ssub_0:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc |
| 80, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR |
| 100, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc |
| 62, // QQQQPR_with_ssub_0:ssub_6_ssub_7_dsub_5 -> DPairSpc |
| 82, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 100, // QQQQPR_with_ssub_0:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc |
| 67, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair |
| 111, // QQQQPR_with_ssub_0:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // QQQQPR_with_ssub_0:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc |
| 80, // QQQQPR_with_ssub_0:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR |
| 62, // QQQQPR_with_ssub_0:dsub_5_dsub_7 -> DPairSpc |
| 82, // QQQQPR_with_ssub_0:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 67, // QQQQPR_with_ssub_0:dsub_5_ssub_12_ssub_13 -> DPair |
| 110, // QQQQPR_with_ssub_0:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> QQPR |
| }, |
| { // QQQQPR_with_ssub_4 |
| 52, // QQQQPR_with_ssub_4:dsub_0 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_4:dsub_1 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_4:dsub_2 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_4:dsub_3 -> DPR_VFP2 |
| 51, // QQQQPR_with_ssub_4:dsub_4 -> DPR |
| 51, // QQQQPR_with_ssub_4:dsub_5 -> DPR |
| 51, // QQQQPR_with_ssub_4:dsub_6 -> DPR |
| 51, // QQQQPR_with_ssub_4:dsub_7 -> DPR |
| 0, // QQQQPR_with_ssub_4:gsub_0 |
| 0, // QQQQPR_with_ssub_4:gsub_1 |
| 119, // QQQQPR_with_ssub_4:qqsub_0 -> MQQPR |
| 110, // QQQQPR_with_ssub_4:qqsub_1 -> QQPR |
| 73, // QQQQPR_with_ssub_4:qsub_0 -> QPR_VFP2 |
| 73, // QQQQPR_with_ssub_4:qsub_1 -> QPR_VFP2 |
| 69, // QQQQPR_with_ssub_4:qsub_2 -> QPR |
| 69, // QQQQPR_with_ssub_4:qsub_3 -> QPR |
| 3, // QQQQPR_with_ssub_4:ssub_0 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_1 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_2 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_3 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_4 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_5 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_6 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_7 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_8 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_9 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_10 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_11 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_12 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_13 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_14 -> SPR |
| 3, // QQQQPR_with_ssub_4:ssub_15 -> SPR |
| 64, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 92, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 64, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 91, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 70, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 102, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_4 |
| 0, // QQQQPR_with_ssub_4:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 102, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_4 |
| 0, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 118, // QQQQPR_with_ssub_4:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 63, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_0 |
| 88, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_MQPR |
| 101, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_0 |
| 63, // QQQQPR_with_ssub_4:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_0 |
| 89, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 101, // QQQQPR_with_ssub_4:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_0 |
| 68, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_0 |
| 116, // QQQQPR_with_ssub_4:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // QQQQPR_with_ssub_4:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc |
| 80, // QQQQPR_with_ssub_4:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR |
| 62, // QQQQPR_with_ssub_4:dsub_5_dsub_7 -> DPairSpc |
| 82, // QQQQPR_with_ssub_4:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 67, // QQQQPR_with_ssub_4:dsub_5_ssub_12_ssub_13 -> DPair |
| 115, // QQQQPR_with_ssub_4:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_0_in_MQPR |
| }, |
| { // QQQQPR_with_ssub_8 |
| 52, // QQQQPR_with_ssub_8:dsub_0 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_8:dsub_1 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_8:dsub_2 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_8:dsub_3 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_8:dsub_4 -> DPR_VFP2 |
| 52, // QQQQPR_with_ssub_8:dsub_5 -> DPR_VFP2 |
| 51, // QQQQPR_with_ssub_8:dsub_6 -> DPR |
| 51, // QQQQPR_with_ssub_8:dsub_7 -> DPR |
| 0, // QQQQPR_with_ssub_8:gsub_0 |
| 0, // QQQQPR_with_ssub_8:gsub_1 |
| 119, // QQQQPR_with_ssub_8:qqsub_0 -> MQQPR |
| 115, // QQQQPR_with_ssub_8:qqsub_1 -> DQuad_with_qsub_0_in_MQPR |
| 73, // QQQQPR_with_ssub_8:qsub_0 -> QPR_VFP2 |
| 73, // QQQQPR_with_ssub_8:qsub_1 -> QPR_VFP2 |
| 73, // QQQQPR_with_ssub_8:qsub_2 -> QPR_VFP2 |
| 69, // QQQQPR_with_ssub_8:qsub_3 -> QPR |
| 3, // QQQQPR_with_ssub_8:ssub_0 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_1 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_2 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_3 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_4 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_5 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_6 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_7 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_8 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_9 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_10 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_11 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_12 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_13 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_14 -> SPR |
| 3, // QQQQPR_with_ssub_8:ssub_15 -> SPR |
| 64, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 92, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 64, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 91, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 70, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 103, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8 |
| 0, // QQQQPR_with_ssub_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 103, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_8 |
| 0, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 121, // QQQQPR_with_ssub_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 92, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 102, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_4 |
| 64, // QQQQPR_with_ssub_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_4 |
| 91, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 102, // QQQQPR_with_ssub_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_4 |
| 70, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2 |
| 118, // QQQQPR_with_ssub_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 63, // QQQQPR_with_ssub_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_0 |
| 88, // QQQQPR_with_ssub_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_MQPR |
| 63, // QQQQPR_with_ssub_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_0 |
| 89, // QQQQPR_with_ssub_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 68, // QQQQPR_with_ssub_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_0 |
| 119, // QQQQPR_with_ssub_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR |
| }, |
| { // MQQQQPR |
| 52, // MQQQQPR:dsub_0 -> DPR_VFP2 |
| 52, // MQQQQPR:dsub_1 -> DPR_VFP2 |
| 52, // MQQQQPR:dsub_2 -> DPR_VFP2 |
| 52, // MQQQQPR:dsub_3 -> DPR_VFP2 |
| 52, // MQQQQPR:dsub_4 -> DPR_VFP2 |
| 52, // MQQQQPR:dsub_5 -> DPR_VFP2 |
| 52, // MQQQQPR:dsub_6 -> DPR_VFP2 |
| 52, // MQQQQPR:dsub_7 -> DPR_VFP2 |
| 0, // MQQQQPR:gsub_0 |
| 0, // MQQQQPR:gsub_1 |
| 119, // MQQQQPR:qqsub_0 -> MQQPR |
| 119, // MQQQQPR:qqsub_1 -> MQQPR |
| 73, // MQQQQPR:qsub_0 -> QPR_VFP2 |
| 73, // MQQQQPR:qsub_1 -> QPR_VFP2 |
| 73, // MQQQQPR:qsub_2 -> QPR_VFP2 |
| 73, // MQQQQPR:qsub_3 -> QPR_VFP2 |
| 3, // MQQQQPR:ssub_0 -> SPR |
| 3, // MQQQQPR:ssub_1 -> SPR |
| 3, // MQQQQPR:ssub_2 -> SPR |
| 3, // MQQQQPR:ssub_3 -> SPR |
| 3, // MQQQQPR:ssub_4 -> SPR |
| 3, // MQQQQPR:ssub_5 -> SPR |
| 3, // MQQQQPR:ssub_6 -> SPR |
| 3, // MQQQQPR:ssub_7 -> SPR |
| 3, // MQQQQPR:ssub_8 -> SPR |
| 3, // MQQQQPR:ssub_9 -> SPR |
| 3, // MQQQQPR:ssub_10 -> SPR |
| 3, // MQQQQPR:ssub_11 -> SPR |
| 3, // MQQQQPR:ssub_12 -> SPR |
| 3, // MQQQQPR:ssub_13 -> SPR |
| 3, // MQQQQPR:ssub_14 -> SPR |
| 3, // MQQQQPR:ssub_15 -> SPR |
| 64, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_ssub_4 |
| 92, // MQQQQPR:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 64, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_ssub_4 |
| 91, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 70, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_ssub_2 |
| 103, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_ssub_8 |
| 0, // MQQQQPR:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 103, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_ssub_8 |
| 0, // MQQQQPR:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 121, // MQQQQPR:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // MQQQQPR:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 92, // MQQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 103, // MQQQQPR:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_8 |
| 64, // MQQQQPR:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_4 |
| 91, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 103, // MQQQQPR:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_8 |
| 70, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2 |
| 121, // MQQQQPR:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // MQQQQPR:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4 |
| 92, // MQQQQPR:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 64, // MQQQQPR:dsub_5_dsub_7 -> DPairSpc_with_ssub_4 |
| 91, // MQQQQPR:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 70, // MQQQQPR:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2 |
| 119, // MQQQQPR:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR |
| }, |
| { // MQQQQPR_with_dsub_0_in_DPR_8 |
| 53, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_1 -> DPR_8 |
| 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_2 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_3 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_6 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_7 -> DPR_VFP2 |
| 0, // MQQQQPR_with_dsub_0_in_DPR_8:gsub_0 |
| 0, // MQQQQPR_with_dsub_0_in_DPR_8:gsub_1 |
| 124, // MQQQQPR_with_dsub_0_in_DPR_8:qqsub_0 -> DQuad_with_qsub_0_in_QPR_8 |
| 119, // MQQQQPR_with_dsub_0_in_DPR_8:qqsub_1 -> MQQPR |
| 75, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_0 -> QPR_8 |
| 73, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_1 -> QPR_VFP2 |
| 73, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_2 -> QPR_VFP2 |
| 73, // MQQQQPR_with_dsub_0_in_DPR_8:qsub_3 -> QPR_VFP2 |
| 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_3 -> SPR_8 |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_5 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_7 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_8 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_9 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_10 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_11 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_12 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_13 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_14 -> SPR |
| 3, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_15 -> SPR |
| 65, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 97, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_qsub_0_in_QPR_8 |
| 65, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 96, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 71, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_0_in_DPR_8 |
| 104, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 104, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 123, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_ssub_4 |
| 92, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 103, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_ssub_8 |
| 64, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_ssub_4 |
| 91, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 103, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_ssub_8 |
| 70, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_ssub_2 |
| 121, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4 |
| 92, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 64, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_4 |
| 91, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 70, // MQQQQPR_with_dsub_0_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2 |
| 119, // MQQQQPR_with_dsub_0_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> MQQPR |
| }, |
| { // MQQQQPR_with_dsub_2_in_DPR_8 |
| 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_1 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_2 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_3 -> DPR_8 |
| 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_4 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_6 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_7 -> DPR_VFP2 |
| 0, // MQQQQPR_with_dsub_2_in_DPR_8:gsub_0 |
| 0, // MQQQQPR_with_dsub_2_in_DPR_8:gsub_1 |
| 125, // MQQQQPR_with_dsub_2_in_DPR_8:qqsub_0 -> DQuad_with_qsub_1_in_QPR_8 |
| 119, // MQQQQPR_with_dsub_2_in_DPR_8:qqsub_1 -> MQQPR |
| 75, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_0 -> QPR_8 |
| 75, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_1 -> QPR_8 |
| 73, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_2 -> QPR_VFP2 |
| 73, // MQQQQPR_with_dsub_2_in_DPR_8:qsub_3 -> QPR_VFP2 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_3 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_5 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_7 -> SPR_8 |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_8 -> SPR |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_9 -> SPR |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_10 -> SPR |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_11 -> SPR |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_12 -> SPR |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_13 -> SPR |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_14 -> SPR |
| 3, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_15 -> SPR |
| 66, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 66, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 74, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 105, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 105, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 126, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 65, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 97, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_qsub_0_in_QPR_8 |
| 104, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 65, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 96, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 104, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_0_in_DPR_8 |
| 71, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_0_in_DPR_8 |
| 123, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 64, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_ssub_4 |
| 92, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| 64, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_ssub_4 |
| 91, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 70, // MQQQQPR_with_dsub_2_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_ssub_2 |
| 124, // MQQQQPR_with_dsub_2_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_0_in_QPR_8 |
| }, |
| { // MQQQQPR_with_dsub_4_in_DPR_8 |
| 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_1 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_2 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_3 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_4 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5 -> DPR_8 |
| 52, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_6 -> DPR_VFP2 |
| 52, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_7 -> DPR_VFP2 |
| 0, // MQQQQPR_with_dsub_4_in_DPR_8:gsub_0 |
| 0, // MQQQQPR_with_dsub_4_in_DPR_8:gsub_1 |
| 125, // MQQQQPR_with_dsub_4_in_DPR_8:qqsub_0 -> DQuad_with_qsub_1_in_QPR_8 |
| 124, // MQQQQPR_with_dsub_4_in_DPR_8:qqsub_1 -> DQuad_with_qsub_0_in_QPR_8 |
| 75, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_0 -> QPR_8 |
| 75, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_1 -> QPR_8 |
| 75, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_2 -> QPR_8 |
| 73, // MQQQQPR_with_dsub_4_in_DPR_8:qsub_3 -> QPR_VFP2 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_3 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_5 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_7 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_8 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_9 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_10 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_11 -> SPR_8 |
| 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_12 -> SPR |
| 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_13 -> SPR |
| 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_14 -> SPR |
| 3, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_15 -> SPR |
| 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 74, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 106, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 106, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 127, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 105, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 66, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 105, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_2_in_DPR_8 |
| 74, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_1_in_DPR_8 |
| 126, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 65, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 97, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_qsub_0_in_QPR_8 |
| 65, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_dsub_0_in_DPR_8 |
| 96, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 71, // MQQQQPR_with_dsub_4_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_dsub_0_in_DPR_8 |
| 125, // MQQQQPR_with_dsub_4_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_1_in_QPR_8 |
| }, |
| { // MQQQQPR_with_dsub_6_in_DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_0 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_1 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_2 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_3 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_4 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_6 -> DPR_8 |
| 53, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_7 -> DPR_8 |
| 0, // MQQQQPR_with_dsub_6_in_DPR_8:gsub_0 |
| 0, // MQQQQPR_with_dsub_6_in_DPR_8:gsub_1 |
| 125, // MQQQQPR_with_dsub_6_in_DPR_8:qqsub_0 -> DQuad_with_qsub_1_in_QPR_8 |
| 125, // MQQQQPR_with_dsub_6_in_DPR_8:qqsub_1 -> DQuad_with_qsub_1_in_QPR_8 |
| 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_0 -> QPR_8 |
| 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_1 -> QPR_8 |
| 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_2 -> QPR_8 |
| 75, // MQQQQPR_with_dsub_6_in_DPR_8:qsub_3 -> QPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_1 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_3 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_5 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_7 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_8 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_9 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_10 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_11 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_12 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_13 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_14 -> SPR_8 |
| 8, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_15 -> SPR_8 |
| 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_2_ssub_3_ssub_4_ssub_5 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 74, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5 -> DPair_with_dsub_1_in_DPR_8 |
| 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_0_ssub_1_ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 |
| 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 0, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_6_ssub_7_dsub_5_dsub_7 |
| 127, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_2_ssub_3_ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_ssub_8_ssub_9 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_8_ssub_9_ssub_12_ssub_13 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_dsub_5 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 106, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_dsub_5_dsub_7 -> DQuadSpc_with_dsub_4_in_DPR_8 |
| 74, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9 -> DPair_with_dsub_1_in_DPR_8 |
| 127, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_6_ssub_7_ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 66, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_8_ssub_9_ssub_12_ssub_13 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 98, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_8_ssub_9_dsub_5_ssub_12_ssub_13 -> DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| 66, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5_dsub_7 -> DPairSpc_with_dsub_2_in_DPR_8 |
| 99, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5_ssub_12_ssub_13_dsub_7 -> DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| 74, // MQQQQPR_with_dsub_6_in_DPR_8:dsub_5_ssub_12_ssub_13 -> DPair_with_dsub_1_in_DPR_8 |
| 125, // MQQQQPR_with_dsub_6_in_DPR_8:ssub_4_ssub_5_ssub_6_ssub_7_qsub_2 -> DQuad_with_qsub_1_in_QPR_8 |
| }, |
| }; |
| assert(RC && "Missing regclass"); |
| if (!Idx) return RC; |
| --Idx; |
| assert(Idx < 56 && "Bad subreg"); |
| unsigned TV = Table[RC->getID()][Idx]; |
| return TV ? getRegClass(TV - 1) : nullptr; |
| } |
| |
| /// Get the weight in units of pressure for this register class. |
| const RegClassWeight &ARMGenRegisterInfo:: |
| getRegClassWeight(const TargetRegisterClass *RC) const { |
| static const RegClassWeight RCWeightTable[] = { |
| {1, 32}, // HPR |
| {1, 65}, // FPWithVPR |
| {1, 32}, // SPR |
| {2, 32}, // FPWithVPR_with_ssub_0 |
| {1, 16}, // GPR |
| {1, 16}, // GPRwithAPSR |
| {1, 16}, // GPRwithZR |
| {1, 16}, // SPR_8 |
| {1, 15}, // GPRnopc |
| {1, 15}, // GPRnosp |
| {1, 15}, // GPRwithAPSR_NZCVnosp |
| {0, 14}, // GPRwithAPSRnosp |
| {1, 15}, // GPRwithZRnosp |
| {1, 14}, // GPRnoip |
| {1, 14}, // rGPR |
| {1, 13}, // GPRnoip_and_GPRnopc |
| {1, 13}, // GPRnoip_and_GPRnosp |
| {1, 12}, // GPRnoip_and_GPRwithAPSR_NZCVnosp |
| {1, 9}, // tGPRwithpc |
| {2, 16}, // FPWithVPR_with_ssub_0_with_ssub_0_in_SPR_8 |
| {1, 8}, // hGPR |
| {1, 8}, // tGPR |
| {1, 8}, // tGPREven |
| {1, 7}, // GPRnopc_and_hGPR |
| {1, 7}, // GPRnosp_and_hGPR |
| {1, 6}, // GPRnoip_and_hGPR |
| {1, 6}, // GPRnoip_and_tGPREven |
| {1, 6}, // GPRnosp_and_GPRnopc_and_hGPR |
| {1, 6}, // tGPROdd |
| {1, 5}, // GPRnopc_and_GPRnoip_and_hGPR |
| {1, 5}, // GPRnosp_and_GPRnoip_and_hGPR |
| {1, 5}, // tcGPR |
| {1, 4}, // GPRnoip_and_tcGPR |
| {1, 4}, // GPRnosp_and_GPRnopc_and_GPRnoip_and_hGPR |
| {1, 4}, // hGPR_and_tGPREven |
| {1, 4}, // tGPR_and_tGPREven |
| {1, 4}, // tGPR_and_tGPROdd |
| {1, 3}, // tGPREven_and_tcGPR |
| {1, 2}, // hGPR_and_GPRnoip_and_tGPREven |
| {1, 2}, // hGPR_and_tGPROdd |
| {1, 2}, // tGPREven_and_GPRnoip_and_tcGPR |
| {1, 2}, // tGPROdd_and_tcGPR |
| {0, 0}, // CCR |
| {1, 1}, // FPCXTRegs |
| {1, 1}, // GPRlr |
| {1, 1}, // GPRsp |
| {1, 1}, // VCCR |
| {1, 1}, // cl_FPSCR_NZCV |
| {1, 1}, // hGPR_and_tGPRwithpc |
| {1, 1}, // hGPR_and_tcGPR |
| {2, 64}, // DPR |
| {2, 32}, // DPR_VFP2 |
| {2, 16}, // DPR_8 |
| {2, 14}, // GPRPair |
| {2, 12}, // GPRPairnosp |
| {2, 8}, // GPRPair_with_gsub_0_in_tGPR |
| {2, 6}, // GPRPair_with_gsub_0_in_hGPR |
| {2, 6}, // GPRPair_with_gsub_0_in_tcGPR |
| {2, 4}, // GPRPair_with_gsub_1_in_tcGPR |
| {2, 4}, // GPRPairnosp_and_GPRPair_with_gsub_0_in_hGPR |
| {2, 2}, // GPRPair_with_gsub_1_in_GPRsp |
| {4, 64}, // DPairSpc |
| {4, 36}, // DPairSpc_with_ssub_0 |
| {4, 32}, // DPairSpc_with_ssub_4 |
| {4, 20}, // DPairSpc_with_dsub_0_in_DPR_8 |
| {4, 16}, // DPairSpc_with_dsub_2_in_DPR_8 |
| {4, 64}, // DPair |
| {4, 34}, // DPair_with_ssub_0 |
| {4, 64}, // QPR |
| {4, 32}, // DPair_with_ssub_2 |
| {4, 18}, // DPair_with_dsub_0_in_DPR_8 |
| {4, 32}, // MQPR |
| {4, 32}, // QPR_VFP2 |
| {4, 16}, // DPair_with_dsub_1_in_DPR_8 |
| {4, 16}, // QPR_8 |
| {6, 64}, // DTriple |
| {6, 64}, // DTripleSpc |
| {6, 40}, // DTripleSpc_with_ssub_0 |
| {6, 36}, // DTriple_with_ssub_0 |
| {6, 62}, // DTriple_with_qsub_0_in_QPR |
| {6, 34}, // DTriple_with_ssub_2 |
| {6, 62}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| {6, 36}, // DTripleSpc_with_ssub_4 |
| {6, 32}, // DTriple_with_ssub_4 |
| {6, 32}, // DTripleSpc_with_ssub_8 |
| {6, 24}, // DTripleSpc_with_dsub_0_in_DPR_8 |
| {6, 20}, // DTriple_with_dsub_0_in_DPR_8 |
| {6, 34}, // DTriple_with_qsub_0_in_MQPR |
| {6, 34}, // DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| {6, 18}, // DTriple_with_dsub_1_in_DPR_8 |
| {6, 30}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| {6, 30}, // DTriple_with_ssub_4_and_DTriple_with_qsub_0_in_MQPR |
| {6, 20}, // DTripleSpc_with_dsub_2_in_DPR_8 |
| {6, 16}, // DTriple_with_dsub_2_in_DPR_8 |
| {6, 16}, // DTripleSpc_with_dsub_4_in_DPR_8 |
| {6, 18}, // DTriple_with_dsub_0_in_DPR_8_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| {6, 18}, // DTriple_with_qsub_0_in_QPR_8 |
| {6, 14}, // DTriple_with_dsub_2_in_DPR_8_and_DTriple_with_qsub_0_in_MQPR |
| {6, 14}, // DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| {6, 64}, // DQuadSpc |
| {6, 40}, // DQuadSpc_with_ssub_0 |
| {6, 36}, // DQuadSpc_with_ssub_4 |
| {6, 32}, // DQuadSpc_with_ssub_8 |
| {6, 24}, // DQuadSpc_with_dsub_0_in_DPR_8 |
| {6, 20}, // DQuadSpc_with_dsub_2_in_DPR_8 |
| {6, 16}, // DQuadSpc_with_dsub_4_in_DPR_8 |
| {8, 64}, // DQuad |
| {8, 38}, // DQuad_with_ssub_0 |
| {8, 36}, // DQuad_with_ssub_2 |
| {8, 64}, // QQPR |
| {8, 60}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| {8, 34}, // DQuad_with_ssub_4 |
| {8, 32}, // DQuad_with_ssub_6 |
| {8, 22}, // DQuad_with_dsub_0_in_DPR_8 |
| {8, 36}, // DQuad_with_qsub_0_in_MQPR |
| {8, 36}, // DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| {8, 20}, // DQuad_with_dsub_1_in_DPR_8 |
| {8, 32}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| {8, 32}, // MQQPR |
| {8, 18}, // DQuad_with_dsub_2_in_DPR_8 |
| {8, 28}, // DQuad_with_ssub_6_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| {8, 16}, // DQuad_with_dsub_3_in_DPR_8 |
| {8, 20}, // DQuad_with_dsub_0_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| {8, 20}, // DQuad_with_qsub_0_in_QPR_8 |
| {8, 16}, // DQuad_with_qsub_1_in_QPR_8 |
| {8, 16}, // DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR_8 |
| {8, 12}, // DQuad_with_dsub_3_in_DPR_8_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| {16, 64}, // QQQQPR |
| {16, 44}, // QQQQPR_with_ssub_0 |
| {16, 40}, // QQQQPR_with_ssub_4 |
| {16, 36}, // QQQQPR_with_ssub_8 |
| {16, 32}, // MQQQQPR |
| {16, 28}, // MQQQQPR_with_dsub_0_in_DPR_8 |
| {16, 24}, // MQQQQPR_with_dsub_2_in_DPR_8 |
| {16, 20}, // MQQQQPR_with_dsub_4_in_DPR_8 |
| {16, 16}, // MQQQQPR_with_dsub_6_in_DPR_8 |
| }; |
| return RCWeightTable[RC->getID()]; |
| } |
| |
| /// Get the weight in units of pressure for this register unit. |
| unsigned ARMGenRegisterInfo:: |
| getRegUnitWeight(unsigned RegUnit) const { |
| assert(RegUnit < 84 && "invalid register unit"); |
| static const uint8_t RUWeightTable[] = { |
| 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, }; |
| return RUWeightTable[RegUnit]; |
| } |
| |
| |
| // Get the number of dimensions of register pressure. |
| unsigned ARMGenRegisterInfo::getNumRegPressureSets() const { |
| return 34; |
| } |
| |
| // Get the name of this register unit pressure set. |
| const char *ARMGenRegisterInfo:: |
| getRegPressureSetName(unsigned Idx) const { |
| static const char *PressureNameTable[] = { |
| "FPCXTRegs", |
| "GPRlr", |
| "VCCR", |
| "cl_FPSCR_NZCV", |
| "hGPR_and_tGPRwithpc", |
| "GPRsp", |
| "tGPROdd", |
| "tcGPR", |
| "hGPR", |
| "tGPROdd_with_tcGPR", |
| "tGPR", |
| "tGPR_with_tcGPR", |
| "tGPREven", |
| "hGPR_with_tGPREven", |
| "hGPR_with_tGPROdd", |
| "hGPR_with_tcGPR", |
| "tGPR_with_tGPREven", |
| "GPR", |
| "GPRwithZR", |
| "GPRwithAPSR_with_GPRwithZR", |
| "DQuad_with_dsub_0_in_DPR_8", |
| "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR", |
| "HPR", |
| "DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR", |
| "DPair_with_ssub_0", |
| "DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR", |
| "DPairSpc_with_ssub_0", |
| "DQuad_with_ssub_0", |
| "DTripleSpc_with_ssub_0", |
| "QQQQPR_with_ssub_0", |
| "DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR", |
| "DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR", |
| "DTriple_with_qsub_0_in_QPR", |
| "DPR", |
| }; |
| return PressureNameTable[Idx]; |
| } |
| |
| // Get the register unit pressure limit for this dimension. |
| // This limit must be adjusted dynamically for reserved registers. |
| unsigned ARMGenRegisterInfo:: |
| getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const { |
| static const uint8_t PressureLimitTable[] = { |
| 1, // 0: FPCXTRegs |
| 1, // 1: GPRlr |
| 1, // 2: VCCR |
| 1, // 3: cl_FPSCR_NZCV |
| 1, // 4: hGPR_and_tGPRwithpc |
| 2, // 5: GPRsp |
| 6, // 6: tGPROdd |
| 6, // 7: tcGPR |
| 8, // 8: hGPR |
| 10, // 9: tGPROdd_with_tcGPR |
| 11, // 10: tGPR |
| 11, // 11: tGPR_with_tcGPR |
| 11, // 12: tGPREven |
| 12, // 13: hGPR_with_tGPREven |
| 12, // 14: hGPR_with_tGPROdd |
| 12, // 15: hGPR_with_tcGPR |
| 13, // 16: tGPR_with_tGPREven |
| 17, // 17: GPR |
| 17, // 18: GPRwithZR |
| 17, // 19: GPRwithAPSR_with_GPRwithZR |
| 24, // 20: DQuad_with_dsub_0_in_DPR_8 |
| 32, // 21: DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_MQPR |
| 32, // 22: HPR |
| 34, // 23: DTriple_with_ssub_0_and_DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 34, // 24: DPair_with_ssub_0 |
| 36, // 25: DQuad_with_ssub_0_and_DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 36, // 26: DPairSpc_with_ssub_0 |
| 38, // 27: DQuad_with_ssub_0 |
| 40, // 28: DTripleSpc_with_ssub_0 |
| 44, // 29: QQQQPR_with_ssub_0 |
| 60, // 30: DQuad_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // 31: DTriple_with_ssub_2_ssub_3_ssub_4_ssub_5_in_QPR |
| 62, // 32: DTriple_with_qsub_0_in_QPR |
| 64, // 33: DPR |
| }; |
| return PressureLimitTable[Idx]; |
| } |
| |
| /// Table of pressure sets per register class or unit. |
| static const int RCSetsTable[] = { |
| /* 0 */ 0, -1, |
| /* 2 */ 2, -1, |
| /* 4 */ 3, -1, |
| /* 6 */ 8, 13, 14, 15, 17, 18, -1, |
| /* 13 */ 10, 11, 16, 17, 18, -1, |
| /* 19 */ 4, 8, 10, 11, 13, 14, 15, 16, 17, 18, -1, |
| /* 30 */ 17, 19, -1, |
| /* 33 */ 6, 9, 10, 14, 17, 18, 19, -1, |
| /* 41 */ 7, 9, 11, 12, 15, 17, 18, 19, -1, |
| /* 50 */ 8, 13, 14, 15, 17, 18, 19, -1, |
| /* 58 */ 6, 8, 9, 10, 13, 14, 15, 17, 18, 19, -1, |
| /* 69 */ 5, 7, 8, 9, 11, 12, 13, 14, 15, 17, 18, 19, -1, |
| /* 82 */ 10, 11, 16, 17, 18, 19, -1, |
| /* 89 */ 10, 11, 12, 13, 16, 17, 18, 19, -1, |
| /* 98 */ 6, 9, 10, 11, 14, 16, 17, 18, 19, -1, |
| /* 108 */ 7, 9, 11, 12, 15, 16, 17, 18, 19, -1, |
| /* 118 */ 7, 9, 10, 11, 12, 15, 16, 17, 18, 19, -1, |
| /* 129 */ 7, 9, 11, 12, 13, 15, 16, 17, 18, 19, -1, |
| /* 140 */ 7, 9, 10, 11, 12, 13, 15, 16, 17, 18, 19, -1, |
| /* 152 */ 6, 7, 9, 10, 11, 12, 14, 15, 16, 17, 18, 19, -1, |
| /* 165 */ 1, 8, 12, 13, 14, 15, 16, 17, 18, 19, -1, |
| /* 176 */ 5, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19, -1, |
| /* 190 */ 31, 33, -1, |
| /* 193 */ 20, 22, 24, 26, 27, 28, 29, 32, 33, -1, |
| /* 203 */ 25, 27, 28, 29, 30, 31, 32, 33, -1, |
| /* 212 */ 23, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1, |
| /* 223 */ 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1, |
| /* 236 */ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, -1, |
| }; |
| |
| /// Get the dimensions of register pressure impacted by this register class. |
| /// Returns a -1 terminated array of pressure set IDs |
| const int *ARMGenRegisterInfo:: |
| getRegClassPressureSets(const TargetRegisterClass *RC) const { |
| static const uint8_t RCSetStartTable[] = { |
| 194,1,194,1,10,30,38,193,37,10,1,1,38,10,37,37,10,37,13,1,6,82,91,50,6,6,91,50,33,50,6,108,118,50,166,89,98,129,166,58,140,152,1,0,165,69,2,4,19,176,191,194,193,37,37,82,50,41,118,50,69,191,196,194,193,193,191,195,191,194,193,194,194,193,193,191,191,198,196,200,195,190,196,194,194,193,193,195,212,193,237,194,193,193,193,236,193,193,236,191,198,196,194,193,193,193,191,197,196,191,207,195,194,193,196,203,193,223,194,193,237,193,236,193,193,236,236,191,199,198,196,194,194,193,193,193,}; |
| return &RCSetsTable[RCSetStartTable[RC->getID()]]; |
| } |
| |
| /// Get the dimensions of register pressure impacted by this register unit. |
| /// Returns a -1 terminated array of pressure set IDs |
| const int *ARMGenRegisterInfo:: |
| getRegUnitPressureSets(unsigned RegUnit) const { |
| assert(RegUnit < 84 && "invalid register unit"); |
| static const uint8_t RUSetStartTable[] = { |
| 1,30,1,0,1,1,1,4,1,1,1,165,19,1,69,1,2,38,193,193,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,237,237,237,237,237,237,237,237,223,212,203,205,206,206,207,207,207,207,207,207,207,207,207,190,1,1,1,1,1,140,152,140,152,89,98,89,98,166,58,166,58,176,}; |
| return &RCSetsTable[RUSetStartTable[RegUnit]]; |
| } |
| |
| extern const MCRegisterDesc ARMRegDesc[]; |
| extern const MCPhysReg ARMRegDiffLists[]; |
| extern const LaneBitmask ARMLaneMaskLists[]; |
| extern const char ARMRegStrings[]; |
| extern const char ARMRegClassStrings[]; |
| extern const MCPhysReg ARMRegUnitRoots[][2]; |
| extern const uint16_t ARMSubRegIdxLists[]; |
| extern const MCRegisterInfo::SubRegCoveredBits ARMSubRegIdxRanges[]; |
| extern const uint16_t ARMRegEncodingTable[]; |
| // ARM Dwarf<->LLVM register mappings. |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0Dwarf2L[]; |
| extern const unsigned ARMDwarfFlavour0Dwarf2LSize; |
| |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0Dwarf2L[]; |
| extern const unsigned ARMEHFlavour0Dwarf2LSize; |
| |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMDwarfFlavour0L2Dwarf[]; |
| extern const unsigned ARMDwarfFlavour0L2DwarfSize; |
| |
| extern const MCRegisterInfo::DwarfLLVMRegPair ARMEHFlavour0L2Dwarf[]; |
| extern const unsigned ARMEHFlavour0L2DwarfSize; |
| |
| ARMGenRegisterInfo:: |
| ARMGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour, |
| unsigned PC, unsigned HwMode) |
| : TargetRegisterInfo(&ARMRegInfoDesc, RegisterClasses, RegisterClasses+136, |
| SubRegIndexNameTable, SubRegIndexLaneMaskTable, |
| LaneBitmask(0xFFFFFFFFFFFFFFFF), RegClassInfos, HwMode) { |
| InitMCRegisterInfo(ARMRegDesc, 296, RA, PC, |
| ARMMCRegisterClasses, 136, |
| ARMRegUnitRoots, |
| 84, |
| ARMRegDiffLists, |
| ARMLaneMaskLists, |
| ARMRegStrings, |
| ARMRegClassStrings, |
| ARMSubRegIdxLists, |
| 57, |
| ARMSubRegIdxRanges, |
| ARMRegEncodingTable); |
| |
| switch (DwarfFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| mapDwarfRegsToLLVMRegs(ARMDwarfFlavour0Dwarf2L, ARMDwarfFlavour0Dwarf2LSize, false); |
| break; |
| } |
| switch (EHFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| mapDwarfRegsToLLVMRegs(ARMEHFlavour0Dwarf2L, ARMEHFlavour0Dwarf2LSize, true); |
| break; |
| } |
| switch (DwarfFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| mapLLVMRegsToDwarfRegs(ARMDwarfFlavour0L2Dwarf, ARMDwarfFlavour0L2DwarfSize, false); |
| break; |
| } |
| switch (EHFlavour) { |
| default: |
| llvm_unreachable("Unknown DWARF flavour"); |
| case 0: |
| mapLLVMRegsToDwarfRegs(ARMEHFlavour0L2Dwarf, ARMEHFlavour0L2DwarfSize, true); |
| break; |
| } |
| } |
| |
| static const MCPhysReg CSR_AAPCS_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_AAPCS_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_AAPCS_SplitPush_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R10, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_AAPCS_SplitPush_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_AAPCS_SwiftError_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_AAPCS_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x001de001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_AAPCS_SwiftTail_SaveList[] = { ARM::LR, ARM::R11, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_AAPCS_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0017e001, 0xc03fffc0, 0x0700000f, 0x801c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_AAPCS_ThisReturn_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R0, 0 }; |
| static const uint32_t CSR_AAPCS_ThisReturn_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe201, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_ATPCS_SplitPush_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_ATPCS_SplitPush_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_ATPCS_SplitPush_SwiftError_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R9, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_ATPCS_SplitPush_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x001de001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_ATPCS_SplitPush_SwiftTail_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R9, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_ATPCS_SplitPush_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0017e001, 0xc03fffc0, 0x0700000f, 0x801c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_FIQ_SaveList[] = { ARM::LR, ARM::R11, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, 0 }; |
| static const uint32_t CSR_FIQ_RegMask[] = { 0x00002000, 0x00000000, 0x0011fe00, 0x00000000, 0x00000000, 0x000f0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| static const MCPhysReg CSR_FPRegs_SaveList[] = { ARM::D0, ARM::D1, ARM::D2, ARM::D3, ARM::D4, ARM::D5, ARM::D6, ARM::D7, ARM::D8, ARM::D9, ARM::D10, ARM::D11, ARM::D12, ARM::D13, ARM::D14, ARM::D15, ARM::D16, ARM::D17, ARM::D18, ARM::D19, ARM::D20, ARM::D21, ARM::D22, ARM::D23, ARM::D24, ARM::D25, ARM::D26, ARM::D27, ARM::D28, ARM::D29, ARM::D30, ARM::D31, 0 }; |
| static const uint32_t CSR_FPRegs_RegMask[] = { 0xfff00000, 0xfe0fffff, 0xffc001ff, 0xffffffff, 0xffffffff, 0xff80ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| static const MCPhysReg CSR_GenericInt_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::R0, 0 }; |
| static const uint32_t CSR_GenericInt_RegMask[] = { 0x00002000, 0x00000000, 0x003ffe00, 0x00000000, 0x00000000, 0x003f0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 }; |
| static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| static const MCPhysReg CSR_Win_AAPCS_CFGuard_Check_SaveList[] = { ARM::LR, ARM::R11, ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| static const uint32_t CSR_Win_AAPCS_CFGuard_Check_RegMask[] = { 0xfff02000, 0xfe00000f, 0xffdfe001, 0xffffffff, 0x07f0000f, 0xffbc00f8, 0xffe0001f, 0x07fe0001, 0xfc03f800, 0x00000000, }; |
| static const MCPhysReg CSR_Win_SplitFP_SaveList[] = { ARM::R10, ARM::R9, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::LR, ARM::R11, 0 }; |
| static const uint32_t CSR_Win_SplitFP_RegMask[] = { 0xf0002000, 0xe000000f, 0x001fe001, 0xc03fffc0, 0x0700000f, 0x803c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_iOS_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_iOS_RegMask[] = { 0xf0002000, 0xe000000f, 0x001be001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_iOS_CXX_TLS_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R12, ARM::R9, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| static const uint32_t CSR_iOS_CXX_TLS_RegMask[] = { 0xfff02000, 0xfe0fffff, 0xfffffdff, 0xffffffff, 0xffffffff, 0xffbeffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| static const MCPhysReg CSR_iOS_CXX_TLS_PE_SaveList[] = { ARM::LR, ARM::R12, ARM::R11, ARM::R7, ARM::R5, ARM::R4, 0 }; |
| static const uint32_t CSR_iOS_CXX_TLS_PE_RegMask[] = { 0x00002000, 0x00000000, 0x00316000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| static const MCPhysReg CSR_iOS_CXX_TLS_ViaCopy_SaveList[] = { ARM::R6, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R9, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| static const uint32_t CSR_iOS_CXX_TLS_ViaCopy_RegMask[] = { 0xfff00000, 0xfe0fffff, 0xffce9dff, 0xffffffff, 0xffffffff, 0xff92ffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| static const MCPhysReg CSR_iOS_SwiftError_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_iOS_SwiftError_RegMask[] = { 0xf0002000, 0xe000000f, 0x0019e001, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_iOS_SwiftTail_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; |
| static const uint32_t CSR_iOS_SwiftTail_RegMask[] = { 0xf0002000, 0xe000000f, 0x0013e001, 0xc03fffc0, 0x0700000f, 0x800c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| static const MCPhysReg CSR_iOS_TLSCall_SaveList[] = { ARM::LR, ARM::SP, ARM::R11, ARM::R10, ARM::R8, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R3, ARM::R2, ARM::R1, ARM::D31, ARM::D30, ARM::D29, ARM::D28, ARM::D27, ARM::D26, ARM::D25, ARM::D24, ARM::D23, ARM::D22, ARM::D21, ARM::D20, ARM::D19, ARM::D18, ARM::D17, ARM::D16, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::D7, ARM::D6, ARM::D5, ARM::D4, ARM::D3, ARM::D2, ARM::D1, ARM::D0, 0 }; |
| static const uint32_t CSR_iOS_TLSCall_RegMask[] = { 0xfff12000, 0xfe0fffff, 0xffdbfdff, 0xffffffff, 0xffffffff, 0xffaeffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000000ff, }; |
| static const MCPhysReg CSR_iOS_ThisReturn_SaveList[] = { ARM::LR, ARM::R7, ARM::R6, ARM::R5, ARM::R4, ARM::R11, ARM::R10, ARM::R8, ARM::D15, ARM::D14, ARM::D13, ARM::D12, ARM::D11, ARM::D10, ARM::D9, ARM::D8, ARM::R0, 0 }; |
| static const uint32_t CSR_iOS_ThisReturn_RegMask[] = { 0xf0002000, 0xe000000f, 0x001be201, 0xc03fffc0, 0x0700000f, 0x802c0080, 0xe000001f, 0x06000001, 0xc0038000, 0x00000000, }; |
| |
| |
| ArrayRef<const uint32_t *> ARMGenRegisterInfo::getRegMasks() const { |
| static const uint32_t *const Masks[] = { |
| CSR_AAPCS_RegMask, |
| CSR_AAPCS_SplitPush_RegMask, |
| CSR_AAPCS_SwiftError_RegMask, |
| CSR_AAPCS_SwiftTail_RegMask, |
| CSR_AAPCS_ThisReturn_RegMask, |
| CSR_ATPCS_SplitPush_RegMask, |
| CSR_ATPCS_SplitPush_SwiftError_RegMask, |
| CSR_ATPCS_SplitPush_SwiftTail_RegMask, |
| CSR_FIQ_RegMask, |
| CSR_FPRegs_RegMask, |
| CSR_GenericInt_RegMask, |
| CSR_NoRegs_RegMask, |
| CSR_Win_AAPCS_CFGuard_Check_RegMask, |
| CSR_Win_SplitFP_RegMask, |
| CSR_iOS_RegMask, |
| CSR_iOS_CXX_TLS_RegMask, |
| CSR_iOS_CXX_TLS_PE_RegMask, |
| CSR_iOS_CXX_TLS_ViaCopy_RegMask, |
| CSR_iOS_SwiftError_RegMask, |
| CSR_iOS_SwiftTail_RegMask, |
| CSR_iOS_TLSCall_RegMask, |
| CSR_iOS_ThisReturn_RegMask, |
| }; |
| return ArrayRef(Masks); |
| } |
| |
| bool ARMGenRegisterInfo:: |
| isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| return |
| false; |
| } |
| |
| bool ARMGenRegisterInfo:: |
| isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| return |
| false; |
| } |
| |
| bool ARMGenRegisterInfo:: |
| isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| return |
| false; |
| } |
| |
| bool ARMGenRegisterInfo:: |
| isConstantPhysReg(MCRegister PhysReg) const { |
| return |
| false; |
| } |
| |
| ArrayRef<const char *> ARMGenRegisterInfo::getRegMaskNames() const { |
| static const char *Names[] = { |
| "CSR_AAPCS", |
| "CSR_AAPCS_SplitPush", |
| "CSR_AAPCS_SwiftError", |
| "CSR_AAPCS_SwiftTail", |
| "CSR_AAPCS_ThisReturn", |
| "CSR_ATPCS_SplitPush", |
| "CSR_ATPCS_SplitPush_SwiftError", |
| "CSR_ATPCS_SplitPush_SwiftTail", |
| "CSR_FIQ", |
| "CSR_FPRegs", |
| "CSR_GenericInt", |
| "CSR_NoRegs", |
| "CSR_Win_AAPCS_CFGuard_Check", |
| "CSR_Win_SplitFP", |
| "CSR_iOS", |
| "CSR_iOS_CXX_TLS", |
| "CSR_iOS_CXX_TLS_PE", |
| "CSR_iOS_CXX_TLS_ViaCopy", |
| "CSR_iOS_SwiftError", |
| "CSR_iOS_SwiftTail", |
| "CSR_iOS_TLSCall", |
| "CSR_iOS_ThisReturn", |
| }; |
| return ArrayRef(Names); |
| } |
| |
| const ARMFrameLowering * |
| ARMGenRegisterInfo::getFrameLowering(const MachineFunction &MF) { |
| return static_cast<const ARMFrameLowering *>( |
| MF.getSubtarget().getFrameLowering()); |
| } |
| |
| } // end namespace llvm |
| |
| #endif // GET_REGINFO_TARGET_DESC |
| |