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swiftshader / SwiftShader / refs/heads/master / . / third_party / llvm-16.0 / configs / common / lib / Target / ARM / ARMGenAsmMatcher.inc
blob: 1bee123f812ca7212bf34ee654b4102af9900ceb [file] [log] [blame]
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Assembly Matcher Source Fragment *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
#ifdef GET_ASSEMBLER_HEADER
#undef GET_ASSEMBLER_HEADER
// This should be included into the middle of the declaration of
// your subclasses implementation of MCTargetAsmParser.
FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;
void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
const OperandVector &Operands);
void convertToMapAndConstraints(unsigned Kind,
const OperandVector &Operands) override;
unsigned MatchInstructionImpl(const OperandVector &Operands,
MCInst &Inst,
SmallVectorImpl<NearMissInfo> *NearMisses,
bool matchingInlineAsm,
unsigned VariantID = 0);
OperandMatchResultTy MatchOperandParserImpl(
OperandVector &Operands,
StringRef Mnemonic,
bool ParseForAllFeatures = false);
OperandMatchResultTy tryCustomParseOperand(
OperandVector &Operands,
unsigned MCK);
#endif // GET_ASSEMBLER_HEADER_INFO
#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
#undef GET_OPERAND_DIAGNOSTIC_TYPES
Match_AlignedMemory16,
Match_AlignedMemory32,
Match_AlignedMemory64,
Match_AlignedMemory64or128,
Match_AlignedMemory64or128or256,
Match_AlignedMemoryNone,
Match_ComplexRotationEven,
Match_ComplexRotationOdd,
Match_CondCodeRestrictedFP,
Match_CondCodeRestrictedI,
Match_CondCodeRestrictedS,
Match_CondCodeRestrictedU,
Match_DPR,
Match_DPR_8,
Match_DPR_RegList,
Match_DPR_VFP2,
Match_DupAlignedMemory16,
Match_DupAlignedMemory32,
Match_DupAlignedMemory64,
Match_DupAlignedMemory64or128,
Match_DupAlignedMemoryNone,
Match_GPR,
Match_GPRnoip,
Match_GPRnopc,
Match_GPRnosp,
Match_GPRsp,
Match_GPRwithAPSR,
Match_GPRwithAPSR_NZCVnosp,
Match_GPRwithZR,
Match_GPRwithZRnosp,
Match_Imm0_1,
Match_Imm0_15,
Match_Imm0_239,
Match_Imm0_255,
Match_Imm0_3,
Match_Imm0_31,
Match_Imm0_32,
Match_Imm0_4095,
Match_Imm0_63,
Match_Imm0_65535,
Match_Imm0_65535Expr,
Match_Imm0_7,
Match_Imm11b,
Match_Imm12b,
Match_Imm13b,
Match_Imm16,
Match_Imm1_15,
Match_Imm1_31,
Match_Imm1_7,
Match_Imm24bit,
Match_Imm256_65535Expr,
Match_Imm32,
Match_Imm3b,
Match_Imm4b,
Match_Imm6b,
Match_Imm7b,
Match_Imm8,
Match_Imm8_255,
Match_Imm9b,
Match_ImmRange1_16,
Match_ImmRange1_32,
Match_ImmThumbSR,
Match_LELabel,
Match_MVELongShift,
Match_MVEShiftImm1_15,
Match_MVEShiftImm1_7,
Match_MVEVcvtImm16,
Match_MVEVcvtImm32,
Match_MveSaturate,
Match_PKHLSLImm,
Match_QPR,
Match_QPR_8,
Match_QPR_VFP2,
Match_SPR,
Match_SPRRegList,
Match_SPR_8,
Match_SetEndImm,
Match_ShrImm16,
Match_ShrImm32,
Match_ShrImm64,
Match_ShrImm8,
Match_VIDUP_imm,
Match_VecListFourMQ,
Match_VecListTwoMQ,
Match_WLSLabel,
Match_hGPR,
Match_rGPR,
Match_tGPR,
Match_tGPREven,
Match_tGPROdd,
END_OPERAND_DIAGNOSTIC_TYPES
#endif // GET_OPERAND_DIAGNOSTIC_TYPES
#ifdef GET_REGISTER_MATCHER
#undef GET_REGISTER_MATCHER
// Bits for subtarget features that participate in instruction matching.
enum SubtargetFeatureBits : uint8_t {
Feature_HasV4TBit = 35,
Feature_HasV5TBit = 36,
Feature_HasV5TEBit = 37,
Feature_HasV6Bit = 38,
Feature_HasV6MBit = 40,
Feature_HasV8MBaselineBit = 45,
Feature_HasV8MMainlineBit = 46,
Feature_HasV8_1MMainlineBit = 47,
Feature_HasMVEIntBit = 26,
Feature_HasMVEFloatBit = 25,
Feature_HasCDEBit = 4,
Feature_HasFPRegsBit = 18,
Feature_HasFPRegs16Bit = 19,
Feature_HasNoFPRegs16Bit = 29,
Feature_HasFPRegs64Bit = 20,
Feature_HasFPRegsV8_1MBit = 21,
Feature_HasV6T2Bit = 41,
Feature_HasV6KBit = 39,
Feature_HasV7Bit = 42,
Feature_HasV8Bit = 44,
Feature_PreV8Bit = 64,
Feature_HasV8_1aBit = 48,
Feature_HasV8_2aBit = 49,
Feature_HasV8_3aBit = 50,
Feature_HasV8_4aBit = 51,
Feature_HasV8_5aBit = 52,
Feature_HasV8_6aBit = 53,
Feature_HasV8_7aBit = 54,
Feature_HasVFP2Bit = 55,
Feature_HasVFP3Bit = 56,
Feature_HasVFP4Bit = 57,
Feature_HasDPVFPBit = 10,
Feature_HasFPARMv8Bit = 17,
Feature_HasNEONBit = 28,
Feature_HasSHA2Bit = 33,
Feature_HasAESBit = 1,
Feature_HasCryptoBit = 7,
Feature_HasDotProdBit = 14,
Feature_HasCRCBit = 6,
Feature_HasRASBit = 31,
Feature_HasLOBBit = 23,
Feature_HasPACBTIBit = 30,
Feature_HasFP16Bit = 15,
Feature_HasFullFP16Bit = 22,
Feature_HasFP16FMLBit = 16,
Feature_HasBF16Bit = 3,
Feature_HasMatMulInt8Bit = 27,
Feature_HasDivideInThumbBit = 13,
Feature_HasDivideInARMBit = 12,
Feature_HasDSPBit = 11,
Feature_HasDBBit = 8,
Feature_HasDFBBit = 9,
Feature_HasV7ClrexBit = 43,
Feature_HasAcquireReleaseBit = 2,
Feature_HasMPBit = 24,
Feature_HasVirtualizationBit = 58,
Feature_HasTrustZoneBit = 34,
Feature_Has8MSecExtBit = 0,
Feature_IsThumbBit = 62,
Feature_IsThumb2Bit = 63,
Feature_IsMClassBit = 60,
Feature_IsNotMClassBit = 61,
Feature_IsARMBit = 59,
Feature_UseNaClTrapBit = 65,
Feature_UseNegativeImmediatesBit = 66,
Feature_HasSBBit = 32,
Feature_HasCLRBHBBit = 5,
};
static unsigned MatchRegisterName(StringRef Name) {
switch (Name.size()) {
default: break;
case 2: // 45 strings to match.
switch (Name[0]) {
default: break;
case 'd': // 10 strings to match.
switch (Name[1]) {
default: break;
case '0': // 1 string to match.
return 20; // "d0"
case '1': // 1 string to match.
return 21; // "d1"
case '2': // 1 string to match.
return 22; // "d2"
case '3': // 1 string to match.
return 23; // "d3"
case '4': // 1 string to match.
return 24; // "d4"
case '5': // 1 string to match.
return 25; // "d5"
case '6': // 1 string to match.
return 26; // "d6"
case '7': // 1 string to match.
return 27; // "d7"
case '8': // 1 string to match.
return 28; // "d8"
case '9': // 1 string to match.
return 29; // "d9"
}
break;
case 'l': // 1 string to match.
if (Name[1] != 'r')
break;
return 13; // "lr"
case 'p': // 2 strings to match.
switch (Name[1]) {
default: break;
case '0': // 1 string to match.
return 56; // "p0"
case 'c': // 1 string to match.
return 14; // "pc"
}
break;
case 'q': // 10 strings to match.
switch (Name[1]) {
default: break;
case '0': // 1 string to match.
return 57; // "q0"
case '1': // 1 string to match.
return 58; // "q1"
case '2': // 1 string to match.
return 59; // "q2"
case '3': // 1 string to match.
return 60; // "q3"
case '4': // 1 string to match.
return 61; // "q4"
case '5': // 1 string to match.
return 62; // "q5"
case '6': // 1 string to match.
return 63; // "q6"
case '7': // 1 string to match.
return 64; // "q7"
case '8': // 1 string to match.
return 65; // "q8"
case '9': // 1 string to match.
return 66; // "q9"
}
break;
case 'r': // 10 strings to match.
switch (Name[1]) {
default: break;
case '0': // 1 string to match.
return 73; // "r0"
case '1': // 1 string to match.
return 74; // "r1"
case '2': // 1 string to match.
return 75; // "r2"
case '3': // 1 string to match.
return 76; // "r3"
case '4': // 1 string to match.
return 77; // "r4"
case '5': // 1 string to match.
return 78; // "r5"
case '6': // 1 string to match.
return 79; // "r6"
case '7': // 1 string to match.
return 80; // "r7"
case '8': // 1 string to match.
return 81; // "r8"
case '9': // 1 string to match.
return 82; // "r9"
}
break;
case 's': // 11 strings to match.
switch (Name[1]) {
default: break;
case '0': // 1 string to match.
return 86; // "s0"
case '1': // 1 string to match.
return 87; // "s1"
case '2': // 1 string to match.
return 88; // "s2"
case '3': // 1 string to match.
return 89; // "s3"
case '4': // 1 string to match.
return 90; // "s4"
case '5': // 1 string to match.
return 91; // "s5"
case '6': // 1 string to match.
return 92; // "s6"
case '7': // 1 string to match.
return 93; // "s7"
case '8': // 1 string to match.
return 94; // "s8"
case '9': // 1 string to match.
return 95; // "s9"
case 'p': // 1 string to match.
return 16; // "sp"
}
break;
case 'z': // 1 string to match.
if (Name[1] != 'r')
break;
return 19; // "zr"
}
break;
case 3: // 54 strings to match.
switch (Name[0]) {
default: break;
case 'd': // 22 strings to match.
switch (Name[1]) {
default: break;
case '1': // 10 strings to match.
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 30; // "d10"
case '1': // 1 string to match.
return 31; // "d11"
case '2': // 1 string to match.
return 32; // "d12"
case '3': // 1 string to match.
return 33; // "d13"
case '4': // 1 string to match.
return 34; // "d14"
case '5': // 1 string to match.
return 35; // "d15"
case '6': // 1 string to match.
return 36; // "d16"
case '7': // 1 string to match.
return 37; // "d17"
case '8': // 1 string to match.
return 38; // "d18"
case '9': // 1 string to match.
return 39; // "d19"
}
break;
case '2': // 10 strings to match.
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 40; // "d20"
case '1': // 1 string to match.
return 41; // "d21"
case '2': // 1 string to match.
return 42; // "d22"
case '3': // 1 string to match.
return 43; // "d23"
case '4': // 1 string to match.
return 44; // "d24"
case '5': // 1 string to match.
return 45; // "d25"
case '6': // 1 string to match.
return 46; // "d26"
case '7': // 1 string to match.
return 47; // "d27"
case '8': // 1 string to match.
return 48; // "d28"
case '9': // 1 string to match.
return 49; // "d29"
}
break;
case '3': // 2 strings to match.
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 50; // "d30"
case '1': // 1 string to match.
return 51; // "d31"
}
break;
}
break;
case 'q': // 6 strings to match.
if (Name[1] != '1')
break;
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 67; // "q10"
case '1': // 1 string to match.
return 68; // "q11"
case '2': // 1 string to match.
return 69; // "q12"
case '3': // 1 string to match.
return 70; // "q13"
case '4': // 1 string to match.
return 71; // "q14"
case '5': // 1 string to match.
return 72; // "q15"
}
break;
case 'r': // 3 strings to match.
if (Name[1] != '1')
break;
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 83; // "r10"
case '1': // 1 string to match.
return 84; // "r11"
case '2': // 1 string to match.
return 85; // "r12"
}
break;
case 's': // 22 strings to match.
switch (Name[1]) {
default: break;
case '1': // 10 strings to match.
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 96; // "s10"
case '1': // 1 string to match.
return 97; // "s11"
case '2': // 1 string to match.
return 98; // "s12"
case '3': // 1 string to match.
return 99; // "s13"
case '4': // 1 string to match.
return 100; // "s14"
case '5': // 1 string to match.
return 101; // "s15"
case '6': // 1 string to match.
return 102; // "s16"
case '7': // 1 string to match.
return 103; // "s17"
case '8': // 1 string to match.
return 104; // "s18"
case '9': // 1 string to match.
return 105; // "s19"
}
break;
case '2': // 10 strings to match.
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 106; // "s20"
case '1': // 1 string to match.
return 107; // "s21"
case '2': // 1 string to match.
return 108; // "s22"
case '3': // 1 string to match.
return 109; // "s23"
case '4': // 1 string to match.
return 110; // "s24"
case '5': // 1 string to match.
return 111; // "s25"
case '6': // 1 string to match.
return 112; // "s26"
case '7': // 1 string to match.
return 113; // "s27"
case '8': // 1 string to match.
return 114; // "s28"
case '9': // 1 string to match.
return 115; // "s29"
}
break;
case '3': // 2 strings to match.
switch (Name[2]) {
default: break;
case '0': // 1 string to match.
return 116; // "s30"
case '1': // 1 string to match.
return 117; // "s31"
}
break;
}
break;
case 'v': // 1 string to match.
if (memcmp(Name.data()+1, "pr", 2) != 0)
break;
return 18; // "vpr"
}
break;
case 4: // 3 strings to match.
switch (Name[0]) {
default: break;
case 'a': // 1 string to match.
if (memcmp(Name.data()+1, "psr", 3) != 0)
break;
return 1; // "apsr"
case 'c': // 1 string to match.
if (memcmp(Name.data()+1, "psr", 3) != 0)
break;
return 3; // "cpsr"
case 's': // 1 string to match.
if (memcmp(Name.data()+1, "psr", 3) != 0)
break;
return 17; // "spsr"
}
break;
case 5: // 6 strings to match.
switch (Name[0]) {
default: break;
case 'f': // 3 strings to match.
if (Name[1] != 'p')
break;
switch (Name[2]) {
default: break;
case 'e': // 1 string to match.
if (memcmp(Name.data()+3, "xc", 2) != 0)
break;
return 6; // "fpexc"
case 's': // 2 strings to match.
switch (Name[3]) {
default: break;
case 'c': // 1 string to match.
if (Name[4] != 'r')
break;
return 8; // "fpscr"
case 'i': // 1 string to match.
if (Name[4] != 'd')
break;
return 11; // "fpsid"
}
break;
}
break;
case 'm': // 3 strings to match.
if (memcmp(Name.data()+1, "vfr", 3) != 0)
break;
switch (Name[4]) {
default: break;
case '0': // 1 string to match.
return 53; // "mvfr0"
case '1': // 1 string to match.
return 54; // "mvfr1"
case '2': // 1 string to match.
return 55; // "mvfr2"
}
break;
}
break;
case 6: // 2 strings to match.
if (memcmp(Name.data()+0, "fp", 2) != 0)
break;
switch (Name[2]) {
default: break;
case 'c': // 1 string to match.
if (memcmp(Name.data()+3, "xts", 3) != 0)
break;
return 5; // "fpcxts"
case 'i': // 1 string to match.
if (memcmp(Name.data()+3, "nst", 3) != 0)
break;
return 7; // "fpinst"
}
break;
case 7: // 3 strings to match.
switch (Name[0]) {
default: break;
case 'f': // 2 strings to match.
if (Name[1] != 'p')
break;
switch (Name[2]) {
default: break;
case 'c': // 1 string to match.
if (memcmp(Name.data()+3, "xtns", 4) != 0)
break;
return 4; // "fpcxtns"
case 'i': // 1 string to match.
if (memcmp(Name.data()+3, "nst2", 4) != 0)
break;
return 52; // "fpinst2"
}
break;
case 'i': // 1 string to match.
if (memcmp(Name.data()+1, "tstate", 6) != 0)
break;
return 12; // "itstate"
}
break;
case 9: // 1 string to match.
if (memcmp(Name.data()+0, "apsr_nzcv", 9) != 0)
break;
return 2; // "apsr_nzcv"
case 10: // 1 string to match.
if (memcmp(Name.data()+0, "fpscr_nzcv", 10) != 0)
break;
return 9; // "fpscr_nzcv"
case 12: // 2 strings to match.
switch (Name[0]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Name.data()+1, "pscr_nzcvqc", 11) != 0)
break;
return 10; // "fpscr_nzcvqc"
case 'r': // 1 string to match.
if (memcmp(Name.data()+1, "a_auth_code", 11) != 0)
break;
return 15; // "ra_auth_code"
}
break;
}
return 0;
}
#endif // GET_REGISTER_MATCHER
#ifdef GET_SUBTARGET_FEATURE_NAME
#undef GET_SUBTARGET_FEATURE_NAME
// User-level names for subtarget features that participate in
// instruction matching.
static const char *getSubtargetFeatureName(uint64_t Val) {
switch(Val) {
case Feature_HasV4TBit: return "armv4t";
case Feature_HasV5TBit: return "armv5t";
case Feature_HasV5TEBit: return "armv5te";
case Feature_HasV6Bit: return "armv6";
case Feature_HasV6MBit: return "armv6m or armv6t2";
case Feature_HasV8MBaselineBit: return "armv8m.base";
case Feature_HasV8MMainlineBit: return "armv8m.main";
case Feature_HasV8_1MMainlineBit: return "armv8.1m.main";
case Feature_HasMVEIntBit: return "mve";
case Feature_HasMVEFloatBit: return "mve.fp";
case Feature_HasCDEBit: return "cde";
case Feature_HasFPRegsBit: return "fp registers";
case Feature_HasFPRegs16Bit: return "16-bit fp registers";
case Feature_HasNoFPRegs16Bit: return "16-bit fp registers";
case Feature_HasFPRegs64Bit: return "64-bit fp registers";
case Feature_HasFPRegsV8_1MBit: return "armv8.1m.main with FP or MVE";
case Feature_HasV6T2Bit: return "armv6t2";
case Feature_HasV6KBit: return "armv6k";
case Feature_HasV7Bit: return "armv7";
case Feature_HasV8Bit: return "armv8";
case Feature_PreV8Bit: return "armv7 or earlier";
case Feature_HasV8_1aBit: return "armv8.1a";
case Feature_HasV8_2aBit: return "armv8.2a";
case Feature_HasV8_3aBit: return "armv8.3a";
case Feature_HasV8_4aBit: return "armv8.4a";
case Feature_HasV8_5aBit: return "armv8.5a";
case Feature_HasV8_6aBit: return "armv8.6a";
case Feature_HasV8_7aBit: return "armv8.7a";
case Feature_HasVFP2Bit: return "VFP2";
case Feature_HasVFP3Bit: return "VFP3";
case Feature_HasVFP4Bit: return "VFP4";
case Feature_HasDPVFPBit: return "double precision VFP";
case Feature_HasFPARMv8Bit: return "FPARMv8";
case Feature_HasNEONBit: return "NEON";
case Feature_HasSHA2Bit: return "sha2";
case Feature_HasAESBit: return "aes";
case Feature_HasCryptoBit: return "crypto";
case Feature_HasDotProdBit: return "dotprod";
case Feature_HasCRCBit: return "crc";
case Feature_HasRASBit: return "ras";
case Feature_HasLOBBit: return "lob";
case Feature_HasPACBTIBit: return "pacbti";
case Feature_HasFP16Bit: return "half-float conversions";
case Feature_HasFullFP16Bit: return "full half-float";
case Feature_HasFP16FMLBit: return "full half-float fml";
case Feature_HasBF16Bit: return "BFloat16 floating point extension";
case Feature_HasMatMulInt8Bit: return "8-bit integer matrix multiply";
case Feature_HasDivideInThumbBit: return "divide in THUMB";
case Feature_HasDivideInARMBit: return "divide in ARM";
case Feature_HasDSPBit: return "dsp";
case Feature_HasDBBit: return "data-barriers";
case Feature_HasDFBBit: return "full-data-barrier";
case Feature_HasV7ClrexBit: return "v7 clrex";
case Feature_HasAcquireReleaseBit: return "acquire/release";
case Feature_HasMPBit: return "mp-extensions";
case Feature_HasVirtualizationBit: return "virtualization-extensions";
case Feature_HasTrustZoneBit: return "TrustZone";
case Feature_Has8MSecExtBit: return "ARMv8-M Security Extensions";
case Feature_IsThumbBit: return "thumb";
case Feature_IsThumb2Bit: return "thumb2";
case Feature_IsMClassBit: return "armv*m";
case Feature_IsNotMClassBit: return "!armv*m";
case Feature_IsARMBit: return "arm-mode";
case Feature_UseNaClTrapBit: return "NaCl";
case Feature_UseNegativeImmediatesBit: return "NegativeImmediates";
case Feature_HasSBBit: return "sb";
case Feature_HasCLRBHBBit: return "clrbhb";
default: return "(unknown)";
}
}
#endif // GET_SUBTARGET_FEATURE_NAME
#ifdef GET_MATCHER_IMPLEMENTATION
#undef GET_MATCHER_IMPLEMENTATION
static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) {
switch (VariantID) {
case 0:
break;
}
switch (Mnemonic.size()) {
default: break;
case 3: // 4 strings to match.
switch (Mnemonic[0]) {
default: break;
case 'r': // 1 string to match.
if (memcmp(Mnemonic.data()+1, "fe", 2) != 0)
break;
Mnemonic = "rfeia"; // "rfe"
return;
case 's': // 3 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'm': // 1 string to match.
if (Mnemonic[2] != 'i')
break;
Mnemonic = "smc"; // "smi"
return;
case 'r': // 1 string to match.
if (Mnemonic[2] != 's')
break;
Mnemonic = "srsia"; // "srs"
return;
case 'w': // 1 string to match.
if (Mnemonic[2] != 'i')
break;
Mnemonic = "svc"; // "swi"
return;
}
break;
}
break;
case 4: // 10 strings to match.
switch (Mnemonic[0]) {
default: break;
case 'f': // 8 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'l': // 2 strings to match.
if (Mnemonic[2] != 'd')
break;
switch (Mnemonic[3]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fldd"
Mnemonic = "vldr";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "flds"
Mnemonic = "vldr";
return;
}
break;
case 'm': // 4 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'r': // 2 strings to match.
switch (Mnemonic[3]) {
default: break;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmrs"
Mnemonic = "vmov";
return;
case 'x': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmrx"
Mnemonic = "vmrs";
return;
}
break;
case 's': // 1 string to match.
if (Mnemonic[3] != 'r')
break;
if (Features.test(Feature_HasVFP2Bit)) // "fmsr"
Mnemonic = "vmov";
return;
case 'x': // 1 string to match.
if (Mnemonic[3] != 'r')
break;
if (Features.test(Feature_HasVFP2Bit)) // "fmxr"
Mnemonic = "vmsr";
return;
}
break;
case 's': // 2 strings to match.
if (Mnemonic[2] != 't')
break;
switch (Mnemonic[3]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fstd"
Mnemonic = "vstr";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fsts"
Mnemonic = "vstr";
return;
}
break;
}
break;
case 'v': // 2 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'l': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "dm", 2) != 0)
break;
Mnemonic = "vldmia"; // "vldm"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "tm", 2) != 0)
break;
Mnemonic = "vstmia"; // "vstm"
return;
}
break;
}
break;
case 5: // 51 strings to match.
switch (Mnemonic[0]) {
default: break;
case 'f': // 18 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'a': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "dd", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "faddd"
Mnemonic = "vadd.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fadds"
Mnemonic = "vadd.f32";
return;
}
break;
case 'c': // 4 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'm': // 2 strings to match.
if (Mnemonic[3] != 'p')
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fcmpd"
Mnemonic = "vcmp.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fcmps"
Mnemonic = "vcmp.f32";
return;
}
break;
case 'p': // 2 strings to match.
if (Mnemonic[3] != 'y')
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fcpyd"
Mnemonic = "vmov.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fcpys"
Mnemonic = "vmov.f32";
return;
}
break;
}
break;
case 'd': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "iv", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fdivd"
Mnemonic = "vdiv.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fdivs"
Mnemonic = "vdiv.f32";
return;
}
break;
case 'm': // 8 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'a': // 2 strings to match.
if (Mnemonic[3] != 'c')
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmacd"
Mnemonic = "vmla.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmacs"
Mnemonic = "vmla.f32";
return;
}
break;
case 'd': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "rr", 2) != 0)
break;
if (Features.test(Feature_HasVFP2Bit)) // "fmdrr"
Mnemonic = "vmov";
return;
case 'r': // 3 strings to match.
switch (Mnemonic[3]) {
default: break;
case 'd': // 2 strings to match.
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmrdd"
Mnemonic = "vmov";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmrds"
Mnemonic = "vmov";
return;
}
break;
case 'r': // 1 string to match.
if (Mnemonic[4] != 'd')
break;
if (Features.test(Feature_HasVFP2Bit)) // "fmrrd"
Mnemonic = "vmov";
return;
}
break;
case 'u': // 2 strings to match.
if (Mnemonic[3] != 'l')
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmuld"
Mnemonic = "vmul.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fmuls"
Mnemonic = "vmul.f32";
return;
}
break;
}
break;
case 'n': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "eg", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fnegd"
Mnemonic = "vneg.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fnegs"
Mnemonic = "vneg.f32";
return;
}
break;
}
break;
case 'l': // 3 strings to match.
if (memcmp(Mnemonic.data()+1, "dm", 2) != 0)
break;
switch (Mnemonic[3]) {
default: break;
case 'e': // 1 string to match.
if (Mnemonic[4] != 'a')
break;
Mnemonic = "ldmdb"; // "ldmea"
return;
case 'f': // 1 string to match.
if (Mnemonic[4] != 'd')
break;
Mnemonic = "ldm"; // "ldmfd"
return;
case 'i': // 1 string to match.
if (Mnemonic[4] != 'a')
break;
Mnemonic = "ldm"; // "ldmia"
return;
}
break;
case 'r': // 4 strings to match.
if (memcmp(Mnemonic.data()+1, "fe", 2) != 0)
break;
switch (Mnemonic[3]) {
default: break;
case 'e': // 2 strings to match.
switch (Mnemonic[4]) {
default: break;
case 'a': // 1 string to match.
Mnemonic = "rfedb"; // "rfeea"
return;
case 'd': // 1 string to match.
Mnemonic = "rfeib"; // "rfeed"
return;
}
break;
case 'f': // 2 strings to match.
switch (Mnemonic[4]) {
default: break;
case 'a': // 1 string to match.
Mnemonic = "rfeda"; // "rfefa"
return;
case 'd': // 1 string to match.
Mnemonic = "rfeia"; // "rfefd"
return;
}
break;
}
break;
case 's': // 7 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'r': // 4 strings to match.
if (Mnemonic[2] != 's')
break;
switch (Mnemonic[3]) {
default: break;
case 'e': // 2 strings to match.
switch (Mnemonic[4]) {
default: break;
case 'a': // 1 string to match.
Mnemonic = "srsia"; // "srsea"
return;
case 'd': // 1 string to match.
Mnemonic = "srsda"; // "srsed"
return;
}
break;
case 'f': // 2 strings to match.
switch (Mnemonic[4]) {
default: break;
case 'a': // 1 string to match.
Mnemonic = "srsib"; // "srsfa"
return;
case 'd': // 1 string to match.
Mnemonic = "srsdb"; // "srsfd"
return;
}
break;
}
break;
case 't': // 3 strings to match.
if (Mnemonic[2] != 'm')
break;
switch (Mnemonic[3]) {
default: break;
case 'e': // 1 string to match.
if (Mnemonic[4] != 'a')
break;
Mnemonic = "stm"; // "stmea"
return;
case 'f': // 1 string to match.
if (Mnemonic[4] != 'd')
break;
Mnemonic = "stmdb"; // "stmfd"
return;
case 'i': // 1 string to match.
if (Mnemonic[4] != 'a')
break;
Mnemonic = "stm"; // "stmia"
return;
}
break;
}
break;
case 'v': // 19 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'a': // 3 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'b': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "sq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vabsq"
Mnemonic = "vabs";
return;
case 'd': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "dq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vaddq"
Mnemonic = "vadd";
return;
case 'n': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "dq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vandq"
Mnemonic = "vand";
return;
}
break;
case 'b': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "icq", 3) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vbicq"
Mnemonic = "vbic";
return;
case 'c': // 3 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "qq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vceqq"
Mnemonic = "vceq";
return;
case 'l': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "eq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vcleq"
Mnemonic = "vcle";
return;
case 'v': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "tq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vcvtq"
Mnemonic = "vcvt";
return;
}
break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "orq", 3) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "veorq"
Mnemonic = "veor";
return;
case 'm': // 5 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'a': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "xq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vmaxq"
Mnemonic = "vmax";
return;
case 'i': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "nq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vminq"
Mnemonic = "vmin";
return;
case 'o': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "vq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vmovq"
Mnemonic = "vmov";
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "lq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vmulq"
Mnemonic = "vmul";
return;
case 'v': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "nq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vmvnq"
Mnemonic = "vmvn";
return;
}
break;
case 'o': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "rrq", 3) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vorrq"
Mnemonic = "vorr";
return;
case 's': // 4 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'h': // 2 strings to match.
switch (Mnemonic[3]) {
default: break;
case 'l': // 1 string to match.
if (Mnemonic[4] != 'q')
break;
if (Features.test(Feature_HasNEONBit)) // "vshlq"
Mnemonic = "vshl";
return;
case 'r': // 1 string to match.
if (Mnemonic[4] != 'q')
break;
if (Features.test(Feature_HasNEONBit)) // "vshrq"
Mnemonic = "vshr";
return;
}
break;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "bq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vsubq"
Mnemonic = "vsub";
return;
case 'w': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "pq", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vswpq"
Mnemonic = "vswp";
return;
}
break;
case 'z': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "ipq", 3) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vzipq"
Mnemonic = "vzip";
return;
}
break;
}
break;
case 6: // 10 strings to match.
if (Mnemonic[0] != 'f')
break;
switch (Mnemonic[1]) {
default: break;
case 's': // 4 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'i': // 2 strings to match.
if (memcmp(Mnemonic.data()+3, "to", 2) != 0)
break;
switch (Mnemonic[5]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fsitod"
Mnemonic = "vcvt.f64.s32";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fsitos"
Mnemonic = "vcvt.f32.s32";
return;
}
break;
case 'q': // 2 strings to match.
if (memcmp(Mnemonic.data()+3, "rt", 2) != 0)
break;
switch (Mnemonic[5]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fsqrtd"
Mnemonic = "vsqrt";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fsqrts"
Mnemonic = "vsqrt";
return;
}
break;
}
break;
case 't': // 4 strings to match.
if (Mnemonic[2] != 'o')
break;
switch (Mnemonic[3]) {
default: break;
case 's': // 2 strings to match.
if (Mnemonic[4] != 'i')
break;
switch (Mnemonic[5]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftosid"
Mnemonic = "vcvtr.s32.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftosis"
Mnemonic = "vcvtr.s32.f32";
return;
}
break;
case 'u': // 2 strings to match.
if (Mnemonic[4] != 'i')
break;
switch (Mnemonic[5]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftouid"
Mnemonic = "vcvtr.u32.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftouis"
Mnemonic = "vcvtr.u32.f32";
return;
}
break;
}
break;
case 'u': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "ito", 3) != 0)
break;
switch (Mnemonic[5]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fuitod"
Mnemonic = "vcvt.f64.u32";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "fuitos"
Mnemonic = "vcvt.f32.u32";
return;
}
break;
}
break;
case 7: // 9 strings to match.
switch (Mnemonic[0]) {
default: break;
case 'f': // 8 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'l': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "dm", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+5, "ax", 2) != 0)
break;
if (Features.test(Feature_HasVFP2Bit)) // "fldmeax"
Mnemonic = "fldmdbx";
return;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+5, "dx", 2) != 0)
break;
if (Features.test(Feature_HasVFP2Bit)) // "fldmfdx"
Mnemonic = "fldmiax";
return;
}
break;
case 's': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "tm", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+5, "ax", 2) != 0)
break;
if (Features.test(Feature_HasVFP2Bit)) // "fstmeax"
Mnemonic = "fstmiax";
return;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+5, "dx", 2) != 0)
break;
if (Features.test(Feature_HasVFP2Bit)) // "fstmfdx"
Mnemonic = "fstmdbx";
return;
}
break;
case 't': // 4 strings to match.
if (Mnemonic[2] != 'o')
break;
switch (Mnemonic[3]) {
default: break;
case 's': // 2 strings to match.
if (memcmp(Mnemonic.data()+4, "iz", 2) != 0)
break;
switch (Mnemonic[6]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftosizd"
Mnemonic = "vcvt.s32.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftosizs"
Mnemonic = "vcvt.s32.f32";
return;
}
break;
case 'u': // 2 strings to match.
if (memcmp(Mnemonic.data()+4, "iz", 2) != 0)
break;
switch (Mnemonic[6]) {
default: break;
case 'd': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftouizd"
Mnemonic = "vcvt.u32.f64";
return;
case 's': // 1 string to match.
if (Features.test(Feature_HasVFP2Bit)) // "ftouizs"
Mnemonic = "vcvt.u32.f32";
return;
}
break;
}
break;
}
break;
case 'v': // 1 string to match.
if (memcmp(Mnemonic.data()+1, "ldrb.8", 6) != 0)
break;
Mnemonic = "vldrb.u8"; // "vldrb.8"
return;
}
break;
case 8: // 13 strings to match.
switch (Mnemonic[0]) {
default: break;
case 'q': // 1 string to match.
if (memcmp(Mnemonic.data()+1, "subaddx", 7) != 0)
break;
Mnemonic = "qsax"; // "qsubaddx"
return;
case 's': // 2 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'a': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "ddsubx", 6) != 0)
break;
Mnemonic = "sasx"; // "saddsubx"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "ubaddx", 6) != 0)
break;
Mnemonic = "ssax"; // "ssubaddx"
return;
}
break;
case 'u': // 2 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'a': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "ddsubx", 6) != 0)
break;
Mnemonic = "uasx"; // "uaddsubx"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+2, "ubaddx", 6) != 0)
break;
Mnemonic = "usax"; // "usubaddx"
return;
}
break;
case 'v': // 8 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'l': // 6 strings to match.
if (memcmp(Mnemonic.data()+2, "dr", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'b': // 3 strings to match.
switch (Mnemonic[5]) {
default: break;
case '.': // 1 string to match.
if (memcmp(Mnemonic.data()+6, "s8", 2) != 0)
break;
Mnemonic = "vldrb.u8"; // "vldrb.s8"
return;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".8", 2) != 0)
break;
Mnemonic = "vldrbe.u8"; // "vldrbe.8"
return;
case 't': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".8", 2) != 0)
break;
Mnemonic = "vldrbt.u8"; // "vldrbt.8"
return;
}
break;
case 'd': // 1 string to match.
if (memcmp(Mnemonic.data()+5, ".64", 3) != 0)
break;
Mnemonic = "vldrd.u64"; // "vldrd.64"
return;
case 'h': // 1 string to match.
if (memcmp(Mnemonic.data()+5, ".16", 3) != 0)
break;
Mnemonic = "vldrh.u16"; // "vldrh.16"
return;
case 'w': // 1 string to match.
if (memcmp(Mnemonic.data()+5, ".32", 3) != 0)
break;
Mnemonic = "vldrw.u32"; // "vldrw.32"
return;
}
break;
case 's': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "trb.", 4) != 0)
break;
switch (Mnemonic[6]) {
default: break;
case 's': // 1 string to match.
if (Mnemonic[7] != '8')
break;
Mnemonic = "vstrb.8"; // "vstrb.s8"
return;
case 'u': // 1 string to match.
if (Mnemonic[7] != '8')
break;
Mnemonic = "vstrb.8"; // "vstrb.u8"
return;
}
break;
}
break;
}
break;
case 9: // 35 strings to match.
switch (Mnemonic[0]) {
default: break;
case 's': // 2 strings to match.
if (Mnemonic[1] != 'h')
break;
switch (Mnemonic[2]) {
default: break;
case 'a': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "ddsubx", 6) != 0)
break;
Mnemonic = "shasx"; // "shaddsubx"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "ubaddx", 6) != 0)
break;
Mnemonic = "shsax"; // "shsubaddx"
return;
}
break;
case 'u': // 4 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'h': // 2 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'a': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "ddsubx", 6) != 0)
break;
Mnemonic = "uhasx"; // "uhaddsubx"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "ubaddx", 6) != 0)
break;
Mnemonic = "uhsax"; // "uhsubaddx"
return;
}
break;
case 'q': // 2 strings to match.
switch (Mnemonic[2]) {
default: break;
case 'a': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "ddsubx", 6) != 0)
break;
Mnemonic = "uqasx"; // "uqaddsubx"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+3, "ubaddx", 6) != 0)
break;
Mnemonic = "uqsax"; // "uqsubaddx"
return;
}
break;
}
break;
case 'v': // 29 strings to match.
switch (Mnemonic[1]) {
default: break;
case 'l': // 14 strings to match.
if (memcmp(Mnemonic.data()+2, "dr", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'b': // 2 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".s8", 3) != 0)
break;
Mnemonic = "vldrbe.u8"; // "vldrbe.s8"
return;
case 't': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".s8", 3) != 0)
break;
Mnemonic = "vldrbt.u8"; // "vldrbt.s8"
return;
}
break;
case 'd': // 4 strings to match.
switch (Mnemonic[5]) {
default: break;
case '.': // 2 strings to match.
switch (Mnemonic[6]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "64", 2) != 0)
break;
Mnemonic = "vldrd.u64"; // "vldrd.f64"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "64", 2) != 0)
break;
Mnemonic = "vldrd.u64"; // "vldrd.s64"
return;
}
break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".64", 3) != 0)
break;
Mnemonic = "vldrde.u64"; // "vldrde.64"
return;
case 't': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".64", 3) != 0)
break;
Mnemonic = "vldrdt.u64"; // "vldrdt.64"
return;
}
break;
case 'h': // 4 strings to match.
switch (Mnemonic[5]) {
default: break;
case '.': // 2 strings to match.
switch (Mnemonic[6]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "16", 2) != 0)
break;
Mnemonic = "vldrh.u16"; // "vldrh.f16"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "16", 2) != 0)
break;
Mnemonic = "vldrh.u16"; // "vldrh.s16"
return;
}
break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".16", 3) != 0)
break;
Mnemonic = "vldrhe.u16"; // "vldrhe.16"
return;
case 't': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".16", 3) != 0)
break;
Mnemonic = "vldrht.u16"; // "vldrht.16"
return;
}
break;
case 'w': // 4 strings to match.
switch (Mnemonic[5]) {
default: break;
case '.': // 2 strings to match.
switch (Mnemonic[6]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "32", 2) != 0)
break;
Mnemonic = "vldrw.u32"; // "vldrw.f32"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "32", 2) != 0)
break;
Mnemonic = "vldrw.u32"; // "vldrw.s32"
return;
}
break;
case 'e': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".32", 3) != 0)
break;
Mnemonic = "vldrwe.u32"; // "vldrwe.32"
return;
case 't': // 1 string to match.
if (memcmp(Mnemonic.data()+6, ".32", 3) != 0)
break;
Mnemonic = "vldrwt.u32"; // "vldrwt.32"
return;
}
break;
}
break;
case 'm': // 2 strings to match.
if (memcmp(Mnemonic.data()+2, "ovq.f", 5) != 0)
break;
switch (Mnemonic[7]) {
default: break;
case '3': // 1 string to match.
if (Mnemonic[8] != '2')
break;
if (Features.test(Feature_HasNEONBit)) // "vmovq.f32"
Mnemonic = "vmov.f32";
return;
case '6': // 1 string to match.
if (Mnemonic[8] != '4')
break;
if (Features.test(Feature_HasNEONBit)) // "vmovq.f64"
Mnemonic = "vmov.f64";
return;
}
break;
case 's': // 13 strings to match.
if (memcmp(Mnemonic.data()+2, "tr", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'b': // 4 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 's': // 1 string to match.
if (Mnemonic[8] != '8')
break;
Mnemonic = "vstrbe.8"; // "vstrbe.s8"
return;
case 'u': // 1 string to match.
if (Mnemonic[8] != '8')
break;
Mnemonic = "vstrbe.8"; // "vstrbe.u8"
return;
}
break;
case 't': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 's': // 1 string to match.
if (Mnemonic[8] != '8')
break;
Mnemonic = "vstrbt.8"; // "vstrbt.s8"
return;
case 'u': // 1 string to match.
if (Mnemonic[8] != '8')
break;
Mnemonic = "vstrbt.8"; // "vstrbt.u8"
return;
}
break;
}
break;
case 'd': // 3 strings to match.
if (Mnemonic[5] != '.')
break;
switch (Mnemonic[6]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "64", 2) != 0)
break;
Mnemonic = "vstrd.64"; // "vstrd.f64"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "64", 2) != 0)
break;
Mnemonic = "vstrd.64"; // "vstrd.s64"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "64", 2) != 0)
break;
Mnemonic = "vstrd.64"; // "vstrd.u64"
return;
}
break;
case 'h': // 3 strings to match.
if (Mnemonic[5] != '.')
break;
switch (Mnemonic[6]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "16", 2) != 0)
break;
Mnemonic = "vstrh.16"; // "vstrh.f16"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "16", 2) != 0)
break;
Mnemonic = "vstrh.16"; // "vstrh.s16"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "16", 2) != 0)
break;
Mnemonic = "vstrh.16"; // "vstrh.u16"
return;
}
break;
case 'w': // 3 strings to match.
if (Mnemonic[5] != '.')
break;
switch (Mnemonic[6]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "32", 2) != 0)
break;
Mnemonic = "vstrw.32"; // "vstrw.f32"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "32", 2) != 0)
break;
Mnemonic = "vstrw.32"; // "vstrw.s32"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+7, "32", 2) != 0)
break;
Mnemonic = "vstrw.32"; // "vstrw.u32"
return;
}
break;
}
break;
}
break;
}
break;
case 10: // 30 strings to match.
if (Mnemonic[0] != 'v')
break;
switch (Mnemonic[1]) {
default: break;
case 'l': // 12 strings to match.
if (memcmp(Mnemonic.data()+2, "dr", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 4 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vldrde.u64"; // "vldrde.f64"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vldrde.u64"; // "vldrde.s64"
return;
}
break;
case 't': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vldrdt.u64"; // "vldrdt.f64"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vldrdt.u64"; // "vldrdt.s64"
return;
}
break;
}
break;
case 'h': // 4 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vldrhe.u16"; // "vldrhe.f16"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vldrhe.u16"; // "vldrhe.s16"
return;
}
break;
case 't': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vldrht.u16"; // "vldrht.f16"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vldrht.u16"; // "vldrht.s16"
return;
}
break;
}
break;
case 'w': // 4 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vldrwe.u32"; // "vldrwe.f32"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vldrwe.u32"; // "vldrwe.s32"
return;
}
break;
case 't': // 2 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vldrwt.u32"; // "vldrwt.f32"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vldrwt.u32"; // "vldrwt.s32"
return;
}
break;
}
break;
}
break;
case 's': // 18 strings to match.
if (memcmp(Mnemonic.data()+2, "tr", 2) != 0)
break;
switch (Mnemonic[4]) {
default: break;
case 'd': // 6 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 3 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vstrde.64"; // "vstrde.f64"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vstrde.64"; // "vstrde.s64"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vstrde.64"; // "vstrde.u64"
return;
}
break;
case 't': // 3 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vstrdt.64"; // "vstrdt.f64"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vstrdt.64"; // "vstrdt.s64"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "64", 2) != 0)
break;
Mnemonic = "vstrdt.64"; // "vstrdt.u64"
return;
}
break;
}
break;
case 'h': // 6 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 3 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vstrhe.16"; // "vstrhe.f16"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vstrhe.16"; // "vstrhe.s16"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vstrhe.16"; // "vstrhe.u16"
return;
}
break;
case 't': // 3 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vstrht.16"; // "vstrht.f16"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vstrht.16"; // "vstrht.s16"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "16", 2) != 0)
break;
Mnemonic = "vstrht.16"; // "vstrht.u16"
return;
}
break;
}
break;
case 'w': // 6 strings to match.
switch (Mnemonic[5]) {
default: break;
case 'e': // 3 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vstrwe.32"; // "vstrwe.f32"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vstrwe.32"; // "vstrwe.s32"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vstrwe.32"; // "vstrwe.u32"
return;
}
break;
case 't': // 3 strings to match.
if (Mnemonic[6] != '.')
break;
switch (Mnemonic[7]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vstrwt.32"; // "vstrwt.f32"
return;
case 's': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vstrwt.32"; // "vstrwt.s32"
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+8, "32", 2) != 0)
break;
Mnemonic = "vstrwt.32"; // "vstrwt.u32"
return;
}
break;
}
break;
}
break;
}
break;
case 11: // 2 strings to match.
if (memcmp(Mnemonic.data()+0, "vrecpeq.", 8) != 0)
break;
switch (Mnemonic[8]) {
default: break;
case 'f': // 1 string to match.
if (memcmp(Mnemonic.data()+9, "32", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vrecpeq.f32"
Mnemonic = "vrecpe.f32";
return;
case 'u': // 1 string to match.
if (memcmp(Mnemonic.data()+9, "32", 2) != 0)
break;
if (Features.test(Feature_HasNEONBit)) // "vrecpeq.u32"
Mnemonic = "vrecpe.u32";
return;
}
break;
}
}
enum {
Tie0_1_1,
Tie0_2_2,
Tie0_2_4,
Tie0_3_3,
Tie0_4_4,
Tie0_4_5,
Tie1_1_1,
Tie1_2_2,
Tie1_3_3,
Tie1_4_4,
Tie2_4_4,
};
static const uint8_t TiedAsmOperandTable[][3] = {
/* Tie0_1_1 */ { 0, 1, 1 },
/* Tie0_2_2 */ { 0, 2, 2 },
/* Tie0_2_4 */ { 0, 2, 4 },
/* Tie0_3_3 */ { 0, 3, 3 },
/* Tie0_4_4 */ { 0, 4, 4 },
/* Tie0_4_5 */ { 0, 4, 5 },
/* Tie1_1_1 */ { 1, 1, 1 },
/* Tie1_2_2 */ { 1, 2, 2 },
/* Tie1_3_3 */ { 1, 3, 3 },
/* Tie1_4_4 */ { 1, 4, 4 },
/* Tie2_4_4 */ { 2, 4, 4 },
};
namespace {
enum OperatorConversionKind {
CVT_Done,
CVT_Reg,
CVT_Tied,
CVT_95_Reg,
CVT_95_addCCOutOperands,
CVT_95_addCondCodeOperands,
CVT_95_addRegShiftedRegOperands,
CVT_95_addModImmOperands,
CVT_95_addModImmNotOperands,
CVT_95_addRegShiftedImmOperands,
CVT_95_addImmOperands,
CVT_95_addT2SOImmNotOperands,
CVT_95_addImm0_95_4095NegOperands,
CVT_95_addImm0_95_508s4Operands,
CVT_regSP,
CVT_95_addImm0_95_508s4NegOperands,
CVT_95_addT2SOImmNegOperands,
CVT_95_addThumbModImmNeg8_95_255Operands,
CVT_95_addModImmNegOperands,
CVT_95_addImm0_95_1020s4Operands,
CVT_95_addThumbModImmNeg1_95_7Operands,
CVT_95_addUnsignedOffset_95_b8s2Operands,
CVT_95_addAdrLabelOperands,
CVT_imm_95_45,
CVT_95_addARMBranchTargetOperands,
CVT_cvtThumbBranches,
CVT_95_addBitfieldOperands,
CVT_95_addITCondCodeOperands,
CVT_imm_95_0,
CVT_95_addThumbBranchTargetOperands,
CVT_imm_95_15,
CVT_95_addCoprocNumOperands,
CVT_95_addCoprocRegOperands,
CVT_95_addITCondCodeInvOperands,
CVT_imm_95_22,
CVT_95_addRegListWithAPSROperands,
CVT_95_addProcIFlagsOperands,
CVT_imm_95_20,
CVT_regZR,
CVT_imm_95_12,
CVT_95_addMemBarrierOptOperands,
CVT_imm_95_16,
CVT_95_addFPImmOperands,
CVT_95_addDPRRegListOperands,
CVT_imm_95_1,
CVT_95_addInstSyncBarrierOptOperands,
CVT_95_addITMaskOperands,
CVT_95_addMemNoOffsetOperands,
CVT_95_addAddrMode5Operands,
CVT_95_addCoprocOptionOperands,
CVT_95_addPostIdxImm8s4Operands,
CVT_95_addRegListOperands,
CVT_95_addThumbMemPCOperands,
CVT_95_addConstPoolAsmImmOperands,
CVT_95_addMemThumbRIs4Operands,
CVT_95_addMemThumbRROperands,
CVT_95_addMemThumbSPIOperands,
CVT_95_addMemImm12OffsetOperands,
CVT_95_addMemImmOffsetOperands,
CVT_95_addMemRegOffsetOperands,
CVT_95_addMemUImm12OffsetOperands,
CVT_95_addT2MemRegOffsetOperands,
CVT_95_addMemPCRelImm12Operands,
CVT_95_addAM2OffsetImmOperands,
CVT_95_addPostIdxRegShiftedOperands,
CVT_95_addMemThumbRIs1Operands,
CVT_95_addMemImm8s4OffsetOperands,
CVT_95_addAddrMode3Operands,
CVT_95_addAM3OffsetOperands,
CVT_95_addMemImm0_95_1020s4OffsetOperands,
CVT_95_addMemThumbRIs2Operands,
CVT_95_addPostIdxRegOperands,
CVT_95_addPostIdxImm8Operands,
CVT_reg0,
CVT_regCPSR,
CVT_imm_95_14,
CVT_95_addBankedRegOperands,
CVT_95_addMSRMaskOperands,
CVT_cvtThumbMultiply,
CVT_regR8,
CVT_regR0,
CVT_imm_95_29,
CVT_imm_95_13,
CVT_95_addPKHASRImmOperands,
CVT_imm_95_4,
CVT_95_addImm1_95_32Operands,
CVT_imm_95_5,
CVT_95_addMveSaturateOperands,
CVT_95_addShifterImmOperands,
CVT_95_addImm1_95_16Operands,
CVT_95_addRotImmOperands,
CVT_95_addMemTBBOperands,
CVT_95_addMemTBHOperands,
CVT_95_addTraceSyncBarrierOptOperands,
CVT_95_addVPTPredNOperands,
CVT_95_addVPTPredROperands,
CVT_95_addNEONi16splatNotOperands,
CVT_95_addNEONi32splatNotOperands,
CVT_95_addNEONi16splatOperands,
CVT_95_addNEONi32splatOperands,
CVT_95_addComplexRotationOddOperands,
CVT_95_addComplexRotationEvenOperands,
CVT_95_addVectorIndex64Operands,
CVT_95_addVectorIndex32Operands,
CVT_95_addFBits16Operands,
CVT_95_addFBits32Operands,
CVT_95_addPowerTwoOperands,
CVT_95_addVectorIndex16Operands,
CVT_95_addVectorIndex8Operands,
CVT_95_addVecListOperands,
CVT_95_addDupAlignedMemory16Operands,
CVT_95_addAlignedMemory64or128Operands,
CVT_95_addAlignedMemory64or128or256Operands,
CVT_95_addAlignedMemory64Operands,
CVT_95_addVecListIndexedOperands,
CVT_95_addAlignedMemory16Operands,
CVT_95_addDupAlignedMemory32Operands,
CVT_95_addAlignedMemory32Operands,
CVT_95_addDupAlignedMemoryNoneOperands,
CVT_95_addAlignedMemoryNoneOperands,
CVT_95_addAlignedMemoryOperands,
CVT_95_addDupAlignedMemory64Operands,
CVT_95_addMVEVecListOperands,
CVT_95_addMemNoOffsetT2Operands,
CVT_95_addMemNoOffsetT2NoSpOperands,
CVT_95_addDupAlignedMemory64or128Operands,
CVT_95_addSPRRegListOperands,
CVT_95_addMemImm7s4OffsetOperands,
CVT_95_addAddrMode5FP16Operands,
CVT_95_addImm7s4Operands,
CVT_95_addMemRegRQOffsetOperands,
CVT_95_addMemNoOffsetTOperands,
CVT_95_addImm7Shift0Operands,
CVT_95_addImm7Shift1Operands,
CVT_95_addImm7Shift2Operands,
CVT_95_addNEONi32vmovOperands,
CVT_95_addNEONvmovi8ReplicateOperands,
CVT_95_addNEONvmovi16ReplicateOperands,
CVT_95_addNEONi32vmovNegOperands,
CVT_95_addNEONvmovi32ReplicateOperands,
CVT_95_addNEONi64splatOperands,
CVT_95_addNEONi8splatOperands,
CVT_95_addMVEVectorIndexOperands,
CVT_95_addMVEPairVectorIndexOperands,
CVT_cvtMVEVMOVQtoDReg,
CVT_95_addNEONinvi8ReplicateOperands,
CVT_95_addFPDRegListWithVPROperands,
CVT_95_addFPSRegListWithVPROperands,
CVT_imm_95_2,
CVT_imm_95_3,
CVT_NUM_CONVERTERS
};
enum InstructionConversionKind {
Convert_NoOperands,
Convert__Reg1_2__CCOut1_0__Tie0_1_1__Reg1_3__CondCode2_1,
Convert__Reg1_2__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__T2SOImmNot1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__RegShiftedReg3_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__ModImm1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__ModImmNot1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__RegShiftedImm2_5__CondCode2_1__CCOut1_0,
Convert__Reg1_1__Tie0_1_1__Reg1_2__CondCode2_0,
Convert__Reg1_1__Reg1_1__Imm0_40951_2__CondCode2_0,
Convert__Reg1_1__Reg1_1__Imm0_4095Neg1_2__CondCode2_0,
Convert__Reg1_1__Tie0_1_1__Imm0_508s41_2__CondCode2_0,
Convert__regSP__Tie0_1_1__Imm0_508s4Neg1_2__CondCode2_0,
Convert__Reg1_2__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_2__T2SOImmNeg1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__CCOut1_0__Reg1_2__Reg1_3__CondCode2_1,
Convert__Reg1_2__CCOut1_0__Tie0_1_1__Imm0_2551_3__CondCode2_1,
Convert__Reg1_2__CCOut1_0__Tie0_3_3__ThumbModImmNeg8_2551_3__CondCode2_1,
Convert__Reg1_2__Reg1_2__ModImmNeg1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_1__Reg1_2__Imm0_40951_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__Imm0_4095Neg1_3__CondCode2_0,
Convert__regSP__Tie0_1_1__Imm0_508s41_3__CondCode2_0,
Convert__regSP__Tie0_1_1__Imm0_508s4Neg1_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__Imm0_1020s41_3__CondCode2_0,
Convert__Reg1_1__Imm0_40951_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0,
Convert__Reg1_3__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__T2SOImmNeg1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__CCOut1_0__Reg1_3__Reg1_4__CondCode2_1,
Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_71_4__CondCode2_1,
Convert__Reg1_2__CCOut1_0__Reg1_3__ThumbModImmNeg1_71_4__CondCode2_1,
Convert__Reg1_2__Reg1_3__ModImmNeg1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__T2SOImm1_5__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__T2SOImmNeg1_5__CondCode2_1__CCOut1_0,
Convert__Reg1_1__UnsignedOffset_b8s21_2__CondCode2_0,
Convert__Reg1_1__Imm1_2__CondCode2_0,
Convert__Reg1_1__AdrLabel1_2__CondCode2_0,
Convert__Reg1_2__Imm1_3__CondCode2_0,
Convert__Reg1_1__Tie0_1_1__Reg1_2,
Convert__Reg1_1__Reg1_2,
Convert__Reg1_2__Reg1_2__T2SOImmNot1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_3__T2SOImmNot1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__T2SOImmNot1_5__CondCode2_1__CCOut1_0,
Convert__Reg1_2__CCOut1_0__Reg1_2__ImmThumbSR1_3__CondCode2_1,
Convert__Reg1_2__Reg1_2__ImmThumbSR1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_2__Imm0_321_3__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__CCOut1_0__Reg1_3__ImmThumbSR1_4__CondCode2_1,
Convert__Reg1_2__Reg1_3__ImmThumbSR1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__Imm0_321_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__ImmThumbSR1_5__CondCode2_1__CCOut1_0,
Convert__Reg1_1__Reg1_2__Tie0_1_1__Tie1_1_1__Reg1_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__Tie0_1_1__Tie1_1_1__MVELongShift1_3__CondCode2_0,
Convert__imm_95_45__CondCode2_0,
Convert__CondCode2_0__Reg1_1__Reg1_2__Reg1_3,
Convert__ARMBranchTarget1_1__CondCode2_0,
ConvertCustom_cvtThumbBranches,
Convert__Imm1_1__Imm1_2__CondCode2_0,
Convert__Reg1_1__Tie0_1_1__Bitfield1_2__CondCode2_0,
Convert__Imm1_0__Imm1_1__Imm1_2__CondCodeNoAL1_3,
Convert__Reg1_1__Tie0_1_1__Reg1_2__Bitfield1_3__CondCode2_0,
Convert__Imm1_1__Reg1_2__CondCode2_0,
Convert__imm_95_0,
Convert__Imm0_2551_0,
Convert__Imm0_655351_0,
Convert__ARMBranchTarget1_0,
Convert__CondCode2_0__ThumbBranchTarget1_1,
Convert__CondCode2_0__ThumbBranchTarget1_2,
Convert__Reg1_0,
Convert__ThumbBranchTarget1_0,
Convert__Reg1_1__CondCode2_0,
Convert__CondCode2_0__Reg1_1,
Convert__CondCode2_0__ARMBranchTarget1_1,
Convert__imm_95_15__CondCode2_0,
Convert__CondCode2_0,
Convert__Reg1_0__ThumbBranchTarget1_1,
Convert__CoprocNum1_1__Imm0_151_2__CoprocReg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0,
Convert__CoprocNum1_0__Imm0_151_1__CoprocReg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5,
Convert__Reg1_0__Reg1_1__Reg1_1__CondCodeNoALInv1_2,
Convert__imm_95_22__CondCode2_0,
Convert__CondCode2_0__RegListWithAPSR1_1,
Convert__Reg1_1__Reg1_2__CondCode2_0,
Convert__Reg1_1__ModImmNeg1_2__CondCode2_0,
Convert__Reg1_1__T2SOImmNeg1_2__CondCode2_0,
Convert__Reg1_1__RegShiftedImm2_2__CondCode2_0,
Convert__Reg1_1__RegShiftedReg3_2__CondCode2_0,
Convert__Reg1_1__T2SOImm1_2__CondCode2_0,
Convert__Reg1_1__ModImm1_2__CondCode2_0,
Convert__Reg1_2__Reg1_3__CondCode2_0,
Convert__Reg1_2__RegShiftedImm2_3__CondCode2_0,
Convert__Reg1_2__T2SOImm1_3__CondCode2_0,
Convert__Reg1_1__Imm0_2551_2__CondCode2_0,
Convert__Imm0_311_0,
Convert__Imm0_311_1,
Convert__Imm1_0__ProcIFlags1_1,
Convert__Imm1_0__ProcIFlags1_2,
Convert__Imm1_0__ProcIFlags1_1__Imm0_311_2,
Convert__Imm1_0__ProcIFlags1_1__Imm1_2,
Convert__Imm1_0__ProcIFlags1_2__Imm1_3,
Convert__Reg1_0__Reg1_1__Reg1_2,
Convert__imm_95_20__CondCode2_0,
Convert__Reg1_0__Reg1_1__Reg1_2__CondCodeNoAL1_3,
Convert__Reg1_0__regZR__regZR__CondCodeNoALInv1_1,
Convert__Reg1_1__CoprocNum1_0__Imm13b1_2,
Convert__Reg1_2__CoprocNum1_1__Tie0_1_1__Imm13b1_3__CondCode2_0,
Convert__Reg1_1__CoprocNum1_0__Reg1_2__Imm9b1_3,
Convert__Reg1_2__CoprocNum1_1__Tie0_1_1__Reg1_3__Imm9b1_4__CondCode2_0,
Convert__Reg1_1__CoprocNum1_0__Reg1_2__Reg1_3__Imm6b1_4,
Convert__Reg1_2__CoprocNum1_1__Tie0_1_1__Reg1_3__Reg1_4__Imm6b1_5__CondCode2_0,
Convert__Imm0_151_1__CondCode2_0,
Convert__Imm0_151_2__CondCode2_0,
Convert__imm_95_12,
Convert__imm_95_12__CondCode2_0,
Convert__Reg1_0__Reg1_1,
Convert__imm_95_15,
Convert__MemBarrierOpt1_0,
Convert__MemBarrierOpt1_1__CondCode2_0,
Convert__MemBarrierOpt1_2__CondCode2_0,
Convert__imm_95_0__CondCode2_0,
Convert__imm_95_16__CondCode2_0,
Convert__Reg1_1__FPImm1_2__CondCode2_0,
Convert__Reg1_1__Tie0_2_2__CondCode2_0__DPRRegList1_3,
Convert__Reg1_1__CondCode2_0__DPRRegList1_2,
Convert__Reg1_1__Tie0_2_2__Reg1_2__imm_95_1__CondCode2_0,
Convert__Reg1_1__Tie0_2_2__Reg1_2__imm_95_0__CondCode2_0,
Convert__Imm0_2391_1__CondCode2_0,
Convert__Imm0_2391_2__CondCode2_0,
Convert__Imm0_631_0,
Convert__Imm0_655351_1,
Convert__InstSyncBarrierOpt1_0,
Convert__InstSyncBarrierOpt1_1__CondCode2_0,
Convert__ITCondCode1_1__ITMask1_0,
Convert__Reg1_1__MemNoOffset1_2__CondCode2_0,
Convert__Reg1_1__Reg1_2__MemNoOffset1_3__CondCode2_0,
Convert__CoprocNum1_1__CoprocReg1_2__AddrMode52_3__CondCode2_0,
Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__CoprocOption1_4__CondCode2_0,
Convert__CoprocNum1_1__CoprocReg1_2__MemNoOffset1_3__PostIdxImm8s41_4__CondCode2_0,
Convert__CoprocNum1_0__CoprocReg1_1__AddrMode52_2,
Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__CoprocOption1_3,
Convert__CoprocNum1_0__CoprocReg1_1__MemNoOffset1_2__PostIdxImm8s41_3,
Convert__Reg1_1__CondCode2_0__RegList1_2,
Convert__Reg1_2__CondCode2_0__RegList1_3,
Convert__Reg1_1__CondCode2_0__RegList1_3,
Convert__Reg1_1__Tie0_2_2__CondCode2_0__RegList1_3,
Convert__Reg1_2__Tie0_3_3__CondCode2_0__RegList1_4,
Convert__Reg1_1__ThumbMemPC1_2__CondCode2_0,
Convert__Reg1_1__ConstPoolAsmImm1_2__CondCode2_0,
Convert__Reg1_1__MemThumbRIs42_2__CondCode2_0,
Convert__Reg1_1__MemThumbRR2_2__CondCode2_0,
Convert__Reg1_1__MemThumbSPI2_2__CondCode2_0,
Convert__Reg1_1__MemImm12Offset2_2__CondCode2_0,
Convert__Reg1_1__MemNegImm8Offset2_2__CondCode2_0,
Convert__Reg1_1__MemRegOffset3_2__CondCode2_0,
Convert__Reg1_1__MemUImm12Offset2_2__CondCode2_0,
Convert__Reg1_1__T2MemRegOffset3_2__CondCode2_0,
Convert__Reg1_1__MemPCRelImm121_2__CondCode2_0,
Convert__Reg1_2__ConstPoolAsmImm1_3__CondCode2_0,
Convert__Reg1_2__MemUImm12Offset2_3__CondCode2_0,
Convert__Reg1_2__T2MemRegOffset3_3__CondCode2_0,
Convert__Reg1_2__MemPCRelImm121_3__CondCode2_0,
Convert__Reg1_1__imm_95_0__MemImm12Offset2_2__CondCode2_0,
Convert__Reg1_1__imm_95_0__MemImm8Offset2_2__CondCode2_0,
Convert__Reg1_1__MemNoOffset1_2__Tie1_3_3__AM2OffsetImm2_3__CondCode2_0,
Convert__Reg1_1__MemNoOffset1_2__Tie1_3_3__Imm1_3__CondCode2_0,
Convert__Reg1_1__MemNoOffset1_2__Tie1_3_3__PostIdxRegShifted2_3__CondCode2_0,
Convert__Reg1_1__imm_95_0__MemRegOffset3_2__CondCode2_0,
Convert__Reg1_2__MemImm8Offset2_3__CondCode2_0,
Convert__Reg1_2__MemNoOffset1_3__Imm1_4__CondCode2_0,
Convert__Reg1_1__MemThumbRIs12_2__CondCode2_0,
Convert__Reg1_1__MemPosImm8Offset2_2__CondCode2_0,
Convert__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__imm_95_0__MemImm8s4Offset2_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2_4_4__Imm1_4__CondCode2_0,
Convert__Reg1_1__Reg1_2__imm_95_0__AddrMode33_3__CondCode2_0,
Convert__Reg1_1__Reg1_2__MemNoOffset1_3__Tie2_4_4__AM3Offset2_4__CondCode2_0,
Convert__Reg1_1__MemImm0_1020s4Offset2_2__CondCode2_0,
Convert__Reg1_1__MemThumbRIs22_2__CondCode2_0,
Convert__Reg1_1__AddrMode33_2__CondCode2_0,
Convert__Reg1_1__imm_95_0__AddrMode33_2__CondCode2_0,
Convert__Reg1_1__MemNoOffset1_2__Tie1_3_3__AM3Offset2_3__CondCode2_0,
Convert__Reg1_1__MemNoOffset1_2__Tie1_3_3__PostIdxReg2_3__CondCode2_0,
Convert__Reg1_1__MemNoOffset1_2__Tie1_3_3__PostIdxImm81_3__CondCode2_0,
Convert__LELabel1_0,
Convert__imm_95_0__Reg1_0__LELabel1_1,
Convert__Reg1_2__CCOut1_0__Reg1_2__Imm0_311_3__CondCode2_1,
Convert__Reg1_2__Reg1_2__Imm1_311_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_2__Imm0_311_3__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_3__Imm1_311_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__CCOut1_0__Reg1_3__Imm0_311_4__CondCode2_1,
Convert__Reg1_2__Reg1_3__Imm1_311_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__Imm0_311_4__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__Imm1_311_5__CondCode2_1__CCOut1_0,
Convert__Reg1_3__Reg1_4__CondCode2_1__CCOut1_0,
Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0,
Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0,
Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__imm_95_0,
Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4__Imm0_71_5,
Convert__CoprocNum1_1__Imm0_151_2__Reg1_3__Reg1_4__CoprocReg1_5__CondCode2_0,
Convert__CoprocNum1_0__Imm0_151_1__Reg1_2__Reg1_3__CoprocReg1_4,
Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__CondCode2_1__CCOut1_0,
Convert__Reg1_1__Imm256_65535Expr1_2__CondCode2_0,
Convert__Reg1_1__T2SOImm1_2__CondCode2_0__reg0,
Convert__Reg1_1__T2SOImmNot1_2__CondCode2_0__reg0,
Convert__Reg1_1__Imm0_65535Expr1_2__CondCode2_0,
Convert__Reg1_2__CCOut1_0__Imm0_2551_3__CondCode2_1,
Convert__Reg1_2__ModImmNot1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__RegShiftedReg3_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__ModImm1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__RegShiftedImm2_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__RegShiftedReg3_3__CondCode2_0,
Convert__Reg1_2__T2SOImm1_3__CondCode2_0__reg0,
Convert__Reg1_2__Reg1_3__CondCode2_0__reg0,
Convert__Reg1_3__T2SOImm1_4__CondCode2_1__CCOut1_0,
Convert__Reg1_0__regCPSR__Imm0_2551_1__imm_95_14__imm_95_0,
Convert__Reg1_1__T2SOImm1_2__CondCode2_0__regCPSR,
Convert__Reg1_1__Reg1_2__CondCode2_0__regCPSR,
Convert__Reg1_2__T2SOImm1_3__CondCode2_0__regCPSR,
Convert__Reg1_2__Reg1_3__CondCode2_0__regCPSR,
Convert__Reg1_1__Tie0_1_1__Imm0_65535Expr1_2__CondCode2_0,
Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__imm_95_0__CondCode2_0,
Convert__Reg1_3__CoprocNum1_1__Imm0_71_2__CoprocReg1_4__CoprocReg1_5__Imm0_71_6__CondCode2_0,
Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__imm_95_0,
Convert__Reg1_2__CoprocNum1_0__Imm0_71_1__CoprocReg1_3__CoprocReg1_4__Imm0_71_5,
Convert__Reg1_3__Reg1_4__CoprocNum1_1__Imm0_151_2__CoprocReg1_5__CondCode2_0,
Convert__Reg1_2__Reg1_3__CoprocNum1_0__Imm0_151_1__CoprocReg1_4,
Convert__Reg1_1__BankedReg1_2__CondCode2_0,
Convert__Reg1_1__MSRMask1_2__CondCode2_0,
Convert__BankedReg1_1__Reg1_2__CondCode2_0,
Convert__MSRMask1_1__Reg1_2__CondCode2_0,
Convert__MSRMask1_1__ModImm1_2__CondCode2_0,
Convert__Reg1_1__Reg1_2__Reg1_1__CondCode2_0,
ConvertCustom_cvtThumbMultiply,
Convert__Reg1_2__CCOut1_0__Reg1_3__CondCode2_1,
Convert__Reg1_2__T2SOImm1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_2__T2SOImmNot1_3__CondCode2_1__CCOut1_0,
Convert__Reg1_3__RegShiftedImm2_4__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_1__CCOut1_0,
Convert__regR8__regR8__imm_95_14__imm_95_0,
Convert__regR0__regR0__CondCode2_0__reg0,
Convert__imm_95_29__CondCode2_0,
Convert__imm_95_13__CondCode2_0,
Convert__Reg1_1__CondCode2_0__Reg1_2__Reg1_3,
Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0,
Convert__Reg1_1__Reg1_2__Reg1_3__PKHLSLImm1_4__CondCode2_0,
Convert__Reg1_1__Reg1_3__Reg1_2__imm_95_0__CondCode2_0,
Convert__Reg1_1__Reg1_2__Reg1_3__PKHASRImm1_4__CondCode2_0,
Convert__MemImm12Offset2_0,
Convert__MemRegOffset3_0,
Convert__Imm1_1__CondCode2_0,
Convert__MemNegImm8Offset2_1__CondCode2_0,
Convert__MemUImm12Offset2_1__CondCode2_0,
Convert__T2MemRegOffset3_1__CondCode2_0,
Convert__MemPCRelImm121_1__CondCode2_0,
Convert__Imm1_2__CondCode2_0,
Convert__MemNegImm8Offset2_2__CondCode2_0,
Convert__MemUImm12Offset2_2__CondCode2_0,
Convert__T2MemRegOffset3_2__CondCode2_0,
Convert__MemPCRelImm121_2__CondCode2_0,
Convert__CondCode2_0__RegList1_1,
Convert__regSP__Tie0_1_1__CondCode2_0__RegList1_1,
Convert__regSP__Tie0_1_1__CondCode2_0__RegList1_2,
Convert__imm_95_4__imm_95_14__imm_95_0,
Convert__imm_95_4,
Convert__Reg1_1__Reg1_2__Imm0_311_3__Imm1_321_4__CondCode2_0,
Convert__SetEndImm1_0,
Convert__Imm0_11_0,
Convert__imm_95_4__CondCode2_0,
Convert__imm_95_5__CondCode2_0,
Convert__Reg1_1__Tie0_1_1__Reg1_2__Reg1_3,
Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0_1_1__Tie1_1_1__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0_1_1__Tie1_1_1__CondCode2_1__CCOut1_0,
Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_5__Tie0_3_3__Tie1_4_4__CondCode2_1__CCOut1_0,
Convert__Reg1_1__Tie0_2_2__Reg1_2__CondCode2_0,
Convert__Reg1_1__Reg1_2__Tie0_1_1__Tie1_1_1__Reg1_4__MveSaturate1_3__CondCode2_0,
Convert__Reg1_1__Tie0_2_2__MVELongShift1_2__CondCode2_0,
Convert__Imm0_311_2,
Convert__Imm0_311_1__CondCode2_0,
Convert__Imm0_311_2__CondCode2_0,
Convert__Imm0_311_3__CondCode2_0,
Convert__Reg1_1__Imm1_321_2__Reg1_3__imm_95_0__CondCode2_0,
Convert__Reg1_1__Imm1_321_2__Reg1_3__ShifterImm1_4__CondCode2_0,
Convert__Reg1_1__Imm1_161_2__Reg1_3__CondCode2_0,
Convert__imm_95_0__imm_95_14__imm_95_0,
Convert__Reg1_1__Reg1_2__Reg1_3__MemNoOffset1_4__CondCode2_0,
Convert__imm_95_0__Reg1_1__MemImm8Offset2_2__CondCode2_0,
Convert__MemNoOffset1_2__Reg1_1__Tie0_3_3__Imm1_3__CondCode2_0,
Convert__imm_95_0__Reg1_1__MemImm12Offset2_2__CondCode2_0,
Convert__MemNoOffset1_2__Reg1_1__Tie0_3_3__AM2OffsetImm2_3__CondCode2_0,
Convert__MemNoOffset1_2__Reg1_1__Tie0_3_3__PostIdxRegShifted2_3__CondCode2_0,
Convert__imm_95_0__Reg1_1__MemRegOffset3_2__CondCode2_0,
Convert__imm_95_0__Reg1_1__Reg1_2__MemImm8s4Offset2_3__CondCode2_0,
Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0_4_4__Imm1_4__CondCode2_0,
Convert__imm_95_0__Reg1_1__Reg1_2__AddrMode33_3__CondCode2_0,
Convert__MemNoOffset1_3__Reg1_1__Reg1_2__Tie0_4_4__AM3Offset2_4__CondCode2_0,
Convert__Reg1_1__Reg1_2__MemImm0_1020s4Offset2_3__CondCode2_0,
Convert__imm_95_0__Reg1_1__AddrMode33_2__CondCode2_0,
Convert__MemNoOffset1_2__Reg1_1__Tie0_3_3__AM3Offset2_3__CondCode2_0,
Convert__MemNoOffset1_2__Reg1_1__Tie0_3_3__PostIdxImm81_3__CondCode2_0,
Convert__MemNoOffset1_2__Reg1_1__Tie0_3_3__PostIdxReg2_3__CondCode2_0,
Convert__Imm0_2551_3__CondCode2_0,
Convert__Imm0_2551_1__CondCode2_0,
Convert__Imm24bit1_1__CondCode2_0,
Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0,
Convert__Reg1_1__Reg1_2__imm_95_0__CondCode2_0,
Convert__Reg1_2__Reg1_3__imm_95_0__CondCode2_0,
Convert__Reg1_1__Reg1_2__RotImm1_3__CondCode2_0,
Convert__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0,
Convert__MemTBB2_1__CondCode2_0,
Convert__MemTBH2_1__CondCode2_0,
Convert__TraceSyncBarrierOpt1_0,
Convert__TraceSyncBarrierOpt1_1__CondCode2_0,
Convert__Reg1_1__Imm0_311_2__Reg1_3__imm_95_0__CondCode2_0,
Convert__Reg1_1__Imm0_311_2__Reg1_3__ShifterImm1_4__CondCode2_0,
Convert__Reg1_1__Imm0_151_2__Reg1_3__CondCode2_0,
Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0,
Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN3_0,
Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredR4_0,
Convert__Reg1_2__Reg1_3__VPTPredR4_0,
Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0,
Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0,
Convert__Reg1_2__imm_95_0__Reg1_3__Reg1_4__imm_95_0__VPTPredR4_0,
Convert__Reg1_2__imm_95_0__Reg1_3__Reg1_4__VPTPredR4_0,
Convert__Reg1_2__Reg1_3__Reg1_4__VPTPredN3_0,
Convert__Reg1_2__Reg1_3__Tie0_1_1__Tie1_1_1__Reg1_4__VPTPredN3_0,
Convert__Reg1_2__Reg1_3__VPTPredN3_0,
Convert__Reg1_2__Tie0_1_1__Reg1_3__VPTPredN3_0,
Convert__Reg1_1__Reg1_1__Reg1_2__CondCode2_0,
Convert__Reg1_2__NEONi16splatNot1_3__Tie0_3_3__CondCode2_0,
Convert__Reg1_2__NEONi32splatNot1_3__Tie0_3_3__CondCode2_0,
Convert__Reg1_2__Tie0_3_3__NEONi16splatNot1_3__VPTPredN3_0,
Convert__Reg1_2__Tie0_3_3__NEONi32splatNot1_3__VPTPredN3_0,
Convert__Reg1_1__Reg1_2__Reg1_3__VPTPredR4_0,
Convert__Reg1_2__NEONi16splat1_3__Tie0_1_1__CondCode2_0,
Convert__Reg1_2__NEONi32splat1_3__Tie0_1_1__CondCode2_0,
Convert__Reg1_2__Tie0_1_1__NEONi16splat1_3__VPTPredN3_0,
Convert__Reg1_2__Tie0_1_1__NEONi32splat1_3__VPTPredN3_0,
Convert__Reg1_1__Tie0_1_1__Reg1_2__Reg1_3__CondCode2_0,
Convert__Reg1_2__Tie0_3_3__Reg1_3__Reg1_4__CondCode2_0,
Convert__Reg1_1__Reg1_2__Reg1_3__ComplexRotationOdd1_4,
Convert__Reg1_2__Reg1_3__Reg1_4__ComplexRotationOdd1_5__VPTPredR4_0,
Convert__Reg1_2__Reg1_2__CondCode2_0,
Convert__Reg1_1__Tie0_1_1__Reg1_2__Reg1_3__ComplexRotationEven1_4,
Convert__Reg1_1__Tie0_1_1__Reg1_2__Reg1_3__VectorIndex641_4__ComplexRotationEven1_5,
Convert__Reg1_1__Tie0_1_1__Reg1_2__Reg1_3__VectorIndex321_4__ComplexRotationEven1_5,
Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__ComplexRotationEven1_5__VPTPredN3_0,
Convert__Reg1_2__CondCode2_0,
Convert__imm_95_0__Reg1_3__Reg1_4__CondCodeRestrictedS1_2__VPTPredN3_0,
Convert__imm_95_0__Reg1_3__Reg1_4__CondCodeRestrictedU1_2__VPTPredN3_0,
Convert__imm_95_0__Reg1_3__Reg1_4__CondCodeRestrictedFP1_2__VPTPredN3_0,
Convert__imm_95_0__Reg1_3__Reg1_4__CondCodeRestrictedI1_2__VPTPredN3_0,
Convert__Reg1_2__Reg1_3__Reg1_4__ComplexRotationEven1_5__VPTPredR4_0,
Convert__imm_95_0__Reg1_2__VPTPredN3_0,
Convert__Reg1_3__Reg1_4__CondCode2_0,
Convert__Reg1_3__Reg1_4__VPTPredR4_0,
Convert__Reg1_3__Tie0_4_5__FBits161_5__CondCode2_0,
Convert__Reg1_3__Reg1_4__Imm1_5__CondCode2_0,
Convert__Reg1_3__Tie0_4_5__FBits321_5__CondCode2_0,
Convert__Reg1_3__Reg1_4__MVEVcvtImm161_5__VPTPredR4_0,
Convert__Reg1_3__Reg1_4__MVEVcvtImm321_5__VPTPredR4_0,
Convert__Reg1_2__Reg1_3,
Convert__Reg1_3__Tie0_1_1__Reg1_4__CondCode2_0,
Convert__Reg1_3__Tie0_1_1__Reg1_4__VPTPredN3_0,
Convert__Reg1_1__CoprocNum1_0__Imm11b1_2,
Convert__Reg1_2__CoprocNum1_1__Imm12b1_3__VPTPredR4_0,
Convert__Reg1_1__CoprocNum1_0__Tie0_1_1__Imm11b1_2,
Convert__Reg1_2__CoprocNum1_1__Tie0_1_1__Imm12b1_3__VPTPredN3_0,
Convert__Reg1_1__CoprocNum1_0__Reg1_2__Imm6b1_3,
Convert__Reg1_2__CoprocNum1_1__Reg1_3__Imm7b1_4__VPTPredR4_0,
Convert__Reg1_1__CoprocNum1_0__Tie0_1_1__Reg1_2__Imm6b1_3,
Convert__Reg1_2__CoprocNum1_1__Tie0_1_1__Reg1_3__Imm7b1_4__VPTPredN3_0,
Convert__Reg1_1__CoprocNum1_0__Reg1_2__Reg1_3__Imm3b1_4,
Convert__Reg1_2__CoprocNum1_1__Reg1_3__Reg1_4__Imm4b1_5__VPTPredR4_0,
Convert__Reg1_1__CoprocNum1_0__Tie0_1_1__Reg1_2__Reg1_3__Imm3b1_4,
Convert__Reg1_2__CoprocNum1_1__Tie0_1_1__Reg1_3__Reg1_4__Imm4b1_5__VPTPredN3_0,
Convert__Reg1_2__Reg1_3__Tie1_1_1__VIDUP_imm1_4__VPTPredR4_0,
Convert__Reg1_1__Tie0_2_2__Reg1_2__Reg1_3,
Convert__Reg1_1__Tie0_2_2__Reg1_2__Reg1_3__VectorIndex321_4,
Convert__Reg1_2__Reg1_3__VectorIndex161_4__CondCode2_0,
Convert__Reg1_2__Reg1_3__VectorIndex321_4__CondCode2_0,
Convert__Reg1_2__Reg1_3__VectorIndex81_4__CondCode2_0,
Convert__Reg1_2__Reg1_3__Tie1_1_1__Reg1_4__VIDUP_imm1_5__VPTPredR4_0,
Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_71_4__CondCode2_0,
Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_31_4__CondCode2_0,
Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_11_4__CondCode2_0,
Convert__Reg1_2__Reg1_2__Reg1_3__Imm0_151_4__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_71_5__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_31_5__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_11_5__CondCode2_0,
Convert__Reg1_2__Reg1_3__Reg1_4__Imm0_151_5__CondCode2_0,
Convert__Reg1_1__Tie0_2_2__Reg1_2__Reg1_3__VectorIndex161_4,
Convert__Reg1_1__Reg1_2__Reg1_3,
Convert__Reg1_1__Reg1_2__Reg1_3__VectorIndex161_4,
Convert__Reg1_1__Reg1_2__Reg1_3__VectorIndex321_4,
Convert__VecListDPairAllLanes1_2__DupAlignedMemory162_3__CondCode2_0,
Convert__VecListDPair1_2__AlignedMemory64or1282_3__CondCode2_0,
Convert__VecListFourD1_2__AlignedMemory64or128or2562_3__CondCode2_0,
Convert__VecListOneDAllLanes1_2__DupAlignedMemory162_3__CondCode2_0,
Convert__VecListOneD1_2__AlignedMemory642_3__CondCode2_0,
Convert__VecListOneDHWordIndexed2_2__AlignedMemory162_3__CondCode2_0,
Convert__VecListThreeD1_2__AlignedMemory642_3__CondCode2_0,
Convert__VecListDPairAllLanes1_2__DupAlignedMemory322_3__CondCode2_0,
Convert__VecListOneDAllLanes1_2__DupAlignedMemory322_3__CondCode2_0,
Convert__VecListOneDWordIndexed2_2__AlignedMemory322_3__CondCode2_0,
Convert__VecListDPairAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0,
Convert__VecListOneDAllLanes1_2__DupAlignedMemoryNone2_3__CondCode2_0,
Convert__VecListOneDByteIndexed2_2__AlignedMemoryNone2_3__CondCode2_0,
Convert__VecListDPairAllLanes1_2__imm_95_0__DupAlignedM