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swiftshader / SwiftShader / refs/heads/master / . / third_party / llvm-16.0 / configs / common / lib / Target / AArch64 / AArch64GenAsmWriter.inc
blob: 0f4e83f6162769213c66c705096322436a2935ab [file] [log] [blame]
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Assembly Writer Source Fragment *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
/// getMnemonic - This method is automatically generated by tablegen
/// from the instruction set description.
std::pair<const char *, uint64_t> AArch64InstPrinter::getMnemonic(const MCInst *MI) {
static const char AsmStrs[] = {
/* 0 */ 's', 'h', 'a', '1', 's', 'u', '0', 9, 0,
/* 9 */ 's', 'h', 'a', '5', '1', '2', 's', 'u', '0', 9, 0,
/* 20 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '0', 9, 0,
/* 31 */ 's', 't', '6', '4', 'b', 'v', '0', 9, 0,
/* 40 */ 'l', 'd', '1', 9, 0,
/* 45 */ 's', 't', 'l', '1', 9, 0,
/* 51 */ 't', 'r', 'n', '1', 9, 0,
/* 57 */ 'l', 'd', 'a', 'p', '1', 9, 0,
/* 64 */ 'z', 'i', 'p', '1', 9, 0,
/* 70 */ 'u', 'z', 'p', '1', 9, 0,
/* 76 */ 'z', 'i', 'p', 'q', '1', 9, 0,
/* 83 */ 'u', 'z', 'p', 'q', '1', 9, 0,
/* 90 */ 'd', 'c', 'p', 's', '1', 9, 0,
/* 97 */ 's', 'm', '3', 's', 's', '1', 9, 0,
/* 105 */ 's', 't', '1', 9, 0,
/* 110 */ 's', 'h', 'a', '1', 's', 'u', '1', 9, 0,
/* 119 */ 's', 'h', 'a', '5', '1', '2', 's', 'u', '1', 9, 0,
/* 130 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '1', 9, 0,
/* 141 */ 's', 'm', '3', 'p', 'a', 'r', 't', 'w', '1', 9, 0,
/* 152 */ 'r', 'a', 'x', '1', 9, 0,
/* 158 */ 'r', 'e', 'v', '3', '2', 9, 0,
/* 165 */ 'l', 'd', '2', 9, 0,
/* 170 */ 's', 'h', 'a', '5', '1', '2', 'h', '2', 9, 0,
/* 180 */ 's', 'h', 'a', '2', '5', '6', 'h', '2', 9, 0,
/* 190 */ 'l', 'u', 't', 'i', '2', 9, 0,
/* 197 */ 's', 'a', 'b', 'a', 'l', '2', 9, 0,
/* 205 */ 'u', 'a', 'b', 'a', 'l', '2', 9, 0,
/* 213 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', '2', 9, 0,
/* 223 */ 'f', 'm', 'l', 'a', 'l', '2', 9, 0,
/* 231 */ 's', 'm', 'l', 'a', 'l', '2', 9, 0,
/* 239 */ 'u', 'm', 'l', 'a', 'l', '2', 9, 0,
/* 247 */ 's', 's', 'u', 'b', 'l', '2', 9, 0,
/* 255 */ 'u', 's', 'u', 'b', 'l', '2', 9, 0,
/* 263 */ 's', 'a', 'b', 'd', 'l', '2', 9, 0,
/* 271 */ 'u', 'a', 'b', 'd', 'l', '2', 9, 0,
/* 279 */ 's', 'a', 'd', 'd', 'l', '2', 9, 0,
/* 287 */ 'u', 'a', 'd', 'd', 'l', '2', 9, 0,
/* 295 */ 's', 's', 'h', 'l', 'l', '2', 9, 0,
/* 303 */ 'u', 's', 'h', 'l', 'l', '2', 9, 0,
/* 311 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', '2', 9, 0,
/* 321 */ 'p', 'm', 'u', 'l', 'l', '2', 9, 0,
/* 329 */ 's', 'm', 'u', 'l', 'l', '2', 9, 0,
/* 337 */ 'u', 'm', 'u', 'l', 'l', '2', 9, 0,
/* 345 */ 's', 'q', 'd', 'm', 'l', 's', 'l', '2', 9, 0,
/* 355 */ 'f', 'm', 'l', 's', 'l', '2', 9, 0,
/* 363 */ 's', 'm', 'l', 's', 'l', '2', 9, 0,
/* 371 */ 'u', 'm', 'l', 's', 'l', '2', 9, 0,
/* 379 */ 'f', 'c', 'v', 't', 'l', '2', 9, 0,
/* 387 */ 'r', 's', 'u', 'b', 'h', 'n', '2', 9, 0,
/* 396 */ 'r', 'a', 'd', 'd', 'h', 'n', '2', 9, 0,
/* 405 */ 's', 'q', 's', 'h', 'r', 'n', '2', 9, 0,
/* 414 */ 'u', 'q', 's', 'h', 'r', 'n', '2', 9, 0,
/* 423 */ 's', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0,
/* 433 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0,
/* 443 */ 't', 'r', 'n', '2', 9, 0,
/* 449 */ 'b', 'f', 'c', 'v', 't', 'n', '2', 9, 0,
/* 458 */ 's', 'q', 'x', 't', 'n', '2', 9, 0,
/* 466 */ 'u', 'q', 'x', 't', 'n', '2', 9, 0,
/* 474 */ 's', 'q', 's', 'h', 'r', 'u', 'n', '2', 9, 0,
/* 484 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', '2', 9, 0,
/* 495 */ 's', 'q', 'x', 't', 'u', 'n', '2', 9, 0,
/* 504 */ 'f', 'c', 'v', 't', 'x', 'n', '2', 9, 0,
/* 513 */ 'z', 'i', 'p', '2', 9, 0,
/* 519 */ 'u', 'z', 'p', '2', 9, 0,
/* 525 */ 'z', 'i', 'p', 'q', '2', 9, 0,
/* 532 */ 'u', 'z', 'p', 'q', '2', 9, 0,
/* 539 */ 'd', 'c', 'p', 's', '2', 9, 0,
/* 546 */ 's', 't', '2', 9, 0,
/* 551 */ 's', 's', 'u', 'b', 'w', '2', 9, 0,
/* 559 */ 'u', 's', 'u', 'b', 'w', '2', 9, 0,
/* 567 */ 's', 'a', 'd', 'd', 'w', '2', 9, 0,
/* 575 */ 'u', 'a', 'd', 'd', 'w', '2', 9, 0,
/* 583 */ 's', 'm', '3', 'p', 'a', 'r', 't', 'w', '2', 9, 0,
/* 594 */ 'l', 'd', '3', 9, 0,
/* 599 */ 'e', 'o', 'r', '3', 9, 0,
/* 605 */ 'd', 'c', 'p', 's', '3', 9, 0,
/* 612 */ 's', 't', '3', 9, 0,
/* 617 */ 'r', 'e', 'v', '6', '4', 9, 0,
/* 624 */ 'l', 'd', '4', 9, 0,
/* 629 */ 'l', 'u', 't', 'i', '4', 9, 0,
/* 636 */ 's', 't', '4', 9, 0,
/* 641 */ 's', 'e', 't', 'f', '1', '6', 9, 0,
/* 649 */ 'r', 'e', 'v', '1', '6', 9, 0,
/* 656 */ 's', 'e', 't', 'f', '8', 9, 0,
/* 663 */ 's', 'm', '3', 't', 't', '1', 'a', 9, 0,
/* 672 */ 's', 'm', '3', 't', 't', '2', 'a', 9, 0,
/* 681 */ 'b', 'r', 'a', 'a', 9, 0,
/* 687 */ 'l', 'd', 'r', 'a', 'a', 9, 0,
/* 694 */ 'b', 'l', 'r', 'a', 'a', 9, 0,
/* 701 */ 's', 'a', 'b', 'a', 9, 0,
/* 707 */ 'u', 'a', 'b', 'a', 9, 0,
/* 713 */ 'p', 'a', 'c', 'd', 'a', 9, 0,
/* 720 */ 'l', 'd', 'a', 'd', 'd', 'a', 9, 0,
/* 728 */ 'f', 'a', 'd', 'd', 'a', 9, 0,
/* 735 */ 'a', 'u', 't', 'd', 'a', 9, 0,
/* 742 */ 'p', 'a', 'c', 'g', 'a', 9, 0,
/* 749 */ 'a', 'd', 'd', 'h', 'a', 9, 0,
/* 756 */ 'p', 'a', 'c', 'i', 'a', 9, 0,
/* 763 */ 'a', 'u', 't', 'i', 'a', 9, 0,
/* 770 */ 'b', 'r', 'k', 'a', 9, 0,
/* 776 */ 'f', 'c', 'm', 'l', 'a', 9, 0,
/* 783 */ 'b', 'f', 'm', 'l', 'a', 9, 0,
/* 790 */ 'b', 'f', 'm', 'm', 'l', 'a', 9, 0,
/* 798 */ 'u', 's', 'm', 'm', 'l', 'a', 9, 0,
/* 806 */ 'u', 'm', 'm', 'l', 'a', 9, 0,
/* 813 */ 'f', 'n', 'm', 'l', 'a', 9, 0,
/* 820 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 9, 0,
/* 829 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 9, 0,
/* 838 */ 'b', 'r', 'k', 'p', 'a', 9, 0,
/* 845 */ 'b', 'm', 'o', 'p', 'a', 9, 0,
/* 852 */ 'b', 'f', 'm', 'o', 'p', 'a', 9, 0,
/* 860 */ 'u', 's', 'm', 'o', 'p', 'a', 9, 0,
/* 868 */ 's', 'u', 'm', 'o', 'p', 'a', 9, 0,
/* 876 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 'p', 'a', 9, 0,
/* 887 */ 'r', 'c', 'w', 's', 'w', 'p', 'p', 'a', 9, 0,
/* 897 */ 'l', 'd', 'c', 'l', 'r', 'p', 'a', 9, 0,
/* 906 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 'p', 'a', 9, 0,
/* 917 */ 'r', 'c', 'w', 'c', 'l', 'r', 'p', 'a', 9, 0,
/* 927 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 'p', 'a', 9, 0,
/* 938 */ 'r', 'c', 'w', 'c', 'a', 's', 'p', 'a', 9, 0,
/* 948 */ 'l', 'd', 's', 'e', 't', 'p', 'a', 9, 0,
/* 957 */ 'r', 'c', 'w', 's', 's', 'e', 't', 'p', 'a', 9, 0,
/* 968 */ 'r', 'c', 'w', 's', 'e', 't', 'p', 'a', 9, 0,
/* 978 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 'a', 9, 0,
/* 988 */ 'r', 'c', 'w', 's', 'w', 'p', 'a', 9, 0,
/* 997 */ 'f', 'e', 'x', 'p', 'a', 9, 0,
/* 1004 */ 'l', 'd', 'c', 'l', 'r', 'a', 9, 0,
/* 1012 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 'a', 9, 0,
/* 1022 */ 'r', 'c', 'w', 'c', 'l', 'r', 'a', 9, 0,
/* 1031 */ 'l', 'd', 'e', 'o', 'r', 'a', 9, 0,
/* 1039 */ 's', 'r', 's', 'r', 'a', 9, 0,
/* 1046 */ 'u', 'r', 's', 'r', 'a', 9, 0,
/* 1053 */ 's', 's', 'r', 'a', 9, 0,
/* 1059 */ 'u', 's', 'r', 'a', 9, 0,
/* 1065 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 'a', 9, 0,
/* 1075 */ 'r', 'c', 'w', 'c', 'a', 's', 'a', 9, 0,
/* 1084 */ 'l', 'd', 's', 'e', 't', 'a', 9, 0,
/* 1092 */ 'r', 'c', 'w', 's', 's', 'e', 't', 'a', 9, 0,
/* 1102 */ 'r', 'c', 'w', 's', 'e', 't', 'a', 9, 0,
/* 1111 */ 'f', 'r', 'i', 'n', 't', 'a', 9, 0,
/* 1119 */ 'c', 'l', 'a', 's', 't', 'a', 9, 0,
/* 1127 */ 'a', 'd', 'd', 'v', 'a', 9, 0,
/* 1134 */ 'm', 'o', 'v', 'a', 9, 0,
/* 1140 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 9, 0,
/* 1149 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 9, 0,
/* 1158 */ 'p', 'a', 'c', 'd', 'z', 'a', 9, 0,
/* 1166 */ 'a', 'u', 't', 'd', 'z', 'a', 9, 0,
/* 1174 */ 'p', 'a', 'c', 'i', 'z', 'a', 9, 0,
/* 1182 */ 'a', 'u', 't', 'i', 'z', 'a', 9, 0,
/* 1190 */ 'l', 'd', '1', 'b', 9, 0,
/* 1196 */ 'l', 'd', 'f', 'f', '1', 'b', 9, 0,
/* 1204 */ 'l', 'd', 'n', 'f', '1', 'b', 9, 0,
/* 1212 */ 'l', 'd', 'n', 't', '1', 'b', 9, 0,
/* 1220 */ 's', 't', 'n', 't', '1', 'b', 9, 0,
/* 1228 */ 's', 't', '1', 'b', 9, 0,
/* 1234 */ 's', 'm', '3', 't', 't', '1', 'b', 9, 0,
/* 1243 */ 'c', 'r', 'c', '3', '2', 'b', 9, 0,
/* 1251 */ 'l', 'd', '2', 'b', 9, 0,
/* 1257 */ 's', 't', '2', 'b', 9, 0,
/* 1263 */ 's', 'm', '3', 't', 't', '2', 'b', 9, 0,
/* 1272 */ 'l', 'd', '3', 'b', 9, 0,
/* 1278 */ 's', 't', '3', 'b', 9, 0,
/* 1284 */ 'l', 'd', '6', '4', 'b', 9, 0,
/* 1291 */ 's', 't', '6', '4', 'b', 9, 0,
/* 1298 */ 'l', 'd', '4', 'b', 9, 0,
/* 1304 */ 's', 't', '4', 'b', 9, 0,
/* 1310 */ 'l', 'd', 'a', 'd', 'd', 'a', 'b', 9, 0,
/* 1319 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'b', 9, 0,
/* 1329 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'b', 9, 0,
/* 1339 */ 's', 'w', 'p', 'a', 'b', 9, 0,
/* 1346 */ 'b', 'r', 'a', 'b', 9, 0,
/* 1352 */ 'l', 'd', 'r', 'a', 'b', 9, 0,
/* 1359 */ 'b', 'l', 'r', 'a', 'b', 9, 0,
/* 1366 */ 'l', 'd', 'c', 'l', 'r', 'a', 'b', 9, 0,
/* 1375 */ 'l', 'd', 'e', 'o', 'r', 'a', 'b', 9, 0,
/* 1384 */ 'c', 'a', 's', 'a', 'b', 9, 0,
/* 1391 */ 'l', 'd', 's', 'e', 't', 'a', 'b', 9, 0,
/* 1400 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'b', 9, 0,
/* 1410 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'b', 9, 0,
/* 1420 */ 'c', 'r', 'c', '3', '2', 'c', 'b', 9, 0,
/* 1429 */ 's', 'q', 'd', 'e', 'c', 'b', 9, 0,
/* 1437 */ 'u', 'q', 'd', 'e', 'c', 'b', 9, 0,
/* 1445 */ 's', 'q', 'i', 'n', 'c', 'b', 9, 0,
/* 1453 */ 'u', 'q', 'i', 'n', 'c', 'b', 9, 0,
/* 1461 */ 'p', 'a', 'c', 'd', 'b', 9, 0,
/* 1468 */ 'l', 'd', 'a', 'd', 'd', 'b', 9, 0,
/* 1476 */ 'a', 'u', 't', 'd', 'b', 9, 0,
/* 1483 */ 'p', 'r', 'f', 'b', 9, 0,
/* 1489 */ 'f', 'l', 'o', 'g', 'b', 9, 0,
/* 1496 */ 'p', 'a', 'c', 'i', 'b', 9, 0,
/* 1503 */ 'a', 'u', 't', 'i', 'b', 9, 0,
/* 1510 */ 'b', 'r', 'k', 'b', 9, 0,
/* 1516 */ 's', 'a', 'b', 'a', 'l', 'b', 9, 0,
/* 1524 */ 'u', 'a', 'b', 'a', 'l', 'b', 9, 0,
/* 1532 */ 'l', 'd', 'a', 'd', 'd', 'a', 'l', 'b', 9, 0,
/* 1542 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 'b', 9, 0,
/* 1552 */ 'b', 'f', 'm', 'l', 'a', 'l', 'b', 9, 0,
/* 1561 */ 's', 'm', 'l', 'a', 'l', 'b', 9, 0,
/* 1569 */ 'u', 'm', 'l', 'a', 'l', 'b', 9, 0,
/* 1577 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'l', 'b', 9, 0,
/* 1588 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'l', 'b', 9, 0,
/* 1599 */ 's', 'w', 'p', 'a', 'l', 'b', 9, 0,
/* 1607 */ 'l', 'd', 'c', 'l', 'r', 'a', 'l', 'b', 9, 0,
/* 1617 */ 'l', 'd', 'e', 'o', 'r', 'a', 'l', 'b', 9, 0,
/* 1627 */ 'c', 'a', 's', 'a', 'l', 'b', 9, 0,
/* 1635 */ 'l', 'd', 's', 'e', 't', 'a', 'l', 'b', 9, 0,
/* 1645 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'l', 'b', 9, 0,
/* 1656 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'l', 'b', 9, 0,
/* 1667 */ 's', 's', 'u', 'b', 'l', 'b', 9, 0,
/* 1675 */ 'u', 's', 'u', 'b', 'l', 'b', 9, 0,
/* 1683 */ 's', 'b', 'c', 'l', 'b', 9, 0,
/* 1690 */ 'a', 'd', 'c', 'l', 'b', 9, 0,
/* 1697 */ 's', 'a', 'b', 'd', 'l', 'b', 9, 0,
/* 1705 */ 'u', 'a', 'b', 'd', 'l', 'b', 9, 0,
/* 1713 */ 'l', 'd', 'a', 'd', 'd', 'l', 'b', 9, 0,
/* 1722 */ 's', 'a', 'd', 'd', 'l', 'b', 9, 0,
/* 1730 */ 'u', 'a', 'd', 'd', 'l', 'b', 9, 0,
/* 1738 */ 's', 's', 'h', 'l', 'l', 'b', 9, 0,
/* 1746 */ 'u', 's', 'h', 'l', 'l', 'b', 9, 0,
/* 1754 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 'b', 9, 0,
/* 1764 */ 'p', 'm', 'u', 'l', 'l', 'b', 9, 0,
/* 1772 */ 's', 'm', 'u', 'l', 'l', 'b', 9, 0,
/* 1780 */ 'u', 'm', 'u', 'l', 'l', 'b', 9, 0,
/* 1788 */ 'l', 'd', 's', 'm', 'i', 'n', 'l', 'b', 9, 0,
/* 1798 */ 'l', 'd', 'u', 'm', 'i', 'n', 'l', 'b', 9, 0,
/* 1808 */ 's', 'w', 'p', 'l', 'b', 9, 0,
/* 1815 */ 'l', 'd', 'c', 'l', 'r', 'l', 'b', 9, 0,
/* 1824 */ 'l', 'd', 'e', 'o', 'r', 'l', 'b', 9, 0,
/* 1833 */ 'c', 'a', 's', 'l', 'b', 9, 0,
/* 1840 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 'b', 9, 0,
/* 1850 */ 'b', 'f', 'm', 'l', 's', 'l', 'b', 9, 0,
/* 1859 */ 's', 'm', 'l', 's', 'l', 'b', 9, 0,
/* 1867 */ 'u', 'm', 'l', 's', 'l', 'b', 9, 0,
/* 1875 */ 'l', 'd', 's', 'e', 't', 'l', 'b', 9, 0,
/* 1884 */ 'l', 'd', 's', 'm', 'a', 'x', 'l', 'b', 9, 0,
/* 1894 */ 'l', 'd', 'u', 'm', 'a', 'x', 'l', 'b', 9, 0,
/* 1904 */ 'd', 'm', 'b', 9, 0,
/* 1909 */ 'r', 's', 'u', 'b', 'h', 'n', 'b', 9, 0,
/* 1918 */ 'r', 'a', 'd', 'd', 'h', 'n', 'b', 9, 0,
/* 1927 */ 'l', 'd', 's', 'm', 'i', 'n', 'b', 9, 0,
/* 1936 */ 'l', 'd', 'u', 'm', 'i', 'n', 'b', 9, 0,
/* 1945 */ 's', 'q', 's', 'h', 'r', 'n', 'b', 9, 0,
/* 1954 */ 'u', 'q', 's', 'h', 'r', 'n', 'b', 9, 0,
/* 1963 */ 's', 'q', 'r', 's', 'h', 'r', 'n', 'b', 9, 0,
/* 1973 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', 'b', 9, 0,
/* 1983 */ 's', 'q', 'x', 't', 'n', 'b', 9, 0,
/* 1991 */ 'u', 'q', 'x', 't', 'n', 'b', 9, 0,
/* 1999 */ 's', 'q', 's', 'h', 'r', 'u', 'n', 'b', 9, 0,
/* 2009 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', 'b', 9, 0,
/* 2020 */ 's', 'q', 'x', 't', 'u', 'n', 'b', 9, 0,
/* 2029 */ 'l', 'd', '1', 'r', 'o', 'b', 9, 0,
/* 2037 */ 'b', 'r', 'k', 'p', 'b', 9, 0,
/* 2044 */ 's', 'w', 'p', 'b', 9, 0,
/* 2050 */ 'l', 'd', '1', 'r', 'q', 'b', 9, 0,
/* 2058 */ 'l', 'd', '1', 'r', 'b', 9, 0,
/* 2065 */ 'l', 'd', 'a', 'r', 'b', 9, 0,
/* 2072 */ 'l', 'd', 'l', 'a', 'r', 'b', 9, 0,
/* 2080 */ 'l', 'd', 'r', 'b', 9, 0,
/* 2086 */ 'l', 'd', 'c', 'l', 'r', 'b', 9, 0,
/* 2094 */ 's', 't', 'l', 'l', 'r', 'b', 9, 0,
/* 2102 */ 's', 't', 'l', 'r', 'b', 9, 0,
/* 2109 */ 'l', 'd', 'e', 'o', 'r', 'b', 9, 0,
/* 2117 */ 'l', 'd', 'a', 'p', 'r', 'b', 9, 0,
/* 2125 */ 'l', 'd', 't', 'r', 'b', 9, 0,
/* 2132 */ 's', 't', 'r', 'b', 9, 0,
/* 2138 */ 's', 't', 't', 'r', 'b', 9, 0,
/* 2145 */ 'l', 'd', 'u', 'r', 'b', 9, 0,
/* 2152 */ 's', 't', 'l', 'u', 'r', 'b', 9, 0,
/* 2160 */ 'l', 'd', 'a', 'p', 'u', 'r', 'b', 9, 0,
/* 2169 */ 's', 't', 'u', 'r', 'b', 9, 0,
/* 2176 */ 'l', 'd', 'a', 'x', 'r', 'b', 9, 0,
/* 2184 */ 'l', 'd', 'x', 'r', 'b', 9, 0,
/* 2191 */ 's', 't', 'l', 'x', 'r', 'b', 9, 0,
/* 2199 */ 's', 't', 'x', 'r', 'b', 9, 0,
/* 2206 */ 'l', 'd', '1', 's', 'b', 9, 0,
/* 2213 */ 'l', 'd', 'f', 'f', '1', 's', 'b', 9, 0,
/* 2222 */ 'l', 'd', 'n', 'f', '1', 's', 'b', 9, 0,
/* 2231 */ 'l', 'd', 'n', 't', '1', 's', 'b', 9, 0,
/* 2240 */ 'c', 'a', 's', 'b', 9, 0,
/* 2246 */ 'd', 's', 'b', 9, 0,
/* 2251 */ 'i', 's', 'b', 9, 0,
/* 2256 */ 'f', 'm', 's', 'b', 9, 0,
/* 2262 */ 'f', 'n', 'm', 's', 'b', 9, 0,
/* 2269 */ 'l', 'd', '1', 'r', 's', 'b', 9, 0,
/* 2277 */ 'l', 'd', 'r', 's', 'b', 9, 0,
/* 2284 */ 'l', 'd', 't', 'r', 's', 'b', 9, 0,
/* 2292 */ 'l', 'd', 'u', 'r', 's', 'b', 9, 0,
/* 2300 */ 'l', 'd', 'a', 'p', 'u', 'r', 's', 'b', 9, 0,
/* 2310 */ 't', 's', 'b', 9, 0,
/* 2315 */ 'l', 'd', 's', 'e', 't', 'b', 9, 0,
/* 2323 */ 's', 's', 'u', 'b', 'l', 't', 'b', 9, 0,
/* 2332 */ 'c', 'n', 't', 'b', 9, 0,
/* 2338 */ 'e', 'o', 'r', 't', 'b', 9, 0,
/* 2345 */ 'c', 'l', 'a', 's', 't', 'b', 9, 0,
/* 2353 */ 's', 'x', 't', 'b', 9, 0,
/* 2359 */ 'u', 'x', 't', 'b', 9, 0,
/* 2365 */ 'b', 'f', 's', 'u', 'b', 9, 0,
/* 2372 */ 's', 'h', 's', 'u', 'b', 9, 0,
/* 2379 */ 'u', 'h', 's', 'u', 'b', 9, 0,
/* 2386 */ 'f', 'm', 's', 'u', 'b', 9, 0,
/* 2393 */ 'f', 'n', 'm', 's', 'u', 'b', 9, 0,
/* 2401 */ 's', 'q', 's', 'u', 'b', 9, 0,
/* 2408 */ 'u', 'q', 's', 'u', 'b', 9, 0,
/* 2415 */ 'r', 'e', 'v', 'b', 9, 0,
/* 2421 */ 's', 's', 'u', 'b', 'w', 'b', 9, 0,
/* 2429 */ 'u', 's', 'u', 'b', 'w', 'b', 9, 0,
/* 2437 */ 's', 'a', 'd', 'd', 'w', 'b', 9, 0,
/* 2445 */ 'u', 'a', 'd', 'd', 'w', 'b', 9, 0,
/* 2453 */ 'l', 'd', 's', 'm', 'a', 'x', 'b', 9, 0,
/* 2462 */ 'l', 'd', 'u', 'm', 'a', 'x', 'b', 9, 0,
/* 2471 */ 'p', 'a', 'c', 'd', 'z', 'b', 9, 0,
/* 2479 */ 'a', 'u', 't', 'd', 'z', 'b', 9, 0,
/* 2487 */ 'p', 'a', 'c', 'i', 'z', 'b', 9, 0,
/* 2495 */ 'a', 'u', 't', 'i', 'z', 'b', 9, 0,
/* 2503 */ 's', 'h', 'a', '1', 'c', 9, 0,
/* 2510 */ 's', 'b', 'c', 9, 0,
/* 2515 */ 'a', 'd', 'c', 9, 0,
/* 2520 */ 'b', 'i', 'c', 9, 0,
/* 2525 */ 'a', 'e', 's', 'i', 'm', 'c', 9, 0,
/* 2533 */ 'a', 'e', 's', 'm', 'c', 9, 0,
/* 2540 */ 'c', 's', 'i', 'n', 'c', 9, 0,
/* 2547 */ 'h', 'v', 'c', 9, 0,
/* 2552 */ 's', 'v', 'c', 9, 0,
/* 2557 */ 'l', 'd', '1', 'd', 9, 0,
/* 2563 */ 'l', 'd', 'f', 'f', '1', 'd', 9, 0,
/* 2571 */ 'l', 'd', 'n', 'f', '1', 'd', 9, 0,
/* 2579 */ 'l', 'd', 'n', 't', '1', 'd', 9, 0,
/* 2587 */ 's', 't', 'n', 't', '1', 'd', 9, 0,
/* 2595 */ 's', 't', '1', 'd', 9, 0,
/* 2601 */ 'l', 'd', '2', 'd', 9, 0,
/* 2607 */ 's', 't', '2', 'd', 9, 0,
/* 2613 */ 'l', 'd', '3', 'd', 9, 0,
/* 2619 */ 's', 't', '3', 'd', 9, 0,
/* 2625 */ 'l', 'd', '4', 'd', 9, 0,
/* 2631 */ 's', 't', '4', 'd', 9, 0,
/* 2637 */ 'f', 'm', 'a', 'd', 9, 0,
/* 2643 */ 'f', 'n', 'm', 'a', 'd', 9, 0,
/* 2650 */ 'f', 't', 'm', 'a', 'd', 9, 0,
/* 2657 */ 'f', 'a', 'b', 'd', 9, 0,
/* 2663 */ 's', 'a', 'b', 'd', 9, 0,
/* 2669 */ 'u', 'a', 'b', 'd', 9, 0,
/* 2675 */ 'x', 'p', 'a', 'c', 'd', 9, 0,
/* 2682 */ 's', 'q', 'd', 'e', 'c', 'd', 9, 0,
/* 2690 */ 'u', 'q', 'd', 'e', 'c', 'd', 9, 0,
/* 2698 */ 's', 'q', 'i', 'n', 'c', 'd', 9, 0,
/* 2706 */ 'u', 'q', 'i', 'n', 'c', 'd', 9, 0,
/* 2714 */ 'f', 'c', 'a', 'd', 'd', 9, 0,
/* 2721 */ 's', 'q', 'c', 'a', 'd', 'd', 9, 0,
/* 2729 */ 'l', 'd', 'a', 'd', 'd', 9, 0,
/* 2736 */ 'b', 'f', 'a', 'd', 'd', 9, 0,
/* 2743 */ 's', 'r', 'h', 'a', 'd', 'd', 9, 0,
/* 2751 */ 'u', 'r', 'h', 'a', 'd', 'd', 9, 0,
/* 2759 */ 's', 'h', 'a', 'd', 'd', 9, 0,
/* 2766 */ 'u', 'h', 'a', 'd', 'd', 9, 0,
/* 2773 */ 'f', 'm', 'a', 'd', 'd', 9, 0,
/* 2780 */ 'f', 'n', 'm', 'a', 'd', 'd', 9, 0,
/* 2788 */ 'u', 's', 'q', 'a', 'd', 'd', 9, 0,
/* 2796 */ 's', 'u', 'q', 'a', 'd', 'd', 9, 0,
/* 2804 */ 'p', 'r', 'f', 'd', 9, 0,
/* 2810 */ 'n', 'a', 'n', 'd', 9, 0,
/* 2816 */ 'l', 'd', '1', 'r', 'o', 'd', 9, 0,
/* 2824 */ 'l', 'd', '1', 'r', 'q', 'd', 9, 0,
/* 2832 */ 'l', 'd', '1', 'r', 'd', 9, 0,
/* 2839 */ 'a', 's', 'r', 'd', 9, 0,
/* 2845 */ 'a', 'e', 's', 'd', 9, 0,
/* 2851 */ 'c', 'n', 't', 'd', 9, 0,
/* 2857 */ 'r', 'e', 'v', 'd', 9, 0,
/* 2863 */ 's', 'm', '4', 'e', 9, 0,
/* 2869 */ 's', 'p', 'l', 'i', 'c', 'e', 9, 0,
/* 2877 */ 'f', 'a', 'c', 'g', 'e', 9, 0,
/* 2884 */ 'w', 'h', 'i', 'l', 'e', 'g', 'e', 9, 0,
/* 2893 */ 'f', 'c', 'm', 'g', 'e', 9, 0,
/* 2900 */ 'c', 'm', 'p', 'g', 'e', 9, 0,
/* 2907 */ 'f', 's', 'c', 'a', 'l', 'e', 9, 0,
/* 2915 */ 'w', 'h', 'i', 'l', 'e', 'l', 'e', 9, 0,
/* 2924 */ 'f', 'c', 'm', 'l', 'e', 9, 0,
/* 2931 */ 'c', 'm', 'p', 'l', 'e', 9, 0,
/* 2938 */ 'f', 'c', 'm', 'n', 'e', 9, 0,
/* 2945 */ 'c', 't', 'e', 'r', 'm', 'n', 'e', 9, 0,
/* 2954 */ 'c', 'm', 'p', 'n', 'e', 9, 0,
/* 2961 */ 'f', 'r', 'e', 'c', 'p', 'e', 9, 0,
/* 2969 */ 'u', 'r', 'e', 'c', 'p', 'e', 9, 0,
/* 2977 */ 'f', 'c', 'c', 'm', 'p', 'e', 9, 0,
/* 2985 */ 'f', 'c', 'm', 'p', 'e', 9, 0,
/* 2992 */ 'a', 'e', 's', 'e', 9, 0,
/* 2998 */ 'p', 'f', 'a', 'l', 's', 'e', 9, 0,
/* 3006 */ 'f', 'r', 's', 'q', 'r', 't', 'e', 9, 0,
/* 3015 */ 'u', 'r', 's', 'q', 'r', 't', 'e', 9, 0,
/* 3024 */ 'p', 't', 'r', 'u', 'e', 9, 0,
/* 3031 */ 'u', 'd', 'f', 9, 0,
/* 3036 */ 'b', 'i', 'f', 9, 0,
/* 3041 */ 'r', 'm', 'i', 'f', 9, 0,
/* 3047 */ 's', 'c', 'v', 't', 'f', 9, 0,
/* 3054 */ 'u', 'c', 'v', 't', 'f', 9, 0,
/* 3061 */ 's', 't', '2', 'g', 9, 0,
/* 3067 */ 's', 't', 'z', '2', 'g', 9, 0,
/* 3074 */ 's', 'u', 'b', 'g', 9, 0,
/* 3080 */ 'a', 'd', 'd', 'g', 9, 0,
/* 3086 */ 'l', 'd', 'g', 9, 0,
/* 3091 */ 'f', 'n', 'e', 'g', 9, 0,
/* 3097 */ 's', 'q', 'n', 'e', 'g', 9, 0,
/* 3104 */ 'c', 's', 'n', 'e', 'g', 9, 0,
/* 3111 */ 'h', 'i', 's', 't', 's', 'e', 'g', 9, 0,
/* 3120 */ 'i', 'r', 'g', 9, 0,
/* 3125 */ 's', 't', 'g', 9, 0,
/* 3130 */ 's', 't', 'z', 'g', 9, 0,
/* 3136 */ 's', 'h', 'a', '1', 'h', 9, 0,
/* 3143 */ 'l', 'd', '1', 'h', 9, 0,
/* 3149 */ 'l', 'd', 'f', 'f', '1', 'h', 9, 0,
/* 3157 */ 'l', 'd', 'n', 'f', '1', 'h', 9, 0,
/* 3165 */ 'l', 'd', 'n', 't', '1', 'h', 9, 0,
/* 3173 */ 's', 't', 'n', 't', '1', 'h', 9, 0,
/* 3181 */ 's', 't', '1', 'h', 9, 0,
/* 3187 */ 's', 'h', 'a', '5', '1', '2', 'h', 9, 0,
/* 3196 */ 'c', 'r', 'c', '3', '2', 'h', 9, 0,
/* 3204 */ 'l', 'd', '2', 'h', 9, 0,
/* 3210 */ 's', 't', '2', 'h', 9, 0,
/* 3216 */ 'l', 'd', '3', 'h', 9, 0,
/* 3222 */ 's', 't', '3', 'h', 9, 0,
/* 3228 */ 'l', 'd', '4', 'h', 9, 0,
/* 3234 */ 's', 't', '4', 'h', 9, 0,
/* 3240 */ 's', 'h', 'a', '2', '5', '6', 'h', 9, 0,
/* 3249 */ 'l', 'd', 'a', 'd', 'd', 'a', 'h', 9, 0,
/* 3258 */ 's', 'q', 'r', 'd', 'c', 'm', 'l', 'a', 'h', 9, 0,
/* 3269 */ 's', 'q', 'r', 'd', 'm', 'l', 'a', 'h', 9, 0,
/* 3279 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'h', 9, 0,
/* 3289 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'h', 9, 0,
/* 3299 */ 's', 'w', 'p', 'a', 'h', 9, 0,
/* 3306 */ 'l', 'd', 'c', 'l', 'r', 'a', 'h', 9, 0,
/* 3315 */ 'l', 'd', 'e', 'o', 'r', 'a', 'h', 9, 0,
/* 3324 */ 'c', 'a', 's', 'a', 'h', 9, 0,
/* 3331 */ 'l', 'd', 's', 'e', 't', 'a', 'h', 9, 0,
/* 3340 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'h', 9, 0,
/* 3350 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'h', 9, 0,
/* 3360 */ 'c', 'r', 'c', '3', '2', 'c', 'h', 9, 0,
/* 3369 */ 's', 'q', 'd', 'e', 'c', 'h', 9, 0,
/* 3377 */ 'u', 'q', 'd', 'e', 'c', 'h', 9, 0,
/* 3385 */ 's', 'q', 'i', 'n', 'c', 'h', 9, 0,
/* 3393 */ 'u', 'q', 'i', 'n', 'c', 'h', 9, 0,
/* 3401 */ 'n', 'm', 'a', 't', 'c', 'h', 9, 0,
/* 3409 */ 'l', 'd', 'a', 'd', 'd', 'h', 9, 0,
/* 3417 */ 'p', 'r', 'f', 'h', 9, 0,
/* 3423 */ 'l', 'd', 'a', 'd', 'd', 'a', 'l', 'h', 9, 0,
/* 3433 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'l', 'h', 9, 0,
/* 3444 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'l', 'h', 9, 0,
/* 3455 */ 's', 'w', 'p', 'a', 'l', 'h', 9, 0,
/* 3463 */ 'l', 'd', 'c', 'l', 'r', 'a', 'l', 'h', 9, 0,
/* 3473 */ 'l', 'd', 'e', 'o', 'r', 'a', 'l', 'h', 9, 0,
/* 3483 */ 'c', 'a', 's', 'a', 'l', 'h', 9, 0,
/* 3491 */ 'l', 'd', 's', 'e', 't', 'a', 'l', 'h', 9, 0,
/* 3501 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'l', 'h', 9, 0,
/* 3512 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'l', 'h', 9, 0,
/* 3523 */ 'l', 'd', 'a', 'd', 'd', 'l', 'h', 9, 0,
/* 3532 */ 'l', 'd', 's', 'm', 'i', 'n', 'l', 'h', 9, 0,
/* 3542 */ 'l', 'd', 'u', 'm', 'i', 'n', 'l', 'h', 9, 0,
/* 3552 */ 's', 'w', 'p', 'l', 'h', 9, 0,
/* 3559 */ 'l', 'd', 'c', 'l', 'r', 'l', 'h', 9, 0,
/* 3568 */ 'l', 'd', 'e', 'o', 'r', 'l', 'h', 9, 0,
/* 3577 */ 'c', 'a', 's', 'l', 'h', 9, 0,
/* 3584 */ 'l', 'd', 's', 'e', 't', 'l', 'h', 9, 0,
/* 3593 */ 's', 'q', 'd', 'm', 'u', 'l', 'h', 9, 0,
/* 3602 */ 's', 'q', 'r', 'd', 'm', 'u', 'l', 'h', 9, 0,
/* 3612 */ 's', 'm', 'u', 'l', 'h', 9, 0,
/* 3619 */ 'u', 'm', 'u', 'l', 'h', 9, 0,
/* 3626 */ 'l', 'd', 's', 'm', 'a', 'x', 'l', 'h', 9, 0,
/* 3636 */ 'l', 'd', 'u', 'm', 'a', 'x', 'l', 'h', 9, 0,
/* 3646 */ 'l', 'd', 's', 'm', 'i', 'n', 'h', 9, 0,
/* 3655 */ 'l', 'd', 'u', 'm', 'i', 'n', 'h', 9, 0,
/* 3664 */ 'l', 'd', '1', 'r', 'o', 'h', 9, 0,
/* 3672 */ 's', 'w', 'p', 'h', 9, 0,
/* 3678 */ 'l', 'd', '1', 'r', 'q', 'h', 9, 0,
/* 3686 */ 'l', 'd', '1', 'r', 'h', 9, 0,
/* 3693 */ 'l', 'd', 'a', 'r', 'h', 9, 0,
/* 3700 */ 'l', 'd', 'l', 'a', 'r', 'h', 9, 0,
/* 3708 */ 'l', 'd', 'r', 'h', 9, 0,
/* 3714 */ 'l', 'd', 'c', 'l', 'r', 'h', 9, 0,
/* 3722 */ 's', 't', 'l', 'l', 'r', 'h', 9, 0,
/* 3730 */ 's', 't', 'l', 'r', 'h', 9, 0,
/* 3737 */ 'l', 'd', 'e', 'o', 'r', 'h', 9, 0,
/* 3745 */ 'l', 'd', 'a', 'p', 'r', 'h', 9, 0,
/* 3753 */ 'l', 'd', 't', 'r', 'h', 9, 0,
/* 3760 */ 's', 't', 'r', 'h', 9, 0,
/* 3766 */ 's', 't', 't', 'r', 'h', 9, 0,
/* 3773 */ 'l', 'd', 'u', 'r', 'h', 9, 0,
/* 3780 */ 's', 't', 'l', 'u', 'r', 'h', 9, 0,
/* 3788 */ 'l', 'd', 'a', 'p', 'u', 'r', 'h', 9, 0,
/* 3797 */ 's', 't', 'u', 'r', 'h', 9, 0,
/* 3804 */ 'l', 'd', 'a', 'x', 'r', 'h', 9, 0,
/* 3812 */ 'l', 'd', 'x', 'r', 'h', 9, 0,
/* 3819 */ 's', 't', 'l', 'x', 'r', 'h', 9, 0,
/* 3827 */ 's', 't', 'x', 'r', 'h', 9, 0,
/* 3834 */ 'l', 'd', '1', 's', 'h', 9, 0,
/* 3841 */ 'l', 'd', 'f', 'f', '1', 's', 'h', 9, 0,
/* 3850 */ 'l', 'd', 'n', 'f', '1', 's', 'h', 9, 0,
/* 3859 */ 'l', 'd', 'n', 't', '1', 's', 'h', 9, 0,
/* 3868 */ 'c', 'a', 's', 'h', 9, 0,
/* 3874 */ 's', 'q', 'r', 'd', 'm', 'l', 's', 'h', 9, 0,
/* 3884 */ 'l', 'd', '1', 'r', 's', 'h', 9, 0,
/* 3892 */ 'l', 'd', 'r', 's', 'h', 9, 0,
/* 3899 */ 'l', 'd', 't', 'r', 's', 'h', 9, 0,
/* 3907 */ 'l', 'd', 'u', 'r', 's', 'h', 9, 0,
/* 3915 */ 'l', 'd', 'a', 'p', 'u', 'r', 's', 'h', 9, 0,
/* 3925 */ 'l', 'd', 's', 'e', 't', 'h', 9, 0,
/* 3933 */ 'c', 'n', 't', 'h', 9, 0,
/* 3939 */ 's', 'x', 't', 'h', 9, 0,
/* 3945 */ 'u', 'x', 't', 'h', 9, 0,
/* 3951 */ 'r', 'e', 'v', 'h', 9, 0,
/* 3957 */ 'l', 'd', 's', 'm', 'a', 'x', 'h', 9, 0,
/* 3966 */ 'l', 'd', 'u', 'm', 'a', 'x', 'h', 9, 0,
/* 3975 */ 'x', 'p', 'a', 'c', 'i', 9, 0,
/* 3982 */ 'w', 'h', 'i', 'l', 'e', 'h', 'i', 9, 0,
/* 3991 */ 'p', 'u', 'n', 'p', 'k', 'h', 'i', 9, 0,
/* 4000 */ 's', 'u', 'n', 'p', 'k', 'h', 'i', 9, 0,
/* 4009 */ 'u', 'u', 'n', 'p', 'k', 'h', 'i', 9, 0,
/* 4018 */ 'c', 'm', 'h', 'i', 9, 0,
/* 4024 */ 'c', 'm', 'p', 'h', 'i', 9, 0,
/* 4031 */ 's', 'l', 'i', 9, 0,
/* 4036 */ 'g', 'm', 'i', 9, 0,
/* 4041 */ 'm', 'v', 'n', 'i', 9, 0,
/* 4047 */ 's', 'r', 'i', 9, 0,
/* 4052 */ 'f', 'r', 'i', 'n', 't', 'i', 9, 0,
/* 4060 */ 'm', 'o', 'v', 'i', 9, 0,
/* 4066 */ 's', 'u', 'n', 'p', 'k', 9, 0,
/* 4073 */ 'u', 'u', 'n', 'p', 'k', 9, 0,
/* 4080 */ 'b', 'r', 'k', 9, 0,
/* 4085 */ 'm', 'o', 'v', 'k', 9, 0,
/* 4091 */ 's', 'a', 'b', 'a', 'l', 9, 0,
/* 4098 */ 'u', 'a', 'b', 'a', 'l', 9, 0,
/* 4105 */ 'l', 'd', 'a', 'd', 'd', 'a', 'l', 9, 0,
/* 4114 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 9, 0,
/* 4123 */ 'b', 'f', 'm', 'l', 'a', 'l', 9, 0,
/* 4131 */ 's', 'm', 'l', 'a', 'l', 9, 0,
/* 4138 */ 'u', 'm', 'l', 'a', 'l', 9, 0,
/* 4145 */ 'l', 'd', 's', 'm', 'i', 'n', 'a', 'l', 9, 0,
/* 4155 */ 'l', 'd', 'u', 'm', 'i', 'n', 'a', 'l', 9, 0,
/* 4165 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 'p', 'a', 'l', 9, 0,
/* 4177 */ 'r', 'c', 'w', 's', 'w', 'p', 'p', 'a', 'l', 9, 0,
/* 4188 */ 'l', 'd', 'c', 'l', 'r', 'p', 'a', 'l', 9, 0,
/* 4198 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 'p', 'a', 'l', 9, 0,
/* 4210 */ 'r', 'c', 'w', 'c', 'l', 'r', 'p', 'a', 'l', 9, 0,
/* 4221 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 'p', 'a', 'l', 9, 0,
/* 4233 */ 'r', 'c', 'w', 'c', 'a', 's', 'p', 'a', 'l', 9, 0,
/* 4244 */ 'l', 'd', 's', 'e', 't', 'p', 'a', 'l', 9, 0,
/* 4254 */ 'r', 'c', 'w', 's', 's', 'e', 't', 'p', 'a', 'l', 9, 0,
/* 4266 */ 'r', 'c', 'w', 's', 'e', 't', 'p', 'a', 'l', 9, 0,
/* 4277 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 'a', 'l', 9, 0,
/* 4288 */ 'r', 'c', 'w', 's', 'w', 'p', 'a', 'l', 9, 0,
/* 4298 */ 'l', 'd', 'c', 'l', 'r', 'a', 'l', 9, 0,
/* 4307 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 'a', 'l', 9, 0,
/* 4318 */ 'r', 'c', 'w', 'c', 'l', 'r', 'a', 'l', 9, 0,
/* 4328 */ 'l', 'd', 'e', 'o', 'r', 'a', 'l', 9, 0,
/* 4337 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 'a', 'l', 9, 0,
/* 4348 */ 'r', 'c', 'w', 'c', 'a', 's', 'a', 'l', 9, 0,
/* 4358 */ 'l', 'd', 's', 'e', 't', 'a', 'l', 9, 0,
/* 4367 */ 'r', 'c', 'w', 's', 's', 'e', 't', 'a', 'l', 9, 0,
/* 4378 */ 'r', 'c', 'w', 's', 'e', 't', 'a', 'l', 9, 0,
/* 4388 */ 'l', 'd', 's', 'm', 'a', 'x', 'a', 'l', 9, 0,
/* 4398 */ 'l', 'd', 'u', 'm', 'a', 'x', 'a', 'l', 9, 0,
/* 4408 */ 't', 'b', 'l', 9, 0,
/* 4413 */ 's', 'm', 's', 'u', 'b', 'l', 9, 0,
/* 4421 */ 'u', 'm', 's', 'u', 'b', 'l', 9, 0,
/* 4429 */ 's', 's', 'u', 'b', 'l', 9, 0,
/* 4436 */ 'u', 's', 'u', 'b', 'l', 9, 0,
/* 4443 */ 's', 'a', 'b', 'd', 'l', 9, 0,
/* 4450 */ 'u', 'a', 'b', 'd', 'l', 9, 0,
/* 4457 */ 'l', 'd', 'a', 'd', 'd', 'l', 9, 0,
/* 4465 */ 's', 'm', 'a', 'd', 'd', 'l', 9, 0,
/* 4473 */ 'u', 'm', 'a', 'd', 'd', 'l', 9, 0,
/* 4481 */ 's', 'a', 'd', 'd', 'l', 9, 0,
/* 4488 */ 'u', 'a', 'd', 'd', 'l', 9, 0,
/* 4495 */ 't', 'c', 'a', 'n', 'c', 'e', 'l', 9, 0,
/* 4504 */ 'f', 'c', 's', 'e', 'l', 9, 0,
/* 4511 */ 'p', 's', 'e', 'l', 9, 0,
/* 4517 */ 'f', 't', 's', 's', 'e', 'l', 9, 0,
/* 4525 */ 's', 'q', 's', 'h', 'l', 9, 0,
/* 4532 */ 'u', 'q', 's', 'h', 'l', 9, 0,
/* 4539 */ 's', 'q', 'r', 's', 'h', 'l', 9, 0,
/* 4547 */ 'u', 'q', 'r', 's', 'h', 'l', 9, 0,
/* 4555 */ 's', 'r', 's', 'h', 'l', 9, 0,
/* 4562 */ 'u', 'r', 's', 'h', 'l', 9, 0,
/* 4569 */ 's', 's', 'h', 'l', 9, 0,
/* 4575 */ 'u', 's', 'h', 'l', 9, 0,
/* 4581 */ 'u', 's', 'm', 'l', 'a', 'l', 'l', 9, 0,
/* 4590 */ 's', 'u', 'm', 'l', 'a', 'l', 'l', 9, 0,
/* 4599 */ 's', 's', 'h', 'l', 'l', 9, 0,
/* 4606 */ 'u', 's', 'h', 'l', 'l', 9, 0,
/* 4613 */ 's', 'm', 'l', 's', 'l', 'l', 9, 0,
/* 4621 */ 'u', 'm', 'l', 's', 'l', 'l', 9, 0,
/* 4629 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 9, 0,
/* 4638 */ 'p', 'm', 'u', 'l', 'l', 9, 0,
/* 4645 */ 's', 'm', 'u', 'l', 'l', 9, 0,
/* 4652 */ 'u', 'm', 'u', 'l', 'l', 9, 0,
/* 4659 */ 'l', 'd', 's', 'm', 'i', 'n', 'l', 9, 0,
/* 4668 */ 'l', 'd', 'u', 'm', 'i', 'n', 'l', 9, 0,
/* 4677 */ 'a', 'd', 'd', 'p', 'l', 9, 0,
/* 4684 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 'p', 'l', 9, 0,
/* 4695 */ 'r', 'c', 'w', 's', 'w', 'p', 'p', 'l', 9, 0,
/* 4705 */ 'l', 'd', 'c', 'l', 'r', 'p', 'l', 9, 0,
/* 4714 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 'p', 'l', 9, 0,
/* 4725 */ 'r', 'c', 'w', 'c', 'l', 'r', 'p', 'l', 9, 0,
/* 4735 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 'p', 'l', 9, 0,
/* 4746 */ 'r', 'c', 'w', 'c', 'a', 's', 'p', 'l', 9, 0,
/* 4756 */ 'a', 'd', 'd', 's', 'p', 'l', 9, 0,
/* 4764 */ 'l', 'd', 's', 'e', 't', 'p', 'l', 9, 0,
/* 4773 */ 'r', 'c', 'w', 's', 's', 'e', 't', 'p', 'l', 9, 0,
/* 4784 */ 'r', 'c', 'w', 's', 'e', 't', 'p', 'l', 9, 0,
/* 4794 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 'l', 9, 0,
/* 4804 */ 'r', 'c', 'w', 's', 'w', 'p', 'l', 9, 0,
/* 4813 */ 'l', 'd', 'c', 'l', 'r', 'l', 9, 0,
/* 4821 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 'l', 9, 0,
/* 4831 */ 'r', 'c', 'w', 'c', 'l', 'r', 'l', 9, 0,
/* 4840 */ 'l', 'd', 'e', 'o', 'r', 'l', 9, 0,
/* 4848 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 'l', 9, 0,
/* 4858 */ 'r', 'c', 'w', 'c', 'a', 's', 'l', 9, 0,
/* 4867 */ 'n', 'b', 's', 'l', 9, 0,
/* 4873 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 9, 0,
/* 4882 */ 'b', 'f', 'm', 'l', 's', 'l', 9, 0,
/* 4890 */ 's', 'm', 'l', 's', 'l', 9, 0,
/* 4897 */ 'u', 'm', 'l', 's', 'l', 9, 0,
/* 4904 */ 's', 'y', 's', 'l', 9, 0,
/* 4910 */ 'l', 'd', 's', 'e', 't', 'l', 9, 0,
/* 4918 */ 'r', 'c', 'w', 's', 's', 'e', 't', 'l', 9, 0,
/* 4928 */ 'r', 'c', 'w', 's', 'e', 't', 'l', 9, 0,
/* 4937 */ 'f', 'c', 'v', 't', 'l', 9, 0,
/* 4944 */ 'b', 'f', 'm', 'u', 'l', 9, 0,
/* 4951 */ 'f', 'n', 'm', 'u', 'l', 9, 0,
/* 4958 */ 'p', 'm', 'u', 'l', 9, 0,
/* 4964 */ 'f', 't', 's', 'm', 'u', 'l', 9, 0,
/* 4972 */ 'a', 'd', 'd', 'v', 'l', 9, 0,
/* 4979 */ 'r', 'd', 'v', 'l', 9, 0,
/* 4985 */ 'a', 'd', 'd', 's', 'v', 'l', 9, 0,
/* 4993 */ 'r', 'd', 's', 'v', 'l', 9, 0,
/* 5000 */ 'l', 'd', 's', 'm', 'a', 'x', 'l', 9, 0,
/* 5009 */ 'l', 'd', 'u', 'm', 'a', 'x', 'l', 9, 0,
/* 5018 */ 's', 'h', 'a', '1', 'm', 9, 0,
/* 5025 */ 's', 'b', 'f', 'm', 9, 0,
/* 5031 */ 'u', 'b', 'f', 'm', 9, 0,
/* 5037 */ 'r', 'p', 'r', 'f', 'm', 9, 0,
/* 5044 */ 'l', 'd', 'g', 'm', 9, 0,
/* 5050 */ 's', 't', 'g', 'm', 9, 0,
/* 5056 */ 's', 't', 'z', 'g', 'm', 9, 0,
/* 5063 */ 'b', 'f', 'm', 'i', 'n', 'n', 'm', 9, 0,
/* 5072 */ 'b', 'f', 'm', 'a', 'x', 'n', 'm', 9, 0,
/* 5081 */ 'd', 'u', 'p', 'm', 9, 0,
/* 5087 */ 'f', 'r', 'i', 'n', 't', 'm', 9, 0,
/* 5095 */ 'p', 'r', 'f', 'u', 'm', 9, 0,
/* 5102 */ 'b', 's', 'l', '1', 'n', 9, 0,
/* 5109 */ 'b', 's', 'l', '2', 'n', 9, 0,
/* 5116 */ 'r', 's', 'u', 'b', 'h', 'n', 9, 0,
/* 5124 */ 'r', 'a', 'd', 'd', 'h', 'n', 9, 0,
/* 5132 */ 'b', 'f', 'm', 'i', 'n', 9, 0,
/* 5139 */ 'l', 'd', 's', 'm', 'i', 'n', 9, 0,
/* 5147 */ 'l', 'd', 'u', 'm', 'i', 'n', 9, 0,
/* 5155 */ 'b', 'r', 'k', 'n', 9, 0,
/* 5161 */ 'c', 'c', 'm', 'n', 9, 0,
/* 5167 */ 'e', 'o', 'n', 9, 0,
/* 5172 */ 's', 'q', 's', 'h', 'r', 'n', 9, 0,
/* 5180 */ 'u', 'q', 's', 'h', 'r', 'n', 9, 0,
/* 5188 */ 's', 'q', 'r', 's', 'h', 'r', 'n', 9, 0,
/* 5197 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', 9, 0,
/* 5206 */ 'o', 'r', 'n', 9, 0,
/* 5211 */ 'f', 'r', 'i', 'n', 't', 'n', 9, 0,
/* 5219 */ 'b', 'f', 'c', 'v', 't', 'n', 9, 0,
/* 5227 */ 's', 'q', 'c', 'v', 't', 'n', 9, 0,
/* 5235 */ 'u', 'q', 'c', 'v', 't', 'n', 9, 0,
/* 5243 */ 's', 'q', 'x', 't', 'n', 9, 0,
/* 5250 */ 'u', 'q', 'x', 't', 'n', 9, 0,
/* 5257 */ 's', 'q', 's', 'h', 'r', 'u', 'n', 9, 0,
/* 5266 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', 9, 0,
/* 5276 */ 's', 'q', 'c', 'v', 't', 'u', 'n', 9, 0,
/* 5285 */ 's', 'q', 'x', 't', 'u', 'n', 9, 0,
/* 5293 */ 'm', 'o', 'v', 'n', 9, 0,
/* 5299 */ 'f', 'c', 'v', 't', 'x', 'n', 9, 0,
/* 5307 */ 'w', 'h', 'i', 'l', 'e', 'l', 'o', 9, 0,
/* 5316 */ 'p', 'u', 'n', 'p', 'k', 'l', 'o', 9, 0,
/* 5325 */ 's', 'u', 'n', 'p', 'k', 'l', 'o', 9, 0,
/* 5334 */ 'u', 'u', 'n', 'p', 'k', 'l', 'o', 9, 0,
/* 5343 */ 'c', 'm', 'p', 'l', 'o', 9, 0,
/* 5350 */ 'z', 'e', 'r', 'o', 9, 0,
/* 5356 */ 'f', 'c', 'm', 'u', 'o', 9, 0,
/* 5363 */ 's', 'h', 'a', '1', 'p', 9, 0,
/* 5370 */ 's', 'u', 'b', 'p', 9, 0,
/* 5376 */ 's', 'q', 'd', 'e', 'c', 'p', 9, 0,
/* 5384 */ 'u', 'q', 'd', 'e', 'c', 'p', 9, 0,
/* 5392 */ 's', 'q', 'i', 'n', 'c', 'p', 9, 0,
/* 5400 */ 'u', 'q', 'i', 'n', 'c', 'p', 9, 0,
/* 5408 */ 'f', 'a', 'd', 'd', 'p', 9, 0,
/* 5415 */ 'l', 'd', 'p', 9, 0,
/* 5420 */ 'b', 'd', 'e', 'p', 9, 0,
/* 5426 */ 's', 't', 'g', 'p', 9, 0,
/* 5432 */ 'z', 'i', 'p', 9, 0,
/* 5437 */ 's', 'a', 'd', 'a', 'l', 'p', 9, 0,
/* 5445 */ 'u', 'a', 'd', 'a', 'l', 'p', 9, 0,
/* 5453 */ 's', 'a', 'd', 'd', 'l', 'p', 9, 0,
/* 5461 */ 'u', 'a', 'd', 'd', 'l', 'p', 9, 0,
/* 5469 */ 's', 't', 'i', 'l', 'p', 9, 0,
/* 5476 */ 'b', 'f', 'c', 'l', 'a', 'm', 'p', 9, 0,
/* 5485 */ 's', 'c', 'l', 'a', 'm', 'p', 9, 0,
/* 5493 */ 'u', 'c', 'l', 'a', 'm', 'p', 9, 0,
/* 5501 */ 'f', 'c', 'c', 'm', 'p', 9, 0,
/* 5508 */ 'f', 'c', 'm', 'p', 9, 0,
/* 5514 */ 'f', 'm', 'i', 'n', 'n', 'm', 'p', 9, 0,
/* 5523 */ 'f', 'm', 'a', 'x', 'n', 'm', 'p', 9, 0,
/* 5532 */ 'l', 'd', 'n', 'p', 9, 0,
/* 5538 */ 'f', 'm', 'i', 'n', 'p', 9, 0,
/* 5545 */ 's', 'm', 'i', 'n', 'p', 9, 0,
/* 5552 */ 'u', 'm', 'i', 'n', 'p', 9, 0,
/* 5559 */ 's', 't', 'n', 'p', 9, 0,
/* 5565 */ 'l', 'd', 'i', 'a', 'p', 'p', 9, 0,
/* 5573 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 'p', 9, 0,
/* 5583 */ 'r', 'c', 'w', 's', 'w', 'p', 'p', 9, 0,
/* 5592 */ 'a', 'd', 'r', 'p', 9, 0,
/* 5598 */ 'b', 'g', 'r', 'p', 9, 0,
/* 5604 */ 'l', 'd', 'c', 'l', 'r', 'p', 9, 0,
/* 5612 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 'p', 9, 0,
/* 5622 */ 'r', 'c', 'w', 'c', 'l', 'r', 'p', 9, 0,
/* 5631 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 'p', 9, 0,
/* 5641 */ 'r', 'c', 'w', 'c', 'a', 's', 'p', 9, 0,
/* 5650 */ 's', 'y', 's', 'p', 9, 0,
/* 5656 */ 'l', 'd', 's', 'e', 't', 'p', 9, 0,
/* 5664 */ 'r', 'c', 'w', 's', 's', 'e', 't', 'p', 9, 0,
/* 5674 */ 'r', 'c', 'w', 's', 'e', 't', 'p', 9, 0,
/* 5683 */ 'c', 'n', 't', 'p', 9, 0,
/* 5689 */ 'f', 'r', 'i', 'n', 't', 'p', 9, 0,
/* 5697 */ 's', 't', 'p', 9, 0,
/* 5702 */ 'f', 'd', 'u', 'p', 9, 0,
/* 5708 */ 'r', 'c', 'w', 's', 's', 'w', 'p', 9, 0,
/* 5717 */ 'r', 'c', 'w', 's', 'w', 'p', 9, 0,
/* 5725 */ 'l', 'd', 'a', 'x', 'p', 9, 0,
/* 5732 */ 'f', 'm', 'a', 'x', 'p', 9, 0,
/* 5739 */ 's', 'm', 'a', 'x', 'p', 9, 0,
/* 5746 */ 'u', 'm', 'a', 'x', 'p', 9, 0,
/* 5753 */ 'l', 'd', 'x', 'p', 9, 0,
/* 5759 */ 's', 't', 'l', 'x', 'p', 9, 0,
/* 5766 */ 's', 't', 'x', 'p', 9, 0,
/* 5772 */ 'u', 'z', 'p', 9, 0,
/* 5777 */ 'l', 'd', '1', 'q', 9, 0,
/* 5783 */ 's', 't', '1', 'q', 9, 0,
/* 5789 */ 'l', 'd', '2', 'q', 9, 0,
/* 5795 */ 's', 't', '2', 'q', 9, 0,
/* 5801 */ 'l', 'd', '3', 'q', 9, 0,
/* 5807 */ 's', 't', '3', 'q', 9, 0,
/* 5813 */ 'l', 'd', '4', 'q', 9, 0,
/* 5819 */ 's', 't', '4', 'q', 9, 0,
/* 5825 */ 'f', 'c', 'm', 'e', 'q', 9, 0,
/* 5832 */ 'c', 't', 'e', 'r', 'm', 'e', 'q', 9, 0,
/* 5841 */ 'c', 'm', 'p', 'e', 'q', 9, 0,
/* 5848 */ 't', 'b', 'l', 'q', 9, 0,
/* 5854 */ 'd', 'u', 'p', 'q', 9, 0,
/* 5860 */ 'e', 'x', 't', 'q', 9, 0,
/* 5866 */ 't', 'b', 'x', 'q', 9, 0,
/* 5872 */ 'l', 'd', '1', 'r', 9, 0,
/* 5878 */ 'l', 'd', '2', 'r', 9, 0,
/* 5884 */ 'l', 'd', '3', 'r', 9, 0,
/* 5890 */ 'l', 'd', '4', 'r', 9, 0,
/* 5896 */ 'l', 'd', 'a', 'r', 9, 0,
/* 5902 */ 'l', 'd', 'l', 'a', 'r', 9, 0,
/* 5909 */ 'x', 'a', 'r', 9, 0,
/* 5914 */ 'f', 's', 'u', 'b', 'r', 9, 0,
/* 5921 */ 's', 'h', 's', 'u', 'b', 'r', 9, 0,
/* 5929 */ 'u', 'h', 's', 'u', 'b', 'r', 9, 0,
/* 5937 */ 's', 'q', 's', 'u', 'b', 'r', 9, 0,
/* 5945 */ 'u', 'q', 's', 'u', 'b', 'r', 9, 0,
/* 5953 */ 'a', 'd', 'r', 9, 0,
/* 5958 */ 'l', 'd', 'r', 9, 0,
/* 5963 */ 'r', 'd', 'f', 'f', 'r', 9, 0,
/* 5970 */ 'w', 'r', 'f', 'f', 'r', 9, 0,
/* 5977 */ 's', 'q', 'r', 's', 'h', 'r', 9, 0,
/* 5985 */ 'u', 'q', 'r', 's', 'h', 'r', 9, 0,
/* 5993 */ 's', 'r', 's', 'h', 'r', 9, 0,
/* 6000 */ 'u', 'r', 's', 'h', 'r', 9, 0,
/* 6007 */ 's', 's', 'h', 'r', 9, 0,
/* 6013 */ 'u', 's', 'h', 'r', 9, 0,
/* 6019 */ 'b', 'l', 'r', 9, 0,
/* 6024 */ 'l', 'd', 'c', 'l', 'r', 9, 0,
/* 6031 */ 'r', 'c', 'w', 's', 'c', 'l', 'r', 9, 0,
/* 6040 */ 'r', 'c', 'w', 'c', 'l', 'r', 9, 0,
/* 6048 */ 's', 'q', 's', 'h', 'l', 'r', 9, 0,
/* 6056 */ 'u', 'q', 's', 'h', 'l', 'r', 9, 0,
/* 6064 */ 's', 'q', 'r', 's', 'h', 'l', 'r', 9, 0,
/* 6073 */ 'u', 'q', 'r', 's', 'h', 'l', 'r', 9, 0,
/* 6082 */ 's', 'r', 's', 'h', 'l', 'r', 9, 0,
/* 6090 */ 'u', 'r', 's', 'h', 'l', 'r', 9, 0,
/* 6098 */ 's', 't', 'l', 'l', 'r', 9, 0,
/* 6105 */ 'l', 's', 'l', 'r', 9, 0,
/* 6111 */ 's', 't', 'l', 'r', 9, 0,
/* 6117 */ 'l', 'd', 'e', 'o', 'r', 9, 0,
/* 6124 */ 'n', 'o', 'r', 9, 0,
/* 6129 */ 'r', 'o', 'r', 9, 0,
/* 6134 */ 'l', 'd', 'a', 'p', 'r', 9, 0,
/* 6141 */ 'o', 'r', 'r', 9, 0,
/* 6146 */ 'a', 's', 'r', 'r', 9, 0,
/* 6152 */ 'l', 's', 'r', 'r', 9, 0,
/* 6158 */ 'm', 's', 'r', 'r', 9, 0,
/* 6164 */ 'a', 's', 'r', 9, 0,
/* 6169 */ 'l', 's', 'r', 9, 0,
/* 6174 */ 'm', 's', 'r', 9, 0,
/* 6179 */ 'i', 'n', 's', 'r', 9, 0,
/* 6185 */ 'l', 'd', 't', 'r', 9, 0,
/* 6191 */ 's', 't', 'r', 9, 0,
/* 6196 */ 's', 't', 't', 'r', 9, 0,
/* 6202 */ 'e', 'x', 't', 'r', 9, 0,
/* 6208 */ 'l', 'd', 'u', 'r', 9, 0,
/* 6214 */ 's', 't', 'l', 'u', 'r', 9, 0,
/* 6221 */ 'l', 'd', 'a', 'p', 'u', 'r', 9, 0,
/* 6229 */ 's', 't', 'u', 'r', 9, 0,
/* 6235 */ 'f', 'd', 'i', 'v', 'r', 9, 0,
/* 6242 */ 's', 'd', 'i', 'v', 'r', 9, 0,
/* 6249 */ 'u', 'd', 'i', 'v', 'r', 9, 0,
/* 6256 */ 'w', 'h', 'i', 'l', 'e', 'w', 'r', 9, 0,
/* 6265 */ 'l', 'd', 'a', 'x', 'r', 9, 0,
/* 6272 */ 'l', 'd', 'x', 'r', 9, 0,
/* 6278 */ 's', 't', 'l', 'x', 'r', 9, 0,
/* 6285 */ 's', 't', 'x', 'r', 9, 0,
/* 6291 */ 'r', 'c', 'w', 's', 'c', 'a', 's', 9, 0,
/* 6300 */ 'r', 'c', 'w', 'c', 'a', 's', 9, 0,
/* 6308 */ 'b', 'r', 'k', 'a', 's', 9, 0,
/* 6315 */ 'b', 'r', 'k', 'p', 'a', 's', 9, 0,
/* 6323 */ 'f', 'c', 'v', 't', 'a', 's', 9, 0,
/* 6331 */ 'f', 'a', 'b', 's', 9, 0,
/* 6337 */ 's', 'q', 'a', 'b', 's', 9, 0,
/* 6344 */ 'b', 'r', 'k', 'b', 's', 9, 0,
/* 6351 */ 'b', 'r', 'k', 'p', 'b', 's', 9, 0,
/* 6359 */ 's', 'u', 'b', 's', 9, 0,
/* 6365 */ 's', 'b', 'c', 's', 9, 0,
/* 6371 */ 'a', 'd', 'c', 's', 9, 0,
/* 6377 */ 'b', 'i', 'c', 's', 9, 0,
/* 6383 */ 'a', 'd', 'd', 's', 9, 0,
/* 6389 */ 'n', 'a', 'n', 'd', 's', 9, 0,
/* 6396 */ 'p', 't', 'r', 'u', 'e', 's', 9, 0,
/* 6404 */ 'w', 'h', 'i', 'l', 'e', 'h', 's', 9, 0,
/* 6413 */ 'c', 'm', 'h', 's', 9, 0,
/* 6419 */ 'c', 'm', 'p', 'h', 's', 9, 0,
/* 6426 */ 'c', 'l', 's', 9, 0,
/* 6431 */ 'w', 'h', 'i', 'l', 'e', 'l', 's', 9, 0,
/* 6440 */ 'b', 'f', 'm', 'l', 's', 9, 0,
/* 6447 */ 'f', 'n', 'm', 'l', 's', 9, 0,
/* 6454 */ 'c', 'm', 'p', 'l', 's', 9, 0,
/* 6461 */ 'f', 'c', 'v', 't', 'm', 's', 9, 0,
/* 6469 */ 'i', 'n', 's', 9, 0,
/* 6474 */ 'b', 'r', 'k', 'n', 's', 9, 0,
/* 6481 */ 'o', 'r', 'n', 's', 9, 0,
/* 6487 */ 'f', 'c', 'v', 't', 'n', 's', 9, 0,
/* 6495 */ 's', 'u', 'b', 'p', 's', 9, 0,
/* 6502 */ 'f', 'r', 'e', 'c', 'p', 's', 9, 0,
/* 6510 */ 'b', 'm', 'o', 'p', 's', 9, 0,
/* 6517 */ 'b', 'f', 'm', 'o', 'p', 's', 9, 0,
/* 6525 */ 'u', 's', 'm', 'o', 'p', 's', 9, 0,
/* 6533 */ 's', 'u', 'm', 'o', 'p', 's', 9, 0,
/* 6541 */ 'f', 'c', 'v', 't', 'p', 's', 9, 0,
/* 6549 */ 'r', 'd', 'f', 'f', 'r', 's', 9, 0,
/* 6557 */ 'm', 'r', 's', 9, 0,
/* 6562 */ 'e', 'o', 'r', 's', 9, 0,
/* 6568 */ 'n', 'o', 'r', 's', 9, 0,
/* 6574 */ 'm', 'r', 'r', 's', 9, 0,
/* 6580 */ 'o', 'r', 'r', 's', 9, 0,
/* 6586 */ 'f', 'r', 's', 'q', 'r', 't', 's', 9, 0,
/* 6595 */ 's', 'y', 's', 9, 0,
/* 6600 */ 'f', 'c', 'v', 't', 'z', 's', 9, 0,
/* 6608 */ 'f', 'j', 'c', 'v', 't', 'z', 's', 9, 0,
/* 6617 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 'b', 't', 9, 0,
/* 6628 */ 's', 's', 'u', 'b', 'l', 'b', 't', 9, 0,
/* 6637 */ 's', 'a', 'd', 'd', 'l', 'b', 't', 9, 0,
/* 6646 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 'b', 't', 9, 0,
/* 6657 */ 'e', 'o', 'r', 'b', 't', 9, 0,
/* 6664 */ 'c', 'o', 'm', 'p', 'a', 'c', 't', 9, 0,
/* 6673 */ 'w', 'f', 'e', 't', 9, 0,
/* 6679 */ 'r', 'e', 't', 9, 0,
/* 6684 */ 'l', 'd', 's', 'e', 't', 9, 0,
/* 6691 */ 'r', 'c', 'w', 's', 's', 'e', 't', 9, 0,
/* 6700 */ 'r', 'c', 'w', 's', 'e', 't', 9, 0,
/* 6708 */ 'f', 'a', 'c', 'g', 't', 9, 0,
/* 6715 */ 'w', 'h', 'i', 'l', 'e', 'g', 't', 9, 0,
/* 6724 */ 'f', 'c', 'm', 'g', 't', 9, 0,
/* 6731 */ 'c', 'm', 'p', 'g', 't', 9, 0,
/* 6738 */ 'r', 'b', 'i', 't', 9, 0,
/* 6744 */ 't', 'r', 'c', 'i', 't', 9, 0,
/* 6751 */ 'w', 'f', 'i', 't', 9, 0,
/* 6757 */ 's', 'a', 'b', 'a', 'l', 't', 9, 0,
/* 6765 */ 'u', 'a', 'b', 'a', 'l', 't', 9, 0,
/* 6773 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 't', 9, 0,
/* 6783 */ 'b', 'f', 'm', 'l', 'a', 'l', 't', 9, 0,
/* 6792 */ 's', 'm', 'l', 'a', 'l', 't', 9, 0,
/* 6800 */ 'u', 'm', 'l', 'a', 'l', 't', 9, 0,
/* 6808 */ 's', 's', 'u', 'b', 'l', 't', 9, 0,
/* 6816 */ 'u', 's', 'u', 'b', 'l', 't', 9, 0,
/* 6824 */ 's', 'b', 'c', 'l', 't', 9, 0,
/* 6831 */ 'a', 'd', 'c', 'l', 't', 9, 0,
/* 6838 */ 's', 'a', 'b', 'd', 'l', 't', 9, 0,
/* 6846 */ 'u', 'a', 'b', 'd', 'l', 't', 9, 0,
/* 6854 */ 's', 'a', 'd', 'd', 'l', 't', 9, 0,
/* 6862 */ 'u', 'a', 'd', 'd', 'l', 't', 9, 0,
/* 6870 */ 'w', 'h', 'i', 'l', 'e', 'l', 't', 9, 0,
/* 6879 */ 'h', 'l', 't', 9, 0,
/* 6884 */ 's', 's', 'h', 'l', 'l', 't', 9, 0,
/* 6892 */ 'u', 's', 'h', 'l', 'l', 't', 9, 0,
/* 6900 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 't', 9, 0,
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/* 9269 */ 'c', 'p', 'y', 'f', 'p', 'w', 'n', 9, '[', 0,
/* 9279 */ 'c', 'p', 'y', 'p', 'w', 'n', 9, '[', 0,
/* 9288 */ 'c', 'p', 'y', 'f', 'e', 't', 'w', 'n', 9, '[', 0,
/* 9299 */ 'c', 'p', 'y', 'e', 't', 'w', 'n', 9, '[', 0,
/* 9309 */ 'c', 'p', 'y', 'f', 'm', 't', 'w', 'n', 9, '[', 0,
/* 9320 */ 'c', 'p', 'y', 'm', 't', 'w', 'n', 9, '[', 0,
/* 9330 */ 'c', 'p', 'y', 'f', 'p', 't', 'w', 'n', 9, '[', 0,
/* 9341 */ 'c', 'p', 'y', 'p', 't', 'w', 'n', 9, '[', 0,
/* 9351 */ 'c', 'p', 'y', 'f', 'e', 'r', 't', 'w', 'n', 9, '[', 0,
/* 9363 */ 'c', 'p', 'y', 'e', 'r', 't', 'w', 'n', 9, '[', 0,
/* 9374 */ 'c', 'p', 'y', 'f', 'm', 'r', 't', 'w', 'n', 9, '[', 0,
/* 9386 */ 'c', 'p', 'y', 'm', 'r', 't', 'w', 'n', 9, '[', 0,
/* 9397 */ 'c', 'p', 'y', 'f', 'p', 'r', 't', 'w', 'n', 9, '[', 0,
/* 9409 */ 'c', 'p', 'y', 'p', 'r', 't', 'w', 'n', 9, '[', 0,
/* 9420 */ 'c', 'p', 'y', 'f', 'e', 'w', 't', 'w', 'n', 9, '[', 0,
/* 9432 */ 'c', 'p', 'y', 'e', 'w', 't', 'w', 'n', 9, '[', 0,
/* 9443 */ 'c', 'p', 'y', 'f', 'm', 'w', 't', 'w', 'n', 9, '[', 0,
/* 9455 */ 'c', 'p', 'y', 'm', 'w', 't', 'w', 'n', 9, '[', 0,
/* 9466 */ 'c', 'p', 'y', 'f', 'p', 'w', 't', 'w', 'n', 9, '[', 0,
/* 9478 */ 'c', 'p', 'y', 'p', 'w', 't', 'w', 'n', 9, '[', 0,
/* 9489 */ 'c', 'p', 'y', 'f', 'p', 9, '[', 0,
/* 9497 */ 's', 'e', 't', 'g', 'p', 9, '[', 0,
/* 9505 */ 's', 'e', 't', 'p', 9, '[', 0,
/* 9512 */ 'c', 'p', 'y', 'p', 9, '[', 0,
/* 9519 */ 'c', 'p', 'y', 'f', 'e', 't', 9, '[', 0,
/* 9528 */ 's', 'e', 't', 'g', 'e', 't', 9, '[', 0,
/* 9537 */ 's', 'e', 't', 'e', 't', 9, '[', 0,
/* 9545 */ 'c', 'p', 'y', 'e', 't', 9, '[', 0,
/* 9553 */ 'c', 'p', 'y', 'f', 'm', 't', 9, '[', 0,
/* 9562 */ 's', 'e', 't', 'g', 'm', 't', 9, '[', 0,
/* 9571 */ 's', 'e', 't', 'm', 't', 9, '[', 0,
/* 9579 */ 'c', 'p', 'y', 'm', 't', 9, '[', 0,
/* 9587 */ 'c', 'p', 'y', 'f', 'p', 't', 9, '[', 0,
/* 9596 */ 's', 'e', 't', 'g', 'p', 't', 9, '[', 0,
/* 9605 */ 's', 'e', 't', 'p', 't', 9, '[', 0,
/* 9613 */ 'c', 'p', 'y', 'p', 't', 9, '[', 0,
/* 9621 */ 'c', 'p', 'y', 'f', 'e', 'r', 't', 9, '[', 0,
/* 9631 */ 'c', 'p', 'y', 'e', 'r', 't', 9, '[', 0,
/* 9640 */ 'c', 'p', 'y', 'f', 'm', 'r', 't', 9, '[', 0,
/* 9650 */ 'c', 'p', 'y', 'm', 'r', 't', 9, '[', 0,
/* 9659 */ 'c', 'p', 'y', 'f', 'p', 'r', 't', 9, '[', 0,
/* 9669 */ 'c', 'p', 'y', 'p', 'r', 't', 9, '[', 0,
/* 9678 */ 'c', 'p', 'y', 'f', 'e', 'w', 't', 9, '[', 0,
/* 9688 */ 'c', 'p', 'y', 'e', 'w', 't', 9, '[', 0,
/* 9697 */ 'c', 'p', 'y', 'f', 'm', 'w', 't', 9, '[', 0,
/* 9707 */ 'c', 'p', 'y', 'm', 'w', 't', 9, '[', 0,
/* 9716 */ 'c', 'p', 'y', 'f', 'p', 'w', 't', 9, '[', 0,
/* 9726 */ 'c', 'p', 'y', 'p', 'w', 't', 9, '[', 0,
/* 9735 */ 'e', 'r', 'e', 't', 'a', 'a', 0,
/* 9742 */ 'e', 'r', 'e', 't', 'a', 'b', 0,
/* 9749 */ 's', 'b', 0,
/* 9752 */ 'x', 'a', 'f', 'l', 'a', 'g', 0,
/* 9759 */ 'a', 'x', 'f', 'l', 'a', 'g', 0,
/* 9766 */ 'b', 'r', 'b', 9, 'i', 'n', 'j', 0,
/* 9774 */ '#', 32, 'F', 'E', 'n', 't', 'r', 'y', 32, 'c', 'a', 'l', 'l', 0,
/* 9788 */ 'b', 'r', 'b', 9, 'i', 'a', 'l', 'l', 0,
/* 9797 */ 's', 'e', 't', 'f', 'f', 'r', 0,
/* 9804 */ 'd', 'r', 'p', 's', 0,
/* 9809 */ 'e', 'r', 'e', 't', 0,
/* 9814 */ 't', 'c', 'o', 'm', 'm', 'i', 't', 0,
/* 9822 */ 'c', 'f', 'i', 'n', 'v', 0,
/* 9828 */ 'l', 'd', '1', 'b', 9, '{', 0,
/* 9835 */ 's', 't', '1', 'b', 9, '{', 0,
/* 9842 */ 'l', 'd', '1', 'd', 9, '{', 0,
/* 9849 */ 's', 't', '1', 'd', 9, '{', 0,
/* 9856 */ 'l', 'd', '1', 'h', 9, '{', 0,
/* 9863 */ 's', 't', '1', 'h', 9, '{', 0,
/* 9870 */ 'l', 'd', '1', 'q', 9, '{', 0,
/* 9877 */ 's', 't', '1', 'q', 9, '{', 0,
/* 9884 */ 'l', 'd', '1', 'w', 9, '{', 0,
/* 9891 */ 's', 't', '1', 'w', 9, '{', 0,
0
};
static const uint32_t OpInfo0[] = {
0U, // PHI
0U, // INLINEASM
0U, // INLINEASM_BR
0U, // CFI_INSTRUCTION
0U, // EH_LABEL
0U, // GC_LABEL
0U, // ANNOTATION_LABEL
0U, // KILL
0U, // EXTRACT_SUBREG
0U, // INSERT_SUBREG
0U, // IMPLICIT_DEF
0U, // SUBREG_TO_REG
0U, // COPY_TO_REGCLASS
8500U, // DBG_VALUE
8557U, // DBG_VALUE_LIST
8510U, // DBG_INSTR_REF
8524U, // DBG_PHI
8532U, // DBG_LABEL
0U, // REG_SEQUENCE
0U, // COPY
8493U, // BUNDLE
8542U, // LIFETIME_START
8467U, // LIFETIME_END
8480U, // PSEUDO_PROBE
0U, // ARITH_FENCE
0U, // STACKMAP
9775U, // FENTRY_CALL
0U, // PATCHPOINT
0U, // LOAD_STACK_GUARD
0U, // PREALLOCATED_SETUP
0U, // PREALLOCATED_ARG
0U, // STATEPOINT
0U, // LOCAL_ESCAPE
0U, // FAULTING_OP
0U, // PATCHABLE_OP
8284U, // PATCHABLE_FUNCTION_ENTER
8197U, // PATCHABLE_RET
8330U, // PATCHABLE_FUNCTION_EXIT
8307U, // PATCHABLE_TAIL_CALL
8259U, // PATCHABLE_EVENT_CALL
8235U, // PATCHABLE_TYPED_EVENT_CALL
0U, // ICALL_BRANCH_FUNNEL
0U, // MEMBARRIER
0U, // G_ASSERT_SEXT
0U, // G_ASSERT_ZEXT
0U, // G_ASSERT_ALIGN
0U, // G_ADD
0U, // G_SUB
0U, // G_MUL
0U, // G_SDIV
0U, // G_UDIV
0U, // G_SREM
0U, // G_UREM
0U, // G_SDIVREM
0U, // G_UDIVREM
0U, // G_AND
0U, // G_OR
0U, // G_XOR
0U, // G_IMPLICIT_DEF
0U, // G_PHI
0U, // G_FRAME_INDEX
0U, // G_GLOBAL_VALUE
0U, // G_EXTRACT
0U, // G_UNMERGE_VALUES
0U, // G_INSERT
0U, // G_MERGE_VALUES
0U, // G_BUILD_VECTOR
0U, // G_BUILD_VECTOR_TRUNC
0U, // G_CONCAT_VECTORS
0U, // G_PTRTOINT
0U, // G_INTTOPTR
0U, // G_BITCAST
0U, // G_FREEZE
0U, // G_INTRINSIC_FPTRUNC_ROUND
0U, // G_INTRINSIC_TRUNC
0U, // G_INTRINSIC_ROUND
0U, // G_INTRINSIC_LRINT
0U, // G_INTRINSIC_ROUNDEVEN
0U, // G_READCYCLECOUNTER
0U, // G_LOAD
0U, // G_SEXTLOAD
0U, // G_ZEXTLOAD
0U, // G_INDEXED_LOAD
0U, // G_INDEXED_SEXTLOAD
0U, // G_INDEXED_ZEXTLOAD
0U, // G_STORE
0U, // G_INDEXED_STORE
0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
0U, // G_ATOMIC_CMPXCHG
0U, // G_ATOMICRMW_XCHG
0U, // G_ATOMICRMW_ADD
0U, // G_ATOMICRMW_SUB
0U, // G_ATOMICRMW_AND
0U, // G_ATOMICRMW_NAND
0U, // G_ATOMICRMW_OR
0U, // G_ATOMICRMW_XOR
0U, // G_ATOMICRMW_MAX
0U, // G_ATOMICRMW_MIN
0U, // G_ATOMICRMW_UMAX
0U, // G_ATOMICRMW_UMIN
0U, // G_ATOMICRMW_FADD
0U, // G_ATOMICRMW_FSUB
0U, // G_ATOMICRMW_FMAX
0U, // G_ATOMICRMW_FMIN
0U, // G_ATOMICRMW_UINC_WRAP
0U, // G_ATOMICRMW_UDEC_WRAP
0U, // G_FENCE
0U, // G_BRCOND
0U, // G_BRINDIRECT
0U, // G_INVOKE_REGION_START
0U, // G_INTRINSIC
0U, // G_INTRINSIC_W_SIDE_EFFECTS
0U, // G_ANYEXT
0U, // G_TRUNC
0U, // G_CONSTANT
0U, // G_FCONSTANT
0U, // G_VASTART
0U, // G_VAARG
0U, // G_SEXT
0U, // G_SEXT_INREG
0U, // G_ZEXT
0U, // G_SHL
0U, // G_LSHR
0U, // G_ASHR
0U, // G_FSHL
0U, // G_FSHR
0U, // G_ROTR
0U, // G_ROTL
0U, // G_ICMP
0U, // G_FCMP
0U, // G_SELECT
0U, // G_UADDO
0U, // G_UADDE
0U, // G_USUBO
0U, // G_USUBE
0U, // G_SADDO
0U, // G_SADDE
0U, // G_SSUBO
0U, // G_SSUBE
0U, // G_UMULO
0U, // G_SMULO
0U, // G_UMULH
0U, // G_SMULH
0U, // G_UADDSAT
0U, // G_SADDSAT
0U, // G_USUBSAT
0U, // G_SSUBSAT
0U, // G_USHLSAT
0U, // G_SSHLSAT
0U, // G_SMULFIX
0U, // G_UMULFIX
0U, // G_SMULFIXSAT
0U, // G_UMULFIXSAT
0U, // G_SDIVFIX
0U, // G_UDIVFIX
0U, // G_SDIVFIXSAT
0U, // G_UDIVFIXSAT
0U, // G_FADD
0U, // G_FSUB
0U, // G_FMUL
0U, // G_FMA
0U, // G_FMAD
0U, // G_FDIV
0U, // G_FREM
0U, // G_FPOW
0U, // G_FPOWI
0U, // G_FEXP
0U, // G_FEXP2
0U, // G_FLOG
0U, // G_FLOG2
0U, // G_FLOG10
0U, // G_FNEG
0U, // G_FPEXT
0U, // G_FPTRUNC
0U, // G_FPTOSI
0U, // G_FPTOUI
0U, // G_SITOFP
0U, // G_UITOFP
0U, // G_FABS
0U, // G_FCOPYSIGN
0U, // G_IS_FPCLASS
0U, // G_FCANONICALIZE
0U, // G_FMINNUM
0U, // G_FMAXNUM
0U, // G_FMINNUM_IEEE
0U, // G_FMAXNUM_IEEE
0U, // G_FMINIMUM
0U, // G_FMAXIMUM
0U, // G_PTR_ADD
0U, // G_PTRMASK
0U, // G_SMIN
0U, // G_SMAX
0U, // G_UMIN
0U, // G_UMAX
0U, // G_ABS
0U, // G_LROUND
0U, // G_LLROUND
0U, // G_BR
0U, // G_BRJT
0U, // G_INSERT_VECTOR_ELT
0U, // G_EXTRACT_VECTOR_ELT
0U, // G_SHUFFLE_VECTOR
0U, // G_CTTZ
0U, // G_CTTZ_ZERO_UNDEF
0U, // G_CTLZ
0U, // G_CTLZ_ZERO_UNDEF
0U, // G_CTPOP
0U, // G_BSWAP
0U, // G_BITREVERSE
0U, // G_FCEIL
0U, // G_FCOS
0U, // G_FSIN
0U, // G_FSQRT
0U, // G_FFLOOR
0U, // G_FRINT
0U, // G_FNEARBYINT
0U, // G_ADDRSPACE_CAST
0U, // G_BLOCK_ADDR
0U, // G_JUMP_TABLE
0U, // G_DYN_STACKALLOC
0U, // G_STRICT_FADD
0U, // G_STRICT_FSUB
0U, // G_STRICT_FMUL
0U, // G_STRICT_FDIV
0U, // G_STRICT_FREM
0U, // G_STRICT_FMA
0U, // G_STRICT_FSQRT
0U, // G_READ_REGISTER
0U, // G_WRITE_REGISTER
0U, // G_MEMCPY
0U, // G_MEMCPY_INLINE
0U, // G_MEMMOVE
0U, // G_MEMSET
0U, // G_BZERO
0U, // G_VECREDUCE_SEQ_FADD
0U, // G_VECREDUCE_SEQ_FMUL
0U, // G_VECREDUCE_FADD
0U, // G_VECREDUCE_FMUL
0U, // G_VECREDUCE_FMAX
0U, // G_VECREDUCE_FMIN
0U, // G_VECREDUCE_ADD
0U, // G_VECREDUCE_MUL
0U, // G_VECREDUCE_AND
0U, // G_VECREDUCE_OR
0U, // G_VECREDUCE_XOR
0U, // G_VECREDUCE_SMAX
0U, // G_VECREDUCE_SMIN
0U, // G_VECREDUCE_UMAX
0U, // G_VECREDUCE_UMIN
0U, // G_SBFX
0U, // G_UBFX
0U, // ABS_ZPmZ_UNDEF_B
0U, // ABS_ZPmZ_UNDEF_D
0U, // ABS_ZPmZ_UNDEF_H
0U, // ABS_ZPmZ_UNDEF_S
0U, // ADDHA_MPPZ_D_PSEUDO_D
0U, // ADDHA_MPPZ_S_PSEUDO_S
0U, // ADDSWrr
0U, // ADDSXrr
0U, // ADDVA_MPPZ_D_PSEUDO_D
0U, // ADDVA_MPPZ_S_PSEUDO_S
0U, // ADDWrr
0U, // ADDXrr
0U, // ADD_VG2_M2Z2Z_D_PSEUDO
0U, // ADD_VG2_M2Z2Z_S_PSEUDO
0U, // ADD_VG2_M2ZZ_D_PSEUDO
0U, // ADD_VG2_M2ZZ_S_PSEUDO
0U, // ADD_VG4_M4Z4Z_D_PSEUDO
0U, // ADD_VG4_M4Z4Z_S_PSEUDO
0U, // ADD_VG4_M4ZZ_D_PSEUDO
0U, // ADD_VG4_M4ZZ_S_PSEUDO
0U, // ADD_ZPZZ_ZERO_B
0U, // ADD_ZPZZ_ZERO_D
0U, // ADD_ZPZZ_ZERO_H
0U, // ADD_ZPZZ_ZERO_S
0U, // ADDlowTLS
0U, // ADJCALLSTACKDOWN
0U, // ADJCALLSTACKUP
0U, // AESIMCrrTied
0U, // AESMCrrTied
0U, // ANDSWrr
0U, // ANDSXrr
0U, // ANDWrr
0U, // ANDXrr
0U, // AND_ZPZZ_ZERO_B
0U, // AND_ZPZZ_ZERO_D
0U, // AND_ZPZZ_ZERO_H
0U, // AND_ZPZZ_ZERO_S
0U, // ASRD_ZPZI_ZERO_B
0U, // ASRD_ZPZI_ZERO_D
0U, // ASRD_ZPZI_ZERO_H
0U, // ASRD_ZPZI_ZERO_S
0U, // ASR_ZPZI_UNDEF_B
0U, // ASR_ZPZI_UNDEF_D
0U, // ASR_ZPZI_UNDEF_H
0U, // ASR_ZPZI_UNDEF_S
0U, // ASR_ZPZZ_UNDEF_B
0U, // ASR_ZPZZ_UNDEF_D
0U, // ASR_ZPZZ_UNDEF_H
0U, // ASR_ZPZZ_UNDEF_S
0U, // ASR_ZPZZ_ZERO_B
0U, // ASR_ZPZZ_ZERO_D
0U, // ASR_ZPZZ_ZERO_H
0U, // ASR_ZPZZ_ZERO_S
0U, // BFDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // BFDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // BFDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // BFDOT_VG4_M4ZZI_HtoS_PSEUDO
0U, // BFMLAL_MZZI_S_PSEUDO
0U, // BFMLAL_MZZ_S_PSEUDO
0U, // BFMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // BFMLAL_VG2_M2ZZI_S_PSEUDO
0U, // BFMLAL_VG2_M2ZZ_S_PSEUDO
0U, // BFMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // BFMLAL_VG4_M4ZZI_S_PSEUDO
0U, // BFMLAL_VG4_M4ZZ_S_PSEUDO
0U, // BFMLA_VG2_M2Z2Z_PSEUDO
0U, // BFMLA_VG4_M4Z4Z_PSEUDO
0U, // BFMLSL_MZZI_S_PSEUDO
0U, // BFMLSL_MZZ_S_PSEUDO
0U, // BFMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // BFMLSL_VG2_M2ZZI_S_PSEUDO
0U, // BFMLSL_VG2_M2ZZ_S_PSEUDO
0U, // BFMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // BFMLSL_VG4_M4ZZI_S_PSEUDO
0U, // BFMLSL_VG4_M4ZZ_S_PSEUDO
0U, // BFMLS_VG2_M2Z2Z_PSEUDO
0U, // BFMLS_VG4_M4Z4Z_PSEUDO
0U, // BFMOPA_MPPZZ_PSEUDO
0U, // BFMOPS_MPPZZ_PSEUDO
0U, // BFVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // BICSWrr
0U, // BICSXrr
0U, // BICWrr
0U, // BICXrr
0U, // BIC_ZPZZ_ZERO_B
0U, // BIC_ZPZZ_ZERO_D
0U, // BIC_ZPZZ_ZERO_H
0U, // BIC_ZPZZ_ZERO_S
0U, // BLRNoIP
0U, // BLR_BTI
0U, // BLR_RVMARKER
0U, // BSPv16i8
0U, // BSPv8i8
0U, // CATCHRET
0U, // CLEANUPRET
0U, // CLS_ZPmZ_UNDEF_B
0U, // CLS_ZPmZ_UNDEF_D
0U, // CLS_ZPmZ_UNDEF_H
0U, // CLS_ZPmZ_UNDEF_S
0U, // CLZ_ZPmZ_UNDEF_B
0U, // CLZ_ZPmZ_UNDEF_D
0U, // CLZ_ZPmZ_UNDEF_H
0U, // CLZ_ZPmZ_UNDEF_S
0U, // CMP_SWAP_128
0U, // CMP_SWAP_128_ACQUIRE
0U, // CMP_SWAP_128_MONOTONIC
0U, // CMP_SWAP_128_RELEASE
0U, // CMP_SWAP_16
0U, // CMP_SWAP_32
0U, // CMP_SWAP_64
0U, // CMP_SWAP_8
0U, // CNOT_ZPmZ_UNDEF_B
0U, // CNOT_ZPmZ_UNDEF_D
0U, // CNOT_ZPmZ_UNDEF_H
0U, // CNOT_ZPmZ_UNDEF_S
0U, // CNT_ZPmZ_UNDEF_B
0U, // CNT_ZPmZ_UNDEF_D
0U, // CNT_ZPmZ_UNDEF_H
0U, // CNT_ZPmZ_UNDEF_S
0U, // EMITBKEY
0U, // EMITMTETAGGED
0U, // EONWrr
0U, // EONXrr
0U, // EORWrr
0U, // EORXrr
0U, // EOR_ZPZZ_ZERO_B
0U, // EOR_ZPZZ_ZERO_D
0U, // EOR_ZPZZ_ZERO_H
0U, // EOR_ZPZZ_ZERO_S
0U, // F128CSEL
0U, // FABD_ZPZZ_UNDEF_D
0U, // FABD_ZPZZ_UNDEF_H
0U, // FABD_ZPZZ_UNDEF_S
0U, // FABD_ZPZZ_ZERO_D
0U, // FABD_ZPZZ_ZERO_H
0U, // FABD_ZPZZ_ZERO_S
0U, // FABS_ZPmZ_UNDEF_D
0U, // FABS_ZPmZ_UNDEF_H
0U, // FABS_ZPmZ_UNDEF_S
0U, // FADD_ZPZI_UNDEF_D
0U, // FADD_ZPZI_UNDEF_H
0U, // FADD_ZPZI_UNDEF_S
0U, // FADD_ZPZI_ZERO_D
0U, // FADD_ZPZI_ZERO_H
0U, // FADD_ZPZI_ZERO_S
0U, // FADD_ZPZZ_UNDEF_D
0U, // FADD_ZPZZ_UNDEF_H
0U, // FADD_ZPZZ_UNDEF_S
0U, // FADD_ZPZZ_ZERO_D
0U, // FADD_ZPZZ_ZERO_H
0U, // FADD_ZPZZ_ZERO_S
0U, // FCVTZS_ZPmZ_DtoD_UNDEF
0U, // FCVTZS_ZPmZ_DtoS_UNDEF
0U, // FCVTZS_ZPmZ_HtoD_UNDEF
0U, // FCVTZS_ZPmZ_HtoH_UNDEF
0U, // FCVTZS_ZPmZ_HtoS_UNDEF
0U, // FCVTZS_ZPmZ_StoD_UNDEF
0U, // FCVTZS_ZPmZ_StoS_UNDEF
0U, // FCVTZU_ZPmZ_DtoD_UNDEF
0U, // FCVTZU_ZPmZ_DtoS_UNDEF
0U, // FCVTZU_ZPmZ_HtoD_UNDEF
0U, // FCVTZU_ZPmZ_HtoH_UNDEF
0U, // FCVTZU_ZPmZ_HtoS_UNDEF
0U, // FCVTZU_ZPmZ_StoD_UNDEF
0U, // FCVTZU_ZPmZ_StoS_UNDEF
0U, // FCVT_ZPmZ_DtoH_UNDEF
0U, // FCVT_ZPmZ_DtoS_UNDEF
0U, // FCVT_ZPmZ_HtoD_UNDEF
0U, // FCVT_ZPmZ_HtoS_UNDEF
0U, // FCVT_ZPmZ_StoD_UNDEF
0U, // FCVT_ZPmZ_StoH_UNDEF
0U, // FDIVR_ZPZZ_ZERO_D
0U, // FDIVR_ZPZZ_ZERO_H
0U, // FDIVR_ZPZZ_ZERO_S
0U, // FDIV_ZPZZ_UNDEF_D
0U, // FDIV_ZPZZ_UNDEF_H
0U, // FDIV_ZPZZ_UNDEF_S
0U, // FDIV_ZPZZ_ZERO_D
0U, // FDIV_ZPZZ_ZERO_H
0U, // FDIV_ZPZZ_ZERO_S
0U, // FDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // FDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // FDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // FDOT_VG4_M4ZZI_HtoS_PSEUDO
0U, // FMAXNM_ZPZI_UNDEF_D
0U, // FMAXNM_ZPZI_UNDEF_H
0U, // FMAXNM_ZPZI_UNDEF_S
0U, // FMAXNM_ZPZI_ZERO_D
0U, // FMAXNM_ZPZI_ZERO_H
0U, // FMAXNM_ZPZI_ZERO_S
0U, // FMAXNM_ZPZZ_UNDEF_D
0U, // FMAXNM_ZPZZ_UNDEF_H
0U, // FMAXNM_ZPZZ_UNDEF_S
0U, // FMAXNM_ZPZZ_ZERO_D
0U, // FMAXNM_ZPZZ_ZERO_H
0U, // FMAXNM_ZPZZ_ZERO_S
0U, // FMAX_ZPZI_UNDEF_D
0U, // FMAX_ZPZI_UNDEF_H
0U, // FMAX_ZPZI_UNDEF_S
0U, // FMAX_ZPZI_ZERO_D
0U, // FMAX_ZPZI_ZERO_H
0U, // FMAX_ZPZI_ZERO_S
0U, // FMAX_ZPZZ_UNDEF_D
0U, // FMAX_ZPZZ_UNDEF_H
0U, // FMAX_ZPZZ_UNDEF_S
0U, // FMAX_ZPZZ_ZERO_D
0U, // FMAX_ZPZZ_ZERO_H
0U, // FMAX_ZPZZ_ZERO_S
0U, // FMINNM_ZPZI_UNDEF_D
0U, // FMINNM_ZPZI_UNDEF_H
0U, // FMINNM_ZPZI_UNDEF_S
0U, // FMINNM_ZPZI_ZERO_D
0U, // FMINNM_ZPZI_ZERO_H
0U, // FMINNM_ZPZI_ZERO_S
0U, // FMINNM_ZPZZ_UNDEF_D
0U, // FMINNM_ZPZZ_UNDEF_H
0U, // FMINNM_ZPZZ_UNDEF_S
0U, // FMINNM_ZPZZ_ZERO_D
0U, // FMINNM_ZPZZ_ZERO_H
0U, // FMINNM_ZPZZ_ZERO_S
0U, // FMIN_ZPZI_UNDEF_D
0U, // FMIN_ZPZI_UNDEF_H
0U, // FMIN_ZPZI_UNDEF_S
0U, // FMIN_ZPZI_ZERO_D
0U, // FMIN_ZPZI_ZERO_H
0U, // FMIN_ZPZI_ZERO_S
0U, // FMIN_ZPZZ_UNDEF_D
0U, // FMIN_ZPZZ_UNDEF_H
0U, // FMIN_ZPZZ_UNDEF_S
0U, // FMIN_ZPZZ_ZERO_D
0U, // FMIN_ZPZZ_ZERO_H
0U, // FMIN_ZPZZ_ZERO_S
0U, // FMLAL_MZZI_S_PSEUDO
0U, // FMLAL_MZZ_S_PSEUDO
0U, // FMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // FMLAL_VG2_M2ZZI_S_PSEUDO
0U, // FMLAL_VG2_M2ZZ_S_PSEUDO
0U, // FMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // FMLAL_VG4_M4ZZI_S_PSEUDO
0U, // FMLAL_VG4_M4ZZ_S_PSEUDO
0U, // FMLA_VG2_M2Z2Z_D_PSEUDO
0U, // FMLA_VG2_M2Z2Z_S_PSEUDO
0U, // FMLA_VG2_M2Z4Z_H_PSEUDO
0U, // FMLA_VG2_M2ZZI_D_PSEUDO
0U, // FMLA_VG2_M2ZZI_S_PSEUDO
0U, // FMLA_VG2_M2ZZ_D_PSEUDO
0U, // FMLA_VG2_M2ZZ_S_PSEUDO
0U, // FMLA_VG4_M4Z4Z_D_PSEUDO
0U, // FMLA_VG4_M4Z4Z_H_PSEUDO
0U, // FMLA_VG4_M4Z4Z_S_PSEUDO
0U, // FMLA_VG4_M4ZZI_D_PSEUDO
0U, // FMLA_VG4_M4ZZI_S_PSEUDO
0U, // FMLA_VG4_M4ZZ_D_PSEUDO
0U, // FMLA_VG4_M4ZZ_S_PSEUDO
0U, // FMLA_ZPZZZ_UNDEF_D
0U, // FMLA_ZPZZZ_UNDEF_H
0U, // FMLA_ZPZZZ_UNDEF_S
0U, // FMLSL_MZZI_S_PSEUDO
0U, // FMLSL_MZZ_S_PSEUDO
0U, // FMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // FMLSL_VG2_M2ZZI_S_PSEUDO
0U, // FMLSL_VG2_M2ZZ_S_PSEUDO
0U, // FMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // FMLSL_VG4_M4ZZI_S_PSEUDO
0U, // FMLSL_VG4_M4ZZ_S_PSEUDO
0U, // FMLS_VG2_M2Z2Z_D_PSEUDO
0U, // FMLS_VG2_M2Z2Z_H_PSEUDO
0U, // FMLS_VG2_M2Z2Z_S_PSEUDO
0U, // FMLS_VG2_M2ZZI_D_PSEUDO
0U, // FMLS_VG2_M2ZZI_S_PSEUDO
0U, // FMLS_VG2_M2ZZ_D_PSEUDO
0U, // FMLS_VG2_M2ZZ_S_PSEUDO
0U, // FMLS_VG4_M4Z2Z_H_PSEUDO
0U, // FMLS_VG4_M4Z4Z_D_PSEUDO
0U, // FMLS_VG4_M4Z4Z_S_PSEUDO
0U, // FMLS_VG4_M4ZZI_D_PSEUDO
0U, // FMLS_VG4_M4ZZI_S_PSEUDO
0U, // FMLS_VG4_M4ZZ_D_PSEUDO
0U, // FMLS_VG4_M4ZZ_S_PSEUDO
0U, // FMLS_ZPZZZ_UNDEF_D
0U, // FMLS_ZPZZZ_UNDEF_H
0U, // FMLS_ZPZZZ_UNDEF_S
0U, // FMOPAL_MPPZZ_PSEUDO
0U, // FMOPA_MPPZZ_D_PSEUDO
0U, // FMOPA_MPPZZ_S_PSEUDO
0U, // FMOPSL_MPPZZ_PSEUDO
0U, // FMOPS_MPPZZ_D_PSEUDO
0U, // FMOPS_MPPZZ_S_PSEUDO
0U, // FMOVD0
0U, // FMOVH0
0U, // FMOVS0
0U, // FMULX_ZPZZ_ZERO_D
0U, // FMULX_ZPZZ_ZERO_H
0U, // FMULX_ZPZZ_ZERO_S
0U, // FMUL_ZPZI_UNDEF_D
0U, // FMUL_ZPZI_UNDEF_H
0U, // FMUL_ZPZI_UNDEF_S
0U, // FMUL_ZPZI_ZERO_D
0U, // FMUL_ZPZI_ZERO_H
0U, // FMUL_ZPZI_ZERO_S
0U, // FMUL_ZPZZ_UNDEF_D
0U, // FMUL_ZPZZ_UNDEF_H
0U, // FMUL_ZPZZ_UNDEF_S
0U, // FMUL_ZPZZ_ZERO_D
0U, // FMUL_ZPZZ_ZERO_H
0U, // FMUL_ZPZZ_ZERO_S
0U, // FNEG_ZPmZ_UNDEF_D
0U, // FNEG_ZPmZ_UNDEF_H
0U, // FNEG_ZPmZ_UNDEF_S
0U, // FNMLA_ZPZZZ_UNDEF_D
0U, // FNMLA_ZPZZZ_UNDEF_H
0U, // FNMLA_ZPZZZ_UNDEF_S
0U, // FNMLS_ZPZZZ_UNDEF_D
0U, // FNMLS_ZPZZZ_UNDEF_H
0U, // FNMLS_ZPZZZ_UNDEF_S
0U, // FRECPX_ZPmZ_UNDEF_D
0U, // FRECPX_ZPmZ_UNDEF_H
0U, // FRECPX_ZPmZ_UNDEF_S
0U, // FRINTA_ZPmZ_UNDEF_D
0U, // FRINTA_ZPmZ_UNDEF_H
0U, // FRINTA_ZPmZ_UNDEF_S
0U, // FRINTI_ZPmZ_UNDEF_D
0U, // FRINTI_ZPmZ_UNDEF_H
0U, // FRINTI_ZPmZ_UNDEF_S
0U, // FRINTM_ZPmZ_UNDEF_D
0U, // FRINTM_ZPmZ_UNDEF_H
0U, // FRINTM_ZPmZ_UNDEF_S
0U, // FRINTN_ZPmZ_UNDEF_D
0U, // FRINTN_ZPmZ_UNDEF_H
0U, // FRINTN_ZPmZ_UNDEF_S
0U, // FRINTP_ZPmZ_UNDEF_D
0U, // FRINTP_ZPmZ_UNDEF_H
0U, // FRINTP_ZPmZ_UNDEF_S
0U, // FRINTX_ZPmZ_UNDEF_D
0U, // FRINTX_ZPmZ_UNDEF_H
0U, // FRINTX_ZPmZ_UNDEF_S
0U, // FRINTZ_ZPmZ_UNDEF_D
0U, // FRINTZ_ZPmZ_UNDEF_H
0U, // FRINTZ_ZPmZ_UNDEF_S
0U, // FSQRT_ZPmZ_UNDEF_D
0U, // FSQRT_ZPmZ_UNDEF_H
0U, // FSQRT_ZPmZ_UNDEF_S
0U, // FSUBR_ZPZI_UNDEF_D
0U, // FSUBR_ZPZI_UNDEF_H
0U, // FSUBR_ZPZI_UNDEF_S
0U, // FSUBR_ZPZI_ZERO_D
0U, // FSUBR_ZPZI_ZERO_H
0U, // FSUBR_ZPZI_ZERO_S
0U, // FSUBR_ZPZZ_ZERO_D
0U, // FSUBR_ZPZZ_ZERO_H
0U, // FSUBR_ZPZZ_ZERO_S
0U, // FSUB_ZPZI_UNDEF_D
0U, // FSUB_ZPZI_UNDEF_H
0U, // FSUB_ZPZI_UNDEF_S
0U, // FSUB_ZPZI_ZERO_D
0U, // FSUB_ZPZI_ZERO_H
0U, // FSUB_ZPZI_ZERO_S
0U, // FSUB_ZPZZ_UNDEF_D
0U, // FSUB_ZPZZ_UNDEF_H
0U, // FSUB_ZPZZ_UNDEF_S
0U, // FSUB_ZPZZ_ZERO_D
0U, // FSUB_ZPZZ_ZERO_H
0U, // FSUB_ZPZZ_ZERO_S
0U, // FVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // GLD1B_D
0U, // GLD1B_D_IMM
0U, // GLD1B_D_SXTW
0U, // GLD1B_D_UXTW
0U, // GLD1B_S_IMM
0U, // GLD1B_S_SXTW
0U, // GLD1B_S_UXTW
0U, // GLD1D
0U, // GLD1D_IMM
0U, // GLD1D_SCALED
0U, // GLD1D_SXTW
0U, // GLD1D_SXTW_SCALED
0U, // GLD1D_UXTW
0U, // GLD1D_UXTW_SCALED
0U, // GLD1H_D
0U, // GLD1H_D_IMM
0U, // GLD1H_D_SCALED
0U, // GLD1H_D_SXTW
0U, // GLD1H_D_SXTW_SCALED
0U, // GLD1H_D_UXTW
0U, // GLD1H_D_UXTW_SCALED
0U, // GLD1H_S_IMM
0U, // GLD1H_S_SXTW
0U, // GLD1H_S_SXTW_SCALED
0U, // GLD1H_S_UXTW
0U, // GLD1H_S_UXTW_SCALED
0U, // GLD1SB_D
0U, // GLD1SB_D_IMM
0U, // GLD1SB_D_SXTW
0U, // GLD1SB_D_UXTW
0U, // GLD1SB_S_IMM
0U, // GLD1SB_S_SXTW
0U, // GLD1SB_S_UXTW
0U, // GLD1SH_D
0U, // GLD1SH_D_IMM
0U, // GLD1SH_D_SCALED
0U, // GLD1SH_D_SXTW
0U, // GLD1SH_D_SXTW_SCALED
0U, // GLD1SH_D_UXTW
0U, // GLD1SH_D_UXTW_SCALED
0U, // GLD1SH_S_IMM
0U, // GLD1SH_S_SXTW
0U, // GLD1SH_S_SXTW_SCALED
0U, // GLD1SH_S_UXTW
0U, // GLD1SH_S_UXTW_SCALED
0U, // GLD1SW_D
0U, // GLD1SW_D_IMM
0U, // GLD1SW_D_SCALED
0U, // GLD1SW_D_SXTW
0U, // GLD1SW_D_SXTW_SCALED
0U, // GLD1SW_D_UXTW
0U, // GLD1SW_D_UXTW_SCALED
0U, // GLD1W_D
0U, // GLD1W_D_IMM
0U, // GLD1W_D_SCALED
0U, // GLD1W_D_SXTW
0U, // GLD1W_D_SXTW_SCALED
0U, // GLD1W_D_UXTW
0U, // GLD1W_D_UXTW_SCALED
0U, // GLD1W_IMM
0U, // GLD1W_SXTW
0U, // GLD1W_SXTW_SCALED
0U, // GLD1W_UXTW
0U, // GLD1W_UXTW_SCALED
0U, // GLDFF1B_D
0U, // GLDFF1B_D_IMM
0U, // GLDFF1B_D_SXTW
0U, // GLDFF1B_D_UXTW
0U, // GLDFF1B_S_IMM
0U, // GLDFF1B_S_SXTW
0U, // GLDFF1B_S_UXTW
0U, // GLDFF1D
0U, // GLDFF1D_IMM
0U, // GLDFF1D_SCALED
0U, // GLDFF1D_SXTW
0U, // GLDFF1D_SXTW_SCALED
0U, // GLDFF1D_UXTW
0U, // GLDFF1D_UXTW_SCALED
0U, // GLDFF1H_D
0U, // GLDFF1H_D_IMM
0U, // GLDFF1H_D_SCALED
0U, // GLDFF1H_D_SXTW
0U, // GLDFF1H_D_SXTW_SCALED
0U, // GLDFF1H_D_UXTW
0U, // GLDFF1H_D_UXTW_SCALED
0U, // GLDFF1H_S_IMM
0U, // GLDFF1H_S_SXTW
0U, // GLDFF1H_S_SXTW_SCALED
0U, // GLDFF1H_S_UXTW
0U, // GLDFF1H_S_UXTW_SCALED
0U, // GLDFF1SB_D
0U, // GLDFF1SB_D_IMM
0U, // GLDFF1SB_D_SXTW
0U, // GLDFF1SB_D_UXTW
0U, // GLDFF1SB_S_IMM
0U, // GLDFF1SB_S_SXTW
0U, // GLDFF1SB_S_UXTW
0U, // GLDFF1SH_D
0U, // GLDFF1SH_D_IMM
0U, // GLDFF1SH_D_SCALED
0U, // GLDFF1SH_D_SXTW
0U, // GLDFF1SH_D_SXTW_SCALED
0U, // GLDFF1SH_D_UXTW
0U, // GLDFF1SH_D_UXTW_SCALED
0U, // GLDFF1SH_S_IMM
0U, // GLDFF1SH_S_SXTW
0U, // GLDFF1SH_S_SXTW_SCALED
0U, // GLDFF1SH_S_UXTW
0U, // GLDFF1SH_S_UXTW_SCALED
0U, // GLDFF1SW_D
0U, // GLDFF1SW_D_IMM
0U, // GLDFF1SW_D_SCALED
0U, // GLDFF1SW_D_SXTW
0U, // GLDFF1SW_D_SXTW_SCALED
0U, // GLDFF1SW_D_UXTW
0U, // GLDFF1SW_D_UXTW_SCALED
0U, // GLDFF1W_D
0U, // GLDFF1W_D_IMM
0U, // GLDFF1W_D_SCALED
0U, // GLDFF1W_D_SXTW
0U, // GLDFF1W_D_SXTW_SCALED
0U, // GLDFF1W_D_UXTW
0U, // GLDFF1W_D_UXTW_SCALED
0U, // GLDFF1W_IMM
0U, // GLDFF1W_SXTW
0U, // GLDFF1W_SXTW_SCALED
0U, // GLDFF1W_UXTW
0U, // GLDFF1W_UXTW_SCALED
0U, // G_ADD_LOW
0U, // G_BIT
0U, // G_DUP
0U, // G_DUPLANE16
0U, // G_DUPLANE32
0U, // G_DUPLANE64
0U, // G_DUPLANE8
0U, // G_EXT
0U, // G_FCMEQ
0U, // G_FCMEQZ
0U, // G_FCMGE
0U, // G_FCMGEZ
0U, // G_FCMGT
0U, // G_FCMGTZ
0U, // G_FCMLEZ
0U, // G_FCMLTZ
0U, // G_PREFETCH
0U, // G_REV16
0U, // G_REV32
0U, // G_REV64
0U, // G_SITOF
0U, // G_TRN1
0U, // G_TRN2
0U, // G_UITOF
0U, // G_UZP1
0U, // G_UZP2
0U, // G_VASHR
0U, // G_VLSHR
0U, // G_ZIP1
0U, // G_ZIP2
0U, // HOM_Epilog
0U, // HOM_Prolog
0U, // HWASAN_CHECK_MEMACCESS
0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES
0U, // INSERT_MXIPZ_H_PSEUDO_B
0U, // INSERT_MXIPZ_H_PSEUDO_D
0U, // INSERT_MXIPZ_H_PSEUDO_H
0U, // INSERT_MXIPZ_H_PSEUDO_Q
0U, // INSERT_MXIPZ_H_PSEUDO_S
0U, // INSERT_MXIPZ_V_PSEUDO_B
0U, // INSERT_MXIPZ_V_PSEUDO_D
0U, // INSERT_MXIPZ_V_PSEUDO_H
0U, // INSERT_MXIPZ_V_PSEUDO_Q
0U, // INSERT_MXIPZ_V_PSEUDO_S
0U, // IRGstack
0U, // JumpTableDest16
0U, // JumpTableDest32
0U, // JumpTableDest8
0U, // KCFI_CHECK
0U, // LD1B_D_IMM
0U, // LD1B_H_IMM
0U, // LD1B_IMM
0U, // LD1B_S_IMM
0U, // LD1D_IMM
0U, // LD1H_D_IMM
0U, // LD1H_IMM
0U, // LD1H_S_IMM
0U, // LD1SB_D_IMM
0U, // LD1SB_H_IMM
0U, // LD1SB_S_IMM
0U, // LD1SH_D_IMM
0U, // LD1SH_S_IMM
0U, // LD1SW_D_IMM
0U, // LD1W_D_IMM
0U, // LD1W_IMM
0U, // LD1_MXIPXX_H_PSEUDO_B
0U, // LD1_MXIPXX_H_PSEUDO_D
0U, // LD1_MXIPXX_H_PSEUDO_H
0U, // LD1_MXIPXX_H_PSEUDO_Q
0U, // LD1_MXIPXX_H_PSEUDO_S
0U, // LD1_MXIPXX_V_PSEUDO_B
0U, // LD1_MXIPXX_V_PSEUDO_D
0U, // LD1_MXIPXX_V_PSEUDO_H
0U, // LD1_MXIPXX_V_PSEUDO_Q
0U, // LD1_MXIPXX_V_PSEUDO_S
0U, // LDFF1B
0U, // LDFF1B_D
0U, // LDFF1B_H
0U, // LDFF1B_S
0U, // LDFF1D
0U, // LDFF1H
0U, // LDFF1H_D
0U, // LDFF1H_S
0U, // LDFF1SB_D
0U, // LDFF1SB_H
0U, // LDFF1SB_S
0U, // LDFF1SH_D
0U, // LDFF1SH_S
0U, // LDFF1SW_D
0U, // LDFF1W
0U, // LDFF1W_D
0U, // LDNF1B_D_IMM
0U, // LDNF1B_H_IMM
0U, // LDNF1B_IMM
0U, // LDNF1B_S_IMM
0U, // LDNF1D_IMM
0U, // LDNF1H_D_IMM
0U, // LDNF1H_IMM
0U, // LDNF1H_S_IMM
0U, // LDNF1SB_D_IMM
0U, // LDNF1SB_H_IMM
0U, // LDNF1SB_S_IMM
0U, // LDNF1SH_D_IMM
0U, // LDNF1SH_S_IMM
0U, // LDNF1SW_D_IMM
0U, // LDNF1W_D_IMM
0U, // LDNF1W_IMM
0U, // LDR_ZA_PSEUDO
0U, // LDR_ZZXI
0U, // LDR_ZZZXI
0U, // LDR_ZZZZXI
0U, // LOADgot
0U, // LSL_ZPZI_UNDEF_B
0U, // LSL_ZPZI_UNDEF_D
0U, // LSL_ZPZI_UNDEF_H
0U, // LSL_ZPZI_UNDEF_S
0U, // LSL_ZPZZ_UNDEF_B
0U, // LSL_ZPZZ_UNDEF_D
0U, // LSL_ZPZZ_UNDEF_H
0U, // LSL_ZPZZ_UNDEF_S
0U, // LSL_ZPZZ_ZERO_B
0U, // LSL_ZPZZ_ZERO_D
0U, // LSL_ZPZZ_ZERO_H
0U, // LSL_ZPZZ_ZERO_S
0U, // LSR_ZPZI_UNDEF_B
0U, // LSR_ZPZI_UNDEF_D
0U, // LSR_ZPZI_UNDEF_H
0U, // LSR_ZPZI_UNDEF_S
0U, // LSR_ZPZZ_UNDEF_B
0U, // LSR_ZPZZ_UNDEF_D
0U, // LSR_ZPZZ_UNDEF_H
0U, // LSR_ZPZZ_UNDEF_S
0U, // LSR_ZPZZ_ZERO_B
0U, // LSR_ZPZZ_ZERO_D
0U, // LSR_ZPZZ_ZERO_H
0U, // LSR_ZPZZ_ZERO_S
0U, // MOPSMemoryCopyPseudo
0U, // MOPSMemoryMovePseudo
0U, // MOPSMemorySetPseudo
0U, // MOPSMemorySetTaggingPseudo
0U, // MOVMCSym
0U, // MOVaddr
0U, // MOVaddrBA
0U, // MOVaddrCP
0U, // MOVaddrEXT
0U, // MOVaddrJT
0U, // MOVaddrTLS
0U, // MOVbaseTLS
0U, // MOVi32imm
0U, // MOVi64imm
0U, // MRS_FPCR
0U, // MSR_FPCR
0U, // MSRpstatePseudo
0U, // MUL_ZPZZ_UNDEF_B
0U, // MUL_ZPZZ_UNDEF_D
0U, // MUL_ZPZZ_UNDEF_H
0U, // MUL_ZPZZ_UNDEF_S
0U, // NEG_ZPmZ_UNDEF_B
0U, // NEG_ZPmZ_UNDEF_D
0U, // NEG_ZPmZ_UNDEF_H
0U, // NEG_ZPmZ_UNDEF_S
0U, // NOT_ZPmZ_UNDEF_B
0U, // NOT_ZPmZ_UNDEF_D
0U, // NOT_ZPmZ_UNDEF_H
0U, // NOT_ZPmZ_UNDEF_S
0U, // OBSCURE_COPY
0U, // ORNWrr
0U, // ORNXrr
0U, // ORRWrr
0U, // ORRXrr
0U, // ORR_ZPZZ_ZERO_B
0U, // ORR_ZPZZ_ZERO_D
0U, // ORR_ZPZZ_ZERO_H
0U, // ORR_ZPZZ_ZERO_S
0U, // PTEST_PP_ANY
0U, // RDFFR_P
0U, // RDFFR_PPz
0U, // RET_ReallyLR
0U, // RestoreZAPseudo
0U, // SABD_ZPZZ_UNDEF_B
0U, // SABD_ZPZZ_UNDEF_D
0U, // SABD_ZPZZ_UNDEF_H
0U, // SABD_ZPZZ_UNDEF_S
0U, // SCVTF_ZPmZ_DtoD_UNDEF
0U, // SCVTF_ZPmZ_DtoH_UNDEF
0U, // SCVTF_ZPmZ_DtoS_UNDEF
0U, // SCVTF_ZPmZ_HtoH_UNDEF
0U, // SCVTF_ZPmZ_StoD_UNDEF
0U, // SCVTF_ZPmZ_StoH_UNDEF
0U, // SCVTF_ZPmZ_StoS_UNDEF
0U, // SDIV_ZPZZ_UNDEF_D
0U, // SDIV_ZPZZ_UNDEF_S
0U, // SDOT_VG2_M2Z2Z_BtoS_PSEUDO
0U, // SDOT_VG2_M2Z2Z_HtoD_PSEUDO
0U, // SDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // SDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // SDOT_VG2_M2ZZI_HToS_PSEUDO
0U, // SDOT_VG2_M2ZZI_HtoD_PSEUDO
0U, // SDOT_VG4_M4Z4Z_BtoS_PSEUDO
0U, // SDOT_VG4_M4Z4Z_HtoD_PSEUDO
0U, // SDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // SDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // SDOT_VG4_M4ZZI_HToS_PSEUDO
0U, // SDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // SEH_AddFP
0U, // SEH_EpilogEnd
0U, // SEH_EpilogStart
0U, // SEH_Nop
0U, // SEH_PACSignLR
0U, // SEH_PrologEnd
0U, // SEH_SaveFPLR
0U, // SEH_SaveFPLR_X
0U, // SEH_SaveFReg
0U, // SEH_SaveFRegP
0U, // SEH_SaveFRegP_X
0U, // SEH_SaveFReg_X
0U, // SEH_SaveReg
0U, // SEH_SaveRegP
0U, // SEH_SaveRegP_X
0U, // SEH_SaveReg_X
0U, // SEH_SetFP
0U, // SEH_StackAlloc
0U, // SMAX_ZPZZ_UNDEF_B
0U, // SMAX_ZPZZ_UNDEF_D
0U, // SMAX_ZPZZ_UNDEF_H
0U, // SMAX_ZPZZ_UNDEF_S
0U, // SMIN_ZPZZ_UNDEF_B
0U, // SMIN_ZPZZ_UNDEF_D
0U, // SMIN_ZPZZ_UNDEF_H
0U, // SMIN_ZPZZ_UNDEF_S
0U, // SMLAL_MZZI_S_PSEUDO
0U, // SMLAL_MZZ_S_PSEUDO
0U, // SMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // SMLAL_VG2_M2ZZI_S_PSEUDO
0U, // SMLAL_VG2_M2ZZ_S_PSEUDO
0U, // SMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // SMLAL_VG4_M4ZZI_S_PSEUDO
0U, // SMLAL_VG4_M4ZZ_S_PSEUDO
0U, // SMLSL_MZZI_S_PSEUDO
0U, // SMLSL_MZZ_S_PSEUDO
0U, // SMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // SMLSL_VG2_M2ZZI_S_PSEUDO
0U, // SMLSL_VG2_M2ZZ_S_PSEUDO
0U, // SMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // SMLSL_VG4_M4ZZI_S_PSEUDO
0U, // SMLSL_VG4_M4ZZ_S_PSEUDO
0U, // SMOPA_MPPZZ_D_PSEUDO
0U, // SMOPA_MPPZZ_S_PSEUDO
0U, // SMOPS_MPPZZ_D_PSEUDO
0U, // SMOPS_MPPZZ_S_PSEUDO
0U, // SMULH_ZPZZ_UNDEF_B
0U, // SMULH_ZPZZ_UNDEF_D
0U, // SMULH_ZPZZ_UNDEF_H
0U, // SMULH_ZPZZ_UNDEF_S
0U, // SPACE
0U, // SQABS_ZPmZ_UNDEF_B
0U, // SQABS_ZPmZ_UNDEF_D
0U, // SQABS_ZPmZ_UNDEF_H
0U, // SQABS_ZPmZ_UNDEF_S
0U, // SQNEG_ZPmZ_UNDEF_B
0U, // SQNEG_ZPmZ_UNDEF_D
0U, // SQNEG_ZPmZ_UNDEF_H
0U, // SQNEG_ZPmZ_UNDEF_S
0U, // SQRSHL_ZPZZ_UNDEF_B
0U, // SQRSHL_ZPZZ_UNDEF_D
0U, // SQRSHL_ZPZZ_UNDEF_H
0U, // SQRSHL_ZPZZ_UNDEF_S
0U, // SQSHLU_ZPZI_ZERO_B
0U, // SQSHLU_ZPZI_ZERO_D
0U, // SQSHLU_ZPZI_ZERO_H
0U, // SQSHLU_ZPZI_ZERO_S
0U, // SQSHL_ZPZI_ZERO_B
0U, // SQSHL_ZPZI_ZERO_D
0U, // SQSHL_ZPZI_ZERO_H
0U, // SQSHL_ZPZI_ZERO_S
0U, // SQSHL_ZPZZ_UNDEF_B
0U, // SQSHL_ZPZZ_UNDEF_D
0U, // SQSHL_ZPZZ_UNDEF_H
0U, // SQSHL_ZPZZ_UNDEF_S
0U, // SRSHL_ZPZZ_UNDEF_B
0U, // SRSHL_ZPZZ_UNDEF_D
0U, // SRSHL_ZPZZ_UNDEF_H
0U, // SRSHL_ZPZZ_UNDEF_S
0U, // SRSHR_ZPZI_ZERO_B
0U, // SRSHR_ZPZI_ZERO_D
0U, // SRSHR_ZPZI_ZERO_H
0U, // SRSHR_ZPZI_ZERO_S
0U, // STGloop
0U, // STGloop_wback
0U, // STR_ZZXI
0U, // STR_ZZZXI
0U, // STR_ZZZZXI
0U, // STZGloop
0U, // STZGloop_wback
0U, // SUBR_ZPZZ_ZERO_B
0U, // SUBR_ZPZZ_ZERO_D
0U, // SUBR_ZPZZ_ZERO_H
0U, // SUBR_ZPZZ_ZERO_S
0U, // SUBSWrr
0U, // SUBSXrr
0U, // SUBWrr
0U, // SUBXrr
0U, // SUB_VG2_M2Z2Z_D_PSEUDO
0U, // SUB_VG2_M2Z2Z_S_PSEUDO
0U, // SUB_VG2_M2ZZ_D_PSEUDO
0U, // SUB_VG2_M2ZZ_S_PSEUDO
0U, // SUB_VG4_M4Z4Z_D_PSEUDO
0U, // SUB_VG4_M4Z4Z_S_PSEUDO
0U, // SUB_VG4_M4ZZ_D_PSEUDO
0U, // SUB_VG4_M4ZZ_S_PSEUDO
0U, // SUB_ZPZZ_ZERO_B
0U, // SUB_ZPZZ_ZERO_D
0U, // SUB_ZPZZ_ZERO_H
0U, // SUB_ZPZZ_ZERO_S
0U, // SUDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // SUDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // SUMOPA_MPPZZ_D_PSEUDO
0U, // SUMOPA_MPPZZ_S_PSEUDO
0U, // SUMOPS_MPPZZ_D_PSEUDO
0U, // SUMOPS_MPPZZ_S_PSEUDO
0U, // SUVDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // SVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // SVDOT_VG4_M4ZZI_BtoS_PSEUDO
0U, // SVDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // SXTB_ZPmZ_UNDEF_D
0U, // SXTB_ZPmZ_UNDEF_H
0U, // SXTB_ZPmZ_UNDEF_S
0U, // SXTH_ZPmZ_UNDEF_D
0U, // SXTH_ZPmZ_UNDEF_S
0U, // SXTW_ZPmZ_UNDEF_D
0U, // SpeculationBarrierISBDSBEndBB
0U, // SpeculationBarrierSBEndBB
0U, // SpeculationSafeValueW
0U, // SpeculationSafeValueX
0U, // StoreSwiftAsyncContext
0U, // TAGPstack
0U, // TCRETURNdi
0U, // TCRETURNri
0U, // TCRETURNriALL
0U, // TCRETURNriBTI
24559U, // TLSDESCCALL
0U, // TLSDESC_CALLSEQ
0U, // UABD_ZPZZ_UNDEF_B
0U, // UABD_ZPZZ_UNDEF_D
0U, // UABD_ZPZZ_UNDEF_H
0U, // UABD_ZPZZ_UNDEF_S
0U, // UCVTF_ZPmZ_DtoD_UNDEF
0U, // UCVTF_ZPmZ_DtoH_UNDEF
0U, // UCVTF_ZPmZ_DtoS_UNDEF
0U, // UCVTF_ZPmZ_HtoH_UNDEF
0U, // UCVTF_ZPmZ_StoD_UNDEF
0U, // UCVTF_ZPmZ_StoH_UNDEF
0U, // UCVTF_ZPmZ_StoS_UNDEF
0U, // UDIV_ZPZZ_UNDEF_D
0U, // UDIV_ZPZZ_UNDEF_S
0U, // UDOT_VG2_M2Z2Z_BtoS_PSEUDO
0U, // UDOT_VG2_M2Z2Z_HtoD_PSEUDO
0U, // UDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // UDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // UDOT_VG2_M2ZZI_HToS_PSEUDO
0U, // UDOT_VG2_M2ZZI_HtoD_PSEUDO
0U, // UDOT_VG4_M4Z4Z_BtoS_PSEUDO
0U, // UDOT_VG4_M4Z4Z_HtoD_PSEUDO
0U, // UDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // UDOT_VG4_M4ZZI_BtoS_PSEUDO
0U, // UDOT_VG4_M4ZZI_HToS_PSEUDO
0U, // UDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // UMAX_ZPZZ_UNDEF_B
0U, // UMAX_ZPZZ_UNDEF_D
0U, // UMAX_ZPZZ_UNDEF_H
0U, // UMAX_ZPZZ_UNDEF_S
0U, // UMIN_ZPZZ_UNDEF_B
0U, // UMIN_ZPZZ_UNDEF_D
0U, // UMIN_ZPZZ_UNDEF_H
0U, // UMIN_ZPZZ_UNDEF_S
0U, // UMLAL_MZZI_S_PSEUDO
0U, // UMLAL_MZZ_S_PSEUDO
0U, // UMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // UMLAL_VG2_M2ZZI_S_PSEUDO
0U, // UMLAL_VG2_M2ZZ_S_PSEUDO
0U, // UMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // UMLAL_VG4_M4ZZI_S_PSEUDO
0U, // UMLAL_VG4_M4ZZ_S_PSEUDO
0U, // UMLSL_MZZI_S_PSEUDO
0U, // UMLSL_MZZ_S_PSEUDO
0U, // UMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // UMLSL_VG2_M2ZZI_S_PSEUDO
0U, // UMLSL_VG2_M2ZZ_S_PSEUDO
0U, // UMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // UMLSL_VG4_M4ZZI_S_PSEUDO
0U, // UMLSL_VG4_M4ZZ_S_PSEUDO
0U, // UMOPA_MPPZZ_D_PSEUDO
0U, // UMOPA_MPPZZ_S_PSEUDO
0U, // UMOPS_MPPZZ_D_PSEUDO
0U, // UMOPS_MPPZZ_S_PSEUDO
0U, // UMULH_ZPZZ_UNDEF_B
0U, // UMULH_ZPZZ_UNDEF_D
0U, // UMULH_ZPZZ_UNDEF_H
0U, // UMULH_ZPZZ_UNDEF_S
0U, // UQRSHL_ZPZZ_UNDEF_B
0U, // UQRSHL_ZPZZ_UNDEF_D
0U, // UQRSHL_ZPZZ_UNDEF_H
0U, // UQRSHL_ZPZZ_UNDEF_S
0U, // UQSHL_ZPZI_ZERO_B
0U, // UQSHL_ZPZI_ZERO_D
0U, // UQSHL_ZPZI_ZERO_H
0U, // UQSHL_ZPZI_ZERO_S
0U, // UQSHL_ZPZZ_UNDEF_B
0U, // UQSHL_ZPZZ_UNDEF_D
0U, // UQSHL_ZPZZ_UNDEF_H
0U, // UQSHL_ZPZZ_UNDEF_S
0U, // URECPE_ZPmZ_UNDEF_S
0U, // URSHL_ZPZZ_UNDEF_B
0U, // URSHL_ZPZZ_UNDEF_D
0U, // URSHL_ZPZZ_UNDEF_H
0U, // URSHL_ZPZZ_UNDEF_S
0U, // URSHR_ZPZI_ZERO_B
0U, // URSHR_ZPZI_ZERO_D
0U, // URSHR_ZPZI_ZERO_H
0U, // URSHR_ZPZI_ZERO_S
0U, // URSQRTE_ZPmZ_UNDEF_S
0U, // USDOT_VG2_M2Z2Z_BToS_PSEUDO
0U, // USDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // USDOT_VG4_M4Z4Z_BToS_PSEUDO
0U, // USDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // USMOPA_MPPZZ_D_PSEUDO
0U, // USMOPA_MPPZZ_S_PSEUDO
0U, // USMOPS_MPPZZ_D_PSEUDO
0U, // USMOPS_MPPZZ_S_PSEUDO
0U, // USVDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // UVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // UVDOT_VG4_M4ZZI_BtoS_PSEUDO
0U, // UVDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // UXTB_ZPmZ_UNDEF_D
0U, // UXTB_ZPmZ_UNDEF_H
0U, // UXTB_ZPmZ_UNDEF_S
0U, // UXTH_ZPmZ_UNDEF_D
0U, // UXTH_ZPmZ_UNDEF_S
0U, // UXTW_ZPmZ_UNDEF_D
0U, // ZERO_M_PSEUDO
2119869U, // ABSWr
2119869U, // ABSXr
270571709U, // ABS_ZPmZ_B
270588093U, // ABS_ZPmZ_D
541137085U, // ABS_ZPmZ_H
270620861U, // ABS_ZPmZ_S
811702461U, // ABSv16i8
2119869U, // ABSv1i64
813799613U, // ABSv2i32
815896765U, // ABSv2i64
817993917U, // ABSv4i16
820091069U, // ABSv4i32
822188221U, // ABSv8i16
824285373U, // ABSv8i8
1075889819U, // ADCLB_ZZZ_D
1344358043U, // ADCLB_ZZZ_S
1075894960U, // ADCLT_ZZZ_D
1344363184U, // ADCLT_ZZZ_S
2119908U, // ADCSWr
2119908U, // ADCSXr
2116052U, // ADCWr
2116052U, // ADCXr
2116617U, // ADDG
1631699694U, // ADDHA_MPPZ_D
1633796846U, // ADDHA_MPPZ_S
1881180032U, // ADDHNB_ZZZ_B
2172716928U, // ADDHNB_ZZZ_H
2418100096U, // ADDHNB_ZZZ_S
2686491491U, // ADDHNT_ZZZ_B
2174819171U, // ADDHNT_ZZZ_H
1075927907U, // ADDHNT_ZZZ_S
813798406U, // ADDHNv2i64_v2i32
2967601550U, // ADDHNv2i64_v4i32
817992710U, // ADDHNv4i32_v4i16
2969698702U, // ADDHNv4i32_v8i16
2959212942U, // ADDHNv8i16_v16i8
824284166U, // ADDHNv8i16_v8i8
2118214U, // ADDPL_XXI
3223360802U, // ADDP_ZPmZ_B
3223377186U, // ADDP_ZPmZ_D
3519092002U, // ADDP_ZPmZ_H
3223409954U, // ADDP_ZPmZ_S
811701538U, // ADDPv16i8
813798690U, // ADDPv2i32
815895842U, // ADDPv2i64
807425314U, // ADDPv2i64p
817992994U, // ADDPv4i16
820090146U, // ADDPv4i32
822187298U, // ADDPv8i16
824284450U, // ADDPv8i8
3227622748U, // ADDQV_VPZ_B
3231817052U, // ADDQV_VPZ_D
3238108508U, // ADDQV_VPZ_H
3236011356U, // ADDQV_VPZ_S
2118293U, // ADDSPL_XXI
2118522U, // ADDSVL_XXI
2119920U, // ADDSWri
2119920U, // ADDSWrs
2119920U, // ADDSWrx
2119920U, // ADDSXri
2119920U, // ADDSXrs
2119920U, // ADDSXrx
2119920U, // ADDSXrx64
1631700072U, // ADDVA_MPPZ_D
1633797224U, // ADDVA_MPPZ_S
2118509U, // ADDVL_XXI
807427284U, // ADDVv16i8v
807427284U, // ADDVv4i16v
807427284U, // ADDVv4i32v
807427284U, // ADDVv8i16v
807427284U, // ADDVv8i8v
2116253U, // ADDWri
2116253U, // ADDWrs
2116253U, // ADDWrx
2116253U, // ADDXri
2116253U, // ADDXrs
2116253U, // ADDXrx
2116253U, // ADDXrx64
2179091101U, // ADD_VG2_2ZZ_B
2181204637U, // ADD_VG2_2ZZ_D
2183318173U, // ADD_VG2_2ZZ_H
2185431709U, // ADD_VG2_2ZZ_S
3798157981U, // ADD_VG2_M2Z2Z_D
3798174365U, // ADD_VG2_M2Z2Z_S
3798157981U, // ADD_VG2_M2ZZ_D
3798174365U, // ADD_VG2_M2ZZ_S
3798157981U, // ADD_VG2_M2Z_D
3798174365U, // ADD_VG2_M2Z_S
2179091101U, // ADD_VG4_4ZZ_B
2181204637U, // ADD_VG4_4ZZ_D
2183318173U, // ADD_VG4_4ZZ_H
2185431709U, // ADD_VG4_4ZZ_S
4066593437U, // ADD_VG4_M4Z4Z_D
4066609821U, // ADD_VG4_M4Z4Z_S
4066593437U, // ADD_VG4_M4ZZ_D
4066609821U, // ADD_VG4_M4ZZ_S
4066593437U, // ADD_VG4_M4Z_D
4066609821U, // ADD_VG4_M4Z_S
2132637U, // ADD_ZI_B
2418068125U, // ADD_ZI_D
2189494941U, // ADD_ZI_H
270617245U, // ADD_ZI_S
3223358109U, // ADD_ZPmZ_B
3223374493U, // ADD_ZPmZ_D
3519089309U, // ADD_ZPmZ_H
3223407261U, // ADD_ZPmZ_S
2132637U, // ADD_ZZZ_B
2418068125U, // ADD_ZZZ_D
2189494941U, // ADD_ZZZ_H
270617245U, // ADD_ZZZ_S
811698845U, // ADDv16i8
2116253U, // ADDv1i64
813795997U, // ADDv2i32
815893149U, // ADDv2i64
817990301U, // ADDv4i16
820087453U, // ADDv4i32
822184605U, // ADDv8i16
824281757U, // ADDv8i8
2119490U, // ADR
538990041U, // ADRP
2460014402U, // ADR_LSL_ZZZ_D_0
2460014402U, // ADR_LSL_ZZZ_D_1
2460014402U, // ADR_LSL_ZZZ_D_2
2460014402U, // ADR_LSL_ZZZ_D_3
312563522U, // ADR_LSL_ZZZ_S_0
312563522U, // ADR_LSL_ZZZ_S_1
312563522U, // ADR_LSL_ZZZ_S_2
312563522U, // ADR_LSL_ZZZ_S_3
2460014402U, // ADR_SXTW_ZZZ_D_0
2460014402U, // ADR_SXTW_ZZZ_D_1
2460014402U, // ADR_SXTW_ZZZ_D_2
2460014402U, // ADR_SXTW_ZZZ_D_3
2460014402U, // ADR_UXTW_ZZZ_D_0
2460014402U, // ADR_UXTW_ZZZ_D_1
2460014402U, // ADR_UXTW_ZZZ_D_2
2460014402U, // ADR_UXTW_ZZZ_D_3
2132766U, // AESD_ZZZ_B
2959215390U, // AESDrr
2132913U, // AESE_ZZZ_B
2959215537U, // AESErr
2132446U, // AESIMC_ZZ_B
811698654U, // AESIMCrr
2132454U, // AESMC_ZZ_B
811698662U, // AESMCrr
3227622755U, // ANDQV_VPZ_B
3231817059U, // ANDQV_VPZ_D
3238108515U, // ANDQV_VPZ_H
3236011363U, // ANDQV_VPZ_S
2119927U, // ANDSWri
2119927U, // ANDSWrs
2119927U, // ANDSXri
2119927U, // ANDSXrs
3223361783U, // ANDS_PPzPP
253160U, // ANDV_VPZ_B
1657019624U, // ANDV_VPZ_D
1659133160U, // ANDV_VPZ_H
1638178024U, // ANDV_VPZ_S
2116348U, // ANDWri
2116348U, // ANDWrs
2116348U, // ANDXri
2116348U, // ANDXrs
3223358204U, // AND_PPzPP
2418068220U, // AND_ZI
3223358204U, // AND_ZPmZ_B
3223374588U, // AND_ZPmZ_D
3519089404U, // AND_ZPmZ_H
3223407356U, // AND_ZPmZ_S
2418068220U, // AND_ZZZ
811698940U, // ANDv16i8
824281852U, // ANDv8i8
3223358232U, // ASRD_ZPmI_B
3223374616U, // ASRD_ZPmI_D
3519089432U, // ASRD_ZPmI_H
3223407384U, // ASRD_ZPmI_S
3223361539U, // ASRR_ZPmZ_B
3223377923U, // ASRR_ZPmZ_D
3519092739U, // ASRR_ZPmZ_H
3223410691U, // ASRR_ZPmZ_S
2119701U, // ASRVWr
2119701U, // ASRVXr
3223361557U, // ASR_WIDE_ZPmZ_B
3519092757U, // ASR_WIDE_ZPmZ_H
3223410709U, // ASR_WIDE_ZPmZ_S
2136085U, // ASR_WIDE_ZZZ_B
2189498389U, // ASR_WIDE_ZZZ_H
270620693U, // ASR_WIDE_ZZZ_S
3223361557U, // ASR_ZPmI_B
3223377941U, // ASR_ZPmI_D
3519092757U, // ASR_ZPmI_H
3223410709U, // ASR_ZPmI_S
3223361557U, // ASR_ZPmZ_B
3223377941U, // ASR_ZPmZ_D
3519092757U, // ASR_ZPmZ_H
3223410709U, // ASR_ZPmZ_S
2136085U, // ASR_ZZI_B
2418071573U, // ASR_ZZI_D
2189498389U, // ASR_ZZI_H
270620693U, // ASR_ZZI_S
807715552U, // AUTDA
807716293U, // AUTDB
312463U, // AUTDZA
313776U, // AUTDZB
807715580U, // AUTIA
8379U, // AUTIA1716
8458U, // AUTIASP
8449U, // AUTIAZ
807716320U, // AUTIB
8388U, // AUTIB1716
8370U, // AUTIBSP
8361U, // AUTIBZ
312479U, // AUTIZA
313792U, // AUTIZB
9760U, // AXFLAG
328874U, // B
811704089U, // BCAX
2418073369U, // BCAX_ZZZZ
352295U, // BCcc
2135341U, // BDEP_ZZZ_B
2418070829U, // BDEP_ZZZ_D
2189497645U, // BDEP_ZZZ_H
270619949U, // BDEP_ZZZ_S
2137207U, // BEXT_ZZZ_B
2418072695U, // BEXT_ZZZ_D
2189499511U, // BEXT_ZZZ_H
270621815U, // BEXT_ZZZ_S
2961316829U, // BF16DOTlanev4bf16
2967608285U, // BF16DOTlanev8bf16
1661307569U, // BFADD_VG2_M2Z_H
1663404721U, // BFADD_VG4_M4Z_H
3519089329U, // BFADD_ZPZmZ
2189494961U, // BFADD_ZZZ
2195903845U, // BFCLAMP_VG2_2ZZZ_H
2195903845U, // BFCLAMP_VG4_4ZZZ_H
2195789157U, // BFCLAMP_ZZZ
2120764U, // BFCVT
817992804U, // BFCVTN
2969698754U, // BFCVTN2
1078008727U, // BFCVTNT_ZPmZ
1648432228U, // BFCVTN_Z2Z_StoH
1648434236U, // BFCVT_Z2Z_StoH
1078008892U, // BFCVT_ZPmZ
3798178781U, // BFDOT_VG2_M2Z2Z_HtoS
3798178781U, // BFDOT_VG2_M2ZZI_HtoS
3798178781U, // BFDOT_VG2_M2ZZ_HtoS
4066614237U, // BFDOT_VG4_M4Z4Z_HtoS
4066614237U, // BFDOT_VG4_M4ZZI_HtoS
4066614237U, // BFDOT_VG4_M4ZZ_HtoS
2686540765U, // BFDOT_ZZI
2686540765U, // BFDOT_ZZZ
2961316829U, // BFDOTv4bf16
2967608285U, // BFDOTv8bf16
2183320529U, // BFMAXNM_VG2_2Z2Z_H
2183320529U, // BFMAXNM_VG2_2ZZ_H
2183320529U, // BFMAXNM_VG4_4Z2Z_H
2183320529U, // BFMAXNM_VG4_4ZZ_H
3519091665U, // BFMAXNM_ZPZmZ
2183323423U, // BFMAX_VG2_2Z2Z_H
2183323423U, // BFMAX_VG2_2ZZ_H
2183323423U, // BFMAX_VG4_4Z2Z_H
2183323423U, // BFMAX_VG4_4ZZ_H
3519094559U, // BFMAX_ZPZmZ
2183320520U, // BFMINNM_VG2_2Z2Z_H
2183320520U, // BFMINNM_VG2_2ZZ_H
2183320520U, // BFMINNM_VG4_4Z2Z_H
2183320520U, // BFMINNM_VG4_4ZZ_H
3519091656U, // BFMINNM_ZPZmZ
2183320589U, // BFMIN_VG2_2Z2Z_H
2183320589U, // BFMIN_VG2_2ZZ_H
2183320589U, // BFMIN_VG4_4Z2Z_H
2183320589U, // BFMIN_VG4_4ZZ_H
3519091725U, // BFMIN_ZPZmZ
2967602705U, // BFMLALB
2967602705U, // BFMLALBIdx
2686535185U, // BFMLALB_ZZZ
2686535185U, // BFMLALB_ZZZI
2967607936U, // BFMLALT
2967607936U, // BFMLALTIdx
2686540416U, // BFMLALT_ZZZ
2686540416U, // BFMLALT_ZZZI
1396936732U, // BFMLAL_MZZI_S
1396936732U, // BFMLAL_MZZ_S
3812855836U, // BFMLAL_VG2_M2Z2Z_S
3812855836U, // BFMLAL_VG2_M2ZZI_S
3812855836U, // BFMLAL_VG2_M2ZZ_S
4081291292U, // BFMLAL_VG4_M4Z4Z_S
4081291292U, // BFMLAL_VG4_M4ZZI_S
4081291292U, // BFMLAL_VG4_M4ZZ_S
2198176528U, // BFMLA_VG2_M2Z2Z
2198176528U, // BFMLA_VG2_M2ZZ
2198176528U, // BFMLA_VG2_M2ZZI
2200273680U, // BFMLA_VG4_M4Z4Z
2200273680U, // BFMLA_VG4_M4ZZ
2200273680U, // BFMLA_VG4_M4ZZI
3519087376U, // BFMLA_ZPmZZ
2195784464U, // BFMLA_ZZZI
2686535483U, // BFMLSLB_ZZZI_S
2686535483U, // BFMLSLB_ZZZ_S
2686540591U, // BFMLSLT_ZZZI_S
2686540591U, // BFMLSLT_ZZZ_S
1396937491U, // BFMLSL_MZZI_S
1396937491U, // BFMLSL_MZZ_S
3812856595U, // BFMLSL_VG2_M2Z2Z_S
3812856595U, // BFMLSL_VG2_M2ZZI_S
3812856595U, // BFMLSL_VG2_M2ZZ_S
4081292051U, // BFMLSL_VG4_M4Z4Z_S
4081292051U, // BFMLSL_VG4_M4ZZI_S
4081292051U, // BFMLSL_VG4_M4ZZ_S
2198182185U, // BFMLS_VG2_M2Z2Z
2198182185U, // BFMLS_VG2_M2ZZ
2198182185U, // BFMLS_VG2_M2ZZI
2200279337U, // BFMLS_VG4_M4Z4Z
2200279337U, // BFMLS_VG4_M4ZZ
2200279337U, // BFMLS_VG4_M4ZZI
3519093033U, // BFMLS_ZPmZZ
2195790121U, // BFMLS_ZZZI
2967601943U, // BFMMLA
2686534423U, // BFMMLA_ZZZ
56738645U, // BFMOPA_MPPZZ
56738645U, // BFMOPA_MPPZZ_H
56744310U, // BFMOPS_MPPZZ
56744310U, // BFMOPS_MPPZZ_H
3519091537U, // BFMUL_ZPZmZ
2189497169U, // BFMUL_ZZZ
2189497169U, // BFMUL_ZZZI
807424931U, // BFMWri
807424931U, // BFMXri
1661307198U, // BFSUB_VG2_M2Z_H
1663404350U, // BFSUB_VG4_M4Z_H
3519088958U, // BFSUB_ZPZmZ
2189494590U, // BFSUB_ZZZ
3798178802U, // BFVDOT_VG2_M2ZZI_HtoS
2135519U, // BGRP_ZZZ_B
2418071007U, // BGRP_ZZZ_D
2189497823U, // BGRP_ZZZ_H
270620127U, // BGRP_ZZZ_S
2119914U, // BICSWrs
2119914U, // BICSXrs
3223361770U, // BICS_PPzPP
2116057U, // BICWrs
2116057U, // BICXrs
3223357913U, // BIC_PPzPP
3223357913U, // BIC_ZPmZ_B
3223374297U, // BIC_ZPmZ_D
3519089113U, // BIC_ZPmZ_H
3223407065U, // BIC_ZPmZ_S
2418067929U, // BIC_ZZZ
811698649U, // BICv16i8
1619134937U, // BICv2i32
1623329241U, // BICv4i16
1625426393U, // BICv4i32
1627523545U, // BICv8i16
824281561U, // BICv8i8
2959215581U, // BIFv16i8
2971798493U, // BIFv8i8
2959219284U, // BITv16i8
2971802196U, // BITv8i8
332090U, // BL
22404U, // BLR
2114231U, // BLRAA
24483U, // BLRAAZ
2114896U, // BLRAB
24505U, // BLRABZ
2170667854U, // BMOPA_MPPZZ_S
2170673519U, // BMOPS_MPPZZ_S
22302U, // BR
2114218U, // BRAA
24476U, // BRAAZ
2114883U, // BRAB
24498U, // BRABZ
9789U, // BRB_IALL
9767U, // BRB_INJ
380913U, // BRK
3223361701U, // BRKAS_PPzP
270566147U, // BRKA_PPmP
3223356163U, // BRKA_PPzP
3223361737U, // BRKBS_PPzP
270566887U, // BRKB_PPmP
3223356903U, // BRKB_PPzP
3223361867U, // BRKNS_PPzP
3223360548U, // BRKN_PPzP
3223361708U, // BRKPAS_PPzPP
3223356231U, // BRKPA_PPzPP
3223361744U, // BRKPBS_PPzPP
3223357430U, // BRKPB_PPzPP
2418070511U, // BSL1N_ZZZZ
2418070518U, // BSL2N_ZZZZ
2418070277U, // BSL_ZZZZ
2959217413U, // BSLv16i8
2971800325U, // BSLv8i8
352292U, // Bcc
2132636U, // CADD_ZZI_B
2418068124U, // CADD_ZZI_D
2189494940U, // CADD_ZZI_H
270617244U, // CADD_ZZI_S
807716201U, // CASAB
807718141U, // CASAH
807716444U, // CASALB
807718300U, // CASALH
807719158U, // CASALW
807719158U, // CASALX
807715886U, // CASAW
807715886U, // CASAX
807717057U, // CASB
807718685U, // CASH
807716650U, // CASLB
807718394U, // CASLH
807719669U, // CASLW
807719669U, // CASLX
397442U, // CASPALW
413826U, // CASPALX
394148U, // CASPAW
410532U, // CASPAX
397956U, // CASPLW
414340U, // CASPLX
398852U, // CASPW
415236U, // CASPX
807721112U, // CASW
807721112U, // CASX
1881169872U, // CBNZW
1881169872U, // CBNZX
1881169857U, // CBZW
1881169857U, // CBZX
2118698U, // CCMNWi
2118698U, // CCMNWr
2118698U, // CCMNXi
2118698U, // CCMNXr
2119039U, // CCMPWi
2119039U, // CCMPWr
2119039U, // CCMPXi
2119039U, // CCMPXr
2686507991U, // CDOT_ZZZI_D
2149669847U, // CDOT_ZZZI_S
2686507991U, // CDOT_ZZZ_D
2149669847U, // CDOT_ZZZ_S
9823U, // CFINV
3223340128U, // CLASTA_RPZ_B
3223340128U, // CLASTA_RPZ_D
3223340128U, // CLASTA_RPZ_H
3223340128U, // CLASTA_RPZ_S
3223340128U, // CLASTA_VPZ_B
3223340128U, // CLASTA_VPZ_D
3223340128U, // CLASTA_VPZ_H
3223340128U, // CLASTA_VPZ_S
3223356512U, // CLASTA_ZPZ_B
3223372896U, // CLASTA_ZPZ_D
2176910432U, // CLASTA_ZPZ_H
3223405664U, // CLASTA_ZPZ_S
3223341354U, // CLASTB_RPZ_B
3223341354U, // CLASTB_RPZ_D
3223341354U, // CLASTB_RPZ_H
3223341354U, // CLASTB_RPZ_S
3223341354U, // CLASTB_VPZ_B
3223341354U, // CLASTB_VPZ_D
3223341354U, // CLASTB_VPZ_H
3223341354U, // CLASTB_VPZ_S
3223357738U, // CLASTB_ZPZ_B
3223374122U, // CLASTB_ZPZ_D
2176911658U, // CLASTB_ZPZ_H
3223406890U, // CLASTB_ZPZ_S
24395U, // CLREX
2119963U, // CLSWr
2119963U, // CLSXr
270571803U, // CLS_ZPmZ_B
270588187U, // CLS_ZPmZ_D
541137179U, // CLS_ZPmZ_H
270620955U, // CLS_ZPmZ_S
811702555U, // CLSv16i8
813799707U, // CLSv2i32
817994011U, // CLSv4i16
820091163U, // CLSv4i32
822188315U, // CLSv8i16
824285467U, // CLSv8i8
2121675U, // CLZWr
2121675U, // CLZXr
270573515U, // CLZ_ZPmZ_B
270589899U, // CLZ_ZPmZ_D
541138891U, // CLZ_ZPmZ_H
270622667U, // CLZ_ZPmZ_S
811704267U, // CLZv16i8
813801419U, // CLZv2i32
817995723U, // CLZv4i16
820092875U, // CLZv4i32
822190027U, // CLZv8i16
824287179U, // CLZv8i8
811701955U, // CMEQv16i8
811701955U, // CMEQv16i8rz
2119363U, // CMEQv1i64
2119363U, // CMEQv1i64rz
813799107U, // CMEQv2i32
813799107U, // CMEQv2i32rz
815896259U, // CMEQv2i64
815896259U, // CMEQv2i64rz
817993411U, // CMEQv4i16
817993411U, // CMEQv4i16rz
820090563U, // CMEQv4i32
820090563U, // CMEQv4i32rz
822187715U, // CMEQv8i16
822187715U, // CMEQv8i16rz
824284867U, // CMEQv8i8
824284867U, // CMEQv8i8rz
811699023U, // CMGEv16i8
811699023U, // CMGEv16i8rz
2116431U, // CMGEv1i64
2116431U, // CMGEv1i64rz
813796175U, // CMGEv2i32
813796175U, // CMGEv2i32rz
815893327U, // CMGEv2i64
815893327U, // CMGEv2i64rz
817990479U, // CMGEv4i16
817990479U, // CMGEv4i16rz
820087631U, // CMGEv4i32
820087631U, // CMGEv4i32rz
822184783U, // CMGEv8i16
822184783U, // CMGEv8i16rz
824281935U, // CMGEv8i8
824281935U, // CMGEv8i8rz
811702854U, // CMGTv16i8
811702854U, // CMGTv16i8rz
2120262U, // CMGTv1i64
2120262U, // CMGTv1i64rz
813800006U, // CMGTv2i32
813800006U, // CMGTv2i32rz
815897158U, // CMGTv2i64
815897158U, // CMGTv2i64rz
817994310U, // CMGTv4i16
817994310U, // CMGTv4i16rz
820091462U, // CMGTv4i32
820091462U, // CMGTv4i32rz
822188614U, // CMGTv8i16
822188614U, // CMGTv8i16rz
824285766U, // CMGTv8i8
824285766U, // CMGTv8i8rz
811700147U, // CMHIv16i8
2117555U, // CMHIv1i64
813797299U, // CMHIv2i32
815894451U, // CMHIv2i64
817991603U, // CMHIv4i16
820088755U, // CMHIv4i32
822185907U, // CMHIv8i16
824283059U, // CMHIv8i8
811702542U, // CMHSv16i8
2119950U, // CMHSv1i64
813799694U, // CMHSv2i32
815896846U, // CMHSv2i64
817993998U, // CMHSv4i16
820091150U, // CMHSv4i32
822188302U, // CMHSv8i16
824285454U, // CMHSv8i8
2195784458U, // CMLA_ZZZI_H
1344357130U, // CMLA_ZZZI_S
2149614346U, // CMLA_ZZZ_B
1075888906U, // CMLA_ZZZ_D
2195784458U, // CMLA_ZZZ_H
1344357130U, // CMLA_ZZZ_S
811699054U, // CMLEv16i8rz
2116462U, // CMLEv1i64rz
813796206U, // CMLEv2i32rz
815893358U, // CMLEv2i64rz
817990510U, // CMLEv4i16rz
820087662U, // CMLEv4i32rz
822184814U, // CMLEv8i16rz
824281966U, // CMLEv8i8rz
811703064U, // CMLTv16i8rz
2120472U, // CMLTv1i64rz
813800216U, // CMLTv2i32rz
815897368U, // CMLTv2i64rz
817994520U, // CMLTv4i16rz
820091672U, // CMLTv4i32rz
822188824U, // CMLTv8i16rz
824285976U, // CMLTv8i8rz
3223361234U, // CMPEQ_PPzZI_B
3223377618U, // CMPEQ_PPzZI_D
2445350610U, // CMPEQ_PPzZI_H
3223410386U, // CMPEQ_PPzZI_S
3223361234U, // CMPEQ_PPzZZ_B
3223377618U, // CMPEQ_PPzZZ_D
2445350610U, // CMPEQ_PPzZZ_H
3223410386U, // CMPEQ_PPzZZ_S
3223361234U, // CMPEQ_WIDE_PPzZZ_B
2445350610U, // CMPEQ_WIDE_PPzZZ_H
3223410386U, // CMPEQ_WIDE_PPzZZ_S
3223358293U, // CMPGE_PPzZI_B
3223374677U, // CMPGE_PPzZI_D
2445347669U, // CMPGE_PPzZI_H
3223407445U, // CMPGE_PPzZI_S
3223358293U, // CMPGE_PPzZZ_B
3223374677U, // CMPGE_PPzZZ_D
2445347669U, // CMPGE_PPzZZ_H
3223407445U, // CMPGE_PPzZZ_S
3223358293U, // CMPGE_WIDE_PPzZZ_B
2445347669U, // CMPGE_WIDE_PPzZZ_H
3223407445U, // CMPGE_WIDE_PPzZZ_S
3223362124U, // CMPGT_PPzZI_B
3223378508U, // CMPGT_PPzZI_D
2445351500U, // CMPGT_PPzZI_H
3223411276U, // CMPGT_PPzZI_S
3223362124U, // CMPGT_PPzZZ_B
3223378508U, // CMPGT_PPzZZ_D
2445351500U, // CMPGT_PPzZZ_H
3223411276U, // CMPGT_PPzZZ_S
3223362124U, // CMPGT_WIDE_PPzZZ_B
2445351500U, // CMPGT_WIDE_PPzZZ_H
3223411276U, // CMPGT_WIDE_PPzZZ_S
3223359417U, // CMPHI_PPzZI_B
3223375801U, // CMPHI_PPzZI_D
2445348793U, // CMPHI_PPzZI_H
3223408569U, // CMPHI_PPzZI_S
3223359417U, // CMPHI_PPzZZ_B
3223375801U, // CMPHI_PPzZZ_D
2445348793U, // CMPHI_PPzZZ_H
3223408569U, // CMPHI_PPzZZ_S
3223359417U, // CMPHI_WIDE_PPzZZ_B
2445348793U, // CMPHI_WIDE_PPzZZ_H
3223408569U, // CMPHI_WIDE_PPzZZ_S
3223361812U, // CMPHS_PPzZI_B
3223378196U, // CMPHS_PPzZI_D
2445351188U, // CMPHS_PPzZI_H
3223410964U, // CMPHS_PPzZI_S
3223361812U, // CMPHS_PPzZZ_B
3223378196U, // CMPHS_PPzZZ_D
2445351188U, // CMPHS_PPzZZ_H
3223410964U, // CMPHS_PPzZZ_S
3223361812U, // CMPHS_WIDE_PPzZZ_B
2445351188U, // CMPHS_WIDE_PPzZZ_H
3223410964U, // CMPHS_WIDE_PPzZZ_S
3223358324U, // CMPLE_PPzZI_B
3223374708U, // CMPLE_PPzZI_D
2445347700U, // CMPLE_PPzZI_H
3223407476U, // CMPLE_PPzZI_S
3223358324U, // CMPLE_WIDE_PPzZZ_B
2445347700U, // CMPLE_WIDE_PPzZZ_H
3223407476U, // CMPLE_WIDE_PPzZZ_S
3223360736U, // CMPLO_PPzZI_B
3223377120U, // CMPLO_PPzZI_D
2445350112U, // CMPLO_PPzZI_H
3223409888U, // CMPLO_PPzZI_S
3223360736U, // CMPLO_WIDE_PPzZZ_B
2445350112U, // CMPLO_WIDE_PPzZZ_H
3223409888U, // CMPLO_WIDE_PPzZZ_S
3223361847U, // CMPLS_PPzZI_B
3223378231U, // CMPLS_PPzZI_D
2445351223U, // CMPLS_PPzZI_H
3223410999U, // CMPLS_PPzZI_S
3223361847U, // CMPLS_WIDE_PPzZZ_B
2445351223U, // CMPLS_WIDE_PPzZZ_H
3223410999U, // CMPLS_WIDE_PPzZZ_S
3223362334U, // CMPLT_PPzZI_B
3223378718U, // CMPLT_PPzZI_D
2445351710U, // CMPLT_PPzZI_H
3223411486U, // CMPLT_PPzZI_S
3223362334U, // CMPLT_WIDE_PPzZZ_B
2445351710U, // CMPLT_WIDE_PPzZZ_H
3223411486U, // CMPLT_WIDE_PPzZZ_S
3223358347U, // CMPNE_PPzZI_B
3223374731U, // CMPNE_PPzZI_D
2445347723U, // CMPNE_PPzZI_H
3223407499U, // CMPNE_PPzZI_S
3223358347U, // CMPNE_PPzZZ_B
3223374731U, // CMPNE_PPzZZ_D
2445347723U, // CMPNE_PPzZZ_H
3223407499U, // CMPNE_PPzZZ_S
3223358347U, // CMPNE_WIDE_PPzZZ_B
2445347723U, // CMPNE_WIDE_PPzZZ_H
3223407499U, // CMPNE_WIDE_PPzZZ_S
811703349U, // CMTSTv16i8
2120757U, // CMTSTv1i64
813800501U, // CMTSTv2i32
815897653U, // CMTSTv2i64
817994805U, // CMTSTv4i16
820091957U, // CMTSTv4i32
822189109U, // CMTSTv8i16
824286261U, // CMTSTv8i8
270572554U, // CNOT_ZPmZ_B
270588938U, // CNOT_ZPmZ_D
541137930U, // CNOT_ZPmZ_H
270621706U, // CNOT_ZPmZ_S
2686470429U, // CNTB_XPiI
2686470948U, // CNTD_XPiI
2686472030U, // CNTH_XPiI
2954909236U, // CNTP_XCI_B
3223344692U, // CNTP_XCI_D
3491780148U, // CNTP_XCI_H
3760215604U, // CNTP_XCI_S
3223344692U, // CNTP_XPP_B
3223344692U, // CNTP_XPP_D
3223344692U, // CNTP_XPP_H
3223344692U, // CNTP_XPP_S
2686476005U, // CNTW_XPiI
2120532U, // CNTWr
2120532U, // CNTXr
270572372U, // CNT_ZPmZ_B
270588756U, // CNT_ZPmZ_D
541137748U, // CNT_ZPmZ_H
270621524U, // CNT_ZPmZ_S
811703124U, // CNTv16i8
824286036U, // CNTv8i8
3223378441U, // COMPACT_ZPZ_D
3223411209U, // COMPACT_ZPZ_S
434579U, // CPYE
434642U, // CPYEN
434728U, // CPYERN
435616U, // CPYERT
435101U, // CPYERTN
434850U, // CPYERTRN
435348U, // CPYERTWN
435530U, // CPYET
435005U, // CPYETN
434786U, // CPYETRN
435284U, // CPYETWN
435226U, // CPYEWN
435673U, // CPYEWT
435164U, // CPYEWTN
434919U, // CPYEWTRN
435417U, // CPYEWTWN
434556U, // CPYFE
434616U, // CPYFEN
434718U, // CPYFERN
435606U, // CPYFERT
435090U, // CPYFERTN
434838U, // CPYFERTRN
435336U, // CPYFERTWN
435504U, // CPYFET
434976U, // CPYFETN
434775U, // CPYFETRN
435273U, // CPYFETWN
435216U, // CPYFEWN
435663U, // CPYFEWT
435153U, // CPYFEWTN
434907U, // CPYFEWTRN
435405U, // CPYFEWTWN
434586U, // CPYFM
434650U, // CPYFMN
434737U, // CPYFMRN
435625U, // CPYFMRT
435111U, // CPYFMRTN
434861U, // CPYFMRTRN
435359U, // CPYFMRTWN
435538U, // CPYFMT
435014U, // CPYFMTN
434796U, // CPYFMTRN
435294U, // CPYFMTWN
435235U, // CPYFMWN
435682U, // CPYFMWT
435174U, // CPYFMWTN
434930U, // CPYFMWTRN
435428U, // CPYFMWTWN
435474U, // CPYFP
434684U, // CPYFPN
434756U, // CPYFPRN
435644U, // CPYFPRT
435132U, // CPYFPRTN
434884U, // CPYFPRTRN
435382U, // CPYFPRTWN
435572U, // CPYFPT
435052U, // CPYFPTN
434817U, // CPYFPTRN
435315U, // CPYFPTWN
435254U, // CPYFPWN
435701U, // CPYFPWT
435195U, // CPYFPWTN
434953U, // CPYFPWTRN
435451U, // CPYFPWTWN
434609U, // CPYM
434676U, // CPYMN
434747U, // CPYMRN
435635U, // CPYMRT
435122U, // CPYMRTN
434873U, // CPYMRTRN
435371U, // CPYMRTWN
435564U, // CPYMT
435043U, // CPYMTN
434807U, // CPYMTRN
435305U, // CPYMTWN
435245U, // CPYMWN
435692U, // CPYMWT
435185U, // CPYMWTN
434942U, // CPYMWTRN
435440U, // CPYMWTWN
435497U, // CPYP
434710U, // CPYPN
434766U, // CPYPRN
435654U, // CPYPRT
435143U, // CPYPRTN
434896U, // CPYPRTRN
435394U, // CPYPRTWN
435598U, // CPYPT
435081U, // CPYPTN
434828U, // CPYPTRN
435326U, // CPYPTWN
435264U, // CPYPWN
435711U, // CPYPWT
435206U, // CPYPWTN
434965U, // CPYPWTRN
435463U, // CPYPWTWN
270573443U, // CPY_ZPmI_B
270589827U, // CPY_ZPmI_D
4030799747U, // CPY_ZPmI_H
270622595U, // CPY_ZPmI_S
270573443U, // CPY_ZPmR_B
270589827U, // CPY_ZPmR_D
4267907U, // CPY_ZPmR_H
270622595U, // CPY_ZPmR_S
270573443U, // CPY_ZPmV_B
270589827U, // CPY_ZPmV_D
4267907U, // CPY_ZPmV_H
270622595U, // CPY_ZPmV_S
3223363459U, // CPY_ZPzI_B
3223379843U, // CPY_ZPzI_D
2445352835U, // CPY_ZPzI_H
3223412611U, // CPY_ZPzI_S
2114780U, // CRC32Brr
2114957U, // CRC32CBrr
2116897U, // CRC32CHrr
2121270U, // CRC32CWrr
2121531U, // CRC32CXrr
2116733U, // CRC32Hrr
2121212U, // CRC32Wrr
2121469U, // CRC32Xrr
2118042U, // CSELWr
2118042U, // CSELXr
2116077U, // CSINCWr
2116077U, // CSINCXr
2121020U, // CSINVWr
2121020U, // CSINVXr
2116641U, // CSNEGWr
2116641U, // CSNEGXr
2119369U, // CTERMEQ_WW
2119369U, // CTERMEQ_XX
2116482U, // CTERMNE_WW
2116482U, // CTERMNE_XX
2121692U, // CTZWr
2121692U, // CTZXr
376923U, // DCPS1
377372U, // DCPS2
377438U, // DCPS3
270550424U, // DECB_XPiI
270551677U, // DECD_XPiI
270584445U, // DECD_ZPiI
270552364U, // DECH_XPiI
58789164U, // DECH_ZPiI
2118915U, // DECP_XP_B
2418038019U, // DECP_XP_D
1881167107U, // DECP_XP_H
270554371U, // DECP_XP_S
1075893507U, // DECP_ZP_D
1658918147U, // DECP_ZP_H
1344361731U, // DECP_ZP_S
270556737U, // DECW_XPiI
270622273U, // DECW_ZPiI
444273U, // DMB
9805U, // DRPS
444615U, // DSB
460999U, // DSBnXS
539022298U, // DUPM_ZI
2135775U, // DUPQ_ZZI_B
2418071263U, // DUPQ_ZZI_D
847320799U, // DUPQ_ZZI_H
270620383U, // DUPQ_ZZI_S
1075877448U, // DUP_ZI_B
1344329288U, // DUP_ZI_D
60888648U, // DUP_ZI_H
1612797512U, // DUP_ZI_S
2135624U, // DUP_ZR_B
2152008U, // DUP_ZR_D
1673598536U, // DUP_ZR_H
2184776U, // DUP_ZR_S
2135624U, // DUP_ZZI_B
2418071112U, // DUP_ZZI_D
847320648U, // DUP_ZZI_H
870798920U, // DUP_ZZI_Q
270620232U, // DUP_ZZI_S
807427396U, // DUPi16
807427396U, // DUPi32
807427396U, // DUPi64
807427396U, // DUPi8
6395464U, // DUPv16i8gpr
811701832U, // DUPv16i8lane
8492616U, // DUPv2i32gpr
813798984U, // DUPv2i32lane
10589768U, // DUPv2i64gpr
815896136U, // DUPv2i64lane
12686920U, // DUPv4i16gpr
817993288U, // DUPv4i16lane
14784072U, // DUPv4i32gpr
820090440U, // DUPv4i32lane
16881224U, // DUPv8i16gpr
822187592U, // DUPv8i16lane
18978376U, // DUPv8i8gpr
824284744U, // DUPv8i8lane
2118704U, // EONWrs
2118704U, // EONXrs
811696728U, // EOR3
2418066008U, // EOR3_ZZZZ
2149620226U, // EORBT_ZZZ_B
1075894786U, // EORBT_ZZZ_D
2195790338U, // EORBT_ZZZ_H
1344363010U, // EORBT_ZZZ_S
3227622806U, // EORQV_VPZ_B
3231817110U, // EORQV_VPZ_D
3238108566U, // EORQV_VPZ_H
3236011414U, // EORQV_VPZ_S
3223361955U, // EORS_PPzPP
2149615907U, // EORTB_ZZZ_B
1075890467U, // EORTB_ZZZ_D
2195786019U, // EORTB_ZZZ_H
1344358691U, // EORTB_ZZZ_S
253365U, // EORV_VPZ_B
1657019829U, // EORV_VPZ_D
1659133365U, // EORV_VPZ_H
1638178229U, // EORV_VPZ_S
2119656U, // EORWri
2119656U, // EORWrs
2119656U, // EORXri
2119656U, // EORXrs
3223361512U, // EOR_PPzPP
2418071528U, // EOR_ZI
3223361512U, // EOR_ZPmZ_B
3223377896U, // EOR_ZPmZ_D
3519092712U, // EOR_ZPmZ_H
3223410664U, // EOR_ZPmZ_S
2418071528U, // EOR_ZZZ
811702248U, // EORv16i8
824285160U, // EORv8i8
9810U, // ERET
9736U, // ERETAA
9743U, // ERETAB
2135781U, // EXTQ_ZZI
270566511U, // EXTRACT_ZPMXI_H_B
270582895U, // EXTRACT_ZPMXI_H_D
1883309167U, // EXTRACT_ZPMXI_H_H
1883718767U, // EXTRACT_ZPMXI_H_Q
270615663U, // EXTRACT_ZPMXI_H_S
270566511U, // EXTRACT_ZPMXI_V_B
270582895U, // EXTRACT_ZPMXI_V_D
2151744623U, // EXTRACT_ZPMXI_V_H
2152154223U, // EXTRACT_ZPMXI_V_Q
270615663U, // EXTRACT_ZPMXI_V_S
2119739U, // EXTRWrri
2119739U, // EXTRXrri
2137208U, // EXT_ZZI
2418056312U, // EXT_ZZI_B
811703416U, // EXTv16i8
824286328U, // EXTv8i8
2116194U, // FABD16
2116194U, // FABD32
2116194U, // FABD64
3223374434U, // FABD_ZPmZ_D
3519089250U, // FABD_ZPmZ_H
3223407202U, // FABD_ZPmZ_S
813795938U, // FABDv2f32
815893090U, // FABDv2f64
817990242U, // FABDv4f16
820087394U, // FABDv4f32
822184546U, // FABDv8f16
2119868U, // FABSDr
2119868U, // FABSHr
2119868U, // FABSSr
270588092U, // FABS_ZPmZ_D
541137084U, // FABS_ZPmZ_H
270620860U, // FABS_ZPmZ_S
813799612U, // FABSv2f32
815896764U, // FABSv2f64
817993916U, // FABSv4f16
820091068U, // FABSv4f32
822188220U, // FABSv8f16
2116414U, // FACGE16
2116414U, // FACGE32
2116414U, // FACGE64
3223374654U, // FACGE_PPzZZ_D
2445347646U, // FACGE_PPzZZ_H
3223407422U, // FACGE_PPzZZ_S
813796158U, // FACGEv2f32
815893310U, // FACGEv2f64
817990462U, // FACGEv4f16
820087614U, // FACGEv4f32
822184766U, // FACGEv8f16
2120245U, // FACGT16
2120245U, // FACGT32
2120245U, // FACGT64
3223378485U, // FACGT_PPzZZ_D
2445351477U, // FACGT_PPzZZ_H
3223411253U, // FACGT_PPzZZ_S
813799989U, // FACGTv2f32
815897141U, // FACGTv2f64
817994293U, // FACGTv4f16
820091445U, // FACGTv4f32
822188597U, // FACGTv8f16
67371737U, // FADDA_VPZ_D
2216968921U, // FADDA_VPZ_H
71598809U, // FADDA_VPZ_S
2116274U, // FADDDrr
2116274U, // FADDHrr
3223377185U, // FADDP_ZPmZZ_D
3519092001U, // FADDP_ZPmZZ_H
3223409953U, // FADDP_ZPmZZ_S
813798689U, // FADDPv2f32
815895841U, // FADDPv2f64
807425313U, // FADDPv2i16p
807425313U, // FADDPv2i32p
807425313U, // FADDPv2i64p
817992993U, // FADDPv4f16
820090145U, // FADDPv4f32
822187297U, // FADDPv8f16
3231817051U, // FADDQV_D
3238108507U, // FADDQV_H
3236011355U, // FADDQV_S
2116274U, // FADDSrr
1657019603U, // FADDV_VPZ_D
1659133139U, // FADDV_VPZ_H
1638178003U, // FADDV_VPZ_S
3798158002U, // FADD_VG2_M2Z_D
1661307570U, // FADD_VG2_M2Z_H
3798174386U, // FADD_VG2_M2Z_S
4066593458U, // FADD_VG4_M4Z_D
1663404722U, // FADD_VG4_M4Z_H
4066609842U, // FADD_VG4_M4Z_S
3223374514U, // FADD_ZPmI_D
3519089330U, // FADD_ZPmI_H
3223407282U, // FADD_ZPmI_S
3223374514U, // FADD_ZPmZ_D
3519089330U, // FADD_ZPmZ_H
3223407282U, // FADD_ZPmZ_S
2418068146U, // FADD_ZZZ_D
2189494962U, // FADD_ZZZ_H
270617266U, // FADD_ZZZ_S
813796018U, // FADDv2f32
815893170U, // FADDv2f64
817990322U, // FADDv4f16
820087474U, // FADDv4f32
822184626U, // FADDv8f16
3223374491U, // FCADD_ZPmZ_D
3519089307U, // FCADD_ZPmZ_H
3223407259U, // FCADD_ZPmZ_S
813795995U, // FCADDv2f32
815893147U, // FCADDv2f64
817990299U, // FCADDv4f16
820087451U, // FCADDv4f32
822184603U, // FCADDv8f16
2119038U, // FCCMPDrr
2116514U, // FCCMPEDrr
2116514U, // FCCMPEHrr
2116514U, // FCCMPESrr
2119038U, // FCCMPHrr
2119038U, // FCCMPSrr
2193790310U, // FCLAMP_VG2_2Z2Z_D
2195903846U, // FCLAMP_VG2_2Z2Z_H
2174948710U, // FCLAMP_VG2_2Z2Z_S
2193790310U, // FCLAMP_VG4_4Z4Z_D
2195903846U, // FCLAMP_VG4_4Z4Z_H
2174948710U, // FCLAMP_VG4_4Z4Z_S
1075893606U, // FCLAMP_ZZZ_D
2195789158U, // FCLAMP_ZZZ_H
1344361830U, // FCLAMP_ZZZ_S
2119362U, // FCMEQ16
2119362U, // FCMEQ32
2119362U, // FCMEQ64
3223377602U, // FCMEQ_PPzZ0_D
2445350594U, // FCMEQ_PPzZ0_H
3223410370U, // FCMEQ_PPzZ0_S
3223377602U, // FCMEQ_PPzZZ_D
2445350594U, // FCMEQ_PPzZZ_H
3223410370U, // FCMEQ_PPzZZ_S
2119362U, // FCMEQv1i16rz
2119362U, // FCMEQv1i32rz
2119362U, // FCMEQv1i64rz
813799106U, // FCMEQv2f32
815896258U, // FCMEQv2f64
813799106U, // FCMEQv2i32rz
815896258U, // FCMEQv2i64rz
817993410U, // FCMEQv4f16
820090562U, // FCMEQv4f32
817993410U, // FCMEQv4i16rz
820090562U, // FCMEQv4i32rz
822187714U, // FCMEQv8f16
822187714U, // FCMEQv8i16rz
2116430U, // FCMGE16
2116430U, // FCMGE32
2116430U, // FCMGE64
3223374670U, // FCMGE_PPzZ0_D
2445347662U, // FCMGE_PPzZ0_H
3223407438U, // FCMGE_PPzZ0_S
3223374670U, // FCMGE_PPzZZ_D
2445347662U, // FCMGE_PPzZZ_H
3223407438U, // FCMGE_PPzZZ_S
2116430U, // FCMGEv1i16rz
2116430U, // FCMGEv1i32rz
2116430U, // FCMGEv1i64rz
813796174U, // FCMGEv2f32
815893326U, // FCMGEv2f64
813796174U, // FCMGEv2i32rz
815893326U, // FCMGEv2i64rz
817990478U, // FCMGEv4f16
820087630U, // FCMGEv4f32
817990478U, // FCMGEv4i16rz
820087630U, // FCMGEv4i32rz
822184782U, // FCMGEv8f16
822184782U, // FCMGEv8i16rz
2120261U, // FCMGT16
2120261U, // FCMGT32
2120261U, // FCMGT64
3223378501U, // FCMGT_PPzZ0_D
2445351493U, // FCMGT_PPzZ0_H
3223411269U, // FCMGT_PPzZ0_S
3223378501U, // FCMGT_PPzZZ_D
2445351493U, // FCMGT_PPzZZ_H
3223411269U, // FCMGT_PPzZZ_S
2120261U, // FCMGTv1i16rz
2120261U, // FCMGTv1i32rz
2120261U, // FCMGTv1i64rz
813800005U, // FCMGTv2f32
815897157U, // FCMGTv2f64
813800005U, // FCMGTv2i32rz
815897157U, // FCMGTv2i64rz
817994309U, // FCMGTv4f16
820091461U, // FCMGTv4f32
817994309U, // FCMGTv4i16rz
820091461U, // FCMGTv4i32rz
822188613U, // FCMGTv8f16
822188613U, // FCMGTv8i16rz
3223372553U, // FCMLA_ZPmZZ_D
3519087369U, // FCMLA_ZPmZZ_H
3223405321U, // FCMLA_ZPmZZ_S
2195784457U, // FCMLA_ZZZI_H
1344357129U, // FCMLA_ZZZI_S
2961310473U, // FCMLAv2f32
2963407625U, // FCMLAv2f64
2965504777U, // FCMLAv4f16
2965504777U, // FCMLAv4f16_indexed
2967601929U, // FCMLAv4f32
2967601929U, // FCMLAv4f32_indexed
2969699081U, // FCMLAv8f16
2969699081U, // FCMLAv8f16_indexed
3223374701U, // FCMLE_PPzZ0_D
2445347693U, // FCMLE_PPzZ0_H
3223407469U, // FCMLE_PPzZ0_S
2116461U, // FCMLEv1i16rz
2116461U, // FCMLEv1i32rz
2116461U, // FCMLEv1i64rz
813796205U, // FCMLEv2i32rz
815893357U, // FCMLEv2i64rz
817990509U, // FCMLEv4i16rz
820087661U, // FCMLEv4i32rz
822184813U, // FCMLEv8i16rz
3223378711U, // FCMLT_PPzZ0_D
2445351703U, // FCMLT_PPzZ0_H
3223411479U, // FCMLT_PPzZ0_S
2120471U, // FCMLTv1i16rz
2120471U, // FCMLTv1i32rz
2120471U, // FCMLTv1i64rz
813800215U, // FCMLTv2i32rz
815897367U, // FCMLTv2i64rz
817994519U, // FCMLTv4i16rz
820091671U, // FCMLTv4i32rz
822188823U, // FCMLTv8i16rz
3223374715U, // FCMNE_PPzZ0_D
2445347707U, // FCMNE_PPzZ0_H
3223407483U, // FCMNE_PPzZ0_S
3223374715U, // FCMNE_PPzZZ_D
2445347707U, // FCMNE_PPzZZ_H
3223407483U, // FCMNE_PPzZZ_S
73422213U, // FCMPDri
2119045U, // FCMPDrr
73419690U, // FCMPEDri
2116522U, // FCMPEDrr
73419690U, // FCMPEHri
2116522U, // FCMPEHrr
73419690U, // FCMPESri
2116522U, // FCMPESrr
73422213U, // FCMPHri
2119045U, // FCMPHrr
73422213U, // FCMPSri
2119045U, // FCMPSrr
3223377133U, // FCMUO_PPzZZ_D
2445350125U, // FCMUO_PPzZZ_H
3223409901U, // FCMUO_PPzZZ_S
270589826U, // FCPY_ZPmI_D
2688622466U, // FCPY_ZPmI_H
270622594U, // FCPY_ZPmI_S
2118041U, // FCSELDrrr
2118041U, // FCSELHrrr
2118041U, // FCSELSrrr
2119860U, // FCVTASUWDr
2119860U, // FCVTASUWHr
2119860U, // FCVTASUWSr
2119860U, // FCVTASUXDr
2119860U, // FCVTASUXHr
2119860U, // FCVTASUXSr
2119860U, // FCVTASv1f16
2119860U, // FCVTASv1i32
2119860U, // FCVTASv1i64
813799604U, // FCVTASv2f32
815896756U, // FCVTASv2f64
817993908U, // FCVTASv4f16
820091060U, // FCVTASv4f32
822188212U, // FCVTASv8f16
2120842U, // FCVTAUUWDr
2120842U, // FCVTAUUWHr
2120842U, // FCVTAUUWSr
2120842U, // FCVTAUUXDr
2120842U, // FCVTAUUXHr
2120842U, // FCVTAUUXSr
2120842U, // FCVTAUv1f16
2120842U, // FCVTAUv1i32
2120842U, // FCVTAUv1i64
813800586U, // FCVTAUv2f32
815897738U, // FCVTAUv2f64
817994890U, // FCVTAUv4f16
820092042U, // FCVTAUv4f32
822189194U, // FCVTAUv8f16
2120765U, // FCVTDHr
2120765U, // FCVTDSr
2120765U, // FCVTHDr
2120765U, // FCVTHSr
270621512U, // FCVTLT_ZPmZ_HtoS
270588744U, // FCVTLT_ZPmZ_StoD
1652757322U, // FCVTL_2ZZ_H_S
815895370U, // FCVTLv2i32
820089674U, // FCVTLv4i16
815890812U, // FCVTLv4i32
820085116U, // FCVTLv8i16
2119998U, // FCVTMSUWDr
2119998U, // FCVTMSUWHr
2119998U, // FCVTMSUWSr
2119998U, // FCVTMSUXDr
2119998U, // FCVTMSUXHr
2119998U, // FCVTMSUXSr
2119998U, // FCVTMSv1f16
2119998U, // FCVTMSv1i32
2119998U, // FCVTMSv1i64
813799742U, // FCVTMSv2f32
815896894U, // FCVTMSv2f64
817994046U, // FCVTMSv4f16
820091198U, // FCVTMSv4f32
822188350U, // FCVTMSv8f16
2120858U, // FCVTMUUWDr
2120858U, // FCVTMUUWHr
2120858U, // FCVTMUUWSr
2120858U, // FCVTMUUXDr
2120858U, // FCVTMUUXHr
2120858U, // FCVTMUUXSr
2120858U, // FCVTMUv1f16
2120858U, // FCVTMUv1i32
2120858U, // FCVTMUv1i64
813800602U, // FCVTMUv2f32
815897754U, // FCVTMUv2f64
817994906U, // FCVTMUv4f16
820092058U, // FCVTMUv4f32
822189210U, // FCVTMUv8f16
2120024U, // FCVTNSUWDr
2120024U, // FCVTNSUWHr
2120024U, // FCVTNSUWSr
2120024U, // FCVTNSUXDr
2120024U, // FCVTNSUXHr
2120024U, // FCVTNSUXSr
2120024U, // FCVTNSv1f16
2120024U, // FCVTNSv1i32
2120024U, // FCVTNSv1i64
813799768U, // FCVTNSv2f32
815896920U, // FCVTNSv2f64
817994072U, // FCVTNSv4f16
820091224U, // FCVTNSv4f32
822188376U, // FCVTNSv8f16
270621592U, // FCVTNT_ZPmZ_DtoS
1078008728U, // FCVTNT_ZPmZ_StoH
2120866U, // FCVTNUUWDr
2120866U, // FCVTNUUWHr
2120866U, // FCVTNUUWSr
2120866U, // FCVTNUUXDr
2120866U, // FCVTNUUXHr
2120866U, // FCVTNUUXSr
2120866U, // FCVTNUv1f16
2120866U, // FCVTNUv1i32
2120866U, // FCVTNUv1i64
813800610U, // FCVTNUv2f32
815897762U, // FCVTNUv2f64
817994914U, // FCVTNUv4f16
820092066U, // FCVTNUv4f32
822189218U, // FCVTNUv8f16
1648432229U, // FCVTN_Z2Z_StoH
813798501U, // FCVTNv2i32
817992805U, // FCVTNv4i16
2967601603U, // FCVTNv4i32
2969698755U, // FCVTNv8i16
2120078U, // FCVTPSUWDr
2120078U, // FCVTPSUWHr
2120078U, // FCVTPSUWSr
2120078U, // FCVTPSUXDr
2120078U, // FCVTPSUXHr
2120078U, // FCVTPSUXSr
2120078U, // FCVTPSv1f16
2120078U, // FCVTPSv1i32
2120078U, // FCVTPSv1i64
813799822U, // FCVTPSv2f32
815896974U, // FCVTPSv2f64
817994126U, // FCVTPSv4f16
820091278U, // FCVTPSv4f32
822188430U, // FCVTPSv8f16
2120874U, // FCVTPUUWDr
2120874U, // FCVTPUUWHr
2120874U, // FCVTPUUWSr
2120874U, // FCVTPUUXDr
2120874U, // FCVTPUUXHr
2120874U, // FCVTPUUXSr
2120874U, // FCVTPUv1f16
2120874U, // FCVTPUv1i32
2120874U, // FCVTPUv1i64
813800618U, // FCVTPUv2f32
815897770U, // FCVTPUv2f64
817994922U, // FCVTPUv4f16
820092074U, // FCVTPUv4f32
822189226U, // FCVTPUv8f16
2120765U, // FCVTSDr
2120765U, // FCVTSHr
270621646U, // FCVTXNT_ZPmZ_DtoS
2118836U, // FCVTXNv1i64
813798580U, // FCVTXNv2f32
2967601657U, // FCVTXNv4f32
270622578U, // FCVTX_ZPmZ_DtoS
2120137U, // FCVTZSSWDri
2120137U, // FCVTZSSWHri
2120137U, // FCVTZSSWSri
2120137U, // FCVTZSSXDri
2120137U, // FCVTZSSXHri
2120137U, // FCVTZSSXSri
2120137U, // FCVTZSUWDr
2120137U, // FCVTZSUWHr
2120137U, // FCVTZSUWSr
2120137U, // FCVTZSUXDr
2120137U, // FCVTZSUXHr
2120137U, // FCVTZSUXSr
1648564681U, // FCVTZS_2Z2Z_StoS
1648564681U, // FCVTZS_4Z4Z_StoS
270588361U, // FCVTZS_ZPmZ_DtoD
270621129U, // FCVTZS_ZPmZ_DtoS
270588361U, // FCVTZS_ZPmZ_HtoD
541137353U, // FCVTZS_ZPmZ_HtoH
270621129U, // FCVTZS_ZPmZ_HtoS
270588361U, // FCVTZS_ZPmZ_StoD
270621129U, // FCVTZS_ZPmZ_StoS
2120137U, // FCVTZSd
2120137U, // FCVTZSh
2120137U, // FCVTZSs
2120137U, // FCVTZSv1f16
2120137U, // FCVTZSv1i32
2120137U, // FCVTZSv1i64
813799881U, // FCVTZSv2f32
815897033U, // FCVTZSv2f64
813799881U, // FCVTZSv2i32_shift
815897033U, // FCVTZSv2i64_shift
817994185U, // FCVTZSv4f16
820091337U, // FCVTZSv4f32
817994185U, // FCVTZSv4i16_shift
820091337U, // FCVTZSv4i32_shift
822188489U, // FCVTZSv8f16
822188489U, // FCVTZSv8i16_shift
2120899U, // FCVTZUSWDri
2120899U, // FCVTZUSWHri
2120899U, // FCVTZUSWSri
2120899U, // FCVTZUSXDri
2120899U, // FCVTZUSXHri
2120899U, // FCVTZUSXSri
2120899U, // FCVTZUUWDr
2120899U, // FCVTZUUWHr
2120899U, // FCVTZUUWSr
2120899U, // FCVTZUUXDr
2120899U, // FCVTZUUXHr
2120899U, // FCVTZUUXSr
1648565443U, // FCVTZU_2Z2Z_StoS
1648565443U, // FCVTZU_4Z4Z_StoS
270589123U, // FCVTZU_ZPmZ_DtoD
270621891U, // FCVTZU_ZPmZ_DtoS
270589123U, // FCVTZU_ZPmZ_HtoD
541138115U, // FCVTZU_ZPmZ_HtoH
270621891U, // FCVTZU_ZPmZ_HtoS
270589123U, // FCVTZU_ZPmZ_StoD
270621891U, // FCVTZU_ZPmZ_StoS
2120899U, // FCVTZUd
2120899U, // FCVTZUh
2120899U, // FCVTZUs
2120899U, // FCVTZUv1f16
2120899U, // FCVTZUv1i32
2120899U, // FCVTZUv1i64
813800643U, // FCVTZUv2f32
815897795U, // FCVTZUv2f64
813800643U, // FCVTZUv2i32_shift
815897795U, // FCVTZUv2i64_shift
817994947U, // FCVTZUv4f16
820092099U, // FCVTZUv4f32
817994947U, // FCVTZUv4i16_shift
820092099U, // FCVTZUv4i32_shift
822189251U, // FCVTZUv8f16
822189251U, // FCVTZUv8i16_shift
1652759613U, // FCVT_2ZZ_H_S
1648434237U, // FCVT_Z2Z_StoH
2957057085U, // FCVT_ZPmZ_DtoH
270621757U, // FCVT_ZPmZ_DtoS
270588989U, // FCVT_ZPmZ_HtoD
270621757U, // FCVT_ZPmZ_HtoS
270588989U, // FCVT_ZPmZ_StoD
1078008893U, // FCVT_ZPmZ_StoH
2120947U, // FDIVDrr
2120947U, // FDIVHrr
3223378012U, // FDIVR_ZPmZ_D
3519092828U, // FDIVR_ZPmZ_H
3223410780U, // FDIVR_ZPmZ_S
2120947U, // FDIVSrr
3223379187U, // FDIV_ZPmZ_D
3519094003U, // FDIV_ZPmZ_H
3223411955U, // FDIV_ZPmZ_S
813800691U, // FDIVv2f32
815897843U, // FDIVv2f64
817994995U, // FDIVv4f16
820092147U, // FDIVv4f32
822189299U, // FDIVv8f16
3798178782U, // FDOT_VG2_M2Z2Z_HtoS
3798178782U, // FDOT_VG2_M2ZZI_HtoS
3798178782U, // FDOT_VG2_M2ZZ_HtoS
4066614238U, // FDOT_VG4_M4Z4Z_HtoS
4066614238U, // FDOT_VG4_M4ZZI_HtoS
4066614238U, // FDOT_VG4_M4ZZ_HtoS
2686540766U, // FDOT_ZZZI_S
2686540766U, // FDOT_ZZZ_S
3223377479U, // FDUP_ZI_D
75568711U, // FDUP_ZI_H
3223410247U, // FDUP_ZI_S
2418066406U, // FEXPA_ZZ_D
1652622310U, // FEXPA_ZZ_H
270615526U, // FEXPA_ZZ_S
2120145U, // FJCVTZS
270583250U, // FLOGB_ZPmZ_D
541132242U, // FLOGB_ZPmZ_H
270616018U, // FLOGB_ZPmZ_S
2116310U, // FMADDDrrr
2116310U, // FMADDHrrr
2116310U, // FMADDSrrr
3223374414U, // FMAD_ZPmZZ_D
3519089230U, // FMAD_ZPmZZ_H
3223407182U, // FMAD_ZPmZZ_S
2121504U, // FMAXDrr
2121504U, // FMAXHrr
2118610U, // FMAXNMDrr
2118610U, // FMAXNMHrr
3223377300U, // FMAXNMP_ZPmZZ_D
3519092116U, // FMAXNMP_ZPmZZ_H
3223410068U, // FMAXNMP_ZPmZZ_S
813798804U, // FMAXNMPv2f32
815895956U, // FMAXNMPv2f64
807425428U, // FMAXNMPv2i16p
807425428U, // FMAXNMPv2i32p
807425428U, // FMAXNMPv2i64p
817993108U, // FMAXNMPv4f16
820090260U, // FMAXNMPv4f32
822187412U, // FMAXNMPv8f16
3231817076U, // FMAXNMQV_D
3238108532U, // FMAXNMQV_H
3236011380U, // FMAXNMQV_S
2118610U, // FMAXNMSrr
1657019678U, // FMAXNMV_VPZ_D
1659133214U, // FMAXNMV_VPZ_H
1638178078U, // FMAXNMV_VPZ_S
807427358U, // FMAXNMVv4i16v
807427358U, // FMAXNMVv4i32v
807427358U, // FMAXNMVv8i16v
2181206994U, // FMAXNM_VG2_2Z2Z_D
2183320530U, // FMAXNM_VG2_2Z2Z_H
2185434066U, // FMAXNM_VG2_2Z2Z_S
2181206994U, // FMAXNM_VG2_2ZZ_D
2183320530U, // FMAXNM_VG2_2ZZ_H
2185434066U, // FMAXNM_VG2_2ZZ_S
2181206994U, // FMAXNM_VG4_4Z4Z_D
2183320530U, // FMAXNM_VG4_4Z4Z_H
2185434066U, // FMAXNM_VG4_4Z4Z_S
2181206994U, // FMAXNM_VG4_4ZZ_D
2183320530U, // FMAXNM_VG4_4ZZ_H
2185434066U, // FMAXNM_VG4_4ZZ_S
3223376850U, // FMAXNM_ZPmI_D
3519091666U, // FMAXNM_ZPmI_H
3223409618U, // FMAXNM_ZPmI_S
3223376850U, // FMAXNM_ZPmZ_D
3519091666U, // FMAXNM_ZPmZ_H
3223409618U, // FMAXNM_ZPmZ_S
813798354U, // FMAXNMv2f32
815895506U, // FMAXNMv2f64
817992658U, // FMAXNMv4f16
820089810U, // FMAXNMv4f32
822186962U, // FMAXNMv8f16
3223377509U, // FMAXP_ZPmZZ_D
3519092325U, // FMAXP_ZPmZZ_H
3223410277U, // FMAXP_ZPmZZ_S
813799013U, // FMAXPv2f32
815896165U, // FMAXPv2f64
807425637U, // FMAXPv2i16p
807425637U, // FMAXPv2i32p
807425637U, // FMAXPv2i64p
817993317U, // FMAXPv4f16
820090469U, // FMAXPv4f32
822187621U, // FMAXPv8f16
3231817117U, // FMAXQV_D
3238108573U, // FMAXQV_H
3236011421U, // FMAXQV_S
2121504U, // FMAXSrr
1657019835U, // FMAXV_VPZ_D
1659133371U, // FMAXV_VPZ_H
1638178235U, // FMAXV_VPZ_S
807427515U, // FMAXVv4i16v
807427515U, // FMAXVv4i32v
807427515U, // FMAXVv8i16v
2181209888U, // FMAX_VG2_2Z2Z_D
2183323424U, // FMAX_VG2_2Z2Z_H
2185436960U, // FMAX_VG2_2Z2Z_S
2181209888U, // FMAX_VG2_2ZZ_D
2183323424U, // FMAX_VG2_2ZZ_H
2185436960U, // FMAX_VG2_2ZZ_S
2181209888U, // FMAX_VG4_4Z4Z_D
2183323424U, // FMAX_VG4_4Z4Z_H
2185436960U, // FMAX_VG4_4Z4Z_S
2181209888U, // FMAX_VG4_4ZZ_D
2183323424U, // FMAX_VG4_4ZZ_H
2185436960U, // FMAX_VG4_4ZZ_S
3223379744U, // FMAX_ZPmI_D
3519094560U, // FMAX_ZPmI_H
3223412512U, // FMAX_ZPmI_S
3223379744U, // FMAX_ZPmZ_D
3519094560U, // FMAX_ZPmZ_H
3223412512U, // FMAX_ZPmZ_S
813801248U, // FMAXv2f32
815898400U, // FMAXv2f64
817995552U, // FMAXv4f16
820092704U, // FMAXv4f32
822189856U, // FMAXv8f16
2118670U, // FMINDrr
2118670U, // FMINHrr
2118601U, // FMINNMDrr
2118601U, // FMINNMHrr
3223377291U, // FMINNMP_ZPmZZ_D
3519092107U, // FMINNMP_ZPmZZ_H
3223410059U, // FMINNMP_ZPmZZ_S
813798795U, // FMINNMPv2f32
815895947U, // FMINNMPv2f64
807425419U, // FMINNMPv2i16p
807425419U, // FMINNMPv2i32p
807425419U, // FMINNMPv2i64p
817993099U, // FMINNMPv4f16
820090251U, // FMINNMPv4f32
822187403U, // FMINNMPv8f16
3231817066U, // FMINNMQV_D
3238108522U, // FMINNMQV_H
3236011370U, // FMINNMQV_S
2118601U, // FMINNMSrr
1657019669U, // FMINNMV_VPZ_D
1659133205U, // FMINNMV_VPZ_H
1638178069U, // FMINNMV_VPZ_S
807427349U, // FMINNMVv4i16v
807427349U, // FMINNMVv4i32v
807427349U, // FMINNMVv8i16v
2181206985U, // FMINNM_VG2_2Z2Z_D
2183320521U, // FMINNM_VG2_2Z2Z_H
2185434057U, // FMINNM_VG2_2Z2Z_S
2181206985U, // FMINNM_VG2_2ZZ_D
2183320521U, // FMINNM_VG2_2ZZ_H
2185434057U, // FMINNM_VG2_2ZZ_S
2181206985U, // FMINNM_VG4_4Z4Z_D
2183320521U, // FMINNM_VG4_4Z4Z_H
2185434057U, // FMINNM_VG4_4Z4Z_S
2181206985U, // FMINNM_VG4_4ZZ_D
2183320521U, // FMINNM_VG4_4ZZ_H
2185434057U, // FMINNM_VG4_4ZZ_S
3223376841U, // FMINNM_ZPmI_D
3519091657U, // FMINNM_ZPmI_H
3223409609U, // FMINNM_ZPmI_S
3223376841U, // FMINNM_ZPmZ_D
3519091657U, // FMINNM_ZPmZ_H
3223409609U, // FMINNM_ZPmZ_S
813798345U, // FMINNMv2f32
815895497U, // FMINNMv2f64
817992649U, // FMINNMv4f16
820089801U, // FMINNMv4f32
822186953U, // FMINNMv8f16
3223377315U, // FMINP_ZPmZZ_D
3519092131U, // FMINP_ZPmZZ_H
3223410083U, // FMINP_ZPmZZ_S
813798819U, // FMINPv2f32
815895971U, // FMINPv2f64
807425443U, // FMINPv2i16p
807425443U, // FMINPv2i32p
807425443U, // FMINPv2i64p
817993123U, // FMINPv4f16
820090275U, // FMINPv4f32
822187427U, // FMINPv8f16
3231817086U, // FMINQV_D
3238108542U, // FMINQV_H
3236011390U, // FMINQV_S
2118670U, // FMINSrr
1657019687U, // FMINV_VPZ_D
1659133223U, // FMINV_VPZ_H
1638178087U, // FMINV_VPZ_S
807427367U, // FMINVv4i16v
807427367U, // FMINVv4i32v
807427367U, // FMINVv8i16v
2181207054U, // FMIN_VG2_2Z2Z_D
2183320590U, // FMIN_VG2_2Z2Z_H
2185434126U, // FMIN_VG2_2Z2Z_S
2181207054U, // FMIN_VG2_2ZZ_D
2183320590U, // FMIN_VG2_2ZZ_H
2185434126U, // FMIN_VG2_2ZZ_S
2181207054U, // FMIN_VG4_4Z4Z_D
2183320590U, // FMIN_VG4_4Z4Z_H
2185434126U, // FMIN_VG4_4Z4Z_S
2181207054U, // FMIN_VG4_4ZZ_D
2183320590U, // FMIN_VG4_4ZZ_H
2185434126U, // FMIN_VG4_4ZZ_S
3223376910U, // FMIN_ZPmI_D
3519091726U, // FMIN_ZPmI_H
3223409678U, // FMIN_ZPmI_S
3223376910U, // FMIN_ZPmZ_D
3519091726U, // FMIN_ZPmZ_H
3223409678U, // FMIN_ZPmZ_S
813798414U, // FMINv2f32
815895566U, // FMINv2f64
817992718U, // FMINv4f16
820089870U, // FMINv4f32
822187022U, // FMINv8f16
2961309920U, // FMLAL2lanev4f16
2967601376U, // FMLAL2lanev8f16
2961309920U, // FMLAL2v4f16
2967601376U, // FMLAL2v8f16
2686535186U, // FMLALB_ZZZI_SHH
2686535186U, // FMLALB_ZZZ_SHH
2686540417U, // FMLALT_ZZZI_SHH
2686540417U, // FMLALT_ZZZ_SHH
1396936733U, // FMLAL_MZZI_S
1396936733U, // FMLAL_MZZ_S
3812855837U, // FMLAL_VG2_M2Z2Z_S
3812855837U, // FMLAL_VG2_M2ZZI_S
3812855837U, // FMLAL_VG2_M2ZZ_S
4081291293U, // FMLAL_VG4_M4Z4Z_S
4081291293U, // FMLAL_VG4_M4ZZI_S
4081291293U, // FMLAL_VG4_M4ZZ_S
2961313821U, // FMLALlanev4f16
2967605277U, // FMLALlanev8f16
2961313821U, // FMLALv4f16
2967605277U, // FMLALv8f16
3798156049U, // FMLA_VG2_M2Z2Z_D
3798172433U, // FMLA_VG2_M2Z2Z_S
2198176529U, // FMLA_VG2_M2Z4Z_H
3798156049U, // FMLA_VG2_M2ZZI_D
2198176529U, // FMLA_VG2_M2ZZI_H
3798172433U, // FMLA_VG2_M2ZZI_S
3798156049U, // FMLA_VG2_M2ZZ_D
2198176529U, // FMLA_VG2_M2ZZ_H
3798172433U, // FMLA_VG2_M2ZZ_S
4066591505U, // FMLA_VG4_M4Z4Z_D
2200273681U, // FMLA_VG4_M4Z4Z_H
4066607889U, // FMLA_VG4_M4Z4Z_S
4066591505U, // FMLA_VG4_M4ZZI_D
2200273681U, // FMLA_VG4_M4ZZI_H
4066607889U, // FMLA_VG4_M4ZZI_S
4066591505U, // FMLA_VG4_M4ZZ_D
2200273681U, // FMLA_VG4_M4ZZ_H
4066607889U, // FMLA_VG4_M4ZZ_S
3223372561U, // FMLA_ZPmZZ_D
3519087377U, // FMLA_ZPmZZ_H
3223405329U, // FMLA_ZPmZZ_S
1075888913U, // FMLA_ZZZI_D
2195784465U, // FMLA_ZZZI_H
1344357137U, // FMLA_ZZZI_S
807715601U, // FMLAv1i16_indexed
807715601U, // FMLAv1i32_indexed
807715601U, // FMLAv1i64_indexed
2961310481U, // FMLAv2f32
2963407633U, // FMLAv2f64
2961310481U, // FMLAv2i32_indexed
2963407633U, // FMLAv2i64_indexed
2965504785U, // FMLAv4f16
2967601937U, // FMLAv4f32
2965504785U, // FMLAv4i16_indexed
2967601937U, // FMLAv4i32_indexed
2969699089U, // FMLAv8f16
2969699089U, // FMLAv8i16_indexed
2961310052U, // FMLSL2lanev4f16
2967601508U, // FMLSL2lanev8f16
2961310052U, // FMLSL2v4f16
2967601508U, // FMLSL2v8f16
2686535484U, // FMLSLB_ZZZI_SHH
2686535484U, // FMLSLB_ZZZ_SHH
2686540592U, // FMLSLT_ZZZI_SHH
2686540592U, // FMLSLT_ZZZ_SHH
1396937492U, // FMLSL_MZZI_S
1396937492U, // FMLSL_MZZ_S
3812856596U, // FMLSL_VG2_M2Z2Z_S
3812856596U, // FMLSL_VG2_M2ZZI_S
3812856596U, // FMLSL_VG2_M2ZZ_S
4081292052U, // FMLSL_VG4_M4Z4Z_S
4081292052U, // FMLSL_VG4_M4ZZI_S
4081292052U, // FMLSL_VG4_M4ZZ_S
2961314580U, // FMLSLlanev4f16
2967606036U, // FMLSLlanev8f16
2961314580U, // FMLSLv4f16
2967606036U, // FMLSLv8f16
3798161706U, // FMLS_VG2_M2Z2Z_D
2198182186U, // FMLS_VG2_M2Z2Z_H
3798178090U, // FMLS_VG2_M2Z2Z_S
3798161706U, // FMLS_VG2_M2ZZI_D
2198182186U, // FMLS_VG2_M2ZZI_H
3798178090U, // FMLS_VG2_M2ZZI_S
3798161706U, // FMLS_VG2_M2ZZ_D
2198182186U, // FMLS_VG2_M2ZZ_H
3798178090U, // FMLS_VG2_M2ZZ_S
2200279338U, // FMLS_VG4_M4Z2Z_H
4066597162U, // FMLS_VG4_M4Z4Z_D
4066613546U, // FMLS_VG4_M4Z4Z_S
4066597162U, // FMLS_VG4_M4ZZI_D
2200279338U, // FMLS_VG4_M4ZZI_H
4066613546U, // FMLS_VG4_M4ZZI_S
4066597162U, // FMLS_VG4_M4ZZ_D
2200279338U, // FMLS_VG4_M4ZZ_H
4066613546U, // FMLS_VG4_M4ZZ_S
3223378218U, // FMLS_ZPmZZ_D
3519093034U, // FMLS_ZPmZZ_H
3223410986U, // FMLS_ZPmZZ_S
1075894570U, // FMLS_ZZZI_D
2195790122U, // FMLS_ZZZI_H
1344362794U, // FMLS_ZZZI_S
807721258U, // FMLSv1i16_indexed
807721258U, // FMLSv1i32_indexed
807721258U, // FMLSv1i64_indexed
2961316138U, // FMLSv2f32
2963413290U, // FMLSv2f64
2961316138U, // FMLSv2i32_indexed
2963413290U, // FMLSv2i64_indexed
2965510442U, // FMLSv4f16
2967607594U, // FMLSv4f32
2965510442U, // FMLSv4i16_indexed
2967607594U, // FMLSv4i32_indexed
2969704746U, // FMLSv8f16
2969704746U, // FMLSv8i16_indexed
1075888920U, // FMMLA_ZZZ_D
1344357144U, // FMMLA_ZZZ_S
56738646U, // FMOPAL_MPPZZ
2168570710U, // FMOPA_MPPZZ_D
56738646U, // FMOPA_MPPZZ_H
2170667862U, // FMOPA_MPPZZ_S
56744311U, // FMOPSL_MPPZZ
2168576375U, // FMOPS_MPPZZ_D
56744311U, // FMOPS_MPPZZ_H
2170673527U, // FMOPS_MPPZZ_S
807427395U, // FMOVDXHighr
2121027U, // FMOVDXr
3223346499U, // FMOVDi
2121027U, // FMOVDr
2121027U, // FMOVHWr
2121027U, // FMOVHXr
3223346499U, // FMOVHi
2121027U, // FMOVHr
2121027U, // FMOVSWr
3223346499U, // FMOVSi
2121027U, // FMOVSr
2121027U, // FMOVWHr
2121027U, // FMOVWSr
77700419U, // FMOVXDHighr
2121027U, // FMOVXDr
2121027U, // FMOVXHr
3229719875U, // FMOVv2f32_ns
3231817027U, // FMOVv2f64_ns
3233914179U, // FMOVv4f16_ns
3236011331U, // FMOVv4f32_ns
3238108483U, // FMOVv8f16_ns
3223374033U, // FMSB_ZPmZZ_D
3519088849U, // FMSB_ZPmZZ_H
3223406801U, // FMSB_ZPmZZ_S
2115923U, // FMSUBDrrr
2115923U, // FMSUBHrrr
2115923U, // FMSUBSrrr
2118482U, // FMULDrr
2118482U, // FMULHrr
2118482U, // FMULSrr
2121563U, // FMULX16
2121563U, // FMULX32
2121563U, // FMULX64
3223379803U, // FMULX_ZPmZ_D
3519094619U, // FMULX_ZPmZ_H
3223412571U, // FMULX_ZPmZ_S
2121563U, // FMULXv1i16_indexed
2121563U, // FMULXv1i32_indexed
2121563U, // FMULXv1i64_indexed
813801307U, // FMULXv2f32
815898459U, // FMULXv2f64
813801307U, // FMULXv2i32_indexed
815898459U, // FMULXv2i64_indexed
817995611U, // FMULXv4f16
820092763U, // FMULXv4f32
817995611U, // FMULXv4i16_indexed
820092763U, // FMULXv4i32_indexed
822189915U, // FMULXv8f16
822189915U, // FMULXv8i16_indexed
3223376722U, // FMUL_ZPmI_D
3519091538U, // FMUL_ZPmI_H
3223409490U, // FMUL_ZPmI_S
3223376722U, // FMUL_ZPmZ_D
3519091538U, // FMUL_ZPmZ_H
3223409490U, // FMUL_ZPmZ_S
2418070354U, // FMUL_ZZZI_D
2189497170U, // FMUL_ZZZI_H
270619474U, // FMUL_ZZZI_S
2418070354U, // FMUL_ZZZ_D
2189497170U, // FMUL_ZZZ_H
270619474U, // FMUL_ZZZ_S
2118482U, // FMULv1i16_indexed
2118482U, // FMULv1i32_indexed
2118482U, // FMULv1i64_indexed
813798226U, // FMULv2f32
815895378U, // FMULv2f64
813798226U, // FMULv2i32_indexed
815895378U, // FMULv2i64_indexed
817992530U, // FMULv4f16
820089682U, // FMULv4f32
817992530U, // FMULv4i16_indexed
820089682U, // FMULv4i32_indexed
822186834U, // FMULv8f16
822186834U, // FMULv8i16_indexed
2116628U, // FNEGDr
2116628U, // FNEGHr
2116628U, // FNEGSr
270584852U, // FNEG_ZPmZ_D
541133844U, // FNEG_ZPmZ_H
270617620U, // FNEG_ZPmZ_S
813796372U, // FNEGv2f32
815893524U, // FNEGv2f64
817990676U, // FNEGv4f16
820087828U, // FNEGv4f32
822184980U, // FNEGv8f16
2116317U, // FNMADDDrrr
2116317U, // FNMADDHrrr
2116317U, // FNMADDSrrr
3223374420U, // FNMAD_ZPmZZ_D
3519089236U, // FNMAD_ZPmZZ_H
3223407188U, // FNMAD_ZPmZZ_S
3223372590U, // FNMLA_ZPmZZ_D
3519087406U, // FNMLA_ZPmZZ_H
3223405358U, // FNMLA_ZPmZZ_S
3223378224U, // FNMLS_ZPmZZ_D
3519093040U, // FNMLS_ZPmZZ_H
3223410992U, // FNMLS_ZPmZZ_S
3223374039U, // FNMSB_ZPmZZ_D
3519088855U, // FNMSB_ZPmZZ_H
3223406807U, // FNMSB_ZPmZZ_S
2115930U, // FNMSUBDrrr
2115930U, // FNMSUBHrrr
2115930U, // FNMSUBSrrr
2118488U, // FNMULDrr
2118488U, // FNMULHrr
2118488U, // FNMULSrr
2418068370U, // FRECPE_ZZ_D
1652624274U, // FRECPE_ZZ_H
270617490U, // FRECPE_ZZ_S
2116498U, // FRECPEv1f16
2116498U, // FRECPEv1i32
2116498U, // FRECPEv1i64
813796242U, // FRECPEv2f32
815893394U, // FRECPEv2f64
817990546U, // FRECPEv4f16
820087698U, // FRECPEv4f32
822184850U, // FRECPEv8f16
2120039U, // FRECPS16
2120039U, // FRECPS32
2120039U, // FRECPS64
2418071911U, // FRECPS_ZZZ_D
2189498727U, // FRECPS_ZZZ_H
270621031U, // FRECPS_ZZZ_S
813799783U, // FRECPSv2f32
815896935U, // FRECPSv2f64
817994087U, // FRECPSv4f16
820091239U, // FRECPSv4f32
822188391U, // FRECPSv8f16
270589794U, // FRECPX_ZPmZ_D
541138786U, // FRECPX_ZPmZ_H
270622562U, // FRECPX_ZPmZ_S
2121570U, // FRECPXv1f16
2121570U, // FRECPXv1i32
2121570U, // FRECPXv1i64
2121477U, // FRINT32XDr
2121477U, // FRINT32XSr
813801221U, // FRINT32Xv2f32
815898373U, // FRINT32Xv2f64
820092677U, // FRINT32Xv4f32
2121608U, // FRINT32ZDr
2121608U, // FRINT32ZSr
813801352U, // FRINT32Zv2f32
815898504U, // FRINT32Zv2f64
820092808U, // FRINT32Zv4f32
2121487U, // FRINT64XDr
2121487U, // FRINT64XSr
813801231U, // FRINT64Xv2f32
815898383U, // FRINT64Xv2f64
820092687U, // FRINT64Xv4f32
2121618U, // FRINT64ZDr
2121618U, // FRINT64ZSr
813801362U, // FRINT64Zv2f32
815898514U, // FRINT64Zv2f64
820092818U, // FRINT64Zv4f32
2114648U, // FRINTADr
2114648U, // FRINTAHr
2114648U, // FRINTASr
1648559192U, // FRINTA_2Z2Z_S
1648559192U, // FRINTA_4Z4Z_S
270582872U, // FRINTA_ZPmZ_D
541131864U, // FRINTA_ZPmZ_H
270615640U, // FRINTA_ZPmZ_S
813794392U, // FRINTAv2f32
815891544U, // FRINTAv2f64
817988696U, // FRINTAv4f16
820085848U, // FRINTAv4f32
822183000U, // FRINTAv8f16
2117589U, // FRINTIDr
2117589U, // FRINTIHr
2117589U, // FRINTISr
270585813U, // FRINTI_ZPmZ_D
541134805U, // FRINTI_ZPmZ_H
270618581U, // FRINTI_ZPmZ_S
813797333U, // FRINTIv2f32
815894485U, // FRINTIv2f64
817991637U, // FRINTIv4f16
820088789U, // FRINTIv4f32
822185941U, // FRINTIv8f16
2118624U, // FRINTMDr
2118624U, // FRINTMHr
2118624U, // FRINTMSr
1648563168U, // FRINTM_2Z2Z_S
1648563168U, // FRINTM_4Z4Z_S
270586848U, // FRINTM_ZPmZ_D
541135840U, // FRINTM_ZPmZ_H
270619616U, // FRINTM_ZPmZ_S
813798368U, // FRINTMv2f32
815895520U, // FRINTMv2f64
817992672U, // FRINTMv4f16
820089824U, // FRINTMv4f32
822186976U, // FRINTMv8f16
2118748U, // FRINTNDr
2118748U, // FRINTNHr
2118748U, // FRINTNSr
1648563292U, // FRINTN_2Z2Z_S
1648563292U, // FRINTN_4Z4Z_S
270586972U, // FRINTN_ZPmZ_D
541135964U, // FRINTN_ZPmZ_H
270619740U, // FRINTN_ZPmZ_S
813798492U, // FRINTNv2f32
815895644U, // FRINTNv2f64
817992796U, // FRINTNv4f16
820089948U, // FRINTNv4f32
822187100U, // FRINTNv8f16
2119226U, // FRINTPDr
2119226U, // FRINTPHr
2119226U, // FRINTPSr
1648563770U, // FRINTP_2Z2Z_S
1648563770U, // FRINTP_4Z4Z_S
270587450U, // FRINTP_ZPmZ_D
541136442U, // FRINTP_ZPmZ_H
270620218U, // FRINTP_ZPmZ_S
813798970U, // FRINTPv2f32
815896122U, // FRINTPv2f64
817993274U, // FRINTPv4f16
820090426U, // FRINTPv4f32
822187578U, // FRINTPv8f16
2121578U, // FRINTXDr
2121578U, // FRINTXHr
2121578U, // FRINTXSr
270589802U, // FRINTX_ZPmZ_D
541138794U, // FRINTX_ZPmZ_H
270622570U, // FRINTX_ZPmZ_S
813801322U, // FRINTXv2f32
815898474U, // FRINTXv2f64
817995626U, // FRINTXv4f16
820092778U, // FRINTXv4f32
822189930U, // FRINTXv8f16
2121697U, // FRINTZDr
2121697U, // FRINTZHr
2121697U, // FRINTZSr
270589921U, // FRINTZ_ZPmZ_D
541138913U, // FRINTZ_ZPmZ_H
270622689U, // FRINTZ_ZPmZ_S
813801441U, // FRINTZv2f32
815898593U, // FRINTZv2f64
817995745U, // FRINTZv4f16
820092897U, // FRINTZv4f32
822190049U, // FRINTZv8f16
2418068415U, // FRSQRTE_ZZ_D
1652624319U, // FRSQRTE_ZZ_H
270617535U, // FRSQRTE_ZZ_S
2116543U, // FRSQRTEv1f16
2116543U, // FRSQRTEv1i32
2116543U, // FRSQRTEv1i64
813796287U, // FRSQRTEv2f32
815893439U, // FRSQRTEv2f64
817990591U, // FRSQRTEv4f16
820087743U, // FRSQRTEv4f32
822184895U, // FRSQRTEv8f16
2120123U, // FRSQRTS16
2120123U, // FRSQRTS32
2120123U, // FRSQRTS64
2418071995U, // FRSQRTS_ZZZ_D
2189498811U, // FRSQRTS_ZZZ_H
270621115U, // FRSQRTS_ZZZ_S
813799867U, // FRSQRTSv2f32
815897019U, // FRSQRTSv2f64
817994171U, // FRSQRTSv4f16
820091323U, // FRSQRTSv4f32
822188475U, // FRSQRTSv8f16
3223374684U, // FSCALE_ZPmZ_D
3519089500U, // FSCALE_ZPmZ_H
3223407452U, // FSCALE_ZPmZ_S
2120728U, // FSQRTDr
2120728U, // FSQRTHr
2120728U, // FSQRTSr
270588952U, // FSQRT_ZPmZ_D
541137944U, // FSQRT_ZPmZ_H
270621720U, // FSQRT_ZPmZ_S
813800472U, // FSQRTv2f32
815897624U, // FSQRTv2f64
817994776U, // FSQRTv4f16
820091928U, // FSQRTv4f32
822189080U, // FSQRTv8f16
2115903U, // FSUBDrr
2115903U, // FSUBHrr
3223377691U, // FSUBR_ZPmI_D
3519092507U, // FSUBR_ZPmI_H
3223410459U, // FSUBR_ZPmI_S
3223377691U, // FSUBR_ZPmZ_D
3519092507U, // FSUBR_ZPmZ_H
3223410459U, // FSUBR_ZPmZ_S
2115903U, // FSUBSrr
3798157631U, // FSUB_VG2_M2Z_D
1661307199U, // FSUB_VG2_M2Z_H
3798174015U, // FSUB_VG2_M2Z_S
4066593087U, // FSUB_VG4_M4Z_D
1663404351U, // FSUB_VG4_M4Z_H
4066609471U, // FSUB_VG4_M4Z_S
3223374143U, // FSUB_ZPmI_D
3519088959U, // FSUB_ZPmI_H
3223406911U, // FSUB_ZPmI_S
3223374143U, // FSUB_ZPmZ_D
3519088959U, // FSUB_ZPmZ_H
3223406911U, // FSUB_ZPmZ_S
2418067775U, // FSUB_ZZZ_D
2189494591U, // FSUB_ZZZ_H
270616895U, // FSUB_ZZZ_S
813795647U, // FSUBv2f32
815892799U, // FSUBv2f64
817989951U, // FSUBv4f16
820087103U, // FSUBv4f32
822184255U, // FSUBv8f16
2418068059U, // FTMAD_ZZI_D
2189494875U, // FTMAD_ZZI_H
270617179U, // FTMAD_ZZI_S
2418070373U, // FTSMUL_ZZZ_D
2189497189U, // FTSMUL_ZZZ_H
270619493U, // FTSMUL_ZZZ_S
2418069926U, // FTSSEL_ZZZ_D
2189496742U, // FTSSEL_ZZZ_H
270619046U, // FTSSEL_ZZZ_S
3798178803U, // FVDOT_VG2_M2ZZI_HtoS
3519186087U, // GLD1B_D_IMM_REAL
3519186087U, // GLD1B_D_REAL
3519186087U, // GLD1B_D_SXTW_REAL
3519186087U, // GLD1B_D_UXTW_REAL
3519218855U, // GLD1B_S_IMM_REAL
3519218855U, // GLD1B_S_SXTW_REAL
3519218855U, // GLD1B_S_UXTW_REAL
3519187454U, // GLD1D_IMM_REAL
3519187454U, // GLD1D_REAL
3519187454U, // GLD1D_SCALED_REAL
3519187454U, // GLD1D_SXTW_REAL
3519187454U, // GLD1D_SXTW_SCALED_REAL
3519187454U, // GLD1D_UXTW_REAL
3519187454U, // GLD1D_UXTW_SCALED_REAL
3519188040U, // GLD1H_D_IMM_REAL
3519188040U, // GLD1H_D_REAL
3519188040U, // GLD1H_D_SCALED_REAL
3519188040U, // GLD1H_D_SXTW_REAL
3519188040U, // GLD1H_D_SXTW_SCALED_REAL
3519188040U, // GLD1H_D_UXTW_REAL
3519188040U, // GLD1H_D_UXTW_SCALED_REAL
3519220808U, // GLD1H_S_IMM_REAL
3519220808U, // GLD1H_S_SXTW_REAL
3519220808U, // GLD1H_S_SXTW_SCALED_REAL
3519220808U, // GLD1H_S_UXTW_REAL
3519220808U, // GLD1H_S_UXTW_SCALED_REAL
3519518354U, // GLD1Q
3519187103U, // GLD1SB_D_IMM_REAL
3519187103U, // GLD1SB_D_REAL
3519187103U, // GLD1SB_D_SXTW_REAL
3519187103U, // GLD1SB_D_UXTW_REAL
3519219871U, // GLD1SB_S_IMM_REAL
3519219871U, // GLD1SB_S_SXTW_REAL
3519219871U, // GLD1SB_S_UXTW_REAL
3519188731U, // GLD1SH_D_IMM_REAL
3519188731U, // GLD1SH_D_REAL
3519188731U, // GLD1SH_D_SCALED_REAL
3519188731U, // GLD1SH_D_SXTW_REAL
3519188731U, // GLD1SH_D_SXTW_SCALED_REAL
3519188731U, // GLD1SH_D_UXTW_REAL
3519188731U, // GLD1SH_D_UXTW_SCALED_REAL
3519221499U, // GLD1SH_S_IMM_REAL
3519221499U, // GLD1SH_S_SXTW_REAL
3519221499U, // GLD1SH_S_SXTW_SCALED_REAL
3519221499U, // GLD1SH_S_UXTW_REAL
3519221499U, // GLD1SH_S_UXTW_SCALED_REAL
3519192723U, // GLD1SW_D_IMM_REAL
3519192723U, // GLD1SW_D_REAL
3519192723U, // GLD1SW_D_SCALED_REAL
3519192723U, // GLD1SW_D_SXTW_REAL
3519192723U, // GLD1SW_D_SXTW_SCALED_REAL
3519192723U, // GLD1SW_D_UXTW_REAL
3519192723U, // GLD1SW_D_UXTW_SCALED_REAL
3519192528U, // GLD1W_D_IMM_REAL
3519192528U, // GLD1W_D_REAL
3519192528U, // GLD1W_D_SCALED_REAL
3519192528U, // GLD1W_D_SXTW_REAL
3519192528U, // GLD1W_D_SXTW_SCALED_REAL
3519192528U, // GLD1W_D_UXTW_REAL
3519192528U, // GLD1W_D_UXTW_SCALED_REAL
3519225296U, // GLD1W_IMM_REAL
3519225296U, // GLD1W_SXTW_REAL
3519225296U, // GLD1W_SXTW_SCALED_REAL
3519225296U, // GLD1W_UXTW_REAL
3519225296U, // GLD1W_UXTW_SCALED_REAL
3519186093U, // GLDFF1B_D_IMM_REAL
3519186093U, // GLDFF1B_D_REAL
3519186093U, // GLDFF1B_D_SXTW_REAL
3519186093U, // GLDFF1B_D_UXTW_REAL
3519218861U, // GLDFF1B_S_IMM_REAL
3519218861U, // GLDFF1B_S_SXTW_REAL
3519218861U, // GLDFF1B_S_UXTW_REAL
3519187460U, // GLDFF1D_IMM_REAL
3519187460U, // GLDFF1D_REAL
3519187460U, // GLDFF1D_SCALED_REAL
3519187460U, // GLDFF1D_SXTW_REAL
3519187460U, // GLDFF1D_SXTW_SCALED_REAL
3519187460U, // GLDFF1D_UXTW_REAL
3519187460U, // GLDFF1D_UXTW_SCALED_REAL
3519188046U, // GLDFF1H_D_IMM_REAL
3519188046U, // GLDFF1H_D_REAL
3519188046U, // GLDFF1H_D_SCALED_REAL
3519188046U, // GLDFF1H_D_SXTW_REAL
3519188046U, // GLDFF1H_D_SXTW_SCALED_REAL
3519188046U, // GLDFF1H_D_UXTW_REAL
3519188046U, // GLDFF1H_D_UXTW_SCALED_REAL
3519220814U, // GLDFF1H_S_IMM_REAL
3519220814U, // GLDFF1H_S_SXTW_REAL
3519220814U, // GLDFF1H_S_SXTW_SCALED_REAL
3519220814U, // GLDFF1H_S_UXTW_REAL
3519220814U, // GLDFF1H_S_UXTW_SCALED_REAL
3519187110U, // GLDFF1SB_D_IMM_REAL
3519187110U, // GLDFF1SB_D_REAL
3519187110U, // GLDFF1SB_D_SXTW_REAL
3519187110U, // GLDFF1SB_D_UXTW_REAL
3519219878U, // GLDFF1SB_S_IMM_REAL
3519219878U, // GLDFF1SB_S_SXTW_REAL
3519219878U, // GLDFF1SB_S_UXTW_REAL
3519188738U, // GLDFF1SH_D_IMM_REAL
3519188738U, // GLDFF1SH_D_REAL
3519188738U, // GLDFF1SH_D_SCALED_REAL
3519188738U, // GLDFF1SH_D_SXTW_REAL
3519188738U, // GLDFF1SH_D_SXTW_SCALED_REAL
3519188738U, // GLDFF1SH_D_UXTW_REAL
3519188738U, // GLDFF1SH_D_UXTW_SCALED_REAL
3519221506U, // GLDFF1SH_S_IMM_REAL
3519221506U, // GLDFF1SH_S_SXTW_REAL
3519221506U, // GLDFF1SH_S_SXTW_SCALED_REAL
3519221506U, // GLDFF1SH_S_UXTW_REAL
3519221506U, // GLDFF1SH_S_UXTW_SCALED_REAL
3519192730U, // GLDFF1SW_D_IMM_REAL
3519192730U, // GLDFF1SW_D_REAL
3519192730U, // GLDFF1SW_D_SCALED_REAL
3519192730U, // GLDFF1SW_D_SXTW_REAL
3519192730U, // GLDFF1SW_D_SXTW_SCALED_REAL
3519192730U, // GLDFF1SW_D_UXTW_REAL
3519192730U, // GLDFF1SW_D_UXTW_SCALED_REAL
3519192534U, // GLDFF1W_D_IMM_REAL
3519192534U, // GLDFF1W_D_REAL
3519192534U, // GLDFF1W_D_SCALED_REAL
3519192534U, // GLDFF1W_D_SXTW_REAL
3519192534U, // GLDFF1W_D_SXTW_SCALED_REAL
3519192534U, // GLDFF1W_D_UXTW_REAL
3519192534U, // GLDFF1W_D_UXTW_SCALED_REAL
3519225302U, // GLDFF1W_IMM_REAL
3519225302U, // GLDFF1W_SXTW_REAL
3519225302U, // GLDFF1W_SXTW_SCALED_REAL
3519225302U, // GLDFF1W_UXTW_REAL
3519225302U, // GLDFF1W_UXTW_SCALED_REAL
2117573U, // GMI
514923U, // HINT
3223378768U, // HISTCNT_ZPzZZ_D
3223411536U, // HISTCNT_ZPzZZ_S
2133032U, // HISTSEG_ZZZ
383712U, // HLT
379380U, // HVC
270550440U, // INCB_XPiI
270551693U, // INCD_XPiI
270584461U, // INCD_ZPiI
270552380U, // INCH_XPiI
58789180U, // INCH_ZPiI
2118931U, // INCP_XP_B
2418038035U, // INCP_XP_D
1881167123U, // INCP_XP_H
270554387U, // INCP_XP_S
1075893523U, // INCP_ZP_D
1658918163U, // INCP_ZP_H
1344361747U, // INCP_ZP_S
270556753U, // INCW_XPiI
270622289U, // INCW_ZPiI
3760234308U, // INDEX_II_B
2154308U, // INDEX_II_D
4106297156U, // INDEX_II_H
2187076U, // INDEX_II_S
3760234308U, // INDEX_IR_B
2154308U, // INDEX_IR_D
885071684U, // INDEX_IR_H
2187076U, // INDEX_IR_S
2137924U, // INDEX_RI_B
2154308U, // INDEX_RI_D
2210471748U, // INDEX_RI_H
2187076U, // INDEX_RI_S
2137924U, // INDEX_RR_B
2154308U, // INDEX_RR_D
2210471748U, // INDEX_RR_H
2187076U, // INDEX_RR_S
2229797999U, // INSERT_MXIPZ_H_B
2229797999U, // INSERT_MXIPZ_H_D
2229797999U, // INSERT_MXIPZ_H_H
2229797999U, // INSERT_MXIPZ_H_Q
2229797999U, // INSERT_MXIPZ_H_S
2229814383U, // INSERT_MXIPZ_V_B
2229814383U, // INSERT_MXIPZ_V_D
2229814383U, // INSERT_MXIPZ_V_H
2229814383U, // INSERT_MXIPZ_V_Q
2229814383U, // INSERT_MXIPZ_V_S
807442468U, // INSR_ZR_B
807458852U, // INSR_ZR_D
1692473380U, // INSR_ZR_H
807491620U, // INSR_ZR_S
2136100U, // INSR_ZV_B
270587940U, // INSR_ZV_D
1679890468U, // INSR_ZV_H
539056164U, // INSR_ZV_S
84023622U, // INSvi16gpr
889329990U, // INSvi16lane
86120774U, // INSvi32gpr
891427142U, // INSvi32lane
77732166U, // INSvi64gpr
883038534U, // INSvi64lane
88217926U, // INSvi8gpr
893524294U, // INSvi8lane
2116657U, // IRG
444620U, // ISB
3223340129U, // LASTA_RPZ_B
3223340129U, // LASTA_RPZ_D
3223340129U, // LASTA_RPZ_H
3223340129U, // LASTA_RPZ_S
3223340129U, // LASTA_VPZ_B
3223340129U, // LASTA_VPZ_D
3223340129U, // LASTA_VPZ_H
3223340129U, // LASTA_VPZ_S
3223341355U, // LASTB_RPZ_B
3223341355U, // LASTB_RPZ_D
3223341355U, // LASTB_RPZ_H
3223341355U, // LASTB_RPZ_S
3223341355U, // LASTB_VPZ_B
3223341355U, // LASTB_VPZ_D
3223341355U, // LASTB_VPZ_H
3223341355U, // LASTB_VPZ_S
3519169703U, // LD1B
3579987111U, // LD1B_2Z
3579987111U, // LD1B_2Z_IMM
3579987111U, // LD1B_4Z
3579987111U, // LD1B_4Z_IMM
3519186087U, // LD1B_D
3519186087U, // LD1B_D_IMM_REAL
3519202471U, // LD1B_H
3519202471U, // LD1B_H_IMM_REAL
3519169703U, // LD1B_IMM_REAL
3519218855U, // LD1B_S
3519218855U, // LD1B_S_IMM_REAL
1076397223U, // LD1B_VG2_M2ZPXI
1076397223U, // LD1B_VG2_M2ZPXX
3579987111U, // LD1B_VG4_M4ZPXI
3579987111U, // LD1B_VG4_M4ZPXX
3519187454U, // LD1D
3580004862U, // LD1D_2Z
3580004862U, // LD1D_2Z_IMM
3580004862U, // LD1D_4Z
3580004862U, // LD1D_4Z_IMM
3519187454U, // LD1D_IMM_REAL
3519515134U, // LD1D_Q
3519515134U, // LD1D_Q_IMM
3580004862U, // LD1D_VG2_M2ZPXI
3580004862U, // LD1D_VG2_M2ZPXX
3580004862U, // LD1D_VG4_M4ZPXI
3580004862U, // LD1D_VG4_M4ZPXX
573481U, // LD1Fourv16b
92864553U, // LD1Fourv16b_POST
606249U, // LD1Fourv1d
94994473U, // LD1Fourv1d_POST
639017U, // LD1Fourv2d
92930089U, // LD1Fourv2d_POST
671785U, // LD1Fourv2s
95060009U, // LD1Fourv2s_POST
704553U, // LD1Fourv4h
95092777U, // LD1Fourv4h_POST
737321U, // LD1Fourv4s
93028393U, // LD1Fourv4s_POST
770089U, // LD1Fourv8b
95158313U, // LD1Fourv8b_POST
802857U, // LD1Fourv8h
93093929U, // LD1Fourv8h_POST
3519204424U, // LD1H
3580021832U, // LD1H_2Z
3580021832U, // LD1H_2Z_IMM
3580021832U, // LD1H_4Z
3580021832U, // LD1H_4Z_IMM
3519188040U, // LD1H_D
3519188040U, // LD1H_D_IMM_REAL
3519204424U, // LD1H_IMM_REAL
3519220808U, // LD1H_S
3519220808U, // LD1H_S_IMM_REAL
1076677704U, // LD1H_VG2_M2ZPXI
1076677704U, // LD1H_VG2_M2ZPXX
3580021832U, // LD1H_VG4_M4ZPXI
3580021832U, // LD1H_VG4_M4ZPXX
573481U, // LD1Onev16b
97058857U, // LD1Onev16b_POST
606249U, // LD1Onev1d
99188777U, // LD1Onev1d_POST
639017U, // LD1Onev2d
97124393U, // LD1Onev2d_POST
671785U, // LD1Onev2s
99254313U, // LD1Onev2s_POST
704553U, // LD1Onev4h
99287081U, // LD1Onev4h_POST
737321U, // LD1Onev4s
97222697U, // LD1Onev4s_POST
770089U, // LD1Onev8b
99352617U, // LD1Onev8b_POST
802857U, // LD1Onev8h
97288233U, // LD1Onev8h_POST
3519186955U, // LD1RB_D_IMM
3519203339U, // LD1RB_H_IMM
3519170571U, // LD1RB_IMM
3519219723U, // LD1RB_S_IMM
3519187729U, // LD1RD_IMM
3519188583U, // LD1RH_D_IMM
3519204967U, // LD1RH_IMM
3519221351U, // LD1RH_S_IMM
3519170542U, // LD1RO_B
3519170542U, // LD1RO_B_IMM
3519187713U, // LD1RO_D
3519187713U, // LD1RO_D_IMM
3519204945U, // LD1RO_H
3519204945U, // LD1RO_H_IMM
3519225459U, // LD1RO_W
3519225459U, // LD1RO_W_IMM
3519170563U, // LD1RQ_B
3519170563U, // LD1RQ_B_IMM
3519187721U, // LD1RQ_D
3519187721U, // LD1RQ_D_IMM
3519204959U, // LD1RQ_H
3519204959U, // LD1RQ_H_IMM
3519225467U, // LD1RQ_W
3519225467U, // LD1RQ_W_IMM
3519187166U, // LD1RSB_D_IMM
3519203550U, // LD1RSB_H_IMM
3519219934U, // LD1RSB_S_IMM
3519188781U, // LD1RSH_D_IMM
3519221549U, // LD1RSH_S_IMM
3519192764U, // LD1RSW_IMM
3519192707U, // LD1RW_D_IMM
3519225475U, // LD1RW_IMM
579313U, // LD1Rv16b
101258993U, // LD1Rv16b_POST
612081U, // LD1Rv1d
99194609U, // LD1Rv1d_POST
644849U, // LD1Rv2d
99227377U, // LD1Rv2d_POST
677617U, // LD1Rv2s
103454449U, // LD1Rv2s_POST
710385U, // LD1Rv4h
105584369U, // LD1Rv4h_POST
743153U, // LD1Rv4s
103519985U, // LD1Rv4s_POST
775921U, // LD1Rv8b
101455601U, // LD1Rv8b_POST
808689U, // LD1Rv8h
105682673U, // LD1Rv8h_POST
3519187103U, // LD1SB_D
3519187103U, // LD1SB_D_IMM_REAL
3519203487U, // LD1SB_H
3519203487U, // LD1SB_H_IMM_REAL
3519219871U, // LD1SB_S
3519219871U, // LD1SB_S_IMM_REAL
3519188731U, // LD1SH_D
3519188731U, // LD1SH_D_IMM_REAL
3519221499U, // LD1SH_S
3519221499U, // LD1SH_S_IMM_REAL
3519192723U, // LD1SW_D
3519192723U, // LD1SW_D_IMM_REAL
573481U, // LD1Threev16b
107544617U, // LD1Threev16b_POST
606249U, // LD1Threev1d
109674537U, // LD1Threev1d_POST
639017U, // LD1Threev2d
107610153U, // LD1Threev2d_POST
671785U, // LD1Threev2s
109740073U, // LD1Threev2s_POST
704553U, // LD1Threev4h
109772841U, // LD1Threev4h_POST
737321U, // LD1Threev4s
107708457U, // LD1Threev4s_POST
770089U, // LD1Threev8b
109838377U, // LD1Threev8b_POST
802857U, // LD1Threev8h
107773993U, // LD1Threev8h_POST
573481U, // LD1Twov16b
94961705U, // LD1Twov16b_POST
606249U, // LD1Twov1d
97091625U, // LD1Twov1d_POST
639017U, // LD1Twov2d
95027241U, // LD1Twov2d_POST
671785U, // LD1Twov2s
97157161U, // LD1Twov2s_POST
704553U, // LD1Twov4h
97189929U, // LD1Twov4h_POST
737321U, // LD1Twov4s
95125545U, // LD1Twov4s_POST
770089U, // LD1Twov8b
97255465U, // LD1Twov8b_POST
802857U, // LD1Twov8h
95191081U, // LD1Twov8h_POST
3519225296U, // LD1W
3580042704U, // LD1W_2Z
3580042704U, // LD1W_2Z_IMM
3580042704U, // LD1W_4Z
3580042704U, // LD1W_4Z_IMM
3519192528U, // LD1W_D
3519192528U, // LD1W_D_IMM_REAL
3519225296U, // LD1W_IMM_REAL
3519520208U, // LD1W_Q
3519520208U, // LD1W_Q_IMM
3580042704U, // LD1W_VG2_M2ZPXI
3580042704U, // LD1W_VG2_M2ZPXX
3580042704U, // LD1W_VG4_M4ZPXI
3580042704U, // LD1W_VG4_M4ZPXX
2210932325U, // LD1_MXIPXX_H_B
2210932339U, // LD1_MXIPXX_H_D
2210932353U, // LD1_MXIPXX_H_H
2210932367U, // LD1_MXIPXX_H_Q
2210932381U, // LD1_MXIPXX_H_S
2210948709U, // LD1_MXIPXX_V_B
2210948723U, // LD1_MXIPXX_V_D
2210948737U, // LD1_MXIPXX_V_H
2210948751U, // LD1_MXIPXX_V_Q
2210948765U, // LD1_MXIPXX_V_S
112001065U, // LD1i16
114114601U, // LD1i16_POST
112033833U, // LD1i32
116244521U, // LD1i32_POST
112066601U, // LD1i64
118374441U, // LD1i64_POST
112099369U, // LD1i8
120504361U, // LD1i8_POST
3519169764U, // LD2B
3519169764U, // LD2B_IMM
3519187498U, // LD2D
3519187498U, // LD2D_IMM
3519204485U, // LD2H
3519204485U, // LD2H_IMM
3519518366U, // LD2Q
3519518366U, // LD2Q_IMM
579319U, // LD2Rv16b
105453303U, // LD2Rv16b_POST
612087U, // LD2Rv1d
97097463U, // LD2Rv1d_POST
644855U, // LD2Rv2d
97130231U, // LD2Rv2d_POST
677623U, // LD2Rv2s
99260151U, // LD2Rv2s_POST
710391U, // LD2Rv4h
103487223U, // LD2Rv4h_POST
743159U, // LD2Rv4s
99325687U, // LD2Rv4s_POST
775927U, // LD2Rv8b
105649911U, // LD2Rv8b_POST
808695U, // LD2Rv8h
103585527U, // LD2Rv8h_POST
573606U, // LD2Twov16b
94961830U, // LD2Twov16b_POST
639142U, // LD2Twov2d
95027366U, // LD2Twov2d_POST
671910U, // LD2Twov2s
97157286U, // LD2Twov2s_POST
704678U, // LD2Twov4h
97190054U, // LD2Twov4h_POST
737446U, // LD2Twov4s
95125670U, // LD2Twov4s_POST
770214U, // LD2Twov8b
97255590U, // LD2Twov8b_POST
802982U, // LD2Twov8h
95191206U, // LD2Twov8h_POST
3519225348U, // LD2W
3519225348U, // LD2W_IMM
112001190U, // LD2i16
116211878U, // LD2i16_POST
112033958U, // LD2i32
118341798U, // LD2i32_POST
112066726U, // LD2i64
122568870U, // LD2i64_POST
112099494U, // LD2i8
114213030U, // LD2i8_POST
3519169785U, // LD3B
3519169785U, // LD3B_IMM
3519187510U, // LD3D
3519187510U, // LD3D_IMM
3519204497U, // LD3H
3519204497U, // LD3H_IMM
3519518378U, // LD3Q
3519518378U, // LD3Q_IMM
579325U, // LD3Rv16b
124327677U, // LD3Rv16b_POST
612093U, // LD3Rv1d
109680381U, // LD3Rv1d_POST
644861U, // LD3Rv2d
109713149U, // LD3Rv2d_POST
677629U, // LD3Rv2s
126523133U, // LD3Rv2s_POST
710397U, // LD3Rv4h
128653053U, // LD3Rv4h_POST
743165U, // LD3Rv4s
126588669U, // LD3Rv4s_POST
775933U, // LD3Rv8b
124524285U, // LD3Rv8b_POST
808701U, // LD3Rv8h
128751357U, // LD3Rv8h_POST
574035U, // LD3Threev16b
107545171U, // LD3Threev16b_POST
639571U, // LD3Threev2d
107610707U, // LD3Threev2d_POST
672339U, // LD3Threev2s
109740627U, // LD3Threev2s_POST
705107U, // LD3Threev4h
109773395U, // LD3Threev4h_POST
737875U, // LD3Threev4s
107709011U, // LD3Threev4s_POST
770643U, // LD3Threev8b
109838931U, // LD3Threev8b_POST
803411U, // LD3Threev8h
107774547U, // LD3Threev8h_POST
3519225360U, // LD3W
3519225360U, // LD3W_IMM
112001619U, // LD3i16
130892371U, // LD3i16_POST
112034387U, // LD3i32
133022291U, // LD3i32_POST
112067155U, // LD3i64
135152211U, // LD3i64_POST
112099923U, // LD3i8
137282131U, // LD3i8_POST
3519169811U, // LD4B
3519169811U, // LD4B_IMM
3519187522U, // LD4D
3519187522U, // LD4D_IMM
574065U, // LD4Fourv16b
92865137U, // LD4Fourv16b_POST
639601U, // LD4Fourv2d
92930673U, // LD4Fourv2d_POST
672369U, // LD4Fourv2s
95060593U, // LD4Fourv2s_POST
705137U, // LD4Fourv4h
95093361U, // LD4Fourv4h_POST
737905U, // LD4Fourv4s
93028977U, // LD4Fourv4s_POST
770673U, // LD4Fourv8b
95158897U, // LD4Fourv8b_POST
803441U, // LD4Fourv8h
93094513U, // LD4Fourv8h_POST
3519204509U, // LD4H
3519204509U, // LD4H_IMM
3519518390U, // LD4Q
3519518390U, // LD4Q_IMM
579331U, // LD4Rv16b
103356163U, // LD4Rv16b_POST
612099U, // LD4Rv1d
95000323U, // LD4Rv1d_POST
644867U, // LD4Rv2d
95033091U, // LD4Rv2d_POST
677635U, // LD4Rv2s
97163011U, // LD4Rv2s_POST
710403U, // LD4Rv4h
99292931U, // LD4Rv4h_POST
743171U, // LD4Rv4s
97228547U, // LD4Rv4s_POST
775939U, // LD4Rv8b
103552771U, // LD4Rv8b_POST
808707U, // LD4Rv8h
99391235U, // LD4Rv8h_POST
3519225372U, // LD4W
3519225372U, // LD4W_IMM
112001649U, // LD4i16
118309489U, // LD4i16_POST
112034417U, // LD4i32
122536561U, // LD4i32_POST
112067185U, // LD4i64
139346545U, // LD4i64_POST
112099953U, // LD4i8
116310641U, // LD4i8_POST
984325U, // LD64B
1344587039U, // LDADDAB
1344588978U, // LDADDAH
1344587261U, // LDADDALB
1344589152U, // LDADDALH
1344589834U, // LDADDALW
1344589834U, // LDADDALX
1344586449U, // LDADDAW
1344586449U, // LDADDAX
1344587197U, // LDADDB
1344589138U, // LDADDH
1344587442U, // LDADDLB
1344589252U, // LDADDLH
1344590186U, // LDADDLW
1344590186U, // LDADDLX
1344588458U, // LDADDW
1344588458U, // LDADDX
112066618U, // LDAP1
44058694U, // LDAPRB
44060322U, // LDAPRH
44062711U, // LDAPRW
849663991U, // LDAPRWpre
44062711U, // LDAPRX
849663991U, // LDAPRXpre
44058737U, // LDAPURBi
44060365U, // LDAPURHi
44058877U, // LDAPURSBWi
44058877U, // LDAPURSBXi
44060492U, // LDAPURSHWi
44060492U, // LDAPURSHXi
44064475U, // LDAPURSWi
44062798U, // LDAPURXi
44062798U, // LDAPURbi
44062798U, // LDAPURdi
44062798U, // LDAPURhi
44062798U, // LDAPURi
44062798U, // LDAPURqi
44062798U, // LDAPURsi
44058642U, // LDARB
44060270U, // LDARH
44062473U, // LDARW
44062473U, // LDARX
2119262U, // LDAXPW
2119262U, // LDAXPX
44058753U, // LDAXRB
44060381U, // LDAXRH
44062842U, // LDAXRW
44062842U, // LDAXRX
1344587095U, // LDCLRAB
1344589035U, // LDCLRAH
1344587336U, // LDCLRALB
1344589192U, // LDCLRALH
1344590027U, // LDCLRALW
1344590027U, // LDCLRALX
1344586733U, // LDCLRAW
1344586733U, // LDCLRAX
1344587815U, // LDCLRB
1344589443U, // LDCLRH
1344587544U, // LDCLRLB
1344589288U, // LDCLRLH
1344590542U, // LDCLRLW
1344590542U, // LDCLRLX
3102181U, // LDCLRP
3097474U, // LDCLRPA
3100765U, // LDCLRPAL
3101282U, // LDCLRPL
1344591753U, // LDCLRW
1344591753U, // LDCLRX
1344587104U, // LDEORAB
1344589044U, // LDEORAH
1344587346U, // LDEORALB
1344589202U, // LDEORALH
1344590057U, // LDEORALW
1344590057U, // LDEORALX
1344586760U, // LDEORAW
1344586760U, // LDEORAX
1344587838U, // LDEORB
1344589466U, // LDEORH
1344587553U, // LDEORLB
1344589297U, // LDEORLH
1344590569U, // LDEORLW
1344590569U, // LDEORLX
1344591846U, // LDEORW
1344591846U, // LDEORX
3519186093U, // LDFF1B_D_REAL
3519202477U, // LDFF1B_H_REAL
3519169709U, // LDFF1B_REAL
3519218861U, // LDFF1B_S_REAL
3519187460U, // LDFF1D_REAL
3519188046U, // LDFF1H_D_REAL
3519204430U, // LDFF1H_REAL
3519220814U, // LDFF1H_S_REAL
3519187110U, // LDFF1SB_D_REAL
3519203494U, // LDFF1SB_H_REAL
3519219878U, // LDFF1SB_S_REAL
3519188738U, // LDFF1SH_D_REAL
3519221506U, // LDFF1SH_S_REAL
3519192730U, // LDFF1SW_D_REAL
3519192534U, // LDFF1W_D_REAL
3519225302U, // LDFF1W_REAL
849660943U, // LDG
44061621U, // LDGM
2119102U, // LDIAPPW
807720382U, // LDIAPPWpre
2119102U, // LDIAPPX
807720382U, // LDIAPPXpre
44058649U, // LDLARB
44060277U, // LDLARH
44062479U, // LDLARW
44062479U, // LDLARX
3519186101U, // LDNF1B_D_IMM_REAL
3519202485U, // LDNF1B_H_IMM_REAL
3519169717U, // LDNF1B_IMM_REAL
3519218869U, // LDNF1B_S_IMM_REAL
3519187468U, // LDNF1D_IMM_REAL
3519188054U, // LDNF1H_D_IMM_REAL
3519204438U, // LDNF1H_IMM_REAL
3519220822U, // LDNF1H_S_IMM_REAL
3519187119U, // LDNF1SB_D_IMM_REAL
3519203503U, // LDNF1SB_H_IMM_REAL
3519219887U, // LDNF1SB_S_IMM_REAL
3519188747U, // LDNF1SH_D_IMM_REAL
3519221515U, // LDNF1SH_S_IMM_REAL
3519192739U, // LDNF1SW_D_IMM_REAL
3519192542U, // LDNF1W_D_IMM_REAL
3519225310U, // LDNF1W_IMM_REAL
2119069U, // LDNPDi
2119069U, // LDNPQi
2119069U, // LDNPSi
2119069U, // LDNPWi
2119069U, // LDNPXi
3579987133U, // LDNT1B_2Z
3579987133U, // LDNT1B_2Z_IMM
3579987133U, // LDNT1B_4Z
3579987133U, // LDNT1B_4Z_IMM
1076397245U, // LDNT1B_VG2_M2ZPXI
1076397245U, // LDNT1B_VG2_M2ZPXX
3579987133U, // LDNT1B_VG4_M4ZPXI
3579987133U, // LDNT1B_VG4_M4ZPXX
3519169725U, // LDNT1B_ZRI
3519169725U, // LDNT1B_ZRR
3519186109U, // LDNT1B_ZZR_D_REAL
3519218877U, // LDNT1B_ZZR_S_REAL
3580004884U, // LDNT1D_2Z
3580004884U, // LDNT1D_2Z_IMM
3580004884U, // LDNT1D_4Z
3580004884U, // LDNT1D_4Z_IMM
3580004884U, // LDNT1D_VG2_M2ZPXI
3580004884U, // LDNT1D_VG2_M2ZPXX
3580004884U, // LDNT1D_VG4_M4ZPXI
3580004884U, // LDNT1D_VG4_M4ZPXX
3519187476U, // LDNT1D_ZRI
3519187476U, // LDNT1D_ZRR
3519187476U, // LDNT1D_ZZR_D_REAL
3580021854U, // LDNT1H_2Z
3580021854U, // LDNT1H_2Z_IMM
3580021854U, // LDNT1H_4Z
3580021854U, // LDNT1H_4Z_IMM
1076677726U, // LDNT1H_VG2_M2ZPXI
1076677726U, // LDNT1H_VG2_M2ZPXX
3580021854U, // LDNT1H_VG4_M4ZPXI
3580021854U, // LDNT1H_VG4_M4ZPXX
3519204446U, // LDNT1H_ZRI
3519204446U, // LDNT1H_ZRR
3519188062U, // LDNT1H_ZZR_D_REAL
3519220830U, // LDNT1H_ZZR_S_REAL
3519187128U, // LDNT1SB_ZZR_D_REAL
3519219896U, // LDNT1SB_ZZR_S_REAL
3519188756U, // LDNT1SH_ZZR_D_REAL
3519221524U, // LDNT1SH_ZZR_S_REAL
3519192748U, // LDNT1SW_ZZR_D_REAL
3580042726U, // LDNT1W_2Z
3580042726U, // LDNT1W_2Z_IMM
3580042726U, // LDNT1W_4Z
3580042726U, // LDNT1W_4Z_IMM
3580042726U, // LDNT1W_VG2_M2ZPXI
3580042726U, // LDNT1W_VG2_M2ZPXX
3580042726U, // LDNT1W_VG4_M4ZPXI
3580042726U, // LDNT1W_VG4_M4ZPXX
3519225318U, // LDNT1W_ZRI
3519225318U, // LDNT1W_ZRR
3519192550U, // LDNT1W_ZZR_D_REAL
3519225318U, // LDNT1W_ZZR_S_REAL
2118952U, // LDPDi
807720232U, // LDPDpost
807720232U, // LDPDpre
2118952U, // LDPQi
807720232U, // LDPQpost
807720232U, // LDPQpre
2121397U, // LDPSWi
807722677U, // LDPSWpost
807722677U, // LDPSWpre
2118952U, // LDPSi
807720232U, // LDPSpost
807720232U, // LDPSpre
2118952U, // LDPWi
807720232U, // LDPWpost
807720232U, // LDPWpre
2118952U, // LDPXi
807720232U, // LDPXpost
807720232U, // LDPXpre
44057264U, // LDRAAindexed
849658544U, // LDRAAwriteback
44057929U, // LDRABindexed
849659209U, // LDRABwriteback
849659937U, // LDRBBpost
849659937U, // LDRBBpre
44058657U, // LDRBBroW
44058657U, // LDRBBroX
44058657U, // LDRBBui
849663815U, // LDRBpost
849663815U, // LDRBpre
44062535U, // LDRBroW
44062535U, // LDRBroX
44062535U, // LDRBui
1881167687U, // LDRDl
849663815U, // LDRDpost
849663815U, // LDRDpre
44062535U, // LDRDroW
44062535U, // LDRDroX
44062535U, // LDRDui
849661565U, // LDRHHpost
849661565U, // LDRHHpre
44060285U, // LDRHHroW
44060285U, // LDRHHroX
44060285U, // LDRHHui
849663815U, // LDRHpost
849663815U, // LDRHpre
44062535U, // LDRHroW
44062535U, // LDRHroX
44062535U, // LDRHui
1881167687U, // LDRQl
849663815U, // LDRQpost
849663815U, // LDRQpre
44062535U, // LDRQroW
44062535U, // LDRQroX
44062535U, // LDRQui
849660134U, // LDRSBWpost
849660134U, // LDRSBWpre
44058854U, // LDRSBWroW
44058854U, // LDRSBWroX
44058854U, // LDRSBWui
849660134U, // LDRSBXpost
849660134U, // LDRSBXpre
44058854U, // LDRSBXroW
44058854U, // LDRSBXroX
44058854U, // LDRSBXui
849661749U, // LDRSHWpost
849661749U, // LDRSHWpre
44060469U, // LDRSHWroW
44060469U, // LDRSHWroX
44060469U, // LDRSHWui
849661749U, // LDRSHXpost
849661749U, // LDRSHXpre
44060469U, // LDRSHXroW
44060469U, // LDRSHXroX
44060469U, // LDRSHXui
1881169604U, // LDRSWl
849665732U, // LDRSWpost
849665732U, // LDRSWpre
44064452U, // LDRSWroW
44064452U, // LDRSWroX
44064452U, // LDRSWui
1881167687U, // LDRSl
849663815U, // LDRSpost
849663815U, // LDRSpre
44062535U, // LDRSroW
44062535U, // LDRSroX
44062535U, // LDRSui
1881167687U, // LDRWl
849663815U, // LDRWpost
849663815U, // LDRWpre
44062535U, // LDRWroW
44062535U, // LDRWroX
44062535U, // LDRWui
1881167687U, // LDRXl
849663815U, // LDRXpost
849663815U, // LDRXpre
44062535U, // LDRXroW
44062535U, // LDRXroX
44062535U, // LDRXui
45061959U, // LDR_PXI
44062535U, // LDR_TX
1038151U, // LDR_ZA
45061959U, // LDR_ZXI
1344587120U, // LDSETAB
1344589060U, // LDSETAH
1344587364U, // LDSETALB
1344589220U, // LDSETALH
1344590087U, // LDSETALW
1344590087U, // LDSETALX
1344586813U, // LDSETAW
1344586813U, // LDSETAX
1344588044U, // LDSETB
1344589654U, // LDSETH
1344587604U, // LDSETLB
1344589313U, // LDSETLH
1344590639U, // LDSETLW
1344590639U, // LDSETLX
3102233U, // LDSETP
3097525U, // LDSETPA
3100821U, // LDSETPAL
3101341U, // LDSETPL
1344592413U, // LDSETW
1344592413U, // LDSETX
1344587129U, // LDSMAXAB
1344589069U, // LDSMAXAH
1344587374U, // LDSMAXALB
1344589230U, // LDSMAXALH
1344590117U, // LDSMAXALW
1344590117U, // LDSMAXALX
1344586869U, // LDSMAXAW
1344586869U, // LDSMAXAX
1344588182U, // LDSMAXB
1344589686U, // LDSMAXH
1344587613U, // LDSMAXLB
1344589355U, // LDSMAXLH
1344590729U, // LDSMAXLW
1344590729U, // LDSMAXLX
1344593702U, // LDSMAXW
1344593702U, // LDSMAXX
1344587048U, // LDSMINAB
1344589008U, // LDSMINAH
1344587306U, // LDSMINALB
1344589162U, // LDSMINALH
1344589874U, // LDSMINALW
1344589874U, // LDSMINALX
1344586549U, // LDSMINAW
1344586549U, // LDSMINAX
1344587656U, // LDSMINB
1344589375U, // LDSMINH
1344587517U, // LDSMINLB
1344589261U, // LDSMINLH
1344590388U, // LDSMINLW
1344590388U, // LDSMINLX
1344590868U, // LDSMINW
1344590868U, // LDSMINX
44058702U, // LDTRBi
44060330U, // LDTRHi
44058861U, // LDTRSBWi
44058861U, // LDTRSBXi
44060476U, // LDTRSHWi
44060476U, // LDTRSHXi
44064459U, // LDTRSWi
44062762U, // LDTRWi
44062762U, // LDTRXi
1344587139U, // LDUMAXAB
1344589079U, // LDUMAXAH
1344587385U, // LDUMAXALB
1344589241U, // LDUMAXALH
1344590127U, // LDUMAXALW
1344590127U, // LDUMAXALX
1344586878U, // LDUMAXAW
1344586878U, // LDUMAXAX
1344588191U, // LDUMAXB
1344589695U, // LDUMAXH
1344587623U, // LDUMAXLB
1344589365U, // LDUMAXLH
1344590738U, // LDUMAXLW
1344590738U, // LDUMAXLX
1344593710U, // LDUMAXW
1344593710U, // LDUMAXX
1344587058U, // LDUMINAB
1344589018U, // LDUMINAH
1344587317U, // LDUMINALB
1344589173U, // LDUMINALH
1344589884U, // LDUMINALW
1344589884U, // LDUMINALX
1344586558U, // LDUMINAW
1344586558U, // LDUMINAX
1344587665U, // LDUMINB
1344589384U, // LDUMINH
1344587527U, // LDUMINLB
1344589271U, // LDUMINLH
1344590397U, // LDUMINLW
1344590397U, // LDUMINLX
1344590876U, // LDUMINW
1344590876U, // LDUMINX
44058722U, // LDURBBi
44062785U, // LDURBi
44062785U, // LDURDi
44060350U, // LDURHHi
44062785U, // LDURHi
44062785U, // LDURQi
44058869U, // LDURSBWi
44058869U, // LDURSBXi
44060484U, // LDURSHWi
44060484U, // LDURSHXi
44064467U, // LDURSWi
44062785U, // LDURSi
44062785U, // LDURWi
44062785U, // LDURXi
2119290U, // LDXPW
2119290U, // LDXPX
44058761U, // LDXRB
44060389U, // LDXRH
44062849U, // LDXRW
44062849U, // LDXRX
3223361498U, // LSLR_ZPmZ_B
3223377882U, // LSLR_ZPmZ_D
3519092698U, // LSLR_ZPmZ_H
3223410650U, // LSLR_ZPmZ_S
2118414U, // LSLVWr
2118414U, // LSLVXr
3223360270U, // LSL_WIDE_ZPmZ_B
3519091470U, // LSL_WIDE_ZPmZ_H
3223409422U, // LSL_WIDE_ZPmZ_S
2134798U, // LSL_WIDE_ZZZ_B
2189497102U, // LSL_WIDE_ZZZ_H
270619406U, // LSL_WIDE_ZZZ_S
3223360270U, // LSL_ZPmI_B
3223376654U, // LSL_ZPmI_D
3519091470U, // LSL_ZPmI_H
3223409422U, // LSL_ZPmI_S
3223360270U, // LSL_ZPmZ_B
3223376654U, // LSL_ZPmZ_D
3519091470U, // LSL_ZPmZ_H
3223409422U, // LSL_ZPmZ_S
2134798U, // LSL_ZZI_B
2418070286U, // LSL_ZZI_D
2189497102U, // LSL_ZZI_H
270619406U, // LSL_ZZI_S
3223361545U, // LSRR_ZPmZ_B
3223377929U, // LSRR_ZPmZ_D
3519092745U, // LSRR_ZPmZ_H
3223410697U, // LSRR_ZPmZ_S
2119706U, // LSRVWr
2119706U, // LSRVXr
3223361562U, // LSR_WIDE_ZPmZ_B
3519092762U, // LSR_WIDE_ZPmZ_H
3223410714U, // LSR_WIDE_ZPmZ_S
2136090U, // LSR_WIDE_ZZZ_B
2189498394U, // LSR_WIDE_ZZZ_H
270620698U, // LSR_WIDE_ZZZ_S
3223361562U, // LSR_ZPmI_B
3223377946U, // LSR_ZPmI_D
3519092762U, // LSR_ZPmI_H
3223410714U, // LSR_ZPmI_S
3223361562U, // LSR_ZPmZ_B
3223377946U, // LSR_ZPmZ_D
3519092762U, // LSR_ZPmZ_H
3223410714U, // LSR_ZPmZ_S
2136090U, // LSR_ZZI_B
2418071578U, // LSR_ZZI_D
2189498394U, // LSR_ZZI_H
270620698U, // LSR_ZZI_S
2210545855U, // LUTI2_2ZTZI_B
2210578623U, // LUTI2_2ZTZI_H
2210595007U, // LUTI2_2ZTZI_S
2210545855U, // LUTI2_4ZTZI_B
2210578623U, // LUTI2_4ZTZI_H
2210595007U, // LUTI2_4ZTZI_S
2654399U, // LUTI2_S_2ZTZI_B
2932927U, // LUTI2_S_2ZTZI_H
2210545855U, // LUTI2_S_4ZTZI_B
2210578623U, // LUTI2_S_4ZTZI_H
2130111U, // LUTI2_ZTZI_B
2210463935U, // LUTI2_ZTZI_H
2179263U, // LUTI2_ZTZI_S
2210546294U, // LUTI4_2ZTZI_B
2210579062U, // LUTI4_2ZTZI_H
2210595446U, // LUTI4_2ZTZI_S
2210579062U, // LUTI4_4ZTZI_H
2210595446U, // LUTI4_4ZTZI_S
2654838U, // LUTI4_S_2ZTZI_B
2933366U, // LUTI4_S_2ZTZI_H
2210579062U, // LUTI4_S_4ZTZI_H
2130550U, // LUTI4_ZTZI_B
2210464374U, // LUTI4_ZTZI_H
2179702U, // LUTI4_ZTZI_S
2116311U, // MADDWrrr
2116311U, // MADDXrrr
3223358031U, // MAD_ZPmZZ_B
3223374415U, // MAD_ZPmZZ_D
3519089231U, // MAD_ZPmZZ_H
3223407183U, // MAD_ZPmZZ_S
3223358795U, // MATCH_PPzZZ_B
2445348171U, // MATCH_PPzZZ_H
3223356171U, // MLA_ZPmZZ_B
3223372555U, // MLA_ZPmZZ_D
3519087371U, // MLA_ZPmZZ_H
3223405323U, // MLA_ZPmZZ_S
1075888907U, // MLA_ZZZI_D
2195784459U, // MLA_ZZZI_H
1344357131U, // MLA_ZZZI_S
2959213323U, // MLAv16i8
2961310475U, // MLAv2i32
2961310475U, // MLAv2i32_indexed
2965504779U, // MLAv4i16
2965504779U, // MLAv4i16_indexed
2967601931U, // MLAv4i32
2967601931U, // MLAv4i32_indexed
2969699083U, // MLAv8i16
2969699083U, // MLAv8i16_indexed
2971796235U, // MLAv8i8
3223361835U, // MLS_ZPmZZ_B
3223378219U, // MLS_ZPmZZ_D
3519093035U, // MLS_ZPmZZ_H
3223410987U, // MLS_ZPmZZ_S
1075894571U, // MLS_ZZZI_D
2195790123U, // MLS_ZZZI_H
1344362795U, // MLS_ZZZI_S
2959218987U, // MLSv16i8
2961316139U, // MLSv2i32
2961316139U, // MLSv2i32_indexed
2965510443U, // MLSv4i16
2965510443U, // MLSv4i16_indexed
2967607595U, // MLSv4i32
2967607595U, // MLSv4i32_indexed
2969704747U, // MLSv8i16
2969704747U, // MLSv8i16_indexed
2971801899U, // MLSv8i8
141517188U, // MOPSSETGE
141517249U, // MOPSSETGEN
141518137U, // MOPSSETGET
141517610U, // MOPSSETGETN
1753374635U, // MOVAZ_2ZMI_H_B
1753391019U, // MOVAZ_2ZMI_H_D
1753407403U, // MOVAZ_2ZMI_H_H
1753423787U, // MOVAZ_2ZMI_H_S
1755471787U, // MOVAZ_2ZMI_V_B
1755488171U, // MOVAZ_2ZMI_V_D
1755504555U, // MOVAZ_2ZMI_V_H
1755520939U, // MOVAZ_2ZMI_V_S
2021810091U, // MOVAZ_4ZMI_H_B
2021826475U, // MOVAZ_4ZMI_H_D
2021842859U, // MOVAZ_4ZMI_H_H
2021859243U, // MOVAZ_4ZMI_H_S
2023907243U, // MOVAZ_4ZMI_V_B
2023923627U, // MOVAZ_4ZMI_V_D
2023940011U, // MOVAZ_4ZMI_V_H
2023956395U, // MOVAZ_4ZMI_V_S
2294456235U, // MOVAZ_VG2_2ZM
2562891691U, // MOVAZ_VG4_4ZM
2686492587U, // MOVAZ_ZMI_H_B
2686508971U, // MOVAZ_ZMI_H_D
148971435U, // MOVAZ_ZMI_H_H
149381035U, // MOVAZ_ZMI_H_Q
2686541739U, // MOVAZ_ZMI_H_S
2954928043U, // MOVAZ_ZMI_V_B
2954944427U, // MOVAZ_ZMI_V_D
151068587U, // MOVAZ_ZMI_V_H
151478187U, // MOVAZ_ZMI_V_Q
2954977195U, // MOVAZ_ZMI_V_S
954352751U, // MOVA_2ZMXI_H_B
954369135U, // MOVA_2ZMXI_H_D
954385519U, // MOVA_2ZMXI_H_H
954401903U, // MOVA_2ZMXI_H_S
956449903U, // MOVA_2ZMXI_V_B
956466287U, // MOVA_2ZMXI_V_D
956482671U, // MOVA_2ZMXI_V_H
956499055U, // MOVA_2ZMXI_V_S
954352751U, // MOVA_4ZMXI_H_B
954369135U, // MOVA_4ZMXI_H_D
954385519U, // MOVA_4ZMXI_H_H
954401903U, // MOVA_4ZMXI_H_S
956449903U, // MOVA_4ZMXI_V_B
956466287U, // MOVA_4ZMXI_V_D
956482671U, // MOVA_4ZMXI_V_H
956499055U, // MOVA_4ZMXI_V_S
2229797999U, // MOVA_MXI2Z_H_B
2229797999U, // MOVA_MXI2Z_H_D
2229797999U, // MOVA_MXI2Z_H_H
2229797999U, // MOVA_MXI2Z_H_S
2229814383U, // MOVA_MXI2Z_V_B
2229814383U, // MOVA_MXI2Z_V_D
2229814383U, // MOVA_MXI2Z_V_H
2229814383U, // MOVA_MXI2Z_V_S
2229797999U, // MOVA_MXI4Z_H_B
2229797999U, // MOVA_MXI4Z_H_D
2229797999U, // MOVA_MXI4Z_H_H
2229797999U, // MOVA_MXI4Z_H_S
2229814383U, // MOVA_MXI4Z_V_B
2229814383U, // MOVA_MXI4Z_V_D
2229814383U, // MOVA_MXI4Z_V_H
2229814383U, // MOVA_MXI4Z_V_S
2300740719U, // MOVA_VG2_2ZMXI
3798156399U, // MOVA_VG2_MXI2Z
2569176175U, // MOVA_VG4_4ZMXI
4066591855U, // MOVA_VG4_MXI4Z
3223343069U, // MOVID
3496054749U, // MOVIv16b_ns
3231813597U, // MOVIv2d_ns
3498151901U, // MOVIv2i32
3498151901U, // MOVIv2s_msl
3502346205U, // MOVIv4i16
3504443357U, // MOVIv4i32
3504443357U, // MOVIv4s_msl
3508637661U, // MOVIv8b_ns
3506540509U, // MOVIv8i16
1612730358U, // MOVKWi
1612730358U, // MOVKXi
3491779758U, // MOVNWi
3491779758U, // MOVNXi
270573394U, // MOVPRFX_ZPmZ_B
270589778U, // MOVPRFX_ZPmZ_D
541138770U, // MOVPRFX_ZPmZ_H
270622546U, // MOVPRFX_ZPmZ_S
3223363410U, // MOVPRFX_ZPzZ_B
3223379794U, // MOVPRFX_ZPzZ_D
2445352786U, // MOVPRFX_ZPzZ_H
3223412562U, // MOVPRFX_ZPzZ_S
3224346450U, // MOVPRFX_ZZ
155212881U, // MOVT_TIX
2120785U, // MOVT_XTI
3491782633U, // MOVZWi
3491782633U, // MOVZXi
1055151U, // MRRS
3760216478U, // MRS
3223357650U, // MSB_ZPmZZ_B
3223374034U, // MSB_ZPmZZ_D
3519088850U, // MSB_ZPmZZ_H
3223406802U, // MSB_ZPmZZ_S
1674598431U, // MSR
158357519U, // MSRR
1087519U, // MSRpstateImm1
1087519U, // MSRpstateImm4
1103903U, // MSRpstatesvcrImm1
2115924U, // MSUBWrrr
2115924U, // MSUBXrrr
2134867U, // MUL_ZI_B
2418070355U, // MUL_ZI_D
2189497171U, // MUL_ZI_H
270619475U, // MUL_ZI_S
3223360339U, // MUL_ZPmZ_B
3223376723U, // MUL_ZPmZ_D
3519091539U, // MUL_ZPmZ_H
3223409491U, // MUL_ZPmZ_S
2418070355U, // MUL_ZZZI_D
2189497171U, // MUL_ZZZI_H
270619475U, // MUL_ZZZI_S
2134867U, // MUL_ZZZ_B
2418070355U, // MUL_ZZZ_D
2189497171U, // MUL_ZZZ_H
270619475U, // MUL_ZZZ_S
811701075U, // MULv16i8
813798227U, // MULv2i32
813798227U, // MULv2i32_indexed
817992531U, // MULv4i16
817992531U, // MULv4i16_indexed
820089683U, // MULv4i32
820089683U, // MULv4i32_indexed
822186835U, // MULv8i16
822186835U, // MULv8i16_indexed
824283987U, // MULv8i8
3498151882U, // MVNIv2i32
3498151882U, // MVNIv2s_msl
3502346186U, // MVNIv4i16
3504443338U, // MVNIv4i32
3504443338U, // MVNIv4s_msl
3506540490U, // MVNIv8i16
3223361782U, // NANDS_PPzPP
3223358203U, // NAND_PPzPP
2418070276U, // NBSL_ZZZZ
270568469U, // NEG_ZPmZ_B
270584853U, // NEG_ZPmZ_D
541133845U, // NEG_ZPmZ_H
270617621U, // NEG_ZPmZ_S
811699221U, // NEGv16i8
2116629U, // NEGv1i64
813796373U, // NEGv2i32
815893525U, // NEGv2i64
817990677U, // NEGv4i16
820087829U, // NEGv4i32
822184981U, // NEGv8i16
824282133U, // NEGv8i8
3223358794U, // NMATCH_PPzZZ_B
2445348170U, // NMATCH_PPzZZ_H
3223361961U, // NORS_PPzPP
3223361517U, // NOR_PPzPP
270572555U, // NOT_ZPmZ_B
270588939U, // NOT_ZPmZ_D
541137931U, // NOT_ZPmZ_H
270621707U, // NOT_ZPmZ_S
811703307U, // NOTv16i8
824286219U, // NOTv8i8
3223361874U, // ORNS_PPzPP
2118743U, // ORNWrs
2118743U, // ORNXrs
3223360599U, // ORN_PPzPP
811701335U, // ORNv16i8
824284247U, // ORNv8i8
3227622807U, // ORQV_VPZ_B
3231817111U, // ORQV_VPZ_D
3238108567U, // ORQV_VPZ_H
3236011415U, // ORQV_VPZ_S
3223361973U, // ORRS_PPzPP
2119678U, // ORRWri
2119678U, // ORRWrs
2119678U, // ORRXri
2119678U, // ORRXrs
3223361534U, // ORR_PPzPP
2418071550U, // ORR_ZI
3223361534U, // ORR_ZPmZ_B
3223377918U, // ORR_ZPmZ_D
3519092734U, // ORR_ZPmZ_H
3223410686U, // ORR_ZPmZ_S
2418071550U, // ORR_ZZZ
811702270U, // ORRv16i8
1619138558U, // ORRv2i32
1623332862U, // ORRv4i16
1625430014U, // ORRv4i32
1627527166U, // ORRv8i16
824285182U, // ORRv8i8
253366U, // ORV_VPZ_B
1657019830U, // ORV_VPZ_D
1659133366U, // ORV_VPZ_H
1638178230U, // ORV_VPZ_S
807715530U, // PACDA
807716278U, // PACDB
312455U, // PACDZA
313768U, // PACDZB
2114279U, // PACGA
807715573U, // PACIA
8441U, // PACIA1716
8406U, // PACIASP
8397U, // PACIAZ
807716313U, // PACIB
8352U, // PACIB1716
8432U, // PACIBSP
8415U, // PACIBZ
312471U, // PACIZA
313784U, // PACIZB
895638660U, // PEXT_2PCI_B
895655044U, // PEXT_2PCI_D
895671428U, // PEXT_2PCI_H
895687812U, // PEXT_2PCI_S
1075879044U, // PEXT_PCI_B
1075895428U, // PEXT_PCI_D
895556740U, // PEXT_PCI_H
1075928196U, // PEXT_PCI_S
35767U, // PFALSE
3223362605U, // PFIRST_B
3223362889U, // PMOV_PZI_B
3223379273U, // PMOV_PZI_D
834739529U, // PMOV_PZI_H
3223412041U, // PMOV_PZI_S
4186938697U, // PMOV_ZIP_B
3113196873U, // PMOV_ZIP_D
697277769U, // PMOV_ZIP_H
1234148681U, // PMOV_ZIP_S
270583525U, // PMULLB_ZZZ_D
2309031653U, // PMULLB_ZZZ_H
164054757U, // PMULLB_ZZZ_Q
270588671U, // PMULLT_ZZZ_D
2309036799U, // PMULLT_ZZZ_H
164059903U, // PMULLT_ZZZ_Q
822182210U, // PMULLv16i8
165777951U, // PMULLv1i64
434209090U, // PMULLv2i64
822186527U, // PMULLv8i8
2134879U, // PMUL_ZZZ_B
811701087U, // PMULv16i8
824283999U, // PMULv8i8
3223362685U, // PNEXT_B
3223379069U, // PNEXT_D
2176916605U, // PNEXT_H
3223411837U, // PNEXT_S
2194736588U, // PRFB_D_PZI
2230388172U, // PRFB_D_SCALED
2230388172U, // PRFB_D_SXTW_SCALED
2230388172U, // PRFB_D_UXTW_SCALED
2230388172U, // PRFB_PRI
2230388172U, // PRFB_PRR
2175862220U, // PRFB_S_PZI
2230388172U, // PRFB_S_SXTW_SCALED
2230388172U, // PRFB_S_UXTW_SCALED
2194737909U, // PRFD_D_PZI
2230389493U, // PRFD_D_SCALED
2230389493U, // PRFD_D_SXTW_SCALED
2230389493U, // PRFD_D_UXTW_SCALED
2230389493U, // PRFD_PRI
2230389493U, // PRFD_PRR
2175863541U, // PRFD_S_PZI
2230389493U, // PRFD_S_SXTW_SCALED
2230389493U, // PRFD_S_UXTW_SCALED
2194738522U, // PRFH_D_PZI
2230390106U, // PRFH_D_SCALED
2230390106U, // PRFH_D_SXTW_SCALED
2230390106U, // PRFH_D_UXTW_SCALED
2230390106U, // PRFH_PRI
2230390106U, // PRFH_PRR
2175864154U, // PRFH_S_PZI
2230390106U, // PRFH_S_SXTW_SCALED
2230390106U, // PRFH_S_UXTW_SCALED
1882280879U, // PRFMl
45175727U, // PRFMroW
45175727U, // PRFMroX
45175727U, // PRFMui
45175784U, // PRFUMi
2194742893U, // PRFW_D_PZI
2230394477U, // PRFW_D_SCALED
2230394477U, // PRFW_D_SXTW_SCALED
2230394477U, // PRFW_D_UXTW_SCALED
2230394477U, // PRFW_PRI
2230394477U, // PRFW_PRR
2175868525U, // PRFW_S_PZI
2230394477U, // PRFW_S_SXTW_SCALED
2230394477U, // PRFW_S_UXTW_SCALED
3224342944U, // PSEL_PPPRI_B
3224342944U, // PSEL_PPPRI_D
3224342944U, // PSEL_PPPRI_H
3224342944U, // PSEL_PPPRI_S
3120159U, // PTEST_PP
2686490877U, // PTRUES_B
2686507261U, // PTRUES_D
167844093U, // PTRUES_H
2686540029U, // PTRUES_S
2686487505U, // PTRUE_B
1149905U, // PTRUE_C_B
1166289U, // PTRUE_C_D
1182673U, // PTRUE_C_H
1199057U, // PTRUE_C_S
2686503889U, // PTRUE_D
167840721U, // PTRUE_H
2686536657U, // PTRUE_S
1772162968U, // PUNPKHI_PP
1772164293U, // PUNPKLO_PP
1881180031U, // RADDHNB_ZZZ_B
2172716927U, // RADDHNB_ZZZ_H
2418100095U, // RADDHNB_ZZZ_S
2686491490U, // RADDHNT_ZZZ_B
2174819170U, // RADDHNT_ZZZ_H
1075927906U, // RADDHNT_ZZZ_S
813798405U, // RADDHNv2i64_v2i32
2967601549U, // RADDHNv2i64_v4i32
817992709U, // RADDHNv4i32_v4i16
2969698701U, // RADDHNv4i32_v8i16
2959212941U, // RADDHNv8i16_v16i8
824284165U, // RADDHNv8i16_v8i8
815890585U, // RAX1
2418065561U, // RAX1_ZZZ_D
2120275U, // RBITWr
2120275U, // RBITXr
270572115U, // RBIT_ZPmZ_B
270588499U, // RBIT_ZPmZ_D
541137491U, // RBIT_ZPmZ_H
270621267U, // RBIT_ZPmZ_S
811702867U, // RBITv16i8
824285779U, // RBITv8i8
807721117U, // RCWCAS
807715892U, // RCWCASA
807719165U, // RCWCASAL
807719675U, // RCWCASL
415242U, // RCWCASP
410539U, // RCWCASPA
413834U, // RCWCASPAL
414347U, // RCWCASPL
1344591769U, // RCWCLR
1344586751U, // RCWCLRA
1344590047U, // RCWCLRAL
1344590560U, // RCWCLRL
3102199U, // RCWCLRP
3097494U, // RCWCLRPA
3100787U, // RCWCLRPAL
3101302U, // RCWCLRPL
1344591760U, // RCWCLRS
1344586741U, // RCWCLRSA
1344590036U, // RCWCLRSAL
1344590550U, // RCWCLRSL
3102189U, // RCWCLRSP
3097483U, // RCWCLRSPA
3100775U, // RCWCLRSPAL
3101291U, // RCWCLRSPL
807721108U, // RCWSCAS
807715882U, // RCWSCASA
807719154U, // RCWSCASAL
807719665U, // RCWSCASL
415232U, // RCWSCASP
410528U, // RCWSCASPA
413822U, // RCWSCASPAL
414336U, // RCWSCASPL
1344592429U, // RCWSET
1344586831U, // RCWSETA
1344590107U, // RCWSETAL
1344590657U, // RCWSETL
3102251U, // RCWSETP
3097545U, // RCWSETPA
3100843U, // RCWSETPAL
3101361U, // RCWSETPL
1344592420U, // RCWSETS
1344586821U, // RCWSETSA
1344590096U, // RCWSETSAL
1344590647U, // RCWSETSL
3102241U, // RCWSETSP
3097534U, // RCWSETSPA
3100831U, // RCWSETSPAL
3101350U, // RCWSETSPL
1344591446U, // RCWSWP
1344586717U, // RCWSWPA
1344590017U, // RCWSWPAL
1344590533U, // RCWSWPL
3102160U, // RCWSWPP
3097464U, // RCWSWPPA
3100754U, // RCWSWPPAL
3101272U, // RCWSWPPL
1344591437U, // RCWSWPS
1344586707U, // RCWSWPSA
1344590006U, // RCWSWPSAL
1344590523U, // RCWSWPSL
3102150U, // RCWSWPSP
3097453U, // RCWSWPSPA
3100742U, // RCWSWPSPAL
3101261U, // RCWSWPSPL
3223361942U, // RDFFRS_PPz
3223361356U, // RDFFR_PPz_REAL
38732U, // RDFFR_P_REAL
2118530U, // RDSVLI_XI
2118516U, // RDVLI_XI
23064U, // RET
9737U, // RETAA
9744U, // RETAB
2114186U, // REV16Wr
2114186U, // REV16Xr
811696778U, // REV16v16i8
824279690U, // REV16v8i8
2113695U, // REV32Xr
811696287U, // REV32v16i8
817987743U, // REV32v4i16
822182047U, // REV32v8i16
824279199U, // REV32v8i8
811696746U, // REV64v16i8
813793898U, // REV64v2i32
817988202U, // REV64v4i16
820085354U, // REV64v4i32
822182506U, // REV64v8i16
824279658U, // REV64v8i8
270584176U, // REVB_ZPmZ_D
541133168U, // REVB_ZPmZ_H
270616944U, // REVB_ZPmZ_S
541543210U, // REVD_ZPmZ
270585712U, // REVH_ZPmZ_D
270618480U, // REVH_ZPmZ_S
270589687U, // REVW_ZPmZ_D
2120942U, // REVWr
2120942U, // REVXr
2137326U, // REV_PP_B
2418072814U, // REV_PP_D
1652628718U, // REV_PP_H
270621934U, // REV_PP_S
2137326U, // REV_ZZ_B
2418072814U, // REV_ZZ_D
1652628718U, // REV_ZZ_H
270621934U, // REV_ZZ_S
2116578U, // RMIF
2119666U, // RORVWr
2119666U, // RORVXr
1217454U, // RPRFM
1881180078U, // RSHRNB_ZZI_B
2172716974U, // RSHRNB_ZZI_H
2418100142U, // RSHRNB_ZZI_S
2686491525U, // RSHRNT_ZZI_B
2174819205U, // RSHRNT_ZZI_H
1075927941U, // RSHRNT_ZZI_S
2959212970U, // RSHRNv16i8_shift
813798471U, // RSHRNv2i32_shift
817992775U, // RSHRNv4i16_shift
2967601578U, // RSHRNv4i32_shift
2969698730U, // RSHRNv8i16_shift
824284231U, // RSHRNv8i8_shift
1881180022U, // RSUBHNB_ZZZ_B
2172716918U, // RSUBHNB_ZZZ_H
2418100086U, // RSUBHNB_ZZZ_S
2686491481U, // RSUBHNT_ZZZ_B
2174819161U, // RSUBHNT_ZZZ_H
1075927897U, // RSUBHNT_ZZZ_S
813798397U, // RSUBHNv2i64_v2i32
2967601540U, // RSUBHNv2i64_v4i32
817992701U, // RSUBHNv4i32_v4i16
2969698692U, // RSUBHNv4i32_v8i16
2959212932U, // RSUBHNv8i16_v16i8
824284157U, // RSUBHNv8i16_v8i8
1344325101U, // SABALB_ZZZ_D
2317420013U, // SABALB_ZZZ_H
2686535149U, // SABALB_ZZZ_S
1344330342U, // SABALT_ZZZ_D
2317425254U, // SABALT_ZZZ_H
2686540390U, // SABALT_ZZZ_S
2969698502U, // SABALv16i8_v8i16
2963410940U, // SABALv2i32_v2i64
2967605244U, // SABALv4i16_v4i32
2963407046U, // SABALv4i32_v2i64
2967601350U, // SABALv8i16_v4i32
2969702396U, // SABALv8i8_v8i16
2149614270U, // SABA_ZZZ_B
1075888830U, // SABA_ZZZ_D
2195784382U, // SABA_ZZZ_H
1344357054U, // SABA_ZZZ_S
2959213246U, // SABAv16i8
2961310398U, // SABAv2i32
2965504702U, // SABAv4i16
2967601854U, // SABAv4i32
2969699006U, // SABAv8i16
2971796158U, // SABAv8i8
270583458U, // SABDLB_ZZZ_D
2309031586U, // SABDLB_ZZZ_H
1881228962U, // SABDLB_ZZZ_S
270588599U, // SABDLT_ZZZ_D
2309036727U, // SABDLT_ZZZ_H
1881234103U, // SABDLT_ZZZ_S
822182152U, // SABDLv16i8_v8i16
815894876U, // SABDLv2i32_v2i64
820089180U, // SABDLv4i16_v4i32
815890696U, // SABDLv4i32_v2i64
820085000U, // SABDLv8i16_v4i32
822186332U, // SABDLv8i8_v8i16
3223358056U, // SABD_ZPmZ_B
3223374440U, // SABD_ZPmZ_D
3519089256U, // SABD_ZPmZ_H
3223407208U, // SABD_ZPmZ_S
811698792U, // SABDv16i8
813795944U, // SABDv2i32
817990248U, // SABDv4i16
820087400U, // SABDv4i32
822184552U, // SABDv8i16
824281704U, // SABDv8i8
3223377214U, // SADALP_ZPmZ_D
3519092030U, // SADALP_ZPmZ_H
3223409982U, // SADALP_ZPmZ_S
2969703742U, // SADALPv16i8_v8i16
3124892990U, // SADALPv2i32_v1i64
2961315134U, // SADALPv4i16_v2i32
2963412286U, // SADALPv4i32_v2i64
2967606590U, // SADALPv8i16_v4i32
2965509438U, // SADALPv8i8_v4i16
270588398U, // SADDLBT_ZZZ_D
2309036526U, // SADDLBT_ZZZ_H
1881233902U, // SADDLBT_ZZZ_S
270583483U, // SADDLB_ZZZ_D
2309031611U, // SADDLB_ZZZ_H
1881228987U, // SADDLB_ZZZ_S
822187342U, // SADDLPv16i8_v8i16
977376590U, // SADDLPv2i32_v1i64
813798734U, // SADDLPv4i16_v2i32
815895886U, // SADDLPv4i32_v2i64
820090190U, // SADDLPv8i16_v4i32
817993038U, // SADDLPv8i8_v4i16
270588615U, // SADDLT_ZZZ_D
2309036743U, // SADDLT_ZZZ_H
1881234119U, // SADDLT_ZZZ_S
807427333U, // SADDLVv16i8v
807427333U, // SADDLVv4i16v
807427333U, // SADDLVv4i32v
807427333U, // SADDLVv8i16v
807427333U, // SADDLVv8i8v
822182168U, // SADDLv16i8_v8i16
815894914U, // SADDLv2i32_v2i64
820089218U, // SADDLv4i16_v4i32
815890712U, // SADDLv4i32_v2i64
820085016U, // SADDLv8i16_v4i32
822186370U, // SADDLv8i8_v8i16
1780751578U, // SADDV_VPZ_B
1659116762U, // SADDV_VPZ_H
1638145242U, // SADDV_VPZ_S
2418067846U, // SADDWB_ZZZ_D
2189494662U, // SADDWB_ZZZ_H
270616966U, // SADDWB_ZZZ_S
2418072679U, // SADDWT_ZZZ_D
2189499495U, // SADDWT_ZZZ_H
270621799U, // SADDWT_ZZZ_S
822182456U, // SADDWv16i8_v8i16
815898207U, // SADDWv2i32_v2i64
820092511U, // SADDWv4i16_v4i32
815891000U, // SADDWv4i32_v2i64
820085304U, // SADDWv8i16_v4i32
822189663U, // SADDWv8i8_v8i16
9750U, // SB
1075889812U, // SBCLB_ZZZ_D
1344358036U, // SBCLB_ZZZ_S
1075894953U, // SBCLT_ZZZ_D
1344363177U, // SBCLT_ZZZ_S
2119902U, // SBCSWr
2119902U, // SBCSXr
2116047U, // SBCWr
2116047U, // SBCXr
2118562U, // SBFMWri
2118562U, // SBFMXri
2317505902U, // SCLAMP_VG2_2Z2Z_B
2193790318U, // SCLAMP_VG2_2Z2Z_D
2195903854U, // SCLAMP_VG2_2Z2Z_H
2174948718U, // SCLAMP_VG2_2Z2Z_S
2317505902U, // SCLAMP_VG4_4Z4Z_B
2193790318U, // SCLAMP_VG4_4Z4Z_D
2195903854U, // SCLAMP_VG4_4Z4Z_H
2174948718U, // SCLAMP_VG4_4Z4Z_S
2135406U, // SCLAMP_ZZZ_B
2418070894U, // SCLAMP_ZZZ_D
2189497710U, // SCLAMP_ZZZ_H
270620014U, // SCLAMP_ZZZ_S
2116584U, // SCVTFSWDri
2116584U, // SCVTFSWHri
2116584U, // SCVTFSWSri
2116584U, // SCVTFSXDri
2116584U, // SCVTFSXHri
2116584U, // SCVTFSXSri
2116584U, // SCVTFUWDri
2116584U, // SCVTFUWHri
2116584U, // SCVTFUWSri
2116584U, // SCVTFUXDri
2116584U, // SCVTFUXHri
2116584U, // SCVTFUXSri
1648561128U, // SCVTF_2Z2Z_StoS
1648561128U, // SCVTF_4Z4Z_StoS
270584808U, // SCVTF_ZPmZ_DtoD
2957052904U, // SCVTF_ZPmZ_DtoH
270617576U, // SCVTF_ZPmZ_DtoS
541133800U, // SCVTF_ZPmZ_HtoH
270584808U, // SCVTF_ZPmZ_StoD
1078004712U, // SCVTF_ZPmZ_StoH
270617576U, // SCVTF_ZPmZ_StoS
2116584U, // SCVTFd
2116584U, // SCVTFh
2116584U, // SCVTFs
2116584U, // SCVTFv1i16
2116584U, // SCVTFv1i32
2116584U, // SCVTFv1i64
813796328U, // SCVTFv2f32
815893480U, // SCVTFv2f64
813796328U, // SCVTFv2i32_shift
815893480U, // SCVTFv2i64_shift
817990632U, // SCVTFv4f16
820087784U, // SCVTFv4f32
817990632U, // SCVTFv4i16_shift
820087784U, // SCVTFv4i32_shift
822184936U, // SCVTFv8f16
822184936U, // SCVTFv8i16_shift
3223378019U, // SDIVR_ZPmZ_D
3223410787U, // SDIVR_ZPmZ_S
2120953U, // SDIVWr
2120953U, // SDIVXr
3223379193U, // SDIV_ZPmZ_D
3223411961U, // SDIV_ZPmZ_S
3798178789U, // SDOT_VG2_M2Z2Z_BtoS
3798162405U, // SDOT_VG2_M2Z2Z_HtoD
3798178789U, // SDOT_VG2_M2Z2Z_HtoS
3798178789U, // SDOT_VG2_M2ZZI_BToS
3798178789U, // SDOT_VG2_M2ZZI_HToS
3798162405U, // SDOT_VG2_M2ZZI_HtoD
3798178789U, // SDOT_VG2_M2ZZ_BtoS
3798162405U, // SDOT_VG2_M2ZZ_HtoD
3798178789U, // SDOT_VG2_M2ZZ_HtoS
4066614245U, // SDOT_VG4_M4Z4Z_BtoS
4066597861U, // SDOT_VG4_M4Z4Z_HtoD
4066614245U, // SDOT_VG4_M4Z4Z_HtoS
4066614245U, // SDOT_VG4_M4ZZI_BToS
4066614245U, // SDOT_VG4_M4ZZI_HToS
4066597861U, // SDOT_VG4_M4ZZI_HtoD
4066614245U, // SDOT_VG4_M4ZZ_BtoS
4066597861U, // SDOT_VG4_M4ZZ_HtoD
4066614245U, // SDOT_VG4_M4ZZ_HtoS
2686508005U, // SDOT_ZZZI_D
2686540773U, // SDOT_ZZZI_HtoS
2149669861U, // SDOT_ZZZI_S
2686508005U, // SDOT_ZZZ_D
2686540773U, // SDOT_ZZZ_HtoS
2149669861U, // SDOT_ZZZ_S
2967608293U, // SDOTlanev16i8
2961316837U, // SDOTlanev8i8
2967608293U, // SDOTv16i8
2961316837U, // SDOTv8i8
3223359899U, // SEL_PPPP
2237813147U, // SEL_VG2_2ZP2Z2Z_B
2237829531U, // SEL_VG2_2ZP2Z2Z_D
2237845915U, // SEL_VG2_2ZP2Z2Z_H
2237862299U, // SEL_VG2_2ZP2Z2Z_S
2237813147U, // SEL_VG4_4ZP4Z4Z_B
2237829531U, // SEL_VG4_4ZP4Z4Z_D
2237845915U, // SEL_VG4_4ZP4Z4Z_H
2237862299U, // SEL_VG4_4ZP4Z4Z_S
3223359899U, // SEL_ZPZZ_B
3223376283U, // SEL_ZPZZ_D
2176913819U, // SEL_ZPZZ_H
3223409051U, // SEL_ZPZZ_S
141517196U, // SETE
141517258U, // SETEN
141518146U, // SETET
141517620U, // SETETN
17026U, // SETF16
17041U, // SETF8
9798U, // SETFFR
141517218U, // SETGM
141517283U, // SETGMN
141518171U, // SETGMT
141517648U, // SETGMTN
141518106U, // SETGP
141517317U, // SETGPN
141518205U, // SETGPT
141517686U, // SETGPTN
141517226U, // SETM
141517292U, // SETMN
141518180U, // SETMT
141517658U, // SETMTN
141518114U, // SETP
141517326U, // SETPN
141518214U, // SETPT
141517696U, // SETPTN
807717320U, // SHA1Crrr
2116673U, // SHA1Hrr
807719835U, // SHA1Mrrr
807720180U, // SHA1Prrr
2967601153U, // SHA1SU0rrr
2967601263U, // SHA1SU1rr
807714997U, // SHA256H2rrr
807718057U, // SHA256Hrrr
2967601173U, // SHA256SU0rr
2967601283U, // SHA256SU1rrr
807718004U, // SHA512H
807714987U, // SHA512H2
2963406858U, // SHA512SU0
2963406968U, // SHA512SU1
3223358152U, // SHADD_ZPmZ_B
3223374536U, // SHADD_ZPmZ_D
3519089352U, // SHADD_ZPmZ_H
3223407304U, // SHADD_ZPmZ_S
811698888U, // SHADDv16i8
813796040U, // SHADDv2i32
817990344U, // SHADDv4i16
820087496U, // SHADDv4i32
822184648U, // SHADDv8i16
824281800U, // SHADDv8i8
822182185U, // SHLLv16i8
815895033U, // SHLLv2i32
820089337U, // SHLLv4i16
815890729U, // SHLLv4i32
820085033U, // SHLLv8i16
822186489U, // SHLLv8i8
2118064U, // SHLd
811700656U, // SHLv16i8_shift
813797808U, // SHLv2i32_shift
815894960U, // SHLv2i64_shift
817992112U, // SHLv4i16_shift
820089264U, // SHLv4i32_shift
822186416U, // SHLv8i16_shift
824283568U, // SHLv8i8_shift
1881180060U, // SHRNB_ZZI_B
2172716956U, // SHRNB_ZZI_H
2418100124U, // SHRNB_ZZI_S
2686491507U, // SHRNT_ZZI_B
2174819187U, // SHRNT_ZZI_H
1075927923U, // SHRNT_ZZI_S
2959212952U, // SHRNv16i8_shift
813798455U, // SHRNv2i32_shift
817992759U, // SHRNv4i16_shift
2967601560U, // SHRNv4i32_shift
2969698712U, // SHRNv8i16_shift
824284215U, // SHRNv8i8_shift
3223361314U, // SHSUBR_ZPmZ_B
3223377698U, // SHSUBR_ZPmZ_D
3519092514U, // SHSUBR_ZPmZ_H
3223410466U, // SHSUBR_ZPmZ_S
3223357765U, // SHSUB_ZPmZ_B
3223374149U, // SHSUB_ZPmZ_D
3519088965U, // SHSUB_ZPmZ_H
3223406917U, // SHSUB_ZPmZ_S
811698501U, // SHSUBv16i8
813795653U, // SHSUBv2i32
817989957U, // SHSUBv4i16
820087109U, // SHSUBv4i32
822184261U, // SHSUBv8i16
824281413U, // SHSUBv8i8
2149617600U, // SLI_ZZI_B
1075892160U, // SLI_ZZI_D
2195787712U, // SLI_ZZI_H
1344360384U, // SLI_ZZI_S
807718848U, // SLId
2959216576U, // SLIv16i8_shift
2961313728U, // SLIv2i32_shift
2963410880U, // SLIv2i64_shift
2965508032U, // SLIv4i16_shift
2967605184U, // SLIv4i32_shift
2969702336U, // SLIv8i16_shift
2971799488U, // SLIv8i8_shift
2967601294U, // SM3PARTW1
2967601736U, // SM3PARTW2
820084834U, // SM3SS1
2967601816U, // SM3TT1A
2967602387U, // SM3TT1B
2967601825U, // SM3TT2A
2967602416U, // SM3TT2B
2967604016U, // SM4E
270622585U, // SM4EKEY_ZZZ_S
820092793U, // SM4ENCKEY
270617392U, // SM4E_ZZZ_S
2118002U, // SMADDLrrr
3223361132U, // SMAXP_ZPmZ_B
3223377516U, // SMAXP_ZPmZ_D
3519092332U, // SMAXP_ZPmZ_H
3223410284U, // SMAXP_ZPmZ_S
811701868U, // SMAXPv16i8
813799020U, // SMAXPv2i32
817993324U, // SMAXPv4i16
820090476U, // SMAXPv4i32
822187628U, // SMAXPv8i16
824284780U, // SMAXPv8i8
3227622821U, // SMAXQV_VPZ_B
3231817125U, // SMAXQV_VPZ_D
3238108581U, // SMAXQV_VPZ_H
3236011429U, // SMAXQV_VPZ_S
253378U, // SMAXV_VPZ_B
1657019842U, // SMAXV_VPZ_D
1659133378U, // SMAXV_VPZ_H
1638178242U, // SMAXV_VPZ_S
807427522U, // SMAXVv16i8v
807427522U, // SMAXVv4i16v
807427522U, // SMAXVv4i32v
807427522U, // SMAXVv8i16v
807427522U, // SMAXVv8i8v
2121512U, // SMAXWri
2121512U, // SMAXWrr
2121512U, // SMAXXri
2121512U, // SMAXXrr
2179096360U, // SMAX_VG2_2Z2Z_B
2181209896U, // SMAX_VG2_2Z2Z_D
2183323432U, // SMAX_VG2_2Z2Z_H
2185436968U, // SMAX_VG2_2Z2Z_S
2179096360U, // SMAX_VG2_2ZZ_B
2181209896U, // SMAX_VG2_2ZZ_D
2183323432U, // SMAX_VG2_2ZZ_H
2185436968U, // SMAX_VG2_2ZZ_S
2179096360U, // SMAX_VG4_4Z4Z_B
2181209896U, // SMAX_VG4_4Z4Z_D
2183323432U, // SMAX_VG4_4Z4Z_H
2185436968U, // SMAX_VG4_4Z4Z_S
2179096360U, // SMAX_VG4_4ZZ_B
2181209896U, // SMAX_VG4_4ZZ_D
2183323432U, // SMAX_VG4_4ZZ_H
2185436968U, // SMAX_VG4_4ZZ_S
2137896U, // SMAX_ZI_B
2418073384U, // SMAX_ZI_D
2189500200U, // SMAX_ZI_H
270622504U, // SMAX_ZI_S
3223363368U, // SMAX_ZPmZ_B
3223379752U, // SMAX_ZPmZ_D
3519094568U, // SMAX_ZPmZ_H
3223412520U, // SMAX_ZPmZ_S
811704104U, // SMAXv16i8
813801256U, // SMAXv2i32
817995560U, // SMAXv4i16
820092712U, // SMAXv4i32
822189864U, // SMAXv8i16
824287016U, // SMAXv8i8
379368U, // SMC
3223360938U, // SMINP_ZPmZ_B
3223377322U, // SMINP_ZPmZ_D
3519092138U, // SMINP_ZPmZ_H
3223410090U, // SMINP_ZPmZ_S
811701674U, // SMINPv16i8
813798826U, // SMINPv2i32
817993130U, // SMINPv4i16
820090282U, // SMINPv4i32
822187434U, // SMINPv8i16
824284586U, // SMINPv8i8
3227622790U, // SMINQV_VPZ_B
3231817094U, // SMINQV_VPZ_D
3238108550U, // SMINQV_VPZ_H
3236011398U, // SMINQV_VPZ_S
253230U, // SMINV_VPZ_B
1657019694U, // SMINV_VPZ_D
1659133230U, // SMINV_VPZ_H
1638178094U, // SMINV_VPZ_S
807427374U, // SMINVv16i8v
807427374U, // SMINVv4i16v
807427374U, // SMINVv4i32v
807427374U, // SMINVv8i16v
807427374U, // SMINVv8i8v
2118678U, // SMINWri
2118678U, // SMINWrr
2118678U, // SMINXri
2118678U, // SMINXrr
2179093526U, // SMIN_VG2_2Z2Z_B
2181207062U, // SMIN_VG2_2Z2Z_D
2183320598U, // SMIN_VG2_2Z2Z_H
2185434134U, // SMIN_VG2_2Z2Z_S
2179093526U, // SMIN_VG2_2ZZ_B
2181207062U, // SMIN_VG2_2ZZ_D
2183320598U, // SMIN_VG2_2ZZ_H
2185434134U, // SMIN_VG2_2ZZ_S
2179093526U, // SMIN_VG4_4Z4Z_B
2181207062U, // SMIN_VG4_4Z4Z_D
2183320598U, // SMIN_VG4_4Z4Z_H
2185434134U, // SMIN_VG4_4Z4Z_S
2179093526U, // SMIN_VG4_4ZZ_B
2181207062U, // SMIN_VG4_4ZZ_D
2183320598U, // SMIN_VG4_4ZZ_H
2185434134U, // SMIN_VG4_4ZZ_S
2135062U, // SMIN_ZI_B
2418070550U, // SMIN_ZI_D
2189497366U, // SMIN_ZI_H
270619670U, // SMIN_ZI_S
3223360534U, // SMIN_ZPmZ_B
3223376918U, // SMIN_ZPmZ_D
3519091734U, // SMIN_ZPmZ_H
3223409686U, // SMIN_ZPmZ_S
811701270U, // SMINv16i8
813798422U, // SMINv2i32
817992726U, // SMINv4i16
820089878U, // SMINv4i32
822187030U, // SMINv8i16
824284182U, // SMINv8i8
1344325146U, // SMLALB_ZZZI_D
2686535194U, // SMLALB_ZZZI_S
1344325146U, // SMLALB_ZZZ_D
2317420058U, // SMLALB_ZZZ_H
2686535194U, // SMLALB_ZZZ_S
1516474855U, // SMLALL_MZZI_BtoS
1516458471U, // SMLALL_MZZI_HtoD
1516474855U, // SMLALL_MZZ_BtoS
1516458471U, // SMLALL_MZZ_HtoD
3932393959U, // SMLALL_VG2_M2Z2Z_BtoS
3932377575U, // SMLALL_VG2_M2Z2Z_HtoD
3932393959U, // SMLALL_VG2_M2ZZI_BtoS
3932377575U, // SMLALL_VG2_M2ZZI_HtoD
979603943U, // SMLALL_VG2_M2ZZ_BtoS
979587559U, // SMLALL_VG2_M2ZZ_HtoD
4200829415U, // SMLALL_VG4_M4Z4Z_BtoS
4200813031U, // SMLALL_VG4_M4Z4Z_HtoD
4200829415U, // SMLALL_VG4_M4ZZI_BtoS
4200813031U, // SMLALL_VG4_M4ZZI_HtoD
1248039399U, // SMLALL_VG4_M4ZZ_BtoS
1248023015U, // SMLALL_VG4_M4ZZ_HtoD
1344330377U, // SMLALT_ZZZI_D
2686540425U, // SMLALT_ZZZI_S
1344330377U, // SMLALT_ZZZ_D
2317425289U, // SMLALT_ZZZ_H
2686540425U, // SMLALT_ZZZ_S
1396936740U, // SMLAL_MZZI_S
1396936740U, // SMLAL_MZZ_S
3812855844U, // SMLAL_VG2_M2Z2Z_S
3812855844U, // SMLAL_VG2_M2ZZI_S
3812855844U, // SMLAL_VG2_M2ZZ_S
4081291300U, // SMLAL_VG4_M4Z4Z_S
4081291300U, // SMLAL_VG4_M4ZZI_S
4081291300U, // SMLAL_VG4_M4ZZ_S
2969698536U, // SMLALv16i8_v8i16
2963410980U, // SMLALv2i32_indexed
2963410980U, // SMLALv2i32_v2i64
2967605284U, // SMLALv4i16_indexed
2967605284U, // SMLALv4i16_v4i32
2963407080U, // SMLALv4i32_indexed
2963407080U, // SMLALv4i32_v2i64
2967601384U, // SMLALv8i16_indexed
2967601384U, // SMLALv8i16_v4i32
2969702436U, // SMLALv8i8_v8i16
1344325444U, // SMLSLB_ZZZI_D
2686535492U, // SMLSLB_ZZZI_S
1344325444U, // SMLSLB_ZZZ_D
2317420356U, // SMLSLB_ZZZ_H
2686535492U, // SMLSLB_ZZZ_S
1516474886U, // SMLSLL_MZZI_BtoS
1516458502U, // SMLSLL_MZZI_HtoD
1516474886U, // SMLSLL_MZZ_BtoS
1516458502U, // SMLSLL_MZZ_HtoD
3932393990U, // SMLSLL_VG2_M2Z2Z_BtoS
3932377606U, // SMLSLL_VG2_M2Z2Z_HtoD
3932393990U, // SMLSLL_VG2_M2ZZI_BtoS
3932377606U, // SMLSLL_VG2_M2ZZI_HtoD
979603974U, // SMLSLL_VG2_M2ZZ_BtoS
979587590U, // SMLSLL_VG2_M2ZZ_HtoD
4200829446U, // SMLSLL_VG4_M4Z4Z_BtoS
4200813062U, // SMLSLL_VG4_M4Z4Z_HtoD
4200829446U, // SMLSLL_VG4_M4ZZI_BtoS
4200813062U, // SMLSLL_VG4_M4ZZI_HtoD
1248039430U, // SMLSLL_VG4_M4ZZ_BtoS
1248023046U, // SMLSLL_VG4_M4ZZ_HtoD
1344330552U, // SMLSLT_ZZZI_D
2686540600U, // SMLSLT_ZZZI_S
1344330552U, // SMLSLT_ZZZ_D
2317425464U, // SMLSLT_ZZZ_H
2686540600U, // SMLSLT_ZZZ_S
1396937499U, // SMLSL_MZZI_S
1396937499U, // SMLSL_MZZ_S
3812856603U, // SMLSL_VG2_M2Z2Z_S
3812856603U, // SMLSL_VG2_M2ZZI_S
3812856603U, // SMLSL_VG2_M2ZZ_S
4081292059U, // SMLSL_VG4_M4Z4Z_S
4081292059U, // SMLSL_VG4_M4ZZI_S
4081292059U, // SMLSL_VG4_M4ZZ_S
2969698668U, // SMLSLv16i8_v8i16
2963411739U, // SMLSLv2i32_indexed
2963411739U, // SMLSLv2i32_v2i64
2967606043U, // SMLSLv4i16_indexed
2967606043U, // SMLSLv4i16_v4i32
2963407212U, // SMLSLv4i32_indexed
2963407212U, // SMLSLv4i32_v2i64
2967601516U, // SMLSLv8i16_indexed
2967601516U, // SMLSLv8i16_v4i32
2969703195U, // SMLSLv8i8_v8i16
2967601952U, // SMMLA
2149663520U, // SMMLA_ZZZ
56738654U, // SMOPA_MPPZZ_D
56738654U, // SMOPA_MPPZZ_HtoS
176276318U, // SMOPA_MPPZZ_S
56744319U, // SMOPS_MPPZZ_D
56744319U, // SMOPS_MPPZZ_HtoS
176281983U, // SMOPS_MPPZZ_S
807427407U, // SMOVvi16to32
807427407U, // SMOVvi16to32_idx0
807427407U, // SMOVvi16to64
807427407U, // SMOVvi16to64_idx0
807427407U, // SMOVvi32to64
807427407U, // SMOVvi32to64_idx0
807427407U, // SMOVvi8to32
807427407U, // SMOVvi8to32_idx0
807427407U, // SMOVvi8to64
807427407U, // SMOVvi8to64_idx0
2117950U, // SMSUBLrrr
3223359005U, // SMULH_ZPmZ_B
3223375389U, // SMULH_ZPmZ_D
3519090205U, // SMULH_ZPmZ_H
3223408157U, // SMULH_ZPmZ_S
2133533U, // SMULH_ZZZ_B
2418069021U, // SMULH_ZZZ_D
2189495837U, // SMULH_ZZZ_H
270618141U, // SMULH_ZZZ_S
2117149U, // SMULHrr
270583533U, // SMULLB_ZZZI_D
1881229037U, // SMULLB_ZZZI_S
270583533U, // SMULLB_ZZZ_D
2309031661U, // SMULLB_ZZZ_H
1881229037U, // SMULLB_ZZZ_S
270588679U, // SMULLT_ZZZI_D
1881234183U, // SMULLT_ZZZI_S
270588679U, // SMULLT_ZZZ_D
2309036807U, // SMULLT_ZZZ_H
1881234183U, // SMULLT_ZZZ_S
822182218U, // SMULLv16i8_v8i16
815895078U, // SMULLv2i32_indexed
815895078U, // SMULLv2i32_v2i64
820089382U, // SMULLv4i16_indexed
820089382U, // SMULLv4i16_v4i32
815890762U, // SMULLv4i32_indexed
815890762U, // SMULLv4i32_v2i64
820085066U, // SMULLv8i16_indexed
820085066U, // SMULLv8i16_v4i32
822186534U, // SMULLv8i8_v8i16
3223358262U, // SPLICE_ZPZZ_B
3223374646U, // SPLICE_ZPZZ_D
2176912182U, // SPLICE_ZPZZ_H
3223407414U, // SPLICE_ZPZZ_S
3223358262U, // SPLICE_ZPZ_B
3223374646U, // SPLICE_ZPZ_D
2176912182U, // SPLICE_ZPZ_H
3223407414U, // SPLICE_ZPZ_S
270571714U, // SQABS_ZPmZ_B
270588098U, // SQABS_ZPmZ_D
541137090U, // SQABS_ZPmZ_H
270620866U, // SQABS_ZPmZ_S
811702466U, // SQABSv16i8
2119874U, // SQABSv1i16
2119874U, // SQABSv1i32
2119874U, // SQABSv1i64
2119874U, // SQABSv1i8
813799618U, // SQABSv2i32
815896770U, // SQABSv2i64
817993922U, // SQABSv4i16
820091074U, // SQABSv4i32
822188226U, // SQABSv8i16
824285378U, // SQABSv8i8
2132710U, // SQADD_ZI_B
2418068198U, // SQADD_ZI_D
2189495014U, // SQADD_ZI_H
270617318U, // SQADD_ZI_S
3223358182U, // SQADD_ZPmZ_B
3223374566U, // SQADD_ZPmZ_D
3519089382U, // SQADD_ZPmZ_H
3223407334U, // SQADD_ZPmZ_S
2132710U, // SQADD_ZZZ_B
2418068198U, // SQADD_ZZZ_D
2189495014U, // SQADD_ZZZ_H
270617318U, // SQADD_ZZZ_S
811698918U, // SQADDv16i8
2116326U, // SQADDv1i16
2116326U, // SQADDv1i32
2116326U, // SQADDv1i64
2116326U, // SQADDv1i8
813796070U, // SQADDv2i32
815893222U, // SQADDv2i64
817990374U, // SQADDv4i16
820087526U, // SQADDv4i32
822184678U, // SQADDv8i16
824281830U, // SQADDv8i8
2132642U, // SQCADD_ZZI_B
2418068130U, // SQCADD_ZZI_D
2189494946U, // SQCADD_ZZI_H
270617250U, // SQCADD_ZZI_S
1648432236U, // SQCVTN_Z2Z_StoH
1644237932U, // SQCVTN_Z4Z_DtoH
1344312428U, // SQCVTN_Z4Z_StoB
1648432285U, // SQCVTUN_Z2Z_StoH
1644237981U, // SQCVTUN_Z4Z_DtoH
1344312477U, // SQCVTUN_Z4Z_StoB
1648434363U, // SQCVTU_Z2Z_StoH
1644240059U, // SQCVTU_Z4Z_DtoH
1344314555U, // SQCVTU_Z4Z_StoB
1648434243U, // SQCVT_Z2Z_StoH
1644239939U, // SQCVT_Z4Z_DtoH
1344314435U, // SQCVT_Z4Z_StoB
270550422U, // SQDECB_XPiI
1612727702U, // SQDECB_XPiWdI
270551675U, // SQDECD_XPiI
1612728955U, // SQDECD_XPiWdI
270584443U, // SQDECD_ZPiI
270552362U, // SQDECH_XPiI
1612729642U, // SQDECH_XPiWdI
58789162U, // SQDECH_ZPiI
2118913U, // SQDECP_XPWd_B
2418038017U, // SQDECP_XPWd_D
1881167105U, // SQDECP_XPWd_H
270554369U, // SQDECP_XPWd_S
2118913U, // SQDECP_XP_B
2418038017U, // SQDECP_XP_D
1881167105U, // SQDECP_XP_H
270554369U, // SQDECP_XP_S
1075893505U, // SQDECP_ZP_D
1658918145U, // SQDECP_ZP_H
1344361729U, // SQDECP_ZP_S
270556735U, // SQDECW_XPiI
1612734015U, // SQDECW_XPiWdI
270622271U, // SQDECW_ZPiI
1344330202U, // SQDMLALBT_ZZZ_D
2317425114U, // SQDMLALBT_ZZZ_H
2686540250U, // SQDMLALBT_ZZZ_S
1344325127U, // SQDMLALB_ZZZI_D
2686535175U, // SQDMLALB_ZZZI_S
1344325127U, // SQDMLALB_ZZZ_D
2317420039U, // SQDMLALB_ZZZ_H
2686535175U, // SQDMLALB_ZZZ_S
1344330358U, // SQDMLALT_ZZZI_D
2686540406U, // SQDMLALT_ZZZI_S
1344330358U, // SQDMLALT_ZZZ_D
2317425270U, // SQDMLALT_ZZZ_H
2686540406U, // SQDMLALT_ZZZ_S
807718931U, // SQDMLALi16
807718931U, // SQDMLALi32
807718931U, // SQDMLALv1i32_indexed
807718931U, // SQDMLALv1i64_indexed
2963410963U, // SQDMLALv2i32_indexed
2963410963U, // SQDMLALv2i32_v2i64
2967605267U, // SQDMLALv4i16_indexed
2967605267U, // SQDMLALv4i16_v4i32
2963407062U, // SQDMLALv4i32_indexed
2963407062U, // SQDMLALv4i32_v2i64
2967601366U, // SQDMLALv8i16_indexed
2967601366U, // SQDMLALv8i16_v4i32
1344330231U, // SQDMLSLBT_ZZZ_D
2317425143U, // SQDMLSLBT_ZZZ_H
2686540279U, // SQDMLSLBT_ZZZ_S
1344325425U, // SQDMLSLB_ZZZI_D
2686535473U, // SQDMLSLB_ZZZI_S
1344325425U, // SQDMLSLB_ZZZ_D
2317420337U, // SQDMLSLB_ZZZ_H
2686535473U, // SQDMLSLB_ZZZ_S
1344330533U, // SQDMLSLT_ZZZI_D
2686540581U, // SQDMLSLT_ZZZI_S
1344330533U, // SQDMLSLT_ZZZ_D
2317425445U, // SQDMLSLT_ZZZ_H
2686540581U, // SQDMLSLT_ZZZ_S
807719690U, // SQDMLSLi16
807719690U, // SQDMLSLi32
807719690U, // SQDMLSLv1i32_indexed
807719690U, // SQDMLSLv1i64_indexed
2963411722U, // SQDMLSLv2i32_indexed
2963411722U, // SQDMLSLv2i32_v2i64
2967606026U, // SQDMLSLv4i16_indexed
2967606026U, // SQDMLSLv4i16_v4i32
2963407194U, // SQDMLSLv4i32_indexed
2963407194U, // SQDMLSLv4i32_v2i64
2967601498U, // SQDMLSLv8i16_indexed
2967601498U, // SQDMLSLv8i16_v4i32
2179091978U, // SQDMULH_VG2_2Z2Z_B
2181205514U, // SQDMULH_VG2_2Z2Z_D
2183319050U, // SQDMULH_VG2_2Z2Z_H
2185432586U, // SQDMULH_VG2_2Z2Z_S
2179091978U, // SQDMULH_VG2_2ZZ_B
2181205514U, // SQDMULH_VG2_2ZZ_D
2183319050U, // SQDMULH_VG2_2ZZ_H
2185432586U, // SQDMULH_VG2_2ZZ_S
2179091978U, // SQDMULH_VG4_4Z4Z_B
2181205514U, // SQDMULH_VG4_4Z4Z_D
2183319050U, // SQDMULH_VG4_4Z4Z_H
2185432586U, // SQDMULH_VG4_4Z4Z_S
2179091978U, // SQDMULH_VG4_4ZZ_B
2181205514U, // SQDMULH_VG4_4ZZ_D
2183319050U, // SQDMULH_VG4_4ZZ_H
2185432586U, // SQDMULH_VG4_4ZZ_S
2418069002U, // SQDMULH_ZZZI_D
2189495818U, // SQDMULH_ZZZI_H
270618122U, // SQDMULH_ZZZI_S
2133514U, // SQDMULH_ZZZ_B
2418069002U, // SQDMULH_ZZZ_D
2189495818U, // SQDMULH_ZZZ_H
270618122U, // SQDMULH_ZZZ_S
2117130U, // SQDMULHv1i16
2117130U, // SQDMULHv1i16_indexed
2117130U, // SQDMULHv1i32
2117130U, // SQDMULHv1i32_indexed
813796874U, // SQDMULHv2i32
813796874U, // SQDMULHv2i32_indexed
817991178U, // SQDMULHv4i16
817991178U, // SQDMULHv4i16_indexed
820088330U, // SQDMULHv4i32
820088330U, // SQDMULHv4i32_indexed
822185482U, // SQDMULHv8i16
822185482U, // SQDMULHv8i16_indexed
270583515U, // SQDMULLB_ZZZI_D
1881229019U, // SQDMULLB_ZZZI_S
270583515U, // SQDMULLB_ZZZ_D
2309031643U, // SQDMULLB_ZZZ_H
1881229019U, // SQDMULLB_ZZZ_S
270588661U, // SQDMULLT_ZZZI_D
1881234165U, // SQDMULLT_ZZZI_S
270588661U, // SQDMULLT_ZZZ_D
2309036789U, // SQDMULLT_ZZZ_H
1881234165U, // SQDMULLT_ZZZ_S
2118166U, // SQDMULLi16
2118166U, // SQDMULLi32
2118166U, // SQDMULLv1i32_indexed
2118166U, // SQDMULLv1i64_indexed
815895062U, // SQDMULLv2i32_indexed
815895062U, // SQDMULLv2i32_v2i64
820089366U, // SQDMULLv4i16_indexed
820089366U, // SQDMULLv4i16_v4i32
815890744U, // SQDMULLv4i32_indexed
815890744U, // SQDMULLv4i32_v2i64
820085048U, // SQDMULLv8i16_indexed
820085048U, // SQDMULLv8i16_v4i32
270550438U, // SQINCB_XPiI
1612727718U, // SQINCB_XPiWdI
270551691U, // SQINCD_XPiI
1612728971U, // SQINCD_XPiWdI
270584459U, // SQINCD_ZPiI
270552378U, // SQINCH_XPiI
1612729658U, // SQINCH_XPiWdI
58789178U, // SQINCH_ZPiI
2118929U, // SQINCP_XPWd_B
2418038033U, // SQINCP_XPWd_D
1881167121U, // SQINCP_XPWd_H
270554385U, // SQINCP_XPWd_S
2118929U, // SQINCP_XP_B
2418038033U, // SQINCP_XP_D
1881167121U, // SQINCP_XP_H
270554385U, // SQINCP_XP_S
1075893521U, // SQINCP_ZP_D
1658918161U, // SQINCP_ZP_H
1344361745U, // SQINCP_ZP_S
270556751U, // SQINCW_XPiI
1612734031U, // SQINCW_XPiWdI
270622287U, // SQINCW_ZPiI
270568474U, // SQNEG_ZPmZ_B
270584858U, // SQNEG_ZPmZ_D
541133850U, // SQNEG_ZPmZ_H
270617626U, // SQNEG_ZPmZ_S
811699226U, // SQNEGv16i8
2116634U, // SQNEGv1i16
2116634U, // SQNEGv1i32
2116634U, // SQNEGv1i64
2116634U, // SQNEGv1i8
813796378U, // SQNEGv2i32
815893530U, // SQNEGv2i64
817990682U, // SQNEGv4i16
820087834U, // SQNEGv4i32
822184986U, // SQNEGv8i16
824282138U, // SQNEGv8i8
2195786939U, // SQRDCMLAH_ZZZI_H
1344359611U, // SQRDCMLAH_ZZZI_S
2149616827U, // SQRDCMLAH_ZZZ_B
1075891387U, // SQRDCMLAH_ZZZ_D
2195786939U, // SQRDCMLAH_ZZZ_H
1344359611U, // SQRDCMLAH_ZZZ_S
1075891398U, // SQRDMLAH_ZZZI_D
2195786950U, // SQRDMLAH_ZZZI_H
1344359622U, // SQRDMLAH_ZZZI_S
2149616838U, // SQRDMLAH_ZZZ_B
1075891398U, // SQRDMLAH_ZZZ_D
2195786950U, // SQRDMLAH_ZZZ_H
1344359622U, // SQRDMLAH_ZZZ_S
807718086U, // SQRDMLAHi16_indexed
807718086U, // SQRDMLAHi32_indexed
807718086U, // SQRDMLAHv1i16
807718086U, // SQRDMLAHv1i32
2961312966U, // SQRDMLAHv2i32
2961312966U, // SQRDMLAHv2i32_indexed
2965507270U, // SQRDMLAHv4i16
2965507270U, // SQRDMLAHv4i16_indexed
2967604422U, // SQRDMLAHv4i32
2967604422U, // SQRDMLAHv4i32_indexed
2969701574U, // SQRDMLAHv8i16
2969701574U, // SQRDMLAHv8i16_indexed
1075892003U, // SQRDMLSH_ZZZI_D
2195787555U, // SQRDMLSH_ZZZI_H
1344360227U, // SQRDMLSH_ZZZI_S
2149617443U, // SQRDMLSH_ZZZ_B
1075892003U, // SQRDMLSH_ZZZ_D
2195787555U, // SQRDMLSH_ZZZ_H
1344360227U, // SQRDMLSH_ZZZ_S
807718691U, // SQRDMLSHi16_indexed
807718691U, // SQRDMLSHi32_indexed
807718691U, // SQRDMLSHv1i16
807718691U, // SQRDMLSHv1i32
2961313571U, // SQRDMLSHv2i32
2961313571U, // SQRDMLSHv2i32_indexed
2965507875U, // SQRDMLSHv4i16
2965507875U, // SQRDMLSHv4i16_indexed
2967605027U, // SQRDMLSHv4i32
2967605027U, // SQRDMLSHv4i32_indexed
2969702179U, // SQRDMLSHv8i16
2969702179U, // SQRDMLSHv8i16_indexed
2418069011U, // SQRDMULH_ZZZI_D
2189495827U, // SQRDMULH_ZZZI_H
270618131U, // SQRDMULH_ZZZI_S
2133523U, // SQRDMULH_ZZZ_B
2418069011U, // SQRDMULH_ZZZ_D
2189495827U, // SQRDMULH_ZZZ_H
270618131U, // SQRDMULH_ZZZ_S
2117139U, // SQRDMULHv1i16
2117139U, // SQRDMULHv1i16_indexed
2117139U, // SQRDMULHv1i32
2117139U, // SQRDMULHv1i32_indexed
813796883U, // SQRDMULHv2i32
813796883U, // SQRDMULHv2i32_indexed
817991187U, // SQRDMULHv4i16
817991187U, // SQRDMULHv4i16_indexed
820088339U, // SQRDMULHv4i32
820088339U, // SQRDMULHv4i32_indexed
822185491U, // SQRDMULHv8i16
822185491U, // SQRDMULHv8i16_indexed
3223361457U, // SQRSHLR_ZPmZ_B
3223377841U, // SQRSHLR_ZPmZ_D
3519092657U, // SQRSHLR_ZPmZ_H
3223410609U, // SQRSHLR_ZPmZ_S
3223359932U, // SQRSHL_ZPmZ_B
3223376316U, // SQRSHL_ZPmZ_D
3519091132U, // SQRSHL_ZPmZ_H
3223409084U, // SQRSHL_ZPmZ_S
811700668U, // SQRSHLv16i8
2118076U, // SQRSHLv1i16
2118076U, // SQRSHLv1i32
2118076U, // SQRSHLv1i64
2118076U, // SQRSHLv1i8
813797820U, // SQRSHLv2i32
815894972U, // SQRSHLv2i64
817992124U, // SQRSHLv4i16
820089276U, // SQRSHLv4i32
822186428U, // SQRSHLv8i16
824283580U, // SQRSHLv8i8
1881180076U, // SQRSHRNB_ZZI_B
2172716972U, // SQRSHRNB_ZZI_H
2418100140U, // SQRSHRNB_ZZI_S
2686491523U, // SQRSHRNT_ZZI_B
2174819203U, // SQRSHRNT_ZZI_H
1075927939U, // SQRSHRNT_ZZI_S
1344312389U, // SQRSHRN_VG4_Z4ZI_B
2181108805U, // SQRSHRN_VG4_Z4ZI_H
2118725U, // SQRSHRNb
2118725U, // SQRSHRNh
2118725U, // SQRSHRNs
2959212968U, // SQRSHRNv16i8_shift
813798469U, // SQRSHRNv2i32_shift
817992773U, // SQRSHRNv4i16_shift
2967601576U, // SQRSHRNv4i32_shift
2969698728U, // SQRSHRNv8i16_shift
824284229U, // SQRSHRNv8i8_shift
1881180122U, // SQRSHRUNB_ZZI_B
2172717018U, // SQRSHRUNB_ZZI_H
2418100186U, // SQRSHRUNB_ZZI_S
2686491578U, // SQRSHRUNT_ZZI_B
2174819258U, // SQRSHRUNT_ZZI_H
1075927994U, // SQRSHRUNT_ZZI_S
1344312467U, // SQRSHRUN_VG4_Z4ZI_B
2181108883U, // SQRSHRUN_VG4_Z4ZI_H
2118803U, // SQRSHRUNb
2118803U, // SQRSHRUNh
2118803U, // SQRSHRUNs
2959213029U, // SQRSHRUNv16i8_shift
813798547U, // SQRSHRUNv2i32_shift
817992851U, // SQRSHRUNv4i16_shift
2967601637U, // SQRSHRUNv4i32_shift
2969698789U, // SQRSHRUNv8i16_shift
824284307U, // SQRSHRUNv8i8_shift
2185305266U, // SQRSHRU_VG2_Z2ZI_H
1344314546U, // SQRSHRU_VG4_Z4ZI_B
2181110962U, // SQRSHRU_VG4_Z4ZI_H
2185303898U, // SQRSHR_VG2_Z2ZI_H
1344313178U, // SQRSHR_VG4_Z4ZI_B
2181109594U, // SQRSHR_VG4_Z4ZI_H
3223361441U, // SQSHLR_ZPmZ_B
3223377825U, // SQSHLR_ZPmZ_D
3519092641U, // SQSHLR_ZPmZ_H
3223410593U, // SQSHLR_ZPmZ_S
3223362706U, // SQSHLU_ZPmI_B
3223379090U, // SQSHLU_ZPmI_D
3519093906U, // SQSHLU_ZPmI_H
3223411858U, // SQSHLU_ZPmI_S
2120850U, // SQSHLUb
2120850U, // SQSHLUd
2120850U, // SQSHLUh
2120850U, // SQSHLUs
811703442U, // SQSHLUv16i8_shift
813800594U, // SQSHLUv2i32_shift
815897746U, // SQSHLUv2i64_shift
817994898U, // SQSHLUv4i16_shift
820092050U, // SQSHLUv4i32_shift
822189202U, // SQSHLUv8i16_shift
824286354U, // SQSHLUv8i8_shift
3223359918U, // SQSHL_ZPmI_B
3223376302U, // SQSHL_ZPmI_D
3519091118U, // SQSHL_ZPmI_H
3223409070U, // SQSHL_ZPmI_S
3223359918U, // SQSHL_ZPmZ_B
3223376302U, // SQSHL_ZPmZ_D
3519091118U, // SQSHL_ZPmZ_H
3223409070U, // SQSHL_ZPmZ_S
2118062U, // SQSHLb
2118062U, // SQSHLd
2118062U, // SQSHLh
2118062U, // SQSHLs
811700654U, // SQSHLv16i8
811700654U, // SQSHLv16i8_shift
2118062U, // SQSHLv1i16
2118062U, // SQSHLv1i32
2118062U, // SQSHLv1i64
2118062U, // SQSHLv1i8
813797806U, // SQSHLv2i32
813797806U, // SQSHLv2i32_shift
815894958U, // SQSHLv2i64
815894958U, // SQSHLv2i64_shift
817992110U, // SQSHLv4i16
817992110U, // SQSHLv4i16_shift
820089262U, // SQSHLv4i32
820089262U, // SQSHLv4i32_shift
822186414U, // SQSHLv8i16
822186414U, // SQSHLv8i16_shift
824283566U, // SQSHLv8i8
824283566U, // SQSHLv8i8_shift
1881180058U, // SQSHRNB_ZZI_B
2172716954U, // SQSHRNB_ZZI_H
2418100122U, // SQSHRNB_ZZI_S
2686491505U, // SQSHRNT_ZZI_B
2174819185U, // SQSHRNT_ZZI_H
1075927921U, // SQSHRNT_ZZI_S
2118709U, // SQSHRNb
2118709U, // SQSHRNh
2118709U, // SQSHRNs
2959212950U, // SQSHRNv16i8_shift
813798453U, // SQSHRNv2i32_shift
817992757U, // SQSHRNv4i16_shift
2967601558U, // SQSHRNv4i32_shift
2969698710U, // SQSHRNv8i16_shift
824284213U, // SQSHRNv8i8_shift
1881180112U, // SQSHRUNB_ZZI_B
2172717008U, // SQSHRUNB_ZZI_H
2418100176U, // SQSHRUNB_ZZI_S
2686491568U, // SQSHRUNT_ZZI_B
2174819248U, // SQSHRUNT_ZZI_H
1075927984U, // SQSHRUNT_ZZI_S
2118794U, // SQSHRUNb
2118794U, // SQSHRUNh
2118794U, // SQSHRUNs
2959213019U, // SQSHRUNv16i8_shift
813798538U, // SQSHRUNv2i32_shift
817992842U, // SQSHRUNv4i16_shift
2967601627U, // SQSHRUNv4i32_shift
2969698779U, // SQSHRUNv8i16_shift
824284298U, // SQSHRUNv8i8_shift
3223361330U, // SQSUBR_ZPmZ_B
3223377714U, // SQSUBR_ZPmZ_D
3519092530U, // SQSUBR_ZPmZ_H
3223410482U, // SQSUBR_ZPmZ_S
2132322U, // SQSUB_ZI_B
2418067810U, // SQSUB_ZI_D
2189494626U, // SQSUB_ZI_H
270616930U, // SQSUB_ZI_S
3223357794U, // SQSUB_ZPmZ_B
3223374178U, // SQSUB_ZPmZ_D
3519088994U, // SQSUB_ZPmZ_H
3223406946U, // SQSUB_ZPmZ_S
2132322U, // SQSUB_ZZZ_B
2418067810U, // SQSUB_ZZZ_D
2189494626U, // SQSUB_ZZZ_H
270616930U, // SQSUB_ZZZ_S
811698530U, // SQSUBv16i8
2115938U, // SQSUBv1i16
2115938U, // SQSUBv1i32
2115938U, // SQSUBv1i64
2115938U, // SQSUBv1i8
813795682U, // SQSUBv2i32
815892834U, // SQSUBv2i64
817989986U, // SQSUBv4i16
820087138U, // SQSUBv4i32
822184290U, // SQSUBv8i16
824281442U, // SQSUBv8i8
1881180096U, // SQXTNB_ZZ_B
1635846080U, // SQXTNB_ZZ_H
2418100160U, // SQXTNB_ZZ_S
2686491552U, // SQXTNT_ZZ_B
1637948320U, // SQXTNT_ZZ_H
1075927968U, // SQXTNT_ZZ_S
2959213003U, // SQXTNv16i8
2118780U, // SQXTNv1i16
2118780U, // SQXTNv1i32
2118780U, // SQXTNv1i8
813798524U, // SQXTNv2i32
817992828U, // SQXTNv4i16
2967601611U, // SQXTNv4i32
2969698763U, // SQXTNv8i16
824284284U, // SQXTNv8i8
1881180133U, // SQXTUNB_ZZ_B
1635846117U, // SQXTUNB_ZZ_H
2418100197U, // SQXTUNB_ZZ_S
2686491589U, // SQXTUNT_ZZ_B
1637948357U, // SQXTUNT_ZZ_H
1075928005U, // SQXTUNT_ZZ_S
2959213040U, // SQXTUNv16i8
2118822U, // SQXTUNv1i16
2118822U, // SQXTUNv1i32
2118822U, // SQXTUNv1i8
813798566U, // SQXTUNv2i32
817992870U, // SQXTUNv4i16
2967601648U, // SQXTUNv4i32
2969698800U, // SQXTUNv8i16
824284326U, // SQXTUNv8i8
3223358136U, // SRHADD_ZPmZ_B
3223374520U, // SRHADD_ZPmZ_D
3519089336U, // SRHADD_ZPmZ_H
3223407288U, // SRHADD_ZPmZ_S
811698872U, // SRHADDv16i8
813796024U, // SRHADDv2i32
817990328U, // SRHADDv4i16
820087480U, // SRHADDv4i32
822184632U, // SRHADDv8i16
824281784U, // SRHADDv8i8
2149617616U, // SRI_ZZI_B
1075892176U, // SRI_ZZI_D
2195787728U, // SRI_ZZI_H
1344360400U, // SRI_ZZI_S
807718864U, // SRId
2959216592U, // SRIv16i8_shift
2961313744U, // SRIv2i32_shift
2963410896U, // SRIv2i64_shift
2965508048U, // SRIv4i16_shift
2967605200U, // SRIv4i32_shift
2969702352U, // SRIv8i16_shift
2971799504U, // SRIv8i8_shift
3223361475U, // SRSHLR_ZPmZ_B
3223377859U, // SRSHLR_ZPmZ_D
3519092675U, // SRSHLR_ZPmZ_H
3223410627U, // SRSHLR_ZPmZ_S
2179092940U, // SRSHL_VG2_2Z2Z_B
2181206476U, // SRSHL_VG2_2Z2Z_D
2183320012U, // SRSHL_VG2_2Z2Z_H
2185433548U, // SRSHL_VG2_2Z2Z_S
2179092940U, // SRSHL_VG2_2ZZ_B
2181206476U, // SRSHL_VG2_2ZZ_D
2183320012U, // SRSHL_VG2_2ZZ_H
2185433548U, // SRSHL_VG2_2ZZ_S
2179092940U, // SRSHL_VG4_4Z4Z_B
2181206476U, // SRSHL_VG4_4Z4Z_D
2183320012U, // SRSHL_VG4_4Z4Z_H
2185433548U, // SRSHL_VG4_4Z4Z_S
2179092940U, // SRSHL_VG4_4ZZ_B
2181206476U, // SRSHL_VG4_4ZZ_D
2183320012U, // SRSHL_VG4_4ZZ_H
2185433548U, // SRSHL_VG4_4ZZ_S
3223359948U, // SRSHL_ZPmZ_B
3223376332U, // SRSHL_ZPmZ_D
3519091148U, // SRSHL_ZPmZ_H
3223409100U, // SRSHL_ZPmZ_S
811700684U, // SRSHLv16i8
2118092U, // SRSHLv1i64
813797836U, // SRSHLv2i32
815894988U, // SRSHLv2i64
817992140U, // SRSHLv4i16
820089292U, // SRSHLv4i32
822186444U, // SRSHLv8i16
824283596U, // SRSHLv8i8
3223361386U, // SRSHR_ZPmI_B
3223377770U, // SRSHR_ZPmI_D
3519092586U, // SRSHR_ZPmI_H
3223410538U, // SRSHR_ZPmI_S
2119530U, // SRSHRd
811702122U, // SRSHRv16i8_shift
813799274U, // SRSHRv2i32_shift
815896426U, // SRSHRv2i64_shift
817993578U, // SRSHRv4i16_shift
820090730U, // SRSHRv4i32_shift
822187882U, // SRSHRv8i16_shift
824285034U, // SRSHRv8i8_shift
2149614608U, // SRSRA_ZZI_B
1075889168U, // SRSRA_ZZI_D
2195784720U, // SRSRA_ZZI_H
1344357392U, // SRSRA_ZZI_S
807715856U, // SRSRAd
2959213584U, // SRSRAv16i8_shift
2961310736U, // SRSRAv2i32_shift
2963407888U, // SRSRAv2i64_shift
2965505040U, // SRSRAv4i16_shift
2967602192U, // SRSRAv4i32_shift
2969699344U, // SRSRAv8i16_shift
2971796496U, // SRSRAv8i8_shift
270583499U, // SSHLLB_ZZI_D
2309031627U, // SSHLLB_ZZI_H
1881229003U, // SSHLLB_ZZI_S
270588645U, // SSHLLT_ZZI_D
2309036773U, // SSHLLT_ZZI_H
1881234149U, // SSHLLT_ZZI_S
822182184U, // SSHLLv16i8_shift
815895032U, // SSHLLv2i32_shift
820089336U, // SSHLLv4i16_shift
815890728U, // SSHLLv4i32_shift
820085032U, // SSHLLv8i16_shift
822186488U, // SSHLLv8i8_shift
811700698U, // SSHLv16i8
2118106U, // SSHLv1i64
813797850U, // SSHLv2i32
815895002U, // SSHLv2i64
817992154U, // SSHLv4i16
820089306U, // SSHLv4i32
822186458U, // SSHLv8i16
824283610U, // SSHLv8i8
2119544U, // SSHRd
811702136U, // SSHRv16i8_shift
813799288U, // SSHRv2i32_shift
815896440U, // SSHRv2i64_shift
817993592U, // SSHRv4i16_shift
820090744U, // SSHRv4i32_shift
822187896U, // SSHRv8i16_shift
824285048U, // SSHRv8i8_shift
2149614622U, // SSRA_ZZI_B
1075889182U, // SSRA_ZZI_D
2195784734U, // SSRA_ZZI_H
1344357406U, // SSRA_ZZI_S
807715870U, // SSRAd
2959213598U, // SSRAv16i8_shift
2961310750U, // SSRAv2i32_shift
2963407902U, // SSRAv2i64_shift
2965505054U, // SSRAv4i16_shift
2967602206U, // SSRAv4i32_shift
2969699358U, // SSRAv8i16_shift
2971796510U, // SSRAv8i8_shift
1908573389U, // SST1B_D
1908573389U, // SST1B_D_IMM
1908573389U, // SST1B_D_SXTW
1908573389U, // SST1B_D_UXTW
1908606157U, // SST1B_S_IMM
1908606157U, // SST1B_S_SXTW
1908606157U, // SST1B_S_UXTW
1908574756U, // SST1D
1908574756U, // SST1D_IMM
1908574756U, // SST1D_SCALED
1908574756U, // SST1D_SXTW
1908574756U, // SST1D_SXTW_SCALED
1908574756U, // SST1D_UXTW
1908574756U, // SST1D_UXTW_SCALED
1908575342U, // SST1H_D
1908575342U, // SST1H_D_IMM
1908575342U, // SST1H_D_SCALED
1908575342U, // SST1H_D_SXTW
1908575342U, // SST1H_D_SXTW_SCALED
1908575342U, // SST1H_D_UXTW
1908575342U, // SST1H_D_UXTW_SCALED
1908608110U, // SST1H_S_IMM
1908608110U, // SST1H_S_SXTW
1908608110U, // SST1H_S_SXTW_SCALED
1908608110U, // SST1H_S_UXTW
1908608110U, // SST1H_S_UXTW_SCALED
1908905624U, // SST1Q
1908579830U, // SST1W_D
1908579830U, // SST1W_D_IMM
1908579830U, // SST1W_D_SCALED
1908579830U, // SST1W_D_SXTW
1908579830U, // SST1W_D_SXTW_SCALED
1908579830U, // SST1W_D_UXTW
1908579830U, // SST1W_D_UXTW_SCALED
1908612598U, // SST1W_IMM
1908612598U, // SST1W_SXTW
1908612598U, // SST1W_SXTW_SCALED
1908612598U, // SST1W_UXTW
1908612598U, // SST1W_UXTW_SCALED
270588389U, // SSUBLBT_ZZZ_D
2309036517U, // SSUBLBT_ZZZ_H
1881233893U, // SSUBLBT_ZZZ_S
270583428U, // SSUBLB_ZZZ_D
2309031556U, // SSUBLB_ZZZ_H
1881228932U, // SSUBLB_ZZZ_S
270584084U, // SSUBLTB_ZZZ_D
2309032212U, // SSUBLTB_ZZZ_H
1881229588U, // SSUBLTB_ZZZ_S
270588569U, // SSUBLT_ZZZ_D
2309036697U, // SSUBLT_ZZZ_H
1881234073U, // SSUBLT_ZZZ_S
822182136U, // SSUBLv16i8_v8i16
815894862U, // SSUBLv2i32_v2i64
820089166U, // SSUBLv4i16_v4i32
815890680U, // SSUBLv4i32_v2i64
820084984U, // SSUBLv8i16_v4i32
822186318U, // SSUBLv8i8_v8i16
2418067830U, // SSUBWB_ZZZ_D
2189494646U, // SSUBWB_ZZZ_H
270616950U, // SSUBWB_ZZZ_S
2418072663U, // SSUBWT_ZZZ_D
2189499479U, // SSUBWT_ZZZ_H
270621783U, // SSUBWT_ZZZ_S
822182440U, // SSUBWv16i8_v8i16
815898152U, // SSUBWv2i32_v2i64
820092456U, // SSUBWv4i16_v4i32
815890984U, // SSUBWv4i32_v2i64
820085288U, // SSUBWv8i16_v4i32
822189608U, // SSUBWv8i8_v8i16
1908557005U, // ST1B
1969374413U, // ST1B_2Z
1969374413U, // ST1B_2Z_IMM
1969374413U, // ST1B_4Z
1969374413U, // ST1B_4Z_IMM
1908573389U, // ST1B_D
1908573389U, // ST1B_D_IMM
1908589773U, // ST1B_H
1908589773U, // ST1B_H_IMM
1908557005U, // ST1B_IMM
1908606157U, // ST1B_S
1908606157U, // ST1B_S_IMM
1076397261U, // ST1B_VG2_M2ZPXI
1076397261U, // ST1B_VG2_M2ZPXX
1969374413U, // ST1B_VG4_M4ZPXI
1969374413U, // ST1B_VG4_M4ZPXX
1908574756U, // ST1D
1969392164U, // ST1D_2Z
1969392164U, // ST1D_2Z_IMM
1969392164U, // ST1D_4Z
1969392164U, // ST1D_4Z_IMM
1908574756U, // ST1D_IMM
1908902436U, // ST1D_Q
1908902436U, // ST1D_Q_IMM
1969392164U, // ST1D_VG2_M2ZPXI
1969392164U, // ST1D_VG2_M2ZPXX
1969392164U, // ST1D_VG4_M4ZPXI
1969392164U, // ST1D_VG4_M4ZPXX
573546U, // ST1Fourv16b
92864618U, // ST1Fourv16b_POST
606314U, // ST1Fourv1d
94994538U, // ST1Fourv1d_POST
639082U, // ST1Fourv2d
92930154U, // ST1Fourv2d_POST
671850U, // ST1Fourv2s
95060074U, // ST1Fourv2s_POST
704618U, // ST1Fourv4h
95092842U, // ST1Fourv4h_POST
737386U, // ST1Fourv4s
93028458U, // ST1Fourv4s_POST
770154U, // ST1Fourv8b
95158378U, // ST1Fourv8b_POST
802922U, // ST1Fourv8h
93093994U, // ST1Fourv8h_POST
1908591726U, // ST1H
1969409134U, // ST1H_2Z
1969409134U, // ST1H_2Z_IMM
1969409134U, // ST1H_4Z
1969409134U, // ST1H_4Z_IMM
1908575342U, // ST1H_D
1908575342U, // ST1H_D_IMM
1908591726U, // ST1H_IMM
1908608110U, // ST1H_S
1908608110U, // ST1H_S_IMM
1076677742U, // ST1H_VG2_M2ZPXI
1076677742U, // ST1H_VG2_M2ZPXX
1969409134U, // ST1H_VG4_M4ZPXI
1969409134U, // ST1H_VG4_M4ZPXX
573546U, // ST1Onev16b
97058922U, // ST1Onev16b_POST
606314U, // ST1Onev1d
99188842U, // ST1Onev1d_POST
639082U, // ST1Onev2d
97124458U, // ST1Onev2d_POST
671850U, // ST1Onev2s
99254378U, // ST1Onev2s_POST
704618U, // ST1Onev4h
99287146U, // ST1Onev4h_POST
737386U, // ST1Onev4s
97222762U, // ST1Onev4s_POST
770154U, // ST1Onev8b
99352682U, // ST1Onev8b_POST
802922U, // ST1Onev8h
97288298U, // ST1Onev8h_POST
573546U, // ST1Threev16b
107544682U, // ST1Threev16b_POST
606314U, // ST1Threev1d
109674602U, // ST1Threev1d_POST
639082U, // ST1Threev2d
107610218U, // ST1Threev2d_POST
671850U, // ST1Threev2s
109740138U, // ST1Threev2s_POST
704618U, // ST1Threev4h
109772906U, // ST1Threev4h_POST
737386U, // ST1Threev4s
107708522U, // ST1Threev4s_POST
770154U, // ST1Threev8b
109838442U, // ST1Threev8b_POST
802922U, // ST1Threev8h
107774058U, // ST1Threev8h_POST
573546U, // ST1Twov16b
94961770U, // ST1Twov16b_POST
606314U, // ST1Twov1d
97091690U, // ST1Twov1d_POST
639082U, // ST1Twov2d
95027306U, // ST1Twov2d_POST
671850U, // ST1Twov2s
97157226U, // ST1Twov2s_POST
704618U, // ST1Twov4h
97189994U, // ST1Twov4h_POST
737386U, // ST1Twov4s
95125610U, // ST1Twov4s_POST
770154U, // ST1Twov8b
97255530U, // ST1Twov8b_POST
802922U, // ST1Twov8h
95191146U, // ST1Twov8h_POST
1908612598U, // ST1W
1969430006U, // ST1W_2Z
1969430006U, // ST1W_2Z_IMM
1969430006U, // ST1W_4Z
1969430006U, // ST1W_4Z_IMM
1908579830U, // ST1W_D
1908579830U, // ST1W_D_IMM
1908612598U, // ST1W_IMM
1908907510U, // ST1W_Q
1908907510U, // ST1W_Q_IMM
1969430006U, // ST1W_VG2_M2ZPXI
1969430006U, // ST1W_VG2_M2ZPXX
1969430006U, // ST1W_VG4_M4ZPXI
1969430006U, // ST1W_VG4_M4ZPXX
2210932332U, // ST1_MXIPXX_H_B
2210932346U, // ST1_MXIPXX_H_D
2210932360U, // ST1_MXIPXX_H_H
2210932374U, // ST1_MXIPXX_H_Q
2210932388U, // ST1_MXIPXX_H_S
2210948716U, // ST1_MXIPXX_V_B
2210948730U, // ST1_MXIPXX_V_D
2210948744U, // ST1_MXIPXX_V_H
2210948758U, // ST1_MXIPXX_V_Q
2210948772U, // ST1_MXIPXX_V_S
179093610U, // ST1i16
2328690794U, // ST1i16_POST
1228906U, // ST1i32
2597159018U, // ST1i32_POST
1245290U, // ST1i64
2865627242U, // ST1i64_POST
178815082U, // ST1i8
3134095466U, // ST1i8_POST
1908557034U, // ST2B
1908557034U, // ST2B_IMM
1908574768U, // ST2D
1908574768U, // ST2D_IMM
44059638U, // ST2GOffset
849660918U, // ST2GPostIndex
849660918U, // ST2GPreIndex
1908591755U, // ST2H
1908591755U, // ST2H_IMM
1908905636U, // ST2Q
1908905636U, // ST2Q_IMM
573987U, // ST2Twov16b
94962211U, // ST2Twov16b_POST
639523U, // ST2Twov2d
95027747U, // ST2Twov2d_POST
672291U, // ST2Twov2s
97157667U, // ST2Twov2s_POST
705059U, // ST2Twov4h
97190435U, // ST2Twov4h_POST
737827U, // ST2Twov4s
95126051U, // ST2Twov4s_POST
770595U, // ST2Twov8b
97255971U, // ST2Twov8b_POST
803363U, // ST2Twov8h
95191587U, // ST2Twov8h_POST
1908612618U, // ST2W
1908612618U, // ST2W_IMM
179094051U, // ST2i16
2597126691U, // ST2i16_POST
1229347U, // ST2i32
2865594915U, // ST2i32_POST
1245731U, // ST2i64
3402498595U, // ST2i64_POST
178815523U, // ST2i8
2328789539U, // ST2i8_POST
1908557055U, // ST3B
1908557055U, // ST3B_IMM
1908574780U, // ST3D
1908574780U, // ST3D_IMM
1908591767U, // ST3H
1908591767U, // ST3H_IMM
1908905648U, // ST3Q
1908905648U, // ST3Q_IMM
574053U, // ST3Threev16b
107545189U, // ST3Threev16b_POST
639589U, // ST3Threev2d
107610725U, // ST3Threev2d_POST
672357U, // ST3Threev2s
109740645U, // ST3Threev2s_POST
705125U, // ST3Threev4h
109773413U, // ST3Threev4h_POST
737893U, // ST3Threev4s
107709029U, // ST3Threev4s_POST
770661U, // ST3Threev8b
109838949U, // ST3Threev8b_POST
803429U, // ST3Threev8h
107774565U, // ST3Threev8h_POST
1908612630U, // ST3W
1908612630U, // ST3W_IMM
179094117U, // ST3i16
3670868581U, // ST3i16_POST
1229413U, // ST3i32
3939336805U, // ST3i32_POST
1245797U, // ST3i64
4207805029U, // ST3i64_POST
178815589U, // ST3i8
181305957U, // ST3i8_POST
1908557081U, // ST4B
1908557081U, // ST4B_IMM
1908574792U, // ST4D
1908574792U, // ST4D_IMM
574077U, // ST4Fourv16b
92865149U, // ST4Fourv16b_POST
639613U, // ST4Fourv2d
92930685U, // ST4Fourv2d_POST
672381U, // ST4Fourv2s
95060605U, // ST4Fourv2s_POST
705149U, // ST4Fourv4h
95093373U, // ST4Fourv4h_POST
737917U, // ST4Fourv4s
93028989U, // ST4Fourv4s_POST
770685U, // ST4Fourv8b
95158909U, // ST4Fourv8b_POST
803453U, // ST4Fourv8h
93094525U, // ST4Fourv8h_POST
1908591779U, // ST4H
1908591779U, // ST4H_IMM
1908905660U, // ST4Q
1908905660U, // ST4Q_IMM
1908612642U, // ST4W
1908612642U, // ST4W_IMM
179094141U, // ST4i16
2865562237U, // ST4i16_POST
1229437U, // ST4i32
3402465917U, // ST4i32_POST
1245821U, // ST4i64
449708669U, // ST4i64_POST
178815613U, // ST4i8
2597225085U, // ST4i8_POST
984332U, // ST64B
538991819U, // ST64BV
538984480U, // ST64BV0
44061627U, // STGM
44059702U, // STGOffset
2118963U, // STGPi
849660982U, // STGPostIndex
807720243U, // STGPpost
807720243U, // STGPpre
849660982U, // STGPreIndex
2119006U, // STILPW
807720286U, // STILPWpre
2119006U, // STILPX
807720286U, // STILPXpre
1245230U, // STL1
44058671U, // STLLRB
44060299U, // STLLRH
44062675U, // STLLRW
44062675U, // STLLRX
44058679U, // STLRB
44060307U, // STLRH
44062688U, // STLRW
849663968U, // STLRWpre
44062688U, // STLRX
849663968U, // STLRXpre
44058729U, // STLURBi
44060357U, // STLURHi
44062791U, // STLURWi
44062791U, // STLURXi
44062791U, // STLURbi
44062791U, // STLURdi
44062791U, // STLURhi
44062791U, // STLURqi
44062791U, // STLURsi
2119296U, // STLXPW
2119296U, // STLXPX
2115728U, // STLXRB
2117356U, // STLXRH
2119815U, // STLXRW
2119815U, // STLXRX
2119096U, // STNPDi
2119096U, // STNPQi
2119096U, // STNPSi
2119096U, // STNPWi
2119096U, // STNPXi
1969374405U, // STNT1B_2Z
1969374405U, // STNT1B_2Z_IMM
1969374405U, // STNT1B_4Z
1969374405U, // STNT1B_4Z_IMM
1076397253U, // STNT1B_VG2_M2ZPXI
1076397253U, // STNT1B_VG2_M2ZPXX
1969374405U, // STNT1B_VG4_M4ZPXI
1969374405U, // STNT1B_VG4_M4ZPXX
1908556997U, // STNT1B_ZRI
1908556997U, // STNT1B_ZRR
1908573381U, // STNT1B_ZZR_D_REAL
1908606149U, // STNT1B_ZZR_S_REAL
1969392156U, // STNT1D_2Z
1969392156U, // STNT1D_2Z_IMM
1969392156U, // STNT1D_4Z
1969392156U, // STNT1D_4Z_IMM
1969392156U, // STNT1D_VG2_M2ZPXI
1969392156U, // STNT1D_VG2_M2ZPXX
1969392156U, // STNT1D_VG4_M4ZPXI
1969392156U, // STNT1D_VG4_M4ZPXX
1908574748U, // STNT1D_ZRI
1908574748U, // STNT1D_ZRR
1908574748U, // STNT1D_ZZR_D_REAL
1969409126U, // STNT1H_2Z
1969409126U, // STNT1H_2Z_IMM
1969409126U, // STNT1H_4Z
1969409126U, // STNT1H_4Z_IMM
1076677734U, // STNT1H_VG2_M2ZPXI
1076677734U, // STNT1H_VG2_M2ZPXX
1969409126U, // STNT1H_VG4_M4ZPXI
1969409126U, // STNT1H_VG4_M4ZPXX
1908591718U, // STNT1H_ZRI
1908591718U, // STNT1H_ZRR
1908575334U, // STNT1H_ZZR_D_REAL
1908608102U, // STNT1H_ZZR_S_REAL
1969429998U, // STNT1W_2Z
1969429998U, // STNT1W_2Z_IMM
1969429998U, // STNT1W_4Z
1969429998U, // STNT1W_4Z_IMM
1969429998U, // STNT1W_VG2_M2ZPXI
1969429998U, // STNT1W_VG2_M2ZPXX
1969429998U, // STNT1W_VG4_M4ZPXI
1969429998U, // STNT1W_VG4_M4ZPXX
1908612590U, // STNT1W_ZRI
1908612590U, // STNT1W_ZRR
1908579822U, // STNT1W_ZZR_D_REAL
1908612590U, // STNT1W_ZZR_S_REAL
2119234U, // STPDi
807720514U, // STPDpost
807720514U, // STPDpre
2119234U, // STPQi
807720514U, // STPQpost
807720514U, // STPQpre
2119234U, // STPSi
807720514U, // STPSpost
807720514U, // STPSpre
2119234U, // STPWi
807720514U, // STPWpost
807720514U, // STPWpre
2119234U, // STPXi
807720514U, // STPXpost
807720514U, // STPXpre
849659989U, // STRBBpost
849659989U, // STRBBpre
44058709U, // STRBBroW
44058709U, // STRBBroX
44058709U, // STRBBui
849664048U, // STRBpost
849664048U, // STRBpre
44062768U, // STRBroW
44062768U, // STRBroX
44062768U, // STRBui
849664048U, // STRDpost
849664048U, // STRDpre
44062768U, // STRDroW
44062768U, // STRDroX
44062768U, // STRDui
849661617U, // STRHHpost
849661617U, // STRHHpre
44060337U, // STRHHroW
44060337U, // STRHHroX
44060337U, // STRHHui
849664048U, // STRHpost
849664048U, // STRHpre
44062768U, // STRHroW
44062768U, // STRHroX
44062768U, // STRHui
849664048U, // STRQpost
849664048U, // STRQpre
44062768U, // STRQroW
44062768U, // STRQroX
44062768U, // STRQui
849664048U, // STRSpost
849664048U, // STRSpre
44062768U, // STRSroW
44062768U, // STRSroX
44062768U, // STRSui
849664048U, // STRWpost
849664048U, // STRWpre
44062768U, // STRWroW
44062768U, // STRWroX
44062768U, // STRWui
849664048U, // STRXpost
849664048U, // STRXpre
44062768U, // STRXroW
44062768U, // STRXroX
44062768U, // STRXui
45062192U, // STR_PXI
44062768U, // STR_TX
1038384U, // STR_ZA
45062192U, // STR_ZXI
44058715U, // STTRBi
44060343U, // STTRHi
44062773U, // STTRWi
44062773U, // STTRXi
44058746U, // STURBBi
44062806U, // STURBi
44062806U, // STURDi
44060374U, // STURHHi
44062806U, // STURHi
44062806U, // STURQi
44062806U, // STURSi
44062806U, // STURWi
44062806U, // STURXi
2119303U, // STXPW
2119303U, // STXPX
2115736U, // STXRB
2117364U, // STXRH
2119822U, // STXRW
2119822U, // STXRX
44059644U, // STZ2GOffset
849660924U, // STZ2GPostIndex
849660924U, // STZ2GPreIndex
44061633U, // STZGM
44059707U, // STZGOffset
849660987U, // STZGPostIndex
849660987U, // STZGPreIndex
2116611U, // SUBG
1881180023U, // SUBHNB_ZZZ_B
2172716919U, // SUBHNB_ZZZ_H
2418100087U, // SUBHNB_ZZZ_S
2686491482U, // SUBHNT_ZZZ_B
2174819162U, // SUBHNT_ZZZ_H
1075927898U, // SUBHNT_ZZZ_S
813798398U, // SUBHNv2i64_v2i32
2967601541U, // SUBHNv2i64_v4i32
817992702U, // SUBHNv4i32_v4i16
2969698693U, // SUBHNv4i32_v8i16
2959212933U, // SUBHNv8i16_v16i8
824284158U, // SUBHNv8i16_v8i8
2118907U, // SUBP
2120032U, // SUBPS
2135836U, // SUBR_ZI_B
2418071324U, // SUBR_ZI_D
2189498140U, // SUBR_ZI_H
270620444U, // SUBR_ZI_S
3223361308U, // SUBR_ZPmZ_B
3223377692U, // SUBR_ZPmZ_D
3519092508U, // SUBR_ZPmZ_H
3223410460U, // SUBR_ZPmZ_S
2119896U, // SUBSWri
2119896U, // SUBSWrs
2119896U, // SUBSWrx
2119896U, // SUBSXri
2119896U, // SUBSXrs
2119896U, // SUBSXrx
2119896U, // SUBSXrx64
2115904U, // SUBWri
2115904U, // SUBWrs
2115904U, // SUBWrx
2115904U, // SUBXri
2115904U, // SUBXrs
2115904U, // SUBXrx
2115904U, // SUBXrx64
3798157632U, // SUB_VG2_M2Z2Z_D
3798174016U, // SUB_VG2_M2Z2Z_S
3798157632U, // SUB_VG2_M2ZZ_D
3798174016U, // SUB_VG2_M2ZZ_S
3798157632U, // SUB_VG2_M2Z_D
3798174016U, // SUB_VG2_M2Z_S
4066593088U, // SUB_VG4_M4Z4Z_D
4066609472U, // SUB_VG4_M4Z4Z_S
4066593088U, // SUB_VG4_M4ZZ_D
4066609472U, // SUB_VG4_M4ZZ_S
4066593088U, // SUB_VG4_M4Z_D
4066609472U, // SUB_VG4_M4Z_S
2132288U, // SUB_ZI_B
2418067776U, // SUB_ZI_D
2189494592U, // SUB_ZI_H
270616896U, // SUB_ZI_S
3223357760U, // SUB_ZPmZ_B
3223374144U, // SUB_ZPmZ_D
3519088960U, // SUB_ZPmZ_H
3223406912U, // SUB_ZPmZ_S
2132288U, // SUB_ZZZ_B
2418067776U, // SUB_ZZZ_D
2189494592U, // SUB_ZZZ_H
270616896U, // SUB_ZZZ_S
811698496U, // SUBv16i8
2115904U, // SUBv1i64
813795648U, // SUBv2i32
815892800U, // SUBv2i64
817989952U, // SUBv4i16
820087104U, // SUBv4i32
822184256U, // SUBv8i16
824281408U, // SUBv8i8
3798178795U, // SUDOT_VG2_M2ZZI_BToS
3798178795U, // SUDOT_VG2_M2ZZ_BToS
4066614251U, // SUDOT_VG4_M4ZZI_BToS
4066614251U, // SUDOT_VG4_M4ZZ_BToS
2149669867U, // SUDOT_ZZZI
2967608299U, // SUDOTlanev16i8
2961316843U, // SUDOTlanev8i8
1516474863U, // SUMLALL_MZZI_BtoS
3932393967U, // SUMLALL_VG2_M2ZZI_BtoS
979603951U, // SUMLALL_VG2_M2ZZ_BtoS
4200829423U, // SUMLALL_VG4_M4ZZI_BtoS
1248039407U, // SUMLALL_VG4_M4ZZ_BtoS
56738661U, // SUMOPA_MPPZZ_D
176276325U, // SUMOPA_MPPZZ_S
56744326U, // SUMOPS_MPPZZ_D
176281990U, // SUMOPS_MPPZZ_S
270585761U, // SUNPKHI_ZZ_D
1772162977U, // SUNPKHI_ZZ_H
1881231265U, // SUNPKHI_ZZ_S
270587086U, // SUNPKLO_ZZ_D
1772164302U, // SUNPKLO_ZZ_H
1881232590U, // SUNPKLO_ZZ_S
1635946467U, // SUNPK_VG2_2ZZ_D
1772277731U, // SUNPK_VG2_2ZZ_H
1652756451U, // SUNPK_VG2_2ZZ_S
1648529379U, // SUNPK_VG4_4Z2Z_D
1642254307U, // SUNPK_VG4_4Z2Z_H
1646464995U, // SUNPK_VG4_4Z2Z_S
3223358189U, // SUQADD_ZPmZ_B
3223374573U, // SUQADD_ZPmZ_D
3519089389U, // SUQADD_ZPmZ_H
3223407341U, // SUQADD_ZPmZ_S
2959215341U, // SUQADDv16i8
807717613U, // SUQADDv1i16
807717613U, // SUQADDv1i32
807717613U, // SUQADDv1i64
807717613U, // SUQADDv1i8
2961312493U, // SUQADDv2i32
2963409645U, // SUQADDv2i64
2965506797U, // SUQADDv4i16
2967603949U, // SUQADDv4i32
2969701101U, // SUQADDv8i16
2971798253U, // SUQADDv8i8
4066614274U, // SUVDOT_VG4_M4ZZI_BToS
379385U, // SVC
3798178811U, // SVDOT_VG2_M2ZZI_HtoS
4066614267U, // SVDOT_VG4_M4ZZI_BtoS
4066597883U, // SVDOT_VG4_M4ZZI_HtoD
1344587068U, // SWPAB
1344589028U, // SWPAH
1344587328U, // SWPALB
1344589184U, // SWPALH
1344590010U, // SWPALW
1344590010U, // SWPALX
1344586711U, // SWPAW
1344586711U, // SWPAX
1344587773U, // SWPB
1344589401U, // SWPH
1344587537U, // SWPLB
1344589281U, // SWPLH
1344590527U, // SWPLW
1344590527U, // SWPLX
3102154U, // SWPP
3097457U, // SWPPA
3100746U, // SWPPAL
3101265U, // SWPPL
1344591441U, // SWPW
1344591441U, // SWPX
270584114U, // SXTB_ZPmZ_D
541133106U, // SXTB_ZPmZ_H
270616882U, // SXTB_ZPmZ_S
270585700U, // SXTH_ZPmZ_D
270618468U, // SXTH_ZPmZ_S
270589675U, // SXTW_ZPmZ_D
2118441U, // SYSLxt
807425555U, // SYSPxt
807425555U, // SYSPxt_XZR
807426500U, // SYSxt
2418054873U, // TBLQ_ZZZ_B
1075893977U, // TBLQ_ZZZ_D
2183206617U, // TBLQ_ZZZ_H
1344362201U, // TBLQ_ZZZ_S
2418053433U, // TBL_ZZZZ_B
1075892537U, // TBL_ZZZZ_D
2183205177U, // TBL_ZZZZ_H
1344360761U, // TBL_ZZZZ_S
2418053433U, // TBL_ZZZ_B
1075892537U, // TBL_ZZZ_D
2183205177U, // TBL_ZZZ_H
1344360761U, // TBL_ZZZ_S
1348571449U, // TBLv16i8Four
1348571449U, // TBLv16i8One
1348571449U, // TBLv16i8Three
1348571449U, // TBLv16i8Two
1361154361U, // TBLv8i8Four
1361154361U, // TBLv8i8One
1361154361U, // TBLv8i8Three
1361154361U, // TBLv8i8Two
2121686U, // TBNZW
2121686U, // TBNZX
2149619435U, // TBXQ_ZZZ_B
1075893995U, // TBXQ_ZZZ_D
2195789547U, // TBXQ_ZZZ_H
1344362219U, // TBXQ_ZZZ_S
2149621558U, // TBX_ZZZ_B
1075896118U, // TBX_ZZZ_D
2195791670U, // TBX_ZZZ_H
1344364342U, // TBX_ZZZ_S
1617043254U, // TBXv16i8Four
1617043254U, // TBXv16i8One
1617043254U, // TBXv16i8Three
1617043254U, // TBXv16i8Two
1629626166U, // TBXv8i8Four
1629626166U, // TBXv8i8One
1629626166U, // TBXv8i8Three
1629626166U, // TBXv8i8Two
2121670U, // TBZW
2121670U, // TBZX
381328U, // TCANCEL
9815U, // TCOMMIT
23129U, // TRCIT
2129972U, // TRN1_PPP_B
2418065460U, // TRN1_PPP_D
2189492276U, // TRN1_PPP_H
270614580U, // TRN1_PPP_S
2129972U, // TRN1_ZZZ_B
2418065460U, // TRN1_ZZZ_D
2189492276U, // TRN1_ZZZ_H
2212970548U, // TRN1_ZZZ_Q
270614580U, // TRN1_ZZZ_S
811696180U, // TRN1v16i8
813793332U, // TRN1v2i32
815890484U, // TRN1v2i64
817987636U, // TRN1v4i16
820084788U, // TRN1v4i32
822181940U, // TRN1v8i16
824279092U, // TRN1v8i8
2130364U, // TRN2_PPP_B
2418065852U, // TRN2_PPP_D
2189492668U, // TRN2_PPP_H
270614972U, // TRN2_PPP_S
2130364U, // TRN2_ZZZ_B
2418065852U, // TRN2_ZZZ_D
2189492668U, // TRN2_ZZZ_H
2212970940U, // TRN2_ZZZ_Q
270614972U, // TRN2_ZZZ_S
811696572U, // TRN2v16i8
813793724U, // TRN2v2i32
815890876U, // TRN2v2i64
817988028U, // TRN2v4i16
820085180U, // TRN2v4i32
822182332U, // TRN2v8i16
824279484U, // TRN2v8i8
444679U, // TSB
23568U, // TSTART
23590U, // TTEST
1344325109U, // UABALB_ZZZ_D
2317420021U, // UABALB_ZZZ_H
2686535157U, // UABALB_ZZZ_S
1344330350U, // UABALT_ZZZ_D
2317425262U, // UABALT_ZZZ_H
2686540398U, // UABALT_ZZZ_S
2969698510U, // UABALv16i8_v8i16
2963410947U, // UABALv2i32_v2i64
2967605251U, // UABALv4i16_v4i32
2963407054U, // UABALv4i32_v2i64
2967601358U, // UABALv8i16_v4i32
2969702403U, // UABALv8i8_v8i16
2149614276U, // UABA_ZZZ_B
1075888836U, // UABA_ZZZ_D
2195784388U, // UABA_ZZZ_H
1344357060U, // UABA_ZZZ_S
2959213252U, // UABAv16i8
2961310404U, // UABAv2i32
2965504708U, // UABAv4i16
2967601860U, // UABAv4i32
2969699012U, // UABAv8i16
2971796164U, // UABAv8i8
270583466U, // UABDLB_ZZZ_D
2309031594U, // UABDLB_ZZZ_H
1881228970U, // UABDLB_ZZZ_S
270588607U, // UABDLT_ZZZ_D
2309036735U, // UABDLT_ZZZ_H
1881234111U, // UABDLT_ZZZ_S
822182160U, // UABDLv16i8_v8i16
815894883U, // UABDLv2i32_v2i64
820089187U, // UABDLv4i16_v4i32
815890704U, // UABDLv4i32_v2i64
820085008U, // UABDLv8i16_v4i32
822186339U, // UABDLv8i8_v8i16
3223358062U, // UABD_ZPmZ_B
3223374446U, // UABD_ZPmZ_D
3519089262U, // UABD_ZPmZ_H
3223407214U, // UABD_ZPmZ_S
811698798U, // UABDv16i8
813795950U, // UABDv2i32
817990254U, // UABDv4i16
820087406U, // UABDv4i32
822184558U, // UABDv8i16
824281710U, // UABDv8i8
3223377222U, // UADALP_ZPmZ_D
3519092038U, // UADALP_ZPmZ_H
3223409990U, // UADALP_ZPmZ_S
2969703750U, // UADALPv16i8_v8i16
3124892998U, // UADALPv2i32_v1i64
2961315142U, // UADALPv4i16_v2i32
2963412294U, // UADALPv4i32_v2i64
2967606598U, // UADALPv8i16_v4i32
2965509446U, // UADALPv8i8_v4i16
270583491U, // UADDLB_ZZZ_D
2309031619U, // UADDLB_ZZZ_H
1881228995U, // UADDLB_ZZZ_S
822187350U, // UADDLPv16i8_v8i16
977376598U, // UADDLPv2i32_v1i64
813798742U, // UADDLPv4i16_v2i32
815895894U, // UADDLPv4i32_v2i64
820090198U, // UADDLPv8i16_v4i32
817993046U, // UADDLPv8i8_v4i16
270588623U, // UADDLT_ZZZ_D
2309036751U, // UADDLT_ZZZ_H
1881234127U, // UADDLT_ZZZ_S
807427341U, // UADDLVv16i8v
807427341U, // UADDLVv4i16v
807427341U, // UADDLVv4i32v
807427341U, // UADDLVv8i16v
807427341U, // UADDLVv8i8v
822182176U, // UADDLv16i8_v8i16
815894921U, // UADDLv2i32_v2i64
820089225U, // UADDLv4i16_v4i32
815890720U, // UADDLv4i32_v2i64
820085024U, // UADDLv8i16_v4i32
822186377U, // UADDLv8i8_v8i16
1780751585U, // UADDV_VPZ_B
1657019617U, // UADDV_VPZ_D
1659116769U, // UADDV_VPZ_H
1638145249U, // UADDV_VPZ_S
2418067854U, // UADDWB_ZZZ_D
2189494670U, // UADDWB_ZZZ_H
270616974U, // UADDWB_ZZZ_S
2418072687U, // UADDWT_ZZZ_D
2189499503U, // UADDWT_ZZZ_H
270621807U, // UADDWT_ZZZ_S
822182464U, // UADDWv16i8_v8i16
815898214U, // UADDWv2i32_v2i64
820092518U, // UADDWv4i16_v4i32
815891008U, // UADDWv4i32_v2i64
820085312U, // UADDWv8i16_v4i32
822189670U, // UADDWv8i8_v8i16
2118568U, // UBFMWri
2118568U, // UBFMXri
2317505910U, // UCLAMP_VG2_2Z2Z_B
2193790326U, // UCLAMP_VG2_2Z2Z_D
2195903862U, // UCLAMP_VG2_2Z2Z_H
2174948726U, // UCLAMP_VG2_2Z2Z_S
2317505910U, // UCLAMP_VG4_4Z4Z_B
2193790326U, // UCLAMP_VG4_4Z4Z_D
2195903862U, // UCLAMP_VG4_4Z4Z_H
2174948726U, // UCLAMP_VG4_4Z4Z_S
2135414U, // UCLAMP_ZZZ_B
2418070902U, // UCLAMP_ZZZ_D
2189497718U, // UCLAMP_ZZZ_H
270620022U, // UCLAMP_ZZZ_S
2116591U, // UCVTFSWDri
2116591U, // UCVTFSWHri
2116591U, // UCVTFSWSri
2116591U, // UCVTFSXDri
2116591U, // UCVTFSXHri
2116591U, // UCVTFSXSri
2116591U, // UCVTFUWDri
2116591U, // UCVTFUWHri
2116591U, // UCVTFUWSri
2116591U, // UCVTFUXDri
2116591U, // UCVTFUXHri
2116591U, // UCVTFUXSri
1648561135U, // UCVTF_2Z2Z_StoS
1648561135U, // UCVTF_4Z4Z_StoS
270584815U, // UCVTF_ZPmZ_DtoD
2957052911U, // UCVTF_ZPmZ_DtoH
270617583U, // UCVTF_ZPmZ_DtoS
541133807U, // UCVTF_ZPmZ_HtoH
270584815U, // UCVTF_ZPmZ_StoD
1078004719U, // UCVTF_ZPmZ_StoH
270617583U, // UCVTF_ZPmZ_StoS
2116591U, // UCVTFd
2116591U, // UCVTFh
2116591U, // UCVTFs
2116591U, // UCVTFv1i16
2116591U, // UCVTFv1i32
2116591U, // UCVTFv1i64
813796335U, // UCVTFv2f32
815893487U, // UCVTFv2f64
813796335U, // UCVTFv2i32_shift
815893487U, // UCVTFv2i64_shift
817990639U, // UCVTFv4f16
820087791U, // UCVTFv4f32
817990639U, // UCVTFv4i16_shift
820087791U, // UCVTFv4i32_shift
822184943U, // UCVTFv8f16
822184943U, // UCVTFv8i16_shift
19416U, // UDF
3223378026U, // UDIVR_ZPmZ_D
3223410794U, // UDIVR_ZPmZ_S
2120959U, // UDIVWr
2120959U, // UDIVXr
3223379199U, // UDIV_ZPmZ_D
3223411967U, // UDIV_ZPmZ_S
3798178796U, // UDOT_VG2_M2Z2Z_BtoS
3798162412U, // UDOT_VG2_M2Z2Z_HtoD
3798178796U, // UDOT_VG2_M2Z2Z_HtoS
3798178796U, // UDOT_VG2_M2ZZI_BToS
3798178796U, // UDOT_VG2_M2ZZI_HToS
3798162412U, // UDOT_VG2_M2ZZI_HtoD
3798178796U, // UDOT_VG2_M2ZZ_BtoS
3798162412U, // UDOT_VG2_M2ZZ_HtoD
3798178796U, // UDOT_VG2_M2ZZ_HtoS
4066614252U, // UDOT_VG4_M4Z4Z_BtoS
4066597868U, // UDOT_VG4_M4Z4Z_HtoD
4066614252U, // UDOT_VG4_M4Z4Z_HtoS
4066614252U, // UDOT_VG4_M4ZZI_BtoS
4066614252U, // UDOT_VG4_M4ZZI_HToS
4066597868U, // UDOT_VG4_M4ZZI_HtoD
4066614252U, // UDOT_VG4_M4ZZ_BtoS
4066597868U, // UDOT_VG4_M4ZZ_HtoD
4066614252U, // UDOT_VG4_M4ZZ_HtoS
2686508012U, // UDOT_ZZZI_D
2686540780U, // UDOT_ZZZI_HtoS
2149669868U, // UDOT_ZZZI_S
2686508012U, // UDOT_ZZZ_D
2686540780U, // UDOT_ZZZ_HtoS
2149669868U, // UDOT_ZZZ_S
2967608300U, // UDOTlanev16i8
2961316844U, // UDOTlanev8i8
2967608300U, // UDOTv16i8
2961316844U, // UDOTv8i8
3223358159U, // UHADD_ZPmZ_B
3223374543U, // UHADD_ZPmZ_D
3519089359U, // UHADD_ZPmZ_H
3223407311U, // UHADD_ZPmZ_S
811698895U, // UHADDv16i8
813796047U, // UHADDv2i32
817990351U, // UHADDv4i16
820087503U, // UHADDv4i32
822184655U, // UHADDv8i16
824281807U, // UHADDv8i8
3223361322U, // UHSUBR_ZPmZ_B
3223377706U, // UHSUBR_ZPmZ_D
3519092522U, // UHSUBR_ZPmZ_H
3223410474U, // UHSUBR_ZPmZ_S
3223357772U, // UHSUB_ZPmZ_B
3223374156U, // UHSUB_ZPmZ_D
3519088972U, // UHSUB_ZPmZ_H
3223406924U, // UHSUB_ZPmZ_S
811698508U, // UHSUBv16i8
813795660U, // UHSUBv2i32
817989964U, // UHSUBv4i16
820087116U, // UHSUBv4i32
822184268U, // UHSUBv8i16
824281420U, // UHSUBv8i8
2118010U, // UMADDLrrr
3223361139U, // UMAXP_ZPmZ_B
3223377523U, // UMAXP_ZPmZ_D
3519092339U, // UMAXP_ZPmZ_H
3223410291U, // UMAXP_ZPmZ_S
811701875U, // UMAXPv16i8
813799027U, // UMAXPv2i32
817993331U, // UMAXPv4i16
820090483U, // UMAXPv4i32
822187635U, // UMAXPv8i16
824284787U, // UMAXPv8i8
3227622829U, // UMAXQV_VPZ_B
3231817133U, // UMAXQV_VPZ_D
3238108589U, // UMAXQV_VPZ_H
3236011437U, // UMAXQV_VPZ_S
253385U, // UMAXV_VPZ_B
1657019849U, // UMAXV_VPZ_D
1659133385U, // UMAXV_VPZ_H
1638178249U, // UMAXV_VPZ_S
807427529U, // UMAXVv16i8v
807427529U, // UMAXVv4i16v
807427529U, // UMAXVv4i32v
807427529U, // UMAXVv8i16v
807427529U, // UMAXVv8i8v
2121520U, // UMAXWri
2121520U, // UMAXWrr
2121520U, // UMAXXri
2121520U, // UMAXXrr
2179096368U, // UMAX_VG2_2Z2Z_B
2181209904U, // UMAX_VG2_2Z2Z_D
2183323440U, // UMAX_VG2_2Z2Z_H
2185436976U, // UMAX_VG2_2Z2Z_S
2179096368U, // UMAX_VG2_2ZZ_B
2181209904U, // UMAX_VG2_2ZZ_D
2183323440U, // UMAX_VG2_2ZZ_H
2185436976U, // UMAX_VG2_2ZZ_S
2179096368U, // UMAX_VG4_4Z4Z_B
2181209904U, // UMAX_VG4_4Z4Z_D
2183323440U, // UMAX_VG4_4Z4Z_H
2185436976U, // UMAX_VG4_4Z4Z_S
2179096368U, // UMAX_VG4_4ZZ_B
2181209904U, // UMAX_VG4_4ZZ_D
2183323440U, // UMAX_VG4_4ZZ_H
2185436976U, // UMAX_VG4_4ZZ_S
2137904U, // UMAX_ZI_B
2418073392U, // UMAX_ZI_D
2189500208U, // UMAX_ZI_H
270622512U, // UMAX_ZI_S
3223363376U, // UMAX_ZPmZ_B
3223379760U, // UMAX_ZPmZ_D
3519094576U, // UMAX_ZPmZ_H
3223412528U, // UMAX_ZPmZ_S
811704112U, // UMAXv16i8
813801264U, // UMAXv2i32
817995568U, // UMAXv4i16
820092720U, // UMAXv4i32
822189872U, // UMAXv8i16
824287024U, // UMAXv8i8
3223360945U, // UMINP_ZPmZ_B
3223377329U, // UMINP_ZPmZ_D
3519092145U, // UMINP_ZPmZ_H
3223410097U, // UMINP_ZPmZ_S
811701681U, // UMINPv16i8
813798833U, // UMINPv2i32
817993137U, // UMINPv4i16
820090289U, // UMINPv4i32
822187441U, // UMINPv8i16
824284593U, // UMINPv8i8
3227622798U, // UMINQV_VPZ_B
3231817102U, // UMINQV_VPZ_D
3238108558U, // UMINQV_VPZ_H
3236011406U, // UMINQV_VPZ_S
253237U, // UMINV_VPZ_B
1657019701U, // UMINV_VPZ_D
1659133237U, // UMINV_VPZ_H
1638178101U, // UMINV_VPZ_S
807427381U, // UMINVv16i8v
807427381U, // UMINVv4i16v
807427381U, // UMINVv4i32v
807427381U, // UMINVv8i16v
807427381U, // UMINVv8i8v
2118686U, // UMINWri
2118686U, // UMINWrr
2118686U, // UMINXri
2118686U, // UMINXrr
2179093534U, // UMIN_VG2_2Z2Z_B
2181207070U, // UMIN_VG2_2Z2Z_D
2183320606U, // UMIN_VG2_2Z2Z_H
2185434142U, // UMIN_VG2_2Z2Z_S
2179093534U, // UMIN_VG2_2ZZ_B
2181207070U, // UMIN_VG2_2ZZ_D
2183320606U, // UMIN_VG2_2ZZ_H
2185434142U, // UMIN_VG2_2ZZ_S
2179093534U, // UMIN_VG4_4Z4Z_B
2181207070U, // UMIN_VG4_4Z4Z_D
2183320606U, // UMIN_VG4_4Z4Z_H
2185434142U, // UMIN_VG4_4Z4Z_S
2179093534U, // UMIN_VG4_4ZZ_B
2181207070U, // UMIN_VG4_4ZZ_D
2183320606U, // UMIN_VG4_4ZZ_H
2185434142U, // UMIN_VG4_4ZZ_S
2135070U, // UMIN_ZI_B
2418070558U, // UMIN_ZI_D
2189497374U, // UMIN_ZI_H
270619678U, // UMIN_ZI_S
3223360542U, // UMIN_ZPmZ_B
3223376926U, // UMIN_ZPmZ_D
3519091742U, // UMIN_ZPmZ_H
3223409694U, // UMIN_ZPmZ_S
811701278U, // UMINv16i8
813798430U, // UMINv2i32
817992734U, // UMINv4i16
820089886U, // UMINv4i32
822187038U, // UMINv8i16
824284190U, // UMINv8i8
1344325154U, // UMLALB_ZZZI_D
2686535202U, // UMLALB_ZZZI_S
1344325154U, // UMLALB_ZZZ_D
2317420066U, // UMLALB_ZZZ_H
2686535202U, // UMLALB_ZZZ_S
1516474864U, // UMLALL_MZZI_BtoS
1516458480U, // UMLALL_MZZI_HtoD
1516474864U, // UMLALL_MZZ_BtoS
1516458480U, // UMLALL_MZZ_HtoD
3932393968U, // UMLALL_VG2_M2Z2Z_BtoS
3932377584U, // UMLALL_VG2_M2Z2Z_HtoD
3932393968U, // UMLALL_VG2_M2ZZI_BtoS
3932377584U, // UMLALL_VG2_M2ZZI_HtoD
979603952U, // UMLALL_VG2_M2ZZ_BtoS
979587568U, // UMLALL_VG2_M2ZZ_HtoD
4200829424U, // UMLALL_VG4_M4Z4Z_BtoS
4200813040U, // UMLALL_VG4_M4Z4Z_HtoD
4200829424U, // UMLALL_VG4_M4ZZI_BtoS
4200813040U, // UMLALL_VG4_M4ZZI_HtoD
1248039408U, // UMLALL_VG4_M4ZZ_BtoS
1248023024U, // UMLALL_VG4_M4ZZ_HtoD
1344330385U, // UMLALT_ZZZI_D
2686540433U, // UMLALT_ZZZI_S
1344330385U, // UMLALT_ZZZ_D
2317425297U, // UMLALT_ZZZ_H
2686540433U, // UMLALT_ZZZ_S
1396936747U, // UMLAL_MZZI_S
1396936747U, // UMLAL_MZZ_S
3812855851U, // UMLAL_VG2_M2Z2Z_S
3812855851U, // UMLAL_VG2_M2ZZI_S
3812855851U, // UMLAL_VG2_M2ZZ_S
4081291307U, // UMLAL_VG4_M4Z4Z_S
4081291307U, // UMLAL_VG4_M4ZZI_S
4081291307U, // UMLAL_VG4_M4ZZ_S
2969698544U, // UMLALv16i8_v8i16
2963410987U, // UMLALv2i32_indexed
2963410987U, // UMLALv2i32_v2i64
2967605291U, // UMLALv4i16_indexed
2967605291U, // UMLALv4i16_v4i32
2963407088U, // UMLALv4i32_indexed
2963407088U, // UMLALv4i32_v2i64
2967601392U, // UMLALv8i16_indexed
2967601392U, // UMLALv8i16_v4i32
2969702443U, // UMLALv8i8_v8i16
1344325452U, // UMLSLB_ZZZI_D
2686535500U, // UMLSLB_ZZZI_S
1344325452U, // UMLSLB_ZZZ_D
2317420364U, // UMLSLB_ZZZ_H
2686535500U, // UMLSLB_ZZZ_S
1516474894U, // UMLSLL_MZZI_BtoS
1516458510U, // UMLSLL_MZZI_HtoD
1516474894U, // UMLSLL_MZZ_BtoS
1516458510U, // UMLSLL_MZZ_HtoD
3932393998U, // UMLSLL_VG2_M2Z2Z_BtoS
3932377614U, // UMLSLL_VG2_M2Z2Z_HtoD
3932393998U, // UMLSLL_VG2_M2ZZI_BtoS
3932377614U, // UMLSLL_VG2_M2ZZI_HtoD
979603982U, // UMLSLL_VG2_M2ZZ_BtoS
979587598U, // UMLSLL_VG2_M2ZZ_HtoD
4200829454U, // UMLSLL_VG4_M4Z4Z_BtoS
4200813070U, // UMLSLL_VG4_M4Z4Z_HtoD
4200829454U, // UMLSLL_VG4_M4ZZI_BtoS
4200813070U, // UMLSLL_VG4_M4ZZI_HtoD
1248039438U, // UMLSLL_VG4_M4ZZ_BtoS
1248023054U, // UMLSLL_VG4_M4ZZ_HtoD
1344330560U, // UMLSLT_ZZZI_D
2686540608U, // UMLSLT_ZZZI_S
1344330560U, // UMLSLT_ZZZ_D
2317425472U, // UMLSLT_ZZZ_H
2686540608U, // UMLSLT_ZZZ_S
1396937506U, // UMLSL_MZZI_S
1396937506U, // UMLSL_MZZ_S
3812856610U, // UMLSL_VG2_M2Z2Z_S
3812856610U, // UMLSL_VG2_M2ZZI_S
3812856610U, // UMLSL_VG2_M2ZZ_S
4081292066U, // UMLSL_VG4_M4Z4Z_S
4081292066U, // UMLSL_VG4_M4ZZI_S
4081292066U, // UMLSL_VG4_M4ZZ_S
2969698676U, // UMLSLv16i8_v8i16
2963411746U, // UMLSLv2i32_indexed
2963411746U, // UMLSLv2i32_v2i64
2967606050U, // UMLSLv4i16_indexed
2967606050U, // UMLSLv4i16_v4i32
2963407220U, // UMLSLv4i32_indexed
2963407220U, // UMLSLv4i32_v2i64
2967601524U, // UMLSLv8i16_indexed
2967601524U, // UMLSLv8i16_v4i32
2969703202U, // UMLSLv8i8_v8i16
2967601959U, // UMMLA
2149663527U, // UMMLA_ZZZ
56738662U, // UMOPA_MPPZZ_D
56738662U, // UMOPA_MPPZZ_HtoS
176276326U, // UMOPA_MPPZZ_S
56744327U, // UMOPS_MPPZZ_D
56744327U, // UMOPS_MPPZZ_HtoS
176281991U, // UMOPS_MPPZZ_S
807427413U, // UMOVvi16
807427413U, // UMOVvi16_idx0
807427413U, // UMOVvi32
807427413U, // UMOVvi32_idx0
807427413U, // UMOVvi64
807427413U, // UMOVvi64_idx0
807427413U, // UMOVvi8
807427413U, // UMOVvi8_idx0
2117958U, // UMSUBLrrr
3223359012U, // UMULH_ZPmZ_B
3223375396U, // UMULH_ZPmZ_D
3519090212U, // UMULH_ZPmZ_H
3223408164U, // UMULH_ZPmZ_S
2133540U, // UMULH_ZZZ_B
2418069028U, // UMULH_ZZZ_D
2189495844U, // UMULH_ZZZ_H
270618148U, // UMULH_ZZZ_S
2117156U, // UMULHrr
270583541U, // UMULLB_ZZZI_D
1881229045U, // UMULLB_ZZZI_S
270583541U, // UMULLB_ZZZ_D
2309031669U, // UMULLB_ZZZ_H
1881229045U, // UMULLB_ZZZ_S
270588687U, // UMULLT_ZZZI_D
1881234191U, // UMULLT_ZZZI_S
270588687U, // UMULLT_ZZZ_D
2309036815U, // UMULLT_ZZZ_H
1881234191U, // UMULLT_ZZZ_S
822182226U, // UMULLv16i8_v8i16
815895085U, // UMULLv2i32_indexed
815895085U, // UMULLv2i32_v2i64
820089389U, // UMULLv4i16_indexed
820089389U, // UMULLv4i16_v4i32
815890770U, // UMULLv4i32_indexed
815890770U, // UMULLv4i32_v2i64
820085074U, // UMULLv8i16_indexed
820085074U, // UMULLv8i16_v4i32
822186541U, // UMULLv8i8_v8i16
2132718U, // UQADD_ZI_B
2418068206U, // UQADD_ZI_D
2189495022U, // UQADD_ZI_H
270617326U, // UQADD_ZI_S
3223358190U, // UQADD_ZPmZ_B
3223374574U, // UQADD_ZPmZ_D
3519089390U, // UQADD_ZPmZ_H
3223407342U, // UQADD_ZPmZ_S
2132718U, // UQADD_ZZZ_B
2418068206U, // UQADD_ZZZ_D
2189495022U, // UQADD_ZZZ_H
270617326U, // UQADD_ZZZ_S
811698926U, // UQADDv16i8
2116334U, // UQADDv1i16
2116334U, // UQADDv1i32
2116334U, // UQADDv1i64
2116334U, // UQADDv1i8
813796078U, // UQADDv2i32
815893230U, // UQADDv2i64
817990382U, // UQADDv4i16
820087534U, // UQADDv4i32
822184686U, // UQADDv8i16
824281838U, // UQADDv8i8
1648432244U, // UQCVTN_Z2Z_StoH
1644237940U, // UQCVTN_Z4Z_DtoH
1344312436U, // UQCVTN_Z4Z_StoB
1648434250U, // UQCVT_Z2Z_StoH
1644239946U, // UQCVT_Z4Z_DtoH
1344314442U, // UQCVT_Z4Z_StoB
270550430U, // UQDECB_WPiI
270550430U, // UQDECB_XPiI
270551683U, // UQDECD_WPiI
270551683U, // UQDECD_XPiI
270584451U, // UQDECD_ZPiI
270552370U, // UQDECH_WPiI
270552370U, // UQDECH_XPiI
58789170U, // UQDECH_ZPiI
2118921U, // UQDECP_WP_B
2418038025U, // UQDECP_WP_D
1881167113U, // UQDECP_WP_H
270554377U, // UQDECP_WP_S
2118921U, // UQDECP_XP_B
2418038025U, // UQDECP_XP_D
1881167113U, // UQDECP_XP_H
270554377U, // UQDECP_XP_S
1075893513U, // UQDECP_ZP_D
1658918153U, // UQDECP_ZP_H
1344361737U, // UQDECP_ZP_S
270556743U, // UQDECW_WPiI
270556743U, // UQDECW_XPiI
270622279U, // UQDECW_ZPiI
270550446U, // UQINCB_WPiI
270550446U, // UQINCB_XPiI
270551699U, // UQINCD_WPiI
270551699U, // UQINCD_XPiI
270584467U, // UQINCD_ZPiI
270552386U, // UQINCH_WPiI
270552386U, // UQINCH_XPiI
58789186U, // UQINCH_ZPiI
2118937U, // UQINCP_WP_B
2418038041U, // UQINCP_WP_D
1881167129U, // UQINCP_WP_H
270554393U, // UQINCP_WP_S
2118937U, // UQINCP_XP_B
2418038041U, // UQINCP_XP_D
1881167129U, // UQINCP_XP_H
270554393U, // UQINCP_XP_S
1075893529U, // UQINCP_ZP_D
1658918169U, // UQINCP_ZP_H
1344361753U, // UQINCP_ZP_S
270556759U, // UQINCW_WPiI
270556759U, // UQINCW_XPiI
270622295U, // UQINCW_ZPiI
3223361466U, // UQRSHLR_ZPmZ_B
3223377850U, // UQRSHLR_ZPmZ_D
3519092666U, // UQRSHLR_ZPmZ_H
3223410618U, // UQRSHLR_ZPmZ_S
3223359940U, // UQRSHL_ZPmZ_B
3223376324U, // UQRSHL_ZPmZ_D
3519091140U, // UQRSHL_ZPmZ_H
3223409092U, // UQRSHL_ZPmZ_S
811700676U, // UQRSHLv16i8
2118084U, // UQRSHLv1i16
2118084U, // UQRSHLv1i32
2118084U, // UQRSHLv1i64
2118084U, // UQRSHLv1i8
813797828U, // UQRSHLv2i32
815894980U, // UQRSHLv2i64
817992132U, // UQRSHLv4i16
820089284U, // UQRSHLv4i32
822186436U, // UQRSHLv8i16
824283588U, // UQRSHLv8i8
1881180086U, // UQRSHRNB_ZZI_B
2172716982U, // UQRSHRNB_ZZI_H
2418100150U, // UQRSHRNB_ZZI_S
2686491533U, // UQRSHRNT_ZZI_B
2174819213U, // UQRSHRNT_ZZI_H
1075927949U, // UQRSHRNT_ZZI_S
1344312398U, // UQRSHRN_VG4_Z4ZI_B
2181108814U, // UQRSHRN_VG4_Z4ZI_H
2118734U, // UQRSHRNb
2118734U, // UQRSHRNh
2118734U, // UQRSHRNs
2959212978U, // UQRSHRNv16i8_shift
813798478U, // UQRSHRNv2i32_shift
817992782U, // UQRSHRNv4i16_shift
2967601586U, // UQRSHRNv4i32_shift
2969698738U, // UQRSHRNv8i16_shift
824284238U, // UQRSHRNv8i8_shift
2185303906U, // UQRSHR_VG2_Z2ZI_H
1344313186U, // UQRSHR_VG4_Z4ZI_B
2181109602U, // UQRSHR_VG4_Z4ZI_H
3223361449U, // UQSHLR_ZPmZ_B
3223377833U, // UQSHLR_ZPmZ_D
3519092649U, // UQSHLR_ZPmZ_H
3223410601U, // UQSHLR_ZPmZ_S
3223359925U, // UQSHL_ZPmI_B
3223376309U, // UQSHL_ZPmI_D
3519091125U, // UQSHL_ZPmI_H
3223409077U, // UQSHL_ZPmI_S
3223359925U, // UQSHL_ZPmZ_B
3223376309U, // UQSHL_ZPmZ_D
3519091125U, // UQSHL_ZPmZ_H
3223409077U, // UQSHL_ZPmZ_S
2118069U, // UQSHLb
2118069U, // UQSHLd
2118069U, // UQSHLh
2118069U, // UQSHLs
811700661U, // UQSHLv16i8
811700661U, // UQSHLv16i8_shift
2118069U, // UQSHLv1i16
2118069U, // UQSHLv1i32
2118069U, // UQSHLv1i64
2118069U, // UQSHLv1i8
813797813U, // UQSHLv2i32
813797813U, // UQSHLv2i32_shift
815894965U, // UQSHLv2i64
815894965U, // UQSHLv2i64_shift
817992117U, // UQSHLv4i16
817992117U, // UQSHLv4i16_shift
820089269U, // UQSHLv4i32
820089269U, // UQSHLv4i32_shift
822186421U, // UQSHLv8i16
822186421U, // UQSHLv8i16_shift
824283573U, // UQSHLv8i8
824283573U, // UQSHLv8i8_shift
1881180067U, // UQSHRNB_ZZI_B
2172716963U, // UQSHRNB_ZZI_H
2418100131U, // UQSHRNB_ZZI_S
2686491514U, // UQSHRNT_ZZI_B
2174819194U, // UQSHRNT_ZZI_H
1075927930U, // UQSHRNT_ZZI_S
2118717U, // UQSHRNb
2118717U, // UQSHRNh
2118717U, // UQSHRNs
2959212959U, // UQSHRNv16i8_shift
813798461U, // UQSHRNv2i32_shift
817992765U, // UQSHRNv4i16_shift
2967601567U, // UQSHRNv4i32_shift
2969698719U, // UQSHRNv8i16_shift
824284221U, // UQSHRNv8i8_shift
3223361338U, // UQSUBR_ZPmZ_B
3223377722U, // UQSUBR_ZPmZ_D
3519092538U, // UQSUBR_ZPmZ_H
3223410490U, // UQSUBR_ZPmZ_S
2132329U, // UQSUB_ZI_B
2418067817U, // UQSUB_ZI_D
2189494633U, // UQSUB_ZI_H
270616937U, // UQSUB_ZI_S
3223357801U, // UQSUB_ZPmZ_B
3223374185U, // UQSUB_ZPmZ_D
3519089001U, // UQSUB_ZPmZ_H
3223406953U, // UQSUB_ZPmZ_S
2132329U, // UQSUB_ZZZ_B
2418067817U, // UQSUB_ZZZ_D
2189494633U, // UQSUB_ZZZ_H
270616937U, // UQSUB_ZZZ_S
811698537U, // UQSUBv16i8
2115945U, // UQSUBv1i16
2115945U, // UQSUBv1i32
2115945U, // UQSUBv1i64
2115945U, // UQSUBv1i8
813795689U, // UQSUBv2i32
815892841U, // UQSUBv2i64
817989993U, // UQSUBv4i16
820087145U, // UQSUBv4i32
822184297U, // UQSUBv8i16
824281449U, // UQSUBv8i8
1881180104U, // UQXTNB_ZZ_B
1635846088U, // UQXTNB_ZZ_H
2418100168U, // UQXTNB_ZZ_S
2686491560U, // UQXTNT_ZZ_B
1637948328U, // UQXTNT_ZZ_H
1075927976U, // UQXTNT_ZZ_S
2959213011U, // UQXTNv16i8
2118787U, // UQXTNv1i16
2118787U, // UQXTNv1i32
2118787U, // UQXTNv1i8
813798531U, // UQXTNv2i32
817992835U, // UQXTNv4i16
2967601619U, // UQXTNv4i32
2969698771U, // UQXTNv8i16
824284291U, // UQXTNv8i8
270617498U, // URECPE_ZPmZ_S
813796250U, // URECPEv2i32
820087706U, // URECPEv4i32
3223358144U, // URHADD_ZPmZ_B
3223374528U, // URHADD_ZPmZ_D
3519089344U, // URHADD_ZPmZ_H
3223407296U, // URHADD_ZPmZ_S
811698880U, // URHADDv16i8
813796032U, // URHADDv2i32
817990336U, // URHADDv4i16
820087488U, // URHADDv4i32
822184640U, // URHADDv8i16
824281792U, // URHADDv8i8
3223361483U, // URSHLR_ZPmZ_B
3223377867U, // URSHLR_ZPmZ_D
3519092683U, // URSHLR_ZPmZ_H
3223410635U, // URSHLR_ZPmZ_S
2179092947U, // URSHL_VG2_2Z2Z_B
2181206483U, // URSHL_VG2_2Z2Z_D
2183320019U, // URSHL_VG2_2Z2Z_H
2185433555U, // URSHL_VG2_2Z2Z_S
2179092947U, // URSHL_VG2_2ZZ_B
2181206483U, // URSHL_VG2_2ZZ_D
2183320019U, // URSHL_VG2_2ZZ_H
2185433555U, // URSHL_VG2_2ZZ_S
2179092947U, // URSHL_VG4_4Z4Z_B
2181206483U, // URSHL_VG4_4Z4Z_D
2183320019U, // URSHL_VG4_4Z4Z_H
2185433555U, // URSHL_VG4_4Z4Z_S
2179092947U, // URSHL_VG4_4ZZ_B
2181206483U, // URSHL_VG4_4ZZ_D
2183320019U, // URSHL_VG4_4ZZ_H
2185433555U, // URSHL_VG4_4ZZ_S
3223359955U, // URSHL_ZPmZ_B
3223376339U, // URSHL_ZPmZ_D
3519091155U, // URSHL_ZPmZ_H
3223409107U, // URSHL_ZPmZ_S
811700691U, // URSHLv16i8
2118099U, // URSHLv1i64
813797843U, // URSHLv2i32
815894995U, // URSHLv2i64
817992147U, // URSHLv4i16
820089299U, // URSHLv4i32
822186451U, // URSHLv8i16
824283603U, // URSHLv8i8
3223361393U, // URSHR_ZPmI_B
3223377777U, // URSHR_ZPmI_D
3519092593U, // URSHR_ZPmI_H
3223410545U, // URSHR_ZPmI_S
2119537U, // URSHRd
811702129U, // URSHRv16i8_shift
813799281U, // URSHRv2i32_shift
815896433U, // URSHRv2i64_shift
817993585U, // URSHRv4i16_shift
820090737U, // URSHRv4i32_shift
822187889U, // URSHRv8i16_shift
824285041U, // URSHRv8i8_shift
270617544U, // URSQRTE_ZPmZ_S
813796296U, // URSQRTEv2i32
820087752U, // URSQRTEv4i32
2149614615U, // URSRA_ZZI_B
1075889175U, // URSRA_ZZI_D
2195784727U, // URSRA_ZZI_H
1344357399U, // URSRA_ZZI_S
807715863U, // URSRAd
2959213591U, // URSRAv16i8_shift
2961310743U, // URSRAv2i32_shift
2963407895U, // URSRAv2i64_shift
2965505047U, // URSRAv4i16_shift
2967602199U, // URSRAv4i32_shift
2969699351U, // URSRAv8i16_shift
2971796503U, // URSRAv8i8_shift
3798178788U, // USDOT_VG2_M2Z2Z_BToS
3798178788U, // USDOT_VG2_M2ZZI_BToS
3798178788U, // USDOT_VG2_M2ZZ_BToS
4066614244U, // USDOT_VG4_M4Z4Z_BToS
4066614244U, // USDOT_VG4_M4ZZI_BToS
4066614244U, // USDOT_VG4_M4ZZ_BToS
2149669860U, // USDOT_ZZZ
2149669860U, // USDOT_ZZZI
2967608292U, // USDOTlanev16i8
2961316836U, // USDOTlanev8i8
2967608292U, // USDOTv16i8
2961316836U, // USDOTv8i8
270583507U, // USHLLB_ZZI_D
2309031635U, // USHLLB_ZZI_H
1881229011U, // USHLLB_ZZI_S
270588653U, // USHLLT_ZZI_D
2309036781U, // USHLLT_ZZI_H
1881234157U, // USHLLT_ZZI_S
822182192U, // USHLLv16i8_shift
815895039U, // USHLLv2i32_shift
820089343U, // USHLLv4i16_shift
815890736U, // USHLLv4i32_shift
820085040U, // USHLLv8i16_shift
822186495U, // USHLLv8i8_shift
811700704U, // USHLv16i8
2118112U, // USHLv1i64
813797856U, // USHLv2i32
815895008U, // USHLv2i64
817992160U, // USHLv4i16
820089312U, // USHLv4i32
822186464U, // USHLv8i16
824283616U, // USHLv8i8
2119550U, // USHRd
811702142U, // USHRv16i8_shift
813799294U, // USHRv2i32_shift
815896446U, // USHRv2i64_shift
817993598U, // USHRv4i16_shift
820090750U, // USHRv4i32_shift
822187902U, // USHRv8i16_shift
824285054U, // USHRv8i8_shift
1516474854U, // USMLALL_MZZI_BtoS
1516474854U, // USMLALL_MZZ_BtoS
3932393958U, // USMLALL_VG2_M2Z2Z_BtoS
3932393958U, // USMLALL_VG2_M2ZZI_BtoS
979603942U, // USMLALL_VG2_M2ZZ_BtoS
4200829414U, // USMLALL_VG4_M4Z4Z_BtoS
4200829414U, // USMLALL_VG4_M4ZZI_BtoS
1248039398U, // USMLALL_VG4_M4ZZ_BtoS
2967601951U, // USMMLA
2149663519U, // USMMLA_ZZZ
56738653U, // USMOPA_MPPZZ_D
176276317U, // USMOPA_MPPZZ_S
56744318U, // USMOPS_MPPZZ_D
176281982U, // USMOPS_MPPZZ_S
3223358181U, // USQADD_ZPmZ_B
3223374565U, // USQADD_ZPmZ_D
3519089381U, // USQADD_ZPmZ_H
3223407333U, // USQADD_ZPmZ_S
2959215333U, // USQADDv16i8
807717605U, // USQADDv1i16
807717605U, // USQADDv1i32
807717605U, // USQADDv1i64
807717605U, // USQADDv1i8
2961312485U, // USQADDv2i32
2963409637U, // USQADDv2i64
2965506789U, // USQADDv4i16
2967603941U, // USQADDv4i32
2969701093U, // USQADDv8i16
2971798245U, // USQADDv8i8
2149614628U, // USRA_ZZI_B
1075889188U, // USRA_ZZI_D
2195784740U, // USRA_ZZI_H
1344357412U, // USRA_ZZI_S
807715876U, // USRAd
2959213604U, // USRAv16i8_shift
2961310756U, // USRAv2i32_shift
2963407908U, // USRAv2i64_shift
2965505060U, // USRAv4i16_shift
2967602212U, // USRAv4i32_shift
2969699364U, // USRAv8i16_shift
2971796516U, // USRAv8i8_shift
270583436U, // USUBLB_ZZZ_D
2309031564U, // USUBLB_ZZZ_H
1881228940U, // USUBLB_ZZZ_S
270588577U, // USUBLT_ZZZ_D
2309036705U, // USUBLT_ZZZ_H
1881234081U, // USUBLT_ZZZ_S
822182144U, // USUBLv16i8_v8i16
815894869U, // USUBLv2i32_v2i64
820089173U, // USUBLv4i16_v4i32
815890688U, // USUBLv4i32_v2i64
820084992U, // USUBLv8i16_v4i32
822186325U, // USUBLv8i8_v8i16
2418067838U, // USUBWB_ZZZ_D
2189494654U, // USUBWB_ZZZ_H
270616958U, // USUBWB_ZZZ_S
2418072671U, // USUBWT_ZZZ_D
2189499487U, // USUBWT_ZZZ_H
270621791U, // USUBWT_ZZZ_S
822182448U, // USUBWv16i8_v8i16
815898159U, // USUBWv2i32_v2i64
820092463U, // USUBWv4i16_v4i32
815890992U, // USUBWv4i32_v2i64
820085296U, // USUBWv8i16_v4i32
822189615U, // USUBWv8i8_v8i16
4066614266U, // USVDOT_VG4_M4ZZI_BToS
270585770U, // UUNPKHI_ZZ_D
1772162986U, // UUNPKHI_ZZ_H
1881231274U, // UUNPKHI_ZZ_S
270587095U, // UUNPKLO_ZZ_D
1772164311U, // UUNPKLO_ZZ_H
1881232599U, // UUNPKLO_ZZ_S
1635946474U, // UUNPK_VG2_2ZZ_D
1772277738U, // UUNPK_VG2_2ZZ_H
1652756458U, // UUNPK_VG2_2ZZ_S
1648529386U, // UUNPK_VG4_4Z2Z_D
1642254314U, // UUNPK_VG4_4Z2Z_H
1646465002U, // UUNPK_VG4_4Z2Z_S
3798178819U, // UVDOT_VG2_M2ZZI_HtoS
4066614275U, // UVDOT_VG4_M4ZZI_BtoS
4066597891U, // UVDOT_VG4_M4ZZI_HtoD
270584120U, // UXTB_ZPmZ_D
541133112U, // UXTB_ZPmZ_H
270616888U, // UXTB_ZPmZ_S
270585706U, // UXTH_ZPmZ_D
270618474U, // UXTH_ZPmZ_S
270589681U, // UXTW_ZPmZ_D
2129991U, // UZP1_PPP_B
2418065479U, // UZP1_PPP_D
2189492295U, // UZP1_PPP_H
270614599U, // UZP1_PPP_S
2129991U, // UZP1_ZZZ_B
2418065479U, // UZP1_ZZZ_D
2189492295U, // UZP1_ZZZ_H
2212970567U, // UZP1_ZZZ_Q
270614599U, // UZP1_ZZZ_S
811696199U, // UZP1v16i8
813793351U, // UZP1v2i32
815890503U, // UZP1v2i64
817987655U, // UZP1v4i16
820084807U, // UZP1v4i32
822181959U, // UZP1v8i16
824279111U, // UZP1v8i8
2130440U, // UZP2_PPP_B
2418065928U, // UZP2_PPP_D
2189492744U, // UZP2_PPP_H
270615048U, // UZP2_PPP_S
2130440U, // UZP2_ZZZ_B
2418065928U, // UZP2_ZZZ_D
2189492744U, // UZP2_ZZZ_H
2212971016U, // UZP2_ZZZ_Q
270615048U, // UZP2_ZZZ_S
811696648U, // UZP2v16i8
813793800U, // UZP2v2i32
815890952U, // UZP2v2i64
817988104U, // UZP2v4i16
820085256U, // UZP2v4i32
822182408U, // UZP2v8i16
824279560U, // UZP2v8i8
2130004U, // UZPQ1_ZZZ_B
2418065492U, // UZPQ1_ZZZ_D
2189492308U, // UZPQ1_ZZZ_H
270614612U, // UZPQ1_ZZZ_S
2130453U, // UZPQ2_ZZZ_B
2418065941U, // UZPQ2_ZZZ_D
2189492757U, // UZPQ2_ZZZ_H
270615061U, // UZPQ2_ZZZ_S
2309117581U, // UZP_VG2_2ZZZ_B
163747469U, // UZP_VG2_2ZZZ_D
2189612685U, // UZP_VG2_2ZZZ_H
2212992653U, // UZP_VG2_2ZZZ_Q
2172851853U, // UZP_VG2_2ZZZ_S
1642223245U, // UZP_VG4_4Z4Z_B
1644336781U, // UZP_VG4_4Z4Z_D
1646450317U, // UZP_VG4_4Z4Z_H
182949517U, // UZP_VG4_4Z4Z_Q
1648563853U, // UZP_VG4_4Z4Z_S
23058U, // WFET
23136U, // WFIT
2210548549U, // WHILEGE_2PXX_B
2210564933U, // WHILEGE_2PXX_D
2210581317U, // WHILEGE_2PXX_H
2210597701U, // WHILEGE_2PXX_S
3246917U, // WHILEGE_CXX_B
3263301U, // WHILEGE_CXX_D
3279685U, // WHILEGE_CXX_H
3296069U, // WHILEGE_CXX_S
2132805U, // WHILEGE_PWW_B
2149189U, // WHILEGE_PWW_D
2210466629U, // WHILEGE_PWW_H
2181957U, // WHILEGE_PWW_S
2132805U, // WHILEGE_PXX_B
2149189U, // WHILEGE_PXX_D
2210466629U, // WHILEGE_PXX_H
2181957U, // WHILEGE_PXX_S
2210552380U, // WHILEGT_2PXX_B
2210568764U, // WHILEGT_2PXX_D
2210585148U, // WHILEGT_2PXX_H
2210601532U, // WHILEGT_2PXX_S
3250748U, // WHILEGT_CXX_B
3267132U, // WHILEGT_CXX_D
3283516U, // WHILEGT_CXX_H
3299900U, // WHILEGT_CXX_S
2136636U, // WHILEGT_PWW_B
2153020U, // WHILEGT_PWW_D
2210470460U, // WHILEGT_PWW_H
2185788U, // WHILEGT_PWW_S
2136636U, // WHILEGT_PXX_B
2153020U, // WHILEGT_PXX_D
2210470460U, // WHILEGT_PXX_H
2185788U, // WHILEGT_PXX_S
2210549647U, // WHILEHI_2PXX_B
2210566031U, // WHILEHI_2PXX_D
2210582415U, // WHILEHI_2PXX_H
2210598799U, // WHILEHI_2PXX_S
3248015U, // WHILEHI_CXX_B
3264399U, // WHILEHI_CXX_D
3280783U, // WHILEHI_CXX_H
3297167U, // WHILEHI_CXX_S
2133903U, // WHILEHI_PWW_B
2150287U, // WHILEHI_PWW_D
2210467727U, // WHILEHI_PWW_H
2183055U, // WHILEHI_PWW_S
2133903U, // WHILEHI_PXX_B
2150287U, // WHILEHI_PXX_D
2210467727U, // WHILEHI_PXX_H
2183055U, // WHILEHI_PXX_S
2210552069U, // WHILEHS_2PXX_B
2210568453U, // WHILEHS_2PXX_D
2210584837U, // WHILEHS_2PXX_H
2210601221U, // WHILEHS_2PXX_S
3250437U, // WHILEHS_CXX_B
3266821U, // WHILEHS_CXX_D
3283205U, // WHILEHS_CXX_H
3299589U, // WHILEHS_CXX_S
2136325U, // WHILEHS_PWW_B
2152709U, // WHILEHS_PWW_D
2210470149U, // WHILEHS_PWW_H
2185477U, // WHILEHS_PWW_S
2136325U, // WHILEHS_PXX_B
2152709U, // WHILEHS_PXX_D
2210470149U, // WHILEHS_PXX_H
2185477U, // WHILEHS_PXX_S
2210548580U, // WHILELE_2PXX_B
2210564964U, // WHILELE_2PXX_D
2210581348U, // WHILELE_2PXX_H
2210597732U, // WHILELE_2PXX_S
3246948U, // WHILELE_CXX_B
3263332U, // WHILELE_CXX_D
3279716U, // WHILELE_CXX_H
3296100U, // WHILELE_CXX_S
2132836U, // WHILELE_PWW_B
2149220U, // WHILELE_PWW_D
2210466660U, // WHILELE_PWW_H
2181988U, // WHILELE_PWW_S
2132836U, // WHILELE_PXX_B
2149220U, // WHILELE_PXX_D
2210466660U, // WHILELE_PXX_H
2181988U, // WHILELE_PXX_S
2210550972U, // WHILELO_2PXX_B
2210567356U, // WHILELO_2PXX_D
2210583740U, // WHILELO_2PXX_H
2210600124U, // WHILELO_2PXX_S
3249340U, // WHILELO_CXX_B
3265724U, // WHILELO_CXX_D
3282108U, // WHILELO_CXX_H
3298492U, // WHILELO_CXX_S
2135228U, // WHILELO_PWW_B
2151612U, // WHILELO_PWW_D
2210469052U, // WHILELO_PWW_H
2184380U, // WHILELO_PWW_S
2135228U, // WHILELO_PXX_B
2151612U, // WHILELO_PXX_D
2210469052U, // WHILELO_PXX_H
2184380U, // WHILELO_PXX_S
2210552096U, // WHILELS_2PXX_B
2210568480U, // WHILELS_2PXX_D
2210584864U, // WHILELS_2PXX_H
2210601248U, // WHILELS_2PXX_S
3250464U, // WHILELS_CXX_B
3266848U, // WHILELS_CXX_D
3283232U, // WHILELS_CXX_H
3299616U, // WHILELS_CXX_S
2136352U, // WHILELS_PWW_B
2152736U, // WHILELS_PWW_D
2210470176U, // WHILELS_PWW_H
2185504U, // WHILELS_PWW_S
2136352U, // WHILELS_PXX_B
2152736U, // WHILELS_PXX_D
2210470176U, // WHILELS_PXX_H
2185504U, // WHILELS_PXX_S
2210552535U, // WHILELT_2PXX_B
2210568919U, // WHILELT_2PXX_D
2210585303U, // WHILELT_2PXX_H
2210601687U, // WHILELT_2PXX_S
3250903U, // WHILELT_CXX_B
3267287U, // WHILELT_CXX_D
3283671U, // WHILELT_CXX_H
3300055U, // WHILELT_CXX_S
2136791U, // WHILELT_PWW_B
2153175U, // WHILELT_PWW_D
2210470615U, // WHILELT_PWW_H
2185943U, // WHILELT_PWW_S
2136791U, // WHILELT_PXX_B
2153175U, // WHILELT_PXX_D
2210470615U, // WHILELT_PXX_H
2185943U, // WHILELT_PXX_S
2137738U, // WHILERW_PXX_B
2154122U, // WHILERW_PXX_D
2210471562U, // WHILERW_PXX_H
2186890U, // WHILERW_PXX_S
2136177U, // WHILEWR_PXX_B
2152561U, // WHILEWR_PXX_D
2210470001U, // WHILEWR_PXX_H
2185329U, // WHILEWR_PXX_S
38739U, // WRFFR
9753U, // XAFLAG
815896342U, // XAR
2135830U, // XAR_ZZZI_B
2418071318U, // XAR_ZZZI_D
2189498134U, // XAR_ZZZI_H
270620438U, // XAR_ZZZI_S
19060U, // XPACD
20360U, // XPACI
8424U, // XPACLRI
2959213005U, // XTNv16i8
813798526U, // XTNv2i32
817992830U, // XTNv4i16
2967601613U, // XTNv4i32
2969698765U, // XTNv8i16
824284286U, // XTNv8i8
1266919U, // ZERO_M
1933792487U, // ZERO_MXI_2Z
2053330151U, // ZERO_MXI_4Z
2202227943U, // ZERO_MXI_VG2_2Z
2321765607U, // ZERO_MXI_VG2_4Z
2187547879U, // ZERO_MXI_VG2_Z
2470663399U, // ZERO_MXI_VG4_2Z
2590201063U, // ZERO_MXI_VG4_4Z
2455983335U, // ZERO_MXI_VG4_Z
184573949U, // ZERO_T
2129985U, // ZIP1_PPP_B
2418065473U, // ZIP1_PPP_D
2189492289U, // ZIP1_PPP_H
270614593U, // ZIP1_PPP_S
2129985U, // ZIP1_ZZZ_B
2418065473U, // ZIP1_ZZZ_D
2189492289U, // ZIP1_ZZZ_H
2212970561U, // ZIP1_ZZZ_Q
270614593U, // ZIP1_ZZZ_S
811696193U, // ZIP1v16i8
813793345U, // ZIP1v2i32
815890497U, // ZIP1v2i64
817987649U, // ZIP1v4i16
820084801U, // ZIP1v4i32
822181953U, // ZIP1v8i16
824279105U, // ZIP1v8i8
2130434U, // ZIP2_PPP_B
2418065922U, // ZIP2_PPP_D
2189492738U, // ZIP2_PPP_H
270615042U, // ZIP2_PPP_S
2130434U, // ZIP2_ZZZ_B
2418065922U, // ZIP2_ZZZ_D
2189492738U, // ZIP2_ZZZ_H
2212971010U, // ZIP2_ZZZ_Q
270615042U, // ZIP2_ZZZ_S
811696642U, // ZIP2v16i8
813793794U, // ZIP2v2i32
815890946U, // ZIP2v2i64
817988098U, // ZIP2v4i16
820085250U, // ZIP2v4i32
822182402U, // ZIP2v8i16
824279554U, // ZIP2v8i8
2129997U, // ZIPQ1_ZZZ_B
2418065485U, // ZIPQ1_ZZZ_D
2189492301U, // ZIPQ1_ZZZ_H
270614605U, // ZIPQ1_ZZZ_S
2130446U, // ZIPQ2_ZZZ_B
2418065934U, // ZIPQ2_ZZZ_D
2189492750U, // ZIPQ2_ZZZ_H
270615054U, // ZIPQ2_ZZZ_S
2309117241U, // ZIP_VG2_2ZZZ_B
163747129U, // ZIP_VG2_2ZZZ_D
2189612345U, // ZIP_VG2_2ZZZ_H
2212992313U, // ZIP_VG2_2ZZZ_Q
2172851513U, // ZIP_VG2_2ZZZ_S
1642222905U, // ZIP_VG4_4Z4Z_B
1644336441U, // ZIP_VG4_4Z4Z_D
1646449977U, // ZIP_VG4_4Z4Z_H
182949177U, // ZIP_VG4_4Z4Z_Q
1648563513U, // ZIP_VG4_4Z4Z_S
2185303118U, // anonymous_15148
2185303187U, // anonymous_15149
2185303109U, // anonymous_5481
};
static const uint32_t OpInfo1[] = {
0U, // PHI
0U, // INLINEASM
0U, // INLINEASM_BR
0U, // CFI_INSTRUCTION
0U, // EH_LABEL
0U, // GC_LABEL
0U, // ANNOTATION_LABEL
0U, // KILL
0U, // EXTRACT_SUBREG
0U, // INSERT_SUBREG
0U, // IMPLICIT_DEF
0U, // SUBREG_TO_REG
0U, // COPY_TO_REGCLASS
0U, // DBG_VALUE
0U, // DBG_VALUE_LIST
0U, // DBG_INSTR_REF
0U, // DBG_PHI
0U, // DBG_LABEL
0U, // REG_SEQUENCE
0U, // COPY
0U, // BUNDLE
0U, // LIFETIME_START
0U, // LIFETIME_END
0U, // PSEUDO_PROBE
0U, // ARITH_FENCE
0U, // STACKMAP
0U, // FENTRY_CALL
0U, // PATCHPOINT
0U, // LOAD_STACK_GUARD
0U, // PREALLOCATED_SETUP
0U, // PREALLOCATED_ARG
0U, // STATEPOINT
0U, // LOCAL_ESCAPE
0U, // FAULTING_OP
0U, // PATCHABLE_OP
0U, // PATCHABLE_FUNCTION_ENTER
0U, // PATCHABLE_RET
0U, // PATCHABLE_FUNCTION_EXIT
0U, // PATCHABLE_TAIL_CALL
0U, // PATCHABLE_EVENT_CALL
0U, // PATCHABLE_TYPED_EVENT_CALL
0U, // ICALL_BRANCH_FUNNEL
0U, // MEMBARRIER
0U, // G_ASSERT_SEXT
0U, // G_ASSERT_ZEXT
0U, // G_ASSERT_ALIGN
0U, // G_ADD
0U, // G_SUB
0U, // G_MUL
0U, // G_SDIV
0U, // G_UDIV
0U, // G_SREM
0U, // G_UREM
0U, // G_SDIVREM
0U, // G_UDIVREM
0U, // G_AND
0U, // G_OR
0U, // G_XOR
0U, // G_IMPLICIT_DEF
0U, // G_PHI
0U, // G_FRAME_INDEX
0U, // G_GLOBAL_VALUE
0U, // G_EXTRACT
0U, // G_UNMERGE_VALUES
0U, // G_INSERT
0U, // G_MERGE_VALUES
0U, // G_BUILD_VECTOR
0U, // G_BUILD_VECTOR_TRUNC
0U, // G_CONCAT_VECTORS
0U, // G_PTRTOINT
0U, // G_INTTOPTR
0U, // G_BITCAST
0U, // G_FREEZE
0U, // G_INTRINSIC_FPTRUNC_ROUND
0U, // G_INTRINSIC_TRUNC
0U, // G_INTRINSIC_ROUND
0U, // G_INTRINSIC_LRINT
0U, // G_INTRINSIC_ROUNDEVEN
0U, // G_READCYCLECOUNTER
0U, // G_LOAD
0U, // G_SEXTLOAD
0U, // G_ZEXTLOAD
0U, // G_INDEXED_LOAD
0U, // G_INDEXED_SEXTLOAD
0U, // G_INDEXED_ZEXTLOAD
0U, // G_STORE
0U, // G_INDEXED_STORE
0U, // G_ATOMIC_CMPXCHG_WITH_SUCCESS
0U, // G_ATOMIC_CMPXCHG
0U, // G_ATOMICRMW_XCHG
0U, // G_ATOMICRMW_ADD
0U, // G_ATOMICRMW_SUB
0U, // G_ATOMICRMW_AND
0U, // G_ATOMICRMW_NAND
0U, // G_ATOMICRMW_OR
0U, // G_ATOMICRMW_XOR
0U, // G_ATOMICRMW_MAX
0U, // G_ATOMICRMW_MIN
0U, // G_ATOMICRMW_UMAX
0U, // G_ATOMICRMW_UMIN
0U, // G_ATOMICRMW_FADD
0U, // G_ATOMICRMW_FSUB
0U, // G_ATOMICRMW_FMAX
0U, // G_ATOMICRMW_FMIN
0U, // G_ATOMICRMW_UINC_WRAP
0U, // G_ATOMICRMW_UDEC_WRAP
0U, // G_FENCE
0U, // G_BRCOND
0U, // G_BRINDIRECT
0U, // G_INVOKE_REGION_START
0U, // G_INTRINSIC
0U, // G_INTRINSIC_W_SIDE_EFFECTS
0U, // G_ANYEXT
0U, // G_TRUNC
0U, // G_CONSTANT
0U, // G_FCONSTANT
0U, // G_VASTART
0U, // G_VAARG
0U, // G_SEXT
0U, // G_SEXT_INREG
0U, // G_ZEXT
0U, // G_SHL
0U, // G_LSHR
0U, // G_ASHR
0U, // G_FSHL
0U, // G_FSHR
0U, // G_ROTR
0U, // G_ROTL
0U, // G_ICMP
0U, // G_FCMP
0U, // G_SELECT
0U, // G_UADDO
0U, // G_UADDE
0U, // G_USUBO
0U, // G_USUBE
0U, // G_SADDO
0U, // G_SADDE
0U, // G_SSUBO
0U, // G_SSUBE
0U, // G_UMULO
0U, // G_SMULO
0U, // G_UMULH
0U, // G_SMULH
0U, // G_UADDSAT
0U, // G_SADDSAT
0U, // G_USUBSAT
0U, // G_SSUBSAT
0U, // G_USHLSAT
0U, // G_SSHLSAT
0U, // G_SMULFIX
0U, // G_UMULFIX
0U, // G_SMULFIXSAT
0U, // G_UMULFIXSAT
0U, // G_SDIVFIX
0U, // G_UDIVFIX
0U, // G_SDIVFIXSAT
0U, // G_UDIVFIXSAT
0U, // G_FADD
0U, // G_FSUB
0U, // G_FMUL
0U, // G_FMA
0U, // G_FMAD
0U, // G_FDIV
0U, // G_FREM
0U, // G_FPOW
0U, // G_FPOWI
0U, // G_FEXP
0U, // G_FEXP2
0U, // G_FLOG
0U, // G_FLOG2
0U, // G_FLOG10
0U, // G_FNEG
0U, // G_FPEXT
0U, // G_FPTRUNC
0U, // G_FPTOSI
0U, // G_FPTOUI
0U, // G_SITOFP
0U, // G_UITOFP
0U, // G_FABS
0U, // G_FCOPYSIGN
0U, // G_IS_FPCLASS
0U, // G_FCANONICALIZE
0U, // G_FMINNUM
0U, // G_FMAXNUM
0U, // G_FMINNUM_IEEE
0U, // G_FMAXNUM_IEEE
0U, // G_FMINIMUM
0U, // G_FMAXIMUM
0U, // G_PTR_ADD
0U, // G_PTRMASK
0U, // G_SMIN
0U, // G_SMAX
0U, // G_UMIN
0U, // G_UMAX
0U, // G_ABS
0U, // G_LROUND
0U, // G_LLROUND
0U, // G_BR
0U, // G_BRJT
0U, // G_INSERT_VECTOR_ELT
0U, // G_EXTRACT_VECTOR_ELT
0U, // G_SHUFFLE_VECTOR
0U, // G_CTTZ
0U, // G_CTTZ_ZERO_UNDEF
0U, // G_CTLZ
0U, // G_CTLZ_ZERO_UNDEF
0U, // G_CTPOP
0U, // G_BSWAP
0U, // G_BITREVERSE
0U, // G_FCEIL
0U, // G_FCOS
0U, // G_FSIN
0U, // G_FSQRT
0U, // G_FFLOOR
0U, // G_FRINT
0U, // G_FNEARBYINT
0U, // G_ADDRSPACE_CAST
0U, // G_BLOCK_ADDR
0U, // G_JUMP_TABLE
0U, // G_DYN_STACKALLOC
0U, // G_STRICT_FADD
0U, // G_STRICT_FSUB
0U, // G_STRICT_FMUL
0U, // G_STRICT_FDIV
0U, // G_STRICT_FREM
0U, // G_STRICT_FMA
0U, // G_STRICT_FSQRT
0U, // G_READ_REGISTER
0U, // G_WRITE_REGISTER
0U, // G_MEMCPY
0U, // G_MEMCPY_INLINE
0U, // G_MEMMOVE
0U, // G_MEMSET
0U, // G_BZERO
0U, // G_VECREDUCE_SEQ_FADD
0U, // G_VECREDUCE_SEQ_FMUL
0U, // G_VECREDUCE_FADD
0U, // G_VECREDUCE_FMUL
0U, // G_VECREDUCE_FMAX
0U, // G_VECREDUCE_FMIN
0U, // G_VECREDUCE_ADD
0U, // G_VECREDUCE_MUL
0U, // G_VECREDUCE_AND
0U, // G_VECREDUCE_OR
0U, // G_VECREDUCE_XOR
0U, // G_VECREDUCE_SMAX
0U, // G_VECREDUCE_SMIN
0U, // G_VECREDUCE_UMAX
0U, // G_VECREDUCE_UMIN
0U, // G_SBFX
0U, // G_UBFX
0U, // ABS_ZPmZ_UNDEF_B
0U, // ABS_ZPmZ_UNDEF_D
0U, // ABS_ZPmZ_UNDEF_H
0U, // ABS_ZPmZ_UNDEF_S
0U, // ADDHA_MPPZ_D_PSEUDO_D
0U, // ADDHA_MPPZ_S_PSEUDO_S
0U, // ADDSWrr
0U, // ADDSXrr
0U, // ADDVA_MPPZ_D_PSEUDO_D
0U, // ADDVA_MPPZ_S_PSEUDO_S
0U, // ADDWrr
0U, // ADDXrr
0U, // ADD_VG2_M2Z2Z_D_PSEUDO
0U, // ADD_VG2_M2Z2Z_S_PSEUDO
0U, // ADD_VG2_M2ZZ_D_PSEUDO
0U, // ADD_VG2_M2ZZ_S_PSEUDO
0U, // ADD_VG4_M4Z4Z_D_PSEUDO
0U, // ADD_VG4_M4Z4Z_S_PSEUDO
0U, // ADD_VG4_M4ZZ_D_PSEUDO
0U, // ADD_VG4_M4ZZ_S_PSEUDO
0U, // ADD_ZPZZ_ZERO_B
0U, // ADD_ZPZZ_ZERO_D
0U, // ADD_ZPZZ_ZERO_H
0U, // ADD_ZPZZ_ZERO_S
0U, // ADDlowTLS
0U, // ADJCALLSTACKDOWN
0U, // ADJCALLSTACKUP
0U, // AESIMCrrTied
0U, // AESMCrrTied
0U, // ANDSWrr
0U, // ANDSXrr
0U, // ANDWrr
0U, // ANDXrr
0U, // AND_ZPZZ_ZERO_B
0U, // AND_ZPZZ_ZERO_D
0U, // AND_ZPZZ_ZERO_H
0U, // AND_ZPZZ_ZERO_S
0U, // ASRD_ZPZI_ZERO_B
0U, // ASRD_ZPZI_ZERO_D
0U, // ASRD_ZPZI_ZERO_H
0U, // ASRD_ZPZI_ZERO_S
0U, // ASR_ZPZI_UNDEF_B
0U, // ASR_ZPZI_UNDEF_D
0U, // ASR_ZPZI_UNDEF_H
0U, // ASR_ZPZI_UNDEF_S
0U, // ASR_ZPZZ_UNDEF_B
0U, // ASR_ZPZZ_UNDEF_D
0U, // ASR_ZPZZ_UNDEF_H
0U, // ASR_ZPZZ_UNDEF_S
0U, // ASR_ZPZZ_ZERO_B
0U, // ASR_ZPZZ_ZERO_D
0U, // ASR_ZPZZ_ZERO_H
0U, // ASR_ZPZZ_ZERO_S
0U, // BFDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // BFDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // BFDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // BFDOT_VG4_M4ZZI_HtoS_PSEUDO
0U, // BFMLAL_MZZI_S_PSEUDO
0U, // BFMLAL_MZZ_S_PSEUDO
0U, // BFMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // BFMLAL_VG2_M2ZZI_S_PSEUDO
0U, // BFMLAL_VG2_M2ZZ_S_PSEUDO
0U, // BFMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // BFMLAL_VG4_M4ZZI_S_PSEUDO
0U, // BFMLAL_VG4_M4ZZ_S_PSEUDO
0U, // BFMLA_VG2_M2Z2Z_PSEUDO
0U, // BFMLA_VG4_M4Z4Z_PSEUDO
0U, // BFMLSL_MZZI_S_PSEUDO
0U, // BFMLSL_MZZ_S_PSEUDO
0U, // BFMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // BFMLSL_VG2_M2ZZI_S_PSEUDO
0U, // BFMLSL_VG2_M2ZZ_S_PSEUDO
0U, // BFMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // BFMLSL_VG4_M4ZZI_S_PSEUDO
0U, // BFMLSL_VG4_M4ZZ_S_PSEUDO
0U, // BFMLS_VG2_M2Z2Z_PSEUDO
0U, // BFMLS_VG4_M4Z4Z_PSEUDO
0U, // BFMOPA_MPPZZ_PSEUDO
0U, // BFMOPS_MPPZZ_PSEUDO
0U, // BFVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // BICSWrr
0U, // BICSXrr
0U, // BICWrr
0U, // BICXrr
0U, // BIC_ZPZZ_ZERO_B
0U, // BIC_ZPZZ_ZERO_D
0U, // BIC_ZPZZ_ZERO_H
0U, // BIC_ZPZZ_ZERO_S
0U, // BLRNoIP
0U, // BLR_BTI
0U, // BLR_RVMARKER
0U, // BSPv16i8
0U, // BSPv8i8
0U, // CATCHRET
0U, // CLEANUPRET
0U, // CLS_ZPmZ_UNDEF_B
0U, // CLS_ZPmZ_UNDEF_D
0U, // CLS_ZPmZ_UNDEF_H
0U, // CLS_ZPmZ_UNDEF_S
0U, // CLZ_ZPmZ_UNDEF_B
0U, // CLZ_ZPmZ_UNDEF_D
0U, // CLZ_ZPmZ_UNDEF_H
0U, // CLZ_ZPmZ_UNDEF_S
0U, // CMP_SWAP_128
0U, // CMP_SWAP_128_ACQUIRE
0U, // CMP_SWAP_128_MONOTONIC
0U, // CMP_SWAP_128_RELEASE
0U, // CMP_SWAP_16
0U, // CMP_SWAP_32
0U, // CMP_SWAP_64
0U, // CMP_SWAP_8
0U, // CNOT_ZPmZ_UNDEF_B
0U, // CNOT_ZPmZ_UNDEF_D
0U, // CNOT_ZPmZ_UNDEF_H
0U, // CNOT_ZPmZ_UNDEF_S
0U, // CNT_ZPmZ_UNDEF_B
0U, // CNT_ZPmZ_UNDEF_D
0U, // CNT_ZPmZ_UNDEF_H
0U, // CNT_ZPmZ_UNDEF_S
0U, // EMITBKEY
0U, // EMITMTETAGGED
0U, // EONWrr
0U, // EONXrr
0U, // EORWrr
0U, // EORXrr
0U, // EOR_ZPZZ_ZERO_B
0U, // EOR_ZPZZ_ZERO_D
0U, // EOR_ZPZZ_ZERO_H
0U, // EOR_ZPZZ_ZERO_S
0U, // F128CSEL
0U, // FABD_ZPZZ_UNDEF_D
0U, // FABD_ZPZZ_UNDEF_H
0U, // FABD_ZPZZ_UNDEF_S
0U, // FABD_ZPZZ_ZERO_D
0U, // FABD_ZPZZ_ZERO_H
0U, // FABD_ZPZZ_ZERO_S
0U, // FABS_ZPmZ_UNDEF_D
0U, // FABS_ZPmZ_UNDEF_H
0U, // FABS_ZPmZ_UNDEF_S
0U, // FADD_ZPZI_UNDEF_D
0U, // FADD_ZPZI_UNDEF_H
0U, // FADD_ZPZI_UNDEF_S
0U, // FADD_ZPZI_ZERO_D
0U, // FADD_ZPZI_ZERO_H
0U, // FADD_ZPZI_ZERO_S
0U, // FADD_ZPZZ_UNDEF_D
0U, // FADD_ZPZZ_UNDEF_H
0U, // FADD_ZPZZ_UNDEF_S
0U, // FADD_ZPZZ_ZERO_D
0U, // FADD_ZPZZ_ZERO_H
0U, // FADD_ZPZZ_ZERO_S
0U, // FCVTZS_ZPmZ_DtoD_UNDEF
0U, // FCVTZS_ZPmZ_DtoS_UNDEF
0U, // FCVTZS_ZPmZ_HtoD_UNDEF
0U, // FCVTZS_ZPmZ_HtoH_UNDEF
0U, // FCVTZS_ZPmZ_HtoS_UNDEF
0U, // FCVTZS_ZPmZ_StoD_UNDEF
0U, // FCVTZS_ZPmZ_StoS_UNDEF
0U, // FCVTZU_ZPmZ_DtoD_UNDEF
0U, // FCVTZU_ZPmZ_DtoS_UNDEF
0U, // FCVTZU_ZPmZ_HtoD_UNDEF
0U, // FCVTZU_ZPmZ_HtoH_UNDEF
0U, // FCVTZU_ZPmZ_HtoS_UNDEF
0U, // FCVTZU_ZPmZ_StoD_UNDEF
0U, // FCVTZU_ZPmZ_StoS_UNDEF
0U, // FCVT_ZPmZ_DtoH_UNDEF
0U, // FCVT_ZPmZ_DtoS_UNDEF
0U, // FCVT_ZPmZ_HtoD_UNDEF
0U, // FCVT_ZPmZ_HtoS_UNDEF
0U, // FCVT_ZPmZ_StoD_UNDEF
0U, // FCVT_ZPmZ_StoH_UNDEF
0U, // FDIVR_ZPZZ_ZERO_D
0U, // FDIVR_ZPZZ_ZERO_H
0U, // FDIVR_ZPZZ_ZERO_S
0U, // FDIV_ZPZZ_UNDEF_D
0U, // FDIV_ZPZZ_UNDEF_H
0U, // FDIV_ZPZZ_UNDEF_S
0U, // FDIV_ZPZZ_ZERO_D
0U, // FDIV_ZPZZ_ZERO_H
0U, // FDIV_ZPZZ_ZERO_S
0U, // FDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // FDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // FDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // FDOT_VG4_M4ZZI_HtoS_PSEUDO
0U, // FMAXNM_ZPZI_UNDEF_D
0U, // FMAXNM_ZPZI_UNDEF_H
0U, // FMAXNM_ZPZI_UNDEF_S
0U, // FMAXNM_ZPZI_ZERO_D
0U, // FMAXNM_ZPZI_ZERO_H
0U, // FMAXNM_ZPZI_ZERO_S
0U, // FMAXNM_ZPZZ_UNDEF_D
0U, // FMAXNM_ZPZZ_UNDEF_H
0U, // FMAXNM_ZPZZ_UNDEF_S
0U, // FMAXNM_ZPZZ_ZERO_D
0U, // FMAXNM_ZPZZ_ZERO_H
0U, // FMAXNM_ZPZZ_ZERO_S
0U, // FMAX_ZPZI_UNDEF_D
0U, // FMAX_ZPZI_UNDEF_H
0U, // FMAX_ZPZI_UNDEF_S
0U, // FMAX_ZPZI_ZERO_D
0U, // FMAX_ZPZI_ZERO_H
0U, // FMAX_ZPZI_ZERO_S
0U, // FMAX_ZPZZ_UNDEF_D
0U, // FMAX_ZPZZ_UNDEF_H
0U, // FMAX_ZPZZ_UNDEF_S
0U, // FMAX_ZPZZ_ZERO_D
0U, // FMAX_ZPZZ_ZERO_H
0U, // FMAX_ZPZZ_ZERO_S
0U, // FMINNM_ZPZI_UNDEF_D
0U, // FMINNM_ZPZI_UNDEF_H
0U, // FMINNM_ZPZI_UNDEF_S
0U, // FMINNM_ZPZI_ZERO_D
0U, // FMINNM_ZPZI_ZERO_H
0U, // FMINNM_ZPZI_ZERO_S
0U, // FMINNM_ZPZZ_UNDEF_D
0U, // FMINNM_ZPZZ_UNDEF_H
0U, // FMINNM_ZPZZ_UNDEF_S
0U, // FMINNM_ZPZZ_ZERO_D
0U, // FMINNM_ZPZZ_ZERO_H
0U, // FMINNM_ZPZZ_ZERO_S
0U, // FMIN_ZPZI_UNDEF_D
0U, // FMIN_ZPZI_UNDEF_H
0U, // FMIN_ZPZI_UNDEF_S
0U, // FMIN_ZPZI_ZERO_D
0U, // FMIN_ZPZI_ZERO_H
0U, // FMIN_ZPZI_ZERO_S
0U, // FMIN_ZPZZ_UNDEF_D
0U, // FMIN_ZPZZ_UNDEF_H
0U, // FMIN_ZPZZ_UNDEF_S
0U, // FMIN_ZPZZ_ZERO_D
0U, // FMIN_ZPZZ_ZERO_H
0U, // FMIN_ZPZZ_ZERO_S
0U, // FMLAL_MZZI_S_PSEUDO
0U, // FMLAL_MZZ_S_PSEUDO
0U, // FMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // FMLAL_VG2_M2ZZI_S_PSEUDO
0U, // FMLAL_VG2_M2ZZ_S_PSEUDO
0U, // FMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // FMLAL_VG4_M4ZZI_S_PSEUDO
0U, // FMLAL_VG4_M4ZZ_S_PSEUDO
0U, // FMLA_VG2_M2Z2Z_D_PSEUDO
0U, // FMLA_VG2_M2Z2Z_S_PSEUDO
0U, // FMLA_VG2_M2Z4Z_H_PSEUDO
0U, // FMLA_VG2_M2ZZI_D_PSEUDO
0U, // FMLA_VG2_M2ZZI_S_PSEUDO
0U, // FMLA_VG2_M2ZZ_D_PSEUDO
0U, // FMLA_VG2_M2ZZ_S_PSEUDO
0U, // FMLA_VG4_M4Z4Z_D_PSEUDO
0U, // FMLA_VG4_M4Z4Z_H_PSEUDO
0U, // FMLA_VG4_M4Z4Z_S_PSEUDO
0U, // FMLA_VG4_M4ZZI_D_PSEUDO
0U, // FMLA_VG4_M4ZZI_S_PSEUDO
0U, // FMLA_VG4_M4ZZ_D_PSEUDO
0U, // FMLA_VG4_M4ZZ_S_PSEUDO
0U, // FMLA_ZPZZZ_UNDEF_D
0U, // FMLA_ZPZZZ_UNDEF_H
0U, // FMLA_ZPZZZ_UNDEF_S
0U, // FMLSL_MZZI_S_PSEUDO
0U, // FMLSL_MZZ_S_PSEUDO
0U, // FMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // FMLSL_VG2_M2ZZI_S_PSEUDO
0U, // FMLSL_VG2_M2ZZ_S_PSEUDO
0U, // FMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // FMLSL_VG4_M4ZZI_S_PSEUDO
0U, // FMLSL_VG4_M4ZZ_S_PSEUDO
0U, // FMLS_VG2_M2Z2Z_D_PSEUDO
0U, // FMLS_VG2_M2Z2Z_H_PSEUDO
0U, // FMLS_VG2_M2Z2Z_S_PSEUDO
0U, // FMLS_VG2_M2ZZI_D_PSEUDO
0U, // FMLS_VG2_M2ZZI_S_PSEUDO
0U, // FMLS_VG2_M2ZZ_D_PSEUDO
0U, // FMLS_VG2_M2ZZ_S_PSEUDO
0U, // FMLS_VG4_M4Z2Z_H_PSEUDO
0U, // FMLS_VG4_M4Z4Z_D_PSEUDO
0U, // FMLS_VG4_M4Z4Z_S_PSEUDO
0U, // FMLS_VG4_M4ZZI_D_PSEUDO
0U, // FMLS_VG4_M4ZZI_S_PSEUDO
0U, // FMLS_VG4_M4ZZ_D_PSEUDO
0U, // FMLS_VG4_M4ZZ_S_PSEUDO
0U, // FMLS_ZPZZZ_UNDEF_D
0U, // FMLS_ZPZZZ_UNDEF_H
0U, // FMLS_ZPZZZ_UNDEF_S
0U, // FMOPAL_MPPZZ_PSEUDO
0U, // FMOPA_MPPZZ_D_PSEUDO
0U, // FMOPA_MPPZZ_S_PSEUDO
0U, // FMOPSL_MPPZZ_PSEUDO
0U, // FMOPS_MPPZZ_D_PSEUDO
0U, // FMOPS_MPPZZ_S_PSEUDO
0U, // FMOVD0
0U, // FMOVH0
0U, // FMOVS0
0U, // FMULX_ZPZZ_ZERO_D
0U, // FMULX_ZPZZ_ZERO_H
0U, // FMULX_ZPZZ_ZERO_S
0U, // FMUL_ZPZI_UNDEF_D
0U, // FMUL_ZPZI_UNDEF_H
0U, // FMUL_ZPZI_UNDEF_S
0U, // FMUL_ZPZI_ZERO_D
0U, // FMUL_ZPZI_ZERO_H
0U, // FMUL_ZPZI_ZERO_S
0U, // FMUL_ZPZZ_UNDEF_D
0U, // FMUL_ZPZZ_UNDEF_H
0U, // FMUL_ZPZZ_UNDEF_S
0U, // FMUL_ZPZZ_ZERO_D
0U, // FMUL_ZPZZ_ZERO_H
0U, // FMUL_ZPZZ_ZERO_S
0U, // FNEG_ZPmZ_UNDEF_D
0U, // FNEG_ZPmZ_UNDEF_H
0U, // FNEG_ZPmZ_UNDEF_S
0U, // FNMLA_ZPZZZ_UNDEF_D
0U, // FNMLA_ZPZZZ_UNDEF_H
0U, // FNMLA_ZPZZZ_UNDEF_S
0U, // FNMLS_ZPZZZ_UNDEF_D
0U, // FNMLS_ZPZZZ_UNDEF_H
0U, // FNMLS_ZPZZZ_UNDEF_S
0U, // FRECPX_ZPmZ_UNDEF_D
0U, // FRECPX_ZPmZ_UNDEF_H
0U, // FRECPX_ZPmZ_UNDEF_S
0U, // FRINTA_ZPmZ_UNDEF_D
0U, // FRINTA_ZPmZ_UNDEF_H
0U, // FRINTA_ZPmZ_UNDEF_S
0U, // FRINTI_ZPmZ_UNDEF_D
0U, // FRINTI_ZPmZ_UNDEF_H
0U, // FRINTI_ZPmZ_UNDEF_S
0U, // FRINTM_ZPmZ_UNDEF_D
0U, // FRINTM_ZPmZ_UNDEF_H
0U, // FRINTM_ZPmZ_UNDEF_S
0U, // FRINTN_ZPmZ_UNDEF_D
0U, // FRINTN_ZPmZ_UNDEF_H
0U, // FRINTN_ZPmZ_UNDEF_S
0U, // FRINTP_ZPmZ_UNDEF_D
0U, // FRINTP_ZPmZ_UNDEF_H
0U, // FRINTP_ZPmZ_UNDEF_S
0U, // FRINTX_ZPmZ_UNDEF_D
0U, // FRINTX_ZPmZ_UNDEF_H
0U, // FRINTX_ZPmZ_UNDEF_S
0U, // FRINTZ_ZPmZ_UNDEF_D
0U, // FRINTZ_ZPmZ_UNDEF_H
0U, // FRINTZ_ZPmZ_UNDEF_S
0U, // FSQRT_ZPmZ_UNDEF_D
0U, // FSQRT_ZPmZ_UNDEF_H
0U, // FSQRT_ZPmZ_UNDEF_S
0U, // FSUBR_ZPZI_UNDEF_D
0U, // FSUBR_ZPZI_UNDEF_H
0U, // FSUBR_ZPZI_UNDEF_S
0U, // FSUBR_ZPZI_ZERO_D
0U, // FSUBR_ZPZI_ZERO_H
0U, // FSUBR_ZPZI_ZERO_S
0U, // FSUBR_ZPZZ_ZERO_D
0U, // FSUBR_ZPZZ_ZERO_H
0U, // FSUBR_ZPZZ_ZERO_S
0U, // FSUB_ZPZI_UNDEF_D
0U, // FSUB_ZPZI_UNDEF_H
0U, // FSUB_ZPZI_UNDEF_S
0U, // FSUB_ZPZI_ZERO_D
0U, // FSUB_ZPZI_ZERO_H
0U, // FSUB_ZPZI_ZERO_S
0U, // FSUB_ZPZZ_UNDEF_D
0U, // FSUB_ZPZZ_UNDEF_H
0U, // FSUB_ZPZZ_UNDEF_S
0U, // FSUB_ZPZZ_ZERO_D
0U, // FSUB_ZPZZ_ZERO_H
0U, // FSUB_ZPZZ_ZERO_S
0U, // FVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // GLD1B_D
0U, // GLD1B_D_IMM
0U, // GLD1B_D_SXTW
0U, // GLD1B_D_UXTW
0U, // GLD1B_S_IMM
0U, // GLD1B_S_SXTW
0U, // GLD1B_S_UXTW
0U, // GLD1D
0U, // GLD1D_IMM
0U, // GLD1D_SCALED
0U, // GLD1D_SXTW
0U, // GLD1D_SXTW_SCALED
0U, // GLD1D_UXTW
0U, // GLD1D_UXTW_SCALED
0U, // GLD1H_D
0U, // GLD1H_D_IMM
0U, // GLD1H_D_SCALED
0U, // GLD1H_D_SXTW
0U, // GLD1H_D_SXTW_SCALED
0U, // GLD1H_D_UXTW
0U, // GLD1H_D_UXTW_SCALED
0U, // GLD1H_S_IMM
0U, // GLD1H_S_SXTW
0U, // GLD1H_S_SXTW_SCALED
0U, // GLD1H_S_UXTW
0U, // GLD1H_S_UXTW_SCALED
0U, // GLD1SB_D
0U, // GLD1SB_D_IMM
0U, // GLD1SB_D_SXTW
0U, // GLD1SB_D_UXTW
0U, // GLD1SB_S_IMM
0U, // GLD1SB_S_SXTW
0U, // GLD1SB_S_UXTW
0U, // GLD1SH_D
0U, // GLD1SH_D_IMM
0U, // GLD1SH_D_SCALED
0U, // GLD1SH_D_SXTW
0U, // GLD1SH_D_SXTW_SCALED
0U, // GLD1SH_D_UXTW
0U, // GLD1SH_D_UXTW_SCALED
0U, // GLD1SH_S_IMM
0U, // GLD1SH_S_SXTW
0U, // GLD1SH_S_SXTW_SCALED
0U, // GLD1SH_S_UXTW
0U, // GLD1SH_S_UXTW_SCALED
0U, // GLD1SW_D
0U, // GLD1SW_D_IMM
0U, // GLD1SW_D_SCALED
0U, // GLD1SW_D_SXTW
0U, // GLD1SW_D_SXTW_SCALED
0U, // GLD1SW_D_UXTW
0U, // GLD1SW_D_UXTW_SCALED
0U, // GLD1W_D
0U, // GLD1W_D_IMM
0U, // GLD1W_D_SCALED
0U, // GLD1W_D_SXTW
0U, // GLD1W_D_SXTW_SCALED
0U, // GLD1W_D_UXTW
0U, // GLD1W_D_UXTW_SCALED
0U, // GLD1W_IMM
0U, // GLD1W_SXTW
0U, // GLD1W_SXTW_SCALED
0U, // GLD1W_UXTW
0U, // GLD1W_UXTW_SCALED
0U, // GLDFF1B_D
0U, // GLDFF1B_D_IMM
0U, // GLDFF1B_D_SXTW
0U, // GLDFF1B_D_UXTW
0U, // GLDFF1B_S_IMM
0U, // GLDFF1B_S_SXTW
0U, // GLDFF1B_S_UXTW
0U, // GLDFF1D
0U, // GLDFF1D_IMM
0U, // GLDFF1D_SCALED
0U, // GLDFF1D_SXTW
0U, // GLDFF1D_SXTW_SCALED
0U, // GLDFF1D_UXTW
0U, // GLDFF1D_UXTW_SCALED
0U, // GLDFF1H_D
0U, // GLDFF1H_D_IMM
0U, // GLDFF1H_D_SCALED
0U, // GLDFF1H_D_SXTW
0U, // GLDFF1H_D_SXTW_SCALED
0U, // GLDFF1H_D_UXTW
0U, // GLDFF1H_D_UXTW_SCALED
0U, // GLDFF1H_S_IMM
0U, // GLDFF1H_S_SXTW
0U, // GLDFF1H_S_SXTW_SCALED
0U, // GLDFF1H_S_UXTW
0U, // GLDFF1H_S_UXTW_SCALED
0U, // GLDFF1SB_D
0U, // GLDFF1SB_D_IMM
0U, // GLDFF1SB_D_SXTW
0U, // GLDFF1SB_D_UXTW
0U, // GLDFF1SB_S_IMM
0U, // GLDFF1SB_S_SXTW
0U, // GLDFF1SB_S_UXTW
0U, // GLDFF1SH_D
0U, // GLDFF1SH_D_IMM
0U, // GLDFF1SH_D_SCALED
0U, // GLDFF1SH_D_SXTW
0U, // GLDFF1SH_D_SXTW_SCALED
0U, // GLDFF1SH_D_UXTW
0U, // GLDFF1SH_D_UXTW_SCALED
0U, // GLDFF1SH_S_IMM
0U, // GLDFF1SH_S_SXTW
0U, // GLDFF1SH_S_SXTW_SCALED
0U, // GLDFF1SH_S_UXTW
0U, // GLDFF1SH_S_UXTW_SCALED
0U, // GLDFF1SW_D
0U, // GLDFF1SW_D_IMM
0U, // GLDFF1SW_D_SCALED
0U, // GLDFF1SW_D_SXTW
0U, // GLDFF1SW_D_SXTW_SCALED
0U, // GLDFF1SW_D_UXTW
0U, // GLDFF1SW_D_UXTW_SCALED
0U, // GLDFF1W_D
0U, // GLDFF1W_D_IMM
0U, // GLDFF1W_D_SCALED
0U, // GLDFF1W_D_SXTW
0U, // GLDFF1W_D_SXTW_SCALED
0U, // GLDFF1W_D_UXTW
0U, // GLDFF1W_D_UXTW_SCALED
0U, // GLDFF1W_IMM
0U, // GLDFF1W_SXTW
0U, // GLDFF1W_SXTW_SCALED
0U, // GLDFF1W_UXTW
0U, // GLDFF1W_UXTW_SCALED
0U, // G_ADD_LOW
0U, // G_BIT
0U, // G_DUP
0U, // G_DUPLANE16
0U, // G_DUPLANE32
0U, // G_DUPLANE64
0U, // G_DUPLANE8
0U, // G_EXT
0U, // G_FCMEQ
0U, // G_FCMEQZ
0U, // G_FCMGE
0U, // G_FCMGEZ
0U, // G_FCMGT
0U, // G_FCMGTZ
0U, // G_FCMLEZ
0U, // G_FCMLTZ
0U, // G_PREFETCH
0U, // G_REV16
0U, // G_REV32
0U, // G_REV64
0U, // G_SITOF
0U, // G_TRN1
0U, // G_TRN2
0U, // G_UITOF
0U, // G_UZP1
0U, // G_UZP2
0U, // G_VASHR
0U, // G_VLSHR
0U, // G_ZIP1
0U, // G_ZIP2
0U, // HOM_Epilog
0U, // HOM_Prolog
0U, // HWASAN_CHECK_MEMACCESS
0U, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES
0U, // INSERT_MXIPZ_H_PSEUDO_B
0U, // INSERT_MXIPZ_H_PSEUDO_D
0U, // INSERT_MXIPZ_H_PSEUDO_H
0U, // INSERT_MXIPZ_H_PSEUDO_Q
0U, // INSERT_MXIPZ_H_PSEUDO_S
0U, // INSERT_MXIPZ_V_PSEUDO_B
0U, // INSERT_MXIPZ_V_PSEUDO_D
0U, // INSERT_MXIPZ_V_PSEUDO_H
0U, // INSERT_MXIPZ_V_PSEUDO_Q
0U, // INSERT_MXIPZ_V_PSEUDO_S
0U, // IRGstack
0U, // JumpTableDest16
0U, // JumpTableDest32
0U, // JumpTableDest8
0U, // KCFI_CHECK
0U, // LD1B_D_IMM
0U, // LD1B_H_IMM
0U, // LD1B_IMM
0U, // LD1B_S_IMM
0U, // LD1D_IMM
0U, // LD1H_D_IMM
0U, // LD1H_IMM
0U, // LD1H_S_IMM
0U, // LD1SB_D_IMM
0U, // LD1SB_H_IMM
0U, // LD1SB_S_IMM
0U, // LD1SH_D_IMM
0U, // LD1SH_S_IMM
0U, // LD1SW_D_IMM
0U, // LD1W_D_IMM
0U, // LD1W_IMM
0U, // LD1_MXIPXX_H_PSEUDO_B
0U, // LD1_MXIPXX_H_PSEUDO_D
0U, // LD1_MXIPXX_H_PSEUDO_H
0U, // LD1_MXIPXX_H_PSEUDO_Q
0U, // LD1_MXIPXX_H_PSEUDO_S
0U, // LD1_MXIPXX_V_PSEUDO_B
0U, // LD1_MXIPXX_V_PSEUDO_D
0U, // LD1_MXIPXX_V_PSEUDO_H
0U, // LD1_MXIPXX_V_PSEUDO_Q
0U, // LD1_MXIPXX_V_PSEUDO_S
0U, // LDFF1B
0U, // LDFF1B_D
0U, // LDFF1B_H
0U, // LDFF1B_S
0U, // LDFF1D
0U, // LDFF1H
0U, // LDFF1H_D
0U, // LDFF1H_S
0U, // LDFF1SB_D
0U, // LDFF1SB_H
0U, // LDFF1SB_S
0U, // LDFF1SH_D
0U, // LDFF1SH_S
0U, // LDFF1SW_D
0U, // LDFF1W
0U, // LDFF1W_D
0U, // LDNF1B_D_IMM
0U, // LDNF1B_H_IMM
0U, // LDNF1B_IMM
0U, // LDNF1B_S_IMM
0U, // LDNF1D_IMM
0U, // LDNF1H_D_IMM
0U, // LDNF1H_IMM
0U, // LDNF1H_S_IMM
0U, // LDNF1SB_D_IMM
0U, // LDNF1SB_H_IMM
0U, // LDNF1SB_S_IMM
0U, // LDNF1SH_D_IMM
0U, // LDNF1SH_S_IMM
0U, // LDNF1SW_D_IMM
0U, // LDNF1W_D_IMM
0U, // LDNF1W_IMM
0U, // LDR_ZA_PSEUDO
0U, // LDR_ZZXI
0U, // LDR_ZZZXI
0U, // LDR_ZZZZXI
0U, // LOADgot
0U, // LSL_ZPZI_UNDEF_B
0U, // LSL_ZPZI_UNDEF_D
0U, // LSL_ZPZI_UNDEF_H
0U, // LSL_ZPZI_UNDEF_S
0U, // LSL_ZPZZ_UNDEF_B
0U, // LSL_ZPZZ_UNDEF_D
0U, // LSL_ZPZZ_UNDEF_H
0U, // LSL_ZPZZ_UNDEF_S
0U, // LSL_ZPZZ_ZERO_B
0U, // LSL_ZPZZ_ZERO_D
0U, // LSL_ZPZZ_ZERO_H
0U, // LSL_ZPZZ_ZERO_S
0U, // LSR_ZPZI_UNDEF_B
0U, // LSR_ZPZI_UNDEF_D
0U, // LSR_ZPZI_UNDEF_H
0U, // LSR_ZPZI_UNDEF_S
0U, // LSR_ZPZZ_UNDEF_B
0U, // LSR_ZPZZ_UNDEF_D
0U, // LSR_ZPZZ_UNDEF_H
0U, // LSR_ZPZZ_UNDEF_S
0U, // LSR_ZPZZ_ZERO_B
0U, // LSR_ZPZZ_ZERO_D
0U, // LSR_ZPZZ_ZERO_H
0U, // LSR_ZPZZ_ZERO_S
0U, // MOPSMemoryCopyPseudo
0U, // MOPSMemoryMovePseudo
0U, // MOPSMemorySetPseudo
0U, // MOPSMemorySetTaggingPseudo
0U, // MOVMCSym
0U, // MOVaddr
0U, // MOVaddrBA
0U, // MOVaddrCP
0U, // MOVaddrEXT
0U, // MOVaddrJT
0U, // MOVaddrTLS
0U, // MOVbaseTLS
0U, // MOVi32imm
0U, // MOVi64imm
0U, // MRS_FPCR
0U, // MSR_FPCR
0U, // MSRpstatePseudo
0U, // MUL_ZPZZ_UNDEF_B
0U, // MUL_ZPZZ_UNDEF_D
0U, // MUL_ZPZZ_UNDEF_H
0U, // MUL_ZPZZ_UNDEF_S
0U, // NEG_ZPmZ_UNDEF_B
0U, // NEG_ZPmZ_UNDEF_D
0U, // NEG_ZPmZ_UNDEF_H
0U, // NEG_ZPmZ_UNDEF_S
0U, // NOT_ZPmZ_UNDEF_B
0U, // NOT_ZPmZ_UNDEF_D
0U, // NOT_ZPmZ_UNDEF_H
0U, // NOT_ZPmZ_UNDEF_S
0U, // OBSCURE_COPY
0U, // ORNWrr
0U, // ORNXrr
0U, // ORRWrr
0U, // ORRXrr
0U, // ORR_ZPZZ_ZERO_B
0U, // ORR_ZPZZ_ZERO_D
0U, // ORR_ZPZZ_ZERO_H
0U, // ORR_ZPZZ_ZERO_S
0U, // PTEST_PP_ANY
0U, // RDFFR_P
0U, // RDFFR_PPz
0U, // RET_ReallyLR
0U, // RestoreZAPseudo
0U, // SABD_ZPZZ_UNDEF_B
0U, // SABD_ZPZZ_UNDEF_D
0U, // SABD_ZPZZ_UNDEF_H
0U, // SABD_ZPZZ_UNDEF_S
0U, // SCVTF_ZPmZ_DtoD_UNDEF
0U, // SCVTF_ZPmZ_DtoH_UNDEF
0U, // SCVTF_ZPmZ_DtoS_UNDEF
0U, // SCVTF_ZPmZ_HtoH_UNDEF
0U, // SCVTF_ZPmZ_StoD_UNDEF
0U, // SCVTF_ZPmZ_StoH_UNDEF
0U, // SCVTF_ZPmZ_StoS_UNDEF
0U, // SDIV_ZPZZ_UNDEF_D
0U, // SDIV_ZPZZ_UNDEF_S
0U, // SDOT_VG2_M2Z2Z_BtoS_PSEUDO
0U, // SDOT_VG2_M2Z2Z_HtoD_PSEUDO
0U, // SDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // SDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // SDOT_VG2_M2ZZI_HToS_PSEUDO
0U, // SDOT_VG2_M2ZZI_HtoD_PSEUDO
0U, // SDOT_VG4_M4Z4Z_BtoS_PSEUDO
0U, // SDOT_VG4_M4Z4Z_HtoD_PSEUDO
0U, // SDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // SDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // SDOT_VG4_M4ZZI_HToS_PSEUDO
0U, // SDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // SEH_AddFP
0U, // SEH_EpilogEnd
0U, // SEH_EpilogStart
0U, // SEH_Nop
0U, // SEH_PACSignLR
0U, // SEH_PrologEnd
0U, // SEH_SaveFPLR
0U, // SEH_SaveFPLR_X
0U, // SEH_SaveFReg
0U, // SEH_SaveFRegP
0U, // SEH_SaveFRegP_X
0U, // SEH_SaveFReg_X
0U, // SEH_SaveReg
0U, // SEH_SaveRegP
0U, // SEH_SaveRegP_X
0U, // SEH_SaveReg_X
0U, // SEH_SetFP
0U, // SEH_StackAlloc
0U, // SMAX_ZPZZ_UNDEF_B
0U, // SMAX_ZPZZ_UNDEF_D
0U, // SMAX_ZPZZ_UNDEF_H
0U, // SMAX_ZPZZ_UNDEF_S
0U, // SMIN_ZPZZ_UNDEF_B
0U, // SMIN_ZPZZ_UNDEF_D
0U, // SMIN_ZPZZ_UNDEF_H
0U, // SMIN_ZPZZ_UNDEF_S
0U, // SMLAL_MZZI_S_PSEUDO
0U, // SMLAL_MZZ_S_PSEUDO
0U, // SMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // SMLAL_VG2_M2ZZI_S_PSEUDO
0U, // SMLAL_VG2_M2ZZ_S_PSEUDO
0U, // SMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // SMLAL_VG4_M4ZZI_S_PSEUDO
0U, // SMLAL_VG4_M4ZZ_S_PSEUDO
0U, // SMLSL_MZZI_S_PSEUDO
0U, // SMLSL_MZZ_S_PSEUDO
0U, // SMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // SMLSL_VG2_M2ZZI_S_PSEUDO
0U, // SMLSL_VG2_M2ZZ_S_PSEUDO
0U, // SMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // SMLSL_VG4_M4ZZI_S_PSEUDO
0U, // SMLSL_VG4_M4ZZ_S_PSEUDO
0U, // SMOPA_MPPZZ_D_PSEUDO
0U, // SMOPA_MPPZZ_S_PSEUDO
0U, // SMOPS_MPPZZ_D_PSEUDO
0U, // SMOPS_MPPZZ_S_PSEUDO
0U, // SMULH_ZPZZ_UNDEF_B
0U, // SMULH_ZPZZ_UNDEF_D
0U, // SMULH_ZPZZ_UNDEF_H
0U, // SMULH_ZPZZ_UNDEF_S
0U, // SPACE
0U, // SQABS_ZPmZ_UNDEF_B
0U, // SQABS_ZPmZ_UNDEF_D
0U, // SQABS_ZPmZ_UNDEF_H
0U, // SQABS_ZPmZ_UNDEF_S
0U, // SQNEG_ZPmZ_UNDEF_B
0U, // SQNEG_ZPmZ_UNDEF_D
0U, // SQNEG_ZPmZ_UNDEF_H
0U, // SQNEG_ZPmZ_UNDEF_S
0U, // SQRSHL_ZPZZ_UNDEF_B
0U, // SQRSHL_ZPZZ_UNDEF_D
0U, // SQRSHL_ZPZZ_UNDEF_H
0U, // SQRSHL_ZPZZ_UNDEF_S
0U, // SQSHLU_ZPZI_ZERO_B
0U, // SQSHLU_ZPZI_ZERO_D
0U, // SQSHLU_ZPZI_ZERO_H
0U, // SQSHLU_ZPZI_ZERO_S
0U, // SQSHL_ZPZI_ZERO_B
0U, // SQSHL_ZPZI_ZERO_D
0U, // SQSHL_ZPZI_ZERO_H
0U, // SQSHL_ZPZI_ZERO_S
0U, // SQSHL_ZPZZ_UNDEF_B
0U, // SQSHL_ZPZZ_UNDEF_D
0U, // SQSHL_ZPZZ_UNDEF_H
0U, // SQSHL_ZPZZ_UNDEF_S
0U, // SRSHL_ZPZZ_UNDEF_B
0U, // SRSHL_ZPZZ_UNDEF_D
0U, // SRSHL_ZPZZ_UNDEF_H
0U, // SRSHL_ZPZZ_UNDEF_S
0U, // SRSHR_ZPZI_ZERO_B
0U, // SRSHR_ZPZI_ZERO_D
0U, // SRSHR_ZPZI_ZERO_H
0U, // SRSHR_ZPZI_ZERO_S
0U, // STGloop
0U, // STGloop_wback
0U, // STR_ZZXI
0U, // STR_ZZZXI
0U, // STR_ZZZZXI
0U, // STZGloop
0U, // STZGloop_wback
0U, // SUBR_ZPZZ_ZERO_B
0U, // SUBR_ZPZZ_ZERO_D
0U, // SUBR_ZPZZ_ZERO_H
0U, // SUBR_ZPZZ_ZERO_S
0U, // SUBSWrr
0U, // SUBSXrr
0U, // SUBWrr
0U, // SUBXrr
0U, // SUB_VG2_M2Z2Z_D_PSEUDO
0U, // SUB_VG2_M2Z2Z_S_PSEUDO
0U, // SUB_VG2_M2ZZ_D_PSEUDO
0U, // SUB_VG2_M2ZZ_S_PSEUDO
0U, // SUB_VG4_M4Z4Z_D_PSEUDO
0U, // SUB_VG4_M4Z4Z_S_PSEUDO
0U, // SUB_VG4_M4ZZ_D_PSEUDO
0U, // SUB_VG4_M4ZZ_S_PSEUDO
0U, // SUB_ZPZZ_ZERO_B
0U, // SUB_ZPZZ_ZERO_D
0U, // SUB_ZPZZ_ZERO_H
0U, // SUB_ZPZZ_ZERO_S
0U, // SUDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // SUDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // SUMOPA_MPPZZ_D_PSEUDO
0U, // SUMOPA_MPPZZ_S_PSEUDO
0U, // SUMOPS_MPPZZ_D_PSEUDO
0U, // SUMOPS_MPPZZ_S_PSEUDO
0U, // SUVDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // SVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // SVDOT_VG4_M4ZZI_BtoS_PSEUDO
0U, // SVDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // SXTB_ZPmZ_UNDEF_D
0U, // SXTB_ZPmZ_UNDEF_H
0U, // SXTB_ZPmZ_UNDEF_S
0U, // SXTH_ZPmZ_UNDEF_D
0U, // SXTH_ZPmZ_UNDEF_S
0U, // SXTW_ZPmZ_UNDEF_D
0U, // SpeculationBarrierISBDSBEndBB
0U, // SpeculationBarrierSBEndBB
0U, // SpeculationSafeValueW
0U, // SpeculationSafeValueX
0U, // StoreSwiftAsyncContext
0U, // TAGPstack
0U, // TCRETURNdi
0U, // TCRETURNri
0U, // TCRETURNriALL
0U, // TCRETURNriBTI
0U, // TLSDESCCALL
0U, // TLSDESC_CALLSEQ
0U, // UABD_ZPZZ_UNDEF_B
0U, // UABD_ZPZZ_UNDEF_D
0U, // UABD_ZPZZ_UNDEF_H
0U, // UABD_ZPZZ_UNDEF_S
0U, // UCVTF_ZPmZ_DtoD_UNDEF
0U, // UCVTF_ZPmZ_DtoH_UNDEF
0U, // UCVTF_ZPmZ_DtoS_UNDEF
0U, // UCVTF_ZPmZ_HtoH_UNDEF
0U, // UCVTF_ZPmZ_StoD_UNDEF
0U, // UCVTF_ZPmZ_StoH_UNDEF
0U, // UCVTF_ZPmZ_StoS_UNDEF
0U, // UDIV_ZPZZ_UNDEF_D
0U, // UDIV_ZPZZ_UNDEF_S
0U, // UDOT_VG2_M2Z2Z_BtoS_PSEUDO
0U, // UDOT_VG2_M2Z2Z_HtoD_PSEUDO
0U, // UDOT_VG2_M2Z2Z_HtoS_PSEUDO
0U, // UDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // UDOT_VG2_M2ZZI_HToS_PSEUDO
0U, // UDOT_VG2_M2ZZI_HtoD_PSEUDO
0U, // UDOT_VG4_M4Z4Z_BtoS_PSEUDO
0U, // UDOT_VG4_M4Z4Z_HtoD_PSEUDO
0U, // UDOT_VG4_M4Z4Z_HtoS_PSEUDO
0U, // UDOT_VG4_M4ZZI_BtoS_PSEUDO
0U, // UDOT_VG4_M4ZZI_HToS_PSEUDO
0U, // UDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // UMAX_ZPZZ_UNDEF_B
0U, // UMAX_ZPZZ_UNDEF_D
0U, // UMAX_ZPZZ_UNDEF_H
0U, // UMAX_ZPZZ_UNDEF_S
0U, // UMIN_ZPZZ_UNDEF_B
0U, // UMIN_ZPZZ_UNDEF_D
0U, // UMIN_ZPZZ_UNDEF_H
0U, // UMIN_ZPZZ_UNDEF_S
0U, // UMLAL_MZZI_S_PSEUDO
0U, // UMLAL_MZZ_S_PSEUDO
0U, // UMLAL_VG2_M2Z2Z_S_PSEUDO
0U, // UMLAL_VG2_M2ZZI_S_PSEUDO
0U, // UMLAL_VG2_M2ZZ_S_PSEUDO
0U, // UMLAL_VG4_M4Z4Z_S_PSEUDO
0U, // UMLAL_VG4_M4ZZI_S_PSEUDO
0U, // UMLAL_VG4_M4ZZ_S_PSEUDO
0U, // UMLSL_MZZI_S_PSEUDO
0U, // UMLSL_MZZ_S_PSEUDO
0U, // UMLSL_VG2_M2Z2Z_S_PSEUDO
0U, // UMLSL_VG2_M2ZZI_S_PSEUDO
0U, // UMLSL_VG2_M2ZZ_S_PSEUDO
0U, // UMLSL_VG4_M4Z4Z_S_PSEUDO
0U, // UMLSL_VG4_M4ZZI_S_PSEUDO
0U, // UMLSL_VG4_M4ZZ_S_PSEUDO
0U, // UMOPA_MPPZZ_D_PSEUDO
0U, // UMOPA_MPPZZ_S_PSEUDO
0U, // UMOPS_MPPZZ_D_PSEUDO
0U, // UMOPS_MPPZZ_S_PSEUDO
0U, // UMULH_ZPZZ_UNDEF_B
0U, // UMULH_ZPZZ_UNDEF_D
0U, // UMULH_ZPZZ_UNDEF_H
0U, // UMULH_ZPZZ_UNDEF_S
0U, // UQRSHL_ZPZZ_UNDEF_B
0U, // UQRSHL_ZPZZ_UNDEF_D
0U, // UQRSHL_ZPZZ_UNDEF_H
0U, // UQRSHL_ZPZZ_UNDEF_S
0U, // UQSHL_ZPZI_ZERO_B
0U, // UQSHL_ZPZI_ZERO_D
0U, // UQSHL_ZPZI_ZERO_H
0U, // UQSHL_ZPZI_ZERO_S
0U, // UQSHL_ZPZZ_UNDEF_B
0U, // UQSHL_ZPZZ_UNDEF_D
0U, // UQSHL_ZPZZ_UNDEF_H
0U, // UQSHL_ZPZZ_UNDEF_S
0U, // URECPE_ZPmZ_UNDEF_S
0U, // URSHL_ZPZZ_UNDEF_B
0U, // URSHL_ZPZZ_UNDEF_D
0U, // URSHL_ZPZZ_UNDEF_H
0U, // URSHL_ZPZZ_UNDEF_S
0U, // URSHR_ZPZI_ZERO_B
0U, // URSHR_ZPZI_ZERO_D
0U, // URSHR_ZPZI_ZERO_H
0U, // URSHR_ZPZI_ZERO_S
0U, // URSQRTE_ZPmZ_UNDEF_S
0U, // USDOT_VG2_M2Z2Z_BToS_PSEUDO
0U, // USDOT_VG2_M2ZZI_BToS_PSEUDO
0U, // USDOT_VG4_M4Z4Z_BToS_PSEUDO
0U, // USDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // USMOPA_MPPZZ_D_PSEUDO
0U, // USMOPA_MPPZZ_S_PSEUDO
0U, // USMOPS_MPPZZ_D_PSEUDO
0U, // USMOPS_MPPZZ_S_PSEUDO
0U, // USVDOT_VG4_M4ZZI_BToS_PSEUDO
0U, // UVDOT_VG2_M2ZZI_HtoS_PSEUDO
0U, // UVDOT_VG4_M4ZZI_BtoS_PSEUDO
0U, // UVDOT_VG4_M4ZZI_HtoD_PSEUDO
0U, // UXTB_ZPmZ_UNDEF_D
0U, // UXTB_ZPmZ_UNDEF_H
0U, // UXTB_ZPmZ_UNDEF_S
0U, // UXTH_ZPmZ_UNDEF_D
0U, // UXTH_ZPmZ_UNDEF_S
0U, // UXTW_ZPmZ_UNDEF_D
0U, // ZERO_M_PSEUDO
0U, // ABSWr
0U, // ABSXr
8U, // ABS_ZPmZ_B
16U, // ABS_ZPmZ_D
0U, // ABS_ZPmZ_H
24U, // ABS_ZPmZ_S
32U, // ABSv16i8
0U, // ABSv1i64
40U, // ABSv2i32
48U, // ABSv2i64
56U, // ABSv4i16
64U, // ABSv4i32
72U, // ABSv8i16
80U, // ABSv8i8
1112U, // ADCLB_ZZZ_D
2136U, // ADCLB_ZZZ_S
1112U, // ADCLT_ZZZ_D
2136U, // ADCLT_ZZZ_S
3160U, // ADCSWr
3160U, // ADCSXr
3160U, // ADCWr
3160U, // ADCXr
135256U, // ADDG
0U, // ADDHA_MPPZ_D
0U, // ADDHA_MPPZ_S
5208U, // ADDHNB_ZZZ_B
96U, // ADDHNB_ZZZ_H
6232U, // ADDHNB_ZZZ_S
7256U, // ADDHNT_ZZZ_B
24U, // ADDHNT_ZZZ_H
1112U, // ADDHNT_ZZZ_S
270440U, // ADDHNv2i64_v2i32
271464U, // ADDHNv2i64_v4i32
401520U, // ADDHNv4i32_v4i16
402544U, // ADDHNv4i32_v8i16
533624U, // ADDHNv8i16_v16i8
532600U, // ADDHNv8i16_v8i8
3160U, // ADDPL_XXI
16918656U, // ADDP_ZPmZ_B
33691776U, // ADDP_ZPmZ_D
50998408U, // ADDP_ZPmZ_H
67252352U, // ADDP_ZPmZ_S
794768U, // ADDPv16i8
925848U, // ADDPv2i32
270440U, // ADDPv2i64
48U, // ADDPv2i64p
1056928U, // ADDPv4i16
401520U, // ADDPv4i32
532600U, // ADDPv8i16
1188008U, // ADDPv8i8
10328U, // ADDQV_VPZ_B
6232U, // ADDQV_VPZ_D
5208U, // ADDQV_VPZ_H
12376U, // ADDQV_VPZ_S
3160U, // ADDSPL_XXI
3160U, // ADDSVL_XXI
13400U, // ADDSWri
14424U, // ADDSWrs
15448U, // ADDSWrx
13400U, // ADDSXri
14424U, // ADDSXrs
15448U, // ADDSXrx
1313880U, // ADDSXrx64
0U, // ADDVA_MPPZ_D
0U, // ADDVA_MPPZ_S
3160U, // ADDVL_XXI
32U, // ADDVv16i8v
56U, // ADDVv4i16v
64U, // ADDVv4i32v
72U, // ADDVv8i16v
80U, // ADDVv8i8v
13400U, // ADDWri
14424U, // ADDWrs
15448U, // ADDWrx
13400U, // ADDXri
14424U, // ADDXrs
15448U, // ADDXrx
1313880U, // ADDXrx64
176U, // ADD_VG2_2ZZ_B
184U, // ADD_VG2_2ZZ_D
136U, // ADD_VG2_2ZZ_H
96U, // ADD_VG2_2ZZ_S
1453248U, // ADD_VG2_M2Z2Z_D
1584328U, // ADD_VG2_M2Z2Z_S
52047040U, // ADD_VG2_M2ZZ_D
52178120U, // ADD_VG2_M2ZZ_S
192U, // ADD_VG2_M2Z_D
200U, // ADD_VG2_M2Z_S
176U, // ADD_VG4_4ZZ_B
184U, // ADD_VG4_4ZZ_D
136U, // ADD_VG4_4ZZ_H
96U, // ADD_VG4_4ZZ_S
1453248U, // ADD_VG4_M4Z4Z_D
1584328U, // ADD_VG4_M4Z4Z_S
52047040U, // ADD_VG4_M4ZZ_D
52178120U, // ADD_VG4_M4ZZ_S
192U, // ADD_VG4_M4Z_D
200U, // ADD_VG4_M4Z_S
16473U, // ADD_ZI_B
17496U, // ADD_ZI_D
208U, // ADD_ZI_H
18521U, // ADD_ZI_S
16918656U, // ADD_ZPmZ_B
33691776U, // ADD_ZPmZ_D
50998408U, // ADD_ZPmZ_H
67252352U, // ADD_ZPmZ_S
10329U, // ADD_ZZZ_B
6232U, // ADD_ZZZ_D
136U, // ADD_ZZZ_H
12377U, // ADD_ZZZ_S
794768U, // ADDv16i8
3160U, // ADDv1i64
925848U, // ADDv2i32
270440U, // ADDv2i64
1056928U, // ADDv4i16
401520U, // ADDv4i32
532600U, // ADDv8i16
1188008U, // ADDv8i8
0U, // ADR
1U, // ADRP
19544U, // ADR_LSL_ZZZ_D_0
20568U, // ADR_LSL_ZZZ_D_1
21592U, // ADR_LSL_ZZZ_D_2
22616U, // ADR_LSL_ZZZ_D_3
23641U, // ADR_LSL_ZZZ_S_0
24665U, // ADR_LSL_ZZZ_S_1
25689U, // ADR_LSL_ZZZ_S_2
26713U, // ADR_LSL_ZZZ_S_3
27736U, // ADR_SXTW_ZZZ_D_0
28760U, // ADR_SXTW_ZZZ_D_1
29784U, // ADR_SXTW_ZZZ_D_2
30808U, // ADR_SXTW_ZZZ_D_3
31832U, // ADR_UXTW_ZZZ_D_0
32856U, // ADR_UXTW_ZZZ_D_1
33880U, // ADR_UXTW_ZZZ_D_2
34904U, // ADR_UXTW_ZZZ_D_3
10329U, // AESD_ZZZ_B
32U, // AESDrr
10329U, // AESE_ZZZ_B
32U, // AESErr
1U, // AESIMC_ZZ_B
32U, // AESIMCrr
1U, // AESMC_ZZ_B
32U, // AESMCrr
10328U, // ANDQV_VPZ_B
6232U, // ANDQV_VPZ_D
5208U, // ANDQV_VPZ_H
12376U, // ANDQV_VPZ_S
35928U, // ANDSWri
14424U, // ANDSWrs
36952U, // ANDSXri
14424U, // ANDSXrs
16918744U, // ANDS_PPzPP
0U, // ANDV_VPZ_B
0U, // ANDV_VPZ_D
0U, // ANDV_VPZ_H
0U, // ANDV_VPZ_S
35928U, // ANDWri
14424U, // ANDWrs
36952U, // ANDXri
14424U, // ANDXrs
16918744U, // AND_PPzPP
36952U, // AND_ZI
16918656U, // AND_ZPmZ_B
33691776U, // AND_ZPmZ_D
50998408U, // AND_ZPmZ_H
67252352U, // AND_ZPmZ_S
6232U, // AND_ZZZ
794768U, // ANDv16i8
1188008U, // ANDv8i8
141440U, // ASRD_ZPmI_B
137344U, // ASRD_ZPmI_D
52309128U, // ASRD_ZPmI_H
143488U, // ASRD_ZPmI_S
16918656U, // ASRR_ZPmZ_B
33691776U, // ASRR_ZPmZ_D
50998408U, // ASRR_ZPmZ_H
67252352U, // ASRR_ZPmZ_S
3160U, // ASRVWr
3160U, // ASRVXr
33695872U, // ASR_WIDE_ZPmZ_B
2108552U, // ASR_WIDE_ZPmZ_H
33697920U, // ASR_WIDE_ZPmZ_S
6233U, // ASR_WIDE_ZZZ_B
184U, // ASR_WIDE_ZZZ_H
6233U, // ASR_WIDE_ZZZ_S
141440U, // ASR_ZPmI_B
137344U, // ASR_ZPmI_D
52309128U, // ASR_ZPmI_H
143488U, // ASR_ZPmI_S
16918656U, // ASR_ZPmZ_B
33691776U, // ASR_ZPmZ_D
50998408U, // ASR_ZPmZ_H
67252352U, // ASR_ZPmZ_S
3161U, // ASR_ZZI_B
3160U, // ASR_ZZI_D
224U, // ASR_ZZI_H
3161U, // ASR_ZZI_S
1U, // AUTDA
1U, // AUTDB
0U, // AUTDZA
0U, // AUTDZB
1U, // AUTIA
0U, // AUTIA1716
0U, // AUTIASP
0U, // AUTIAZ
1U, // AUTIB
0U, // AUTIB1716
0U, // AUTIBSP
0U, // AUTIBZ
0U, // AUTIZA
0U, // AUTIZB
0U, // AXFLAG
0U, // B
86122640U, // BCAX
33691736U, // BCAX_ZZZZ
0U, // BCcc
10329U, // BDEP_ZZZ_B
6232U, // BDEP_ZZZ_D
136U, // BDEP_ZZZ_H
12377U, // BDEP_ZZZ_S
10329U, // BEXT_ZZZ_B
6232U, // BEXT_ZZZ_D
136U, // BEXT_ZZZ_H
12377U, // BEXT_ZZZ_S
2368672U, // BF16DOTlanev4bf16
2368632U, // BF16DOTlanev8bf16
0U, // BFADD_VG2_M2Z_H
0U, // BFADD_VG4_M4Z_H
50998408U, // BFADD_ZPZmZ
136U, // BFADD_ZZZ
232U, // BFCLAMP_VG2_2ZZZ_H
232U, // BFCLAMP_VG4_4ZZZ_H
232U, // BFCLAMP_ZZZ
0U, // BFCVT
64U, // BFCVTN
64U, // BFCVTN2
1U, // BFCVTNT_ZPmZ
0U, // BFCVTN_Z2Z_StoH
0U, // BFCVT_Z2Z_StoH
1U, // BFCVT_ZPmZ
38128U, // BFDOT_VG2_M2Z2Z_HtoS
2529520U, // BFDOT_VG2_M2ZZI_HtoS
39152U, // BFDOT_VG2_M2ZZ_HtoS
38128U, // BFDOT_VG4_M4Z4Z_HtoS
2529520U, // BFDOT_VG4_M4ZZI_HtoS
39152U, // BFDOT_VG4_M4ZZ_HtoS
52960344U, // BFDOT_ZZI
7256U, // BFDOT_ZZZ
1057952U, // BFDOTv4bf16
533624U, // BFDOTv8bf16
248U, // BFMAXNM_VG2_2Z2Z_H
136U, // BFMAXNM_VG2_2ZZ_H
248U, // BFMAXNM_VG4_4Z2Z_H
136U, // BFMAXNM_VG4_4ZZ_H
50998408U, // BFMAXNM_ZPZmZ
248U, // BFMAX_VG2_2Z2Z_H
136U, // BFMAX_VG2_2ZZ_H
248U, // BFMAX_VG4_4Z2Z_H
136U, // BFMAX_VG4_4ZZ_H
50998408U, // BFMAX_ZPZmZ
248U, // BFMINNM_VG2_2Z2Z_H
136U, // BFMINNM_VG2_2ZZ_H
248U, // BFMINNM_VG4_4Z2Z_H
136U, // BFMINNM_VG4_4ZZ_H
50998408U, // BFMINNM_ZPZmZ
248U, // BFMIN_VG2_2Z2Z_H
136U, // BFMIN_VG2_2ZZ_H
248U, // BFMIN_VG4_4Z2Z_H
136U, // BFMIN_VG4_4ZZ_H
50998408U, // BFMIN_ZPZmZ
533624U, // BFMLALB
103425144U, // BFMLALBIdx
7256U, // BFMLALB_ZZZ
52960344U, // BFMLALB_ZZZI
533624U, // BFMLALT
103425144U, // BFMLALTIdx
7256U, // BFMLALT_ZZZ
52960344U, // BFMLALT_ZZZI
40193U, // BFMLAL_MZZI_S
257U, // BFMLAL_MZZ_S
38128U, // BFMLAL_VG2_M2Z2Z_S
2529520U, // BFMLAL_VG2_M2ZZI_S
39152U, // BFMLAL_VG2_M2ZZ_S
38128U, // BFMLAL_VG4_M4Z4Z_S
2529520U, // BFMLAL_VG4_M4ZZI_S
39152U, // BFMLAL_VG4_M4ZZ_S
264U, // BFMLA_VG2_M2Z2Z
272U, // BFMLA_VG2_M2ZZ
40208U, // BFMLA_VG2_M2ZZI
264U, // BFMLA_VG4_M4Z4Z
272U, // BFMLA_VG4_M4ZZ
40208U, // BFMLA_VG4_M4ZZI
53226728U, // BFMLA_ZPmZZ
41192U, // BFMLA_ZZZI
52960344U, // BFMLSLB_ZZZI_S
7256U, // BFMLSLB_ZZZ_S
52960344U, // BFMLSLT_ZZZI_S
7256U, // BFMLSLT_ZZZ_S
40193U, // BFMLSL_MZZI_S
257U, // BFMLSL_MZZ_S
38128U, // BFMLSL_VG2_M2Z2Z_S
2529520U, // BFMLSL_VG2_M2ZZI_S
39152U, // BFMLSL_VG2_M2ZZ_S
38128U, // BFMLSL_VG4_M4Z4Z_S
2529520U, // BFMLSL_VG4_M4ZZI_S
39152U, // BFMLSL_VG4_M4ZZ_S
264U, // BFMLS_VG2_M2Z2Z
272U, // BFMLS_VG2_M2ZZ
40208U, // BFMLS_VG2_M2ZZI
264U, // BFMLS_VG4_M4Z4Z
272U, // BFMLS_VG4_M4ZZ
40208U, // BFMLS_VG4_M4ZZI
53226728U, // BFMLS_ZPmZZ
41192U, // BFMLS_ZZZI
533624U, // BFMMLA
7256U, // BFMMLA_ZZZ
0U, // BFMOPA_MPPZZ
0U, // BFMOPA_MPPZZ_H
0U, // BFMOPS_MPPZZ
0U, // BFMOPS_MPPZZ_H
50998408U, // BFMUL_ZPZmZ
136U, // BFMUL_ZZZ
42120U, // BFMUL_ZZZI
117614681U, // BFMWri
117614681U, // BFMXri
0U, // BFSUB_VG2_M2Z_H
0U, // BFSUB_VG4_M4Z_H
50998408U, // BFSUB_ZPZmZ
136U, // BFSUB_ZZZ
2529520U, // BFVDOT_VG2_M2ZZI_HtoS
10329U, // BGRP_ZZZ_B
6232U, // BGRP_ZZZ_D
136U, // BGRP_ZZZ_H
12377U, // BGRP_ZZZ_S
14424U, // BICSWrs
14424U, // BICSXrs
16918744U, // BICS_PPzPP
14424U, // BICWrs
14424U, // BICXrs
16918744U, // BIC_PPzPP
16918656U, // BIC_ZPmZ_B
33691776U, // BIC_ZPmZ_D
50998408U, // BIC_ZPmZ_H
67252352U, // BIC_ZPmZ_S
6232U, // BIC_ZZZ
794768U, // BICv16i8
1U, // BICv2i32
1U, // BICv4i16
1U, // BICv4i32
1U, // BICv8i16
1188008U, // BICv8i8
795792U, // BIFv16i8
1189032U, // BIFv8i8
795792U, // BITv16i8
1189032U, // BITv8i8
0U, // BL
0U, // BLR
0U, // BLRAA
0U, // BLRAAZ
0U, // BLRAB
0U, // BLRABZ
280U, // BMOPA_MPPZZ_S
280U, // BMOPS_MPPZZ_S
0U, // BR
0U, // BRAA
0U, // BRAAZ
0U, // BRAB
0U, // BRABZ
0U, // BRB_IALL
0U, // BRB_INJ
0U, // BRK
10456U, // BRKAS_PPzP
8U, // BRKA_PPmP
10456U, // BRKA_PPzP
10456U, // BRKBS_PPzP
8U, // BRKB_PPmP
10456U, // BRKB_PPzP
16918744U, // BRKNS_PPzP
16918744U, // BRKN_PPzP
16918744U, // BRKPAS_PPzPP
16918744U, // BRKPA_PPzPP
16918744U, // BRKPBS_PPzPP
16918744U, // BRKPB_PPzPP
33691736U, // BSL1N_ZZZZ
33691736U, // BSL2N_ZZZZ
33691736U, // BSL_ZZZZ
795792U, // BSLv16i8
1189032U, // BSLv8i8
0U, // Bcc
134359129U, // CADD_ZZI_B
134355032U, // CADD_ZZI_D
3026056U, // CADD_ZZI_H
134361177U, // CADD_ZZI_S
3189025U, // CASAB
3189025U, // CASAH
3189025U, // CASALB
3189025U, // CASALH
3189025U, // CASALW
3189025U, // CASALX
3189025U, // CASAW
3189025U, // CASAX
3189025U, // CASB
3189025U, // CASH
3189025U, // CASLB
3189025U, // CASLH
3189025U, // CASLW
3189025U, // CASLX
0U, // CASPALW
0U, // CASPALX
0U, // CASPAW
0U, // CASPAX
0U, // CASPLW
0U, // CASPLX
0U, // CASPW
0U, // CASPX
3189025U, // CASW
3189025U, // CASX
1U, // CBNZW
1U, // CBNZX
1U, // CBZW
1U, // CBZX
151129176U, // CCMNWi
151129176U, // CCMNWr
151129176U, // CCMNXi
151129176U, // CCMNXr
151129176U, // CCMPWi
151129176U, // CCMPWr
151129176U, // CCMPXi
151129176U, // CCMPXr
170400856U, // CDOT_ZZZI_D
184721417U, // CDOT_ZZZI_S
201464920U, // CDOT_ZZZ_D
3288073U, // CDOT_ZZZ_S
0U, // CFINV
16911448U, // CLASTA_RPZ_B
33688664U, // CLASTA_RPZ_D
218238040U, // CLASTA_RPZ_H
67243096U, // CLASTA_RPZ_S
16911448U, // CLASTA_VPZ_B
33688664U, // CLASTA_VPZ_D
218238040U, // CLASTA_VPZ_H
67243096U, // CLASTA_VPZ_S
16918616U, // CLASTA_ZPZ_B
33691736U, // CLASTA_ZPZ_D
50998408U, // CLASTA_ZPZ_H
67252312U, // CLASTA_ZPZ_S
16911448U, // CLASTB_RPZ_B
33688664U, // CLASTB_RPZ_D
218238040U, // CLASTB_RPZ_H
67243096U, // CLASTB_RPZ_S
16911448U, // CLASTB_VPZ_B
33688664U, // CLASTB_VPZ_D
218238040U, // CLASTB_VPZ_H
67243096U, // CLASTB_VPZ_S
16918616U, // CLASTB_ZPZ_B
33691736U, // CLASTB_ZPZ_D
50998408U, // CLASTB_ZPZ_H
67252312U, // CLASTB_ZPZ_S
0U, // CLREX
0U, // CLSWr
0U, // CLSXr
8U, // CLS_ZPmZ_B
16U, // CLS_ZPmZ_D
0U, // CLS_ZPmZ_H
24U, // CLS_ZPmZ_S
32U, // CLSv16i8
40U, // CLSv2i32
56U, // CLSv4i16
64U, // CLSv4i32
72U, // CLSv8i16
80U, // CLSv8i8
0U, // CLZWr
0U, // CLZXr
8U, // CLZ_ZPmZ_B
16U, // CLZ_ZPmZ_D
0U, // CLZ_ZPmZ_H
24U, // CLZ_ZPmZ_S
32U, // CLZv16i8
40U, // CLZv2i32
56U, // CLZv4i16
64U, // CLZv4i32
72U, // CLZv8i16
80U, // CLZv8i8
794768U, // CMEQv16i8
296U, // CMEQv16i8rz
3160U, // CMEQv1i64
304U, // CMEQv1i64rz
925848U, // CMEQv2i32
312U, // CMEQv2i32rz
270440U, // CMEQv2i64
320U, // CMEQv2i64rz
1056928U, // CMEQv4i16
328U, // CMEQv4i16rz
401520U, // CMEQv4i32
336U, // CMEQv4i32rz
532600U, // CMEQv8i16
344U, // CMEQv8i16rz
1188008U, // CMEQv8i8
352U, // CMEQv8i8rz
794768U, // CMGEv16i8
296U, // CMGEv16i8rz
3160U, // CMGEv1i64
304U, // CMGEv1i64rz
925848U, // CMGEv2i32
312U, // CMGEv2i32rz
270440U, // CMGEv2i64
320U, // CMGEv2i64rz
1056928U, // CMGEv4i16
328U, // CMGEv4i16rz
401520U, // CMGEv4i32
336U, // CMGEv4i32rz
532600U, // CMGEv8i16
344U, // CMGEv8i16rz
1188008U, // CMGEv8i8
352U, // CMGEv8i8rz
794768U, // CMGTv16i8
296U, // CMGTv16i8rz
3160U, // CMGTv1i64
304U, // CMGTv1i64rz
925848U, // CMGTv2i32
312U, // CMGTv2i32rz
270440U, // CMGTv2i64
320U, // CMGTv2i64rz
1056928U, // CMGTv4i16
328U, // CMGTv4i16rz
401520U, // CMGTv4i32
336U, // CMGTv4i32rz
532600U, // CMGTv8i16
344U, // CMGTv8i16rz
1188008U, // CMGTv8i8
352U, // CMGTv8i8rz
794768U, // CMHIv16i8
3160U, // CMHIv1i64
925848U, // CMHIv2i32
270440U, // CMHIv2i64
1056928U, // CMHIv4i16
401520U, // CMHIv4i32
532600U, // CMHIv8i16
1188008U, // CMHIv8i8
794768U, // CMHSv16i8
3160U, // CMHSv1i64
925848U, // CMHSv2i32
270440U, // CMHSv2i64
1056928U, // CMHSv4i16
401520U, // CMHSv4i32
532600U, // CMHSv8i16
1188008U, // CMHSv8i8
184721640U, // CMLA_ZZZI_H
170395736U, // CMLA_ZZZI_S
3288073U, // CMLA_ZZZ_B
201458776U, // CMLA_ZZZ_D
3288296U, // CMLA_ZZZ_H
201459800U, // CMLA_ZZZ_S
296U, // CMLEv16i8rz
304U, // CMLEv1i64rz
312U, // CMLEv2i32rz
320U, // CMLEv2i64rz
328U, // CMLEv4i16rz
336U, // CMLEv4i32rz
344U, // CMLEv8i16rz
352U, // CMLEv8i8rz
296U, // CMLTv16i8rz
304U, // CMLTv1i64rz
312U, // CMLTv2i32rz
320U, // CMLTv2i64rz
328U, // CMLTv4i16rz
336U, // CMLTv4i32rz
344U, // CMLTv8i16rz
352U, // CMLTv8i8rz
141528U, // CMPEQ_PPzZI_B
137432U, // CMPEQ_PPzZI_D
52309129U, // CMPEQ_PPzZI_H
143576U, // CMPEQ_PPzZI_S
16918744U, // CMPEQ_PPzZZ_B
33691864U, // CMPEQ_PPzZZ_D
50998409U, // CMPEQ_PPzZZ_H
67252440U, // CMPEQ_PPzZZ_S
33695960U, // CMPEQ_WIDE_PPzZZ_B
2108553U, // CMPEQ_WIDE_PPzZZ_H
33698008U, // CMPEQ_WIDE_PPzZZ_S
141528U, // CMPGE_PPzZI_B
137432U, // CMPGE_PPzZI_D
52309129U, // CMPGE_PPzZI_H
143576U, // CMPGE_PPzZI_S
16918744U, // CMPGE_PPzZZ_B
33691864U, // CMPGE_PPzZZ_D
50998409U, // CMPGE_PPzZZ_H
67252440U, // CMPGE_PPzZZ_S
33695960U, // CMPGE_WIDE_PPzZZ_B
2108553U, // CMPGE_WIDE_PPzZZ_H
33698008U, // CMPGE_WIDE_PPzZZ_S
141528U, // CMPGT_PPzZI_B
137432U, // CMPGT_PPzZI_D
52309129U, // CMPGT_PPzZI_H
143576U, // CMPGT_PPzZI_S
16918744U, // CMPGT_PPzZZ_B
33691864U, // CMPGT_PPzZZ_D
50998409U, // CMPGT_PPzZZ_H
67252440U, // CMPGT_PPzZZ_S
33695960U, // CMPGT_WIDE_PPzZZ_B
2108553U, // CMPGT_WIDE_PPzZZ_H
33698008U, // CMPGT_WIDE_PPzZZ_S
235022552U, // CMPHI_PPzZI_B
235018456U, // CMPHI_PPzZI_D
3419273U, // CMPHI_PPzZI_H
235024600U, // CMPHI_PPzZI_S
16918744U, // CMPHI_PPzZZ_B
33691864U, // CMPHI_PPzZZ_D
50998409U, // CMPHI_PPzZZ_H
67252440U, // CMPHI_PPzZZ_S
33695960U, // CMPHI_WIDE_PPzZZ_B
2108553U, // CMPHI_WIDE_PPzZZ_H
33698008U, // CMPHI_WIDE_PPzZZ_S
235022552U, // CMPHS_PPzZI_B
235018456U, // CMPHS_PPzZI_D
3419273U, // CMPHS_PPzZI_H
235024600U, // CMPHS_PPzZI_S
16918744U, // CMPHS_PPzZZ_B
33691864U, // CMPHS_PPzZZ_D
50998409U, // CMPHS_PPzZZ_H
67252440U, // CMPHS_PPzZZ_S
33695960U, // CMPHS_WIDE_PPzZZ_B
2108553U, // CMPHS_WIDE_PPzZZ_H
33698008U, // CMPHS_WIDE_PPzZZ_S
141528U, // CMPLE_PPzZI_B
137432U, // CMPLE_PPzZI_D
52309129U, // CMPLE_PPzZI_H
143576U, // CMPLE_PPzZI_S
33695960U, // CMPLE_WIDE_PPzZZ_B
2108553U, // CMPLE_WIDE_PPzZZ_H
33698008U, // CMPLE_WIDE_PPzZZ_S
235022552U, // CMPLO_PPzZI_B
235018456U, // CMPLO_PPzZI_D
3419273U, // CMPLO_PPzZI_H
235024600U, // CMPLO_PPzZI_S
33695960U, // CMPLO_WIDE_PPzZZ_B
2108553U, // CMPLO_WIDE_PPzZZ_H
33698008U, // CMPLO_WIDE_PPzZZ_S
235022552U, // CMPLS_PPzZI_B
235018456U, // CMPLS_PPzZI_D
3419273U, // CMPLS_PPzZI_H
235024600U, // CMPLS_PPzZI_S
33695960U, // CMPLS_WIDE_PPzZZ_B
2108553U, // CMPLS_WIDE_PPzZZ_H
33698008U, // CMPLS_WIDE_PPzZZ_S
141528U, // CMPLT_PPzZI_B
137432U, // CMPLT_PPzZI_D
52309129U, // CMPLT_PPzZI_H
143576U, // CMPLT_PPzZI_S
33695960U, // CMPLT_WIDE_PPzZZ_B
2108553U, // CMPLT_WIDE_PPzZZ_H
33698008U, // CMPLT_WIDE_PPzZZ_S
141528U, // CMPNE_PPzZI_B
137432U, // CMPNE_PPzZI_D
52309129U, // CMPNE_PPzZI_H
143576U, // CMPNE_PPzZI_S
16918744U, // CMPNE_PPzZZ_B
33691864U, // CMPNE_PPzZZ_D
50998409U, // CMPNE_PPzZZ_H
67252440U, // CMPNE_PPzZZ_S
33695960U, // CMPNE_WIDE_PPzZZ_B
2108553U, // CMPNE_WIDE_PPzZZ_H
33698008U, // CMPNE_WIDE_PPzZZ_S
794768U, // CMTSTv16i8
3160U, // CMTSTv1i64
925848U, // CMTSTv2i32
270440U, // CMTSTv2i64
1056928U, // CMTSTv4i16
401520U, // CMTSTv4i32
532600U, // CMTSTv8i16
1188008U, // CMTSTv8i8
8U, // CNOT_ZPmZ_B
16U, // CNOT_ZPmZ_D
0U, // CNOT_ZPmZ_H
24U, // CNOT_ZPmZ_S
361U, // CNTB_XPiI
361U, // CNTD_XPiI
361U, // CNTH_XPiI
1U, // CNTP_XCI_B
1U, // CNTP_XCI_D
1U, // CNTP_XCI_H
1U, // CNTP_XCI_S
10328U, // CNTP_XPP_B
6232U, // CNTP_XPP_D
5208U, // CNTP_XPP_H
12376U, // CNTP_XPP_S
361U, // CNTW_XPiI
0U, // CNTWr
0U, // CNTXr
8U, // CNT_ZPmZ_B
16U, // CNT_ZPmZ_D
0U, // CNT_ZPmZ_H
24U, // CNT_ZPmZ_S
32U, // CNTv16i8
80U, // CNTv8i8
6232U, // COMPACT_ZPZ_D
12376U, // COMPACT_ZPZ_S
0U, // CPYE
0U, // CPYEN
0U, // CPYERN
0U, // CPYERT
0U, // CPYERTN
0U, // CPYERTRN
0U, // CPYERTWN
0U, // CPYET
0U, // CPYETN
0U, // CPYETRN
0U, // CPYETWN
0U, // CPYEWN
0U, // CPYEWT
0U, // CPYEWTN
0U, // CPYEWTRN
0U, // CPYEWTWN
0U, // CPYFE
0U, // CPYFEN
0U, // CPYFERN
0U, // CPYFERT
0U, // CPYFERTN
0U, // CPYFERTRN
0U, // CPYFERTWN
0U, // CPYFET
0U, // CPYFETN
0U, // CPYFETRN
0U, // CPYFETWN
0U, // CPYFEWN
0U, // CPYFEWT
0U, // CPYFEWTN
0U, // CPYFEWTRN
0U, // CPYFEWTWN
0U, // CPYFM
0U, // CPYFMN
0U, // CPYFMRN
0U, // CPYFMRT
0U, // CPYFMRTN
0U, // CPYFMRTRN
0U, // CPYFMRTWN
0U, // CPYFMT
0U, // CPYFMTN
0U, // CPYFMTRN
0U, // CPYFMTWN
0U, // CPYFMWN
0U, // CPYFMWT
0U, // CPYFMWTN
0U, // CPYFMWTRN
0U, // CPYFMWTWN
0U, // CPYFP
0U, // CPYFPN
0U, // CPYFPRN
0U, // CPYFPRT
0U, // CPYFPRTN
0U, // CPYFPRTRN
0U, // CPYFPRTWN
0U, // CPYFPT
0U, // CPYFPTN
0U, // CPYFPTRN
0U, // CPYFPTWN
0U, // CPYFPWN
0U, // CPYFPWT
0U, // CPYFPWTN
0U, // CPYFPWTRN
0U, // CPYFPWTWN
0U, // CPYM
0U, // CPYMN
0U, // CPYMRN
0U, // CPYMRT
0U, // CPYMRTN
0U, // CPYMRTRN
0U, // CPYMRTWN
0U, // CPYMT
0U, // CPYMTN
0U, // CPYMTRN
0U, // CPYMTWN
0U, // CPYMWN
0U, // CPYMWT
0U, // CPYMWTN
0U, // CPYMWTRN
0U, // CPYMWTWN
0U, // CPYP
0U, // CPYPN
0U, // CPYPRN
0U, // CPYPRT
0U, // CPYPRTN
0U, // CPYPRTRN
0U, // CPYPRTWN
0U, // CPYPT
0U, // CPYPTN
0U, // CPYPTRN
0U, // CPYPTWN
0U, // CPYPWN
0U, // CPYPWT
0U, // CPYPWTN
0U, // CPYPWTRN
0U, // CPYPWTWN
368U, // CPY_ZPmI_B
376U, // CPY_ZPmI_D
1U, // CPY_ZPmI_H
384U, // CPY_ZPmI_S
392U, // CPY_ZPmR_B
392U, // CPY_ZPmR_D
2U, // CPY_ZPmR_H
392U, // CPY_ZPmR_S
392U, // CPY_ZPmV_B
392U, // CPY_ZPmV_D
2U, // CPY_ZPmV_H
392U, // CPY_ZPmV_S
44248U, // CPY_ZPzI_B
45272U, // CPY_ZPzI_D
401U, // CPY_ZPzI_H
46296U, // CPY_ZPzI_S
3160U, // CRC32Brr
3160U, // CRC32CBrr
3160U, // CRC32CHrr
3160U, // CRC32CWrr
3160U, // CRC32CXrr
3160U, // CRC32Hrr
3160U, // CRC32Wrr
3160U, // CRC32Xrr
151129176U, // CSELWr
151129176U, // CSELXr
151129176U, // CSINCWr
151129176U, // CSINCXr
151129176U, // CSINVWr
151129176U, // CSINVXr
151129176U, // CSNEGWr
151129176U, // CSNEGXr
0U, // CTERMEQ_WW
0U, // CTERMEQ_XX
0U, // CTERMNE_WW
0U, // CTERMNE_XX
0U, // CTZWr
0U, // CTZXr
0U, // DCPS1
0U, // DCPS2
0U, // DCPS3
2U, // DECB_XPiI
2U, // DECD_XPiI
2U, // DECD_ZPiI
2U, // DECH_XPiI
0U, // DECH_ZPiI
1U, // DECP_XP_B
0U, // DECP_XP_D
0U, // DECP_XP_H
1U, // DECP_XP_S
0U, // DECP_ZP_D
0U, // DECP_ZP_H
0U, // DECP_ZP_S
2U, // DECW_XPiI
2U, // DECW_ZPiI
0U, // DMB
0U, // DRPS
0U, // DSB
0U, // DSBnXS
2U, // DUPM_ZI
409U, // DUPQ_ZZI_B
408U, // DUPQ_ZZI_D
2U, // DUPQ_ZZI_H
409U, // DUPQ_ZZI_S
2U, // DUP_ZI_B
2U, // DUP_ZI_D
0U, // DUP_ZI_H
2U, // DUP_ZI_S
0U, // DUP_ZR_B
0U, // DUP_ZR_D
0U, // DUP_ZR_H
0U, // DUP_ZR_S
409U, // DUP_ZZI_B
408U, // DUP_ZZI_D
2U, // DUP_ZZI_H
2U, // DUP_ZZI_Q
409U, // DUP_ZZI_S
47520U, // DUPi16
47528U, // DUPi32
47536U, // DUPi64
47544U, // DUPi8
0U, // DUPv16i8gpr
47544U, // DUPv16i8lane
0U, // DUPv2i32gpr
47528U, // DUPv2i32lane
0U, // DUPv2i64gpr
47536U, // DUPv2i64lane
0U, // DUPv4i16gpr
47520U, // DUPv4i16lane
0U, // DUPv4i32gpr
47528U, // DUPv4i32lane
0U, // DUPv8i16gpr
47520U, // DUPv8i16lane
0U, // DUPv8i8gpr
47544U, // DUPv8i8lane
14424U, // EONWrs
14424U, // EONXrs
86122640U, // EOR3
33691736U, // EOR3_ZZZZ
9U, // EORBT_ZZZ_B
1112U, // EORBT_ZZZ_D
232U, // EORBT_ZZZ_H
2136U, // EORBT_ZZZ_S
10328U, // EORQV_VPZ_B
6232U, // EORQV_VPZ_D
5208U, // EORQV_VPZ_H
12376U, // EORQV_VPZ_S
16918744U, // EORS_PPzPP
9U, // EORTB_ZZZ_B
1112U, // EORTB_ZZZ_D
232U, // EORTB_ZZZ_H
2136U, // EORTB_ZZZ_S
0U, // EORV_VPZ_B
0U, // EORV_VPZ_D
0U, // EORV_VPZ_H
0U, // EORV_VPZ_S
35928U, // EORWri
14424U, // EORWrs
36952U, // EORXri
14424U, // EORXrs
16918744U, // EOR_PPzPP
36952U, // EOR_ZI
16918656U, // EOR_ZPmZ_B
33691776U, // EOR_ZPmZ_D
50998408U, // EOR_ZPmZ_H
67252352U, // EOR_ZPmZ_S
6232U, // EOR_ZZZ
794768U, // EORv16i8
1188008U, // EORv8i8
0U, // ERET
0U, // ERETAA
0U, // ERETAB
141401U, // EXTQ_ZZI
448U, // EXTRACT_ZPMXI_H_B
448U, // EXTRACT_ZPMXI_H_D
2U, // EXTRACT_ZPMXI_H_H
2U, // EXTRACT_ZPMXI_H_Q
448U, // EXTRACT_ZPMXI_H_S
456U, // EXTRACT_ZPMXI_V_B
456U, // EXTRACT_ZPMXI_V_D
2U, // EXTRACT_ZPMXI_V_H
2U, // EXTRACT_ZPMXI_V_Q
456U, // EXTRACT_ZPMXI_V_S
134232U, // EXTRWrri
134232U, // EXTRXrri
235022425U, // EXT_ZZI
466U, // EXT_ZZI_B
2236560U, // EXTv16i8
3547304U, // EXTv8i8
3160U, // FABD16
3160U, // FABD32
3160U, // FABD64
33691776U, // FABD_ZPmZ_D
50998408U, // FABD_ZPmZ_H
67252352U, // FABD_ZPmZ_S
925848U, // FABDv2f32
270440U, // FABDv2f64
1056928U, // FABDv4f16
401520U, // FABDv4f32
532600U, // FABDv8f16
0U, // FABSDr
0U, // FABSHr
0U, // FABSSr
16U, // FABS_ZPmZ_D
0U, // FABS_ZPmZ_H
24U, // FABS_ZPmZ_S
40U, // FABSv2f32
48U, // FABSv2f64
56U, // FABSv4f16
64U, // FABSv4f32
72U, // FABSv8f16
3160U, // FACGE16
3160U, // FACGE32
3160U, // FACGE64
33691864U, // FACGE_PPzZZ_D
50998409U, // FACGE_PPzZZ_H
67252440U, // FACGE_PPzZZ_S
925848U, // FACGEv2f32
270440U, // FACGEv2f64
1056928U, // FACGEv4f16
401520U, // FACGEv4f32
532600U, // FACGEv8f16
3160U, // FACGT16
3160U, // FACGT32
3160U, // FACGT64
33691864U, // FACGT_PPzZZ_D
50998409U, // FACGT_PPzZZ_H
67252440U, // FACGT_PPzZZ_S
925848U, // FACGTv2f32
270440U, // FACGTv2f64
1056928U, // FACGTv4f16
401520U, // FACGTv4f32
532600U, // FACGTv8f16
0U, // FADDA_VPZ_D
232U, // FADDA_VPZ_H
0U, // FADDA_VPZ_S
3160U, // FADDDrr
3160U, // FADDHrr
33691776U, // FADDP_ZPmZZ_D
50998408U, // FADDP_ZPmZZ_H
67252352U, // FADDP_ZPmZZ_S
925848U, // FADDPv2f32
270440U, // FADDPv2f64
472U, // FADDPv2i16p
40U, // FADDPv2i32p
48U, // FADDPv2i64p
1056928U, // FADDPv4f16
401520U, // FADDPv4f32
532600U, // FADDPv8f16
6232U, // FADDQV_D
5208U, // FADDQV_H
12376U, // FADDQV_S
3160U, // FADDSrr
0U, // FADDV_VPZ_D
0U, // FADDV_VPZ_H
0U, // FADDV_VPZ_S
192U, // FADD_VG2_M2Z_D
0U, // FADD_VG2_M2Z_H
200U, // FADD_VG2_M2Z_S
192U, // FADD_VG4_M4Z_D
0U, // FADD_VG4_M4Z_H
200U, // FADD_VG4_M4Z_S
251795584U, // FADD_ZPmI_D
3681416U, // FADD_ZPmI_H
251801728U, // FADD_ZPmI_S
33691776U, // FADD_ZPmZ_D
50998408U, // FADD_ZPmZ_H
67252352U, // FADD_ZPmZ_S
6232U, // FADD_ZZZ_D
136U, // FADD_ZZZ_H
12377U, // FADD_ZZZ_S
925848U, // FADDv2f32
270440U, // FADDv2f64
1056928U, // FADDv4f16
401520U, // FADDv4f32
532600U, // FADDv8f16
33691776U, // FCADD_ZPmZ_D
168438920U, // FCADD_ZPmZ_H
67252352U, // FCADD_ZPmZ_S
138027160U, // FCADDv2f32
138158184U, // FCADDv2f64
138289312U, // FCADDv4f16
138420336U, // FCADDv4f32
138551416U, // FCADDv8f16
151129176U, // FCCMPDrr
151129176U, // FCCMPEDrr
151129176U, // FCCMPEHrr
151129176U, // FCCMPESrr
151129176U, // FCCMPHrr
151129176U, // FCCMPSrr
16U, // FCLAMP_VG2_2Z2Z_D
232U, // FCLAMP_VG2_2Z2Z_H
24U, // FCLAMP_VG2_2Z2Z_S
16U, // FCLAMP_VG4_4Z4Z_D
232U, // FCLAMP_VG4_4Z4Z_H
24U, // FCLAMP_VG4_4Z4Z_S
1112U, // FCLAMP_ZZZ_D
232U, // FCLAMP_ZZZ_H
2136U, // FCLAMP_ZZZ_S
3160U, // FCMEQ16
3160U, // FCMEQ32
3160U, // FCMEQ64
4462808U, // FCMEQ_PPzZ0_D
48265U, // FCMEQ_PPzZ0_H
4468952U, // FCMEQ_PPzZ0_S
33691864U, // FCMEQ_PPzZZ_D
50998409U, // FCMEQ_PPzZZ_H
67252440U, // FCMEQ_PPzZZ_S
480U, // FCMEQv1i16rz
480U, // FCMEQv1i32rz
480U, // FCMEQv1i64rz
925848U, // FCMEQv2f32
270440U, // FCMEQv2f64
488U, // FCMEQv2i32rz
496U, // FCMEQv2i64rz
1056928U, // FCMEQv4f16
401520U, // FCMEQv4f32
504U, // FCMEQv4i16rz
512U, // FCMEQv4i32rz
532600U, // FCMEQv8f16
520U, // FCMEQv8i16rz
3160U, // FCMGE16
3160U, // FCMGE32
3160U, // FCMGE64
4462808U, // FCMGE_PPzZ0_D
48265U, // FCMGE_PPzZ0_H
4468952U, // FCMGE_PPzZ0_S
33691864U, // FCMGE_PPzZZ_D
50998409U, // FCMGE_PPzZZ_H
67252440U, // FCMGE_PPzZZ_S
480U, // FCMGEv1i16rz
480U, // FCMGEv1i32rz
480U, // FCMGEv1i64rz
925848U, // FCMGEv2f32
270440U, // FCMGEv2f64
488U, // FCMGEv2i32rz
496U, // FCMGEv2i64rz
1056928U, // FCMGEv4f16
401520U, // FCMGEv4f32
504U, // FCMGEv4i16rz
512U, // FCMGEv4i32rz
532600U, // FCMGEv8f16
520U, // FCMGEv8i16rz
3160U, // FCMGT16
3160U, // FCMGT32
3160U, // FCMGT64
4462808U, // FCMGT_PPzZ0_D
48265U, // FCMGT_PPzZ0_H
4468952U, // FCMGT_PPzZ0_S
33691864U, // FCMGT_PPzZZ_D
50998409U, // FCMGT_PPzZZ_H
67252440U, // FCMGT_PPzZZ_S
480U, // FCMGTv1i16rz
480U, // FCMGTv1i32rz
480U, // FCMGTv1i64rz
925848U, // FCMGTv2f32
270440U, // FCMGTv2f64
488U, // FCMGTv2i32rz
496U, // FCMGTv2i64rz
1056928U, // FCMGTv4f16
401520U, // FCMGTv4f32
504U, // FCMGTv4i16rz
512U, // FCMGTv4i32rz
532600U, // FCMGTv8f16
520U, // FCMGTv8i16rz
268567680U, // FCMLA_ZPmZZ_D
170667240U, // FCMLA_ZPmZZ_H
285345920U, // FCMLA_ZPmZZ_S
184721640U, // FCMLA_ZZZI_H
170395736U, // FCMLA_ZZZI_S
205137048U, // FCMLAv2f32
205268072U, // FCMLAv2f64
205399200U, // FCMLAv4f16
103425184U, // FCMLAv4f16_indexed
205530224U, // FCMLAv4f32
105260144U, // FCMLAv4f32_indexed
205661304U, // FCMLAv8f16
103425144U, // FCMLAv8f16_indexed
4462808U, // FCMLE_PPzZ0_D
48265U, // FCMLE_PPzZ0_H
4468952U, // FCMLE_PPzZ0_S
480U, // FCMLEv1i16rz
480U, // FCMLEv1i32rz
480U, // FCMLEv1i64rz
488U, // FCMLEv2i32rz
496U, // FCMLEv2i64rz
504U, // FCMLEv4i16rz
512U, // FCMLEv4i32rz
520U, // FCMLEv8i16rz
4462808U, // FCMLT_PPzZ0_D
48265U, // FCMLT_PPzZ0_H
4468952U, // FCMLT_PPzZ0_S
480U, // FCMLTv1i16rz
480U, // FCMLTv1i32rz
480U, // FCMLTv1i64rz
488U, // FCMLTv2i32rz
496U, // FCMLTv2i64rz
504U, // FCMLTv4i16rz
512U, // FCMLTv4i32rz
520U, // FCMLTv8i16rz
4462808U, // FCMNE_PPzZ0_D
48265U, // FCMNE_PPzZ0_H
4468952U, // FCMNE_PPzZ0_S
33691864U, // FCMNE_PPzZZ_D
50998409U, // FCMNE_PPzZZ_H
67252440U, // FCMNE_PPzZZ_S
0U, // FCMPDri
0U, // FCMPDrr
0U, // FCMPEDri
0U, // FCMPEDrr
0U, // FCMPEHri
0U, // FCMPEHrr
0U, // FCMPESri
0U, // FCMPESrr
0U, // FCMPHri
0U, // FCMPHrr
0U, // FCMPSri
0U, // FCMPSrr
33691864U, // FCMUO_PPzZZ_D
50998409U, // FCMUO_PPzZZ_H
67252440U, // FCMUO_PPzZZ_S
528U, // FCPY_ZPmI_D
2U, // FCPY_ZPmI_H
528U, // FCPY_ZPmI_S
151129176U, // FCSELDrrr
151129176U, // FCSELHrrr
151129176U, // FCSELSrrr
0U, // FCVTASUWDr
0U, // FCVTASUWHr
0U, // FCVTASUWSr
0U, // FCVTASUXDr
0U, // FCVTASUXHr
0U, // FCVTASUXSr
0U, // FCVTASv1f16
0U, // FCVTASv1i32
0U, // FCVTASv1i64
40U, // FCVTASv2f32
48U, // FCVTASv2f64
56U, // FCVTASv4f16
64U, // FCVTASv4f32
72U, // FCVTASv8f16
0U, // FCVTAUUWDr
0U, // FCVTAUUWHr
0U, // FCVTAUUWSr
0U, // FCVTAUUXDr
0U, // FCVTAUUXHr
0U, // FCVTAUUXSr
0U, // FCVTAUv1f16
0U, // FCVTAUv1i32
0U, // FCVTAUv1i64
40U, // FCVTAUv2f32
48U, // FCVTAUv2f64
56U, // FCVTAUv4f16
64U, // FCVTAUv4f32
72U, // FCVTAUv8f16
0U, // FCVTDHr
0U, // FCVTDSr
0U, // FCVTHDr
0U, // FCVTHSr
232U, // FCVTLT_ZPmZ_HtoS
24U, // FCVTLT_ZPmZ_StoD
0U, // FCVTL_2ZZ_H_S
40U, // FCVTLv2i32
56U, // FCVTLv4i16
64U, // FCVTLv4i32
72U, // FCVTLv8i16
0U, // FCVTMSUWDr
0U, // FCVTMSUWHr
0U, // FCVTMSUWSr
0U, // FCVTMSUXDr
0U, // FCVTMSUXHr
0U, // FCVTMSUXSr
0U, // FCVTMSv1f16
0U, // FCVTMSv1i32
0U, // FCVTMSv1i64
40U, // FCVTMSv2f32
48U, // FCVTMSv2f64
56U, // FCVTMSv4f16
64U, // FCVTMSv4f32
72U, // FCVTMSv8f16
0U, // FCVTMUUWDr
0U, // FCVTMUUWHr
0U, // FCVTMUUWSr
0U, // FCVTMUUXDr
0U, // FCVTMUUXHr
0U, // FCVTMUUXSr
0U, // FCVTMUv1f16
0U, // FCVTMUv1i32
0U, // FCVTMUv1i64
40U, // FCVTMUv2f32
48U, // FCVTMUv2f64
56U, // FCVTMUv4f16
64U, // FCVTMUv4f32
72U, // FCVTMUv8f16
0U, // FCVTNSUWDr
0U, // FCVTNSUWHr
0U, // FCVTNSUWSr
0U, // FCVTNSUXDr
0U, // FCVTNSUXHr
0U, // FCVTNSUXSr
0U, // FCVTNSv1f16
0U, // FCVTNSv1i32
0U, // FCVTNSv1i64
40U, // FCVTNSv2f32
48U, // FCVTNSv2f64
56U, // FCVTNSv4f16
64U, // FCVTNSv4f32
72U, // FCVTNSv8f16
16U, // FCVTNT_ZPmZ_DtoS
1U, // FCVTNT_ZPmZ_StoH
0U, // FCVTNUUWDr
0U, // FCVTNUUWHr
0U, // FCVTNUUWSr
0U, // FCVTNUUXDr
0U, // FCVTNUUXHr
0U, // FCVTNUUXSr
0U, // FCVTNUv1f16
0U, // FCVTNUv1i32
0U, // FCVTNUv1i64
40U, // FCVTNUv2f32
48U, // FCVTNUv2f64
56U, // FCVTNUv4f16
64U, // FCVTNUv4f32
72U, // FCVTNUv8f16
0U, // FCVTN_Z2Z_StoH
48U, // FCVTNv2i32
64U, // FCVTNv4i16
48U, // FCVTNv4i32
64U, // FCVTNv8i16
0U, // FCVTPSUWDr
0U, // FCVTPSUWHr
0U, // FCVTPSUWSr
0U, // FCVTPSUXDr
0U, // FCVTPSUXHr
0U, // FCVTPSUXSr
0U, // FCVTPSv1f16
0U, // FCVTPSv1i32
0U, // FCVTPSv1i64
40U, // FCVTPSv2f32
48U, // FCVTPSv2f64
56U, // FCVTPSv4f16
64U, // FCVTPSv4f32
72U, // FCVTPSv8f16
0U, // FCVTPUUWDr
0U, // FCVTPUUWHr
0U, // FCVTPUUWSr
0U, // FCVTPUUXDr
0U, // FCVTPUUXHr
0U, // FCVTPUUXSr
0U, // FCVTPUv1f16
0U, // FCVTPUv1i32
0U, // FCVTPUv1i64
40U, // FCVTPUv2f32
48U, // FCVTPUv2f64
56U, // FCVTPUv4f16
64U, // FCVTPUv4f32
72U, // FCVTPUv8f16
0U, // FCVTSDr
0U, // FCVTSHr
16U, // FCVTXNT_ZPmZ_DtoS
0U, // FCVTXNv1i64
48U, // FCVTXNv2f32
48U, // FCVTXNv4f32
16U, // FCVTX_ZPmZ_DtoS
3160U, // FCVTZSSWDri
3160U, // FCVTZSSWHri
3160U, // FCVTZSSWSri
3160U, // FCVTZSSXDri
3160U, // FCVTZSSXHri
3160U, // FCVTZSSXSri
0U, // FCVTZSUWDr
0U, // FCVTZSUWHr
0U, // FCVTZSUWSr
0U, // FCVTZSUXDr
0U, // FCVTZSUXHr
0U, // FCVTZSUXSr
0U, // FCVTZS_2Z2Z_StoS
0U, // FCVTZS_4Z4Z_StoS
16U, // FCVTZS_ZPmZ_DtoD
16U, // FCVTZS_ZPmZ_DtoS
232U, // FCVTZS_ZPmZ_HtoD
0U, // FCVTZS_ZPmZ_HtoH
232U, // FCVTZS_ZPmZ_HtoS
24U, // FCVTZS_ZPmZ_StoD
24U, // FCVTZS_ZPmZ_StoS
3160U, // FCVTZSd
3160U, // FCVTZSh
3160U, // FCVTZSs
0U, // FCVTZSv1f16
0U, // FCVTZSv1i32
0U, // FCVTZSv1i64
40U, // FCVTZSv2f32
48U, // FCVTZSv2f64
3224U, // FCVTZSv2i32_shift
3176U, // FCVTZSv2i64_shift
56U, // FCVTZSv4f16
64U, // FCVTZSv4f32
3232U, // FCVTZSv4i16_shift
3184U, // FCVTZSv4i32_shift
72U, // FCVTZSv8f16
3192U, // FCVTZSv8i16_shift
3160U, // FCVTZUSWDri
3160U, // FCVTZUSWHri
3160U, // FCVTZUSWSri
3160U, // FCVTZUSXDri
3160U, // FCVTZUSXHri
3160U, // FCVTZUSXSri
0U, // FCVTZUUWDr
0U, // FCVTZUUWHr
0U, // FCVTZUUWSr
0U, // FCVTZUUXDr
0U, // FCVTZUUXHr
0U, // FCVTZUUXSr
0U, // FCVTZU_2Z2Z_StoS
0U, // FCVTZU_4Z4Z_StoS
16U, // FCVTZU_ZPmZ_DtoD
16U, // FCVTZU_ZPmZ_DtoS
232U, // FCVTZU_ZPmZ_HtoD
0U, // FCVTZU_ZPmZ_HtoH
232U, // FCVTZU_ZPmZ_HtoS
24U, // FCVTZU_ZPmZ_StoD
24U, // FCVTZU_ZPmZ_StoS
3160U, // FCVTZUd
3160U, // FCVTZUh
3160U, // FCVTZUs
0U, // FCVTZUv1f16
0U, // FCVTZUv1i32
0U, // FCVTZUv1i64
40U, // FCVTZUv2f32
48U, // FCVTZUv2f64
3224U, // FCVTZUv2i32_shift
3176U, // FCVTZUv2i64_shift
56U, // FCVTZUv4f16
64U, // FCVTZUv4f32
3232U, // FCVTZUv4i16_shift
3184U, // FCVTZUv4i32_shift
72U, // FCVTZUv8f16
3192U, // FCVTZUv8i16_shift
0U, // FCVT_2ZZ_H_S
0U, // FCVT_Z2Z_StoH
2U, // FCVT_ZPmZ_DtoH
16U, // FCVT_ZPmZ_DtoS
232U, // FCVT_ZPmZ_HtoD
232U, // FCVT_ZPmZ_HtoS
24U, // FCVT_ZPmZ_StoD
1U, // FCVT_ZPmZ_StoH
3160U, // FDIVDrr
3160U, // FDIVHrr
33691776U, // FDIVR_ZPmZ_D
50998408U, // FDIVR_ZPmZ_H
67252352U, // FDIVR_ZPmZ_S
3160U, // FDIVSrr
33691776U, // FDIV_ZPmZ_D
50998408U, // FDIV_ZPmZ_H
67252352U, // FDIV_ZPmZ_S
925848U, // FDIVv2f32
270440U, // FDIVv2f64
1056928U, // FDIVv4f16
401520U, // FDIVv4f32
532600U, // FDIVv8f16
38128U, // FDOT_VG2_M2Z2Z_HtoS
2529520U, // FDOT_VG2_M2ZZI_HtoS
39152U, // FDOT_VG2_M2ZZ_HtoS
38128U, // FDOT_VG4_M4Z4Z_HtoS
2529520U, // FDOT_VG4_M4ZZI_HtoS
39152U, // FDOT_VG4_M4ZZ_HtoS
52960344U, // FDOT_ZZZI_S
7256U, // FDOT_ZZZ_S
2U, // FDUP_ZI_D
0U, // FDUP_ZI_H
2U, // FDUP_ZI_S
0U, // FEXPA_ZZ_D
0U, // FEXPA_ZZ_H
1U, // FEXPA_ZZ_S
0U, // FJCVTZS
16U, // FLOGB_ZPmZ_D
0U, // FLOGB_ZPmZ_H
24U, // FLOGB_ZPmZ_S
134232U, // FMADDDrrr
134232U, // FMADDHrrr
134232U, // FMADDSrrr
268567680U, // FMAD_ZPmZZ_D
53226728U, // FMAD_ZPmZZ_H
285345920U, // FMAD_ZPmZZ_S
3160U, // FMAXDrr
3160U, // FMAXHrr
3160U, // FMAXNMDrr
3160U, // FMAXNMHrr
33691776U, // FMAXNMP_ZPmZZ_D
50998408U, // FMAXNMP_ZPmZZ_H
67252352U, // FMAXNMP_ZPmZZ_S
925848U, // FMAXNMPv2f32
270440U, // FMAXNMPv2f64
472U, // FMAXNMPv2i16p
40U, // FMAXNMPv2i32p
48U, // FMAXNMPv2i64p
1056928U, // FMAXNMPv4f16
401520U, // FMAXNMPv4f32
532600U, // FMAXNMPv8f16
6232U, // FMAXNMQV_D
5208U, // FMAXNMQV_H
12376U, // FMAXNMQV_S
3160U, // FMAXNMSrr
0U, // FMAXNMV_VPZ_D
0U, // FMAXNMV_VPZ_H
0U, // FMAXNMV_VPZ_S
56U, // FMAXNMVv4i16v
64U, // FMAXNMVv4i32v
72U, // FMAXNMVv8i16v
536U, // FMAXNM_VG2_2Z2Z_D
248U, // FMAXNM_VG2_2Z2Z_H
544U, // FMAXNM_VG2_2Z2Z_S
184U, // FMAXNM_VG2_2ZZ_D
136U, // FMAXNM_VG2_2ZZ_H
96U, // FMAXNM_VG2_2ZZ_S
536U, // FMAXNM_VG4_4Z4Z_D
248U, // FMAXNM_VG4_4Z4Z_H
544U, // FMAXNM_VG4_4Z4Z_S
184U, // FMAXNM_VG4_4ZZ_D
136U, // FMAXNM_VG4_4ZZ_H
96U, // FMAXNM_VG4_4ZZ_S
302127232U, // FMAXNM_ZPmI_D
4729992U, // FMAXNM_ZPmI_H
302133376U, // FMAXNM_ZPmI_S
33691776U, // FMAXNM_ZPmZ_D
50998408U, // FMAXNM_ZPmZ_H
67252352U, // FMAXNM_ZPmZ_S
925848U, // FMAXNMv2f32
270440U, // FMAXNMv2f64
1056928U, // FMAXNMv4f16
401520U, // FMAXNMv4f32
532600U, // FMAXNMv8f16
33691776U, // FMAXP_ZPmZZ_D
50998408U, // FMAXP_ZPmZZ_H
67252352U, // FMAXP_ZPmZZ_S
925848U, // FMAXPv2f32
270440U, // FMAXPv2f64
472U, // FMAXPv2i16p
40U, // FMAXPv2i32p
48U, // FMAXPv2i64p
1056928U, // FMAXPv4f16
401520U, // FMAXPv4f32
532600U, // FMAXPv8f16
6232U, // FMAXQV_D
5208U, // FMAXQV_H
12376U, // FMAXQV_S
3160U, // FMAXSrr
0U, // FMAXV_VPZ_D
0U, // FMAXV_VPZ_H
0U, // FMAXV_VPZ_S
56U, // FMAXVv4i16v
64U, // FMAXVv4i32v
72U, // FMAXVv8i16v
536U, // FMAX_VG2_2Z2Z_D
248U, // FMAX_VG2_2Z2Z_H
544U, // FMAX_VG2_2Z2Z_S
184U, // FMAX_VG2_2ZZ_D
136U, // FMAX_VG2_2ZZ_H
96U, // FMAX_VG2_2ZZ_S
536U, // FMAX_VG4_4Z4Z_D
248U, // FMAX_VG4_4Z4Z_H
544U, // FMAX_VG4_4Z4Z_S
184U, // FMAX_VG4_4ZZ_D
136U, // FMAX_VG4_4ZZ_H
96U, // FMAX_VG4_4ZZ_S
302127232U, // FMAX_ZPmI_D
4729992U, // FMAX_ZPmI_H
302133376U, // FMAX_ZPmI_S
33691776U, // FMAX_ZPmZ_D
50998408U, // FMAX_ZPmZ_H
67252352U, // FMAX_ZPmZ_S
925848U, // FMAXv2f32
270440U, // FMAXv2f64
1056928U, // FMAXv4f16
401520U, // FMAXv4f32
532600U, // FMAXv8f16
3160U, // FMINDrr
3160U, // FMINHrr
3160U, // FMINNMDrr
3160U, // FMINNMHrr
33691776U, // FMINNMP_ZPmZZ_D
50998408U, // FMINNMP_ZPmZZ_H
67252352U, // FMINNMP_ZPmZZ_S
925848U, // FMINNMPv2f32
270440U, // FMINNMPv2f64
472U, // FMINNMPv2i16p
40U, // FMINNMPv2i32p
48U, // FMINNMPv2i64p
1056928U, // FMINNMPv4f16
401520U, // FMINNMPv4f32
532600U, // FMINNMPv8f16
6232U, // FMINNMQV_D
5208U, // FMINNMQV_H
12376U, // FMINNMQV_S
3160U, // FMINNMSrr
0U, // FMINNMV_VPZ_D
0U, // FMINNMV_VPZ_H
0U, // FMINNMV_VPZ_S
56U, // FMINNMVv4i16v
64U, // FMINNMVv4i32v
72U, // FMINNMVv8i16v
536U, // FMINNM_VG2_2Z2Z_D
248U, // FMINNM_VG2_2Z2Z_H
544U, // FMINNM_VG2_2Z2Z_S
184U, // FMINNM_VG2_2ZZ_D
136U, // FMINNM_VG2_2ZZ_H
96U, // FMINNM_VG2_2ZZ_S
536U, // FMINNM_VG4_4Z4Z_D
248U, // FMINNM_VG4_4Z4Z_H
544U, // FMINNM_VG4_4Z4Z_S
184U, // FMINNM_VG4_4ZZ_D
136U, // FMINNM_VG4_4ZZ_H
96U, // FMINNM_VG4_4ZZ_S
302127232U, // FMINNM_ZPmI_D
4729992U, // FMINNM_ZPmI_H
302133376U, // FMINNM_ZPmI_S
33691776U, // FMINNM_ZPmZ_D
50998408U, // FMINNM_ZPmZ_H
67252352U, // FMINNM_ZPmZ_S
925848U, // FMINNMv2f32
270440U, // FMINNMv2f64
1056928U, // FMINNMv4f16
401520U, // FMINNMv4f32
532600U, // FMINNMv8f16
33691776U, // FMINP_ZPmZZ_D
50998408U, // FMINP_ZPmZZ_H
67252352U, // FMINP_ZPmZZ_S
925848U, // FMINPv2f32
270440U, // FMINPv2f64
472U, // FMINPv2i16p
40U, // FMINPv2i32p
48U, // FMINPv2i64p
1056928U, // FMINPv4f16
401520U, // FMINPv4f32
532600U, // FMINPv8f16
6232U, // FMINQV_D
5208U, // FMINQV_H
12376U, // FMINQV_S
3160U, // FMINSrr
0U, // FMINV_VPZ_D
0U, // FMINV_VPZ_H
0U, // FMINV_VPZ_S
56U, // FMINVv4i16v
64U, // FMINVv4i32v
72U, // FMINVv8i16v
536U, // FMIN_VG2_2Z2Z_D
248U, // FMIN_VG2_2Z2Z_H
544U, // FMIN_VG2_2Z2Z_S
184U, // FMIN_VG2_2ZZ_D
136U, // FMIN_VG2_2ZZ_H
96U, // FMIN_VG2_2ZZ_S
536U, // FMIN_VG4_4Z4Z_D
248U, // FMIN_VG4_4Z4Z_H
544U, // FMIN_VG4_4Z4Z_S
184U, // FMIN_VG4_4ZZ_D
136U, // FMIN_VG4_4ZZ_H
96U, // FMIN_VG4_4ZZ_S
302127232U, // FMIN_ZPmI_D
4729992U, // FMIN_ZPmI_H
302133376U, // FMIN_ZPmI_S
33691776U, // FMIN_ZPmZ_D
50998408U, // FMIN_ZPmZ_H
67252352U, // FMIN_ZPmZ_S
925848U, // FMINv2f32
270440U, // FMINv2f64
1056928U, // FMINv4f16
401520U, // FMINv4f32
532600U, // FMINv8f16
49704U, // FMLAL2lanev4f16
103425184U, // FMLAL2lanev8f16
50728U, // FMLAL2v4f16
1057952U, // FMLAL2v8f16
52960344U, // FMLALB_ZZZI_SHH
7256U, // FMLALB_ZZZ_SHH
52960344U, // FMLALT_ZZZI_SHH
7256U, // FMLALT_ZZZ_SHH
40193U, // FMLAL_MZZI_S
257U, // FMLAL_MZZ_S
38128U, // FMLAL_VG2_M2Z2Z_S
2529520U, // FMLAL_VG2_M2ZZI_S
39152U, // FMLAL_VG2_M2ZZ_S
38128U, // FMLAL_VG4_M4Z4Z_S
2529520U, // FMLAL_VG4_M4ZZI_S
39152U, // FMLAL_VG4_M4ZZ_S
49704U, // FMLALlanev4f16
103425184U, // FMLALlanev8f16
50728U, // FMLALv4f16
1057952U, // FMLALv8f16
1453248U, // FMLA_VG2_M2Z2Z_D
1584328U, // FMLA_VG2_M2Z2Z_S
264U, // FMLA_VG2_M2Z4Z_H
320482496U, // FMLA_VG2_M2ZZI_D
40208U, // FMLA_VG2_M2ZZI_H
320613576U, // FMLA_VG2_M2ZZI_S
52047040U, // FMLA_VG2_M2ZZ_D
272U, // FMLA_VG2_M2ZZ_H
52178120U, // FMLA_VG2_M2ZZ_S
1453248U, // FMLA_VG4_M4Z4Z_D
264U, // FMLA_VG4_M4Z4Z_H
1584328U, // FMLA_VG4_M4Z4Z_S
320482496U, // FMLA_VG4_M4ZZI_D
40208U, // FMLA_VG4_M4ZZI_H
320613576U, // FMLA_VG4_M4ZZI_S
52047040U, // FMLA_VG4_M4ZZ_D
272U, // FMLA_VG4_M4ZZ_H
52178120U, // FMLA_VG4_M4ZZ_S
268567680U, // FMLA_ZPmZZ_D
53226728U, // FMLA_ZPmZZ_H
285345920U, // FMLA_ZPmZZ_S
52954200U, // FMLA_ZZZI_D
41192U, // FMLA_ZZZI_H
52955224U, // FMLA_ZZZI_S
103425113U, // FMLAv1i16_indexed
105260121U, // FMLAv1i32_indexed
105522265U, // FMLAv1i64_indexed
926872U, // FMLAv2f32
271464U, // FMLAv2f64
105260184U, // FMLAv2i32_indexed
105522280U, // FMLAv2i64_indexed
1057952U, // FMLAv4f16
402544U, // FMLAv4f32
103425184U, // FMLAv4i16_indexed
105260144U, // FMLAv4i32_indexed
533624U, // FMLAv8f16
103425144U, // FMLAv8i16_indexed
49704U, // FMLSL2lanev4f16
103425184U, // FMLSL2lanev8f16
50728U, // FMLSL2v4f16
1057952U, // FMLSL2v8f16
52960344U, // FMLSLB_ZZZI_SHH
7256U, // FMLSLB_ZZZ_SHH
52960344U, // FMLSLT_ZZZI_SHH
7256U, // FMLSLT_ZZZ_SHH
40193U, // FMLSL_MZZI_S
257U, // FMLSL_MZZ_S
38128U, // FMLSL_VG2_M2Z2Z_S
2529520U, // FMLSL_VG2_M2ZZI_S
39152U, // FMLSL_VG2_M2ZZ_S
38128U, // FMLSL_VG4_M4Z4Z_S
2529520U, // FMLSL_VG4_M4ZZI_S
39152U, // FMLSL_VG4_M4ZZ_S
49704U, // FMLSLlanev4f16
103425184U, // FMLSLlanev8f16
50728U, // FMLSLv4f16
1057952U, // FMLSLv8f16
1453248U, // FMLS_VG2_M2Z2Z_D
264U, // FMLS_VG2_M2Z2Z_H
1584328U, // FMLS_VG2_M2Z2Z_S
320482496U, // FMLS_VG2_M2ZZI_D
40208U, // FMLS_VG2_M2ZZI_H
320613576U, // FMLS_VG2_M2ZZI_S
52047040U, // FMLS_VG2_M2ZZ_D
272U, // FMLS_VG2_M2ZZ_H
52178120U, // FMLS_VG2_M2ZZ_S
264U, // FMLS_VG4_M4Z2Z_H
1453248U, // FMLS_VG4_M4Z4Z_D
1584328U, // FMLS_VG4_M4Z4Z_S
320482496U, // FMLS_VG4_M4ZZI_D
40208U, // FMLS_VG4_M4ZZI_H
320613576U, // FMLS_VG4_M4ZZI_S
52047040U, // FMLS_VG4_M4ZZ_D
272U, // FMLS_VG4_M4ZZ_H
52178120U, // FMLS_VG4_M4ZZ_S
268567680U, // FMLS_ZPmZZ_D
53226728U, // FMLS_ZPmZZ_H
285345920U, // FMLS_ZPmZZ_S
52954200U, // FMLS_ZZZI_D
41192U, // FMLS_ZZZI_H
52955224U, // FMLS_ZZZI_S
103425113U, // FMLSv1i16_indexed
105260121U, // FMLSv1i32_indexed
105522265U, // FMLSv1i64_indexed
926872U, // FMLSv2f32
271464U, // FMLSv2f64
105260184U, // FMLSv2i32_indexed
105522280U, // FMLSv2i64_indexed
1057952U, // FMLSv4f16
402544U, // FMLSv4f32
103425184U, // FMLSv4i16_indexed
105260144U, // FMLSv4i32_indexed
533624U, // FMLSv8f16
103425144U, // FMLSv8i16_indexed
1112U, // FMMLA_ZZZ_D
2136U, // FMMLA_ZZZ_S
0U, // FMOPAL_MPPZZ
560U, // FMOPA_MPPZZ_D
0U, // FMOPA_MPPZZ_H
280U, // FMOPA_MPPZZ_S
0U, // FMOPSL_MPPZZ
560U, // FMOPS_MPPZZ_D
0U, // FMOPS_MPPZZ_H
280U, // FMOPS_MPPZZ_S
47536U, // FMOVDXHighr
0U, // FMOVDXr
2U, // FMOVDi
0U, // FMOVDr
0U, // FMOVHWr
0U, // FMOVHXr
2U, // FMOVHi
0U, // FMOVHr
0U, // FMOVSWr
2U, // FMOVSi
0U, // FMOVSr
0U, // FMOVWHr
0U, // FMOVWSr
0U, // FMOVXDHighr
0U, // FMOVXDr
0U, // FMOVXHr
2U, // FMOVv2f32_ns
2U, // FMOVv2f64_ns
2U, // FMOVv4f16_ns
2U, // FMOVv4f32_ns
2U, // FMOVv8f16_ns
268567680U, // FMSB_ZPmZZ_D
53226728U, // FMSB_ZPmZZ_H
285345920U, // FMSB_ZPmZZ_S
134232U, // FMSUBDrrr
134232U, // FMSUBHrrr
134232U, // FMSUBSrrr
3160U, // FMULDrr
3160U, // FMULHrr
3160U, // FMULSrr
3160U, // FMULX16
3160U, // FMULX32
3160U, // FMULX64
33691776U, // FMULX_ZPmZ_D
50998408U, // FMULX_ZPmZ_H
67252352U, // FMULX_ZPmZ_S
338305112U, // FMULXv1i16_indexed
340140120U, // FMULXv1i32_indexed
340402264U, // FMULXv1i64_indexed
925848U, // FMULXv2f32
270440U, // FMULXv2f64
340140184U, // FMULXv2i32_indexed
340402280U, // FMULXv2i64_indexed
1056928U, // FMULXv4f16
401520U, // FMULXv4f32
338305184U, // FMULXv4i16_indexed
340140144U, // FMULXv4i32_indexed
532600U, // FMULXv8f16
338305144U, // FMULXv8i16_indexed
352458880U, // FMUL_ZPmI_D
4992136U, // FMUL_ZPmI_H
352465024U, // FMUL_ZPmI_S
33691776U, // FMUL_ZPmZ_D
50998408U, // FMUL_ZPmZ_H
67252352U, // FMUL_ZPmZ_S
5118040U, // FMUL_ZZZI_D
42120U, // FMUL_ZZZI_H
5124185U, // FMUL_ZZZI_S
6232U, // FMUL_ZZZ_D
136U, // FMUL_ZZZ_H
12377U, // FMUL_ZZZ_S
338305112U, // FMULv1i16_indexed
340140120U, // FMULv1i32_indexed
340402264U, // FMULv1i64_indexed
925848U, // FMULv2f32
270440U, // FMULv2f64
340140184U, // FMULv2i32_indexed
340402280U, // FMULv2i64_indexed
1056928U, // FMULv4f16
401520U, // FMULv4f32
338305184U, // FMULv4i16_indexed
340140144U, // FMULv4i32_indexed
532600U, // FMULv8f16
338305144U, // FMULv8i16_indexed
0U, // FNEGDr
0U, // FNEGHr
0U, // FNEGSr
16U, // FNEG_ZPmZ_D
0U, // FNEG_ZPmZ_H
24U, // FNEG_ZPmZ_S
40U, // FNEGv2f32
48U, // FNEGv2f64
56U, // FNEGv4f16
64U, // FNEGv4f32
72U, // FNEGv8f16
134232U, // FNMADDDrrr
134232U, // FNMADDHrrr
134232U, // FNMADDSrrr
268567680U, // FNMAD_ZPmZZ_D
53226728U, // FNMAD_ZPmZZ_H
285345920U, // FNMAD_ZPmZZ_S
268567680U, // FNMLA_ZPmZZ_D
53226728U, // FNMLA_ZPmZZ_H
285345920U, // FNMLA_ZPmZZ_S
268567680U, // FNMLS_ZPmZZ_D
53226728U, // FNMLS_ZPmZZ_H
285345920U, // FNMLS_ZPmZZ_S
268567680U, // FNMSB_ZPmZZ_D
53226728U, // FNMSB_ZPmZZ_H
285345920U, // FNMSB_ZPmZZ_S
134232U, // FNMSUBDrrr
134232U, // FNMSUBHrrr
134232U, // FNMSUBSrrr
3160U, // FNMULDrr
3160U, // FNMULHrr
3160U, // FNMULSrr
0U, // FRECPE_ZZ_D
0U, // FRECPE_ZZ_H
1U, // FRECPE_ZZ_S
0U, // FRECPEv1f16
0U, // FRECPEv1i32
0U, // FRECPEv1i64
40U, // FRECPEv2f32
48U, // FRECPEv2f64
56U, // FRECPEv4f16
64U, // FRECPEv4f32
72U, // FRECPEv8f16
3160U, // FRECPS16
3160U, // FRECPS32
3160U, // FRECPS64
6232U, // FRECPS_ZZZ_D
136U, // FRECPS_ZZZ_H
12377U, // FRECPS_ZZZ_S
925848U, // FRECPSv2f32
270440U, // FRECPSv2f64
1056928U, // FRECPSv4f16
401520U, // FRECPSv4f32
532600U, // FRECPSv8f16
16U, // FRECPX_ZPmZ_D
0U, // FRECPX_ZPmZ_H
24U, // FRECPX_ZPmZ_S
0U, // FRECPXv1f16
0U, // FRECPXv1i32
0U, // FRECPXv1i64
0U, // FRINT32XDr
0U, // FRINT32XSr
40U, // FRINT32Xv2f32
48U, // FRINT32Xv2f64
64U, // FRINT32Xv4f32
0U, // FRINT32ZDr
0U, // FRINT32ZSr
40U, // FRINT32Zv2f32
48U, // FRINT32Zv2f64
64U, // FRINT32Zv4f32
0U, // FRINT64XDr
0U, // FRINT64XSr
40U, // FRINT64Xv2f32
48U, // FRINT64Xv2f64
64U, // FRINT64Xv4f32
0U, // FRINT64ZDr
0U, // FRINT64ZSr
40U, // FRINT64Zv2f32
48U, // FRINT64Zv2f64
64U, // FRINT64Zv4f32
0U, // FRINTADr
0U, // FRINTAHr
0U, // FRINTASr
0U, // FRINTA_2Z2Z_S
0U, // FRINTA_4Z4Z_S
16U, // FRINTA_ZPmZ_D
0U, // FRINTA_ZPmZ_H
24U, // FRINTA_ZPmZ_S
40U, // FRINTAv2f32
48U, // FRINTAv2f64
56U, // FRINTAv4f16
64U, // FRINTAv4f32
72U, // FRINTAv8f16
0U, // FRINTIDr
0U, // FRINTIHr
0U, // FRINTISr
16U, // FRINTI_ZPmZ_D
0U, // FRINTI_ZPmZ_H
24U, // FRINTI_ZPmZ_S
40U, // FRINTIv2f32
48U, // FRINTIv2f64
56U, // FRINTIv4f16
64U, // FRINTIv4f32
72U, // FRINTIv8f16
0U, // FRINTMDr
0U, // FRINTMHr
0U, // FRINTMSr
0U, // FRINTM_2Z2Z_S
0U, // FRINTM_4Z4Z_S
16U, // FRINTM_ZPmZ_D
0U, // FRINTM_ZPmZ_H
24U, // FRINTM_ZPmZ_S
40U, // FRINTMv2f32
48U, // FRINTMv2f64
56U, // FRINTMv4f16
64U, // FRINTMv4f32
72U, // FRINTMv8f16
0U, // FRINTNDr
0U, // FRINTNHr
0U, // FRINTNSr
0U, // FRINTN_2Z2Z_S
0U, // FRINTN_4Z4Z_S
16U, // FRINTN_ZPmZ_D
0U, // FRINTN_ZPmZ_H
24U, // FRINTN_ZPmZ_S
40U, // FRINTNv2f32
48U, // FRINTNv2f64
56U, // FRINTNv4f16
64U, // FRINTNv4f32
72U, // FRINTNv8f16
0U, // FRINTPDr
0U, // FRINTPHr
0U, // FRINTPSr
0U, // FRINTP_2Z2Z_S
0U, // FRINTP_4Z4Z_S
16U, // FRINTP_ZPmZ_D
0U, // FRINTP_ZPmZ_H
24U, // FRINTP_ZPmZ_S
40U, // FRINTPv2f32
48U, // FRINTPv2f64
56U, // FRINTPv4f16
64U, // FRINTPv4f32
72U, // FRINTPv8f16
0U, // FRINTXDr
0U, // FRINTXHr
0U, // FRINTXSr
16U, // FRINTX_ZPmZ_D
0U, // FRINTX_ZPmZ_H
24U, // FRINTX_ZPmZ_S
40U, // FRINTXv2f32
48U, // FRINTXv2f64
56U, // FRINTXv4f16
64U, // FRINTXv4f32
72U, // FRINTXv8f16
0U, // FRINTZDr
0U, // FRINTZHr
0U, // FRINTZSr
16U, // FRINTZ_ZPmZ_D
0U, // FRINTZ_ZPmZ_H
24U, // FRINTZ_ZPmZ_S
40U, // FRINTZv2f32
48U, // FRINTZv2f64
56U, // FRINTZv4f16
64U, // FRINTZv4f32
72U, // FRINTZv8f16
0U, // FRSQRTE_ZZ_D
0U, // FRSQRTE_ZZ_H
1U, // FRSQRTE_ZZ_S
0U, // FRSQRTEv1f16
0U, // FRSQRTEv1i32
0U, // FRSQRTEv1i64
40U, // FRSQRTEv2f32
48U, // FRSQRTEv2f64
56U, // FRSQRTEv4f16
64U, // FRSQRTEv4f32
72U, // FRSQRTEv8f16
3160U, // FRSQRTS16
3160U, // FRSQRTS32
3160U, // FRSQRTS64
6232U, // FRSQRTS_ZZZ_D
136U, // FRSQRTS_ZZZ_H
12377U, // FRSQRTS_ZZZ_S
925848U, // FRSQRTSv2f32
270440U, // FRSQRTSv2f64
1056928U, // FRSQRTSv4f16
401520U, // FRSQRTSv4f32
532600U, // FRSQRTSv8f16
33691776U, // FSCALE_ZPmZ_D
50998408U, // FSCALE_ZPmZ_H
67252352U, // FSCALE_ZPmZ_S
0U, // FSQRTDr
0U, // FSQRTHr
0U, // FSQRTSr
16U, // FSQRT_ZPmZ_D
0U, // FSQRT_ZPmZ_H
24U, // FSQRT_ZPmZ_S
40U, // FSQRTv2f32
48U, // FSQRTv2f64
56U, // FSQRTv4f16
64U, // FSQRTv4f32
72U, // FSQRTv8f16
3160U, // FSUBDrr
3160U, // FSUBHrr
251795584U, // FSUBR_ZPmI_D
3681416U, // FSUBR_ZPmI_H
251801728U, // FSUBR_ZPmI_S
33691776U, // FSUBR_ZPmZ_D
50998408U, // FSUBR_ZPmZ_H
67252352U, // FSUBR_ZPmZ_S
3160U, // FSUBSrr
192U, // FSUB_VG2_M2Z_D
0U, // FSUB_VG2_M2Z_H
200U, // FSUB_VG2_M2Z_S
192U, // FSUB_VG4_M4Z_D
0U, // FSUB_VG4_M4Z_H
200U, // FSUB_VG4_M4Z_S
251795584U, // FSUB_ZPmI_D
3681416U, // FSUB_ZPmI_H
251801728U, // FSUB_ZPmI_S
33691776U, // FSUB_ZPmZ_D
50998408U, // FSUB_ZPmZ_H
67252352U, // FSUB_ZPmZ_S
6232U, // FSUB_ZZZ_D
136U, // FSUB_ZZZ_H
12377U, // FSUB_ZZZ_S
925848U, // FSUBv2f32
270440U, // FSUBv2f64
1056928U, // FSUBv4f16
401520U, // FSUBv4f32
532600U, // FSUBv8f16
137304U, // FTMAD_ZZI_D
52309128U, // FTMAD_ZZI_H
143449U, // FTMAD_ZZI_S
6232U, // FTSMUL_ZZZ_D
136U, // FTSMUL_ZZZ_H
12377U, // FTSMUL_ZZZ_S
6232U, // FTSSEL_ZZZ_D
136U, // FTSSEL_ZZZ_H
12377U, // FTSSEL_ZZZ_S
2529520U, // FVDOT_VG2_M2ZZI_HtoS
371076282U, // GLD1B_D_IMM_REAL
5254370U, // GLD1B_D_REAL
5385442U, // GLD1B_D_SXTW_REAL
5516514U, // GLD1B_D_UXTW_REAL
371076194U, // GLD1B_S_IMM_REAL
5647586U, // GLD1B_S_SXTW_REAL
5778658U, // GLD1B_S_UXTW_REAL
5909690U, // GLD1D_IMM_REAL
5254370U, // GLD1D_REAL
6040802U, // GLD1D_SCALED_REAL
5385442U, // GLD1D_SXTW_REAL
6171874U, // GLD1D_SXTW_SCALED_REAL
5516514U, // GLD1D_UXTW_REAL
6302946U, // GLD1D_UXTW_SCALED_REAL
375532730U, // GLD1H_D_IMM_REAL
5254370U, // GLD1H_D_REAL
6565090U, // GLD1H_D_SCALED_REAL
5385442U, // GLD1H_D_SXTW_REAL
6696162U, // GLD1H_D_SXTW_SCALED_REAL
5516514U, // GLD1H_D_UXTW_REAL
6827234U, // GLD1H_D_UXTW_SCALED_REAL
375532642U, // GLD1H_S_IMM_REAL
5647586U, // GLD1H_S_SXTW_REAL
6958306U, // GLD1H_S_SXTW_SCALED_REAL
5778658U, // GLD1H_S_UXTW_REAL
7089378U, // GLD1H_S_UXTW_SCALED_REAL
371076282U, // GLD1Q
371076282U, // GLD1SB_D_IMM_REAL
5254370U, // GLD1SB_D_REAL
5385442U, // GLD1SB_D_SXTW_REAL
5516514U, // GLD1SB_D_UXTW_REAL
371076194U, // GLD1SB_S_IMM_REAL
5647586U, // GLD1SB_S_SXTW_REAL
5778658U, // GLD1SB_S_UXTW_REAL
375532730U, // GLD1SH_D_IMM_REAL
5254370U, // GLD1SH_D_REAL
6565090U, // GLD1SH_D_SCALED_REAL
5385442U, // GLD1SH_D_SXTW_REAL
6696162U, // GLD1SH_D_SXTW_SCALED_REAL
5516514U, // GLD1SH_D_UXTW_REAL
6827234U, // GLD1SH_D_UXTW_SCALED_REAL
375532642U, // GLD1SH_S_IMM_REAL
5647586U, // GLD1SH_S_SXTW_REAL
6958306U, // GLD1SH_S_SXTW_SCALED_REAL
5778658U, // GLD1SH_S_UXTW_REAL
7089378U, // GLD1SH_S_UXTW_SCALED_REAL
376319162U, // GLD1SW_D_IMM_REAL
5254370U, // GLD1SW_D_REAL
7351522U, // GLD1SW_D_SCALED_REAL
5385442U, // GLD1SW_D_SXTW_REAL
7482594U, // GLD1SW_D_SXTW_SCALED_REAL
5516514U, // GLD1SW_D_UXTW_REAL
7613666U, // GLD1SW_D_UXTW_SCALED_REAL
376319162U, // GLD1W_D_IMM_REAL
5254370U, // GLD1W_D_REAL
7351522U, // GLD1W_D_SCALED_REAL
5385442U, // GLD1W_D_SXTW_REAL
7482594U, // GLD1W_D_SXTW_SCALED_REAL
5516514U, // GLD1W_D_UXTW_REAL
7613666U, // GLD1W_D_UXTW_SCALED_REAL
376319074U, // GLD1W_IMM_REAL
5647586U, // GLD1W_SXTW_REAL
7744738U, // GLD1W_SXTW_SCALED_REAL
5778658U, // GLD1W_UXTW_REAL
7875810U, // GLD1W_UXTW_SCALED_REAL
371076282U, // GLDFF1B_D_IMM_REAL
5254370U, // GLDFF1B_D_REAL
5385442U, // GLDFF1B_D_SXTW_REAL
5516514U, // GLDFF1B_D_UXTW_REAL
371076194U, // GLDFF1B_S_IMM_REAL
5647586U, // GLDFF1B_S_SXTW_REAL
5778658U, // GLDFF1B_S_UXTW_REAL
5909690U, // GLDFF1D_IMM_REAL
5254370U, // GLDFF1D_REAL
6040802U, // GLDFF1D_SCALED_REAL
5385442U, // GLDFF1D_SXTW_REAL
6171874U, // GLDFF1D_SXTW_SCALED_REAL
5516514U, // GLDFF1D_UXTW_REAL
6302946U, // GLDFF1D_UXTW_SCALED_REAL
375532730U, // GLDFF1H_D_IMM_REAL
5254370U, // GLDFF1H_D_REAL
6565090U, // GLDFF1H_D_SCALED_REAL
5385442U, // GLDFF1H_D_SXTW_REAL
6696162U, // GLDFF1H_D_SXTW_SCALED_REAL
5516514U, // GLDFF1H_D_UXTW_REAL
6827234U, // GLDFF1H_D_UXTW_SCALED_REAL
375532642U, // GLDFF1H_S_IMM_REAL
5647586U, // GLDFF1H_S_SXTW_REAL
6958306U, // GLDFF1H_S_SXTW_SCALED_REAL
5778658U, // GLDFF1H_S_UXTW_REAL
7089378U, // GLDFF1H_S_UXTW_SCALED_REAL
371076282U, // GLDFF1SB_D_IMM_REAL
5254370U, // GLDFF1SB_D_REAL
5385442U, // GLDFF1SB_D_SXTW_REAL
5516514U, // GLDFF1SB_D_UXTW_REAL
371076194U, // GLDFF1SB_S_IMM_REAL
5647586U, // GLDFF1SB_S_SXTW_REAL
5778658U, // GLDFF1SB_S_UXTW_REAL
375532730U, // GLDFF1SH_D_IMM_REAL
5254370U, // GLDFF1SH_D_REAL
6565090U, // GLDFF1SH_D_SCALED_REAL
5385442U, // GLDFF1SH_D_SXTW_REAL
6696162U, // GLDFF1SH_D_SXTW_SCALED_REAL
5516514U, // GLDFF1SH_D_UXTW_REAL
6827234U, // GLDFF1SH_D_UXTW_SCALED_REAL
375532642U, // GLDFF1SH_S_IMM_REAL
5647586U, // GLDFF1SH_S_SXTW_REAL
6958306U, // GLDFF1SH_S_SXTW_SCALED_REAL
5778658U, // GLDFF1SH_S_UXTW_REAL
7089378U, // GLDFF1SH_S_UXTW_SCALED_REAL
376319162U, // GLDFF1SW_D_IMM_REAL
5254370U, // GLDFF1SW_D_REAL
7351522U, // GLDFF1SW_D_SCALED_REAL
5385442U, // GLDFF1SW_D_SXTW_REAL
7482594U, // GLDFF1SW_D_SXTW_SCALED_REAL
5516514U, // GLDFF1SW_D_UXTW_REAL
7613666U, // GLDFF1SW_D_UXTW_SCALED_REAL
376319162U, // GLDFF1W_D_IMM_REAL
5254370U, // GLDFF1W_D_REAL
7351522U, // GLDFF1W_D_SCALED_REAL
5385442U, // GLDFF1W_D_SXTW_REAL
7482594U, // GLDFF1W_D_SXTW_SCALED_REAL
5516514U, // GLDFF1W_D_UXTW_REAL
7613666U, // GLDFF1W_D_UXTW_SCALED_REAL
376319074U, // GLDFF1W_IMM_REAL
5647586U, // GLDFF1W_SXTW_REAL
7744738U, // GLDFF1W_SXTW_SCALED_REAL
5778658U, // GLDFF1W_UXTW_REAL
7875810U, // GLDFF1W_UXTW_SCALED_REAL
3160U, // GMI
0U, // HINT
33691864U, // HISTCNT_ZPzZZ_D
67252440U, // HISTCNT_ZPzZZ_S
10329U, // HISTSEG_ZZZ
0U, // HLT
0U, // HVC
2U, // INCB_XPiI
2U, // INCD_XPiI
2U, // INCD_ZPiI
2U, // INCH_XPiI
0U, // INCH_ZPiI
1U, // INCP_XP_B
0U, // INCP_XP_D
0U, // INCP_XP_H
1U, // INCP_XP_S
0U, // INCP_ZP_D
0U, // INCP_ZP_H
0U, // INCP_ZP_S
2U, // INCW_XPiI
2U, // INCW_ZPiI
570U, // INDEX_II_B
3160U, // INDEX_II_D
2U, // INDEX_II_H
3160U, // INDEX_II_S
226U, // INDEX_IR_B
3160U, // INDEX_IR_D
1U, // INDEX_IR_H
3160U, // INDEX_IR_S
51288U, // INDEX_RI_B
3160U, // INDEX_RI_D
576U, // INDEX_RI_H
3160U, // INDEX_RI_S
3160U, // INDEX_RR_B
3160U, // INDEX_RR_D
224U, // INDEX_RR_H
3160U, // INDEX_RR_S
52808U, // INSERT_MXIPZ_H_B
53832U, // INSERT_MXIPZ_H_D
39496U, // INSERT_MXIPZ_H_H
54856U, // INSERT_MXIPZ_H_Q
55880U, // INSERT_MXIPZ_H_S
52808U, // INSERT_MXIPZ_V_B
53832U, // INSERT_MXIPZ_V_D
39496U, // INSERT_MXIPZ_V_H
54856U, // INSERT_MXIPZ_V_Q
55880U, // INSERT_MXIPZ_V_S
1U, // INSR_ZR_B
1U, // INSR_ZR_D
0U, // INSR_ZR_H
1U, // INSR_ZR_S
3U, // INSR_ZV_B
3U, // INSR_ZV_D
0U, // INSR_ZV_H
3U, // INSR_ZV_S
2U, // INSvi16gpr
41379U, // INSvi16lane
2U, // INSvi32gpr
41387U, // INSvi32lane
2U, // INSvi64gpr
41395U, // INSvi64lane
2U, // INSvi8gpr
41403U, // INSvi8lane
3160U, // IRG
0U, // ISB
10328U, // LASTA_RPZ_B
6232U, // LASTA_RPZ_D
5208U, // LASTA_RPZ_H
12376U, // LASTA_RPZ_S
10328U, // LASTA_VPZ_B
6232U, // LASTA_VPZ_D
5208U, // LASTA_VPZ_H
12376U, // LASTA_VPZ_S
10328U, // LASTB_RPZ_B
6232U, // LASTB_RPZ_D
5208U, // LASTB_RPZ_H
12376U, // LASTB_RPZ_S
10328U, // LASTB_VPZ_B
6232U, // LASTB_VPZ_D
5208U, // LASTB_VPZ_H
12376U, // LASTB_VPZ_S
8006882U, // LD1B
8006882U, // LD1B_2Z
392309986U, // LD1B_2Z_IMM
8006882U, // LD1B_4Z
393096418U, // LD1B_4Z_IMM
8006882U, // LD1B_D
387853538U, // LD1B_D_IMM_REAL
8006882U, // LD1B_H
387853538U, // LD1B_H_IMM_REAL
387853538U, // LD1B_IMM_REAL
8006882U, // LD1B_S
387853538U, // LD1B_S_IMM_REAL
56915U, // LD1B_VG2_M2ZPXI
57939U, // LD1B_VG2_M2ZPXX
393096418U, // LD1B_VG4_M4ZPXI
8006882U, // LD1B_VG4_M4ZPXX
8137954U, // LD1D
8137954U, // LD1D_2Z
392309986U, // LD1D_2Z_IMM
8137954U, // LD1D_4Z
393096418U, // LD1D_4Z_IMM
387853538U, // LD1D_IMM_REAL
8137954U, // LD1D_Q
387853538U, // LD1D_Q_IMM
392309986U, // LD1D_VG2_M2ZPXI
8137954U, // LD1D_VG2_M2ZPXX
393096418U, // LD1D_VG4_M4ZPXI
8137954U, // LD1D_VG4_M4ZPXX
0U, // LD1Fourv16b
0U, // LD1Fourv16b_POST
0U, // LD1Fourv1d
0U, // LD1Fourv1d_POST
0U, // LD1Fourv2d
0U, // LD1Fourv2d_POST
0U, // LD1Fourv2s
0U, // LD1Fourv2s_POST
0U, // LD1Fourv4h
0U, // LD1Fourv4h_POST
0U, // LD1Fourv4s
0U, // LD1Fourv4s_POST
0U, // LD1Fourv8b
0U, // LD1Fourv8b_POST
0U, // LD1Fourv8h
0U, // LD1Fourv8h_POST
8269026U, // LD1H
8269026U, // LD1H_2Z
392309986U, // LD1H_2Z_IMM
8269026U, // LD1H_4Z
393096418U, // LD1H_4Z_IMM
8269026U, // LD1H_D
387853538U, // LD1H_D_IMM_REAL
387853538U, // LD1H_IMM_REAL
8269026U, // LD1H_S
387853538U, // LD1H_S_IMM_REAL
56915U, // LD1H_VG2_M2ZPXI
58963U, // LD1H_VG2_M2ZPXX
393096418U, // LD1H_VG4_M4ZPXI
8269026U, // LD1H_VG4_M4ZPXX
0U, // LD1Onev16b
0U, // LD1Onev16b_POST
0U, // LD1Onev1d
0U, // LD1Onev1d_POST
0U, // LD1Onev2d
0U, // LD1Onev2d_POST
0U, // LD1Onev2s
0U, // LD1Onev2s_POST
0U, // LD1Onev4h
0U, // LD1Onev4h_POST
0U, // LD1Onev4s
0U, // LD1Onev4s_POST
0U, // LD1Onev8b
0U, // LD1Onev8b_POST
0U, // LD1Onev8h
0U, // LD1Onev8h_POST
371076322U, // LD1RB_D_IMM
371076322U, // LD1RB_H_IMM
371076322U, // LD1RB_IMM
371076322U, // LD1RB_S_IMM
5909730U, // LD1RD_IMM
375532770U, // LD1RH_D_IMM
375532770U, // LD1RH_IMM
375532770U, // LD1RH_S_IMM
8006882U, // LD1RO_B
8400098U, // LD1RO_B_IMM
8137954U, // LD1RO_D
8400098U, // LD1RO_D_IMM
8269026U, // LD1RO_H
8400098U, // LD1RO_H_IMM
8531170U, // LD1RO_W
8400098U, // LD1RO_W_IMM
8006882U, // LD1RQ_B
8662242U, // LD1RQ_B_IMM
8137954U, // LD1RQ_D
8662242U, // LD1RQ_D_IMM
8269026U, // LD1RQ_H
8662242U, // LD1RQ_H_IMM
8531170U, // LD1RQ_W
8662242U, // LD1RQ_W_IMM
371076322U, // LD1RSB_D_IMM
371076322U, // LD1RSB_H_IMM
371076322U, // LD1RSB_S_IMM
375532770U, // LD1RSH_D_IMM
375532770U, // LD1RSH_S_IMM
376319202U, // LD1RSW_IMM
376319202U, // LD1RW_D_IMM
376319202U, // LD1RW_IMM
0U, // LD1Rv16b
0U, // LD1Rv16b_POST
0U, // LD1Rv1d
0U, // LD1Rv1d_POST
0U, // LD1Rv2d
0U, // LD1Rv2d_POST
0U, // LD1Rv2s
0U, // LD1Rv2s_POST
0U, // LD1Rv4h
0U, // LD1Rv4h_POST
0U, // LD1Rv4s
0U, // LD1Rv4s_POST
0U, // LD1Rv8b
0U, // LD1Rv8b_POST
0U, // LD1Rv8h
0U, // LD1Rv8h_POST
8006882U, // LD1SB_D
387853538U, // LD1SB_D_IMM_REAL
8006882U, // LD1SB_H
387853538U, // LD1SB_H_IMM_REAL
8006882U, // LD1SB_S
387853538U, // LD1SB_S_IMM_REAL
8269026U, // LD1SH_D
387853538U, // LD1SH_D_IMM_REAL
8269026U, // LD1SH_S
387853538U, // LD1SH_S_IMM_REAL
8531170U, // LD1SW_D
387853538U, // LD1SW_D_IMM_REAL
0U, // LD1Threev16b
0U, // LD1Threev16b_POST
0U, // LD1Threev1d
0U, // LD1Threev1d_POST
0U, // LD1Threev2d
0U, // LD1Threev2d_POST
0U, // LD1Threev2s
0U, // LD1Threev2s_POST
0U, // LD1Threev4h
0U, // LD1Threev4h_POST
0U, // LD1Threev4s
0U, // LD1Threev4s_POST
0U, // LD1Threev8b
0U, // LD1Threev8b_POST
0U, // LD1Threev8h
0U, // LD1Threev8h_POST
0U, // LD1Twov16b
0U, // LD1Twov16b_POST
0U, // LD1Twov1d
0U, // LD1Twov1d_POST
0U, // LD1Twov2d
0U, // LD1Twov2d_POST
0U, // LD1Twov2s
0U, // LD1Twov2s_POST
0U, // LD1Twov4h
0U, // LD1Twov4h_POST
0U, // LD1Twov4s
0U, // LD1Twov4s_POST
0U, // LD1Twov8b
0U, // LD1Twov8b_POST
0U, // LD1Twov8h
0U, // LD1Twov8h_POST
8531170U, // LD1W
8531170U, // LD1W_2Z
392309986U, // LD1W_2Z_IMM
8531170U, // LD1W_4Z
393096418U, // LD1W_4Z_IMM
8531170U, // LD1W_D
387853538U, // LD1W_D_IMM_REAL
387853538U, // LD1W_IMM_REAL
8531170U, // LD1W_Q
387853538U, // LD1W_Q_IMM
392309986U, // LD1W_VG2_M2ZPXI
8531170U, // LD1W_VG2_M2ZPXX
393096418U, // LD1W_VG4_M4ZPXI
8531170U, // LD1W_VG4_M4ZPXX
8841816U, // LD1_MXIPXX_H_B
8972888U, // LD1_MXIPXX_H_D
9103960U, // LD1_MXIPXX_H_H
9235032U, // LD1_MXIPXX_H_Q
9366104U, // LD1_MXIPXX_H_S
8841816U, // LD1_MXIPXX_V_B
8972888U, // LD1_MXIPXX_V_D
9103960U, // LD1_MXIPXX_V_H
9235032U, // LD1_MXIPXX_V_Q
9366104U, // LD1_MXIPXX_V_S
0U, // LD1i16
0U, // LD1i16_POST
0U, // LD1i32
0U, // LD1i32_POST
0U, // LD1i64
0U, // LD1i64_POST
0U, // LD1i8
0U, // LD1i8_POST
8006882U, // LD2B
392309986U, // LD2B_IMM
8137954U, // LD2D
392309986U, // LD2D_IMM
8269026U, // LD2H
392309986U, // LD2H_IMM
9448674U, // LD2Q
392309986U, // LD2Q_IMM
0U, // LD2Rv16b
0U, // LD2Rv16b_POST
0U, // LD2Rv1d
0U, // LD2Rv1d_POST
0U, // LD2Rv2d
0U, // LD2Rv2d_POST
0U, // LD2Rv2s
0U, // LD2Rv2s_POST
0U, // LD2Rv4h
0U, // LD2Rv4h_POST
0U, // LD2Rv4s
0U, // LD2Rv4s_POST
0U, // LD2Rv8b
0U, // LD2Rv8b_POST
0U, // LD2Rv8h
0U, // LD2Rv8h_POST
0U, // LD2Twov16b
0U, // LD2Twov16b_POST
0U, // LD2Twov2d
0U, // LD2Twov2d_POST
0U, // LD2Twov2s
0U, // LD2Twov2s_POST
0U, // LD2Twov4h
0U, // LD2Twov4h_POST
0U, // LD2Twov4s
0U, // LD2Twov4s_POST
0U, // LD2Twov8b
0U, // LD2Twov8b_POST
0U, // LD2Twov8h
0U, // LD2Twov8h_POST
8531170U, // LD2W
392309986U, // LD2W_IMM
0U, // LD2i16
0U, // LD2i16_POST
0U, // LD2i32
0U, // LD2i32_POST
0U, // LD2i64
0U, // LD2i64_POST
0U, // LD2i8
0U, // LD2i8_POST
8006882U, // LD3B
9579746U, // LD3B_IMM
8137954U, // LD3D
9579746U, // LD3D_IMM
8269026U, // LD3H
9579746U, // LD3H_IMM
9448674U, // LD3Q
9579746U, // LD3Q_IMM
0U, // LD3Rv16b
0U, // LD3Rv16b_POST
0U, // LD3Rv1d
0U, // LD3Rv1d_POST
0U, // LD3Rv2d
0U, // LD3Rv2d_POST
0U, // LD3Rv2s
0U, // LD3Rv2s_POST
0U, // LD3Rv4h
0U, // LD3Rv4h_POST
0U, // LD3Rv4s
0U, // LD3Rv4s_POST
0U, // LD3Rv8b
0U, // LD3Rv8b_POST
0U, // LD3Rv8h
0U, // LD3Rv8h_POST
0U, // LD3Threev16b
0U, // LD3Threev16b_POST
0U, // LD3Threev2d
0U, // LD3Threev2d_POST
0U, // LD3Threev2s
0U, // LD3Threev2s_POST
0U, // LD3Threev4h
0U, // LD3Threev4h_POST
0U, // LD3Threev4s
0U, // LD3Threev4s_POST
0U, // LD3Threev8b
0U, // LD3Threev8b_POST
0U, // LD3Threev8h
0U, // LD3Threev8h_POST
8531170U, // LD3W
9579746U, // LD3W_IMM
0U, // LD3i16
0U, // LD3i16_POST
0U, // LD3i32
0U, // LD3i32_POST
0U, // LD3i64
0U, // LD3i64_POST
0U, // LD3i8
0U, // LD3i8_POST
8006882U, // LD4B
393096418U, // LD4B_IMM
8137954U, // LD4D
393096418U, // LD4D_IMM
0U, // LD4Fourv16b
0U, // LD4Fourv16b_POST
0U, // LD4Fourv2d
0U, // LD4Fourv2d_POST
0U, // LD4Fourv2s
0U, // LD4Fourv2s_POST
0U, // LD4Fourv4h
0U, // LD4Fourv4h_POST
0U, // LD4Fourv4s
0U, // LD4Fourv4s_POST
0U, // LD4Fourv8b
0U, // LD4Fourv8b_POST
0U, // LD4Fourv8h
0U, // LD4Fourv8h_POST
8269026U, // LD4H
393096418U, // LD4H_IMM
9448674U, // LD4Q
393096418U, // LD4Q_IMM
0U, // LD4Rv16b
0U, // LD4Rv16b_POST
0U, // LD4Rv1d
0U, // LD4Rv1d_POST
0U, // LD4Rv2d
0U, // LD4Rv2d_POST
0U, // LD4Rv2s
0U, // LD4Rv2s_POST
0U, // LD4Rv4h
0U, // LD4Rv4h_POST
0U, // LD4Rv4s
0U, // LD4Rv4s_POST
0U, // LD4Rv8b
0U, // LD4Rv8b_POST
0U, // LD4Rv8h
0U, // LD4Rv8h_POST
8531170U, // LD4W
393096418U, // LD4W_IMM
0U, // LD4i16
0U, // LD4i16_POST
0U, // LD4i32
0U, // LD4i32_POST
0U, // LD4i64
0U, // LD4i64_POST
0U, // LD4i8
0U, // LD4i8_POST
0U, // LD64B
3U, // LDADDAB
3U, // LDADDAH
3U, // LDADDALB
3U, // LDADDALH
3U, // LDADDALW
3U, // LDADDALX
3U, // LDADDAW
3U, // LDADDAX
3U, // LDADDB
3U, // LDADDH
3U, // LDADDLB
3U, // LDADDLH
3U, // LDADDLW
3U, // LDADDLX
3U, // LDADDW
3U, // LDADDX
0U, // LDAP1
608U, // LDAPRB
608U, // LDAPRH
608U, // LDAPRW
617U, // LDAPRWpre
608U, // LDAPRX
625U, // LDAPRXpre
3148888U, // LDAPURBi
3148888U, // LDAPURHi
3148888U, // LDAPURSBWi
3148888U, // LDAPURSBXi
3148888U, // LDAPURSHWi
3148888U, // LDAPURSHXi
3148888U, // LDAPURSWi
3148888U, // LDAPURXi
3148888U, // LDAPURbi
3148888U, // LDAPURdi
3148888U, // LDAPURhi
3148888U, // LDAPURi
3148888U, // LDAPURqi
3148888U, // LDAPURsi
608U, // LDARB
608U, // LDARH
608U, // LDARW
608U, // LDARX
3149088U, // LDAXPW
3149088U, // LDAXPX
608U, // LDAXRB
608U, // LDAXRH
608U, // LDAXRW
608U, // LDAXRX
3U, // LDCLRAB
3U, // LDCLRAH
3U, // LDCLRALB
3U, // LDCLRALH
3U, // LDCLRALW
3U, // LDCLRALX
3U, // LDCLRAW
3U, // LDCLRAX
3U, // LDCLRB
3U, // LDCLRH
3U, // LDCLRLB
3U, // LDCLRLH
3U, // LDCLRLW
3U, // LDCLRLX
60706U, // LDCLRP
60706U, // LDCLRPA
60706U, // LDCLRPAL
60706U, // LDCLRPL
3U, // LDCLRW
3U, // LDCLRX
3U, // LDEORAB
3U, // LDEORAH
3U, // LDEORALB
3U, // LDEORALH
3U, // LDEORALW
3U, // LDEORALX
3U, // LDEORAW
3U, // LDEORAX
3U, // LDEORB
3U, // LDEORH
3U, // LDEORLB
3U, // LDEORLH
3U, // LDEORLW
3U, // LDEORLX
3U, // LDEORW
3U, // LDEORX
8006882U, // LDFF1B_D_REAL
8006882U, // LDFF1B_H_REAL
8006882U, // LDFF1B_REAL
8006882U, // LDFF1B_S_REAL
8137954U, // LDFF1D_REAL
8269026U, // LDFF1H_D_REAL
8269026U, // LDFF1H_REAL
8269026U, // LDFF1H_S_REAL
8006882U, // LDFF1SB_D_REAL
8006882U, // LDFF1SB_H_REAL
8006882U, // LDFF1SB_S_REAL
8269026U, // LDFF1SH_D_REAL
8269026U, // LDFF1SH_S_REAL
8531170U, // LDFF1SW_D_REAL
8531170U, // LDFF1W_D_REAL
8531170U, // LDFF1W_REAL
3207257U, // LDG
608U, // LDGM
3149088U, // LDIAPPW
9742625U, // LDIAPPWpre
3149088U, // LDIAPPX
9873697U, // LDIAPPXpre
608U, // LDLARB
608U, // LDLARH
608U, // LDLARW
608U, // LDLARX
387853538U, // LDNF1B_D_IMM_REAL
387853538U, // LDNF1B_H_IMM_REAL
387853538U, // LDNF1B_IMM_REAL
387853538U, // LDNF1B_S_IMM_REAL
387853538U, // LDNF1D_IMM_REAL
387853538U, // LDNF1H_D_IMM_REAL
387853538U, // LDNF1H_IMM_REAL
387853538U, // LDNF1H_S_IMM_REAL
387853538U, // LDNF1SB_D_IMM_REAL
387853538U, // LDNF1SB_H_IMM_REAL
387853538U, // LDNF1SB_S_IMM_REAL
387853538U, // LDNF1SH_D_IMM_REAL
387853538U, // LDNF1SH_S_IMM_REAL
387853538U, // LDNF1SW_D_IMM_REAL
387853538U, // LDNF1W_D_IMM_REAL
387853538U, // LDNF1W_IMM_REAL
402787616U, // LDNPDi
419564832U, // LDNPQi
436342048U, // LDNPSi
436342048U, // LDNPWi
402787616U, // LDNPXi
8006882U, // LDNT1B_2Z
392309986U, // LDNT1B_2Z_IMM
8006882U, // LDNT1B_4Z
393096418U, // LDNT1B_4Z_IMM
56915U, // LDNT1B_VG2_M2ZPXI
57939U, // LDNT1B_VG2_M2ZPXX
393096418U, // LDNT1B_VG4_M4ZPXI
8006882U, // LDNT1B_VG4_M4ZPXX
387853538U, // LDNT1B_ZRI
8006882U, // LDNT1B_ZRR
371076282U, // LDNT1B_ZZR_D_REAL
371076194U, // LDNT1B_ZZR_S_REAL
8137954U, // LDNT1D_2Z
392309986U, // LDNT1D_2Z_IMM
8137954U, // LDNT1D_4Z
393096418U, // LDNT1D_4Z_IMM
392309986U, // LDNT1D_VG2_M2ZPXI
8137954U, // LDNT1D_VG2_M2ZPXX
393096418U, // LDNT1D_VG4_M4ZPXI
8137954U, // LDNT1D_VG4_M4ZPXX
387853538U, // LDNT1D_ZRI
8137954U, // LDNT1D_ZRR
371076282U, // LDNT1D_ZZR_D_REAL
8269026U, // LDNT1H_2Z
392309986U, // LDNT1H_2Z_IMM
8269026U, // LDNT1H_4Z
393096418U, // LDNT1H_4Z_IMM
56915U, // LDNT1H_VG2_M2ZPXI
58963U, // LDNT1H_VG2_M2ZPXX
393096418U, // LDNT1H_VG4_M4ZPXI
8269026U, // LDNT1H_VG4_M4ZPXX
387853538U, // LDNT1H_ZRI
8269026U, // LDNT1H_ZRR
371076282U, // LDNT1H_ZZR_D_REAL
371076194U, // LDNT1H_ZZR_S_REAL
371076282U, // LDNT1SB_ZZR_D_REAL
371076194U, // LDNT1SB_ZZR_S_REAL
371076282U, // LDNT1SH_ZZR_D_REAL
371076194U, // LDNT1SH_ZZR_S_REAL
371076282U, // LDNT1SW_ZZR_D_REAL
8531170U, // LDNT1W_2Z
392309986U, // LDNT1W_2Z_IMM
8531170U, // LDNT1W_4Z
393096418U, // LDNT1W_4Z_IMM
392309986U, // LDNT1W_VG2_M2ZPXI
8531170U, // LDNT1W_VG2_M2ZPXX
393096418U, // LDNT1W_VG4_M4ZPXI
8531170U, // LDNT1W_VG4_M4ZPXX
387853538U, // LDNT1W_ZRI
8531170U, // LDNT1W_ZRR
371076282U, // LDNT1W_ZZR_D_REAL
371076194U, // LDNT1W_ZZR_S_REAL
402787616U, // LDPDi
462989601U, // LDPDpost
453159201U, // LDPDpre
419564832U, // LDPQi
479766817U, // LDPQpost
469936417U, // LDPQpre
436342048U, // LDPSWi
496544033U, // LDPSWpost
486713633U, // LDPSWpre
436342048U, // LDPSi
496544033U, // LDPSpost
486713633U, // LDPSpre
436342048U, // LDPWi
496544033U, // LDPWpost
486713633U, // LDPWpre
402787616U, // LDPXi
462989601U, // LDPXpost
453159201U, // LDPXpre
62552U, // LDRAAindexed
63577U, // LDRAAwriteback
62552U, // LDRABindexed
63577U, // LDRABwriteback
43641U, // LDRBBpost
10135641U, // LDRBBpre
503450712U, // LDRBBroW
520227928U, // LDRBBroX
64600U, // LDRBBui
43641U, // LDRBpost
10135641U, // LDRBpre
503450712U, // LDRBroW
520227928U, // LDRBroX
64600U, // LDRBui
1U, // LDRDl
43641U, // LDRDpost
10135641U, // LDRDpre
537005144U, // LDRDroW
553782360U, // LDRDroX
65624U, // LDRDui
43641U, // LDRHHpost
10135641U, // LDRHHpre
570559576U, // LDRHHroW
587336792U, // LDRHHroX
66648U, // LDRHHui
43641U, // LDRHpost
10135641U, // LDRHpre
570559576U, // LDRHroW
587336792U, // LDRHroX
66648U, // LDRHui
1U, // LDRQl
43641U, // LDRQpost
10135641U, // LDRQpre
604114008U, // LDRQroW
620891224U, // LDRQroX
67672U, // LDRQui
43641U, // LDRSBWpost
10135641U, // LDRSBWpre
503450712U, // LDRSBWroW
520227928U, // LDRSBWroX
64600U, // LDRSBWui
43641U, // LDRSBXpost
10135641U, // LDRSBXpre
503450712U, // LDRSBXroW
520227928U, // LDRSBXroX
64600U, // LDRSBXui
43641U, // LDRSHWpost
10135641U, // LDRSHWpre
570559576U, // LDRSHWroW
587336792U, // LDRSHWroX
66648U, // LDRSHWui
43641U, // LDRSHXpost
10135641U, // LDRSHXpre
570559576U, // LDRSHXroW
587336792U, // LDRSHXroX
66648U, // LDRSHXui
1U, // LDRSWl
43641U, // LDRSWpost
10135641U, // LDRSWpre
637668440U, // LDRSWroW
654445656U, // LDRSWroX
68696U, // LDRSWui
1U, // LDRSl
43641U, // LDRSpost
10135641U, // LDRSpre
637668440U, // LDRSroW
654445656U, // LDRSroX
68696U, // LDRSui
1U, // LDRWl
43641U, // LDRWpost
10135641U, // LDRWpre
637668440U, // LDRWroW
654445656U, // LDRWroX
68696U, // LDRWui
1U, // LDRXl
43641U, // LDRXpost
10135641U, // LDRXpre
537005144U, // LDRXroW
553782360U, // LDRXroX
65624U, // LDRXui
10226776U, // LDR_PXI
608U, // LDR_TX
0U, // LDR_ZA
10226776U, // LDR_ZXI
3U, // LDSETAB
3U, // LDSETAH
3U, // LDSETALB
3U, // LDSETALH
3U, // LDSETALW
3U, // LDSETALX
3U, // LDSETAW
3U, // LDSETAX
3U, // LDSETB
3U, // LDSETH
3U, // LDSETLB
3U, // LDSETLH
3U, // LDSETLW
3U, // LDSETLX
60706U, // LDSETP
60706U, // LDSETPA
60706U, // LDSETPAL
60706U, // LDSETPL
3U, // LDSETW
3U, // LDSETX
3U, // LDSMAXAB
3U, // LDSMAXAH
3U, // LDSMAXALB
3U, // LDSMAXALH
3U, // LDSMAXALW
3U, // LDSMAXALX
3U, // LDSMAXAW
3U, // LDSMAXAX
3U, // LDSMAXB
3U, // LDSMAXH
3U, // LDSMAXLB
3U, // LDSMAXLH
3U, // LDSMAXLW
3U, // LDSMAXLX
3U, // LDSMAXW
3U, // LDSMAXX
3U, // LDSMINAB
3U, // LDSMINAH
3U, // LDSMINALB
3U, // LDSMINALH
3U, // LDSMINALW
3U, // LDSMINALX
3U, // LDSMINAW
3U, // LDSMINAX
3U, // LDSMINB
3U, // LDSMINH
3U, // LDSMINLB
3U, // LDSMINLH
3U, // LDSMINLW
3U, // LDSMINLX
3U, // LDSMINW
3U, // LDSMINX
3148888U, // LDTRBi
3148888U, // LDTRHi
3148888U, // LDTRSBWi
3148888U, // LDTRSBXi
3148888U, // LDTRSHWi
3148888U, // LDTRSHXi
3148888U, // LDTRSWi
3148888U, // LDTRWi
3148888U, // LDTRXi
3U, // LDUMAXAB
3U, // LDUMAXAH
3U, // LDUMAXALB
3U, // LDUMAXALH
3U, // LDUMAXALW
3U, // LDUMAXALX
3U, // LDUMAXAW
3U, // LDUMAXAX
3U, // LDUMAXB
3U, // LDUMAXH
3U, // LDUMAXLB
3U, // LDUMAXLH
3U, // LDUMAXLW
3U, // LDUMAXLX
3U, // LDUMAXW
3U, // LDUMAXX
3U, // LDUMINAB
3U, // LDUMINAH
3U, // LDUMINALB
3U, // LDUMINALH
3U, // LDUMINALW
3U, // LDUMINALX
3U, // LDUMINAW
3U, // LDUMINAX
3U, // LDUMINB
3U, // LDUMINH
3U, // LDUMINLB
3U, // LDUMINLH
3U, // LDUMINLW
3U, // LDUMINLX
3U, // LDUMINW
3U, // LDUMINX
3148888U, // LDURBBi
3148888U, // LDURBi
3148888U, // LDURDi
3148888U, // LDURHHi
3148888U, // LDURHi
3148888U, // LDURQi
3148888U, // LDURSBWi
3148888U, // LDURSBXi
3148888U, // LDURSHWi
3148888U, // LDURSHXi
3148888U, // LDURSWi
3148888U, // LDURSi
3148888U, // LDURWi
3148888U, // LDURXi
3149088U, // LDXPW
3149088U, // LDXPX
608U, // LDXRB
608U, // LDXRH
608U, // LDXRW
608U, // LDXRX
16918656U, // LSLR_ZPmZ_B
33691776U, // LSLR_ZPmZ_D
50998408U, // LSLR_ZPmZ_H
67252352U, // LSLR_ZPmZ_S
3160U, // LSLVWr
3160U, // LSLVXr
33695872U, // LSL_WIDE_ZPmZ_B
2108552U, // LSL_WIDE_ZPmZ_H
33697920U, // LSL_WIDE_ZPmZ_S
6233U, // LSL_WIDE_ZZZ_B
184U, // LSL_WIDE_ZZZ_H
6233U, // LSL_WIDE_ZZZ_S
141440U, // LSL_ZPmI_B
137344U, // LSL_ZPmI_D
52309128U, // LSL_ZPmI_H
143488U, // LSL_ZPmI_S
16918656U, // LSL_ZPmZ_B
33691776U, // LSL_ZPmZ_D
50998408U, // LSL_ZPmZ_H
67252352U, // LSL_ZPmZ_S
3161U, // LSL_ZZI_B
3160U, // LSL_ZZI_D
224U, // LSL_ZZI_H
3161U, // LSL_ZZI_S
16918656U, // LSRR_ZPmZ_B
33691776U, // LSRR_ZPmZ_D
50998408U, // LSRR_ZPmZ_H
67252352U, // LSRR_ZPmZ_S
3160U, // LSRVWr
3160U, // LSRVXr
33695872U, // LSR_WIDE_ZPmZ_B
2108552U, // LSR_WIDE_ZPmZ_H
33697920U, // LSR_WIDE_ZPmZ_S
6233U, // LSR_WIDE_ZZZ_B
184U, // LSR_WIDE_ZZZ_H
6233U, // LSR_WIDE_ZZZ_S
141440U, // LSR_ZPmI_B
137344U, // LSR_ZPmI_D
52309128U, // LSR_ZPmI_H
143488U, // LSR_ZPmI_S
16918656U, // LSR_ZPmZ_B
33691776U, // LSR_ZPmZ_D
50998408U, // LSR_ZPmZ_H
67252352U, // LSR_ZPmZ_S
3161U, // LSR_ZZI_B
3160U, // LSR_ZZI_D
224U, // LSR_ZZI_H
3161U, // LSR_ZZI_S
640U, // LUTI2_2ZTZI_B
640U, // LUTI2_2ZTZI_H
640U, // LUTI2_2ZTZI_S
640U, // LUTI2_4ZTZI_B
640U, // LUTI2_4ZTZI_H
640U, // LUTI2_4ZTZI_S
69720U, // LUTI2_S_2ZTZI_B
69720U, // LUTI2_S_2ZTZI_H
640U, // LUTI2_S_4ZTZI_B
640U, // LUTI2_S_4ZTZI_H
69720U, // LUTI2_ZTZI_B
640U, // LUTI2_ZTZI_H
69720U, // LUTI2_ZTZI_S
640U, // LUTI4_2ZTZI_B
640U, // LUTI4_2ZTZI_H
640U, // LUTI4_2ZTZI_S
640U, // LUTI4_4ZTZI_H
640U, // LUTI4_4ZTZI_S
69720U, // LUTI4_S_2ZTZI_B
69720U, // LUTI4_S_2ZTZI_H
640U, // LUTI4_S_4ZTZI_H
69720U, // LUTI4_ZTZI_B
640U, // LUTI4_ZTZI_H
69720U, // LUTI4_ZTZI_S
134232U, // MADDWrrr
134232U, // MADDXrrr
70784U, // MAD_ZPmZZ_B
268567680U, // MAD_ZPmZZ_D
53226728U, // MAD_ZPmZZ_H
285345920U, // MAD_ZPmZZ_S
16918744U, // MATCH_PPzZZ_B
50998409U, // MATCH_PPzZZ_H
70784U, // MLA_ZPmZZ_B
268567680U, // MLA_ZPmZZ_D
53226728U, // MLA_ZPmZZ_H
285345920U, // MLA_ZPmZZ_S
52954200U, // MLA_ZZZI_D
41192U, // MLA_ZZZI_H
52955224U, // MLA_ZZZI_S
795792U, // MLAv16i8
926872U, // MLAv2i32
105260184U, // MLAv2i32_indexed
1057952U, // MLAv4i16
103425184U, // MLAv4i16_indexed
402544U, // MLAv4i32
105260144U, // MLAv4i32_indexed
533624U, // MLAv8i16
103425144U, // MLAv8i16_indexed
1189032U, // MLAv8i8
70784U, // MLS_ZPmZZ_B
268567680U, // MLS_ZPmZZ_D
53226728U, // MLS_ZPmZZ_H
285345920U, // MLS_ZPmZZ_S
52954200U, // MLS_ZZZI_D
41192U, // MLS_ZZZI_H
52955224U, // MLS_ZZZI_S
795792U, // MLSv16i8
926872U, // MLSv2i32
105260184U, // MLSv2i32_indexed
1057952U, // MLSv4i16
103425184U, // MLSv4i16_indexed
402544U, // MLSv4i32
105260144U, // MLSv4i32_indexed
533624U, // MLSv8i16
103425144U, // MLSv8i16_indexed
1189032U, // MLSv8i8
0U, // MOPSSETGE
0U, // MOPSSETGEN
0U, // MOPSSETGET
0U, // MOPSSETGETN
3U, // MOVAZ_2ZMI_H_B
3U, // MOVAZ_2ZMI_H_D
3U, // MOVAZ_2ZMI_H_H
3U, // MOVAZ_2ZMI_H_S
3U, // MOVAZ_2ZMI_V_B
3U, // MOVAZ_2ZMI_V_D
3U, // MOVAZ_2ZMI_V_H
3U, // MOVAZ_2ZMI_V_S
3U, // MOVAZ_4ZMI_H_B
3U, // MOVAZ_4ZMI_H_D
3U, // MOVAZ_4ZMI_H_H
3U, // MOVAZ_4ZMI_H_S
3U, // MOVAZ_4ZMI_V_B
3U, // MOVAZ_4ZMI_V_D
3U, // MOVAZ_4ZMI_V_H
3U, // MOVAZ_4ZMI_V_S
3U, // MOVAZ_VG2_2ZM
3U, // MOVAZ_VG4_4ZM
3U, // MOVAZ_ZMI_H_B
3U, // MOVAZ_ZMI_H_D
71770U, // MOVAZ_ZMI_H_H
71770U, // MOVAZ_ZMI_H_Q
3U, // MOVAZ_ZMI_H_S
3U, // MOVAZ_ZMI_V_B
3U, // MOVAZ_ZMI_V_D
71770U, // MOVAZ_ZMI_V_H
71770U, // MOVAZ_ZMI_V_Q
3U, // MOVAZ_ZMI_V_S
72793U, // MOVA_2ZMXI_H_B
72793U, // MOVA_2ZMXI_H_D
72793U, // MOVA_2ZMXI_H_H
72793U, // MOVA_2ZMXI_H_S
72793U, // MOVA_2ZMXI_V_B
72793U, // MOVA_2ZMXI_V_D
72793U, // MOVA_2ZMXI_V_H
72793U, // MOVA_2ZMXI_V_S
73817U, // MOVA_4ZMXI_H_B
73817U, // MOVA_4ZMXI_H_D
73817U, // MOVA_4ZMXI_H_H
73817U, // MOVA_4ZMXI_H_S
73817U, // MOVA_4ZMXI_V_B
73817U, // MOVA_4ZMXI_V_D
73817U, // MOVA_4ZMXI_V_H
73817U, // MOVA_4ZMXI_V_S
75400U, // MOVA_MXI2Z_H_B
76424U, // MOVA_MXI2Z_H_D
77448U, // MOVA_MXI2Z_H_H
78472U, // MOVA_MXI2Z_H_S
75400U, // MOVA_MXI2Z_V_B
76424U, // MOVA_MXI2Z_V_D
77448U, // MOVA_MXI2Z_V_H
78472U, // MOVA_MXI2Z_V_S
75408U, // MOVA_MXI4Z_H_B
76432U, // MOVA_MXI4Z_H_D
77456U, // MOVA_MXI4Z_H_H
78480U, // MOVA_MXI4Z_H_S
75408U, // MOVA_MXI4Z_V_B
76432U, // MOVA_MXI4Z_V_D
77456U, // MOVA_MXI4Z_V_H
78480U, // MOVA_MXI4Z_V_S
3U, // MOVA_VG2_2ZMXI
192U, // MOVA_VG2_MXI2Z
3U, // MOVA_VG4_4ZMXI
192U, // MOVA_VG4_MXI4Z
3U, // MOVID
3U, // MOVIv16b_ns
3U, // MOVIv2d_ns
667U, // MOVIv2i32
667U, // MOVIv2s_msl
667U, // MOVIv4i16
667U, // MOVIv4i32
667U, // MOVIv4s_msl
3U, // MOVIv8b_ns
667U, // MOVIv8i16
1U, // MOVKWi
1U, // MOVKXi
667U, // MOVNWi
667U, // MOVNXi
8U, // MOVPRFX_ZPmZ_B
16U, // MOVPRFX_ZPmZ_D
0U, // MOVPRFX_ZPmZ_H
24U, // MOVPRFX_ZPmZ_S
10456U, // MOVPRFX_ZPzZ_B
6360U, // MOVPRFX_ZPzZ_D
137U, // MOVPRFX_ZPzZ_H
12504U, // MOVPRFX_ZPzZ_S
0U, // MOVPRFX_ZZ
0U, // MOVT_TIX
672U, // MOVT_XTI
667U, // MOVZWi
667U, // MOVZXi
0U, // MRRS
3U, // MRS
70784U, // MSB_ZPmZZ_B
268567680U, // MSB_ZPmZZ_D
53226728U, // MSB_ZPmZZ_H
285345920U, // MSB_ZPmZZ_S
0U, // MSR
0U, // MSRR
0U, // MSRpstateImm1
0U, // MSRpstateImm4
0U, // MSRpstatesvcrImm1
134232U, // MSUBWrrr
134232U, // MSUBXrrr
3161U, // MUL_ZI_B
3160U, // MUL_ZI_D
224U, // MUL_ZI_H
3161U, // MUL_ZI_S
16918656U, // MUL_ZPmZ_B
33691776U, // MUL_ZPmZ_D
50998408U, // MUL_ZPmZ_H
67252352U, // MUL_ZPmZ_S
5118040U, // MUL_ZZZI_D
42120U, // MUL_ZZZI_H
5124185U, // MUL_ZZZI_S
10329U, // MUL_ZZZ_B
6232U, // MUL_ZZZ_D
136U, // MUL_ZZZ_H
12377U, // MUL_ZZZ_S
794768U, // MULv16i8
925848U, // MULv2i32
340140184U, // MULv2i32_indexed
1056928U, // MULv4i16
338305184U, // MULv4i16_indexed
401520U, // MULv4i32
340140144U, // MULv4i32_indexed
532600U, // MULv8i16
338305144U, // MULv8i16_indexed
1188008U, // MULv8i8
667U, // MVNIv2i32
667U, // MVNIv2s_msl
667U, // MVNIv4i16
667U, // MVNIv4i32
667U, // MVNIv4s_msl
667U, // MVNIv8i16
16918744U, // NANDS_PPzPP
16918744U, // NAND_PPzPP
33691736U, // NBSL_ZZZZ
8U, // NEG_ZPmZ_B
16U, // NEG_ZPmZ_D
0U, // NEG_ZPmZ_H
24U, // NEG_ZPmZ_S
32U, // NEGv16i8
0U, // NEGv1i64
40U, // NEGv2i32
48U, // NEGv2i64
56U, // NEGv4i16
64U, // NEGv4i32
72U, // NEGv8i16
80U, // NEGv8i8
16918744U, // NMATCH_PPzZZ_B
50998409U, // NMATCH_PPzZZ_H
16918744U, // NORS_PPzPP
16918744U, // NOR_PPzPP
8U, // NOT_ZPmZ_B
16U, // NOT_ZPmZ_D
0U, // NOT_ZPmZ_H
24U, // NOT_ZPmZ_S
32U, // NOTv16i8
80U, // NOTv8i8
16918744U, // ORNS_PPzPP
14424U, // ORNWrs
14424U, // ORNXrs
16918744U, // ORN_PPzPP
794768U, // ORNv16i8
1188008U, // ORNv8i8
10328U, // ORQV_VPZ_B
6232U, // ORQV_VPZ_D
5208U, // ORQV_VPZ_H
12376U, // ORQV_VPZ_S
16918744U, // ORRS_PPzPP
35928U, // ORRWri
14424U, // ORRWrs
36952U, // ORRXri
14424U, // ORRXrs
16918744U, // ORR_PPzPP
36952U, // ORR_ZI
16918656U, // ORR_ZPmZ_B
33691776U, // ORR_ZPmZ_D
50998408U, // ORR_ZPmZ_H
67252352U, // ORR_ZPmZ_S
6232U, // ORR_ZZZ
794768U, // ORRv16i8
1U, // ORRv2i32
1U, // ORRv4i16
1U, // ORRv4i32
1U, // ORRv8i16
1188008U, // ORRv8i8
0U, // ORV_VPZ_B
0U, // ORV_VPZ_D
0U, // ORV_VPZ_H
0U, // ORV_VPZ_S
1U, // PACDA
1U, // PACDB
0U, // PACDZA
0U, // PACDZB
3160U, // PACGA
1U, // PACIA
0U, // PACIA1716
0U, // PACIASP
0U, // PACIAZ
1U, // PACIB
0U, // PACIB1716
0U, // PACIBSP
0U, // PACIBZ
0U, // PACIZA
0U, // PACIZB
2U, // PEXT_2PCI_B
2U, // PEXT_2PCI_D
2U, // PEXT_2PCI_H
2U, // PEXT_2PCI_S
411U, // PEXT_PCI_B
411U, // PEXT_PCI_D
2U, // PEXT_PCI_H
411U, // PEXT_PCI_S
0U, // PFALSE
10328U, // PFIRST_B
408U, // PMOV_PZI_B
408U, // PMOV_PZI_D
2U, // PMOV_PZI_H
408U, // PMOV_PZI_S
3U, // PMOV_ZIP_B
2U, // PMOV_ZIP_D
0U, // PMOV_ZIP_H
1U, // PMOV_ZIP_S
12377U, // PMULLB_ZZZ_D
176U, // PMULLB_ZZZ_H
0U, // PMULLB_ZZZ_Q
12377U, // PMULLT_ZZZ_D
176U, // PMULLT_ZZZ_H
0U, // PMULLT_ZZZ_Q
794768U, // PMULLv16i8
4U, // PMULLv1i64
4U, // PMULLv2i64
1188008U, // PMULLv8i8
10329U, // PMUL_ZZZ_B
794768U, // PMULv16i8
1188008U, // PMULv8i8
10328U, // PNEXT_B
6232U, // PNEXT_D
136U, // PNEXT_H
12376U, // PNEXT_S
79240U, // PRFB_D_PZI
680U, // PRFB_D_SCALED
688U, // PRFB_D_SXTW_SCALED
696U, // PRFB_D_UXTW_SCALED
80264U, // PRFB_PRI
704U, // PRFB_PRR
79240U, // PRFB_S_PZI
712U, // PRFB_S_SXTW_SCALED
720U, // PRFB_S_UXTW_SCALED
728U, // PRFD_D_PZI
736U, // PRFD_D_SCALED
744U, // PRFD_D_SXTW_SCALED
752U, // PRFD_D_UXTW_SCALED
80264U, // PRFD_PRI
760U, // PRFD_PRR
728U, // PRFD_S_PZI
768U, // PRFD_S_SXTW_SCALED
776U, // PRFD_S_UXTW_SCALED
784U, // PRFH_D_PZI
792U, // PRFH_D_SCALED
800U, // PRFH_D_SXTW_SCALED
808U, // PRFH_D_UXTW_SCALED
80264U, // PRFH_PRI
816U, // PRFH_PRR
784U, // PRFH_S_PZI
824U, // PRFH_S_SXTW_SCALED
832U, // PRFH_S_UXTW_SCALED
1U, // PRFMl
537005144U, // PRFMroW
553782360U, // PRFMroX
65624U, // PRFMui
3148888U, // PRFUMi
840U, // PRFW_D_PZI
848U, // PRFW_D_SCALED
856U, // PRFW_D_SXTW_SCALED
864U, // PRFW_D_UXTW_SCALED
80264U, // PRFW_PRI
872U, // PRFW_PRR
840U, // PRFW_S_PZI
880U, // PRFW_S_SXTW_SCALED
888U, // PRFW_S_UXTW_SCALED
10365016U, // PSEL_PPPRI_B
10360920U, // PSEL_PPPRI_D
10359896U, // PSEL_PPPRI_H
10367064U, // PSEL_PPPRI_S
1U, // PTEST_PP
1U, // PTRUES_B
1U, // PTRUES_D
0U, // PTRUES_H
1U, // PTRUES_S
1U, // PTRUE_B
0U, // PTRUE_C_B
0U, // PTRUE_C_D
0U, // PTRUE_C_H
0U, // PTRUE_C_S
1U, // PTRUE_D
0U, // PTRUE_H
1U, // PTRUE_S
0U, // PUNPKHI_PP
0U, // PUNPKLO_PP
5208U, // RADDHNB_ZZZ_B
96U, // RADDHNB_ZZZ_H
6232U, // RADDHNB_ZZZ_S
7256U, // RADDHNT_ZZZ_B
24U, // RADDHNT_ZZZ_H
1112U, // RADDHNT_ZZZ_S
270440U, // RADDHNv2i64_v2i32
271464U, // RADDHNv2i64_v4i32
401520U, // RADDHNv4i32_v4i16
402544U, // RADDHNv4i32_v8i16
533624U, // RADDHNv8i16_v16i8
532600U, // RADDHNv8i16_v8i8
270440U, // RAX1
6232U, // RAX1_ZZZ_D
0U, // RBITWr
0U, // RBITXr
8U, // RBIT_ZPmZ_B
16U, // RBIT_ZPmZ_D
0U, // RBIT_ZPmZ_H
24U, // RBIT_ZPmZ_S
32U, // RBITv16i8
80U, // RBITv8i8
3189025U, // RCWCAS
3189025U, // RCWCASA
3189025U, // RCWCASAL
3189025U, // RCWCASL
0U, // RCWCASP
0U, // RCWCASPA
0U, // RCWCASPAL
0U, // RCWCASPL
3U, // RCWCLR
3U, // RCWCLRA
3U, // RCWCLRAL
3U, // RCWCLRL
60706U, // RCWCLRP
60706U, // RCWCLRPA
60706U, // RCWCLRPAL
60706U, // RCWCLRPL
3U, // RCWCLRS
3U, // RCWCLRSA
3U, // RCWCLRSAL
3U, // RCWCLRSL
60706U, // RCWCLRSP
60706U, // RCWCLRSPA
60706U, // RCWCLRSPAL
60706U, // RCWCLRSPL
3189025U, // RCWSCAS
3189025U, // RCWSCASA
3189025U, // RCWSCASAL
3189025U, // RCWSCASL
0U, // RCWSCASP
0U, // RCWSCASPA
0U, // RCWSCASPAL
0U, // RCWSCASPL
3U, // RCWSET
3U, // RCWSETA
3U, // RCWSETAL
3U, // RCWSETL
60706U, // RCWSETP
60706U, // RCWSETPA
60706U, // RCWSETPAL
60706U, // RCWSETPL
3U, // RCWSETS
3U, // RCWSETSA
3U, // RCWSETSAL
3U, // RCWSETSL
60706U, // RCWSETSP
60706U, // RCWSETSPA
60706U, // RCWSETSPAL
60706U, // RCWSETSPL
3U, // RCWSWP
3U, // RCWSWPA
3U, // RCWSWPAL
3U, // RCWSWPL
60706U, // RCWSWPP
60706U, // RCWSWPPA
60706U, // RCWSWPPAL
60706U, // RCWSWPPL
3U, // RCWSWPS
3U, // RCWSWPSA
3U, // RCWSWPSAL
3U, // RCWSWPSL
60706U, // RCWSWPSP
60706U, // RCWSWPSPA
60706U, // RCWSWPSPAL
60706U, // RCWSWPSPL
896U, // RDFFRS_PPz
896U, // RDFFR_PPz_REAL
0U, // RDFFR_P_REAL
0U, // RDSVLI_XI
0U, // RDVLI_XI
0U, // RET
0U, // RETAA
0U, // RETAB
0U, // REV16Wr
0U, // REV16Xr
32U, // REV16v16i8
80U, // REV16v8i8
0U, // REV32Xr
32U, // REV32v16i8
56U, // REV32v4i16
72U, // REV32v8i16
80U, // REV32v8i8
32U, // REV64v16i8
40U, // REV64v2i32
56U, // REV64v4i16
64U, // REV64v4i32
72U, // REV64v8i16
80U, // REV64v8i8
16U, // REVB_ZPmZ_D
0U, // REVB_ZPmZ_H
24U, // REVB_ZPmZ_S
4U, // REVD_ZPmZ
16U, // REVH_ZPmZ_D
24U, // REVH_ZPmZ_S
16U, // REVW_ZPmZ_D
0U, // REVWr
0U, // REVXr
1U, // REV_PP_B
0U, // REV_PP_D
0U, // REV_PP_H
1U, // REV_PP_S
1U, // REV_ZZ_B
0U, // REV_ZZ_D
0U, // REV_ZZ_H
1U, // REV_ZZ_S
3160U, // RMIF
3160U, // RORVWr
3160U, // RORVXr
0U, // RPRFM
3160U, // RSHRNB_ZZI_B
224U, // RSHRNB_ZZI_H
3160U, // RSHRNB_ZZI_S
43096U, // RSHRNT_ZZI_B
392U, // RSHRNT_ZZI_H
43096U, // RSHRNT_ZZI_S
43128U, // RSHRNv16i8_shift
3176U, // RSHRNv2i32_shift
3184U, // RSHRNv4i16_shift
43112U, // RSHRNv4i32_shift
43120U, // RSHRNv8i16_shift
3192U, // RSHRNv8i8_shift
5208U, // RSUBHNB_ZZZ_B
96U, // RSUBHNB_ZZZ_H
6232U, // RSUBHNB_ZZZ_S
7256U, // RSUBHNT_ZZZ_B
24U, // RSUBHNT_ZZZ_H
1112U, // RSUBHNT_ZZZ_S
270440U, // RSUBHNv2i64_v2i32
271464U, // RSUBHNv2i64_v4i32
401520U, // RSUBHNv4i32_v4i16
402544U, // RSUBHNv4i32_v8i16
533624U, // RSUBHNv8i16_v16i8
532600U, // RSUBHNv8i16_v8i8
2136U, // SABALB_ZZZ_D
8U, // SABALB_ZZZ_H
7256U, // SABALB_ZZZ_S
2136U, // SABALT_ZZZ_D
8U, // SABALT_ZZZ_H
7256U, // SABALT_ZZZ_S
795792U, // SABALv16i8_v8i16
926872U, // SABALv2i32_v2i64
1057952U, // SABALv4i16_v4i32
402544U, // SABALv4i32_v2i64
533624U, // SABALv8i16_v4i32
1189032U, // SABALv8i8_v8i16
9U, // SABA_ZZZ_B
1112U, // SABA_ZZZ_D
232U, // SABA_ZZZ_H
2136U, // SABA_ZZZ_S
795792U, // SABAv16i8
926872U, // SABAv2i32
1057952U, // SABAv4i16
402544U, // SABAv4i32
533624U, // SABAv8i16
1189032U, // SABAv8i8
12377U, // SABDLB_ZZZ_D
176U, // SABDLB_ZZZ_H
5208U, // SABDLB_ZZZ_S
12377U, // SABDLT_ZZZ_D
176U, // SABDLT_ZZZ_H
5208U, // SABDLT_ZZZ_S
794768U, // SABDLv16i8_v8i16
925848U, // SABDLv2i32_v2i64
1056928U, // SABDLv4i16_v4i32
401520U, // SABDLv4i32_v2i64
532600U, // SABDLv8i16_v4i32
1188008U, // SABDLv8i8_v8i16
16918656U, // SABD_ZPmZ_B
33691776U, // SABD_ZPmZ_D
50998408U, // SABD_ZPmZ_H
67252352U, // SABD_ZPmZ_S
794768U, // SABDv16i8
925848U, // SABDv2i32
1056928U, // SABDv4i16
401520U, // SABDv4i32
532600U, // SABDv8i16
1188008U, // SABDv8i8
2176U, // SADALP_ZPmZ_D
8U, // SADALP_ZPmZ_H
7296U, // SADALP_ZPmZ_S
32U, // SADALPv16i8_v8i16
40U, // SADALPv2i32_v1i64
56U, // SADALPv4i16_v2i32
64U, // SADALPv4i32_v2i64
72U, // SADALPv8i16_v4i32
80U, // SADALPv8i8_v4i16
12377U, // SADDLBT_ZZZ_D
176U, // SADDLBT_ZZZ_H
5208U, // SADDLBT_ZZZ_S
12377U, // SADDLB_ZZZ_D
176U, // SADDLB_ZZZ_H
5208U, // SADDLB_ZZZ_S
32U, // SADDLPv16i8_v8i16
40U, // SADDLPv2i32_v1i64
56U, // SADDLPv4i16_v2i32
64U, // SADDLPv4i32_v2i64
72U, // SADDLPv8i16_v4i32
80U, // SADDLPv8i8_v4i16
12377U, // SADDLT_ZZZ_D
176U, // SADDLT_ZZZ_H
5208U, // SADDLT_ZZZ_S
32U, // SADDLVv16i8v
56U, // SADDLVv4i16v
64U, // SADDLVv4i32v
72U, // SADDLVv8i16v
80U, // SADDLVv8i8v
794768U, // SADDLv16i8_v8i16
925848U, // SADDLv2i32_v2i64
1056928U, // SADDLv4i16_v4i32
401520U, // SADDLv4i32_v2i64
532600U, // SADDLv8i16_v4i32
1188008U, // SADDLv8i8_v8i16
0U, // SADDV_VPZ_B
0U, // SADDV_VPZ_H
0U, // SADDV_VPZ_S
12376U, // SADDWB_ZZZ_D
176U, // SADDWB_ZZZ_H
5209U, // SADDWB_ZZZ_S
12376U, // SADDWT_ZZZ_D
176U, // SADDWT_ZZZ_H
5209U, // SADDWT_ZZZ_S
794744U, // SADDWv16i8_v8i16
925800U, // SADDWv2i32_v2i64
1056880U, // SADDWv4i16_v4i32
401512U, // SADDWv4i32_v2i64
532592U, // SADDWv8i16_v4i32
1187960U, // SADDWv8i8_v8i16
0U, // SB
1112U, // SBCLB_ZZZ_D
2136U, // SBCLB_ZZZ_S
1112U, // SBCLT_ZZZ_D
2136U, // SBCLT_ZZZ_S
3160U, // SBCSWr
3160U, // SBCSXr
3160U, // SBCWr
3160U, // SBCXr
134232U, // SBFMWri
134232U, // SBFMXri
8U, // SCLAMP_VG2_2Z2Z_B
16U, // SCLAMP_VG2_2Z2Z_D
232U, // SCLAMP_VG2_2Z2Z_H
24U, // SCLAMP_VG2_2Z2Z_S
8U, // SCLAMP_VG4_4Z4Z_B
16U, // SCLAMP_VG4_4Z4Z_D
232U, // SCLAMP_VG4_4Z4Z_H
24U, // SCLAMP_VG4_4Z4Z_S
10329U, // SCLAMP_ZZZ_B
6232U, // SCLAMP_ZZZ_D
136U, // SCLAMP_ZZZ_H
12377U, // SCLAMP_ZZZ_S
3160U, // SCVTFSWDri
3160U, // SCVTFSWHri
3160U, // SCVTFSWSri
3160U, // SCVTFSXDri
3160U, // SCVTFSXHri
3160U, // SCVTFSXSri
0U, // SCVTFUWDri
0U, // SCVTFUWHri
0U, // SCVTFUWSri
0U, // SCVTFUXDri
0U, // SCVTFUXHri
0U, // SCVTFUXSri
0U, // SCVTF_2Z2Z_StoS
0U, // SCVTF_4Z4Z_StoS
16U, // SCVTF_ZPmZ_DtoD
2U, // SCVTF_ZPmZ_DtoH
16U, // SCVTF_ZPmZ_DtoS
0U, // SCVTF_ZPmZ_HtoH
24U, // SCVTF_ZPmZ_StoD
1U, // SCVTF_ZPmZ_StoH
24U, // SCVTF_ZPmZ_StoS
3160U, // SCVTFd
3160U, // SCVTFh
3160U, // SCVTFs
0U, // SCVTFv1i16
0U, // SCVTFv1i32
0U, // SCVTFv1i64
40U, // SCVTFv2f32
48U, // SCVTFv2f64
3224U, // SCVTFv2i32_shift
3176U, // SCVTFv2i64_shift
56U, // SCVTFv4f16
64U, // SCVTFv4f32
3232U, // SCVTFv4i16_shift
3184U, // SCVTFv4i32_shift
72U, // SCVTFv8f16
3192U, // SCVTFv8i16_shift
33691776U, // SDIVR_ZPmZ_D
67252352U, // SDIVR_ZPmZ_S
3160U, // SDIVWr
3160U, // SDIVXr
33691776U, // SDIV_ZPmZ_D
67252352U, // SDIV_ZPmZ_S
81800U, // SDOT_VG2_M2Z2Z_BtoS
38128U, // SDOT_VG2_M2Z2Z_HtoD
38128U, // SDOT_VG2_M2Z2Z_HtoS
2543496U, // SDOT_VG2_M2ZZI_BToS
2529520U, // SDOT_VG2_M2ZZI_HToS
2529520U, // SDOT_VG2_M2ZZI_HtoD
53128U, // SDOT_VG2_M2ZZ_BtoS
39152U, // SDOT_VG2_M2ZZ_HtoD
39152U, // SDOT_VG2_M2ZZ_HtoS
81800U, // SDOT_VG4_M4Z4Z_BtoS
38128U, // SDOT_VG4_M4Z4Z_HtoD
38128U, // SDOT_VG4_M4Z4Z_HtoS
2543496U, // SDOT_VG4_M4ZZI_BToS
2529520U, // SDOT_VG4_M4ZZI_HToS
2529520U, // SDOT_VG4_M4ZZI_HtoD
53128U, // SDOT_VG4_M4ZZ_BtoS
39152U, // SDOT_VG4_M4ZZ_HtoD
39152U, // SDOT_VG4_M4ZZ_HtoS
52960344U, // SDOT_ZZZI_D
52960344U, // SDOT_ZZZI_HtoS
40969U, // SDOT_ZZZI_S
7256U, // SDOT_ZZZ_D
7256U, // SDOT_ZZZ_HtoS
9U, // SDOT_ZZZ_S
10495120U, // SDOTlanev16i8
10495144U, // SDOTlanev8i8
795792U, // SDOTv16i8
1189032U, // SDOTv8i8
16918616U, // SEL_PPPP
10629008U, // SEL_VG2_2ZP2Z2Z_B
10759704U, // SEL_VG2_2ZP2Z2Z_D
10890488U, // SEL_VG2_2ZP2Z2Z_H
11021856U, // SEL_VG2_2ZP2Z2Z_S
10629008U, // SEL_VG4_4ZP4Z4Z_B
10759704U, // SEL_VG4_4ZP4Z4Z_D
10890488U, // SEL_VG4_4ZP4Z4Z_H
11021856U, // SEL_VG4_4ZP4Z4Z_S
16918616U, // SEL_ZPZZ_B
33691736U, // SEL_ZPZZ_D
50998408U, // SEL_ZPZZ_H
67252312U, // SEL_ZPZZ_S
0U, // SETE
0U, // SETEN
0U, // SETET
0U, // SETETN
0U, // SETF16
0U, // SETF8
0U, // SETFFR
0U, // SETGM
0U, // SETGMN
0U, // SETGMT
0U, // SETGMTN
0U, // SETGP
0U, // SETGPN
0U, // SETGPT
0U, // SETGPTN
0U, // SETM
0U, // SETMN
0U, // SETMT
0U, // SETMTN
0U, // SETP
0U, // SETPN
0U, // SETPT
0U, // SETPTN
402521U, // SHA1Crrr
0U, // SHA1Hrr
402521U, // SHA1Mrrr
402521U, // SHA1Prrr
402544U, // SHA1SU0rrr
64U, // SHA1SU1rr
402521U, // SHA256H2rrr
402521U, // SHA256Hrrr
64U, // SHA256SU0rr
402544U, // SHA256SU1rrr
271449U, // SHA512H
271449U, // SHA512H2
48U, // SHA512SU0
271464U, // SHA512SU1
16918656U, // SHADD_ZPmZ_B
33691776U, // SHADD_ZPmZ_D
50998408U, // SHADD_ZPmZ_H
67252352U, // SHADD_ZPmZ_S
794768U, // SHADDv16i8
925848U, // SHADDv2i32
1056928U, // SHADDv4i16
401520U, // SHADDv4i32
532600U, // SHADDv8i16
1188008U, // SHADDv8i8
920U, // SHLLv16i8
928U, // SHLLv2i32
936U, // SHLLv4i16
944U, // SHLLv4i32
952U, // SHLLv8i16
960U, // SHLLv8i8
3160U, // SHLd
3216U, // SHLv16i8_shift
3224U, // SHLv2i32_shift
3176U, // SHLv2i64_shift
3232U, // SHLv4i16_shift
3184U, // SHLv4i32_shift
3192U, // SHLv8i16_shift
3240U, // SHLv8i8_shift
3160U, // SHRNB_ZZI_B
224U, // SHRNB_ZZI_H
3160U, // SHRNB_ZZI_S
43096U, // SHRNT_ZZI_B
392U, // SHRNT_ZZI_H
43096U, // SHRNT_ZZI_S
43128U, // SHRNv16i8_shift
3176U, // SHRNv2i32_shift
3184U, // SHRNv4i16_shift
43112U, // SHRNv4i32_shift
43120U, // SHRNv8i16_shift
3192U, // SHRNv8i8_shift
16918656U, // SHSUBR_ZPmZ_B
33691776U, // SHSUBR_ZPmZ_D
50998408U, // SHSUBR_ZPmZ_H
67252352U, // SHSUBR_ZPmZ_S
16918656U, // SHSUB_ZPmZ_B
33691776U, // SHSUB_ZPmZ_D
50998408U, // SHSUB_ZPmZ_H
67252352U, // SHSUB_ZPmZ_S
794768U, // SHSUBv16i8
925848U, // SHSUBv2i32
1056928U, // SHSUBv4i16
401520U, // SHSUBv4i32
532600U, // SHSUBv8i16
1188008U, // SHSUBv8i8
393U, // SLI_ZZI_B
43096U, // SLI_ZZI_D
392U, // SLI_ZZI_H
43096U, // SLI_ZZI_S
43097U, // SLId
43152U, // SLIv16i8_shift
43160U, // SLIv2i32_shift
43112U, // SLIv2i64_shift
43168U, // SLIv4i16_shift
43120U, // SLIv4i32_shift
43128U, // SLIv8i16_shift
43176U, // SLIv8i8_shift
402544U, // SM3PARTW1
402544U, // SM3PARTW2
88088688U, // SM3SS1
105260144U, // SM3TT1A
105260144U, // SM3TT1B
105260144U, // SM3TT2A
105260144U, // SM3TT2B
64U, // SM4E
12377U, // SM4EKEY_ZZZ_S
401520U, // SM4ENCKEY
12377U, // SM4E_ZZZ_S
134232U, // SMADDLrrr
16918656U, // SMAXP_ZPmZ_B
33691776U, // SMAXP_ZPmZ_D
50998408U, // SMAXP_ZPmZ_H
67252352U, // SMAXP_ZPmZ_S
794768U, // SMAXPv16i8
925848U, // SMAXPv2i32
1056928U, // SMAXPv4i16
401520U, // SMAXPv4i32
532600U, // SMAXPv8i16
1188008U, // SMAXPv8i8
10328U, // SMAXQV_VPZ_B
6232U, // SMAXQV_VPZ_D
5208U, // SMAXQV_VPZ_H
12376U, // SMAXQV_VPZ_S
0U, // SMAXV_VPZ_B
0U, // SMAXV_VPZ_D
0U, // SMAXV_VPZ_H
0U, // SMAXV_VPZ_S
32U, // SMAXVv16i8v
56U, // SMAXVv4i16v
64U, // SMAXVv4i32v
72U, // SMAXVv8i16v
80U, // SMAXVv8i8v
3160U, // SMAXWri
3160U, // SMAXWrr
3160U, // SMAXXri
3160U, // SMAXXrr
912U, // SMAX_VG2_2Z2Z_B
536U, // SMAX_VG2_2Z2Z_D
248U, // SMAX_VG2_2Z2Z_H
544U, // SMAX_VG2_2Z2Z_S
176U, // SMAX_VG2_2ZZ_B
184U, // SMAX_VG2_2ZZ_D
136U, // SMAX_VG2_2ZZ_H
96U, // SMAX_VG2_2ZZ_S
912U, // SMAX_VG4_4Z4Z_B
536U, // SMAX_VG4_4Z4Z_D
248U, // SMAX_VG4_4Z4Z_H
544U, // SMAX_VG4_4Z4Z_S
176U, // SMAX_VG4_4ZZ_B
184U, // SMAX_VG4_4ZZ_D
136U, // SMAX_VG4_4ZZ_H
96U, // SMAX_VG4_4ZZ_S
3161U, // SMAX_ZI_B
3160U, // SMAX_ZI_D
224U, // SMAX_ZI_H
3161U, // SMAX_ZI_S
16918656U, // SMAX_ZPmZ_B
33691776U, // SMAX_ZPmZ_D
50998408U, // SMAX_ZPmZ_H
67252352U, // SMAX_ZPmZ_S
794768U, // SMAXv16i8
925848U, // SMAXv2i32
1056928U, // SMAXv4i16
401520U, // SMAXv4i32
532600U, // SMAXv8i16
1188008U, // SMAXv8i8
0U, // SMC
16918656U, // SMINP_ZPmZ_B
33691776U, // SMINP_ZPmZ_D
50998408U, // SMINP_ZPmZ_H
67252352U, // SMINP_ZPmZ_S
794768U, // SMINPv16i8
925848U, // SMINPv2i32
1056928U, // SMINPv4i16
401520U, // SMINPv4i32
532600U, // SMINPv8i16
1188008U, // SMINPv8i8
10328U, // SMINQV_VPZ_B
6232U, // SMINQV_VPZ_D
5208U, // SMINQV_VPZ_H
12376U, // SMINQV_VPZ_S
0U, // SMINV_VPZ_B
0U, // SMINV_VPZ_D
0U, // SMINV_VPZ_H
0U, // SMINV_VPZ_S
32U, // SMINVv16i8v
56U, // SMINVv4i16v
64U, // SMINVv4i32v
72U, // SMINVv8i16v
80U, // SMINVv8i8v
3160U, // SMINWri
3160U, // SMINWrr
3160U, // SMINXri
3160U, // SMINXrr
912U, // SMIN_VG2_2Z2Z_B
536U, // SMIN_VG2_2Z2Z_D
248U, // SMIN_VG2_2Z2Z_H
544U, // SMIN_VG2_2Z2Z_S
176U, // SMIN_VG2_2ZZ_B
184U, // SMIN_VG2_2ZZ_D
136U, // SMIN_VG2_2ZZ_H
96U, // SMIN_VG2_2ZZ_S
912U, // SMIN_VG4_4Z4Z_B
536U, // SMIN_VG4_4Z4Z_D
248U, // SMIN_VG4_4Z4Z_H
544U, // SMIN_VG4_4Z4Z_S
176U, // SMIN_VG4_4ZZ_B
184U, // SMIN_VG4_4ZZ_D
136U, // SMIN_VG4_4ZZ_H
96U, // SMIN_VG4_4ZZ_S
3161U, // SMIN_ZI_B
3160U, // SMIN_ZI_D
224U, // SMIN_ZI_H
3161U, // SMIN_ZI_S
16918656U, // SMIN_ZPmZ_B
33691776U, // SMIN_ZPmZ_D
50998408U, // SMIN_ZPmZ_H
67252352U, // SMIN_ZPmZ_S
794768U, // SMINv16i8
925848U, // SMINv2i32
1056928U, // SMINv4i16
401520U, // SMINv4i32
532600U, // SMINv8i16
1188008U, // SMINv8i8
52955224U, // SMLALB_ZZZI_D
52960344U, // SMLALB_ZZZI_S
2136U, // SMLALB_ZZZ_D
8U, // SMLALB_ZZZ_H
7256U, // SMLALB_ZZZ_S
40905U, // SMLALL_MZZI_BtoS
40193U, // SMLALL_MZZI_HtoD
969U, // SMLALL_MZZ_BtoS
257U, // SMLALL_MZZ_HtoD
81800U, // SMLALL_VG2_M2Z2Z_BtoS
38128U, // SMLALL_VG2_M2Z2Z_HtoD
2543496U, // SMLALL_VG2_M2ZZI_BtoS
2529520U, // SMLALL_VG2_M2ZZI_HtoD
53132U, // SMLALL_VG2_M2ZZ_BtoS
39156U, // SMLALL_VG2_M2ZZ_HtoD
81800U, // SMLALL_VG4_M4Z4Z_BtoS
38128U, // SMLALL_VG4_M4Z4Z_HtoD
2543496U, // SMLALL_VG4_M4ZZI_BtoS
2529520U, // SMLALL_VG4_M4ZZI_HtoD
53132U, // SMLALL_VG4_M4ZZ_BtoS
39156U, // SMLALL_VG4_M4ZZ_HtoD
52955224U, // SMLALT_ZZZI_D
52960344U, // SMLALT_ZZZI_S
2136U, // SMLALT_ZZZ_D
8U, // SMLALT_ZZZ_H
7256U, // SMLALT_ZZZ_S
40193U, // SMLAL_MZZI_S
257U, // SMLAL_MZZ_S
38128U, // SMLAL_VG2_M2Z2Z_S
2529520U, // SMLAL_VG2_M2ZZI_S
39152U, // SMLAL_VG2_M2ZZ_S
38128U, // SMLAL_VG4_M4Z4Z_S
2529520U, // SMLAL_VG4_M4ZZI_S
39152U, // SMLAL_VG4_M4ZZ_S
795792U, // SMLALv16i8_v8i16
105260184U, // SMLALv2i32_indexed
926872U, // SMLALv2i32_v2i64
103425184U, // SMLALv4i16_indexed
1057952U, // SMLALv4i16_v4i32
105260144U, // SMLALv4i32_indexed
402544U, // SMLALv4i32_v2i64
103425144U, // SMLALv8i16_indexed
533624U, // SMLALv8i16_v4i32
1189032U, // SMLALv8i8_v8i16
52955224U, // SMLSLB_ZZZI_D
52960344U, // SMLSLB_ZZZI_S
2136U, // SMLSLB_ZZZ_D
8U, // SMLSLB_ZZZ_H
7256U, // SMLSLB_ZZZ_S
40905U, // SMLSLL_MZZI_BtoS
40193U, // SMLSLL_MZZI_HtoD
969U, // SMLSLL_MZZ_BtoS
257U, // SMLSLL_MZZ_HtoD
81800U, // SMLSLL_VG2_M2Z2Z_BtoS
38128U, // SMLSLL_VG2_M2Z2Z_HtoD
2543496U, // SMLSLL_VG2_M2ZZI_BtoS
2529520U, // SMLSLL_VG2_M2ZZI_HtoD
53132U, // SMLSLL_VG2_M2ZZ_BtoS
39156U, // SMLSLL_VG2_M2ZZ_HtoD
81800U, // SMLSLL_VG4_M4Z4Z_BtoS
38128U, // SMLSLL_VG4_M4Z4Z_HtoD
2543496U, // SMLSLL_VG4_M4ZZI_BtoS
2529520U, // SMLSLL_VG4_M4ZZI_HtoD
53132U, // SMLSLL_VG4_M4ZZ_BtoS
39156U, // SMLSLL_VG4_M4ZZ_HtoD
52955224U, // SMLSLT_ZZZI_D
52960344U, // SMLSLT_ZZZI_S
2136U, // SMLSLT_ZZZ_D
8U, // SMLSLT_ZZZ_H
7256U, // SMLSLT_ZZZ_S
40193U, // SMLSL_MZZI_S
257U, // SMLSL_MZZ_S
38128U, // SMLSL_VG2_M2Z2Z_S
2529520U, // SMLSL_VG2_M2ZZI_S
39152U, // SMLSL_VG2_M2ZZ_S
38128U, // SMLSL_VG4_M4Z4Z_S
2529520U, // SMLSL_VG4_M4ZZI_S
39152U, // SMLSL_VG4_M4ZZ_S
795792U, // SMLSLv16i8_v8i16
105260184U, // SMLSLv2i32_indexed
926872U, // SMLSLv2i32_v2i64
103425184U, // SMLSLv4i16_indexed
1057952U, // SMLSLv4i16_v4i32
105260144U, // SMLSLv4i32_indexed
402544U, // SMLSLv4i32_v2i64
103425144U, // SMLSLv8i16_indexed
533624U, // SMLSLv8i16_v4i32
1189032U, // SMLSLv8i8_v8i16
795792U, // SMMLA
9U, // SMMLA_ZZZ
0U, // SMOPA_MPPZZ_D
0U, // SMOPA_MPPZZ_HtoS
0U, // SMOPA_MPPZZ_S
0U, // SMOPS_MPPZZ_D
0U, // SMOPS_MPPZZ_HtoS
0U, // SMOPS_MPPZZ_S
47520U, // SMOVvi16to32
47520U, // SMOVvi16to32_idx0
47520U, // SMOVvi16to64
47520U, // SMOVvi16to64_idx0
47528U, // SMOVvi32to64
47528U, // SMOVvi32to64_idx0
47544U, // SMOVvi8to32
47544U, // SMOVvi8to32_idx0
47544U, // SMOVvi8to64
47544U, // SMOVvi8to64_idx0
134232U, // SMSUBLrrr
16918656U, // SMULH_ZPmZ_B
33691776U, // SMULH_ZPmZ_D
50998408U, // SMULH_ZPmZ_H
67252352U, // SMULH_ZPmZ_S
10329U, // SMULH_ZZZ_B
6232U, // SMULH_ZZZ_D
136U, // SMULH_ZZZ_H
12377U, // SMULH_ZZZ_S
3160U, // SMULHrr
5124185U, // SMULLB_ZZZI_D
5117016U, // SMULLB_ZZZI_S
12377U, // SMULLB_ZZZ_D
176U, // SMULLB_ZZZ_H
5208U, // SMULLB_ZZZ_S
5124185U, // SMULLT_ZZZI_D
5117016U, // SMULLT_ZZZI_S
12377U, // SMULLT_ZZZ_D
176U, // SMULLT_ZZZ_H
5208U, // SMULLT_ZZZ_S
794768U, // SMULLv16i8_v8i16
340140184U, // SMULLv2i32_indexed
925848U, // SMULLv2i32_v2i64
338305184U, // SMULLv4i16_indexed
1056928U, // SMULLv4i16_v4i32
340140144U, // SMULLv4i32_indexed
401520U, // SMULLv4i32_v2i64
338305144U, // SMULLv8i16_indexed
532600U, // SMULLv8i16_v4i32
1188008U, // SMULLv8i8_v8i16
82008U, // SPLICE_ZPZZ_B
83032U, // SPLICE_ZPZZ_D
248U, // SPLICE_ZPZZ_H
84056U, // SPLICE_ZPZZ_S
16918616U, // SPLICE_ZPZ_B
33691736U, // SPLICE_ZPZ_D
50998408U, // SPLICE_ZPZ_H
67252312U, // SPLICE_ZPZ_S
8U, // SQABS_ZPmZ_B
16U, // SQABS_ZPmZ_D
0U, // SQABS_ZPmZ_H
24U, // SQABS_ZPmZ_S
32U, // SQABSv16i8
0U, // SQABSv1i16
0U, // SQABSv1i32
0U, // SQABSv1i64
0U, // SQABSv1i8
40U, // SQABSv2i32
48U, // SQABSv2i64
56U, // SQABSv4i16
64U, // SQABSv4i32
72U, // SQABSv8i16
80U, // SQABSv8i8
16473U, // SQADD_ZI_B
17496U, // SQADD_ZI_D
208U, // SQADD_ZI_H
18521U, // SQADD_ZI_S
16918656U, // SQADD_ZPmZ_B
33691776U, // SQADD_ZPmZ_D
50998408U, // SQADD_ZPmZ_H
67252352U, // SQADD_ZPmZ_S
10329U, // SQADD_ZZZ_B
6232U, // SQADD_ZZZ_D
136U, // SQADD_ZZZ_H
12377U, // SQADD_ZZZ_S
794768U, // SQADDv16i8
3160U, // SQADDv1i16
3160U, // SQADDv1i32
3160U, // SQADDv1i64
3160U, // SQADDv1i8
925848U, // SQADDv2i32
270440U, // SQADDv2i64
1056928U, // SQADDv4i16
401520U, // SQADDv4i32
532600U, // SQADDv8i16
1188008U, // SQADDv8i8
134359129U, // SQCADD_ZZI_B
134355032U, // SQCADD_ZZI_D
3026056U, // SQCADD_ZZI_H
134361177U, // SQCADD_ZZI_S
0U, // SQCVTN_Z2Z_StoH
0U, // SQCVTN_Z4Z_DtoH
4U, // SQCVTN_Z4Z_StoB
0U, // SQCVTUN_Z2Z_StoH
0U, // SQCVTUN_Z4Z_DtoH
4U, // SQCVTUN_Z4Z_StoB
0U, // SQCVTU_Z2Z_StoH
0U, // SQCVTU_Z4Z_DtoH
4U, // SQCVTU_Z4Z_StoB
0U, // SQCVT_Z2Z_StoH
0U, // SQCVT_Z4Z_DtoH
4U, // SQCVT_Z4Z_StoB
2U, // SQDECB_XPiI
4U, // SQDECB_XPiWdI
2U, // SQDECD_XPiI
4U, // SQDECD_XPiWdI
2U, // SQDECD_ZPiI
2U, // SQDECH_XPiI
4U, // SQDECH_XPiWdI
0U, // SQDECH_ZPiI
85081U, // SQDECP_XPWd_B
85080U, // SQDECP_XPWd_D
85080U, // SQDECP_XPWd_H
85081U, // SQDECP_XPWd_S
1U, // SQDECP_XP_B
0U, // SQDECP_XP_D
0U, // SQDECP_XP_H
1U, // SQDECP_XP_S
0U, // SQDECP_ZP_D
0U, // SQDECP_ZP_H
0U, // SQDECP_ZP_S
2U, // SQDECW_XPiI
4U, // SQDECW_XPiWdI
2U, // SQDECW_ZPiI
2136U, // SQDMLALBT_ZZZ_D
8U, // SQDMLALBT_ZZZ_H
7256U, // SQDMLALBT_ZZZ_S
52955224U, // SQDMLALB_ZZZI_D
52960344U, // SQDMLALB_ZZZI_S
2136U, // SQDMLALB_ZZZ_D
8U, // SQDMLALB_ZZZ_H
7256U, // SQDMLALB_ZZZ_S
52955224U, // SQDMLALT_ZZZI_D
52960344U, // SQDMLALT_ZZZI_S
2136U, // SQDMLALT_ZZZ_D
8U, // SQDMLALT_ZZZ_H
7256U, // SQDMLALT_ZZZ_S
43097U, // SQDMLALi16
43097U, // SQDMLALi32
103425113U, // SQDMLALv1i32_indexed
105260121U, // SQDMLALv1i64_indexed
105260184U, // SQDMLALv2i32_indexed
926872U, // SQDMLALv2i32_v2i64
103425184U, // SQDMLALv4i16_indexed
1057952U, // SQDMLALv4i16_v4i32
105260144U, // SQDMLALv4i32_indexed
402544U, // SQDMLALv4i32_v2i64
103425144U, // SQDMLALv8i16_indexed
533624U, // SQDMLALv8i16_v4i32
2136U, // SQDMLSLBT_ZZZ_D
8U, // SQDMLSLBT_ZZZ_H
7256U, // SQDMLSLBT_ZZZ_S
52955224U, // SQDMLSLB_ZZZI_D
52960344U, // SQDMLSLB_ZZZI_S
2136U, // SQDMLSLB_ZZZ_D
8U, // SQDMLSLB_ZZZ_H
7256U, // SQDMLSLB_ZZZ_S
52955224U, // SQDMLSLT_ZZZI_D
52960344U, // SQDMLSLT_ZZZI_S
2136U, // SQDMLSLT_ZZZ_D
8U, // SQDMLSLT_ZZZ_H
7256U, // SQDMLSLT_ZZZ_S
43097U, // SQDMLSLi16
43097U, // SQDMLSLi32
103425113U, // SQDMLSLv1i32_indexed
105260121U, // SQDMLSLv1i64_indexed
105260184U, // SQDMLSLv2i32_indexed
926872U, // SQDMLSLv2i32_v2i64
103425184U, // SQDMLSLv4i16_indexed
1057952U, // SQDMLSLv4i16_v4i32
105260144U, // SQDMLSLv4i32_indexed
402544U, // SQDMLSLv4i32_v2i64
103425144U, // SQDMLSLv8i16_indexed
533624U, // SQDMLSLv8i16_v4i32
912U, // SQDMULH_VG2_2Z2Z_B
536U, // SQDMULH_VG2_2Z2Z_D
248U, // SQDMULH_VG2_2Z2Z_H
544U, // SQDMULH_VG2_2Z2Z_S
176U, // SQDMULH_VG2_2ZZ_B
184U, // SQDMULH_VG2_2ZZ_D
136U, // SQDMULH_VG2_2ZZ_H
96U, // SQDMULH_VG2_2ZZ_S
912U, // SQDMULH_VG4_4Z4Z_B
536U, // SQDMULH_VG4_4Z4Z_D
248U, // SQDMULH_VG4_4Z4Z_H
544U, // SQDMULH_VG4_4Z4Z_S
176U, // SQDMULH_VG4_4ZZ_B
184U, // SQDMULH_VG4_4ZZ_D
136U, // SQDMULH_VG4_4ZZ_H
96U, // SQDMULH_VG4_4ZZ_S
5118040U, // SQDMULH_ZZZI_D
42120U, // SQDMULH_ZZZI_H
5124185U, // SQDMULH_ZZZI_S
10329U, // SQDMULH_ZZZ_B
6232U, // SQDMULH_ZZZ_D
136U, // SQDMULH_ZZZ_H
12377U, // SQDMULH_ZZZ_S
3160U, // SQDMULHv1i16
338305112U, // SQDMULHv1i16_indexed
3160U, // SQDMULHv1i32
340140120U, // SQDMULHv1i32_indexed
925848U, // SQDMULHv2i32
340140184U, // SQDMULHv2i32_indexed
1056928U, // SQDMULHv4i16
338305184U, // SQDMULHv4i16_indexed
401520U, // SQDMULHv4i32
340140144U, // SQDMULHv4i32_indexed
532600U, // SQDMULHv8i16
338305144U, // SQDMULHv8i16_indexed
5124185U, // SQDMULLB_ZZZI_D
5117016U, // SQDMULLB_ZZZI_S
12377U, // SQDMULLB_ZZZ_D
176U, // SQDMULLB_ZZZ_H
5208U, // SQDMULLB_ZZZ_S
5124185U, // SQDMULLT_ZZZI_D
5117016U, // SQDMULLT_ZZZI_S
12377U, // SQDMULLT_ZZZ_D
176U, // SQDMULLT_ZZZ_H
5208U, // SQDMULLT_ZZZ_S
3160U, // SQDMULLi16
3160U, // SQDMULLi32
338305112U, // SQDMULLv1i32_indexed
340140120U, // SQDMULLv1i64_indexed
340140184U, // SQDMULLv2i32_indexed
925848U, // SQDMULLv2i32_v2i64
338305184U, // SQDMULLv4i16_indexed
1056928U, // SQDMULLv4i16_v4i32
340140144U, // SQDMULLv4i32_indexed
401520U, // SQDMULLv4i32_v2i64
338305144U, // SQDMULLv8i16_indexed
532600U, // SQDMULLv8i16_v4i32
2U, // SQINCB_XPiI
4U, // SQINCB_XPiWdI
2U, // SQINCD_XPiI
4U, // SQINCD_XPiWdI
2U, // SQINCD_ZPiI
2U, // SQINCH_XPiI
4U, // SQINCH_XPiWdI
0U, // SQINCH_ZPiI
85081U, // SQINCP_XPWd_B
85080U, // SQINCP_XPWd_D
85080U, // SQINCP_XPWd_H
85081U, // SQINCP_XPWd_S
1U, // SQINCP_XP_B
0U, // SQINCP_XP_D
0U, // SQINCP_XP_H
1U, // SQINCP_XP_S
0U, // SQINCP_ZP_D
0U, // SQINCP_ZP_H
0U, // SQINCP_ZP_S
2U, // SQINCW_XPiI
4U, // SQINCW_XPiWdI
2U, // SQINCW_ZPiI
8U, // SQNEG_ZPmZ_B
16U, // SQNEG_ZPmZ_D
0U, // SQNEG_ZPmZ_H
24U, // SQNEG_ZPmZ_S
32U, // SQNEGv16i8
0U, // SQNEGv1i16
0U, // SQNEGv1i32
0U, // SQNEGv1i64
0U, // SQNEGv1i8
40U, // SQNEGv2i32
48U, // SQNEGv2i64
56U, // SQNEGv4i16
64U, // SQNEGv4i32
72U, // SQNEGv8i16
80U, // SQNEGv8i8
184721640U, // SQRDCMLAH_ZZZI_H
170395736U, // SQRDCMLAH_ZZZI_S
3288073U, // SQRDCMLAH_ZZZ_B
201458776U, // SQRDCMLAH_ZZZ_D
3288296U, // SQRDCMLAH_ZZZ_H
201459800U, // SQRDCMLAH_ZZZ_S
52954200U, // SQRDMLAH_ZZZI_D
41192U, // SQRDMLAH_ZZZI_H
52955224U, // SQRDMLAH_ZZZI_S
9U, // SQRDMLAH_ZZZ_B
1112U, // SQRDMLAH_ZZZ_D
232U, // SQRDMLAH_ZZZ_H
2136U, // SQRDMLAH_ZZZ_S
103425113U, // SQRDMLAHi16_indexed
105260121U, // SQRDMLAHi32_indexed
43097U, // SQRDMLAHv1i16
43097U, // SQRDMLAHv1i32
926872U, // SQRDMLAHv2i32
105260184U, // SQRDMLAHv2i32_indexed
1057952U, // SQRDMLAHv4i16
103425184U, // SQRDMLAHv4i16_indexed
402544U, // SQRDMLAHv4i32
105260144U, // SQRDMLAHv4i32_indexed
533624U, // SQRDMLAHv8i16
103425144U, // SQRDMLAHv8i16_indexed
52954200U, // SQRDMLSH_ZZZI_D
41192U, // SQRDMLSH_ZZZI_H
52955224U, // SQRDMLSH_ZZZI_S
9U, // SQRDMLSH_ZZZ_B
1112U, // SQRDMLSH_ZZZ_D
232U, // SQRDMLSH_ZZZ_H
2136U, // SQRDMLSH_ZZZ_S
103425113U, // SQRDMLSHi16_indexed
105260121U, // SQRDMLSHi32_indexed
43097U, // SQRDMLSHv1i16
43097U, // SQRDMLSHv1i32
926872U, // SQRDMLSHv2i32
105260184U, // SQRDMLSHv2i32_indexed
1057952U, // SQRDMLSHv4i16
103425184U, // SQRDMLSHv4i16_indexed
402544U, // SQRDMLSHv4i32
105260144U, // SQRDMLSHv4i32_indexed
533624U, // SQRDMLSHv8i16
103425144U, // SQRDMLSHv8i16_indexed
5118040U, // SQRDMULH_ZZZI_D
42120U, // SQRDMULH_ZZZI_H
5124185U, // SQRDMULH_ZZZI_S
10329U, // SQRDMULH_ZZZ_B
6232U, // SQRDMULH_ZZZ_D
136U, // SQRDMULH_ZZZ_H
12377U, // SQRDMULH_ZZZ_S
3160U, // SQRDMULHv1i16
338305112U, // SQRDMULHv1i16_indexed
3160U, // SQRDMULHv1i32
340140120U, // SQRDMULHv1i32_indexed
925848U, // SQRDMULHv2i32
340140184U, // SQRDMULHv2i32_indexed
1056928U, // SQRDMULHv4i16
338305184U, // SQRDMULHv4i16_indexed
401520U, // SQRDMULHv4i32
340140144U, // SQRDMULHv4i32_indexed
532600U, // SQRDMULHv8i16
338305144U, // SQRDMULHv8i16_indexed
16918656U, // SQRSHLR_ZPmZ_B
33691776U, // SQRSHLR_ZPmZ_D
50998408U, // SQRSHLR_ZPmZ_H
67252352U, // SQRSHLR_ZPmZ_S
16918656U, // SQRSHL_ZPmZ_B
33691776U, // SQRSHL_ZPmZ_D
50998408U, // SQRSHL_ZPmZ_H
67252352U, // SQRSHL_ZPmZ_S
794768U, // SQRSHLv16i8
3160U, // SQRSHLv1i16
3160U, // SQRSHLv1i32
3160U, // SQRSHLv1i64
3160U, // SQRSHLv1i8
925848U, // SQRSHLv2i32
270440U, // SQRSHLv2i64
1056928U, // SQRSHLv4i16
401520U, // SQRSHLv4i32
532600U, // SQRSHLv8i16
1188008U, // SQRSHLv8i8
3160U, // SQRSHRNB_ZZI_B
224U, // SQRSHRNB_ZZI_H
3160U, // SQRSHRNB_ZZI_S
43096U, // SQRSHRNT_ZZI_B
392U, // SQRSHRNT_ZZI_H
43096U, // SQRSHRNT_ZZI_S
3164U, // SQRSHRN_VG4_Z4ZI_B
224U, // SQRSHRN_VG4_Z4ZI_H
3160U, // SQRSHRNb
3160U, // SQRSHRNh
3160U, // SQRSHRNs
43128U, // SQRSHRNv16i8_shift
3176U, // SQRSHRNv2i32_shift
3184U, // SQRSHRNv4i16_shift
43112U, // SQRSHRNv4i32_shift
43120U, // SQRSHRNv8i16_shift
3192U, // SQRSHRNv8i8_shift
3160U, // SQRSHRUNB_ZZI_B
224U, // SQRSHRUNB_ZZI_H
3160U, // SQRSHRUNB_ZZI_S
43096U, // SQRSHRUNT_ZZI_B
392U, // SQRSHRUNT_ZZI_H
43096U, // SQRSHRUNT_ZZI_S
3164U, // SQRSHRUN_VG4_Z4ZI_B
224U, // SQRSHRUN_VG4_Z4ZI_H
3160U, // SQRSHRUNb
3160U, // SQRSHRUNh
3160U, // SQRSHRUNs
43128U, // SQRSHRUNv16i8_shift
3176U, // SQRSHRUNv2i32_shift
3184U, // SQRSHRUNv4i16_shift
43112U, // SQRSHRUNv4i32_shift
43120U, // SQRSHRUNv8i16_shift
3192U, // SQRSHRUNv8i8_shift
224U, // SQRSHRU_VG2_Z2ZI_H
3164U, // SQRSHRU_VG4_Z4ZI_B
224U, // SQRSHRU_VG4_Z4ZI_H
224U, // SQRSHR_VG2_Z2ZI_H
3164U, // SQRSHR_VG4_Z4ZI_B
224U, // SQRSHR_VG4_Z4ZI_H
16918656U, // SQSHLR_ZPmZ_B
33691776U, // SQSHLR_ZPmZ_D
50998408U, // SQSHLR_ZPmZ_H
67252352U, // SQSHLR_ZPmZ_S
141440U, // SQSHLU_ZPmI_B
137344U, // SQSHLU_ZPmI_D
52309128U, // SQSHLU_ZPmI_H
143488U, // SQSHLU_ZPmI_S
3160U, // SQSHLUb
3160U, // SQSHLUd
3160U, // SQSHLUh
3160U, // SQSHLUs
3216U, // SQSHLUv16i8_shift
3224U, // SQSHLUv2i32_shift
3176U, // SQSHLUv2i64_shift
3232U, // SQSHLUv4i16_shift
3184U, // SQSHLUv4i32_shift
3192U, // SQSHLUv8i16_shift
3240U, // SQSHLUv8i8_shift
141440U, // SQSHL_ZPmI_B
137344U, // SQSHL_ZPmI_D
52309128U, // SQSHL_ZPmI_H
143488U, // SQSHL_ZPmI_S
16918656U, // SQSHL_ZPmZ_B
33691776U, // SQSHL_ZPmZ_D
50998408U, // SQSHL_ZPmZ_H
67252352U, // SQSHL_ZPmZ_S
3160U, // SQSHLb
3160U, // SQSHLd
3160U, // SQSHLh
3160U, // SQSHLs
794768U, // SQSHLv16i8
3216U, // SQSHLv16i8_shift
3160U, // SQSHLv1i16
3160U, // SQSHLv1i32
3160U, // SQSHLv1i64
3160U, // SQSHLv1i8
925848U, // SQSHLv2i32
3224U, // SQSHLv2i32_shift
270440U, // SQSHLv2i64
3176U, // SQSHLv2i64_shift
1056928U, // SQSHLv4i16
3232U, // SQSHLv4i16_shift
401520U, // SQSHLv4i32
3184U, // SQSHLv4i32_shift
532600U, // SQSHLv8i16
3192U, // SQSHLv8i16_shift
1188008U, // SQSHLv8i8
3240U, // SQSHLv8i8_shift
3160U, // SQSHRNB_ZZI_B
224U, // SQSHRNB_ZZI_H
3160U, // SQSHRNB_ZZI_S
43096U, // SQSHRNT_ZZI_B
392U, // SQSHRNT_ZZI_H
43096U, // SQSHRNT_ZZI_S
3160U, // SQSHRNb
3160U, // SQSHRNh
3160U, // SQSHRNs
43128U, // SQSHRNv16i8_shift
3176U, // SQSHRNv2i32_shift
3184U, // SQSHRNv4i16_shift
43112U, // SQSHRNv4i32_shift
43120U, // SQSHRNv8i16_shift
3192U, // SQSHRNv8i8_shift
3160U, // SQSHRUNB_ZZI_B
224U, // SQSHRUNB_ZZI_H
3160U, // SQSHRUNB_ZZI_S
43096U, // SQSHRUNT_ZZI_B
392U, // SQSHRUNT_ZZI_H
43096U, // SQSHRUNT_ZZI_S
3160U, // SQSHRUNb
3160U, // SQSHRUNh
3160U, // SQSHRUNs
43128U, // SQSHRUNv16i8_shift
3176U, // SQSHRUNv2i32_shift
3184U, // SQSHRUNv4i16_shift
43112U, // SQSHRUNv4i32_shift
43120U, // SQSHRUNv8i16_shift
3192U, // SQSHRUNv8i8_shift
16918656U, // SQSUBR_ZPmZ_B
33691776U, // SQSUBR_ZPmZ_D
50998408U, // SQSUBR_ZPmZ_H
67252352U, // SQSUBR_ZPmZ_S
16473U, // SQSUB_ZI_B
17496U, // SQSUB_ZI_D
208U, // SQSUB_ZI_H
18521U, // SQSUB_ZI_S
16918656U, // SQSUB_ZPmZ_B
33691776U, // SQSUB_ZPmZ_D
50998408U, // SQSUB_ZPmZ_H
67252352U, // SQSUB_ZPmZ_S
10329U, // SQSUB_ZZZ_B
6232U, // SQSUB_ZZZ_D
136U, // SQSUB_ZZZ_H
12377U, // SQSUB_ZZZ_S
794768U, // SQSUBv16i8
3160U, // SQSUBv1i16
3160U, // SQSUBv1i32
3160U, // SQSUBv1i64
3160U, // SQSUBv1i8
925848U, // SQSUBv2i32
270440U, // SQSUBv2i64
1056928U, // SQSUBv4i16
401520U, // SQSUBv4i32
532600U, // SQSUBv8i16
1188008U, // SQSUBv8i8
0U, // SQXTNB_ZZ_B
0U, // SQXTNB_ZZ_H
0U, // SQXTNB_ZZ_S
0U, // SQXTNT_ZZ_B
0U, // SQXTNT_ZZ_H
0U, // SQXTNT_ZZ_S
72U, // SQXTNv16i8
0U, // SQXTNv1i16
0U, // SQXTNv1i32
0U, // SQXTNv1i8
48U, // SQXTNv2i32
64U, // SQXTNv4i16
48U, // SQXTNv4i32
64U, // SQXTNv8i16
72U, // SQXTNv8i8
0U, // SQXTUNB_ZZ_B
0U, // SQXTUNB_ZZ_H
0U, // SQXTUNB_ZZ_S
0U, // SQXTUNT_ZZ_B
0U, // SQXTUNT_ZZ_H
0U, // SQXTUNT_ZZ_S
72U, // SQXTUNv16i8
0U, // SQXTUNv1i16
0U, // SQXTUNv1i32
0U, // SQXTUNv1i8
48U, // SQXTUNv2i32
64U, // SQXTUNv4i16
48U, // SQXTUNv4i32
64U, // SQXTUNv8i16
72U, // SQXTUNv8i8
16918656U, // SRHADD_ZPmZ_B
33691776U, // SRHADD_ZPmZ_D
50998408U, // SRHADD_ZPmZ_H
67252352U, // SRHADD_ZPmZ_S
794768U, // SRHADDv16i8
925848U, // SRHADDv2i32
1056928U, // SRHADDv4i16
401520U, // SRHADDv4i32
532600U, // SRHADDv8i16
1188008U, // SRHADDv8i8
393U, // SRI_ZZI_B
43096U, // SRI_ZZI_D
392U, // SRI_ZZI_H
43096U, // SRI_ZZI_S
43097U, // SRId
43152U, // SRIv16i8_shift
43160U, // SRIv2i32_shift
43112U, // SRIv2i64_shift
43168U, // SRIv4i16_shift
43120U, // SRIv4i32_shift
43128U, // SRIv8i16_shift
43176U, // SRIv8i8_shift
16918656U, // SRSHLR_ZPmZ_B
33691776U, // SRSHLR_ZPmZ_D
50998408U, // SRSHLR_ZPmZ_H
67252352U, // SRSHLR_ZPmZ_S
912U, // SRSHL_VG2_2Z2Z_B
536U, // SRSHL_VG2_2Z2Z_D
248U, // SRSHL_VG2_2Z2Z_H
544U, // SRSHL_VG2_2Z2Z_S
176U, // SRSHL_VG2_2ZZ_B
184U, // SRSHL_VG2_2ZZ_D
136U, // SRSHL_VG2_2ZZ_H
96U, // SRSHL_VG2_2ZZ_S
912U, // SRSHL_VG4_4Z4Z_B
536U, // SRSHL_VG4_4Z4Z_D
248U, // SRSHL_VG4_4Z4Z_H
544U, // SRSHL_VG4_4Z4Z_S
176U, // SRSHL_VG4_4ZZ_B
184U, // SRSHL_VG4_4ZZ_D
136U, // SRSHL_VG4_4ZZ_H
96U, // SRSHL_VG4_4ZZ_S
16918656U, // SRSHL_ZPmZ_B
33691776U, // SRSHL_ZPmZ_D
50998408U, // SRSHL_ZPmZ_H
67252352U, // SRSHL_ZPmZ_S
794768U, // SRSHLv16i8
3160U, // SRSHLv1i64
925848U, // SRSHLv2i32
270440U, // SRSHLv2i64
1056928U, // SRSHLv4i16
401520U, // SRSHLv4i32
532600U, // SRSHLv8i16
1188008U, // SRSHLv8i8
141440U, // SRSHR_ZPmI_B
137344U, // SRSHR_ZPmI_D
52309128U, // SRSHR_ZPmI_H
143488U, // SRSHR_ZPmI_S
3160U, // SRSHRd
3216U, // SRSHRv16i8_shift
3224U, // SRSHRv2i32_shift
3176U, // SRSHRv2i64_shift
3232U, // SRSHRv4i16_shift
3184U, // SRSHRv4i32_shift
3192U, // SRSHRv8i16_shift
3240U, // SRSHRv8i8_shift
393U, // SRSRA_ZZI_B
43096U, // SRSRA_ZZI_D
392U, // SRSRA_ZZI_H
43096U, // SRSRA_ZZI_S
43097U, // SRSRAd
43152U, // SRSRAv16i8_shift
43160U, // SRSRAv2i32_shift
43112U, // SRSRAv2i64_shift
43168U, // SRSRAv4i16_shift
43120U, // SRSRAv4i32_shift
43128U, // SRSRAv8i16_shift
43176U, // SRSRAv8i8_shift
3161U, // SSHLLB_ZZI_D
224U, // SSHLLB_ZZI_H
3160U, // SSHLLB_ZZI_S
3161U, // SSHLLT_ZZI_D
224U, // SSHLLT_ZZI_H
3160U, // SSHLLT_ZZI_S
3216U, // SSHLLv16i8_shift
3224U, // SSHLLv2i32_shift
3232U, // SSHLLv4i16_shift
3184U, // SSHLLv4i32_shift
3192U, // SSHLLv8i16_shift
3240U, // SSHLLv8i8_shift
794768U, // SSHLv16i8
3160U, // SSHLv1i64
925848U, // SSHLv2i32
270440U, // SSHLv2i64
1056928U, // SSHLv4i16
401520U, // SSHLv4i32
532600U, // SSHLv8i16
1188008U, // SSHLv8i8
3160U, // SSHRd
3216U, // SSHRv16i8_shift
3224U, // SSHRv2i32_shift
3176U, // SSHRv2i64_shift
3232U, // SSHRv4i16_shift
3184U, // SSHRv4i32_shift
3192U, // SSHRv8i16_shift
3240U, // SSHRv8i8_shift
393U, // SSRA_ZZI_B
43096U, // SSRA_ZZI_D
392U, // SSRA_ZZI_H
43096U, // SSRA_ZZI_S
43097U, // SSRAd
43152U, // SSRAv16i8_shift
43160U, // SSRAv2i32_shift
43112U, // SSRAv2i64_shift
43168U, // SSRAv4i16_shift
43120U, // SSRAv4i32_shift
43128U, // SSRAv8i16_shift
43176U, // SSRAv8i8_shift
5254372U, // SST1B_D
371076284U, // SST1B_D_IMM
5385444U, // SST1B_D_SXTW
5516516U, // SST1B_D_UXTW
371076196U, // SST1B_S_IMM
5647588U, // SST1B_S_SXTW
5778660U, // SST1B_S_UXTW
5254372U, // SST1D
5909692U, // SST1D_IMM
6040804U, // SST1D_SCALED
5385444U, // SST1D_SXTW
6171876U, // SST1D_SXTW_SCALED
5516516U, // SST1D_UXTW
6302948U, // SST1D_UXTW_SCALED
5254372U, // SST1H_D
375532732U, // SST1H_D_IMM
6565092U, // SST1H_D_SCALED
5385444U, // SST1H_D_SXTW
6696164U, // SST1H_D_SXTW_SCALED
5516516U, // SST1H_D_UXTW
6827236U, // SST1H_D_UXTW_SCALED
375532644U, // SST1H_S_IMM
5647588U, // SST1H_S_SXTW
6958308U, // SST1H_S_SXTW_SCALED
5778660U, // SST1H_S_UXTW
7089380U, // SST1H_S_UXTW_SCALED
371076284U, // SST1Q
5254372U, // SST1W_D
376319164U, // SST1W_D_IMM
7351524U, // SST1W_D_SCALED
5385444U, // SST1W_D_SXTW
7482596U, // SST1W_D_SXTW_SCALED
5516516U, // SST1W_D_UXTW
7613668U, // SST1W_D_UXTW_SCALED
376319076U, // SST1W_IMM
5647588U, // SST1W_SXTW
7744740U, // SST1W_SXTW_SCALED
5778660U, // SST1W_UXTW
7875812U, // SST1W_UXTW_SCALED
12377U, // SSUBLBT_ZZZ_D
176U, // SSUBLBT_ZZZ_H
5208U, // SSUBLBT_ZZZ_S
12377U, // SSUBLB_ZZZ_D
176U, // SSUBLB_ZZZ_H
5208U, // SSUBLB_ZZZ_S
12377U, // SSUBLTB_ZZZ_D
176U, // SSUBLTB_ZZZ_H
5208U, // SSUBLTB_ZZZ_S
12377U, // SSUBLT_ZZZ_D
176U, // SSUBLT_ZZZ_H
5208U, // SSUBLT_ZZZ_S
794768U, // SSUBLv16i8_v8i16
925848U, // SSUBLv2i32_v2i64
1056928U, // SSUBLv4i16_v4i32
401520U, // SSUBLv4i32_v2i64
532600U, // SSUBLv8i16_v4i32
1188008U, // SSUBLv8i8_v8i16
12376U, // SSUBWB_ZZZ_D
176U, // SSUBWB_ZZZ_H
5209U, // SSUBWB_ZZZ_S
12376U, // SSUBWT_ZZZ_D
176U, // SSUBWT_ZZZ_H
5209U, // SSUBWT_ZZZ_S
794744U, // SSUBWv16i8_v8i16
925800U, // SSUBWv2i32_v2i64
1056880U, // SSUBWv4i16_v4i32
401512U, // SSUBWv4i32_v2i64
532592U, // SSUBWv8i16_v4i32
1187960U, // SSUBWv8i8_v8i16
8006884U, // ST1B
8006884U, // ST1B_2Z
392309988U, // ST1B_2Z_IMM
8006884U, // ST1B_4Z
393096420U, // ST1B_4Z_IMM
8006884U, // ST1B_D
387853540U, // ST1B_D_IMM
8006884U, // ST1B_H
387853540U, // ST1B_H_IMM
387853540U, // ST1B_IMM
8006884U, // ST1B_S
387853540U, // ST1B_S_IMM
671223075U, // ST1B_VG2_M2ZPXI
688000291U, // ST1B_VG2_M2ZPXX
393096420U, // ST1B_VG4_M4ZPXI
8006884U, // ST1B_VG4_M4ZPXX
8137956U, // ST1D
8137956U, // ST1D_2Z
392309988U, // ST1D_2Z_IMM
8137956U, // ST1D_4Z
393096420U, // ST1D_4Z_IMM
387853540U, // ST1D_IMM
8137956U, // ST1D_Q
387853540U, // ST1D_Q_IMM
392309988U, // ST1D_VG2_M2ZPXI
8137956U, // ST1D_VG2_M2ZPXX
393096420U, // ST1D_VG4_M4ZPXI
8137956U, // ST1D_VG4_M4ZPXX
0U, // ST1Fourv16b
0U, // ST1Fourv16b_POST
0U, // ST1Fourv1d
0U, // ST1Fourv1d_POST
0U, // ST1Fourv2d
0U, // ST1Fourv2d_POST
0U, // ST1Fourv2s
0U, // ST1Fourv2s_POST
0U, // ST1Fourv4h
0U, // ST1Fourv4h_POST
0U, // ST1Fourv4s
0U, // ST1Fourv4s_POST
0U, // ST1Fourv8b
0U, // ST1Fourv8b_POST
0U, // ST1Fourv8h
0U, // ST1Fourv8h_POST
8269028U, // ST1H
8269028U, // ST1H_2Z
392309988U, // ST1H_2Z_IMM
8269028U, // ST1H_4Z
393096420U, // ST1H_4Z_IMM
8269028U, // ST1H_D
387853540U, // ST1H_D_IMM
387853540U, // ST1H_IMM
8269028U, // ST1H_S
387853540U, // ST1H_S_IMM
671223075U, // ST1H_VG2_M2ZPXI
704777507U, // ST1H_VG2_M2ZPXX
393096420U, // ST1H_VG4_M4ZPXI
8269028U, // ST1H_VG4_M4ZPXX
0U, // ST1Onev16b
0U, // ST1Onev16b_POST
0U, // ST1Onev1d
0U, // ST1Onev1d_POST
0U, // ST1Onev2d
0U, // ST1Onev2d_POST
0U, // ST1Onev2s
0U, // ST1Onev2s_POST
0U, // ST1Onev4h
0U, // ST1Onev4h_POST
0U, // ST1Onev4s
0U, // ST1Onev4s_POST
0U, // ST1Onev8b
0U, // ST1Onev8b_POST
0U, // ST1Onev8h
0U, // ST1Onev8h_POST
0U, // ST1Threev16b
0U, // ST1Threev16b_POST
0U, // ST1Threev1d
0U, // ST1Threev1d_POST
0U, // ST1Threev2d
0U, // ST1Threev2d_POST
0U, // ST1Threev2s
0U, // ST1Threev2s_POST
0U, // ST1Threev4h
0U, // ST1Threev4h_POST
0U, // ST1Threev4s
0U, // ST1Threev4s_POST
0U, // ST1Threev8b
0U, // ST1Threev8b_POST
0U, // ST1Threev8h
0U, // ST1Threev8h_POST
0U, // ST1Twov16b
0U, // ST1Twov16b_POST
0U, // ST1Twov1d
0U, // ST1Twov1d_POST
0U, // ST1Twov2d
0U, // ST1Twov2d_POST
0U, // ST1Twov2s
0U, // ST1Twov2s_POST
0U, // ST1Twov4h
0U, // ST1Twov4h_POST
0U, // ST1Twov4s
0U, // ST1Twov4s_POST
0U, // ST1Twov8b
0U, // ST1Twov8b_POST
0U, // ST1Twov8h
0U, // ST1Twov8h_POST
8531172U, // ST1W
8531172U, // ST1W_2Z
392309988U, // ST1W_2Z_IMM
8531172U, // ST1W_4Z
393096420U, // ST1W_4Z_IMM
8531172U, // ST1W_D
387853540U, // ST1W_D_IMM
387853540U, // ST1W_IMM
8531172U, // ST1W_Q
387853540U, // ST1W_Q_IMM
392309988U, // ST1W_VG2_M2ZPXI
8531172U, // ST1W_VG2_M2ZPXX
393096420U, // ST1W_VG4_M4ZPXI
8531172U, // ST1W_VG4_M4ZPXX
8868440U, // ST1_MXIPXX_H_B
8999512U, // ST1_MXIPXX_H_D
9130584U, // ST1_MXIPXX_H_H
9261656U, // ST1_MXIPXX_H_Q
9392728U, // ST1_MXIPXX_H_S
8868440U, // ST1_MXIPXX_V_B
8999512U, // ST1_MXIPXX_V_D
9130584U, // ST1_MXIPXX_V_H
9261656U, // ST1_MXIPXX_V_Q
9392728U, // ST1_MXIPXX_V_S
0U, // ST1i16
4U, // ST1i16_POST
0U, // ST1i32
4U, // ST1i32_POST
0U, // ST1i64
4U, // ST1i64_POST
0U, // ST1i8
4U, // ST1i8_POST
8006884U, // ST2B
392309988U, // ST2B_IMM
8137956U, // ST2D
392309988U, // ST2D_IMM
3149912U, // ST2GOffset
62073U, // ST2GPostIndex
10154073U, // ST2GPreIndex
8269028U, // ST2H
392309988U, // ST2H_IMM
9448676U, // ST2Q
392309988U, // ST2Q_IMM
0U, // ST2Twov16b
0U, // ST2Twov16b_POST
0U, // ST2Twov2d
0U, // ST2Twov2d_POST
0U, // ST2Twov2s
0U, // ST2Twov2s_POST
0U, // ST2Twov4h
0U, // ST2Twov4h_POST
0U, // ST2Twov4s
0U, // ST2Twov4s_POST
0U, // ST2Twov8b
0U, // ST2Twov8b_POST
0U, // ST2Twov8h
0U, // ST2Twov8h_POST
8531172U, // ST2W
392309988U, // ST2W_IMM
0U, // ST2i16
4U, // ST2i16_POST
0U, // ST2i32
4U, // ST2i32_POST
0U, // ST2i64
4U, // ST2i64_POST
0U, // ST2i8
4U, // ST2i8_POST
8006884U, // ST3B
9579748U, // ST3B_IMM
8137956U, // ST3D
9579748U, // ST3D_IMM
8269028U, // ST3H
9579748U, // ST3H_IMM
9448676U, // ST3Q
9579748U, // ST3Q_IMM
0U, // ST3Threev16b
0U, // ST3Threev16b_POST
0U, // ST3Threev2d
0U, // ST3Threev2d_POST
0U, // ST3Threev2s
0U, // ST3Threev2s_POST
0U, // ST3Threev4h
0U, // ST3Threev4h_POST
0U, // ST3Threev4s
0U, // ST3Threev4s_POST
0U, // ST3Threev8b
0U, // ST3Threev8b_POST
0U, // ST3Threev8h
0U, // ST3Threev8h_POST
8531172U, // ST3W
9579748U, // ST3W_IMM
0U, // ST3i16
4U, // ST3i16_POST
0U, // ST3i32
4U, // ST3i32_POST
0U, // ST3i64
4U, // ST3i64_POST
0U, // ST3i8
5U, // ST3i8_POST
8006884U, // ST4B
393096420U, // ST4B_IMM
8137956U, // ST4D
393096420U, // ST4D_IMM
0U, // ST4Fourv16b
0U, // ST4Fourv16b_POST
0U, // ST4Fourv2d
0U, // ST4Fourv2d_POST
0U, // ST4Fourv2s
0U, // ST4Fourv2s_POST
0U, // ST4Fourv4h
0U, // ST4Fourv4h_POST
0U, // ST4Fourv4s
0U, // ST4Fourv4s_POST
0U, // ST4Fourv8b
0U, // ST4Fourv8b_POST
0U, // ST4Fourv8h
0U, // ST4Fourv8h_POST
8269028U, // ST4H
393096420U, // ST4H_IMM
9448676U, // ST4Q
393096420U, // ST4Q_IMM
8531172U, // ST4W
393096420U, // ST4W_IMM
0U, // ST4i16
4U, // ST4i16_POST
0U, // ST4i32
4U, // ST4i32_POST
0U, // ST4i64
5U, // ST4i64_POST
0U, // ST4i8
4U, // ST4i8_POST
0U, // ST64B
5U, // ST64BV
5U, // ST64BV0
608U, // STGM
3149912U, // STGOffset
419564832U, // STGPi
62073U, // STGPostIndex
479766817U, // STGPpost
469936417U, // STGPpre
10154073U, // STGPreIndex
3149088U, // STILPW
11184417U, // STILPWpre
3149088U, // STILPX
11315489U, // STILPXpre
0U, // STL1
608U, // STLLRB
608U, // STLLRH
608U, // STLLRW
608U, // STLLRX
608U, // STLRB
608U, // STLRH
608U, // STLRW
977U, // STLRWpre
608U, // STLRX
985U, // STLRXpre
3148888U, // STLURBi
3148888U, // STLURHi
3148888U, // STLURWi
3148888U, // STLURXi
3148888U, // STLURbi
3148888U, // STLURdi
3148888U, // STLURhi
3148888U, // STLURqi
3148888U, // STLURsi
11406424U, // STLXPW
11406424U, // STLXPX
3149088U, // STLXRB
3149088U, // STLXRH
3149088U, // STLXRW
3149088U, // STLXRX
402787616U, // STNPDi
419564832U, // STNPQi
436342048U, // STNPSi
436342048U, // STNPWi
402787616U, // STNPXi
8006884U, // STNT1B_2Z
392309988U, // STNT1B_2Z_IMM
8006884U, // STNT1B_4Z
393096420U, // STNT1B_4Z_IMM
671223075U, // STNT1B_VG2_M2ZPXI
688000291U, // STNT1B_VG2_M2ZPXX
393096420U, // STNT1B_VG4_M4ZPXI
8006884U, // STNT1B_VG4_M4ZPXX
387853540U, // STNT1B_ZRI
8006884U, // STNT1B_ZRR
371076284U, // STNT1B_ZZR_D_REAL
371076196U, // STNT1B_ZZR_S_REAL
8137956U, // STNT1D_2Z
392309988U, // STNT1D_2Z_IMM
8137956U, // STNT1D_4Z
393096420U, // STNT1D_4Z_IMM
392309988U, // STNT1D_VG2_M2ZPXI
8137956U, // STNT1D_VG2_M2ZPXX
393096420U, // STNT1D_VG4_M4ZPXI
8137956U, // STNT1D_VG4_M4ZPXX
387853540U, // STNT1D_ZRI
8137956U, // STNT1D_ZRR
371076284U, // STNT1D_ZZR_D_REAL
8269028U, // STNT1H_2Z
392309988U, // STNT1H_2Z_IMM
8269028U, // STNT1H_4Z
393096420U, // STNT1H_4Z_IMM
671223075U, // STNT1H_VG2_M2ZPXI
704777507U, // STNT1H_VG2_M2ZPXX
393096420U, // STNT1H_VG4_M4ZPXI
8269028U, // STNT1H_VG4_M4ZPXX
387853540U, // STNT1H_ZRI
8269028U, // STNT1H_ZRR
371076284U, // STNT1H_ZZR_D_REAL
371076196U, // STNT1H_ZZR_S_REAL
8531172U, // STNT1W_2Z
392309988U, // STNT1W_2Z_IMM
8531172U, // STNT1W_4Z
393096420U, // STNT1W_4Z_IMM
392309988U, // STNT1W_VG2_M2ZPXI
8531172U, // STNT1W_VG2_M2ZPXX
393096420U, // STNT1W_VG4_M4ZPXI
8531172U, // STNT1W_VG4_M4ZPXX
387853540U, // STNT1W_ZRI
8531172U, // STNT1W_ZRR
371076284U, // STNT1W_ZZR_D_REAL
371076196U, // STNT1W_ZZR_S_REAL
402787616U, // STPDi
462989601U, // STPDpost
453159201U, // STPDpre
419564832U, // STPQi
479766817U, // STPQpost
469936417U, // STPQpre
436342048U, // STPSi
496544033U, // STPSpost
486713633U, // STPSpre
436342048U, // STPWi
496544033U, // STPWpost
486713633U, // STPWpre
402787616U, // STPXi
462989601U, // STPXpost
453159201U, // STPXpre
43641U, // STRBBpost
10135641U, // STRBBpre
503450712U, // STRBBroW
520227928U, // STRBBroX
64600U, // STRBBui
43641U, // STRBpost
10135641U, // STRBpre
503450712U, // STRBroW
520227928U, // STRBroX
64600U, // STRBui
43641U, // STRDpost
10135641U, // STRDpre
537005144U, // STRDroW
553782360U, // STRDroX
65624U, // STRDui
43641U, // STRHHpost
10135641U, // STRHHpre
570559576U, // STRHHroW
587336792U, // STRHHroX
66648U, // STRHHui
43641U, // STRHpost
10135641U, // STRHpre
570559576U, // STRHroW
587336792U, // STRHroX
66648U, // STRHui
43641U, // STRQpost
10135641U, // STRQpre
604114008U, // STRQroW
620891224U, // STRQroX
67672U, // STRQui
43641U, // STRSpost
10135641U, // STRSpre
637668440U, // STRSroW
654445656U, // STRSroX
68696U, // STRSui
43641U, // STRWpost
10135641U, // STRWpre
637668440U, // STRWroW
654445656U, // STRWroX
68696U, // STRWui
43641U, // STRXpost
10135641U, // STRXpre
537005144U, // STRXroW
553782360U, // STRXroX
65624U, // STRXui
10226776U, // STR_PXI
608U, // STR_TX
0U, // STR_ZA
10226776U, // STR_ZXI
3148888U, // STTRBi
3148888U, // STTRHi
3148888U, // STTRWi
3148888U, // STTRXi
3148888U, // STURBBi
3148888U, // STURBi
3148888U, // STURDi
3148888U, // STURHHi
3148888U, // STURHi
3148888U, // STURQi
3148888U, // STURSi
3148888U, // STURWi
3148888U, // STURXi
11406424U, // STXPW
11406424U, // STXPX
3149088U, // STXRB
3149088U, // STXRH
3149088U, // STXRW
3149088U, // STXRX
3149912U, // STZ2GOffset
62073U, // STZ2GPostIndex
10154073U, // STZ2GPreIndex
608U, // STZGM
3149912U, // STZGOffset
62073U, // STZGPostIndex
10154073U, // STZGPreIndex
135256U, // SUBG
5208U, // SUBHNB_ZZZ_B
96U, // SUBHNB_ZZZ_H
6232U, // SUBHNB_ZZZ_S
7256U, // SUBHNT_ZZZ_B
24U, // SUBHNT_ZZZ_H
1112U, // SUBHNT_ZZZ_S
270440U, // SUBHNv2i64_v2i32
271464U, // SUBHNv2i64_v4i32
401520U, // SUBHNv4i32_v4i16
402544U, // SUBHNv4i32_v8i16
533624U, // SUBHNv8i16_v16i8
532600U, // SUBHNv8i16_v8i8
3160U, // SUBP
3160U, // SUBPS
16473U, // SUBR_ZI_B
17496U, // SUBR_ZI_D
208U, // SUBR_ZI_H
18521U, // SUBR_ZI_S
16918656U, // SUBR_ZPmZ_B
33691776U, // SUBR_ZPmZ_D
50998408U, // SUBR_ZPmZ_H
67252352U, // SUBR_ZPmZ_S
13400U, // SUBSWri
14424U, // SUBSWrs
15448U, // SUBSWrx
13400U, // SUBSXri
14424U, // SUBSXrs
15448U, // SUBSXrx
1313880U, // SUBSXrx64
13400U, // SUBWri
14424U, // SUBWrs
15448U, // SUBWrx
13400U, // SUBXri
14424U, // SUBXrs
15448U, // SUBXrx
1313880U, // SUBXrx64
1453248U, // SUB_VG2_M2Z2Z_D
1584328U, // SUB_VG2_M2Z2Z_S
52047040U, // SUB_VG2_M2ZZ_D
52178120U, // SUB_VG2_M2ZZ_S
192U, // SUB_VG2_M2Z_D
200U, // SUB_VG2_M2Z_S
1453248U, // SUB_VG4_M4Z4Z_D
1584328U, // SUB_VG4_M4Z4Z_S
52047040U, // SUB_VG4_M4ZZ_D
52178120U, // SUB_VG4_M4ZZ_S
192U, // SUB_VG4_M4Z_D
200U, // SUB_VG4_M4Z_S
16473U, // SUB_ZI_B
17496U, // SUB_ZI_D
208U, // SUB_ZI_H
18521U, // SUB_ZI_S
16918656U, // SUB_ZPmZ_B
33691776U, // SUB_ZPmZ_D
50998408U, // SUB_ZPmZ_H
67252352U, // SUB_ZPmZ_S
10329U, // SUB_ZZZ_B
6232U, // SUB_ZZZ_D
136U, // SUB_ZZZ_H
12377U, // SUB_ZZZ_S
794768U, // SUBv16i8
3160U, // SUBv1i64
925848U, // SUBv2i32
270440U, // SUBv2i64
1056928U, // SUBv4i16
401520U, // SUBv4i32
532600U, // SUBv8i16
1188008U, // SUBv8i8
2543496U, // SUDOT_VG2_M2ZZI_BToS
53128U, // SUDOT_VG2_M2ZZ_BToS
2543496U, // SUDOT_VG4_M4ZZI_BToS
53128U, // SUDOT_VG4_M4ZZ_BToS
40969U, // SUDOT_ZZZI
10495120U, // SUDOTlanev16i8
10495144U, // SUDOTlanev8i8
40905U, // SUMLALL_MZZI_BtoS
2543496U, // SUMLALL_VG2_M2ZZI_BtoS
53132U, // SUMLALL_VG2_M2ZZ_BtoS
2543496U, // SUMLALL_VG4_M4ZZI_BtoS
53132U, // SUMLALL_VG4_M4ZZ_BtoS
0U, // SUMOPA_MPPZZ_D
0U, // SUMOPA_MPPZZ_S
0U, // SUMOPS_MPPZZ_D
0U, // SUMOPS_MPPZZ_S
1U, // SUNPKHI_ZZ_D
0U, // SUNPKHI_ZZ_H
0U, // SUNPKHI_ZZ_S
1U, // SUNPKLO_ZZ_D
0U, // SUNPKLO_ZZ_H
0U, // SUNPKLO_ZZ_S
0U, // SUNPK_VG2_2ZZ_D
0U, // SUNPK_VG2_2ZZ_H
0U, // SUNPK_VG2_2ZZ_S
0U, // SUNPK_VG4_4Z2Z_D
0U, // SUNPK_VG4_4Z2Z_H
0U, // SUNPK_VG4_4Z2Z_S
16918656U, // SUQADD_ZPmZ_B
33691776U, // SUQADD_ZPmZ_D
50998408U, // SUQADD_ZPmZ_H
67252352U, // SUQADD_ZPmZ_S
32U, // SUQADDv16i8
1U, // SUQADDv1i16
1U, // SUQADDv1i32
1U, // SUQADDv1i64
1U, // SUQADDv1i8
40U, // SUQADDv2i32
48U, // SUQADDv2i64
56U, // SUQADDv4i16
64U, // SUQADDv4i32
72U, // SUQADDv8i16
80U, // SUQADDv8i8
2543496U, // SUVDOT_VG4_M4ZZI_BToS
0U, // SVC
2529520U, // SVDOT_VG2_M2ZZI_HtoS
2543496U, // SVDOT_VG4_M4ZZI_BtoS
2529520U, // SVDOT_VG4_M4ZZI_HtoD
3U, // SWPAB
3U, // SWPAH
3U, // SWPALB
3U, // SWPALH
3U, // SWPALW
3U, // SWPALX
3U, // SWPAW
3U, // SWPAX
3U, // SWPB
3U, // SWPH
3U, // SWPLB
3U, // SWPLH
3U, // SWPLW
3U, // SWPLX
60706U, // SWPP
60706U, // SWPPA
60706U, // SWPPAL
60706U, // SWPPL
3U, // SWPW
3U, // SWPX
16U, // SXTB_ZPmZ_D
0U, // SXTB_ZPmZ_H
24U, // SXTB_ZPmZ_S
16U, // SXTH_ZPmZ_D
24U, // SXTH_ZPmZ_S
16U, // SXTW_ZPmZ_D
87128U, // SYSLxt
997U, // SYSPxt
1005U, // SYSPxt_XZR
1013U, // SYSxt
178U, // TBLQ_ZZZ_B
5U, // TBLQ_ZZZ_D
136U, // TBLQ_ZZZ_H
12380U, // TBLQ_ZZZ_S
178U, // TBL_ZZZZ_B
5U, // TBL_ZZZZ_D
136U, // TBL_ZZZZ_H
12380U, // TBL_ZZZZ_S
178U, // TBL_ZZZ_B
5U, // TBL_ZZZ_D
136U, // TBL_ZZZ_H
12380U, // TBL_ZZZ_S
37U, // TBLv16i8Four
37U, // TBLv16i8One
37U, // TBLv16i8Three
37U, // TBLv16i8Two
85U, // TBLv8i8Four
85U, // TBLv8i8One
85U, // TBLv8i8Three
85U, // TBLv8i8Two
88152U, // TBNZW
88152U, // TBNZX
9U, // TBXQ_ZZZ_B
1112U, // TBXQ_ZZZ_D
232U, // TBXQ_ZZZ_H
2136U, // TBXQ_ZZZ_S
9U, // TBX_ZZZ_B
1112U, // TBX_ZZZ_D
232U, // TBX_ZZZ_H
2136U, // TBX_ZZZ_S
37U, // TBXv16i8Four
37U, // TBXv16i8One
37U, // TBXv16i8Three
37U, // TBXv16i8Two
85U, // TBXv8i8Four
85U, // TBXv8i8One
85U, // TBXv8i8Three
85U, // TBXv8i8Two
88152U, // TBZW
88152U, // TBZX
0U, // TCANCEL
0U, // TCOMMIT
0U, // TRCIT
10329U, // TRN1_PPP_B
6232U, // TRN1_PPP_D
136U, // TRN1_PPP_H
12377U, // TRN1_PPP_S
10329U, // TRN1_ZZZ_B
6232U, // TRN1_ZZZ_D
136U, // TRN1_ZZZ_H
1016U, // TRN1_ZZZ_Q
12377U, // TRN1_ZZZ_S
794768U, // TRN1v16i8
925848U, // TRN1v2i32
270440U, // TRN1v2i64
1056928U, // TRN1v4i16
401520U, // TRN1v4i32
532600U, // TRN1v8i16
1188008U, // TRN1v8i8
10329U, // TRN2_PPP_B
6232U, // TRN2_PPP_D
136U, // TRN2_PPP_H
12377U, // TRN2_PPP_S
10329U, // TRN2_ZZZ_B
6232U, // TRN2_ZZZ_D
136U, // TRN2_ZZZ_H
1016U, // TRN2_ZZZ_Q
12377U, // TRN2_ZZZ_S
794768U, // TRN2v16i8
925848U, // TRN2v2i32
270440U, // TRN2v2i64
1056928U, // TRN2v4i16
401520U, // TRN2v4i32
532600U, // TRN2v8i16
1188008U, // TRN2v8i8
0U, // TSB
0U, // TSTART
0U, // TTEST
2136U, // UABALB_ZZZ_D
8U, // UABALB_ZZZ_H
7256U, // UABALB_ZZZ_S
2136U, // UABALT_ZZZ_D
8U, // UABALT_ZZZ_H
7256U, // UABALT_ZZZ_S
795792U, // UABALv16i8_v8i16
926872U, // UABALv2i32_v2i64
1057952U, // UABALv4i16_v4i32
402544U, // UABALv4i32_v2i64
533624U, // UABALv8i16_v4i32
1189032U, // UABALv8i8_v8i16
9U, // UABA_ZZZ_B
1112U, // UABA_ZZZ_D
232U, // UABA_ZZZ_H
2136U, // UABA_ZZZ_S
795792U, // UABAv16i8
926872U, // UABAv2i32
1057952U, // UABAv4i16
402544U, // UABAv4i32
533624U, // UABAv8i16
1189032U, // UABAv8i8
12377U, // UABDLB_ZZZ_D
176U, // UABDLB_ZZZ_H
5208U, // UABDLB_ZZZ_S
12377U, // UABDLT_ZZZ_D
176U, // UABDLT_ZZZ_H
5208U, // UABDLT_ZZZ_S
794768U, // UABDLv16i8_v8i16
925848U, // UABDLv2i32_v2i64
1056928U, // UABDLv4i16_v4i32
401520U, // UABDLv4i32_v2i64
532600U, // UABDLv8i16_v4i32
1188008U, // UABDLv8i8_v8i16
16918656U, // UABD_ZPmZ_B
33691776U, // UABD_ZPmZ_D
50998408U, // UABD_ZPmZ_H
67252352U, // UABD_ZPmZ_S
794768U, // UABDv16i8
925848U, // UABDv2i32
1056928U, // UABDv4i16
401520U, // UABDv4i32
532600U, // UABDv8i16
1188008U, // UABDv8i8
2176U, // UADALP_ZPmZ_D
8U, // UADALP_ZPmZ_H
7296U, // UADALP_ZPmZ_S
32U, // UADALPv16i8_v8i16
40U, // UADALPv2i32_v1i64
56U, // UADALPv4i16_v2i32
64U, // UADALPv4i32_v2i64
72U, // UADALPv8i16_v4i32
80U, // UADALPv8i8_v4i16
12377U, // UADDLB_ZZZ_D
176U, // UADDLB_ZZZ_H
5208U, // UADDLB_ZZZ_S
32U, // UADDLPv16i8_v8i16
40U, // UADDLPv2i32_v1i64
56U, // UADDLPv4i16_v2i32
64U, // UADDLPv4i32_v2i64
72U, // UADDLPv8i16_v4i32
80U, // UADDLPv8i8_v4i16
12377U, // UADDLT_ZZZ_D
176U, // UADDLT_ZZZ_H
5208U, // UADDLT_ZZZ_S
32U, // UADDLVv16i8v
56U, // UADDLVv4i16v
64U, // UADDLVv4i32v
72U, // UADDLVv8i16v
80U, // UADDLVv8i8v
794768U, // UADDLv16i8_v8i16
925848U, // UADDLv2i32_v2i64
1056928U, // UADDLv4i16_v4i32
401520U, // UADDLv4i32_v2i64
532600U, // UADDLv8i16_v4i32
1188008U, // UADDLv8i8_v8i16
0U, // UADDV_VPZ_B
0U, // UADDV_VPZ_D
0U, // UADDV_VPZ_H
0U, // UADDV_VPZ_S
12376U, // UADDWB_ZZZ_D
176U, // UADDWB_ZZZ_H
5209U, // UADDWB_ZZZ_S
12376U, // UADDWT_ZZZ_D
176U, // UADDWT_ZZZ_H
5209U, // UADDWT_ZZZ_S
794744U, // UADDWv16i8_v8i16
925800U, // UADDWv2i32_v2i64
1056880U, // UADDWv4i16_v4i32
401512U, // UADDWv4i32_v2i64
532592U, // UADDWv8i16_v4i32
1187960U, // UADDWv8i8_v8i16
134232U, // UBFMWri
134232U, // UBFMXri
8U, // UCLAMP_VG2_2Z2Z_B
16U, // UCLAMP_VG2_2Z2Z_D
232U, // UCLAMP_VG2_2Z2Z_H
24U, // UCLAMP_VG2_2Z2Z_S
8U, // UCLAMP_VG4_4Z4Z_B
16U, // UCLAMP_VG4_4Z4Z_D
232U, // UCLAMP_VG4_4Z4Z_H
24U, // UCLAMP_VG4_4Z4Z_S
10329U, // UCLAMP_ZZZ_B
6232U, // UCLAMP_ZZZ_D
136U, // UCLAMP_ZZZ_H
12377U, // UCLAMP_ZZZ_S
3160U, // UCVTFSWDri
3160U, // UCVTFSWHri
3160U, // UCVTFSWSri
3160U, // UCVTFSXDri
3160U, // UCVTFSXHri
3160U, // UCVTFSXSri
0U, // UCVTFUWDri
0U, // UCVTFUWHri
0U, // UCVTFUWSri
0U, // UCVTFUXDri
0U, // UCVTFUXHri
0U, // UCVTFUXSri
0U, // UCVTF_2Z2Z_StoS
0U, // UCVTF_4Z4Z_StoS
16U, // UCVTF_ZPmZ_DtoD
2U, // UCVTF_ZPmZ_DtoH
16U, // UCVTF_ZPmZ_DtoS
0U, // UCVTF_ZPmZ_HtoH
24U, // UCVTF_ZPmZ_StoD
1U, // UCVTF_ZPmZ_StoH
24U, // UCVTF_ZPmZ_StoS
3160U, // UCVTFd
3160U, // UCVTFh
3160U, // UCVTFs
0U, // UCVTFv1i16
0U, // UCVTFv1i32
0U, // UCVTFv1i64
40U, // UCVTFv2f32
48U, // UCVTFv2f64
3224U, // UCVTFv2i32_shift
3176U, // UCVTFv2i64_shift
56U, // UCVTFv4f16
64U, // UCVTFv4f32
3232U, // UCVTFv4i16_shift
3184U, // UCVTFv4i32_shift
72U, // UCVTFv8f16
3192U, // UCVTFv8i16_shift
0U, // UDF
33691776U, // UDIVR_ZPmZ_D
67252352U, // UDIVR_ZPmZ_S
3160U, // UDIVWr
3160U, // UDIVXr
33691776U, // UDIV_ZPmZ_D
67252352U, // UDIV_ZPmZ_S
81800U, // UDOT_VG2_M2Z2Z_BtoS
38128U, // UDOT_VG2_M2Z2Z_HtoD
38128U, // UDOT_VG2_M2Z2Z_HtoS
2543496U, // UDOT_VG2_M2ZZI_BToS
2529520U, // UDOT_VG2_M2ZZI_HToS
2529520U, // UDOT_VG2_M2ZZI_HtoD
53128U, // UDOT_VG2_M2ZZ_BtoS
39152U, // UDOT_VG2_M2ZZ_HtoD
39152U, // UDOT_VG2_M2ZZ_HtoS
81800U, // UDOT_VG4_M4Z4Z_BtoS
38128U, // UDOT_VG4_M4Z4Z_HtoD
38128U, // UDOT_VG4_M4Z4Z_HtoS
2543496U, // UDOT_VG4_M4ZZI_BtoS
2529520U, // UDOT_VG4_M4ZZI_HToS
2529520U, // UDOT_VG4_M4ZZI_HtoD
53128U, // UDOT_VG4_M4ZZ_BtoS
39152U, // UDOT_VG4_M4ZZ_HtoD
39152U, // UDOT_VG4_M4ZZ_HtoS
52960344U, // UDOT_ZZZI_D
52960344U, // UDOT_ZZZI_HtoS
40969U, // UDOT_ZZZI_S
7256U, // UDOT_ZZZ_D
7256U, // UDOT_ZZZ_HtoS
9U, // UDOT_ZZZ_S
10495120U, // UDOTlanev16i8
10495144U, // UDOTlanev8i8
795792U, // UDOTv16i8
1189032U, // UDOTv8i8
16918656U, // UHADD_ZPmZ_B
33691776U, // UHADD_ZPmZ_D
50998408U, // UHADD_ZPmZ_H
67252352U, // UHADD_ZPmZ_S
794768U, // UHADDv16i8
925848U, // UHADDv2i32
1056928U, // UHADDv4i16
401520U, // UHADDv4i32
532600U, // UHADDv8i16
1188008U, // UHADDv8i8
16918656U, // UHSUBR_ZPmZ_B
33691776U, // UHSUBR_ZPmZ_D
50998408U, // UHSUBR_ZPmZ_H
67252352U, // UHSUBR_ZPmZ_S
16918656U, // UHSUB_ZPmZ_B
33691776U, // UHSUB_ZPmZ_D
50998408U, // UHSUB_ZPmZ_H
67252352U, // UHSUB_ZPmZ_S
794768U, // UHSUBv16i8
925848U, // UHSUBv2i32
1056928U, // UHSUBv4i16
401520U, // UHSUBv4i32
532600U, // UHSUBv8i16
1188008U, // UHSUBv8i8
134232U, // UMADDLrrr
16918656U, // UMAXP_ZPmZ_B
33691776U, // UMAXP_ZPmZ_D
50998408U, // UMAXP_ZPmZ_H
67252352U, // UMAXP_ZPmZ_S
794768U, // UMAXPv16i8
925848U, // UMAXPv2i32
1056928U, // UMAXPv4i16
401520U, // UMAXPv4i32
532600U, // UMAXPv8i16
1188008U, // UMAXPv8i8
10328U, // UMAXQV_VPZ_B
6232U, // UMAXQV_VPZ_D
5208U, // UMAXQV_VPZ_H
12376U, // UMAXQV_VPZ_S
0U, // UMAXV_VPZ_B
0U, // UMAXV_VPZ_D
0U, // UMAXV_VPZ_H
0U, // UMAXV_VPZ_S
32U, // UMAXVv16i8v
56U, // UMAXVv4i16v
64U, // UMAXVv4i32v
72U, // UMAXVv8i16v
80U, // UMAXVv8i8v
3160U, // UMAXWri
3160U, // UMAXWrr
3160U, // UMAXXri
3160U, // UMAXXrr
912U, // UMAX_VG2_2Z2Z_B
536U, // UMAX_VG2_2Z2Z_D
248U, // UMAX_VG2_2Z2Z_H
544U, // UMAX_VG2_2Z2Z_S
176U, // UMAX_VG2_2ZZ_B
184U, // UMAX_VG2_2ZZ_D
136U, // UMAX_VG2_2ZZ_H
96U, // UMAX_VG2_2ZZ_S
912U, // UMAX_VG4_4Z4Z_B
536U, // UMAX_VG4_4Z4Z_D
248U, // UMAX_VG4_4Z4Z_H
544U, // UMAX_VG4_4Z4Z_S
176U, // UMAX_VG4_4ZZ_B
184U, // UMAX_VG4_4ZZ_D
136U, // UMAX_VG4_4ZZ_H
96U, // UMAX_VG4_4ZZ_S
89177U, // UMAX_ZI_B
89176U, // UMAX_ZI_D
464U, // UMAX_ZI_H
89177U, // UMAX_ZI_S
16918656U, // UMAX_ZPmZ_B
33691776U, // UMAX_ZPmZ_D
50998408U, // UMAX_ZPmZ_H
67252352U, // UMAX_ZPmZ_S
794768U, // UMAXv16i8
925848U, // UMAXv2i32
1056928U, // UMAXv4i16
401520U, // UMAXv4i32
532600U, // UMAXv8i16
1188008U, // UMAXv8i8
16918656U, // UMINP_ZPmZ_B
33691776U, // UMINP_ZPmZ_D
50998408U, // UMINP_ZPmZ_H
67252352U, // UMINP_ZPmZ_S
794768U, // UMINPv16i8
925848U, // UMINPv2i32
1056928U, // UMINPv4i16
401520U, // UMINPv4i32
532600U, // UMINPv8i16
1188008U, // UMINPv8i8
10328U, // UMINQV_VPZ_B
6232U, // UMINQV_VPZ_D
5208U, // UMINQV_VPZ_H
12376U, // UMINQV_VPZ_S
0U, // UMINV_VPZ_B
0U, // UMINV_VPZ_D
0U, // UMINV_VPZ_H
0U, // UMINV_VPZ_S
32U, // UMINVv16i8v
56U, // UMINVv4i16v
64U, // UMINVv4i32v
72U, // UMINVv8i16v
80U, // UMINVv8i8v
3160U, // UMINWri
3160U, // UMINWrr
3160U, // UMINXri
3160U, // UMINXrr
912U, // UMIN_VG2_2Z2Z_B
536U, // UMIN_VG2_2Z2Z_D
248U, // UMIN_VG2_2Z2Z_H
544U, // UMIN_VG2_2Z2Z_S
176U, // UMIN_VG2_2ZZ_B
184U, // UMIN_VG2_2ZZ_D
136U, // UMIN_VG2_2ZZ_H
96U, // UMIN_VG2_2ZZ_S
912U, // UMIN_VG4_4Z4Z_B
536U, // UMIN_VG4_4Z4Z_D
248U, // UMIN_VG4_4Z4Z_H
544U, // UMIN_VG4_4Z4Z_S
176U, // UMIN_VG4_4ZZ_B
184U, // UMIN_VG4_4ZZ_D
136U, // UMIN_VG4_4ZZ_H
96U, // UMIN_VG4_4ZZ_S
89177U, // UMIN_ZI_B
89176U, // UMIN_ZI_D
464U, // UMIN_ZI_H
89177U, // UMIN_ZI_S
16918656U, // UMIN_ZPmZ_B
33691776U, // UMIN_ZPmZ_D
50998408U, // UMIN_ZPmZ_H
67252352U, // UMIN_ZPmZ_S
794768U, // UMINv16i8
925848U, // UMINv2i32
1056928U, // UMINv4i16
401520U, // UMINv4i32
532600U, // UMINv8i16
1188008U, // UMINv8i8
52955224U, // UMLALB_ZZZI_D
52960344U, // UMLALB_ZZZI_S
2136U, // UMLALB_ZZZ_D
8U, // UMLALB_ZZZ_H
7256U, // UMLALB_ZZZ_S
40905U, // UMLALL_MZZI_BtoS
40193U, // UMLALL_MZZI_HtoD
969U, // UMLALL_MZZ_BtoS
257U, // UMLALL_MZZ_HtoD
81800U, // UMLALL_VG2_M2Z2Z_BtoS
38128U, // UMLALL_VG2_M2Z2Z_HtoD
2543496U, // UMLALL_VG2_M2ZZI_BtoS
2529520U, // UMLALL_VG2_M2ZZI_HtoD
53132U, // UMLALL_VG2_M2ZZ_BtoS
39156U, // UMLALL_VG2_M2ZZ_HtoD
81800U, // UMLALL_VG4_M4Z4Z_BtoS
38128U, // UMLALL_VG4_M4Z4Z_HtoD
2543496U, // UMLALL_VG4_M4ZZI_BtoS
2529520U, // UMLALL_VG4_M4ZZI_HtoD
53132U, // UMLALL_VG4_M4ZZ_BtoS
39156U, // UMLALL_VG4_M4ZZ_HtoD
52955224U, // UMLALT_ZZZI_D
52960344U, // UMLALT_ZZZI_S
2136U, // UMLALT_ZZZ_D
8U, // UMLALT_ZZZ_H
7256U, // UMLALT_ZZZ_S
40193U, // UMLAL_MZZI_S
257U, // UMLAL_MZZ_S
38128U, // UMLAL_VG2_M2Z2Z_S
2529520U, // UMLAL_VG2_M2ZZI_S
39152U, // UMLAL_VG2_M2ZZ_S
38128U, // UMLAL_VG4_M4Z4Z_S
2529520U, // UMLAL_VG4_M4ZZI_S
39152U, // UMLAL_VG4_M4ZZ_S
795792U, // UMLALv16i8_v8i16
105260184U, // UMLALv2i32_indexed
926872U, // UMLALv2i32_v2i64
103425184U, // UMLALv4i16_indexed
1057952U, // UMLALv4i16_v4i32
105260144U, // UMLALv4i32_indexed
402544U, // UMLALv4i32_v2i64
103425144U, // UMLALv8i16_indexed
533624U, // UMLALv8i16_v4i32
1189032U, // UMLALv8i8_v8i16
52955224U, // UMLSLB_ZZZI_D
52960344U, // UMLSLB_ZZZI_S
2136U, // UMLSLB_ZZZ_D
8U, // UMLSLB_ZZZ_H
7256U, // UMLSLB_ZZZ_S
40905U, // UMLSLL_MZZI_BtoS
40193U, // UMLSLL_MZZI_HtoD
969U, // UMLSLL_MZZ_BtoS
257U, // UMLSLL_MZZ_HtoD
81800U, // UMLSLL_VG2_M2Z2Z_BtoS
38128U, // UMLSLL_VG2_M2Z2Z_HtoD
2543496U, // UMLSLL_VG2_M2ZZI_BtoS
2529520U, // UMLSLL_VG2_M2ZZI_HtoD
53132U, // UMLSLL_VG2_M2ZZ_BtoS
39156U, // UMLSLL_VG2_M2ZZ_HtoD
81800U, // UMLSLL_VG4_M4Z4Z_BtoS
38128U, // UMLSLL_VG4_M4Z4Z_HtoD
2543496U, // UMLSLL_VG4_M4ZZI_BtoS
2529520U, // UMLSLL_VG4_M4ZZI_HtoD
53132U, // UMLSLL_VG4_M4ZZ_BtoS
39156U, // UMLSLL_VG4_M4ZZ_HtoD
52955224U, // UMLSLT_ZZZI_D
52960344U, // UMLSLT_ZZZI_S
2136U, // UMLSLT_ZZZ_D
8U, // UMLSLT_ZZZ_H
7256U, // UMLSLT_ZZZ_S
40193U, // UMLSL_MZZI_S
257U, // UMLSL_MZZ_S
38128U, // UMLSL_VG2_M2Z2Z_S
2529520U, // UMLSL_VG2_M2ZZI_S
39152U, // UMLSL_VG2_M2ZZ_S
38128U, // UMLSL_VG4_M4Z4Z_S
2529520U, // UMLSL_VG4_M4ZZI_S
39152U, // UMLSL_VG4_M4ZZ_S
795792U, // UMLSLv16i8_v8i16
105260184U, // UMLSLv2i32_indexed
926872U, // UMLSLv2i32_v2i64
103425184U, // UMLSLv4i16_indexed
1057952U, // UMLSLv4i16_v4i32
105260144U, // UMLSLv4i32_indexed
402544U, // UMLSLv4i32_v2i64
103425144U, // UMLSLv8i16_indexed
533624U, // UMLSLv8i16_v4i32
1189032U, // UMLSLv8i8_v8i16
795792U, // UMMLA
9U, // UMMLA_ZZZ
0U, // UMOPA_MPPZZ_D
0U, // UMOPA_MPPZZ_HtoS
0U, // UMOPA_MPPZZ_S
0U, // UMOPS_MPPZZ_D
0U, // UMOPS_MPPZZ_HtoS
0U, // UMOPS_MPPZZ_S
47520U, // UMOVvi16
47520U, // UMOVvi16_idx0
47528U, // UMOVvi32
47528U, // UMOVvi32_idx0
47536U, // UMOVvi64
47536U, // UMOVvi64_idx0
47544U, // UMOVvi8
47544U, // UMOVvi8_idx0
134232U, // UMSUBLrrr
16918656U, // UMULH_ZPmZ_B
33691776U, // UMULH_ZPmZ_D
50998408U, // UMULH_ZPmZ_H
67252352U, // UMULH_ZPmZ_S
10329U, // UMULH_ZZZ_B
6232U, // UMULH_ZZZ_D
136U, // UMULH_ZZZ_H
12377U, // UMULH_ZZZ_S
3160U, // UMULHrr
5124185U, // UMULLB_ZZZI_D
5117016U, // UMULLB_ZZZI_S
12377U, // UMULLB_ZZZ_D
176U, // UMULLB_ZZZ_H
5208U, // UMULLB_ZZZ_S
5124185U, // UMULLT_ZZZI_D
5117016U, // UMULLT_ZZZI_S
12377U, // UMULLT_ZZZ_D
176U, // UMULLT_ZZZ_H
5208U, // UMULLT_ZZZ_S
794768U, // UMULLv16i8_v8i16
340140184U, // UMULLv2i32_indexed
925848U, // UMULLv2i32_v2i64
338305184U, // UMULLv4i16_indexed
1056928U, // UMULLv4i16_v4i32
340140144U, // UMULLv4i32_indexed
401520U, // UMULLv4i32_v2i64
338305144U, // UMULLv8i16_indexed
532600U, // UMULLv8i16_v4i32
1188008U, // UMULLv8i8_v8i16
16473U, // UQADD_ZI_B
17496U, // UQADD_ZI_D
208U, // UQADD_ZI_H
18521U, // UQADD_ZI_S
16918656U, // UQADD_ZPmZ_B
33691776U, // UQADD_ZPmZ_D
50998408U, // UQADD_ZPmZ_H
67252352U, // UQADD_ZPmZ_S
10329U, // UQADD_ZZZ_B
6232U, // UQADD_ZZZ_D
136U, // UQADD_ZZZ_H
12377U, // UQADD_ZZZ_S
794768U, // UQADDv16i8
3160U, // UQADDv1i16
3160U, // UQADDv1i32
3160U, // UQADDv1i64
3160U, // UQADDv1i8
925848U, // UQADDv2i32
270440U, // UQADDv2i64
1056928U, // UQADDv4i16
401520U, // UQADDv4i32
532600U, // UQADDv8i16
1188008U, // UQADDv8i8
0U, // UQCVTN_Z2Z_StoH
0U, // UQCVTN_Z4Z_DtoH
4U, // UQCVTN_Z4Z_StoB
0U, // UQCVT_Z2Z_StoH
0U, // UQCVT_Z4Z_DtoH
4U, // UQCVT_Z4Z_StoB
2U, // UQDECB_WPiI
2U, // UQDECB_XPiI
2U, // UQDECD_WPiI
2U, // UQDECD_XPiI
2U, // UQDECD_ZPiI
2U, // UQDECH_WPiI
2U, // UQDECH_XPiI
0U, // UQDECH_ZPiI
1U, // UQDECP_WP_B
0U, // UQDECP_WP_D
0U, // UQDECP_WP_H
1U, // UQDECP_WP_S
1U, // UQDECP_XP_B
0U, // UQDECP_XP_D
0U, // UQDECP_XP_H
1U, // UQDECP_XP_S
0U, // UQDECP_ZP_D
0U, // UQDECP_ZP_H
0U, // UQDECP_ZP_S
2U, // UQDECW_WPiI
2U, // UQDECW_XPiI
2U, // UQDECW_ZPiI
2U, // UQINCB_WPiI
2U, // UQINCB_XPiI
2U, // UQINCD_WPiI
2U, // UQINCD_XPiI
2U, // UQINCD_ZPiI
2U, // UQINCH_WPiI
2U, // UQINCH_XPiI
0U, // UQINCH_ZPiI
1U, // UQINCP_WP_B
0U, // UQINCP_WP_D
0U, // UQINCP_WP_H
1U, // UQINCP_WP_S
1U, // UQINCP_XP_B
0U, // UQINCP_XP_D
0U, // UQINCP_XP_H
1U, // UQINCP_XP_S
0U, // UQINCP_ZP_D
0U, // UQINCP_ZP_H
0U, // UQINCP_ZP_S
2U, // UQINCW_WPiI
2U, // UQINCW_XPiI
2U, // UQINCW_ZPiI
16918656U, // UQRSHLR_ZPmZ_B
33691776U, // UQRSHLR_ZPmZ_D
50998408U, // UQRSHLR_ZPmZ_H
67252352U, // UQRSHLR_ZPmZ_S
16918656U, // UQRSHL_ZPmZ_B
33691776U, // UQRSHL_ZPmZ_D
50998408U, // UQRSHL_ZPmZ_H
67252352U, // UQRSHL_ZPmZ_S
794768U, // UQRSHLv16i8
3160U, // UQRSHLv1i16
3160U, // UQRSHLv1i32
3160U, // UQRSHLv1i64
3160U, // UQRSHLv1i8
925848U, // UQRSHLv2i32
270440U, // UQRSHLv2i64
1056928U, // UQRSHLv4i16
401520U, // UQRSHLv4i32
532600U, // UQRSHLv8i16
1188008U, // UQRSHLv8i8
3160U, // UQRSHRNB_ZZI_B
224U, // UQRSHRNB_ZZI_H
3160U, // UQRSHRNB_ZZI_S
43096U, // UQRSHRNT_ZZI_B
392U, // UQRSHRNT_ZZI_H
43096U, // UQRSHRNT_ZZI_S
3164U, // UQRSHRN_VG4_Z4ZI_B
224U, // UQRSHRN_VG4_Z4ZI_H
3160U, // UQRSHRNb
3160U, // UQRSHRNh
3160U, // UQRSHRNs
43128U, // UQRSHRNv16i8_shift
3176U, // UQRSHRNv2i32_shift
3184U, // UQRSHRNv4i16_shift
43112U, // UQRSHRNv4i32_shift
43120U, // UQRSHRNv8i16_shift
3192U, // UQRSHRNv8i8_shift
224U, // UQRSHR_VG2_Z2ZI_H
3164U, // UQRSHR_VG4_Z4ZI_B
224U, // UQRSHR_VG4_Z4ZI_H
16918656U, // UQSHLR_ZPmZ_B
33691776U, // UQSHLR_ZPmZ_D
50998408U, // UQSHLR_ZPmZ_H
67252352U, // UQSHLR_ZPmZ_S
141440U, // UQSHL_ZPmI_B
137344U, // UQSHL_ZPmI_D
52309128U, // UQSHL_ZPmI_H
143488U, // UQSHL_ZPmI_S
16918656U, // UQSHL_ZPmZ_B
33691776U, // UQSHL_ZPmZ_D
50998408U, // UQSHL_ZPmZ_H
67252352U, // UQSHL_ZPmZ_S
3160U, // UQSHLb
3160U, // UQSHLd
3160U, // UQSHLh
3160U, // UQSHLs
794768U, // UQSHLv16i8
3216U, // UQSHLv16i8_shift
3160U, // UQSHLv1i16
3160U, // UQSHLv1i32
3160U, // UQSHLv1i64
3160U, // UQSHLv1i8
925848U, // UQSHLv2i32
3224U, // UQSHLv2i32_shift
270440U, // UQSHLv2i64
3176U, // UQSHLv2i64_shift
1056928U, // UQSHLv4i16
3232U, // UQSHLv4i16_shift
401520U, // UQSHLv4i32
3184U, // UQSHLv4i32_shift
532600U, // UQSHLv8i16
3192U, // UQSHLv8i16_shift
1188008U, // UQSHLv8i8
3240U, // UQSHLv8i8_shift
3160U, // UQSHRNB_ZZI_B
224U, // UQSHRNB_ZZI_H
3160U, // UQSHRNB_ZZI_S
43096U, // UQSHRNT_ZZI_B
392U, // UQSHRNT_ZZI_H
43096U, // UQSHRNT_ZZI_S
3160U, // UQSHRNb
3160U, // UQSHRNh
3160U, // UQSHRNs
43128U, // UQSHRNv16i8_shift
3176U, // UQSHRNv2i32_shift
3184U, // UQSHRNv4i16_shift
43112U, // UQSHRNv4i32_shift
43120U, // UQSHRNv8i16_shift
3192U, // UQSHRNv8i8_shift
16918656U, // UQSUBR_ZPmZ_B
33691776U, // UQSUBR_ZPmZ_D
50998408U, // UQSUBR_ZPmZ_H
67252352U, // UQSUBR_ZPmZ_S
16473U, // UQSUB_ZI_B
17496U, // UQSUB_ZI_D
208U, // UQSUB_ZI_H
18521U, // UQSUB_ZI_S
16918656U, // UQSUB_ZPmZ_B
33691776U, // UQSUB_ZPmZ_D
50998408U, // UQSUB_ZPmZ_H
67252352U, // UQSUB_ZPmZ_S
10329U, // UQSUB_ZZZ_B
6232U, // UQSUB_ZZZ_D
136U, // UQSUB_ZZZ_H
12377U, // UQSUB_ZZZ_S
794768U, // UQSUBv16i8
3160U, // UQSUBv1i16
3160U, // UQSUBv1i32
3160U, // UQSUBv1i64
3160U, // UQSUBv1i8
925848U, // UQSUBv2i32
270440U, // UQSUBv2i64
1056928U, // UQSUBv4i16
401520U, // UQSUBv4i32
532600U, // UQSUBv8i16
1188008U, // UQSUBv8i8
0U, // UQXTNB_ZZ_B
0U, // UQXTNB_ZZ_H
0U, // UQXTNB_ZZ_S
0U, // UQXTNT_ZZ_B
0U, // UQXTNT_ZZ_H
0U, // UQXTNT_ZZ_S
72U, // UQXTNv16i8
0U, // UQXTNv1i16
0U, // UQXTNv1i32
0U, // UQXTNv1i8
48U, // UQXTNv2i32
64U, // UQXTNv4i16
48U, // UQXTNv4i32
64U, // UQXTNv8i16
72U, // UQXTNv8i8
24U, // URECPE_ZPmZ_S
40U, // URECPEv2i32
64U, // URECPEv4i32
16918656U, // URHADD_ZPmZ_B
33691776U, // URHADD_ZPmZ_D
50998408U, // URHADD_ZPmZ_H
67252352U, // URHADD_ZPmZ_S
794768U, // URHADDv16i8
925848U, // URHADDv2i32
1056928U, // URHADDv4i16
401520U, // URHADDv4i32
532600U, // URHADDv8i16
1188008U, // URHADDv8i8
16918656U, // URSHLR_ZPmZ_B
33691776U, // URSHLR_ZPmZ_D
50998408U, // URSHLR_ZPmZ_H
67252352U, // URSHLR_ZPmZ_S
912U, // URSHL_VG2_2Z2Z_B
536U, // URSHL_VG2_2Z2Z_D
248U, // URSHL_VG2_2Z2Z_H
544U, // URSHL_VG2_2Z2Z_S
176U, // URSHL_VG2_2ZZ_B
184U, // URSHL_VG2_2ZZ_D
136U, // URSHL_VG2_2ZZ_H
96U, // URSHL_VG2_2ZZ_S
912U, // URSHL_VG4_4Z4Z_B
536U, // URSHL_VG4_4Z4Z_D
248U, // URSHL_VG4_4Z4Z_H
544U, // URSHL_VG4_4Z4Z_S
176U, // URSHL_VG4_4ZZ_B
184U, // URSHL_VG4_4ZZ_D
136U, // URSHL_VG4_4ZZ_H
96U, // URSHL_VG4_4ZZ_S
16918656U, // URSHL_ZPmZ_B
33691776U, // URSHL_ZPmZ_D
50998408U, // URSHL_ZPmZ_H
67252352U, // URSHL_ZPmZ_S
794768U, // URSHLv16i8
3160U, // URSHLv1i64
925848U, // URSHLv2i32
270440U, // URSHLv2i64
1056928U, // URSHLv4i16
401520U, // URSHLv4i32
532600U, // URSHLv8i16
1188008U, // URSHLv8i8
141440U, // URSHR_ZPmI_B
137344U, // URSHR_ZPmI_D
52309128U, // URSHR_ZPmI_H
143488U, // URSHR_ZPmI_S
3160U, // URSHRd
3216U, // URSHRv16i8_shift
3224U, // URSHRv2i32_shift
3176U, // URSHRv2i64_shift
3232U, // URSHRv4i16_shift
3184U, // URSHRv4i32_shift
3192U, // URSHRv8i16_shift
3240U, // URSHRv8i8_shift
24U, // URSQRTE_ZPmZ_S
40U, // URSQRTEv2i32
64U, // URSQRTEv4i32
393U, // URSRA_ZZI_B
43096U, // URSRA_ZZI_D
392U, // URSRA_ZZI_H
43096U, // URSRA_ZZI_S
43097U, // URSRAd
43152U, // URSRAv16i8_shift
43160U, // URSRAv2i32_shift
43112U, // URSRAv2i64_shift
43168U, // URSRAv4i16_shift
43120U, // URSRAv4i32_shift
43128U, // URSRAv8i16_shift
43176U, // URSRAv8i8_shift
81800U, // USDOT_VG2_M2Z2Z_BToS
2543496U, // USDOT_VG2_M2ZZI_BToS
53128U, // USDOT_VG2_M2ZZ_BToS
81800U, // USDOT_VG4_M4Z4Z_BToS
2543496U, // USDOT_VG4_M4ZZI_BToS
53128U, // USDOT_VG4_M4ZZ_BToS
9U, // USDOT_ZZZ
40969U, // USDOT_ZZZI
10495120U, // USDOTlanev16i8
10495144U, // USDOTlanev8i8
795792U, // USDOTv16i8
1189032U, // USDOTv8i8
3161U, // USHLLB_ZZI_D
224U, // USHLLB_ZZI_H
3160U, // USHLLB_ZZI_S
3161U, // USHLLT_ZZI_D
224U, // USHLLT_ZZI_H
3160U, // USHLLT_ZZI_S
3216U, // USHLLv16i8_shift
3224U, // USHLLv2i32_shift
3232U, // USHLLv4i16_shift
3184U, // USHLLv4i32_shift
3192U, // USHLLv8i16_shift
3240U, // USHLLv8i8_shift
794768U, // USHLv16i8
3160U, // USHLv1i64
925848U, // USHLv2i32
270440U, // USHLv2i64
1056928U, // USHLv4i16
401520U, // USHLv4i32
532600U, // USHLv8i16
1188008U, // USHLv8i8
3160U, // USHRd
3216U, // USHRv16i8_shift
3224U, // USHRv2i32_shift
3176U, // USHRv2i64_shift
3232U, // USHRv4i16_shift
3184U, // USHRv4i32_shift
3192U, // USHRv8i16_shift
3240U, // USHRv8i8_shift
40905U, // USMLALL_MZZI_BtoS
969U, // USMLALL_MZZ_BtoS
81800U, // USMLALL_VG2_M2Z2Z_BtoS
2543496U, // USMLALL_VG2_M2ZZI_BtoS
53132U, // USMLALL_VG2_M2ZZ_BtoS
81800U, // USMLALL_VG4_M4Z4Z_BtoS
2543496U, // USMLALL_VG4_M4ZZI_BtoS
53132U, // USMLALL_VG4_M4ZZ_BtoS
795792U, // USMMLA
9U, // USMMLA_ZZZ
0U, // USMOPA_MPPZZ_D
0U, // USMOPA_MPPZZ_S
0U, // USMOPS_MPPZZ_D
0U, // USMOPS_MPPZZ_S
16918656U, // USQADD_ZPmZ_B
33691776U, // USQADD_ZPmZ_D
50998408U, // USQADD_ZPmZ_H
67252352U, // USQADD_ZPmZ_S
32U, // USQADDv16i8
1U, // USQADDv1i16
1U, // USQADDv1i32
1U, // USQADDv1i64
1U, // USQADDv1i8
40U, // USQADDv2i32
48U, // USQADDv2i64
56U, // USQADDv4i16
64U, // USQADDv4i32
72U, // USQADDv8i16
80U, // USQADDv8i8
393U, // USRA_ZZI_B
43096U, // USRA_ZZI_D
392U, // USRA_ZZI_H
43096U, // USRA_ZZI_S
43097U, // USRAd
43152U, // USRAv16i8_shift
43160U, // USRAv2i32_shift
43112U, // USRAv2i64_shift
43168U, // USRAv4i16_shift
43120U, // USRAv4i32_shift
43128U, // USRAv8i16_shift
43176U, // USRAv8i8_shift
12377U, // USUBLB_ZZZ_D
176U, // USUBLB_ZZZ_H
5208U, // USUBLB_ZZZ_S
12377U, // USUBLT_ZZZ_D
176U, // USUBLT_ZZZ_H
5208U, // USUBLT_ZZZ_S
794768U, // USUBLv16i8_v8i16
925848U, // USUBLv2i32_v2i64
1056928U, // USUBLv4i16_v4i32
401520U, // USUBLv4i32_v2i64
532600U, // USUBLv8i16_v4i32
1188008U, // USUBLv8i8_v8i16
12376U, // USUBWB_ZZZ_D
176U, // USUBWB_ZZZ_H
5209U, // USUBWB_ZZZ_S
12376U, // USUBWT_ZZZ_D
176U, // USUBWT_ZZZ_H
5209U, // USUBWT_ZZZ_S
794744U, // USUBWv16i8_v8i16
925800U, // USUBWv2i32_v2i64
1056880U, // USUBWv4i16_v4i32
401512U, // USUBWv4i32_v2i64
532592U, // USUBWv8i16_v4i32
1187960U, // USUBWv8i8_v8i16
2543496U, // USVDOT_VG4_M4ZZI_BToS
1U, // UUNPKHI_ZZ_D
0U, // UUNPKHI_ZZ_H
0U, // UUNPKHI_ZZ_S
1U, // UUNPKLO_ZZ_D
0U, // UUNPKLO_ZZ_H
0U, // UUNPKLO_ZZ_S
0U, // UUNPK_VG2_2ZZ_D
0U, // UUNPK_VG2_2ZZ_H
0U, // UUNPK_VG2_2ZZ_S
0U, // UUNPK_VG4_4Z2Z_D
0U, // UUNPK_VG4_4Z2Z_H
0U, // UUNPK_VG4_4Z2Z_S
2529520U, // UVDOT_VG2_M2ZZI_HtoS
2543496U, // UVDOT_VG4_M4ZZI_BtoS
2529520U, // UVDOT_VG4_M4ZZI_HtoD
16U, // UXTB_ZPmZ_D
0U, // UXTB_ZPmZ_H
24U, // UXTB_ZPmZ_S
16U, // UXTH_ZPmZ_D
24U, // UXTH_ZPmZ_S
16U, // UXTW_ZPmZ_D
10329U, // UZP1_PPP_B
6232U, // UZP1_PPP_D
136U, // UZP1_PPP_H
12377U, // UZP1_PPP_S
10329U, // UZP1_ZZZ_B
6232U, // UZP1_ZZZ_D
136U, // UZP1_ZZZ_H
1016U, // UZP1_ZZZ_Q
12377U, // UZP1_ZZZ_S
794768U, // UZP1v16i8
925848U, // UZP1v2i32
270440U, // UZP1v2i64
1056928U, // UZP1v4i16
401520U, // UZP1v4i32
532600U, // UZP1v8i16
1188008U, // UZP1v8i8
10329U, // UZP2_PPP_B
6232U, // UZP2_PPP_D
136U, // UZP2_PPP_H
12377U, // UZP2_PPP_S
10329U, // UZP2_ZZZ_B
6232U, // UZP2_ZZZ_D
136U, // UZP2_ZZZ_H
1016U, // UZP2_ZZZ_Q
12377U, // UZP2_ZZZ_S
794768U, // UZP2v16i8
925848U, // UZP2v2i32
270440U, // UZP2v2i64
1056928U, // UZP2v4i16
401520U, // UZP2v4i32
532600U, // UZP2v8i16
1188008U, // UZP2v8i8
10329U, // UZPQ1_ZZZ_B
6232U, // UZPQ1_ZZZ_D
136U, // UZPQ1_ZZZ_H
12377U, // UZPQ1_ZZZ_S
10329U, // UZPQ2_ZZZ_B
6232U, // UZPQ2_ZZZ_D
136U, // UZPQ2_ZZZ_H
12377U, // UZPQ2_ZZZ_S
176U, // UZP_VG2_2ZZZ_B
0U, // UZP_VG2_2ZZZ_D
136U, // UZP_VG2_2ZZZ_H
1016U, // UZP_VG2_2ZZZ_Q
96U, // UZP_VG2_2ZZZ_S
0U, // UZP_VG4_4Z4Z_B
0U, // UZP_VG4_4Z4Z_D
0U, // UZP_VG4_4Z4Z_H
0U, // UZP_VG4_4Z4Z_Q
0U, // UZP_VG4_4Z4Z_S
0U, // WFET
0U, // WFIT
224U, // WHILEGE_2PXX_B
224U, // WHILEGE_2PXX_D
224U, // WHILEGE_2PXX_H
224U, // WHILEGE_2PXX_S
721554520U, // WHILEGE_CXX_B
721554520U, // WHILEGE_CXX_D
721554520U, // WHILEGE_CXX_H
721554520U, // WHILEGE_CXX_S
3160U, // WHILEGE_PWW_B
3160U, // WHILEGE_PWW_D
224U, // WHILEGE_PWW_H
3160U, // WHILEGE_PWW_S
3160U, // WHILEGE_PXX_B
3160U, // WHILEGE_PXX_D
224U, // WHILEGE_PXX_H
3160U, // WHILEGE_PXX_S
224U, // WHILEGT_2PXX_B
224U, // WHILEGT_2PXX_D
224U, // WHILEGT_2PXX_H
224U, // WHILEGT_2PXX_S
721554520U, // WHILEGT_CXX_B
721554520U, // WHILEGT_CXX_D
721554520U, // WHILEGT_CXX_H
721554520U, // WHILEGT_CXX_S
3160U, // WHILEGT_PWW_B
3160U, // WHILEGT_PWW_D
224U, // WHILEGT_PWW_H
3160U, // WHILEGT_PWW_S
3160U, // WHILEGT_PXX_B
3160U, // WHILEGT_PXX_D
224U, // WHILEGT_PXX_H
3160U, // WHILEGT_PXX_S
224U, // WHILEHI_2PXX_B
224U, // WHILEHI_2PXX_D
224U, // WHILEHI_2PXX_H
224U, // WHILEHI_2PXX_S
721554520U, // WHILEHI_CXX_B
721554520U, // WHILEHI_CXX_D
721554520U, // WHILEHI_CXX_H
721554520U, // WHILEHI_CXX_S
3160U, // WHILEHI_PWW_B
3160U, // WHILEHI_PWW_D
224U, // WHILEHI_PWW_H
3160U, // WHILEHI_PWW_S
3160U, // WHILEHI_PXX_B
3160U, // WHILEHI_PXX_D
224U, // WHILEHI_PXX_H
3160U, // WHILEHI_PXX_S
224U, // WHILEHS_2PXX_B
224U, // WHILEHS_2PXX_D
224U, // WHILEHS_2PXX_H
224U, // WHILEHS_2PXX_S
721554520U, // WHILEHS_CXX_B
721554520U, // WHILEHS_CXX_D
721554520U, // WHILEHS_CXX_H
721554520U, // WHILEHS_CXX_S
3160U, // WHILEHS_PWW_B
3160U, // WHILEHS_PWW_D
224U, // WHILEHS_PWW_H
3160U, // WHILEHS_PWW_S
3160U, // WHILEHS_PXX_B
3160U, // WHILEHS_PXX_D
224U, // WHILEHS_PXX_H
3160U, // WHILEHS_PXX_S
224U, // WHILELE_2PXX_B
224U, // WHILELE_2PXX_D
224U, // WHILELE_2PXX_H
224U, // WHILELE_2PXX_S
721554520U, // WHILELE_CXX_B
721554520U, // WHILELE_CXX_D
721554520U, // WHILELE_CXX_H
721554520U, // WHILELE_CXX_S
3160U, // WHILELE_PWW_B
3160U, // WHILELE_PWW_D
224U, // WHILELE_PWW_H
3160U, // WHILELE_PWW_S
3160U, // WHILELE_PXX_B
3160U, // WHILELE_PXX_D
224U, // WHILELE_PXX_H
3160U, // WHILELE_PXX_S
224U, // WHILELO_2PXX_B
224U, // WHILELO_2PXX_D
224U, // WHILELO_2PXX_H
224U, // WHILELO_2PXX_S
721554520U, // WHILELO_CXX_B
721554520U, // WHILELO_CXX_D
721554520U, // WHILELO_CXX_H
721554520U, // WHILELO_CXX_S
3160U, // WHILELO_PWW_B
3160U, // WHILELO_PWW_D
224U, // WHILELO_PWW_H
3160U, // WHILELO_PWW_S
3160U, // WHILELO_PXX_B
3160U, // WHILELO_PXX_D
224U, // WHILELO_PXX_H
3160U, // WHILELO_PXX_S
224U, // WHILELS_2PXX_B
224U, // WHILELS_2PXX_D
224U, // WHILELS_2PXX_H
224U, // WHILELS_2PXX_S
721554520U, // WHILELS_CXX_B
721554520U, // WHILELS_CXX_D
721554520U, // WHILELS_CXX_H
721554520U, // WHILELS_CXX_S
3160U, // WHILELS_PWW_B
3160U, // WHILELS_PWW_D
224U, // WHILELS_PWW_H
3160U, // WHILELS_PWW_S
3160U, // WHILELS_PXX_B
3160U, // WHILELS_PXX_D
224U, // WHILELS_PXX_H
3160U, // WHILELS_PXX_S
224U, // WHILELT_2PXX_B
224U, // WHILELT_2PXX_D
224U, // WHILELT_2PXX_H
224U, // WHILELT_2PXX_S
721554520U, // WHILELT_CXX_B
721554520U, // WHILELT_CXX_D
721554520U, // WHILELT_CXX_H
721554520U, // WHILELT_CXX_S
3160U, // WHILELT_PWW_B
3160U, // WHILELT_PWW_D
224U, // WHILELT_PWW_H
3160U, // WHILELT_PWW_S
3160U, // WHILELT_PXX_B
3160U, // WHILELT_PXX_D
224U, // WHILELT_PXX_H
3160U, // WHILELT_PXX_S
3160U, // WHILERW_PXX_B
3160U, // WHILERW_PXX_D
224U, // WHILERW_PXX_H
3160U, // WHILERW_PXX_S
3160U, // WHILEWR_PXX_B
3160U, // WHILEWR_PXX_D
224U, // WHILEWR_PXX_H
3160U, // WHILEWR_PXX_S
0U, // WRFFR
0U, // XAFLAG
3940456U, // XAR
141401U, // XAR_ZZZI_B
137304U, // XAR_ZZZI_D
52309128U, // XAR_ZZZI_H
143449U, // XAR_ZZZI_S
0U, // XPACD
0U, // XPACI
0U, // XPACLRI
72U, // XTNv16i8
48U, // XTNv2i32
64U, // XTNv4i16
48U, // XTNv4i32
64U, // XTNv8i16
72U, // XTNv8i8
0U, // ZERO_M
5U, // ZERO_MXI_2Z
5U, // ZERO_MXI_4Z
3U, // ZERO_MXI_VG2_2Z
3U, // ZERO_MXI_VG2_4Z
3U, // ZERO_MXI_VG2_Z
3U, // ZERO_MXI_VG4_2Z
3U, // ZERO_MXI_VG4_4Z
3U, // ZERO_MXI_VG4_Z
0U, // ZERO_T
10329U, // ZIP1_PPP_B
6232U, // ZIP1_PPP_D
136U, // ZIP1_PPP_H
12377U, // ZIP1_PPP_S
10329U, // ZIP1_ZZZ_B
6232U, // ZIP1_ZZZ_D
136U, // ZIP1_ZZZ_H
1016U, // ZIP1_ZZZ_Q
12377U, // ZIP1_ZZZ_S
794768U, // ZIP1v16i8
925848U, // ZIP1v2i32
270440U, // ZIP1v2i64
1056928U, // ZIP1v4i16
401520U, // ZIP1v4i32
532600U, // ZIP1v8i16
1188008U, // ZIP1v8i8
10329U, // ZIP2_PPP_B
6232U, // ZIP2_PPP_D
136U, // ZIP2_PPP_H
12377U, // ZIP2_PPP_S
10329U, // ZIP2_ZZZ_B
6232U, // ZIP2_ZZZ_D
136U, // ZIP2_ZZZ_H
1016U, // ZIP2_ZZZ_Q
12377U, // ZIP2_ZZZ_S
794768U, // ZIP2v16i8
925848U, // ZIP2v2i32
270440U, // ZIP2v2i64
1056928U, // ZIP2v4i16
401520U, // ZIP2v4i32
532600U, // ZIP2v8i16
1188008U, // ZIP2v8i8
10329U, // ZIPQ1_ZZZ_B
6232U, // ZIPQ1_ZZZ_D
136U, // ZIPQ1_ZZZ_H
12377U, // ZIPQ1_ZZZ_S
10329U, // ZIPQ2_ZZZ_B
6232U, // ZIPQ2_ZZZ_D
136U, // ZIPQ2_ZZZ_H
12377U, // ZIPQ2_ZZZ_S
176U, // ZIP_VG2_2ZZZ_B
0U, // ZIP_VG2_2ZZZ_D
136U, // ZIP_VG2_2ZZZ_H
1016U, // ZIP_VG2_2ZZZ_Q
96U, // ZIP_VG2_2ZZZ_S
0U, // ZIP_VG4_4Z4Z_B
0U, // ZIP_VG4_4Z4Z_D
0U, // ZIP_VG4_4Z4Z_H
0U, // ZIP_VG4_4Z4Z_Q
0U, // ZIP_VG4_4Z4Z_S
224U, // anonymous_15148
224U, // anonymous_15149
224U, // anonymous_5481
};
// Emit the opcode for the instruction.
uint64_t Bits = 0;
Bits |= (uint64_t)OpInfo0[MI->getOpcode()] << 0;
Bits |= (uint64_t)OpInfo1[MI->getOpcode()] << 32;
return {AsmStrs+(Bits & 16383)-1, Bits};
}
/// printInstruction - This method is automatically generated by tablegen
/// from the instruction set description.
LLVM_NO_PROFILE_INSTRUMENT_FUNCTION
void AArch64InstPrinter::printInstruction(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &O) {
O << "\t";
auto MnemonicInfo = getMnemonic(MI);
O << MnemonicInfo.first;
uint64_t Bits = MnemonicInfo.second;
assert(Bits != 0 && "Cannot print this instruction.");
// Fragment 0 encoded into 7 bits for 78 unique commands.
switch ((Bits >> 14) & 127) {
default: llvm_unreachable("Invalid command number.");
case 0:
// DBG_VALUE, DBG_VALUE_LIST, DBG_INSTR_REF, DBG_PHI, DBG_LABEL, BUNDLE, ...
return;
break;
case 1:
// TLSDESCCALL, ABSWr, ABSXr, ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADD...
printOperand(MI, 0, STI, O);
break;
case 2:
// ABS_ZPmZ_B, ADDHNB_ZZZ_B, ADDHNT_ZZZ_B, ADDP_ZPmZ_B, ADD_ZI_B, ADD_ZPm...
printSVERegOp<'b'>(MI, 0, STI, O);
break;
case 3:
// ABS_ZPmZ_D, ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDP_ZPmZ_D, ADD_ZI_D, ADD_ZPmZ_...
printSVERegOp<'d'>(MI, 0, STI, O);
break;
case 4:
// ABS_ZPmZ_H, ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADDP_ZPmZ_H, ADD_ZI_H, ADD_ZPm...
printSVERegOp<'h'>(MI, 0, STI, O);
O << ", ";
break;
case 5:
// ABS_ZPmZ_S, ADCLB_ZZZ_S, ADCLT_ZZZ_S, ADDHNB_ZZZ_S, ADDHNT_ZZZ_S, ADDP...
printSVERegOp<'s'>(MI, 0, STI, O);
break;
case 6:
// ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A...
printVRegOperand(MI, 0, STI, O);
break;
case 7:
// ADDHA_MPPZ_D, ADDHA_MPPZ_S, ADDVA_MPPZ_D, ADDVA_MPPZ_S, BFMOPA_MPPZZ, ...
printMatrixTile(MI, 0, STI, O);
O << ", ";
printSVERegOp<>(MI, 2, STI, O);
O << "/m, ";
printSVERegOp<>(MI, 3, STI, O);
O << "/m, ";
break;
case 8:
// ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ...
printVRegOperand(MI, 1, STI, O);
break;
case 9:
// ADD_VG2_2ZZ_B, ADD_VG4_4ZZ_B, LD1B, LD1B_2Z, LD1B_2Z_IMM, LD1B_4Z, LD1...
printTypedVectorList<0,'b'>(MI, 0, STI, O);
O << ", ";
break;
case 10:
// ADD_VG2_2ZZ_D, ADD_VG4_4ZZ_D, FCLAMP_VG2_2Z2Z_D, FCLAMP_VG4_4Z4Z_D, FM...
printTypedVectorList<0,'d'>(MI, 0, STI, O);
O << ", ";
break;
case 11:
// ADD_VG2_2ZZ_H, ADD_VG4_4ZZ_H, BFCLAMP_VG2_2ZZZ_H, BFCLAMP_VG4_4ZZZ_H, ...
printTypedVectorList<0,'h'>(MI, 0, STI, O);
O << ", ";
break;
case 12:
// ADD_VG2_2ZZ_S, ADD_VG4_4ZZ_S, FCLAMP_VG2_2Z2Z_S, FCLAMP_VG4_4Z4Z_S, FC...
printTypedVectorList<0,'s'>(MI, 0, STI, O);
O << ", ";
break;
case 13:
// ADD_VG2_M2Z2Z_D, ADD_VG2_M2ZZ_D, ADD_VG2_M2Z_D, ADD_VG4_M4Z4Z_D, ADD_V...
printMatrix<64>(MI, 0, STI, O);
O << '[';
printOperand(MI, 2, STI, O);
O << ", ";
break;
case 14:
// ADD_VG2_M2Z2Z_S, ADD_VG2_M2ZZ_S, ADD_VG2_M2Z_S, ADD_VG4_M4Z4Z_S, ADD_V...
printMatrix<32>(MI, 0, STI, O);
O << '[';
printOperand(MI, 2, STI, O);
O << ", ";
break;
case 15:
// ANDV_VPZ_B, EORV_VPZ_B, ORV_VPZ_B, SMAXV_VPZ_B, SMINV_VPZ_B, UMAXV_VPZ...
printZPRasFPR<8>(MI, 0, STI, O);
O << ", ";
printSVERegOp<>(MI, 1, STI, O);
O << ", ";
printSVERegOp<'b'>(MI, 2, STI, O);
return;
break;
case 16:
// ANDV_VPZ_D, EORV_VPZ_D, FADDA_VPZ_D, FADDV_VPZ_D, FMAXNMV_VPZ_D, FMAXV...
printZPRasFPR<64>(MI, 0, STI, O);
O << ", ";
printSVERegOp<>(MI, 1, STI, O);
O << ", ";
break;
case 17:
// ANDV_VPZ_H, EORV_VPZ_H, FADDA_VPZ_H, FADDV_VPZ_H, FMAXNMV_VPZ_H, FMAXV...
printZPRasFPR<16>(MI, 0, STI, O);
O << ", ";
printSVERegOp<>(MI, 1, STI, O);
O << ", ";
break;
case 18:
// ANDV_VPZ_S, EORV_VPZ_S, FADDA_VPZ_S, FADDV_VPZ_S, FMAXNMV_VPZ_S, FMAXV...
printZPRasFPR<32>(MI, 0, STI, O);
O << ", ";
printSVERegOp<>(MI, 1, STI, O);
O << ", ";
break;
case 19:
// AUTDA, AUTDB, AUTDZA, AUTDZB, AUTIA, AUTIB, AUTIZA, AUTIZB, CASAB, CAS...
printOperand(MI, 1, STI, O);
break;
case 20:
// B, BL
printAlignedLabel(MI, Address, 0, STI, O);
return;
break;
case 21:
// BCcc, Bcc
printCondCode(MI, 0, STI, O);
O << "\t";
printAlignedLabel(MI, Address, 1, STI, O);
return;
break;
case 22:
// BFADD_VG2_M2Z_H, BFADD_VG4_M4Z_H, BFMLA_VG2_M2Z2Z, BFMLA_VG2_M2ZZ, BFM...
printMatrix<16>(MI, 0, STI, O);
O << '[';
printOperand(MI, 2, STI, O);
O << ", ";
printMatrixIndex(MI, 3, STI, O);
break;
case 23:
// BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, SMC, SVC, TCANCEL
printImmHex(MI, 0, STI, O);
return;
break;
case 24:
// CASPALW, CASPAW, CASPLW, CASPW
printGPRSeqPairsClassOperand<32>(MI, 1, STI, O);
O << ", ";
printGPRSeqPairsClassOperand<32>(MI, 2, STI, O);
O << ", [";
printOperand(MI, 3, STI, O);
O << ']';
return;
break;
case 25:
// CASPALX, CASPAX, CASPLX, CASPX, RCWCASP, RCWCASPA, RCWCASPAL, RCWCASPL...
printGPRSeqPairsClassOperand<64>(MI, 1, STI, O);
O << ", ";
printGPRSeqPairsClassOperand<64>(MI, 2, STI, O);
O << ", [";
printOperand(MI, 3, STI, O);
O << ']';
return;
break;
case 26:
// CPYE, CPYEN, CPYERN, CPYERT, CPYERTN, CPYERTRN, CPYERTWN, CPYET, CPYET...
printOperand(MI, 3, STI, O);
O << "]!, [";
printOperand(MI, 4, STI, O);
O << "]!, ";
printOperand(MI, 5, STI, O);
O << '!';
return;
break;
case 27:
// DMB, DSB, ISB, TSB
printBarrierOption(MI, 0, STI, O);
return;
break;
case 28:
// DSBnXS
printBarriernXSOption(MI, 0, STI, O);
return;
break;
case 29:
// DUP_ZZI_Q, EXTRACT_ZPMXI_H_Q, EXTRACT_ZPMXI_V_Q, MOVAZ_ZMI_H_Q, MOVAZ_...
printSVERegOp<'q'>(MI, 0, STI, O);
O << ", ";
break;
case 30:
// GLD1Q, LD1D_Q, LD1D_Q_IMM, LD1W_Q, LD1W_Q_IMM, LD2Q, LD2Q_IMM, LD3Q, L...
printTypedVectorList<0,'q'>(MI, 0, STI, O);
O << ", ";
break;
case 31:
// HINT
printImm(MI, 0, STI, O);
return;
break;
case 32:
// INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q...
printMatrixTileVector<0>(MI, 0, STI, O);
O << '[';
break;
case 33:
// INSERT_MXIPZ_V_B, INSERT_MXIPZ_V_D, INSERT_MXIPZ_V_H, INSERT_MXIPZ_V_Q...
printMatrixTileVector<1>(MI, 0, STI, O);
O << '[';
break;
case 34:
// LD1B_VG2_M2ZPXI, LD1B_VG2_M2ZPXX, LDNT1B_VG2_M2ZPXI, LDNT1B_VG2_M2ZPXX...
printTypedVectorList<0, 'b'>(MI, 0, STI, O);
break;
case 35:
// LD1Fourv16b, LD1Onev16b, LD1Rv16b, LD1Threev16b, LD1Twov16b, LD2Rv16b,...
printTypedVectorList<16, 'b'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 36:
// LD1Fourv16b_POST, LD1Onev16b_POST, LD1Rv16b_POST, LD1Threev16b_POST, L...
printTypedVectorList<16, 'b'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 37:
// LD1Fourv1d, LD1Onev1d, LD1Rv1d, LD1Threev1d, LD1Twov1d, LD2Rv1d, LD3Rv...
printTypedVectorList<1, 'd'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 38:
// LD1Fourv1d_POST, LD1Onev1d_POST, LD1Rv1d_POST, LD1Threev1d_POST, LD1Tw...
printTypedVectorList<1, 'd'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 39:
// LD1Fourv2d, LD1Onev2d, LD1Rv2d, LD1Threev2d, LD1Twov2d, LD2Rv2d, LD2Tw...
printTypedVectorList<2, 'd'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 40:
// LD1Fourv2d_POST, LD1Onev2d_POST, LD1Rv2d_POST, LD1Threev2d_POST, LD1Tw...
printTypedVectorList<2, 'd'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 41:
// LD1Fourv2s, LD1Onev2s, LD1Rv2s, LD1Threev2s, LD1Twov2s, LD2Rv2s, LD2Tw...
printTypedVectorList<2, 's'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 42:
// LD1Fourv2s_POST, LD1Onev2s_POST, LD1Rv2s_POST, LD1Threev2s_POST, LD1Tw...
printTypedVectorList<2, 's'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 43:
// LD1Fourv4h, LD1Onev4h, LD1Rv4h, LD1Threev4h, LD1Twov4h, LD2Rv4h, LD2Tw...
printTypedVectorList<4, 'h'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 44:
// LD1Fourv4h_POST, LD1Onev4h_POST, LD1Rv4h_POST, LD1Threev4h_POST, LD1Tw...
printTypedVectorList<4, 'h'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 45:
// LD1Fourv4s, LD1Onev4s, LD1Rv4s, LD1Threev4s, LD1Twov4s, LD2Rv4s, LD2Tw...
printTypedVectorList<4, 's'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 46:
// LD1Fourv4s_POST, LD1Onev4s_POST, LD1Rv4s_POST, LD1Threev4s_POST, LD1Tw...
printTypedVectorList<4, 's'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 47:
// LD1Fourv8b, LD1Onev8b, LD1Rv8b, LD1Threev8b, LD1Twov8b, LD2Rv8b, LD2Tw...
printTypedVectorList<8, 'b'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 48:
// LD1Fourv8b_POST, LD1Onev8b_POST, LD1Rv8b_POST, LD1Threev8b_POST, LD1Tw...
printTypedVectorList<8, 'b'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 49:
// LD1Fourv8h, LD1Onev8h, LD1Rv8h, LD1Threev8h, LD1Twov8h, LD2Rv8h, LD2Tw...
printTypedVectorList<8, 'h'>(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 50:
// LD1Fourv8h_POST, LD1Onev8h_POST, LD1Rv8h_POST, LD1Threev8h_POST, LD1Tw...
printTypedVectorList<8, 'h'>(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << "], ";
break;
case 51:
// LD1H_VG2_M2ZPXI, LD1H_VG2_M2ZPXX, LDNT1H_VG2_M2ZPXI, LDNT1H_VG2_M2ZPXX...
printTypedVectorList<0, 'h'>(MI, 0, STI, O);
break;
case 52:
// LD1i16, LD2i16, LD3i16, LD4i16, ST1i16_POST, ST2i16_POST, ST3i16_POST,...
printTypedVectorList<0, 'h'>(MI, 1, STI, O);
printVectorIndex(MI, 2, STI, O);
O << ", [";
printOperand(MI, 3, STI, O);
break;
case 53:
// LD1i16_POST, LD2i16_POST, LD3i16_POST, LD4i16_POST
printTypedVectorList<0, 'h'>(MI, 2, STI, O);
printVectorIndex(MI, 3, STI, O);
O << ", [";
printOperand(MI, 4, STI, O);
O << "], ";
break;
case 54:
// LD1i32, LD2i32, LD3i32, LD4i32, ST1i32_POST, ST2i32_POST, ST3i32_POST,...
printTypedVectorList<0, 's'>(MI, 1, STI, O);
printVectorIndex(MI, 2, STI, O);
O << ", [";
printOperand(MI, 3, STI, O);
break;
case 55:
// LD1i32_POST, LD2i32_POST, LD3i32_POST, LD4i32_POST
printTypedVectorList<0, 's'>(MI, 2, STI, O);
printVectorIndex(MI, 3, STI, O);
O << ", [";
printOperand(MI, 4, STI, O);
O << "], ";
break;
case 56:
// LD1i64, LD2i64, LD3i64, LD4i64, LDAP1, ST1i64_POST, ST2i64_POST, ST3i6...
printTypedVectorList<0, 'd'>(MI, 1, STI, O);
printVectorIndex(MI, 2, STI, O);
O << ", [";
printOperand(MI, 3, STI, O);
break;
case 57:
// LD1i64_POST, LD2i64_POST, LD3i64_POST, LD4i64_POST
printTypedVectorList<0, 'd'>(MI, 2, STI, O);
printVectorIndex(MI, 3, STI, O);
O << ", [";
printOperand(MI, 4, STI, O);
O << "], ";
break;
case 58:
// LD1i8, LD2i8, LD3i8, LD4i8, ST1i8_POST, ST2i8_POST, ST3i8_POST, ST4i8_...
printTypedVectorList<0, 'b'>(MI, 1, STI, O);
printVectorIndex(MI, 2, STI, O);
O << ", [";
printOperand(MI, 3, STI, O);
break;
case 59:
// LD1i8_POST, LD2i8_POST, LD3i8_POST, LD4i8_POST
printTypedVectorList<0, 'b'>(MI, 2, STI, O);
printVectorIndex(MI, 3, STI, O);
O << ", [";
printOperand(MI, 4, STI, O);
O << "], ";
break;
case 60:
// LD64B, ST64B
printGPR64x8(MI, 0, STI, O);
O << ", [";
printOperand(MI, 1, STI, O);
O << ']';
return;
break;
case 61:
// LDCLRP, LDCLRPA, LDCLRPAL, LDCLRPL, LDSETP, LDSETPA, LDSETPAL, LDSETPL...
printOperand(MI, 2, STI, O);
break;
case 62:
// LDR_PXI, LDR_ZXI, MOVPRFX_ZZ, PMOV_ZIP_B, PMOV_ZIP_D, PMOV_ZIP_H, PMOV...
printSVERegOp<>(MI, 0, STI, O);
break;
case 63:
// LDR_ZA, STR_ZA
printMatrix<0>(MI, 0, STI, O);
O << '[';
printOperand(MI, 1, STI, O);
O << ", ";
printMatrixIndex(MI, 2, STI, O);
O << "], [";
printOperand(MI, 3, STI, O);
O << ", ";
printOperand(MI, 4, STI, O);
O << ", mul vl]";
return;
break;
case 64:
// MRRS
printGPRSeqPairsClassOperand<64>(MI, 0, STI, O);
O << ", ";
printMRSSystemRegister(MI, 1, STI, O);
return;
break;
case 65:
// MSR, MSRR
printMSRSystemRegister(MI, 0, STI, O);
O << ", ";
break;
case 66:
// MSRpstateImm1, MSRpstateImm4
printSystemPStateField(MI, 0, STI, O);
O << ", ";
printOperand(MI, 1, STI, O);
return;
break;
case 67:
// MSRpstatesvcrImm1
printSVCROp(MI, 0, STI, O);
O << ", ";
printOperand(MI, 1, STI, O);
return;
break;
case 68:
// PRFB_D_PZI, PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_SCALED, PRF...
printPrefetchOp<true>(MI, 0, STI, O);
O << ", ";
printSVERegOp<>(MI, 1, STI, O);
O << ", [";
break;
case 69:
// PRFMl, PRFMroW, PRFMroX, PRFMui, PRFUMi
printPrefetchOp(MI, 0, STI, O);
break;
case 70:
// PTRUE_C_B, WHILEGE_CXX_B, WHILEGT_CXX_B, WHILEHI_CXX_B, WHILEHS_CXX_B,...
printPredicateAsCounter<8>(MI, 0, STI, O);
break;
case 71:
// PTRUE_C_D, WHILEGE_CXX_D, WHILEGT_CXX_D, WHILEHI_CXX_D, WHILEHS_CXX_D,...
printPredicateAsCounter<64>(MI, 0, STI, O);
break;
case 72:
// PTRUE_C_H, WHILEGE_CXX_H, WHILEGT_CXX_H, WHILEHI_CXX_H, WHILEHS_CXX_H,...
printPredicateAsCounter<16>(MI, 0, STI, O);
break;
case 73:
// PTRUE_C_S, WHILEGE_CXX_S, WHILEGT_CXX_S, WHILEHI_CXX_S, WHILEHS_CXX_S,...
printPredicateAsCounter<32>(MI, 0, STI, O);
break;
case 74:
// RPRFM
printRPRFMOperand(MI, 0, STI, O);
O << ", ";
printOperand(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << ']';
return;
break;
case 75:
// ST1i32, ST2i32, ST3i32, ST4i32
printTypedVectorList<0, 's'>(MI, 0, STI, O);
printVectorIndex(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << ']';
return;
break;
case 76:
// ST1i64, ST2i64, ST3i64, ST4i64, STL1
printTypedVectorList<0, 'd'>(MI, 0, STI, O);
printVectorIndex(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << ']';
return;
break;
case 77:
// ZERO_M
printMatrixTileList(MI, 0, STI, O);
return;
break;
}
// Fragment 1 encoded into 7 bits for 89 unique commands.
switch ((Bits >> 21) & 127) {
default: llvm_unreachable("Invalid command number.");
case 0:
// TLSDESCCALL, AUTDZA, AUTDZB, AUTIZA, AUTIZB, BLR, BLRAAZ, BLRABZ, BR, ...
return;
break;
case 1:
// ABSWr, ABSXr, ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, ABSv1i64, ADCLB_ZZZ_...
O << ", ";
break;
case 2:
// ABS_ZPmZ_H, BFCVTNT_ZPmZ, BFCVT_ZPmZ, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPm...
printSVERegOp<>(MI, 2, STI, O);
O << "/m, ";
break;
case 3:
// ABSv16i8, ADDHNv8i16_v16i8, ADDPv16i8, ADDQV_VPZ_B, ADDv16i8, AESDrr, ...
O << ".16b, ";
break;
case 4:
// ABSv2i32, ADDHNv2i64_v2i32, ADDPv2i32, ADDv2i32, BF16DOTlanev4bf16, BF...
O << ".2s, ";
break;
case 5:
// ABSv2i64, ADDPv2i64, ADDQV_VPZ_D, ADDv2i64, ANDQV_VPZ_D, CMEQv2i64, CM...
O << ".2d, ";
break;
case 6:
// ABSv4i16, ADDHNv4i32_v4i16, ADDPv4i16, ADDv4i16, BFCVTN, BICv4i16, CLS...
O << ".4h, ";
break;
case 7:
// ABSv4i32, ADDHNv2i64_v4i32, ADDPv4i32, ADDQV_VPZ_S, ADDv4i32, ANDQV_VP...
O << ".4s, ";
break;
case 8:
// ABSv8i16, ADDHNv4i32_v8i16, ADDPv8i16, ADDQV_VPZ_H, ADDv8i16, ANDQV_VP...
O << ".8h, ";
break;
case 9:
// ABSv8i8, ADDHNv8i16_v8i8, ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8...
O << ".8b, ";
break;
case 10:
// ADDHA_MPPZ_D, ADDVA_MPPZ_D, FMOPA_MPPZZ_D, FMOPS_MPPZZ_D
printSVERegOp<'d'>(MI, 4, STI, O);
break;
case 11:
// ADDHA_MPPZ_S, ADDVA_MPPZ_S, BMOPA_MPPZZ_S, BMOPS_MPPZZ_S, FMOPA_MPPZZ_...
printSVERegOp<'s'>(MI, 4, STI, O);
break;
case 12:
// ADDHNB_ZZZ_H, RADDHNB_ZZZ_H, RSHRNB_ZZI_H, RSUBHNB_ZZZ_H, SHRNB_ZZI_H,...
printSVERegOp<'s'>(MI, 1, STI, O);
break;
case 13:
// ADDHNT_ZZZ_H, ANDV_VPZ_S, EORV_VPZ_S, FADDV_VPZ_S, FCLAMP_VG2_2Z2Z_S, ...
printSVERegOp<'s'>(MI, 2, STI, O);
break;
case 14:
// ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID...
printSVERegOp<>(MI, 1, STI, O);
break;
case 15:
// ADD_VG2_2ZZ_B, ADD_VG4_4ZZ_B, SMAX_VG2_2Z2Z_B, SMAX_VG2_2ZZ_B, SMAX_VG...
printTypedVectorList<0,'b'>(MI, 1, STI, O);
break;
case 16:
// ADD_VG2_2ZZ_D, ADD_VG4_4ZZ_D, FMAXNM_VG2_2Z2Z_D, FMAXNM_VG2_2ZZ_D, FMA...
printTypedVectorList<0,'d'>(MI, 1, STI, O);
break;
case 17:
// ADD_VG2_2ZZ_H, ADD_VG4_4ZZ_H, BFMAXNM_VG2_2Z2Z_H, BFMAXNM_VG2_2ZZ_H, B...
printTypedVectorList<0,'h'>(MI, 1, STI, O);
break;
case 18:
// ADD_VG2_2ZZ_S, ADD_VG4_4ZZ_S, BFCVTN_Z2Z_StoH, BFCVT_Z2Z_StoH, FCVTN_Z...
printTypedVectorList<0,'s'>(MI, 1, STI, O);
break;
case 19:
// ADD_VG2_M2Z2Z_D, ADD_VG2_M2Z2Z_S, ADD_VG2_M2ZZ_D, ADD_VG2_M2ZZ_S, ADD_...
printMatrixIndex(MI, 3, STI, O);
break;
case 20:
// ADD_ZI_H, ADD_ZZZ_H, ASR_WIDE_ZZZ_H, ASR_ZZI_H, BDEP_ZZZ_H, BEXT_ZZZ_H...
printSVERegOp<'h'>(MI, 1, STI, O);
break;
case 21:
// ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, ADR_LSL_ZZZ_D_2, ADR_LSL_ZZZ_D_3, AD...
O << ", [";
break;
case 22:
// ANDV_VPZ_D, EORV_VPZ_D, FADDV_VPZ_D, FCLAMP_VG2_2Z2Z_D, FCLAMP_VG4_4Z4...
printSVERegOp<'d'>(MI, 2, STI, O);
break;
case 23:
// ANDV_VPZ_H, BFCLAMP_VG2_2ZZZ_H, BFCLAMP_VG4_4ZZZ_H, BFCLAMP_ZZZ, BFMLA...
printSVERegOp<'h'>(MI, 2, STI, O);
break;
case 24:
// BFADD_VG2_M2Z_H, BFMLA_VG2_M2Z2Z, BFMLA_VG2_M2ZZ, BFMLA_VG2_M2ZZI, BFM...
O << ", vgx2], ";
printTypedVectorList<0,'h'>(MI, 4, STI, O);
break;
case 25:
// BFADD_VG4_M4Z_H, BFMLA_VG4_M4Z4Z, BFMLA_VG4_M4ZZ, BFMLA_VG4_M4ZZI, BFM...
O << ", vgx4], ";
printTypedVectorList<0,'h'>(MI, 4, STI, O);
break;
case 26:
// BFMLAL_MZZI_S, BFMLAL_MZZ_S, BFMLAL_VG2_M2Z2Z_S, BFMLAL_VG2_M2ZZI_S, B...
printImmRangeScale<2, 1>(MI, 3, STI, O);
break;
case 27:
// BFMOPA_MPPZZ, BFMOPA_MPPZZ_H, BFMOPS_MPPZZ, BFMOPS_MPPZZ_H, FMOPAL_MPP...
printSVERegOp<'h'>(MI, 4, STI, O);
O << ", ";
printSVERegOp<'h'>(MI, 5, STI, O);
return;
break;
case 28:
// DECH_ZPiI, INCH_ZPiI, SQDECH_ZPiI, SQINCH_ZPiI, UQDECH_ZPiI, UQINCH_ZP...
printSVEPattern(MI, 2, STI, O);
O << ", mul ";
printOperand(MI, 3, STI, O);
return;
break;
case 29:
// DUP_ZI_H
printImm8OptLsl<int16_t>(MI, 1, STI, O);
return;
break;
case 30:
// DUP_ZR_H, INDEX_RI_H, INDEX_RR_H, LD1_MXIPXX_H_B, LD1_MXIPXX_H_D, LD1_...
printOperand(MI, 1, STI, O);
break;
case 31:
// DUP_ZZI_Q, TRN1_ZZZ_Q, TRN2_ZZZ_Q, UZP1_ZZZ_Q, UZP2_ZZZ_Q, UZP_VG2_2ZZ...
printSVERegOp<'q'>(MI, 1, STI, O);
break;
case 32:
// FADDA_VPZ_D
printZPRasFPR<64>(MI, 2, STI, O);
O << ", ";
printSVERegOp<'d'>(MI, 3, STI, O);
return;
break;
case 33:
// FADDA_VPZ_H, INSR_ZV_H
printZPRasFPR<16>(MI, 2, STI, O);
break;
case 34:
// FADDA_VPZ_S
printZPRasFPR<32>(MI, 2, STI, O);
O << ", ";
printSVERegOp<'s'>(MI, 3, STI, O);
return;
break;
case 35:
// FCMPDri, FCMPEDri, FCMPEHri, FCMPESri, FCMPHri, FCMPSri
O << ", #0.0";
return;
break;
case 36:
// FDUP_ZI_H
printFPImmOperand(MI, 1, STI, O);
return;
break;
case 37:
// FMOVXDHighr, INSvi64gpr, INSvi64lane
O << ".d";
printVectorIndex(MI, 2, STI, O);
O << ", ";
break;
case 38:
// INDEX_II_H, INDEX_IR_H
printSImm<16>(MI, 1, STI, O);
O << ", ";
break;
case 39:
// INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q...
printOperand(MI, 2, STI, O);
break;
case 40:
// INSvi16gpr, INSvi16lane
O << ".h";
printVectorIndex(MI, 2, STI, O);
O << ", ";
break;
case 41:
// INSvi32gpr, INSvi32lane
O << ".s";
printVectorIndex(MI, 2, STI, O);
O << ", ";
break;
case 42:
// INSvi8gpr, INSvi8lane
O << ".b";
printVectorIndex(MI, 2, STI, O);
O << ", ";
break;
case 43:
// LD1B_2Z, LD1B_2Z_IMM, LD1B_4Z, LD1B_4Z_IMM, LD1B_VG4_M4ZPXI, LD1B_VG4_...
printPredicateAsCounter<0>(MI, 1, STI, O);
break;
case 44:
// LD1Fourv16b_POST, LD1Fourv2d_POST, LD1Fourv4s_POST, LD1Fourv8h_POST, L...
printPostIncOperand<64>(MI, 3, STI, O);
return;
break;
case 45:
// LD1Fourv1d_POST, LD1Fourv2s_POST, LD1Fourv4h_POST, LD1Fourv8b_POST, LD...
printPostIncOperand<32>(MI, 3, STI, O);
return;
break;
case 46:
// LD1Onev16b_POST, LD1Onev2d_POST, LD1Onev4s_POST, LD1Onev8h_POST, LD1Tw...
printPostIncOperand<16>(MI, 3, STI, O);
return;
break;
case 47:
// LD1Onev1d_POST, LD1Onev2s_POST, LD1Onev4h_POST, LD1Onev8b_POST, LD1Rv1...
printPostIncOperand<8>(MI, 3, STI, O);
return;
break;
case 48:
// LD1Rv16b_POST, LD1Rv8b_POST
printPostIncOperand<1>(MI, 3, STI, O);
return;
break;
case 49:
// LD1Rv2s_POST, LD1Rv4s_POST, LD2Rv4h_POST, LD2Rv8h_POST, LD4Rv16b_POST,...
printPostIncOperand<4>(MI, 3, STI, O);
return;
break;
case 50:
// LD1Rv4h_POST, LD1Rv8h_POST, LD2Rv16b_POST, LD2Rv8b_POST
printPostIncOperand<2>(MI, 3, STI, O);
return;
break;
case 51:
// LD1Threev16b_POST, LD1Threev2d_POST, LD1Threev4s_POST, LD1Threev8h_POS...
printPostIncOperand<48>(MI, 3, STI, O);
return;
break;
case 52:
// LD1Threev1d_POST, LD1Threev2s_POST, LD1Threev4h_POST, LD1Threev8b_POST...
printPostIncOperand<24>(MI, 3, STI, O);
return;
break;
case 53:
// LD1i16, LD1i32, LD1i64, LD1i8, LD2i16, LD2i32, LD2i64, LD2i8, LD3i16, ...
O << ']';
return;
break;
case 54:
// LD1i16_POST, LD2i8_POST
printPostIncOperand<2>(MI, 5, STI, O);
return;
break;
case 55:
// LD1i32_POST, LD2i16_POST, LD4i8_POST
printPostIncOperand<4>(MI, 5, STI, O);
return;
break;
case 56:
// LD1i64_POST, LD2i32_POST, LD4i16_POST
printPostIncOperand<8>(MI, 5, STI, O);
return;
break;
case 57:
// LD1i8_POST
printPostIncOperand<1>(MI, 5, STI, O);
return;
break;
case 58:
// LD2i64_POST, LD4i32_POST
printPostIncOperand<16>(MI, 5, STI, O);
return;
break;
case 59:
// LD3Rv16b_POST, LD3Rv8b_POST
printPostIncOperand<3>(MI, 3, STI, O);
return;
break;
case 60:
// LD3Rv2s_POST, LD3Rv4s_POST
printPostIncOperand<12>(MI, 3, STI, O);
return;
break;
case 61:
// LD3Rv4h_POST, LD3Rv8h_POST
printPostIncOperand<6>(MI, 3, STI, O);
return;
break;
case 62:
// LD3i16_POST
printPostIncOperand<6>(MI, 5, STI, O);
return;
break;
case 63:
// LD3i32_POST
printPostIncOperand<12>(MI, 5, STI, O);
return;
break;
case 64:
// LD3i64_POST
printPostIncOperand<24>(MI, 5, STI, O);
return;
break;
case 65:
// LD3i8_POST
printPostIncOperand<3>(MI, 5, STI, O);
return;
break;
case 66:
// LD4i64_POST
printPostIncOperand<32>(MI, 5, STI, O);
return;
break;
case 67:
// MOPSSETGE, MOPSSETGEN, MOPSSETGET, MOPSSETGETN, SETE, SETEN, SETET, SE...
O << "]!, ";
printOperand(MI, 3, STI, O);
O << "!, ";
printOperand(MI, 4, STI, O);
return;
break;
case 68:
// MOVAZ_2ZMI_H_B, MOVAZ_2ZMI_H_D, MOVAZ_2ZMI_H_H, MOVAZ_2ZMI_H_S, MOVAZ_...
printMatrixTileVector<0>(MI, 2, STI, O);
O << '[';
printOperand(MI, 3, STI, O);
O << ", ";
break;
case 69:
// MOVAZ_2ZMI_V_B, MOVAZ_2ZMI_V_D, MOVAZ_2ZMI_V_H, MOVAZ_2ZMI_V_S, MOVAZ_...
printMatrixTileVector<1>(MI, 2, STI, O);
O << '[';
printOperand(MI, 3, STI, O);
O << ", ";
break;
case 70:
// MOVAZ_VG2_2ZM, MOVAZ_VG4_4ZM
printMatrix<64>(MI, 2, STI, O);
O << '[';
printOperand(MI, 3, STI, O);
O << ", ";
printMatrixIndex(MI, 4, STI, O);
break;
case 71:
// MOVAZ_ZMI_H_H, MOVAZ_ZMI_H_Q, MOVA_2ZMXI_H_B, MOVA_2ZMXI_H_D, MOVA_2ZM...
printMatrixTileVector<0>(MI, 1, STI, O);
O << '[';
break;
case 72:
// MOVAZ_ZMI_V_H, MOVAZ_ZMI_V_Q, MOVA_2ZMXI_V_B, MOVA_2ZMXI_V_D, MOVA_2ZM...
printMatrixTileVector<1>(MI, 1, STI, O);
O << '[';
break;
case 73:
// MOVA_VG2_2ZMXI, MOVA_VG4_4ZMXI
printMatrix<64>(MI, 1, STI, O);
O << '[';
printOperand(MI, 2, STI, O);
O << ", ";
printMatrixIndex(MI, 3, STI, O);
break;
case 74:
// MOVT_TIX
printVectorIndex<8>(MI, 1, STI, O);
O << ", ";
printOperand(MI, 2, STI, O);
return;
break;
case 75:
// MSRR
printGPRSeqPairsClassOperand<64>(MI, 1, STI, O);
return;
break;
case 76:
// PMOV_ZIP_B, PMOV_ZIP_D, PMOV_ZIP_H, PMOV_ZIP_S
printVectorIndex(MI, 2, STI, O);
O << ", ";
break;
case 77:
// PMULLB_ZZZ_H, PMULLT_ZZZ_H, PUNPKHI_PP, PUNPKLO_PP, SABDLB_ZZZ_H, SABD...
printSVERegOp<'b'>(MI, 1, STI, O);
break;
case 78:
// PMULLB_ZZZ_Q, PMULLT_ZZZ_Q, UZP_VG2_2ZZZ_D, ZIP_VG2_2ZZZ_D
printSVERegOp<'d'>(MI, 1, STI, O);
O << ", ";
printSVERegOp<'d'>(MI, 2, STI, O);
return;
break;
case 79:
// PMULLv1i64, PMULLv2i64
O << ".1q, ";
printVRegOperand(MI, 1, STI, O);
break;
case 80:
// PTRUES_H, PTRUE_H
printSVEPattern(MI, 1, STI, O);
return;
break;
case 81:
// SABALB_ZZZ_H, SABALT_ZZZ_H, SADDV_VPZ_B, SCLAMP_VG2_2Z2Z_B, SCLAMP_VG4...
printSVERegOp<'b'>(MI, 2, STI, O);
break;
case 82:
// SADALPv2i32_v1i64, SADDLPv2i32_v1i64, UADALPv2i32_v1i64, UADDLPv2i32_v...
O << ".1d, ";
break;
case 83:
// SMLALL_MZZI_BtoS, SMLALL_MZZI_HtoD, SMLALL_MZZ_BtoS, SMLALL_MZZ_HtoD, ...
printImmRangeScale<4, 3>(MI, 3, STI, O);
break;
case 84:
// SMOPA_MPPZZ_S, SMOPS_MPPZZ_S, SUMOPA_MPPZZ_S, SUMOPS_MPPZZ_S, UMOPA_MP...
printSVERegOp<'b'>(MI, 4, STI, O);
O << ", ";
printSVERegOp<'b'>(MI, 5, STI, O);
return;
break;
case 85:
// ST1i16, ST1i8, ST2i16, ST2i8, ST3i16, ST3i8, ST4i16, ST4i8
printVectorIndex(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << ']';
return;
break;
case 86:
// ST1i16_POST, ST1i32_POST, ST1i64_POST, ST1i8_POST, ST2i16_POST, ST2i32...
O << "], ";
break;
case 87:
// UZP_VG4_4Z4Z_Q, ZIP_VG4_4Z4Z_Q
printTypedVectorList<0,'q'>(MI, 1, STI, O);
return;
break;
case 88:
// ZERO_T
O << " }";
return;
break;
}
// Fragment 2 encoded into 7 bits for 88 unique commands.
switch ((Bits >> 28) & 127) {
default: llvm_unreachable("Invalid command number.");
case 0:
// ABSWr, ABSXr, ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI,...
printOperand(MI, 1, STI, O);
break;
case 1:
// ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_S, BRKA_PPmP, BRKB_PPmP, CLS_ZPmZ_B, ...
printSVERegOp<>(MI, 2, STI, O);
O << "/m, ";
break;
case 2:
// ABS_ZPmZ_H, CLS_ZPmZ_H, CLZ_ZPmZ_H, CNOT_ZPmZ_H, CNT_ZPmZ_H, FABS_ZPmZ...
printSVERegOp<'h'>(MI, 3, STI, O);
return;
break;
case 3:
// ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A...
printVRegOperand(MI, 1, STI, O);
break;
case 4:
// ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, DECP_ZP_D, EORBT_Z...
printSVERegOp<'d'>(MI, 2, STI, O);
break;
case 5:
// ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, DECP_ZP_S, EORBT_ZZ...
printSVERegOp<'s'>(MI, 2, STI, O);
break;
case 6:
// ADDHA_MPPZ_D, ADDHA_MPPZ_S, ADDVA_MPPZ_D, ADDVA_MPPZ_S, ANDV_VPZ_D, AN...
return;
break;
case 7:
// ADDHNB_ZZZ_B, DECP_XP_H, INCP_XP_H, RADDHNB_ZZZ_B, RSHRNB_ZZI_B, RSUBH...
printSVERegOp<'h'>(MI, 1, STI, O);
break;
case 8:
// ADDHNB_ZZZ_H, ADDHNT_ZZZ_H, ADD_VG2_2ZZ_B, ADD_VG2_2ZZ_D, ADD_VG2_2ZZ_...
O << ", ";
break;
case 9:
// ADDHNB_ZZZ_S, ADD_ZI_D, ADD_ZZZ_D, ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, A...
printSVERegOp<'d'>(MI, 1, STI, O);
break;
case 10:
// ADDHNT_ZZZ_B, BFDOT_ZZI, BFDOT_ZZZ, BFMLALB_ZZZ, BFMLALB_ZZZI, BFMLALT...
printSVERegOp<'h'>(MI, 2, STI, O);
break;
case 11:
// ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ...
printVRegOperand(MI, 2, STI, O);
break;
case 12:
// ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADDQV_VPZ_B, ADDQV_VPZ_D, ADDQV...
printSVERegOp<>(MI, 1, STI, O);
break;
case 13:
// ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRD_ZPmI_H, ASRR_ZPmZ_H, ASR_WID...
O << "/m, ";
break;
case 14:
// ADD_VG2_M2Z2Z_D, ADD_VG2_M2Z2Z_S, ADD_VG2_M2ZZ_D, ADD_VG2_M2ZZ_S, ADD_...
O << ", vgx2], ";
break;
case 15:
// ADD_VG4_M4Z4Z_D, ADD_VG4_M4Z4Z_S, ADD_VG4_M4ZZ_D, ADD_VG4_M4ZZ_S, ADD_...
O << ", vgx4], ";
break;
case 16:
// ADD_ZI_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_B, AESIMC_ZZ_B, AESMC_ZZ_B, ...
printSVERegOp<'b'>(MI, 1, STI, O);
break;
case 17:
// ADD_ZI_S, ADD_ZZZ_S, ADR_LSL_ZZZ_S_0, ADR_LSL_ZZZ_S_1, ADR_LSL_ZZZ_S_2...
printSVERegOp<'s'>(MI, 1, STI, O);
break;
case 18:
// ADRP
printAdrpLabel(MI, Address, 1, STI, O);
return;
break;
case 19:
// AUTDA, AUTDB, AUTIA, AUTIB, BFMWri, BFMXri, CASAB, CASAH, CASALB, CASA...
printOperand(MI, 2, STI, O);
break;
case 20:
// BFCVTNT_ZPmZ, BFCVT_ZPmZ, FCVTNT_ZPmZ_StoH, FCVT_ZPmZ_StoH, PMOV_ZIP_S...
printSVERegOp<'s'>(MI, 3, STI, O);
return;
break;
case 21:
// BFMLAL_MZZI_S, BFMLAL_MZZ_S, BFMLSL_MZZI_S, BFMLSL_MZZ_S, FMLAL_MZZI_S...
O << "], ";
break;
case 22:
// BICv2i32, BICv4i16, BICv4i32, BICv8i16, MOVKWi, MOVKXi, ORRv2i32, ORRv...
printImm(MI, 2, STI, O);
printShifter(MI, 3, STI, O);
return;
break;
case 23:
// CBNZW, CBNZX, CBZW, CBZX, LDRDl, LDRQl, LDRSWl, LDRSl, LDRWl, LDRXl, P...
printAlignedLabel(MI, Address, 1, STI, O);
return;
break;
case 24:
// CDOT_ZZZI_S, CDOT_ZZZ_S, CMLA_ZZZ_B, EORBT_ZZZ_B, EORTB_ZZZ_B, SABA_ZZ...
printSVERegOp<'b'>(MI, 2, STI, O);
O << ", ";
break;
case 25:
// CMPEQ_PPzZI_H, CMPEQ_PPzZZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_PPzZI_H, CMPGE...
O << "/z, ";
break;
case 26:
// CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI, PTRUES_B, PTRUES_D, PTRUES...
printSVEPattern(MI, 1, STI, O);
break;
case 27:
// CNTP_XCI_B
printPredicateAsCounter<8>(MI, 1, STI, O);
O << ", ";
printSVEVecLenSpecifier(MI, 2, STI, O);
return;
break;
case 28:
// CNTP_XCI_D
printPredicateAsCounter<64>(MI, 1, STI, O);
O << ", ";
printSVEVecLenSpecifier(MI, 2, STI, O);
return;
break;
case 29:
// CNTP_XCI_H
printPredicateAsCounter<16>(MI, 1, STI, O);
O << ", ";
printSVEVecLenSpecifier(MI, 2, STI, O);
return;
break;
case 30:
// CNTP_XCI_S
printPredicateAsCounter<32>(MI, 1, STI, O);
O << ", ";
printSVEVecLenSpecifier(MI, 2, STI, O);
return;
break;
case 31:
// CPY_ZPmI_H
printImm8OptLsl<int16_t>(MI, 3, STI, O);
return;
break;
case 32:
// CPY_ZPmR_H, CPY_ZPmV_H, INSvi16gpr, INSvi32gpr, INSvi64gpr, INSvi8gpr,...
printOperand(MI, 3, STI, O);
break;
case 33:
// DECB_XPiI, DECD_XPiI, DECD_ZPiI, DECH_XPiI, DECW_XPiI, DECW_ZPiI, INCB...
printSVEPattern(MI, 2, STI, O);
O << ", mul ";
printOperand(MI, 3, STI, O);
return;
break;
case 34:
// DUPM_ZI
printLogicalImm<int64_t>(MI, 1, STI, O);
return;
break;
case 35:
// DUPQ_ZZI_H, DUP_ZZI_H, DUP_ZZI_Q, PEXT_2PCI_B, PEXT_2PCI_D, PEXT_2PCI_...
printVectorIndex(MI, 2, STI, O);
return;
break;
case 36:
// DUP_ZI_B
printImm8OptLsl<int8_t>(MI, 1, STI, O);
return;
break;
case 37:
// DUP_ZI_D
printImm8OptLsl<int64_t>(MI, 1, STI, O);
return;
break;
case 38:
// DUP_ZI_S
printImm8OptLsl<int32_t>(MI, 1, STI, O);
return;
break;
case 39:
// EXTRACT_ZPMXI_H_H, EXTRACT_ZPMXI_H_Q
printMatrixTileVector<0>(MI, 3, STI, O);
O << '[';
printOperand(MI, 4, STI, O);
O << ", ";
printMatrixIndex(MI, 5, STI, O);
O << ']';
return;
break;
case 40:
// EXTRACT_ZPMXI_V_H, EXTRACT_ZPMXI_V_Q
printMatrixTileVector<1>(MI, 3, STI, O);
O << '[';
printOperand(MI, 4, STI, O);
O << ", ";
printMatrixIndex(MI, 5, STI, O);
O << ']';
return;
break;
case 41:
// EXT_ZZI_B, TBLQ_ZZZ_B, TBL_ZZZZ_B, TBL_ZZZ_B
printTypedVectorList<0,'b'>(MI, 1, STI, O);
O << ", ";
break;
case 42:
// FCPY_ZPmI_H
printFPImmOperand(MI, 3, STI, O);
return;
break;
case 43:
// FCVT_ZPmZ_DtoH, PMOV_ZIP_D, SCVTF_ZPmZ_DtoH, UCVTF_ZPmZ_DtoH
printSVERegOp<'d'>(MI, 3, STI, O);
return;
break;
case 44:
// FDUP_ZI_D, FDUP_ZI_S, FMOVDi, FMOVHi, FMOVSi, FMOVv2f32_ns, FMOVv2f64_...
printFPImmOperand(MI, 1, STI, O);
return;
break;
case 45:
// GLD1B_D_IMM_REAL, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, ...
O << "/z, [";
break;
case 46:
// INDEX_II_B, INDEX_IR_B
printSImm<8>(MI, 1, STI, O);
O << ", ";
break;
case 47:
// INDEX_II_H
printSImm<16>(MI, 2, STI, O);
return;
break;
case 48:
// INSR_ZV_B
printZPRasFPR<8>(MI, 2, STI, O);
return;
break;
case 49:
// INSR_ZV_D
printZPRasFPR<64>(MI, 2, STI, O);
return;
break;
case 50:
// INSR_ZV_S
printZPRasFPR<32>(MI, 2, STI, O);
return;
break;
case 51:
// INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane
printVRegOperand(MI, 3, STI, O);
break;
case 52:
// LD1B_VG2_M2ZPXI, LD1B_VG2_M2ZPXX, LD1H_VG2_M2ZPXI, LD1H_VG2_M2ZPXX, LD...
printPredicateAsCounter<0>(MI, 1, STI, O);
break;
case 53:
// LDADDAB, LDADDAH, LDADDALB, LDADDALH, LDADDALW, LDADDALX, LDADDAW, LDA...
printOperand(MI, 0, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << ']';
return;
break;
case 54:
// MOVAZ_2ZMI_H_B, MOVAZ_2ZMI_H_D, MOVAZ_2ZMI_H_H, MOVAZ_2ZMI_H_S, MOVAZ_...
printImmRangeScale<2, 1>(MI, 4, STI, O);
O << ']';
return;
break;
case 55:
// MOVAZ_4ZMI_H_B, MOVAZ_4ZMI_H_D, MOVAZ_4ZMI_H_H, MOVAZ_4ZMI_H_S, MOVAZ_...
printImmRangeScale<4, 3>(MI, 4, STI, O);
O << ']';
return;
break;
case 56:
// MOVAZ_VG2_2ZM, MOVA_VG2_2ZMXI, ZERO_MXI_VG2_2Z, ZERO_MXI_VG2_4Z, ZERO_...
O << ", vgx2]";
return;
break;
case 57:
// MOVAZ_VG4_4ZM, MOVA_VG4_4ZMXI, ZERO_MXI_VG4_2Z, ZERO_MXI_VG4_4Z, ZERO_...
O << ", vgx4]";
return;
break;
case 58:
// MOVAZ_ZMI_H_B, MOVAZ_ZMI_H_D, MOVAZ_ZMI_H_S
printMatrixTileVector<0>(MI, 1, STI, O);
O << '[';
printOperand(MI, 3, STI, O);
O << ", ";
printMatrixIndex(MI, 4, STI, O);
O << ']';
return;
break;
case 59:
// MOVAZ_ZMI_V_B, MOVAZ_ZMI_V_D, MOVAZ_ZMI_V_S
printMatrixTileVector<1>(MI, 1, STI, O);
O << '[';
printOperand(MI, 3, STI, O);
O << ", ";
printMatrixIndex(MI, 4, STI, O);
O << ']';
return;
break;
case 60:
// MOVID, MOVIv2d_ns
printSIMDType10Operand(MI, 1, STI, O);
return;
break;
case 61:
// MOVIv16b_ns, MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl...
printImm(MI, 1, STI, O);
break;
case 62:
// MRS
printMRSSystemRegister(MI, 1, STI, O);
return;
break;
case 63:
// PMOV_ZIP_B
printSVERegOp<'b'>(MI, 3, STI, O);
return;
break;
case 64:
// PMULLv1i64
O << ".1d, ";
printVRegOperand(MI, 2, STI, O);
O << ".1d";
return;
break;
case 65:
// PMULLv2i64
O << ".2d, ";
printVRegOperand(MI, 2, STI, O);
O << ".2d";
return;
break;
case 66:
// REVD_ZPmZ
printSVERegOp<'q'>(MI, 3, STI, O);
return;
break;
case 67:
// SMLALL_VG2_M2ZZ_BtoS, SMLALL_VG2_M2ZZ_HtoD, SMLSLL_VG2_M2ZZ_BtoS, SMLS...
O << ", vgx2], ";
break;
case 68:
// SMLALL_VG4_M4ZZ_BtoS, SMLALL_VG4_M4ZZ_HtoD, SMLSLL_VG4_M4ZZ_BtoS, SMLS...
O << ", vgx4], ";
break;
case 69:
// SQCVTN_Z4Z_StoB, SQCVTUN_Z4Z_StoB, SQCVTU_Z4Z_StoB, SQCVT_Z4Z_StoB, SQ...
printTypedVectorList<0,'s'>(MI, 1, STI, O);
break;
case 70:
// SQDECB_XPiWdI, SQDECD_XPiWdI, SQDECH_XPiWdI, SQDECW_XPiWdI, SQINCB_XPi...
printGPR64as32(MI, 1, STI, O);
O << ", ";
printSVEPattern(MI, 2, STI, O);
O << ", mul ";
printOperand(MI, 3, STI, O);
return;
break;
case 71:
// SST1B_D, SST1B_D_IMM, SST1B_D_SXTW, SST1B_D_UXTW, SST1B_S_IMM, SST1B_S...
O << ", [";
break;
case 72:
// ST1i16_POST, ST2i8_POST
printPostIncOperand<2>(MI, 4, STI, O);
return;
break;
case 73:
// ST1i32_POST, ST2i16_POST, ST4i8_POST
printPostIncOperand<4>(MI, 4, STI, O);
return;
break;
case 74:
// ST1i64_POST, ST2i32_POST, ST4i16_POST
printPostIncOperand<8>(MI, 4, STI, O);
return;
break;
case 75:
// ST1i8_POST
printPostIncOperand<1>(MI, 4, STI, O);
return;
break;
case 76:
// ST2i64_POST, ST4i32_POST
printPostIncOperand<16>(MI, 4, STI, O);
return;
break;
case 77:
// ST3i16_POST
printPostIncOperand<6>(MI, 4, STI, O);
return;
break;
case 78:
// ST3i32_POST
printPostIncOperand<12>(MI, 4, STI, O);
return;
break;
case 79:
// ST3i64_POST
printPostIncOperand<24>(MI, 4, STI, O);
return;
break;
case 80:
// ST3i8_POST
printPostIncOperand<3>(MI, 4, STI, O);
return;
break;
case 81:
// ST4i64_POST
printPostIncOperand<32>(MI, 4, STI, O);
return;
break;
case 82:
// ST64BV, ST64BV0
printGPR64x8(MI, 1, STI, O);
O << ", [";
printOperand(MI, 2, STI, O);
O << ']';
return;
break;
case 83:
// SYSPxt, SYSPxt_XZR, SYSxt
printSysCROperand(MI, 1, STI, O);
O << ", ";
printSysCROperand(MI, 2, STI, O);
O << ", ";
printOperand(MI, 3, STI, O);
O << ", ";
break;
case 84:
// TBLQ_ZZZ_D, TBL_ZZZZ_D, TBL_ZZZ_D
printTypedVectorList<0,'d'>(MI, 1, STI, O);
O << ", ";
printSVERegOp<'d'>(MI, 2, STI, O);
return;
break;
case 85:
// TBLv16i8Four, TBLv16i8One, TBLv16i8Three, TBLv16i8Two, TBLv8i8Four, TB...
printTypedVectorList<16, 'b'>(MI, 1, STI, O);
O << ", ";
printVRegOperand(MI, 2, STI, O);
break;
case 86:
// TBXv16i8Four, TBXv16i8One, TBXv16i8Three, TBXv16i8Two, TBXv8i8Four, TB...
printTypedVectorList<16, 'b'>(MI, 2, STI, O);
O << ", ";
printVRegOperand(MI, 3, STI, O);
break;
case 87:
// ZERO_MXI_2Z, ZERO_MXI_4Z
O << ']';
return;
break;
}
// Fragment 3 encoded into 7 bits for 128 unique commands.
switch ((Bits >> 35) & 127) {
default: llvm_unreachable("Invalid command number.");
case 0:
// ABSWr, ABSXr, ABSv1i64, ADR, AESIMC_ZZ_B, AESMC_ZZ_B, AUTDA, AUTDB, AU...
return;
break;
case 1:
// ABS_ZPmZ_B, BRKA_PPmP, BRKB_PPmP, CDOT_ZZZI_S, CDOT_ZZZ_S, CLS_ZPmZ_B,...
printSVERegOp<'b'>(MI, 3, STI, O);
break;
case 2:
// ABS_ZPmZ_D, CLS_ZPmZ_D, CLZ_ZPmZ_D, CNOT_ZPmZ_D, CNT_ZPmZ_D, FABS_ZPmZ...
printSVERegOp<'d'>(MI, 3, STI, O);
return;
break;
case 3:
// ABS_ZPmZ_S, ADDHNT_ZZZ_H, CLS_ZPmZ_S, CLZ_ZPmZ_S, CNOT_ZPmZ_S, CNT_ZPm...
printSVERegOp<'s'>(MI, 3, STI, O);
return;
break;
case 4:
// ABSv16i8, ADDVv16i8v, AESDrr, AESErr, AESIMCrr, AESMCrr, CLSv16i8, CLZ...
O << ".16b";
return;
break;
case 5:
// ABSv2i32, CLSv2i32, CLZv2i32, FABSv2f32, FADDPv2i32p, FCVTASv2f32, FCV...
O << ".2s";
return;
break;
case 6:
// ABSv2i64, ADDPv2i64p, FABSv2f64, FADDPv2i64p, FCVTASv2f64, FCVTAUv2f64...
O << ".2d";
return;
break;
case 7:
// ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FABSv4f16, FCVTASv4f16, FCVT...
O << ".4h";
return;
break;
case 8:
// ABSv4i32, ADDVv4i32v, BFCVTN, BFCVTN2, CLSv4i32, CLZv4i32, FABSv4f32, ...
O << ".4s";
return;
break;
case 9:
// ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FABSv8f16, FCVTASv8f16, FCVT...
O << ".8h";
return;
break;
case 10:
// ABSv8i8, ADDVv8i8v, CLSv8i8, CLZv8i8, CNTv8i8, NEGv8i8, NOTv8i8, RBITv...
O << ".8b";
return;
break;
case 11:
// ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD...
O << ", ";
break;
case 12:
// ADDHNB_ZZZ_H, ADD_VG2_2ZZ_S, ADD_VG4_4ZZ_S, FMAXNM_VG2_2ZZ_S, FMAXNM_V...
printSVERegOp<'s'>(MI, 2, STI, O);
break;
case 13:
// ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM...
O << ".2d, ";
break;
case 14:
// ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM...
O << ".4s, ";
break;
case 15:
// ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, BF16DOTlanev8b...
O << ".8h, ";
break;
case 16:
// ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPm...
O << "/m, ";
break;
case 17:
// ADDP_ZPmZ_H, ADD_VG2_2ZZ_H, ADD_VG4_4ZZ_H, ADD_ZPmZ_H, ADD_ZZZ_H, AND_...
printSVERegOp<'h'>(MI, 2, STI, O);
break;
case 18:
// ADDPv16i8, ADDv16i8, ANDv16i8, BCAX, BICv16i8, BIFv16i8, BITv16i8, BSL...
O << ".16b, ";
break;
case 19:
// ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv...
O << ".2s, ";
break;
case 20:
// ADDPv4i16, ADDv4i16, BF16DOTlanev4bf16, BFDOTv4bf16, CMEQv4i16, CMGEv4...
O << ".4h, ";
break;
case 21:
// ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8...
O << ".8b, ";
break;
case 22:
// ADD_VG2_2ZZ_B, ADD_VG4_4ZZ_B, PMULLB_ZZZ_H, PMULLT_ZZZ_H, SABDLB_ZZZ_H...
printSVERegOp<'b'>(MI, 2, STI, O);
return;
break;
case 23:
// ADD_VG2_2ZZ_D, ADD_VG4_4ZZ_D, ASR_WIDE_ZZZ_H, FMAXNM_VG2_2ZZ_D, FMAXNM...
printSVERegOp<'d'>(MI, 2, STI, O);
break;
case 24:
// ADD_VG2_M2Z2Z_D, ADD_VG2_M2ZZ_D, ADD_VG2_M2Z_D, ADD_VG4_M4Z4Z_D, ADD_V...
printTypedVectorList<0,'d'>(MI, 4, STI, O);
break;
case 25:
// ADD_VG2_M2Z2Z_S, ADD_VG2_M2ZZ_S, ADD_VG2_M2Z_S, ADD_VG4_M4Z4Z_S, ADD_V...
printTypedVectorList<0,'s'>(MI, 4, STI, O);
break;
case 26:
// ADD_ZI_H, SQADD_ZI_H, SQSUB_ZI_H, SUBR_ZI_H, SUB_ZI_H, UQADD_ZI_H, UQS...
printImm8OptLsl<uint16_t>(MI, 2, STI, O);
return;
break;
case 27:
// ANDS_PPzPP, AND_PPzPP, BICS_PPzPP, BIC_PPzPP, BRKAS_PPzP, BRKA_PPzP, B...
O << "/z, ";
break;
case 28:
// ASR_ZZI_H, GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, GLD1B_S...
printOperand(MI, 2, STI, O);
break;
case 29:
// BFCLAMP_VG2_2ZZZ_H, BFCLAMP_VG4_4ZZZ_H, BFCLAMP_ZZZ, BFMLA_ZPmZZ, BFML...
printSVERegOp<'h'>(MI, 3, STI, O);
break;
case 30:
// BFDOT_VG2_M2Z2Z_HtoS, BFDOT_VG2_M2ZZI_HtoS, BFDOT_VG2_M2ZZ_HtoS, BFDOT...
printTypedVectorList<0,'h'>(MI, 4, STI, O);
O << ", ";
break;
case 31:
// BFMAXNM_VG2_2Z2Z_H, BFMAXNM_VG4_4Z2Z_H, BFMAX_VG2_2Z2Z_H, BFMAX_VG4_4Z...
printTypedVectorList<0,'h'>(MI, 2, STI, O);
break;
case 32:
// BFMLAL_MZZI_S, BFMLAL_MZZ_S, BFMLSL_MZZI_S, BFMLSL_MZZ_S, FMLAL_MZZI_S...
printSVERegOp<'h'>(MI, 4, STI, O);
O << ", ";
printSVERegOp<'h'>(MI, 5, STI, O);
break;
case 33:
// BFMLA_VG2_M2Z2Z, BFMLA_VG4_M4Z4Z, BFMLS_VG2_M2Z2Z, BFMLS_VG4_M4Z4Z, FM...
printTypedVectorList<0,'h'>(MI, 5, STI, O);
return;
break;
case 34:
// BFMLA_VG2_M2ZZ, BFMLA_VG2_M2ZZI, BFMLA_VG4_M4ZZ, BFMLA_VG4_M4ZZI, BFML...
printSVERegOp<'h'>(MI, 5, STI, O);
break;
case 35:
// BMOPA_MPPZZ_S, BMOPS_MPPZZ_S, FMOPA_MPPZZ_S, FMOPS_MPPZZ_S
printSVERegOp<'s'>(MI, 5, STI, O);
return;
break;
case 36:
// CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH...
O << ", [";
break;
case 37:
// CMEQv16i8rz, CMGEv16i8rz, CMGTv16i8rz, CMLEv16i8rz, CMLTv16i8rz
O << ".16b, #0";
return;
break;
case 38:
// CMEQv1i64rz, CMGEv1i64rz, CMGTv1i64rz, CMLEv1i64rz, CMLTv1i64rz
O << ", #0";
return;
break;
case 39:
// CMEQv2i32rz, CMGEv2i32rz, CMGTv2i32rz, CMLEv2i32rz, CMLTv2i32rz
O << ".2s, #0";
return;
break;
case 40:
// CMEQv2i64rz, CMGEv2i64rz, CMGTv2i64rz, CMLEv2i64rz, CMLTv2i64rz
O << ".2d, #0";
return;
break;
case 41:
// CMEQv4i16rz, CMGEv4i16rz, CMGTv4i16rz, CMLEv4i16rz, CMLTv4i16rz
O << ".4h, #0";
return;
break;
case 42:
// CMEQv4i32rz, CMGEv4i32rz, CMGTv4i32rz, CMLEv4i32rz, CMLTv4i32rz
O << ".4s, #0";
return;
break;
case 43:
// CMEQv8i16rz, CMGEv8i16rz, CMGTv8i16rz, CMLEv8i16rz, CMLTv8i16rz
O << ".8h, #0";
return;
break;
case 44:
// CMEQv8i8rz, CMGEv8i8rz, CMGTv8i8rz, CMLEv8i8rz, CMLTv8i8rz
O << ".8b, #0";
return;
break;
case 45:
// CNTB_XPiI, CNTD_XPiI, CNTH_XPiI, CNTW_XPiI
O << ", mul ";
printOperand(MI, 2, STI, O);
return;
break;
case 46:
// CPY_ZPmI_B
printImm8OptLsl<int8_t>(MI, 3, STI, O);
return;
break;
case 47:
// CPY_ZPmI_D
printImm8OptLsl<int64_t>(MI, 3, STI, O);
return;
break;
case 48:
// CPY_ZPmI_S
printImm8OptLsl<int32_t>(MI, 3, STI, O);
return;
break;
case 49:
// CPY_ZPmR_B, CPY_ZPmR_D, CPY_ZPmR_S, CPY_ZPmV_B, CPY_ZPmV_D, CPY_ZPmV_S...
printOperand(MI, 3, STI, O);
break;
case 50:
// CPY_ZPzI_H
printImm8OptLsl<int16_t>(MI, 2, STI, O);
return;
break;
case 51:
// DUPQ_ZZI_B, DUPQ_ZZI_D, DUPQ_ZZI_S, DUP_ZZI_B, DUP_ZZI_D, DUP_ZZI_S, P...
printVectorIndex(MI, 2, STI, O);
return;
break;
case 52:
// DUPi16, DUPv4i16lane, DUPv8i16lane, INSvi16lane, SMOVvi16to32, SMOVvi1...
O << ".h";
break;
case 53:
// DUPi32, DUPv2i32lane, DUPv4i32lane, INSvi32lane, SMOVvi32to64, SMOVvi3...
O << ".s";
break;
case 54:
// DUPi64, DUPv2i64lane, FMOVDXHighr, INSvi64lane, UMOVvi64, UMOVvi64_idx...
O << ".d";
break;
case 55:
// DUPi8, DUPv16i8lane, DUPv8i8lane, INSvi8lane, SMOVvi8to32, SMOVvi8to32...
O << ".b";
break;
case 56:
// EXTRACT_ZPMXI_H_B, EXTRACT_ZPMXI_H_D, EXTRACT_ZPMXI_H_S
printMatrixTileVector<0>(MI, 3, STI, O);
O << '[';
printOperand(MI, 4, STI, O);
O << ", ";
printMatrixIndex(MI, 5, STI, O);
O << ']';
return;
break;
case 57:
// EXTRACT_ZPMXI_V_B, EXTRACT_ZPMXI_V_D, EXTRACT_ZPMXI_V_S
printMatrixTileVector<1>(MI, 3, STI, O);
O << '[';
printOperand(MI, 4, STI, O);
O << ", ";
printMatrixIndex(MI, 5, STI, O);
O << ']';
return;
break;
case 58:
// EXT_ZZI_B, UMAX_ZI_H, UMIN_ZI_H
printImm(MI, 2, STI, O);
return;
break;
case 59:
// FADDPv2i16p, FMAXNMPv2i16p, FMAXPv2i16p, FMINNMPv2i16p, FMINPv2i16p
O << ".2h";
return;
break;
case 60:
// FCMEQv1i16rz, FCMEQv1i32rz, FCMEQv1i64rz, FCMGEv1i16rz, FCMGEv1i32rz, ...
O << ", #0.0";
return;
break;
case 61:
// FCMEQv2i32rz, FCMGEv2i32rz, FCMGTv2i32rz, FCMLEv2i32rz, FCMLTv2i32rz
O << ".2s, #0.0";
return;
break;
case 62:
// FCMEQv2i64rz, FCMGEv2i64rz, FCMGTv2i64rz, FCMLEv2i64rz, FCMLTv2i64rz
O << ".2d, #0.0";
return;
break;
case 63:
// FCMEQv4i16rz, FCMGEv4i16rz, FCMGTv4i16rz, FCMLEv4i16rz, FCMLTv4i16rz
O << ".4h, #0.0";
return;
break;
case 64:
// FCMEQv4i32rz, FCMGEv4i32rz, FCMGTv4i32rz, FCMLEv4i32rz, FCMLTv4i32rz
O << ".4s, #0.0";
return;
break;
case 65:
// FCMEQv8i16rz, FCMGEv8i16rz, FCMGTv8i16rz, FCMLEv8i16rz, FCMLTv8i16rz
O << ".8h, #0.0";
return;
break;
case 66:
// FCPY_ZPmI_D, FCPY_ZPmI_S
printFPImmOperand(MI, 3, STI, O);
return;
break;
case 67:
// FMAXNM_VG2_2Z2Z_D, FMAXNM_VG4_4Z4Z_D, FMAX_VG2_2Z2Z_D, FMAX_VG4_4Z4Z_D...
printTypedVectorList<0,'d'>(MI, 2, STI, O);
break;
case 68:
// FMAXNM_VG2_2Z2Z_S, FMAXNM_VG4_4Z4Z_S, FMAX_VG2_2Z2Z_S, FMAX_VG4_4Z4Z_S...
printTypedVectorList<0,'s'>(MI, 2, STI, O);
break;
case 69:
// FMLAL2lanev4f16, FMLAL2v4f16, FMLALlanev4f16, FMLALv4f16, FMLSL2lanev4...
O << ".2h, ";
printVRegOperand(MI, 3, STI, O);
break;
case 70:
// FMOPA_MPPZZ_D, FMOPS_MPPZZ_D
printSVERegOp<'d'>(MI, 5, STI, O);
return;
break;
case 71:
// INDEX_II_B
printSImm<8>(MI, 2, STI, O);
return;
break;
case 72:
// INDEX_RI_H
printSImm<16>(MI, 2, STI, O);
return;
break;
case 73:
// INSERT_MXIPZ_H_B, INSERT_MXIPZ_H_D, INSERT_MXIPZ_H_H, INSERT_MXIPZ_H_Q...
printMatrixIndex(MI, 3, STI, O);
O << "], ";
printSVERegOp<>(MI, 4, STI, O);
O << "/m, ";
break;
case 74:
// LD1B_VG2_M2ZPXI, LD1B_VG2_M2ZPXX, LD1H_VG2_M2ZPXI, LD1H_VG2_M2ZPXX, LD...
O << "/z, [";
printOperand(MI, 2, STI, O);
O << ", ";
break;
case 75:
// LD1_MXIPXX_H_B, LD1_MXIPXX_H_D, LD1_MXIPXX_H_H, LD1_MXIPXX_H_Q, LD1_MX...
printMatrixIndex(MI, 2, STI, O);
O << "]}, ";
printSVERegOp<>(MI, 3, STI, O);
break;
case 76:
// LDAPRB, LDAPRH, LDAPRW, LDAPRX, LDARB, LDARH, LDARW, LDARX, LDAXRB, LD...
O << ']';
return;
break;
case 77:
// LDAPRWpre
O << "], #4";
return;
break;
case 78:
// LDAPRXpre
O << "], #8";
return;
break;
case 79:
// LDRBBpost, LDRBpost, LDRDpost, LDRHHpost, LDRHpost, LDRQpost, LDRSBWpo...
O << "], ";
break;
case 80:
// LUTI2_2ZTZI_B, LUTI2_2ZTZI_H, LUTI2_2ZTZI_S, LUTI2_4ZTZI_B, LUTI2_4ZTZ...
printSVERegOp<>(MI, 2, STI, O);
printVectorIndex(MI, 3, STI, O);
return;
break;
case 81:
// MOVA_MXI2Z_H_B, MOVA_MXI2Z_H_D, MOVA_MXI2Z_H_H, MOVA_MXI2Z_H_S, MOVA_M...
printImmRangeScale<2, 1>(MI, 3, STI, O);
O << "], ";
break;
case 82:
// MOVA_MXI4Z_H_B, MOVA_MXI4Z_H_D, MOVA_MXI4Z_H_H, MOVA_MXI4Z_H_S, MOVA_M...
printImmRangeScale<4, 3>(MI, 3, STI, O);
O << "], ";
break;
case 83:
// MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl, MOVIv8i16, ...
printShifter(MI, 2, STI, O);
return;
break;
case 84:
// MOVT_XTI
printVectorIndex<8>(MI, 2, STI, O);
return;
break;
case 85:
// PRFB_D_SCALED
printRegWithShiftExtend<false, 8, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 86:
// PRFB_D_SXTW_SCALED
printRegWithShiftExtend<true, 8, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 87:
// PRFB_D_UXTW_SCALED
printRegWithShiftExtend<false, 8, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 88:
// PRFB_PRR
printRegWithShiftExtend<false, 8, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 89:
// PRFB_S_SXTW_SCALED
printRegWithShiftExtend<true, 8, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 90:
// PRFB_S_UXTW_SCALED
printRegWithShiftExtend<false, 8, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 91:
// PRFD_D_PZI, PRFD_S_PZI
printImmScale<8>(MI, 3, STI, O);
O << ']';
return;
break;
case 92:
// PRFD_D_SCALED
printRegWithShiftExtend<false, 64, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 93:
// PRFD_D_SXTW_SCALED
printRegWithShiftExtend<true, 64, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 94:
// PRFD_D_UXTW_SCALED
printRegWithShiftExtend<false, 64, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 95:
// PRFD_PRR
printRegWithShiftExtend<false, 64, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 96:
// PRFD_S_SXTW_SCALED
printRegWithShiftExtend<true, 64, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 97:
// PRFD_S_UXTW_SCALED
printRegWithShiftExtend<false, 64, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 98:
// PRFH_D_PZI, PRFH_S_PZI
printImmScale<2>(MI, 3, STI, O);
O << ']';
return;
break;
case 99:
// PRFH_D_SCALED
printRegWithShiftExtend<false, 16, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 100:
// PRFH_D_SXTW_SCALED
printRegWithShiftExtend<true, 16, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 101:
// PRFH_D_UXTW_SCALED
printRegWithShiftExtend<false, 16, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 102:
// PRFH_PRR
printRegWithShiftExtend<false, 16, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 103:
// PRFH_S_SXTW_SCALED
printRegWithShiftExtend<true, 16, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 104:
// PRFH_S_UXTW_SCALED
printRegWithShiftExtend<false, 16, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 105:
// PRFW_D_PZI, PRFW_S_PZI
printImmScale<4>(MI, 3, STI, O);
O << ']';
return;
break;
case 106:
// PRFW_D_SCALED
printRegWithShiftExtend<false, 32, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 107:
// PRFW_D_SXTW_SCALED
printRegWithShiftExtend<true, 32, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 108:
// PRFW_D_UXTW_SCALED
printRegWithShiftExtend<false, 32, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 109:
// PRFW_PRR
printRegWithShiftExtend<false, 32, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 110:
// PRFW_S_SXTW_SCALED
printRegWithShiftExtend<true, 32, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 111:
// PRFW_S_UXTW_SCALED
printRegWithShiftExtend<false, 32, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 112:
// RDFFRS_PPz, RDFFR_PPz_REAL
O << "/z";
return;
break;
case 113:
// SDOT_VG2_M2Z2Z_BtoS, SDOT_VG2_M2ZZI_BToS, SDOT_VG2_M2ZZ_BtoS, SDOT_VG4...
printTypedVectorList<0,'b'>(MI, 4, STI, O);
O << ", ";
break;
case 114:
// SEL_VG2_2ZP2Z2Z_B, SEL_VG4_4ZP4Z4Z_B, SMAX_VG2_2Z2Z_B, SMAX_VG4_4Z4Z_B...
printTypedVectorList<0,'b'>(MI, 2, STI, O);
break;
case 115:
// SHLLv16i8
O << ".16b, #8";
return;
break;
case 116:
// SHLLv2i32
O << ".2s, #32";
return;
break;
case 117:
// SHLLv4i16
O << ".4h, #16";
return;
break;
case 118:
// SHLLv4i32
O << ".4s, #32";
return;
break;
case 119:
// SHLLv8i16
O << ".8h, #16";
return;
break;
case 120:
// SHLLv8i8
O << ".8b, #8";
return;
break;
case 121:
// SMLALL_MZZI_BtoS, SMLALL_MZZ_BtoS, SMLSLL_MZZI_BtoS, SMLSLL_MZZ_BtoS, ...
printSVERegOp<'b'>(MI, 4, STI, O);
O << ", ";
printSVERegOp<'b'>(MI, 5, STI, O);
break;
case 122:
// STLRWpre
O << ", #-4]!";
return;
break;
case 123:
// STLRXpre
O << ", #-8]!";
return;
break;
case 124:
// SYSPxt
printGPRSeqPairsClassOperand<64>(MI, 4, STI, O);
return;
break;
case 125:
// SYSPxt_XZR
printSyspXzrPair(MI, 4, STI, O);
return;
break;
case 126:
// SYSxt
printOperand(MI, 4, STI, O);
return;
break;
case 127:
// TRN1_ZZZ_Q, TRN2_ZZZ_Q, UZP1_ZZZ_Q, UZP2_ZZZ_Q, UZP_VG2_2ZZZ_Q, ZIP1_Z...
printSVERegOp<'q'>(MI, 2, STI, O);
return;
break;
}
// Fragment 4 encoded into 7 bits for 88 unique commands.
switch ((Bits >> 42) & 127) {
default: llvm_unreachable("Invalid command number.");
case 0:
// ABS_ZPmZ_B, ADDHNB_ZZZ_H, ADD_VG2_2ZZ_D, ADD_VG2_2ZZ_H, ADD_VG2_2ZZ_S,...
return;
break;
case 1:
// ADCLB_ZZZ_D, ADCLT_ZZZ_D, ADDHNT_ZZZ_S, CMLA_ZZZ_D, EORBT_ZZZ_D, EORTB...
printSVERegOp<'d'>(MI, 3, STI, O);
break;
case 2:
// ADCLB_ZZZ_S, ADCLT_ZZZ_S, CMLA_ZZZI_S, CMLA_ZZZ_S, EORBT_ZZZ_S, EORTB_...
printSVERegOp<'s'>(MI, 3, STI, O);
break;
case 3:
// ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPL_XXI, ADDSPL_XXI, ADDSVL_XXI, ADDSX...
printOperand(MI, 2, STI, O);
break;
case 4:
// ADDG, ST2GOffset, STGOffset, STZ2GOffset, STZGOffset, SUBG
printImmScale<16>(MI, 2, STI, O);
break;
case 5:
// ADDHNB_ZZZ_B, ADDQV_VPZ_H, ANDQV_VPZ_H, CNTP_XPP_H, EORQV_VPZ_H, FADDQ...
printSVERegOp<'h'>(MI, 2, STI, O);
break;
case 6:
// ADDHNB_ZZZ_S, ADDP_ZPmZ_D, ADDQV_VPZ_D, ADD_ZPmZ_D, ADD_ZZZ_D, ANDQV_V...
printSVERegOp<'d'>(MI, 2, STI, O);
break;
case 7:
// ADDHNT_ZZZ_B, BFDOT_ZZI, BFDOT_ZZZ, BFMLALB_ZZZ, BFMLALB_ZZZI, BFMLALT...
printSVERegOp<'h'>(MI, 3, STI, O);
break;
case 8:
// ADDHNv2i64_v2i32, ADDHNv4i32_v4i16, ADDHNv8i16_v8i8, ADDPv16i8, ADDPv2...
printVRegOperand(MI, 2, STI, O);
break;
case 9:
// ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, BF16DOTlanev4bf1...
printVRegOperand(MI, 3, STI, O);
break;
case 10:
// ADDP_ZPmZ_B, ADDQV_VPZ_B, ADD_ZPmZ_B, ADD_ZZZ_B, AESD_ZZZ_B, AESE_ZZZ_...
printSVERegOp<'b'>(MI, 2, STI, O);
break;
case 11:
// ADDP_ZPmZ_H, ADD_VG2_M2Z2Z_D, ADD_VG2_M2Z2Z_S, ADD_VG2_M2ZZ_D, ADD_VG2...
O << ", ";
break;
case 12:
// ADDP_ZPmZ_S, ADDQV_VPZ_S, ADD_ZPmZ_S, ADD_ZZZ_S, ANDQV_VPZ_S, AND_ZPmZ...
printSVERegOp<'s'>(MI, 2, STI, O);
break;
case 13:
// ADDSWri, ADDSXri, ADDWri, ADDXri, SUBSWri, SUBSXri, SUBWri, SUBXri
printAddSubImm(MI, 2, STI, O);
return;
break;
case 14:
// ADDSWrs, ADDSXrs, ADDWrs, ADDXrs, ANDSWrs, ANDSXrs, ANDWrs, ANDXrs, BI...
printShiftedRegister(MI, 2, STI, O);
return;
break;
case 15:
// ADDSWrx, ADDSXrx, ADDWrx, ADDXrx, SUBSWrx, SUBSXrx, SUBWrx, SUBXrx
printExtendedRegister(MI, 2, STI, O);
return;
break;
case 16:
// ADD_ZI_B, SQADD_ZI_B, SQSUB_ZI_B, SUBR_ZI_B, SUB_ZI_B, UQADD_ZI_B, UQS...
printImm8OptLsl<uint8_t>(MI, 2, STI, O);
return;
break;
case 17:
// ADD_ZI_D, SQADD_ZI_D, SQSUB_ZI_D, SUBR_ZI_D, SUB_ZI_D, UQADD_ZI_D, UQS...
printImm8OptLsl<uint64_t>(MI, 2, STI, O);
return;
break;
case 18:
// ADD_ZI_S, SQADD_ZI_S, SQSUB_ZI_S, SUBR_ZI_S, SUB_ZI_S, UQADD_ZI_S, UQS...
printImm8OptLsl<uint32_t>(MI, 2, STI, O);
return;
break;
case 19:
// ADR_LSL_ZZZ_D_0
printRegWithShiftExtend<false, 8, 'x', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 20:
// ADR_LSL_ZZZ_D_1
printRegWithShiftExtend<false, 16, 'x', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 21:
// ADR_LSL_ZZZ_D_2
printRegWithShiftExtend<false, 32, 'x', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 22:
// ADR_LSL_ZZZ_D_3
printRegWithShiftExtend<false, 64, 'x', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 23:
// ADR_LSL_ZZZ_S_0
printRegWithShiftExtend<false, 8, 'x', 's'>(MI, 2, STI, O);
O << ']';
return;
break;
case 24:
// ADR_LSL_ZZZ_S_1
printRegWithShiftExtend<false, 16, 'x', 's'>(MI, 2, STI, O);
O << ']';
return;
break;
case 25:
// ADR_LSL_ZZZ_S_2
printRegWithShiftExtend<false, 32, 'x', 's'>(MI, 2, STI, O);
O << ']';
return;
break;
case 26:
// ADR_LSL_ZZZ_S_3
printRegWithShiftExtend<false, 64, 'x', 's'>(MI, 2, STI, O);
O << ']';
return;
break;
case 27:
// ADR_SXTW_ZZZ_D_0
printRegWithShiftExtend<true, 8, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 28:
// ADR_SXTW_ZZZ_D_1
printRegWithShiftExtend<true, 16, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 29:
// ADR_SXTW_ZZZ_D_2
printRegWithShiftExtend<true, 32, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 30:
// ADR_SXTW_ZZZ_D_3
printRegWithShiftExtend<true, 64, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 31:
// ADR_UXTW_ZZZ_D_0
printRegWithShiftExtend<false, 8, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 32:
// ADR_UXTW_ZZZ_D_1
printRegWithShiftExtend<false, 16, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 33:
// ADR_UXTW_ZZZ_D_2
printRegWithShiftExtend<false, 32, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 34:
// ADR_UXTW_ZZZ_D_3
printRegWithShiftExtend<false, 64, 'w', 'd'>(MI, 2, STI, O);
O << ']';
return;
break;
case 35:
// ANDSWri, ANDWri, EORWri, ORRWri
printLogicalImm<int32_t>(MI, 2, STI, O);
return;
break;
case 36:
// ANDSXri, ANDXri, AND_ZI, EORXri, EOR_ZI, ORRXri, ORR_ZI
printLogicalImm<int64_t>(MI, 2, STI, O);
return;
break;
case 37:
// BFDOT_VG2_M2Z2Z_HtoS, BFDOT_VG4_M4Z4Z_HtoS, BFMLAL_VG2_M2Z2Z_S, BFMLAL...
printTypedVectorList<0,'h'>(MI, 5, STI, O);
return;
break;
case 38:
// BFDOT_VG2_M2ZZI_HtoS, BFDOT_VG2_M2ZZ_HtoS, BFDOT_VG4_M4ZZI_HtoS, BFDOT...
printSVERegOp<'h'>(MI, 5, STI, O);
break;
case 39:
// BFMLAL_MZZI_S, BFMLA_VG2_M2ZZI, BFMLA_VG4_M4ZZI, BFMLSL_MZZI_S, BFMLS_...
printVectorIndex(MI, 6, STI, O);
return;
break;
case 40:
// BFMLA_ZZZI, BFMLS_ZZZI, CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, FMLA_Z...
printVectorIndex(MI, 4, STI, O);
break;
case 41:
// BFMUL_ZZZI, FMUL_ZZZI_H, MUL_ZZZI_H, SQDMULH_ZZZI_H, SQRDMULH_ZZZI_H
printVectorIndex(MI, 3, STI, O);
return;
break;
case 42:
// BFMWri, BFMXri, CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, C...
printOperand(MI, 3, STI, O);
break;
case 43:
// CPY_ZPzI_B
printImm8OptLsl<int8_t>(MI, 2, STI, O);
return;
break;
case 44:
// CPY_ZPzI_D
printImm8OptLsl<int64_t>(MI, 2, STI, O);
return;
break;
case 45:
// CPY_ZPzI_S
printImm8OptLsl<int32_t>(MI, 2, STI, O);
return;
break;
case 46:
// DUPi16, DUPi32, DUPi64, DUPi8, DUPv16i8lane, DUPv2i32lane, DUPv2i64lan...
printVectorIndex(MI, 2, STI, O);
return;
break;
case 47:
// FCMEQ_PPzZ0_H, FCMGE_PPzZ0_H, FCMGT_PPzZ0_H, FCMLE_PPzZ0_H, FCMLT_PPzZ...
O << ", #0.0";
return;
break;
case 48:
// FMLAL2lanev4f16, FMLALlanev4f16, FMLSL2lanev4f16, FMLSLlanev4f16
O << ".h";
printVectorIndex(MI, 4, STI, O);
return;
break;
case 49:
// FMLAL2v4f16, FMLALv4f16, FMLSL2v4f16, FMLSLv4f16
O << ".2h";
return;
break;
case 50:
// INDEX_RI_B
printSImm<8>(MI, 2, STI, O);
return;
break;
case 51:
// INSERT_MXIPZ_H_B, INSERT_MXIPZ_V_B, SDOT_VG2_M2ZZI_BToS, SDOT_VG2_M2ZZ...
printSVERegOp<'b'>(MI, 5, STI, O);
break;
case 52:
// INSERT_MXIPZ_H_D, INSERT_MXIPZ_V_D
printSVERegOp<'d'>(MI, 5, STI, O);
return;
break;
case 53:
// INSERT_MXIPZ_H_Q, INSERT_MXIPZ_V_Q
printSVERegOp<'q'>(MI, 5, STI, O);
return;
break;
case 54:
// INSERT_MXIPZ_H_S, INSERT_MXIPZ_V_S
printSVERegOp<'s'>(MI, 5, STI, O);
return;
break;
case 55:
// LD1B_VG2_M2ZPXI, LD1H_VG2_M2ZPXI, LDNT1B_VG2_M2ZPXI, LDNT1H_VG2_M2ZPXI
printImmScale<2>(MI, 3, STI, O);
O << ", mul vl]";
return;
break;
case 56:
// LD1B_VG2_M2ZPXX, LDNT1B_VG2_M2ZPXX
printRegWithShiftExtend<false, 8, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 57:
// LD1H_VG2_M2ZPXX, LDNT1H_VG2_M2ZPXX
printRegWithShiftExtend<false, 16, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 58:
// LD1_MXIPXX_H_B, LD1_MXIPXX_H_D, LD1_MXIPXX_H_H, LD1_MXIPXX_H_Q, LD1_MX...
O << "/z, [";
printOperand(MI, 4, STI, O);
O << ", ";
break;
case 59:
// LDCLRP, LDCLRPA, LDCLRPAL, LDCLRPL, LDSETP, LDSETPA, LDSETPAL, LDSETPL...
printOperand(MI, 4, STI, O);
O << ']';
return;
break;
case 60:
// LDG, ST2GPostIndex, ST2GPreIndex, STGPostIndex, STGPreIndex, STZ2GPost...
printImmScale<16>(MI, 3, STI, O);
break;
case 61:
// LDRAAindexed, LDRABindexed
printImmScale<8>(MI, 2, STI, O);
O << ']';
return;
break;
case 62:
// LDRAAwriteback, LDRABwriteback
printImmScale<8>(MI, 3, STI, O);
O << "]!";
return;
break;
case 63:
// LDRBBui, LDRBui, LDRSBWui, LDRSBXui, STRBBui, STRBui
printUImm12Offset<1>(MI, 2, STI, O);
O << ']';
return;
break;
case 64:
// LDRDui, LDRXui, PRFMui, STRDui, STRXui
printUImm12Offset<8>(MI, 2, STI, O);
O << ']';
return;
break;
case 65:
// LDRHHui, LDRHui, LDRSHWui, LDRSHXui, STRHHui, STRHui
printUImm12Offset<2>(MI, 2, STI, O);
O << ']';
return;
break;
case 66:
// LDRQui, STRQui
printUImm12Offset<16>(MI, 2, STI, O);
O << ']';
return;
break;
case 67:
// LDRSWui, LDRSui, LDRWui, STRSui, STRWui
printUImm12Offset<4>(MI, 2, STI, O);
O << ']';
return;
break;
case 68:
// LUTI2_S_2ZTZI_B, LUTI2_S_2ZTZI_H, LUTI2_ZTZI_B, LUTI2_ZTZI_S, LUTI4_S_...
printSVERegOp<>(MI, 2, STI, O);
printVectorIndex(MI, 3, STI, O);
return;
break;
case 69:
// MAD_ZPmZZ_B, MLA_ZPmZZ_B, MLS_ZPmZZ_B, MSB_ZPmZZ_B
printSVERegOp<'b'>(MI, 3, STI, O);
O << ", ";
printSVERegOp<'b'>(MI, 4, STI, O);
return;
break;
case 70:
// MOVAZ_ZMI_H_H, MOVAZ_ZMI_H_Q, MOVAZ_ZMI_V_H, MOVAZ_ZMI_V_Q
printMatrixIndex(MI, 4, STI, O);
O << ']';
return;
break;
case 71:
// MOVA_2ZMXI_H_B, MOVA_2ZMXI_H_D, MOVA_2ZMXI_H_H, MOVA_2ZMXI_H_S, MOVA_2...
printImmRangeScale<2, 1>(MI, 3, STI, O);
O << ']';
return;
break;
case 72:
// MOVA_4ZMXI_H_B, MOVA_4ZMXI_H_D, MOVA_4ZMXI_H_H, MOVA_4ZMXI_H_S, MOVA_4...
printImmRangeScale<4, 3>(MI, 3, STI, O);
O << ']';
return;
break;
case 73:
// MOVA_MXI2Z_H_B, MOVA_MXI2Z_V_B, MOVA_MXI4Z_H_B, MOVA_MXI4Z_V_B
printTypedVectorList<0,'b'>(MI, 4, STI, O);
return;
break;
case 74:
// MOVA_MXI2Z_H_D, MOVA_MXI2Z_V_D, MOVA_MXI4Z_H_D, MOVA_MXI4Z_V_D
printTypedVectorList<0,'d'>(MI, 4, STI, O);
return;
break;
case 75:
// MOVA_MXI2Z_H_H, MOVA_MXI2Z_V_H, MOVA_MXI4Z_H_H, MOVA_MXI4Z_V_H
printTypedVectorList<0,'h'>(MI, 4, STI, O);
return;
break;
case 76:
// MOVA_MXI2Z_H_S, MOVA_MXI2Z_V_S, MOVA_MXI4Z_H_S, MOVA_MXI4Z_V_S
printTypedVectorList<0,'s'>(MI, 4, STI, O);
return;
break;
case 77:
// PRFB_D_PZI, PRFB_S_PZI
O << ']';
return;
break;
case 78:
// PRFB_PRI, PRFD_PRI, PRFH_PRI, PRFW_PRI
O << ", mul vl]";
return;
break;
case 79:
// SDOT_VG2_M2Z2Z_BtoS, SDOT_VG4_M4Z4Z_BtoS, SMLALL_VG2_M2Z2Z_BtoS, SMLAL...
printTypedVectorList<0,'b'>(MI, 5, STI, O);
return;
break;
case 80:
// SPLICE_ZPZZ_B
printTypedVectorList<0,'b'>(MI, 2, STI, O);
return;
break;
case 81:
// SPLICE_ZPZZ_D
printTypedVectorList<0,'d'>(MI, 2, STI, O);
return;
break;
case 82:
// SPLICE_ZPZZ_S
printTypedVectorList<0,'s'>(MI, 2, STI, O);
return;
break;
case 83:
// SQDECP_XPWd_B, SQDECP_XPWd_D, SQDECP_XPWd_H, SQDECP_XPWd_S, SQINCP_XPW...
printGPR64as32(MI, 2, STI, O);
return;
break;
case 84:
// ST1_MXIPXX_H_B, ST1_MXIPXX_H_D, ST1_MXIPXX_H_H, ST1_MXIPXX_H_Q, ST1_MX...
O << ", [";
printOperand(MI, 4, STI, O);
O << ", ";
break;
case 85:
// SYSLxt
printSysCROperand(MI, 2, STI, O);
O << ", ";
printSysCROperand(MI, 3, STI, O);
O << ", ";
printOperand(MI, 4, STI, O);
return;
break;
case 86:
// TBNZW, TBNZX, TBZW, TBZX
printAlignedLabel(MI, Address, 2, STI, O);
return;
break;
case 87:
// UMAX_ZI_B, UMAX_ZI_D, UMAX_ZI_S, UMIN_ZI_B, UMIN_ZI_D, UMIN_ZI_S
printImm(MI, 2, STI, O);
return;
break;
}
// Fragment 5 encoded into 7 bits for 88 unique commands.
switch ((Bits >> 49) & 127) {
default: llvm_unreachable("Invalid command number.");
case 0:
// ADCLB_ZZZ_D, ADCLB_ZZZ_S, ADCLT_ZZZ_D, ADCLT_ZZZ_S, ADCSWr, ADCSXr, AD...
return;
break;
case 1:
// ADDG, ADDP_ZPmZ_B, ADDP_ZPmZ_D, ADDP_ZPmZ_S, ADD_ZPmZ_B, ADD_ZPmZ_D, A...
O << ", ";
break;
case 2:
// ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM...
O << ".2d";
return;
break;
case 3:
// ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM...
O << ".4s";
return;
break;
case 4:
// ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, BFDOTv8bf16, B...
O << ".8h";
return;
break;
case 5:
// ADDP_ZPmZ_H, ADD_ZPmZ_H, AND_ZPmZ_H, ASRR_ZPmZ_H, ASR_ZPmZ_H, BFADD_ZP...
printSVERegOp<'h'>(MI, 3, STI, O);
break;
case 6:
// ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,...
O << ".16b";
return;
break;
case 7:
// ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv...
O << ".2s";
return;
break;
case 8:
// ADDPv4i16, ADDv4i16, BFDOTv4bf16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMH...
O << ".4h";
return;
break;
case 9:
// ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8...
O << ".8b";
return;
break;
case 10:
// ADDSXrx64, ADDXrx64, SUBSXrx64, SUBXrx64
printArithExtend(MI, 3, STI, O);
return;
break;
case 11:
// ADD_VG2_M2Z2Z_D, ADD_VG4_M4Z4Z_D, FMLA_VG2_M2Z2Z_D, FMLA_VG4_M4Z4Z_D, ...
printTypedVectorList<0,'d'>(MI, 5, STI, O);
return;
break;
case 12:
// ADD_VG2_M2Z2Z_S, ADD_VG4_M4Z4Z_S, FMLA_VG2_M2Z2Z_S, FMLA_VG4_M4Z4Z_S, ...
printTypedVectorList<0,'s'>(MI, 5, STI, O);
return;
break;
case 13:
// ADD_VG2_M2ZZ_D, ADD_VG4_M4ZZ_D, FMLA_VG2_M2ZZI_D, FMLA_VG2_M2ZZ_D, FML...
printSVERegOp<'d'>(MI, 5, STI, O);
break;
case 14:
// ADD_VG2_M2ZZ_S, ADD_VG4_M4ZZ_S, FMLA_VG2_M2ZZI_S, FMLA_VG2_M2ZZ_S, FML...
printSVERegOp<'s'>(MI, 5, STI, O);
break;
case 15:
// ASRD_ZPmI_H, ASR_ZPmI_H, CMPEQ_PPzZI_H, CMPGE_PPzZI_H, CMPGT_PPzZI_H, ...
printOperand(MI, 3, STI, O);
break;
case 16:
// ASR_WIDE_ZPmZ_H, CMPEQ_WIDE_PPzZZ_H, CMPGE_WIDE_PPzZZ_H, CMPGT_WIDE_PP...
printSVERegOp<'d'>(MI, 3, STI, O);
return;
break;
case 17:
// BCAX, EOR3, EXTv16i8
O << ".16b, ";
break;
case 18:
// BF16DOTlanev4bf16, BF16DOTlanev8bf16
O << ".2h";
printVectorIndex(MI, 4, STI, O);
return;
break;
case 19:
// BFDOT_VG2_M2ZZI_HtoS, BFDOT_VG4_M4ZZI_HtoS, BFMLAL_VG2_M2ZZI_S, BFMLAL...
printVectorIndex(MI, 6, STI, O);
return;
break;
case 20:
// BFDOT_ZZI, BFMLALB_ZZZI, BFMLALT_ZZZI, BFMLSLB_ZZZI_S, BFMLSLT_ZZZI_S,...
printVectorIndex(MI, 4, STI, O);
break;
case 21:
// BFMLALBIdx, BFMLALTIdx, FCMLAv4f16_indexed, FCMLAv8f16_indexed, FMLAL2...
O << ".h";
break;
case 22:
// BFMLA_ZPmZZ, BFMLS_ZPmZZ, FCMLA_ZPmZZ_H, FMAD_ZPmZZ_H, FMLA_ZPmZZ_H, F...
printSVERegOp<'h'>(MI, 4, STI, O);
break;
case 23:
// CADD_ZZI_H, SQCADD_ZZI_H
printComplexRotationOp<180, 90>(MI, 3, STI, O);
return;
break;
case 24:
// CASAB, CASAH, CASALB, CASALH, CASALW, CASALX, CASAW, CASAX, CASB, CASH...
O << ']';
return;
break;
case 25:
// CDOT_ZZZ_S, CMLA_ZZZ_B, CMLA_ZZZ_H, SQRDCMLAH_ZZZ_B, SQRDCMLAH_ZZZ_H
printComplexRotationOp<90, 0>(MI, 4, STI, O);
return;
break;
case 26:
// CMPHI_PPzZI_H, CMPHS_PPzZI_H, CMPLO_PPzZI_H, CMPLS_PPzZI_H
printImm(MI, 3, STI, O);
return;
break;
case 27:
// EXTv8i8
O << ".8b, ";
printOperand(MI, 3, STI, O);
return;
break;
case 28:
// FADD_ZPmI_H, FSUBR_ZPmI_H, FSUB_ZPmI_H
printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::one>(MI, 3, STI, O);
return;
break;
case 29:
// FCADDv2f32, FCMLAv2f32
O << ".2s, ";
break;
case 30:
// FCADDv2f64, FCMLAv2f64, XAR
O << ".2d, ";
break;
case 31:
// FCADDv4f16, FCMLAv4f16
O << ".4h, ";
break;
case 32:
// FCADDv4f32, FCMLAv4f32, SM3SS1
O << ".4s, ";
break;
case 33:
// FCADDv8f16, FCMLAv8f16
O << ".8h, ";
break;
case 34:
// FCMEQ_PPzZ0_D, FCMEQ_PPzZ0_S, FCMGE_PPzZ0_D, FCMGE_PPzZ0_S, FCMGT_PPzZ...
O << ", #0.0";
return;
break;
case 35:
// FCMLAv4f32_indexed, FMLAv1i32_indexed, FMLAv2i32_indexed, FMLAv4i32_in...
O << ".s";
break;
case 36:
// FMAXNM_ZPmI_H, FMAX_ZPmI_H, FMINNM_ZPmI_H, FMIN_ZPmI_H
printExactFPImm<AArch64ExactFPImm::zero, AArch64ExactFPImm::one>(MI, 3, STI, O);
return;
break;
case 37:
// FMLAv1i64_indexed, FMLAv2i64_indexed, FMLSv1i64_indexed, FMLSv2i64_ind...
O << ".d";
break;
case 38:
// FMUL_ZPmI_H
printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::two>(MI, 3, STI, O);
return;
break;
case 39:
// FMUL_ZZZI_D, FMUL_ZZZI_S, MUL_ZZZI_D, MUL_ZZZI_S, SMULLB_ZZZI_D, SMULL...
printVectorIndex(MI, 3, STI, O);
return;
break;
case 40:
// GLD1B_D_REAL, GLD1D_REAL, GLD1H_D_REAL, GLD1SB_D_REAL, GLD1SH_D_REAL, ...
printRegWithShiftExtend<false, 8, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 41:
// GLD1B_D_SXTW_REAL, GLD1D_SXTW_REAL, GLD1H_D_SXTW_REAL, GLD1SB_D_SXTW_R...
printRegWithShiftExtend<true, 8, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 42:
// GLD1B_D_UXTW_REAL, GLD1D_UXTW_REAL, GLD1H_D_UXTW_REAL, GLD1SB_D_UXTW_R...
printRegWithShiftExtend<false, 8, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 43:
// GLD1B_S_SXTW_REAL, GLD1H_S_SXTW_REAL, GLD1SB_S_SXTW_REAL, GLD1SH_S_SXT...
printRegWithShiftExtend<true, 8, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 44:
// GLD1B_S_UXTW_REAL, GLD1H_S_UXTW_REAL, GLD1SB_S_UXTW_REAL, GLD1SH_S_UXT...
printRegWithShiftExtend<false, 8, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 45:
// GLD1D_IMM_REAL, GLDFF1D_IMM_REAL, LD1RD_IMM, SST1D_IMM
printImmScale<8>(MI, 3, STI, O);
O << ']';
return;
break;
case 46:
// GLD1D_SCALED_REAL, GLDFF1D_SCALED_REAL, SST1D_SCALED
printRegWithShiftExtend<false, 64, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 47:
// GLD1D_SXTW_SCALED_REAL, GLDFF1D_SXTW_SCALED_REAL, SST1D_SXTW_SCALED
printRegWithShiftExtend<true, 64, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 48:
// GLD1D_UXTW_SCALED_REAL, GLDFF1D_UXTW_SCALED_REAL, SST1D_UXTW_SCALED
printRegWithShiftExtend<false, 64, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 49:
// GLD1H_D_IMM_REAL, GLD1H_S_IMM_REAL, GLD1SH_D_IMM_REAL, GLD1SH_S_IMM_RE...
printImmScale<2>(MI, 3, STI, O);
break;
case 50:
// GLD1H_D_SCALED_REAL, GLD1SH_D_SCALED_REAL, GLDFF1H_D_SCALED_REAL, GLDF...
printRegWithShiftExtend<false, 16, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 51:
// GLD1H_D_SXTW_SCALED_REAL, GLD1SH_D_SXTW_SCALED_REAL, GLDFF1H_D_SXTW_SC...
printRegWithShiftExtend<true, 16, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 52:
// GLD1H_D_UXTW_SCALED_REAL, GLD1SH_D_UXTW_SCALED_REAL, GLDFF1H_D_UXTW_SC...
printRegWithShiftExtend<false, 16, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 53:
// GLD1H_S_SXTW_SCALED_REAL, GLD1SH_S_SXTW_SCALED_REAL, GLDFF1H_S_SXTW_SC...
printRegWithShiftExtend<true, 16, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 54:
// GLD1H_S_UXTW_SCALED_REAL, GLD1SH_S_UXTW_SCALED_REAL, GLDFF1H_S_UXTW_SC...
printRegWithShiftExtend<false, 16, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 55:
// GLD1SW_D_IMM_REAL, GLD1W_D_IMM_REAL, GLD1W_IMM_REAL, GLDFF1SW_D_IMM_RE...
printImmScale<4>(MI, 3, STI, O);
break;
case 56:
// GLD1SW_D_SCALED_REAL, GLD1W_D_SCALED_REAL, GLDFF1SW_D_SCALED_REAL, GLD...
printRegWithShiftExtend<false, 32, 'x', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 57:
// GLD1SW_D_SXTW_SCALED_REAL, GLD1W_D_SXTW_SCALED_REAL, GLDFF1SW_D_SXTW_S...
printRegWithShiftExtend<true, 32, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 58:
// GLD1SW_D_UXTW_SCALED_REAL, GLD1W_D_UXTW_SCALED_REAL, GLDFF1SW_D_UXTW_S...
printRegWithShiftExtend<false, 32, 'w', 'd'>(MI, 3, STI, O);
O << ']';
return;
break;
case 59:
// GLD1W_SXTW_SCALED_REAL, GLDFF1W_SXTW_SCALED_REAL, SST1W_SXTW_SCALED
printRegWithShiftExtend<true, 32, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 60:
// GLD1W_UXTW_SCALED_REAL, GLDFF1W_UXTW_SCALED_REAL, SST1W_UXTW_SCALED
printRegWithShiftExtend<false, 32, 'w', 's'>(MI, 3, STI, O);
O << ']';
return;
break;
case 61:
// LD1B, LD1B_2Z, LD1B_4Z, LD1B_D, LD1B_H, LD1B_S, LD1B_VG4_M4ZPXX, LD1RO...
printRegWithShiftExtend<false, 8, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 62:
// LD1D, LD1D_2Z, LD1D_4Z, LD1D_Q, LD1D_VG2_M2ZPXX, LD1D_VG4_M4ZPXX, LD1R...
printRegWithShiftExtend<false, 64, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 63:
// LD1H, LD1H_2Z, LD1H_4Z, LD1H_D, LD1H_S, LD1H_VG4_M4ZPXX, LD1RO_H, LD1R...
printRegWithShiftExtend<false, 16, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 64:
// LD1RO_B_IMM, LD1RO_D_IMM, LD1RO_H_IMM, LD1RO_W_IMM
printImmScale<32>(MI, 3, STI, O);
O << ']';
return;
break;
case 65:
// LD1RO_W, LD1RQ_W, LD1SW_D, LD1W, LD1W_2Z, LD1W_4Z, LD1W_D, LD1W_Q, LD1...
printRegWithShiftExtend<false, 32, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 66:
// LD1RQ_B_IMM, LD1RQ_D_IMM, LD1RQ_H_IMM, LD1RQ_W_IMM
printImmScale<16>(MI, 3, STI, O);
O << ']';
return;
break;
case 67:
// LD1_MXIPXX_H_B, LD1_MXIPXX_V_B, ST1_MXIPXX_H_B, ST1_MXIPXX_V_B
printRegWithShiftExtend<false, 8, 'x', 0>(MI, 5, STI, O);
O << ']';
return;
break;
case 68:
// LD1_MXIPXX_H_D, LD1_MXIPXX_V_D, ST1_MXIPXX_H_D, ST1_MXIPXX_V_D
printRegWithShiftExtend<false, 64, 'x', 0>(MI, 5, STI, O);
O << ']';
return;
break;
case 69:
// LD1_MXIPXX_H_H, LD1_MXIPXX_V_H, ST1_MXIPXX_H_H, ST1_MXIPXX_V_H
printRegWithShiftExtend<false, 16, 'x', 0>(MI, 5, STI, O);
O << ']';
return;
break;
case 70:
// LD1_MXIPXX_H_Q, LD1_MXIPXX_V_Q, ST1_MXIPXX_H_Q, ST1_MXIPXX_V_Q
printRegWithShiftExtend<false, 128, 'x', 0>(MI, 5, STI, O);
O << ']';
return;
break;
case 71:
// LD1_MXIPXX_H_S, LD1_MXIPXX_V_S, ST1_MXIPXX_H_S, ST1_MXIPXX_V_S
printRegWithShiftExtend<false, 32, 'x', 0>(MI, 5, STI, O);
O << ']';
return;
break;
case 72:
// LD2Q, LD3Q, LD4Q, ST2Q, ST3Q, ST4Q
printRegWithShiftExtend<false, 128, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 73:
// LD3B_IMM, LD3D_IMM, LD3H_IMM, LD3Q_IMM, LD3W_IMM, ST3B_IMM, ST3D_IMM, ...
printImmScale<3>(MI, 3, STI, O);
O << ", mul vl]";
return;
break;
case 74:
// LDIAPPWpre
O << "], #8";
return;
break;
case 75:
// LDIAPPXpre
O << "], #16";
return;
break;
case 76:
// LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STGPpost,...
O << "], ";
break;
case 77:
// LDRBBpre, LDRBpre, LDRDpre, LDRHHpre, LDRHpre, LDRQpre, LDRSBWpre, LDR...
O << "]!";
return;
break;
case 78:
// LDR_PXI, LDR_ZXI, STR_PXI, STR_ZXI
O << ", mul vl]";
return;
break;
case 79:
// PSEL_PPPRI_B, PSEL_PPPRI_D, PSEL_PPPRI_H, PSEL_PPPRI_S
O << '[';
printOperand(MI, 3, STI, O);
O << ", ";
printMatrixIndex(MI, 4, STI, O);
O << ']';
return;
break;
case 80:
// SDOTlanev16i8, SDOTlanev8i8, SUDOTlanev16i8, SUDOTlanev8i8, UDOTlanev1...
O << ".4b";
printVectorIndex(MI, 4, STI, O);
return;
break;
case 81:
// SEL_VG2_2ZP2Z2Z_B, SEL_VG4_4ZP4Z4Z_B
printTypedVectorList<0,'b'>(MI, 3, STI, O);
return;
break;
case 82:
// SEL_VG2_2ZP2Z2Z_D, SEL_VG4_4ZP4Z4Z_D
printTypedVectorList<0,'d'>(MI, 3, STI, O);
return;
break;
case 83:
// SEL_VG2_2ZP2Z2Z_H, SEL_VG4_4ZP4Z4Z_H
printTypedVectorList<0,'h'>(MI, 3, STI, O);
return;
break;
case 84:
// SEL_VG2_2ZP2Z2Z_S, SEL_VG4_4ZP4Z4Z_S
printTypedVectorList<0,'s'>(MI, 3, STI, O);
return;
break;
case 85:
// STILPWpre
O << ", #-8]!";
return;
break;
case 86:
// STILPXpre
O << ", #-16]!";
return;
break;
case 87:
// STLXPW, STLXPX, STXPW, STXPX
O << ", [";
printOperand(MI, 3, STI, O);
O << ']';
return;
break;
}
// Fragment 6 encoded into 6 bits for 44 unique commands.
switch ((Bits >> 56) & 63) {
default: llvm_unreachable("Invalid command number.");
case 0:
// ADDG, ASRD_ZPmI_B, ASRD_ZPmI_D, ASRD_ZPmI_S, ASR_ZPmI_B, ASR_ZPmI_D, A...
printOperand(MI, 3, STI, O);
return;
break;
case 1:
// ADDP_ZPmZ_B, ADD_ZPmZ_B, ANDS_PPzPP, AND_PPzPP, AND_ZPmZ_B, ASRR_ZPmZ_...
printSVERegOp<'b'>(MI, 3, STI, O);
return;
break;
case 2:
// ADDP_ZPmZ_D, ADD_ZPmZ_D, AND_ZPmZ_D, ASRR_ZPmZ_D, ASR_WIDE_ZPmZ_B, ASR...
printSVERegOp<'d'>(MI, 3, STI, O);
break;
case 3:
// ADDP_ZPmZ_H, ADD_VG2_M2ZZ_D, ADD_VG2_M2ZZ_S, ADD_VG4_M4ZZ_D, ADD_VG4_M...
return;
break;
case 4:
// ADDP_ZPmZ_S, ADD_ZPmZ_S, AND_ZPmZ_S, ASRR_ZPmZ_S, ASR_ZPmZ_S, BIC_ZPmZ...
printSVERegOp<'s'>(MI, 3, STI, O);
break;
case 5:
// BCAX, EOR3, SM3SS1
printVRegOperand(MI, 3, STI, O);
break;
case 6:
// BFMLALBIdx, BFMLALTIdx, FCMLAv4f16_indexed, FCMLAv4f32_indexed, FCMLAv...
printVectorIndex(MI, 4, STI, O);
break;
case 7:
// BFMWri, BFMXri
printOperand(MI, 4, STI, O);
return;
break;
case 8:
// CADD_ZZI_B, CADD_ZZI_D, CADD_ZZI_S, FCADDv2f32, FCADDv2f64, FCADDv4f16...
printComplexRotationOp<180, 90>(MI, 3, STI, O);
return;
break;
case 9:
// CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi, CCMPXr, CSELWr...
printCondCode(MI, 3, STI, O);
return;
break;
case 10:
// CDOT_ZZZI_D, CMLA_ZZZI_S, FCADD_ZPmZ_H, FCMLA_ZPmZZ_H, FCMLA_ZZZI_S, S...
O << ", ";
break;
case 11:
// CDOT_ZZZI_S, CMLA_ZZZI_H, FCMLA_ZZZI_H, SQRDCMLAH_ZZZI_H
printComplexRotationOp<90, 0>(MI, 5, STI, O);
return;
break;
case 12:
// CDOT_ZZZ_D, CMLA_ZZZ_D, CMLA_ZZZ_S, FCMLAv2f32, FCMLAv2f64, FCMLAv4f16...
printComplexRotationOp<90, 0>(MI, 4, STI, O);
return;
break;
case 13:
// CLASTA_RPZ_H, CLASTA_VPZ_H, CLASTB_RPZ_H, CLASTB_VPZ_H
printSVERegOp<'h'>(MI, 3, STI, O);
return;
break;
case 14:
// CMPHI_PPzZI_B, CMPHI_PPzZI_D, CMPHI_PPzZI_S, CMPHS_PPzZI_B, CMPHS_PPzZ...
printImm(MI, 3, STI, O);
return;
break;
case 15:
// FADD_ZPmI_D, FADD_ZPmI_S, FSUBR_ZPmI_D, FSUBR_ZPmI_S, FSUB_ZPmI_D, FSU...
printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::one>(MI, 3, STI, O);
return;
break;
case 16:
// FCMLA_ZPmZZ_D, FMAD_ZPmZZ_D, FMLA_ZPmZZ_D, FMLS_ZPmZZ_D, FMSB_ZPmZZ_D,...
printSVERegOp<'d'>(MI, 4, STI, O);
break;
case 17:
// FCMLA_ZPmZZ_S, FMAD_ZPmZZ_S, FMLA_ZPmZZ_S, FMLS_ZPmZZ_S, FMSB_ZPmZZ_S,...
printSVERegOp<'s'>(MI, 4, STI, O);
break;
case 18:
// FMAXNM_ZPmI_D, FMAXNM_ZPmI_S, FMAX_ZPmI_D, FMAX_ZPmI_S, FMINNM_ZPmI_D,...
printExactFPImm<AArch64ExactFPImm::zero, AArch64ExactFPImm::one>(MI, 3, STI, O);
return;
break;
case 19:
// FMLA_VG2_M2ZZI_D, FMLA_VG2_M2ZZI_S, FMLA_VG4_M4ZZI_D, FMLA_VG4_M4ZZI_S...
printVectorIndex(MI, 6, STI, O);
return;
break;
case 20:
// FMULXv1i16_indexed, FMULXv1i32_indexed, FMULXv1i64_indexed, FMULXv2i32...
printVectorIndex(MI, 3, STI, O);
return;
break;
case 21:
// FMUL_ZPmI_D, FMUL_ZPmI_S
printExactFPImm<AArch64ExactFPImm::half, AArch64ExactFPImm::two>(MI, 3, STI, O);
return;
break;
case 22:
// GLD1B_D_IMM_REAL, GLD1B_S_IMM_REAL, GLD1H_D_IMM_REAL, GLD1H_S_IMM_REAL...
O << ']';
return;
break;
case 23:
// LD1B_2Z_IMM, LD1B_4Z_IMM, LD1B_D_IMM_REAL, LD1B_H_IMM_REAL, LD1B_IMM_R...
O << ", mul vl]";
return;
break;
case 24:
// LDNPDi, LDNPXi, LDPDi, LDPXi, STNPDi, STNPXi, STPDi, STPXi
printImmScale<8>(MI, 3, STI, O);
O << ']';
return;
break;
case 25:
// LDNPQi, LDPQi, STGPi, STNPQi, STPQi
printImmScale<16>(MI, 3, STI, O);
O << ']';
return;
break;
case 26:
// LDNPSi, LDNPWi, LDPSWi, LDPSi, LDPWi, STNPSi, STNPWi, STPSi, STPWi
printImmScale<4>(MI, 3, STI, O);
O << ']';
return;
break;
case 27:
// LDPDpost, LDPDpre, LDPXpost, LDPXpre, STPDpost, STPDpre, STPXpost, STP...
printImmScale<8>(MI, 4, STI, O);
break;
case 28:
// LDPQpost, LDPQpre, STGPpost, STGPpre, STPQpost, STPQpre
printImmScale<16>(MI, 4, STI, O);
break;
case 29:
// LDPSWpost, LDPSWpre, LDPSpost, LDPSpre, LDPWpost, LDPWpre, STPSpost, S...
printImmScale<4>(MI, 4, STI, O);
break;
case 30:
// LDRBBroW, LDRBroW, LDRSBWroW, LDRSBXroW, STRBBroW, STRBroW
printMemExtend<'w', 8>(MI, 3, STI, O);
O << ']';
return;
break;
case 31:
// LDRBBroX, LDRBroX, LDRSBWroX, LDRSBXroX, STRBBroX, STRBroX
printMemExtend<'x', 8>(MI, 3, STI, O);
O << ']';
return;
break;
case 32:
// LDRDroW, LDRXroW, PRFMroW, STRDroW, STRXroW
printMemExtend<'w', 64>(MI, 3, STI, O);
O << ']';
return;
break;
case 33:
// LDRDroX, LDRXroX, PRFMroX, STRDroX, STRXroX
printMemExtend<'x', 64>(MI, 3, STI, O);
O << ']';
return;
break;
case 34:
// LDRHHroW, LDRHroW, LDRSHWroW, LDRSHXroW, STRHHroW, STRHroW
printMemExtend<'w', 16>(MI, 3, STI, O);
O << ']';
return;
break;
case 35:
// LDRHHroX, LDRHroX, LDRSHWroX, LDRSHXroX, STRHHroX, STRHroX
printMemExtend<'x', 16>(MI, 3, STI, O);
O << ']';
return;
break;
case 36:
// LDRQroW, STRQroW
printMemExtend<'w', 128>(MI, 3, STI, O);
O << ']';
return;
break;
case 37:
// LDRQroX, STRQroX
printMemExtend<'x', 128>(MI, 3, STI, O);
O << ']';
return;
break;
case 38:
// LDRSWroW, LDRSroW, LDRWroW, STRSroW, STRWroW
printMemExtend<'w', 32>(MI, 3, STI, O);
O << ']';
return;
break;
case 39:
// LDRSWroX, LDRSroX, LDRWroX, STRSroX, STRWroX
printMemExtend<'x', 32>(MI, 3, STI, O);
O << ']';
return;
break;
case 40:
// ST1B_VG2_M2ZPXI, ST1H_VG2_M2ZPXI, STNT1B_VG2_M2ZPXI, STNT1H_VG2_M2ZPXI
printImmScale<2>(MI, 3, STI, O);
O << ", mul vl]";
return;
break;
case 41:
// ST1B_VG2_M2ZPXX, STNT1B_VG2_M2ZPXX
printRegWithShiftExtend<false, 8, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 42:
// ST1H_VG2_M2ZPXX, STNT1H_VG2_M2ZPXX
printRegWithShiftExtend<false, 16, 'x', 0>(MI, 3, STI, O);
O << ']';
return;
break;
case 43:
// WHILEGE_CXX_B, WHILEGE_CXX_D, WHILEGE_CXX_H, WHILEGE_CXX_S, WHILEGT_CX...
printSVEVecLenSpecifier(MI, 3, STI, O);
return;
break;
}
switch (MI->getOpcode()) {
default: llvm_unreachable("Unexpected opcode.");
case AArch64::ADDP_ZPmZ_D:
case AArch64::ADDP_ZPmZ_S:
case AArch64::ADD_ZPmZ_D:
case AArch64::ADD_ZPmZ_S:
case AArch64::AND_ZPmZ_D:
case AArch64::AND_ZPmZ_S:
case AArch64::ASRR_ZPmZ_D:
case AArch64::ASRR_ZPmZ_S:
case AArch64::ASR_WIDE_ZPmZ_B:
case AArch64::ASR_WIDE_ZPmZ_S:
case AArch64::ASR_ZPmZ_D:
case AArch64::ASR_ZPmZ_S:
case AArch64::BCAX_ZZZZ:
case AArch64::BFMLALBIdx:
case AArch64::BFMLALTIdx:
case AArch64::BIC_ZPmZ_D:
case AArch64::BIC_ZPmZ_S:
case AArch64::BSL1N_ZZZZ:
case AArch64::BSL2N_ZZZZ:
case AArch64::BSL_ZZZZ:
case AArch64::CLASTA_RPZ_D:
case AArch64::CLASTA_RPZ_S:
case AArch64::CLASTA_VPZ_D:
case AArch64::CLASTA_VPZ_S:
case AArch64::CLASTA_ZPZ_D:
case AArch64::CLASTA_ZPZ_S:
case AArch64::CLASTB_RPZ_D:
case AArch64::CLASTB_RPZ_S:
case AArch64::CLASTB_VPZ_D:
case AArch64::CLASTB_VPZ_S:
case AArch64::CLASTB_ZPZ_D:
case AArch64::CLASTB_ZPZ_S:
case AArch64::CMPEQ_PPzZZ_D:
case AArch64::CMPEQ_PPzZZ_S:
case AArch64::CMPEQ_WIDE_PPzZZ_B:
case AArch64::CMPEQ_WIDE_PPzZZ_S:
case AArch64::CMPGE_PPzZZ_D:
case AArch64::CMPGE_PPzZZ_S:
case AArch64::CMPGE_WIDE_PPzZZ_B:
case AArch64::CMPGE_WIDE_PPzZZ_S:
case AArch64::CMPGT_PPzZZ_D:
case AArch64::CMPGT_PPzZZ_S:
case AArch64::CMPGT_WIDE_PPzZZ_B:
case AArch64::CMPGT_WIDE_PPzZZ_S:
case AArch64::CMPHI_PPzZZ_D:
case AArch64::CMPHI_PPzZZ_S:
case AArch64::CMPHI_WIDE_PPzZZ_B:
case AArch64::CMPHI_WIDE_PPzZZ_S:
case AArch64::CMPHS_PPzZZ_D:
case AArch64::CMPHS_PPzZZ_S:
case AArch64::CMPHS_WIDE_PPzZZ_B:
case AArch64::CMPHS_WIDE_PPzZZ_S:
case AArch64::CMPLE_WIDE_PPzZZ_B:
case AArch64::CMPLE_WIDE_PPzZZ_S:
case AArch64::CMPLO_WIDE_PPzZZ_B:
case AArch64::CMPLO_WIDE_PPzZZ_S:
case AArch64::CMPLS_WIDE_PPzZZ_B:
case AArch64::CMPLS_WIDE_PPzZZ_S:
case AArch64::CMPLT_WIDE_PPzZZ_B:
case AArch64::CMPLT_WIDE_PPzZZ_S:
case AArch64::CMPNE_PPzZZ_D:
case AArch64::CMPNE_PPzZZ_S:
case AArch64::CMPNE_WIDE_PPzZZ_B:
case AArch64::CMPNE_WIDE_PPzZZ_S:
case AArch64::EOR3_ZZZZ:
case AArch64::EOR_ZPmZ_D:
case AArch64::EOR_ZPmZ_S:
case AArch64::FABD_ZPmZ_D:
case AArch64::FABD_ZPmZ_S:
case AArch64::FACGE_PPzZZ_D:
case AArch64::FACGE_PPzZZ_S:
case AArch64::FACGT_PPzZZ_D:
case AArch64::FACGT_PPzZZ_S:
case AArch64::FADDP_ZPmZZ_D:
case AArch64::FADDP_ZPmZZ_S:
case AArch64::FADD_ZPmZ_D:
case AArch64::FADD_ZPmZ_S:
case AArch64::FCMEQ_PPzZZ_D:
case AArch64::FCMEQ_PPzZZ_S:
case AArch64::FCMGE_PPzZZ_D:
case AArch64::FCMGE_PPzZZ_S:
case AArch64::FCMGT_PPzZZ_D:
case AArch64::FCMGT_PPzZZ_S:
case AArch64::FCMNE_PPzZZ_D:
case AArch64::FCMNE_PPzZZ_S:
case AArch64::FCMUO_PPzZZ_D:
case AArch64::FCMUO_PPzZZ_S:
case AArch64::FDIVR_ZPmZ_D:
case AArch64::FDIVR_ZPmZ_S:
case AArch64::FDIV_ZPmZ_D:
case AArch64::FDIV_ZPmZ_S:
case AArch64::FMAD_ZPmZZ_D:
case AArch64::FMAD_ZPmZZ_S:
case AArch64::FMAXNMP_ZPmZZ_D:
case AArch64::FMAXNMP_ZPmZZ_S:
case AArch64::FMAXNM_ZPmZ_D:
case AArch64::FMAXNM_ZPmZ_S:
case AArch64::FMAXP_ZPmZZ_D:
case AArch64::FMAXP_ZPmZZ_S:
case AArch64::FMAX_ZPmZ_D:
case AArch64::FMAX_ZPmZ_S:
case AArch64::FMINNMP_ZPmZZ_D:
case AArch64::FMINNMP_ZPmZZ_S:
case AArch64::FMINNM_ZPmZ_D:
case AArch64::FMINNM_ZPmZ_S:
case AArch64::FMINP_ZPmZZ_D:
case AArch64::FMINP_ZPmZZ_S:
case AArch64::FMIN_ZPmZ_D:
case AArch64::FMIN_ZPmZ_S:
case AArch64::FMLAL2lanev8f16:
case AArch64::FMLALlanev8f16:
case AArch64::FMLA_ZPmZZ_D:
case AArch64::FMLA_ZPmZZ_S:
case AArch64::FMLAv1i16_indexed:
case AArch64::FMLAv1i32_indexed:
case AArch64::FMLAv1i64_indexed:
case AArch64::FMLAv2i32_indexed:
case AArch64::FMLAv2i64_indexed:
case AArch64::FMLAv4i16_indexed:
case AArch64::FMLAv4i32_indexed:
case AArch64::FMLAv8i16_indexed:
case AArch64::FMLSL2lanev8f16:
case AArch64::FMLSLlanev8f16:
case AArch64::FMLS_ZPmZZ_D:
case AArch64::FMLS_ZPmZZ_S:
case AArch64::FMLSv1i16_indexed:
case AArch64::FMLSv1i32_indexed:
case AArch64::FMLSv1i64_indexed:
case AArch64::FMLSv2i32_indexed:
case AArch64::FMLSv2i64_indexed:
case AArch64::FMLSv4i16_indexed:
case AArch64::FMLSv4i32_indexed:
case AArch64::FMLSv8i16_indexed:
case AArch64::FMSB_ZPmZZ_D:
case AArch64::FMSB_ZPmZZ_S:
case AArch64::FMULX_ZPmZ_D:
case AArch64::FMULX_ZPmZ_S:
case AArch64::FMUL_ZPmZ_D:
case AArch64::FMUL_ZPmZ_S:
case AArch64::FNMAD_ZPmZZ_D:
case AArch64::FNMAD_ZPmZZ_S:
case AArch64::FNMLA_ZPmZZ_D:
case AArch64::FNMLA_ZPmZZ_S:
case AArch64::FNMLS_ZPmZZ_D:
case AArch64::FNMLS_ZPmZZ_S:
case AArch64::FNMSB_ZPmZZ_D:
case AArch64::FNMSB_ZPmZZ_S:
case AArch64::FSCALE_ZPmZ_D:
case AArch64::FSCALE_ZPmZ_S:
case AArch64::FSUBR_ZPmZ_D:
case AArch64::FSUBR_ZPmZ_S:
case AArch64::FSUB_ZPmZ_D:
case AArch64::FSUB_ZPmZ_S:
case AArch64::HISTCNT_ZPzZZ_D:
case AArch64::HISTCNT_ZPzZZ_S:
case AArch64::LDPDpost:
case AArch64::LDPQpost:
case AArch64::LDPSWpost:
case AArch64::LDPSpost:
case AArch64::LDPWpost:
case AArch64::LDPXpost:
case AArch64::LSLR_ZPmZ_D:
case AArch64::LSLR_ZPmZ_S:
case AArch64::LSL_WIDE_ZPmZ_B:
case AArch64::LSL_WIDE_ZPmZ_S:
case AArch64::LSL_ZPmZ_D:
case AArch64::LSL_ZPmZ_S:
case AArch64::LSRR_ZPmZ_D:
case AArch64::LSRR_ZPmZ_S:
case AArch64::LSR_WIDE_ZPmZ_B:
case AArch64::LSR_WIDE_ZPmZ_S:
case AArch64::LSR_ZPmZ_D:
case AArch64::LSR_ZPmZ_S:
case AArch64::MAD_ZPmZZ_D:
case AArch64::MAD_ZPmZZ_S:
case AArch64::MLA_ZPmZZ_D:
case AArch64::MLA_ZPmZZ_S:
case AArch64::MLAv2i32_indexed:
case AArch64::MLAv4i16_indexed:
case AArch64::MLAv4i32_indexed:
case AArch64::MLAv8i16_indexed:
case AArch64::MLS_ZPmZZ_D:
case AArch64::MLS_ZPmZZ_S:
case AArch64::MLSv2i32_indexed:
case AArch64::MLSv4i16_indexed:
case AArch64::MLSv4i32_indexed:
case AArch64::MLSv8i16_indexed:
case AArch64::MSB_ZPmZZ_D:
case AArch64::MSB_ZPmZZ_S:
case AArch64::MUL_ZPmZ_D:
case AArch64::MUL_ZPmZ_S:
case AArch64::NBSL_ZZZZ:
case AArch64::ORR_ZPmZ_D:
case AArch64::ORR_ZPmZ_S:
case AArch64::SABD_ZPmZ_D:
case AArch64::SABD_ZPmZ_S:
case AArch64::SDIVR_ZPmZ_D:
case AArch64::SDIVR_ZPmZ_S:
case AArch64::SDIV_ZPmZ_D:
case AArch64::SDIV_ZPmZ_S:
case AArch64::SEL_ZPZZ_D:
case AArch64::SEL_ZPZZ_S:
case AArch64::SHADD_ZPmZ_D:
case AArch64::SHADD_ZPmZ_S:
case AArch64::SHSUBR_ZPmZ_D:
case AArch64::SHSUBR_ZPmZ_S:
case AArch64::SHSUB_ZPmZ_D:
case AArch64::SHSUB_ZPmZ_S:
case AArch64::SM3TT1A:
case AArch64::SM3TT1B:
case AArch64::SM3TT2A:
case AArch64::SM3TT2B:
case AArch64::SMAXP_ZPmZ_D:
case AArch64::SMAXP_ZPmZ_S:
case AArch64::SMAX_ZPmZ_D:
case AArch64::SMAX_ZPmZ_S:
case AArch64::SMINP_ZPmZ_D:
case AArch64::SMINP_ZPmZ_S:
case AArch64::SMIN_ZPmZ_D:
case AArch64::SMIN_ZPmZ_S:
case AArch64::SMLALv2i32_indexed:
case AArch64::SMLALv4i16_indexed:
case AArch64::SMLALv4i32_indexed:
case AArch64::SMLALv8i16_indexed:
case AArch64::SMLSLv2i32_indexed:
case AArch64::SMLSLv4i16_indexed:
case AArch64::SMLSLv4i32_indexed:
case AArch64::SMLSLv8i16_indexed:
case AArch64::SMULH_ZPmZ_D:
case AArch64::SMULH_ZPmZ_S:
case AArch64::SPLICE_ZPZ_D:
case AArch64::SPLICE_ZPZ_S:
case AArch64::SQADD_ZPmZ_D:
case AArch64::SQADD_ZPmZ_S:
case AArch64::SQDMLALv1i32_indexed:
case AArch64::SQDMLALv1i64_indexed:
case AArch64::SQDMLALv2i32_indexed:
case AArch64::SQDMLALv4i16_indexed:
case AArch64::SQDMLALv4i32_indexed:
case AArch64::SQDMLALv8i16_indexed:
case AArch64::SQDMLSLv1i32_indexed:
case AArch64::SQDMLSLv1i64_indexed:
case AArch64::SQDMLSLv2i32_indexed:
case AArch64::SQDMLSLv4i16_indexed:
case AArch64::SQDMLSLv4i32_indexed:
case AArch64::SQDMLSLv8i16_indexed:
case AArch64::SQRDMLAHi16_indexed:
case AArch64::SQRDMLAHi32_indexed:
case AArch64::SQRDMLAHv2i32_indexed:
case AArch64::SQRDMLAHv4i16_indexed:
case AArch64::SQRDMLAHv4i32_indexed:
case AArch64::SQRDMLAHv8i16_indexed:
case AArch64::SQRDMLSHi16_indexed:
case AArch64::SQRDMLSHi32_indexed:
case AArch64::SQRDMLSHv2i32_indexed:
case AArch64::SQRDMLSHv4i16_indexed:
case AArch64::SQRDMLSHv4i32_indexed:
case AArch64::SQRDMLSHv8i16_indexed:
case AArch64::SQRSHLR_ZPmZ_D:
case AArch64::SQRSHLR_ZPmZ_S:
case AArch64::SQRSHL_ZPmZ_D:
case AArch64::SQRSHL_ZPmZ_S:
case AArch64::SQSHLR_ZPmZ_D:
case AArch64::SQSHLR_ZPmZ_S:
case AArch64::SQSHL_ZPmZ_D:
case AArch64::SQSHL_ZPmZ_S:
case AArch64::SQSUBR_ZPmZ_D:
case AArch64::SQSUBR_ZPmZ_S:
case AArch64::SQSUB_ZPmZ_D:
case AArch64::SQSUB_ZPmZ_S:
case AArch64::SRHADD_ZPmZ_D:
case AArch64::SRHADD_ZPmZ_S:
case AArch64::SRSHLR_ZPmZ_D:
case AArch64::SRSHLR_ZPmZ_S:
case AArch64::SRSHL_ZPmZ_D:
case AArch64::SRSHL_ZPmZ_S:
case AArch64::STGPpost:
case AArch64::STPDpost:
case AArch64::STPQpost:
case AArch64::STPSpost:
case AArch64::STPWpost:
case AArch64::STPXpost:
case AArch64::SUBR_ZPmZ_D:
case AArch64::SUBR_ZPmZ_S:
case AArch64::SUB_ZPmZ_D:
case AArch64::SUB_ZPmZ_S:
case AArch64::SUQADD_ZPmZ_D:
case AArch64::SUQADD_ZPmZ_S:
case AArch64::UABD_ZPmZ_D:
case AArch64::UABD_ZPmZ_S:
case AArch64::UDIVR_ZPmZ_D:
case AArch64::UDIVR_ZPmZ_S:
case AArch64::UDIV_ZPmZ_D:
case AArch64::UDIV_ZPmZ_S:
case AArch64::UHADD_ZPmZ_D:
case AArch64::UHADD_ZPmZ_S:
case AArch64::UHSUBR_ZPmZ_D:
case AArch64::UHSUBR_ZPmZ_S:
case AArch64::UHSUB_ZPmZ_D:
case AArch64::UHSUB_ZPmZ_S:
case AArch64::UMAXP_ZPmZ_D:
case AArch64::UMAXP_ZPmZ_S:
case AArch64::UMAX_ZPmZ_D:
case AArch64::UMAX_ZPmZ_S:
case AArch64::UMINP_ZPmZ_D:
case AArch64::UMINP_ZPmZ_S:
case AArch64::UMIN_ZPmZ_D:
case AArch64::UMIN_ZPmZ_S:
case AArch64::UMLALv2i32_indexed:
case AArch64::UMLALv4i16_indexed:
case AArch64::UMLALv4i32_indexed:
case AArch64::UMLALv8i16_indexed:
case AArch64::UMLSLv2i32_indexed:
case AArch64::UMLSLv4i16_indexed:
case AArch64::UMLSLv4i32_indexed:
case AArch64::UMLSLv8i16_indexed:
case AArch64::UMULH_ZPmZ_D:
case AArch64::UMULH_ZPmZ_S:
case AArch64::UQADD_ZPmZ_D:
case AArch64::UQADD_ZPmZ_S:
case AArch64::UQRSHLR_ZPmZ_D:
case AArch64::UQRSHLR_ZPmZ_S:
case AArch64::UQRSHL_ZPmZ_D:
case AArch64::UQRSHL_ZPmZ_S:
case AArch64::UQSHLR_ZPmZ_D:
case AArch64::UQSHLR_ZPmZ_S:
case AArch64::UQSHL_ZPmZ_D:
case AArch64::UQSHL_ZPmZ_S:
case AArch64::UQSUBR_ZPmZ_D:
case AArch64::UQSUBR_ZPmZ_S:
case AArch64::UQSUB_ZPmZ_D:
case AArch64::UQSUB_ZPmZ_S:
case AArch64::URHADD_ZPmZ_D:
case AArch64::URHADD_ZPmZ_S:
case AArch64::URSHLR_ZPmZ_D:
case AArch64::URSHLR_ZPmZ_S:
case AArch64::URSHL_ZPmZ_D:
case AArch64::URSHL_ZPmZ_S:
case AArch64::USQADD_ZPmZ_D:
case AArch64::USQADD_ZPmZ_S:
return;
break;
case AArch64::BCAX:
case AArch64::CDOT_ZZZI_D:
case AArch64::CMLA_ZZZI_S:
case AArch64::EOR3:
case AArch64::FCADD_ZPmZ_H:
case AArch64::FCMLA_ZPmZZ_H:
case AArch64::FCMLA_ZZZI_S:
case AArch64::LDPDpre:
case AArch64::LDPQpre:
case AArch64::LDPSWpre:
case AArch64::LDPSpre:
case AArch64::LDPWpre:
case AArch64::LDPXpre:
case AArch64::SM3SS1:
case AArch64::SQRDCMLAH_ZZZI_S:
case AArch64::STGPpre:
case AArch64::STPDpre:
case AArch64::STPQpre:
case AArch64::STPSpre:
case AArch64::STPWpre:
case AArch64::STPXpre:
switch (MI->getOpcode()) {
default: llvm_unreachable("Unexpected opcode.");
case AArch64::BCAX:
case AArch64::EOR3:
O << ".16b";
break;
case AArch64::CDOT_ZZZI_D:
case AArch64::CMLA_ZZZI_S:
case AArch64::FCMLA_ZPmZZ_H:
case AArch64::FCMLA_ZZZI_S:
case AArch64::SQRDCMLAH_ZZZI_S:
printComplexRotationOp<90, 0>(MI, 5, STI, O);
break;
case AArch64::FCADD_ZPmZ_H:
printComplexRotationOp<180, 90>(MI, 4, STI, O);
break;
case AArch64::LDPDpre:
case AArch64::LDPQpre:
case AArch64::LDPSWpre:
case AArch64::LDPSpre:
case AArch64::LDPWpre:
case AArch64::LDPXpre:
case AArch64::STGPpre:
case AArch64::STPDpre:
case AArch64::STPQpre:
case AArch64::STPSpre:
case AArch64::STPWpre:
case AArch64::STPXpre:
O << "]!";
break;
case AArch64::SM3SS1:
O << ".4s";
break;
}
return;
break;
case AArch64::FCADD_ZPmZ_D:
case AArch64::FCADD_ZPmZ_S:
case AArch64::FCMLA_ZPmZZ_D:
case AArch64::FCMLA_ZPmZZ_S:
case AArch64::FCMLAv4f16_indexed:
case AArch64::FCMLAv4f32_indexed:
case AArch64::FCMLAv8f16_indexed:
O << ", ";
switch (MI->getOpcode()) {
default: llvm_unreachable("Unexpected opcode.");
case AArch64::FCADD_ZPmZ_D:
case AArch64::FCADD_ZPmZ_S:
printComplexRotationOp<180, 90>(MI, 4, STI, O);
break;
case AArch64::FCMLA_ZPmZZ_D:
case AArch64::FCMLA_ZPmZZ_S:
case AArch64::FCMLAv4f16_indexed:
case AArch64::FCMLAv4f32_indexed:
case AArch64::FCMLAv8f16_indexed:
printComplexRotationOp<90, 0>(MI, 5, STI, O);
break;
}
return;
break;
}
}
/// getRegisterName - This method is automatically generated by tblgen
/// from the register set description. This returns the assembler name
/// for the specified register.
const char *AArch64InstPrinter::
getRegisterName(MCRegister Reg, unsigned AltIdx) {
unsigned RegNo = Reg.id();
assert(RegNo && RegNo < 716 && "Invalid register number!");
static const char AsmStrsNoRegAltName[] = {
/* 0 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0,
/* 13 */ 'P', '9', '_', 'P', '1', '0', 0,
/* 20 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0,
/* 33 */ 'Z', '2', '_', 'Z', '1', '0', 0,
/* 40 */ 'Z', '7', '_', 'Z', '8', '_', 'Z', '9', '_', 'Z', '1', '0', 0,
/* 53 */ 'b', '1', '0', 0,
/* 57 */ 'd', '1', '0', 0,
/* 61 */ 'h', '1', '0', 0,
/* 65 */ 'p', '1', '0', 0,
/* 69 */ 'q', '1', '0', 0,
/* 73 */ 's', '1', '0', 0,
/* 77 */ 'w', '1', '0', 0,
/* 81 */ 'x', '1', '0', 0,
/* 85 */ 'z', '1', '0', 0,
/* 89 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0,
/* 105 */ 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', 0,
/* 121 */ 'Z', '1', '7', '_', 'Z', '1', '8', '_', 'Z', '1', '9', '_', 'Z', '2', '0', 0,
/* 137 */ 'b', '2', '0', 0,
/* 141 */ 'd', '2', '0', 0,
/* 145 */ 'h', '2', '0', 0,
/* 149 */ 'q', '2', '0', 0,
/* 153 */ 's', '2', '0', 0,
/* 157 */ 'w', '2', '0', 0,
/* 161 */ 'x', '2', '0', 0,
/* 165 */ 'z', '2', '0', 0,
/* 169 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0,
/* 185 */ 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', 0,
/* 201 */ 'Z', '2', '2', '_', 'Z', '3', '0', 0,
/* 209 */ 'Z', '1', '8', '_', 'Z', '2', '2', '_', 'Z', '2', '6', '_', 'Z', '3', '0', 0,
/* 225 */ 'Z', '2', '7', '_', 'Z', '2', '8', '_', 'Z', '2', '9', '_', 'Z', '3', '0', 0,
/* 241 */ 'b', '3', '0', 0,
/* 245 */ 'd', '3', '0', 0,
/* 249 */ 'h', '3', '0', 0,
/* 253 */ 'q', '3', '0', 0,
/* 257 */ 's', '3', '0', 0,
/* 261 */ 'w', '3', '0', 0,
/* 265 */ 'x', '3', '0', 0,
/* 269 */ 'z', '3', '0', 0,
/* 273 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', 0,
/* 288 */ 'P', '1', '5', '_', 'P', '0', 0,
/* 295 */ 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', 0,
/* 310 */ 'Z', '2', '9', '_', 'Z', '3', '0', '_', 'Z', '3', '1', '_', 'Z', '0', 0,
/* 325 */ 'b', '0', 0,
/* 328 */ 'd', '0', 0,
/* 331 */ 'h', '0', 0,
/* 334 */ 'p', '0', 0,
/* 337 */ 'q', '0', 0,
/* 340 */ 's', '0', 0,
/* 343 */ 'z', 't', '0', 0,
/* 347 */ 'w', '0', 0,
/* 350 */ 'x', '0', 0,
/* 353 */ 'z', '0', 0,
/* 356 */ 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0,
/* 370 */ 'P', '1', '0', '_', 'P', '1', '1', 0,
/* 378 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0,
/* 392 */ 'W', '1', '0', '_', 'W', '1', '1', 0,
/* 400 */ 'X', '4', '_', 'X', '5', '_', 'X', '6', '_', 'X', '7', '_', 'X', '8', '_', 'X', '9', '_', 'X', '1', '0', '_', 'X', '1', '1', 0,
/* 426 */ 'Z', '8', '_', 'Z', '9', '_', 'Z', '1', '0', '_', 'Z', '1', '1', 0,
/* 440 */ 'Z', '3', '_', 'Z', '1', '1', 0,
/* 447 */ 'b', '1', '1', 0,
/* 451 */ 'd', '1', '1', 0,
/* 455 */ 'h', '1', '1', 0,
/* 459 */ 'p', '1', '1', 0,
/* 463 */ 'q', '1', '1', 0,
/* 467 */ 's', '1', '1', 0,
/* 471 */ 'w', '1', '1', 0,
/* 475 */ 'x', '1', '1', 0,
/* 479 */ 'z', '1', '1', 0,
/* 483 */ 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0,
/* 499 */ 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', 0,
/* 515 */ 'W', '2', '0', '_', 'W', '2', '1', 0,
/* 523 */ 'X', '1', '4', '_', 'X', '1', '5', '_', 'X', '1', '6', '_', 'X', '1', '7', '_', 'X', '1', '8', '_', 'X', '1', '9', '_', 'X', '2', '0', '_', 'X', '2', '1', 0,
/* 555 */ 'Z', '1', '8', '_', 'Z', '1', '9', '_', 'Z', '2', '0', '_', 'Z', '2', '1', 0,
/* 571 */ 'b', '2', '1', 0,
/* 575 */ 'd', '2', '1', 0,
/* 579 */ 'h', '2', '1', 0,
/* 583 */ 'q', '2', '1', 0,
/* 587 */ 's', '2', '1', 0,
/* 591 */ 'w', '2', '1', 0,
/* 595 */ 'x', '2', '1', 0,
/* 599 */ 'z', '2', '1', 0,
/* 603 */ 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0,
/* 619 */ 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', 0,
/* 635 */ 'Z', '2', '8', '_', 'Z', '2', '9', '_', 'Z', '3', '0', '_', 'Z', '3', '1', 0,
/* 651 */ 'Z', '2', '3', '_', 'Z', '3', '1', 0,
/* 659 */ 'Z', '1', '9', '_', 'Z', '2', '3', '_', 'Z', '2', '7', '_', 'Z', '3', '1', 0,
/* 675 */ 'b', '3', '1', 0,
/* 679 */ 'd', '3', '1', 0,
/* 683 */ 'h', '3', '1', 0,
/* 687 */ 'q', '3', '1', 0,
/* 691 */ 's', '3', '1', 0,
/* 695 */ 'z', '3', '1', 0,
/* 699 */ 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', 0,
/* 713 */ 'P', '0', '_', 'P', '1', 0,
/* 719 */ 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', 0,
/* 733 */ 'W', '0', '_', 'W', '1', 0,
/* 739 */ 'X', '0', '_', 'X', '1', 0,
/* 745 */ 'Z', '3', '0', '_', 'Z', '3', '1', '_', 'Z', '0', '_', 'Z', '1', 0,
/* 759 */ 'b', '1', 0,
/* 762 */ 'd', '1', 0,
/* 765 */ 'h', '1', 0,
/* 768 */ 'p', '1', 0,
/* 771 */ 'q', '1', 0,
/* 774 */ 's', '1', 0,
/* 777 */ 'w', '1', 0,
/* 780 */ 'x', '1', 0,
/* 783 */ 'z', '1', 0,
/* 786 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0,
/* 801 */ 'P', '1', '1', '_', 'P', '1', '2', 0,
/* 809 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0,
/* 824 */ 'Z', '9', '_', 'Z', '1', '0', '_', 'Z', '1', '1', '_', 'Z', '1', '2', 0,
/* 839 */ 'Z', '4', '_', 'Z', '1', '2', 0,
/* 846 */ 'Z', '0', '_', 'Z', '4', '_', 'Z', '8', '_', 'Z', '1', '2', 0,
/* 859 */ 'b', '1', '2', 0,
/* 863 */ 'd', '1', '2', 0,
/* 867 */ 'h', '1', '2', 0,
/* 871 */ 'p', '1', '2', 0,
/* 875 */ 'q', '1', '2', 0,
/* 879 */ 's', '1', '2', 0,
/* 883 */ 'w', '1', '2', 0,
/* 887 */ 'x', '1', '2', 0,
/* 891 */ 'z', '1', '2', 0,
/* 895 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0,
/* 911 */ 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', 0,
/* 927 */ 'Z', '1', '9', '_', 'Z', '2', '0', '_', 'Z', '2', '1', '_', 'Z', '2', '2', 0,
/* 943 */ 'b', '2', '2', 0,
/* 947 */ 'd', '2', '2', 0,
/* 951 */ 'h', '2', '2', 0,
/* 955 */ 'q', '2', '2', 0,
/* 959 */ 's', '2', '2', 0,
/* 963 */ 'w', '2', '2', 0,
/* 967 */ 'x', '2', '2', 0,
/* 971 */ 'z', '2', '2', 0,
/* 975 */ 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', '_', 'D', '2', 0,
/* 988 */ 'P', '1', '_', 'P', '2', 0,
/* 994 */ 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', 0,
/* 1007 */ 'Z', '3', '1', '_', 'Z', '0', '_', 'Z', '1', '_', 'Z', '2', 0,
/* 1020 */ 'b', '2', 0,
/* 1023 */ 'd', '2', 0,
/* 1026 */ 'h', '2', 0,
/* 1029 */ 'p', '2', 0,
/* 1032 */ 'q', '2', 0,
/* 1035 */ 's', '2', 0,
/* 1038 */ 'w', '2', 0,
/* 1041 */ 'x', '2', 0,
/* 1044 */ 'z', '2', 0,
/* 1047 */ 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0,
/* 1063 */ 'P', '1', '2', '_', 'P', '1', '3', 0,
/* 1071 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0,
/* 1087 */ 'W', '1', '2', '_', 'W', '1', '3', 0,
/* 1095 */ 'X', '6', '_', 'X', '7', '_', 'X', '8', '_', 'X', '9', '_', 'X', '1', '0', '_', 'X', '1', '1', '_', 'X', '1', '2', '_', 'X', '1', '3', 0,
/* 1123 */ 'Z', '1', '0', '_', 'Z', '1', '1', '_', 'Z', '1', '2', '_', 'Z', '1', '3', 0,
/* 1139 */ 'Z', '5', '_', 'Z', '1', '3', 0,
/* 1146 */ 'Z', '1', '_', 'Z', '5', '_', 'Z', '9', '_', 'Z', '1', '3', 0,
/* 1159 */ 'b', '1', '3', 0,
/* 1163 */ 'd', '1', '3', 0,
/* 1167 */ 'h', '1', '3', 0,
/* 1171 */ 'p', '1', '3', 0,
/* 1175 */ 'q', '1', '3', 0,
/* 1179 */ 's', '1', '3', 0,
/* 1183 */ 'w', '1', '3', 0,
/* 1187 */ 'x', '1', '3', 0,
/* 1191 */ 'z', '1', '3', 0,
/* 1195 */ 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0,
/* 1211 */ 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', 0,
/* 1227 */ 'W', '2', '2', '_', 'W', '2', '3', 0,
/* 1235 */ 'X', '1', '6', '_', 'X', '1', '7', '_', 'X', '1', '8', '_', 'X', '1', '9', '_', 'X', '2', '0', '_', 'X', '2', '1', '_', 'X', '2', '2', '_', 'X', '2', '3', 0,
/* 1267 */ 'Z', '2', '0', '_', 'Z', '2', '1', '_', 'Z', '2', '2', '_', 'Z', '2', '3', 0,
/* 1283 */ 'b', '2', '3', 0,
/* 1287 */ 'd', '2', '3', 0,
/* 1291 */ 'h', '2', '3', 0,
/* 1295 */ 'q', '2', '3', 0,
/* 1299 */ 's', '2', '3', 0,
/* 1303 */ 'w', '2', '3', 0,
/* 1307 */ 'x', '2', '3', 0,
/* 1311 */ 'z', '2', '3', 0,
/* 1315 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', '_', 'D', '3', 0,
/* 1327 */ 'P', '2', '_', 'P', '3', 0,
/* 1333 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0,
/* 1345 */ 'W', '2', '_', 'W', '3', 0,
/* 1351 */ 'X', '2', '_', 'X', '3', 0,
/* 1357 */ 'Z', '0', '_', 'Z', '1', '_', 'Z', '2', '_', 'Z', '3', 0,
/* 1369 */ 'b', '3', 0,
/* 1372 */ 'd', '3', 0,
/* 1375 */ 'h', '3', 0,
/* 1378 */ 'p', '3', 0,
/* 1381 */ 'q', '3', 0,
/* 1384 */ 's', '3', 0,
/* 1387 */ 'w', '3', 0,
/* 1390 */ 'x', '3', 0,
/* 1393 */ 'z', '3', 0,
/* 1396 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0,
/* 1412 */ 'P', '1', '3', '_', 'P', '1', '4', 0,
/* 1420 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0,
/* 1436 */ 'Z', '2', '_', 'Z', '6', '_', 'Z', '1', '0', '_', 'Z', '1', '4', 0,
/* 1450 */ 'Z', '1', '1', '_', 'Z', '1', '2', '_', 'Z', '1', '3', '_', 'Z', '1', '4', 0,
/* 1466 */ 'Z', '6', '_', 'Z', '1', '4', 0,
/* 1473 */ 'b', '1', '4', 0,
/* 1477 */ 'd', '1', '4', 0,
/* 1481 */ 'h', '1', '4', 0,
/* 1485 */ 'p', '1', '4', 0,
/* 1489 */ 'q', '1', '4', 0,
/* 1493 */ 's', '1', '4', 0,
/* 1497 */ 'w', '1', '4', 0,
/* 1501 */ 'x', '1', '4', 0,
/* 1505 */ 'z', '1', '4', 0,
/* 1509 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0,
/* 1525 */ 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', 0,
/* 1541 */ 'Z', '2', '1', '_', 'Z', '2', '2', '_', 'Z', '2', '3', '_', 'Z', '2', '4', 0,
/* 1557 */ 'Z', '1', '6', '_', 'Z', '2', '4', 0,
/* 1565 */ 'b', '2', '4', 0,
/* 1569 */ 'd', '2', '4', 0,
/* 1573 */ 'h', '2', '4', 0,
/* 1577 */ 'q', '2', '4', 0,
/* 1581 */ 's', '2', '4', 0,
/* 1585 */ 'w', '2', '4', 0,
/* 1589 */ 'x', '2', '4', 0,
/* 1593 */ 'z', '2', '4', 0,
/* 1597 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0,
/* 1609 */ 'P', '3', '_', 'P', '4', 0,
/* 1615 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0,
/* 1627 */ 'Z', '1', '_', 'Z', '2', '_', 'Z', '3', '_', 'Z', '4', 0,
/* 1639 */ 'b', '4', 0,
/* 1642 */ 'd', '4', 0,
/* 1645 */ 'h', '4', 0,
/* 1648 */ 'p', '4', 0,
/* 1651 */ 'q', '4', 0,
/* 1654 */ 's', '4', 0,
/* 1657 */ 'w', '4', 0,
/* 1660 */ 'x', '4', 0,
/* 1663 */ 'z', '4', 0,
/* 1666 */ 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0,
/* 1682 */ 'P', '1', '4', '_', 'P', '1', '5', 0,
/* 1690 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0,
/* 1706 */ 'W', '1', '4', '_', 'W', '1', '5', 0,
/* 1714 */ 'X', '8', '_', 'X', '9', '_', 'X', '1', '0', '_', 'X', '1', '1', '_', 'X', '1', '2', '_', 'X', '1', '3', '_', 'X', '1', '4', '_', 'X', '1', '5', 0,
/* 1744 */ 'Z', '3', '_', 'Z', '7', '_', 'Z', '1', '1', '_', 'Z', '1', '5', 0,
/* 1758 */ 'Z', '1', '2', '_', 'Z', '1', '3', '_', 'Z', '1', '4', '_', 'Z', '1', '5', 0,
/* 1774 */ 'Z', '7', '_', 'Z', '1', '5', 0,
/* 1781 */ 'b', '1', '5', 0,
/* 1785 */ 'd', '1', '5', 0,
/* 1789 */ 'h', '1', '5', 0,
/* 1793 */ 'p', '1', '5', 0,
/* 1797 */ 'q', '1', '5', 0,
/* 1801 */ 's', '1', '5', 0,
/* 1805 */ 'w', '1', '5', 0,
/* 1809 */ 'x', '1', '5', 0,
/* 1813 */ 'z', '1', '5', 0,
/* 1817 */ 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0,
/* 1833 */ 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', 0,
/* 1849 */ 'W', '2', '4', '_', 'W', '2', '5', 0,
/* 1857 */ 'X', '1', '8', '_', 'X', '1', '9', '_', 'X', '2', '0', '_', 'X', '2', '1', '_', 'X', '2', '2', '_', 'X', '2', '3', '_', 'X', '2', '4', '_', 'X', '2', '5', 0,
/* 1889 */ 'Z', '2', '2', '_', 'Z', '2', '3', '_', 'Z', '2', '4', '_', 'Z', '2', '5', 0,
/* 1905 */ 'Z', '1', '7', '_', 'Z', '2', '5', 0,
/* 1913 */ 'b', '2', '5', 0,
/* 1917 */ 'd', '2', '5', 0,
/* 1921 */ 'h', '2', '5', 0,
/* 1925 */ 'q', '2', '5', 0,
/* 1929 */ 's', '2', '5', 0,
/* 1933 */ 'w', '2', '5', 0,
/* 1937 */ 'x', '2', '5', 0,
/* 1941 */ 'z', '2', '5', 0,
/* 1945 */ 'D', '2', '_', 'D', '3', '_', 'D', '4', '_', 'D', '5', 0,
/* 1957 */ 'P', '4', '_', 'P', '5', 0,
/* 1963 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0,
/* 1975 */ 'W', '4', '_', 'W', '5', 0,
/* 1981 */ 'X', '4', '_', 'X', '5', 0,
/* 1987 */ 'Z', '2', '_', 'Z', '3', '_', 'Z', '4', '_', 'Z', '5', 0,
/* 1999 */ 'b', '5', 0,
/* 2002 */ 'd', '5', 0,
/* 2005 */ 'h', '5', 0,
/* 2008 */ 'p', '5', 0,
/* 2011 */ 'q', '5', 0,
/* 2014 */ 's', '5', 0,
/* 2017 */ 'w', '5', 0,
/* 2020 */ 'x', '5', 0,
/* 2023 */ 'z', '5', 0,
/* 2026 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0,
/* 2042 */ 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', 0,
/* 2058 */ 'Z', '1', '3', '_', 'Z', '1', '4', '_', 'Z', '1', '5', '_', 'Z', '1', '6', 0,
/* 2074 */ 'b', '1', '6', 0,
/* 2078 */ 'd', '1', '6', 0,
/* 2082 */ 'h', '1', '6', 0,
/* 2086 */ 'q', '1', '6', 0,
/* 2090 */ 's', '1', '6', 0,
/* 2094 */ 'w', '1', '6', 0,
/* 2098 */ 'x', '1', '6', 0,
/* 2102 */ 'z', '1', '6', 0,
/* 2106 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0,
/* 2122 */ 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', 0,
/* 2138 */ 'Z', '2', '3', '_', 'Z', '2', '4', '_', 'Z', '2', '5', '_', 'Z', '2', '6', 0,
/* 2154 */ 'Z', '1', '8', '_', 'Z', '2', '6', 0,
/* 2162 */ 'b', '2', '6', 0,
/* 2166 */ 'd', '2', '6', 0,
/* 2170 */ 'h', '2', '6', 0,
/* 2174 */ 'q', '2', '6', 0,
/* 2178 */ 's', '2', '6', 0,
/* 2182 */ 'w', '2', '6', 0,
/* 2186 */ 'x', '2', '6', 0,
/* 2190 */ 'z', '2', '6', 0,
/* 2194 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0,
/* 2206 */ 'P', '5', '_', 'P', '6', 0,
/* 2212 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0,
/* 2224 */ 'Z', '3', '_', 'Z', '4', '_', 'Z', '5', '_', 'Z', '6', 0,
/* 2236 */ 'b', '6', 0,
/* 2239 */ 'd', '6', 0,
/* 2242 */ 'h', '6', 0,
/* 2245 */ 'p', '6', 0,
/* 2248 */ 'q', '6', 0,
/* 2251 */ 's', '6', 0,
/* 2254 */ 'w', '6', 0,
/* 2257 */ 'x', '6', 0,
/* 2260 */ 'z', '6', 0,
/* 2263 */ 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0,
/* 2279 */ 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', 0,
/* 2295 */ 'W', '1', '6', '_', 'W', '1', '7', 0,
/* 2303 */ 'X', '1', '0', '_', 'X', '1', '1', '_', 'X', '1', '2', '_', 'X', '1', '3', '_', 'X', '1', '4', '_', 'X', '1', '5', '_', 'X', '1', '6', '_', 'X', '1', '7', 0,
/* 2335 */ 'Z', '1', '4', '_', 'Z', '1', '5', '_', 'Z', '1', '6', '_', 'Z', '1', '7', 0,
/* 2351 */ 'b', '1', '7', 0,
/* 2355 */ 'd', '1', '7', 0,
/* 2359 */ 'h', '1', '7', 0,
/* 2363 */ 'q', '1', '7', 0,
/* 2367 */ 's', '1', '7', 0,
/* 2371 */ 'w', '1', '7', 0,
/* 2375 */ 'x', '1', '7', 0,
/* 2379 */ 'z', '1', '7', 0,
/* 2383 */ 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0,
/* 2399 */ 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', 0,
/* 2415 */ 'W', '2', '6', '_', 'W', '2', '7', 0,
/* 2423 */ 'X', '2', '0', '_', 'X', '2', '1', '_', 'X', '2', '2', '_', 'X', '2', '3', '_', 'X', '2', '4', '_', 'X', '2', '5', '_', 'X', '2', '6', '_', 'X', '2', '7', 0,
/* 2455 */ 'Z', '2', '4', '_', 'Z', '2', '5', '_', 'Z', '2', '6', '_', 'Z', '2', '7', 0,
/* 2471 */ 'Z', '1', '9', '_', 'Z', '2', '7', 0,
/* 2479 */ 'b', '2', '7', 0,
/* 2483 */ 'd', '2', '7', 0,
/* 2487 */ 'h', '2', '7', 0,
/* 2491 */ 'q', '2', '7', 0,
/* 2495 */ 's', '2', '7', 0,
/* 2499 */ 'w', '2', '7', 0,
/* 2503 */ 'x', '2', '7', 0,
/* 2507 */ 'z', '2', '7', 0,
/* 2511 */ 'D', '4', '_', 'D', '5', '_', 'D', '6', '_', 'D', '7', 0,
/* 2523 */ 'P', '6', '_', 'P', '7', 0,
/* 2529 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0,
/* 2541 */ 'W', '6', '_', 'W', '7', 0,
/* 2547 */ 'X', '0', '_', 'X', '1', '_', 'X', '2', '_', 'X', '3', '_', 'X', '4', '_', 'X', '5', '_', 'X', '6', '_', 'X', '7', 0,
/* 2571 */ 'Z', '4', '_', 'Z', '5', '_', 'Z', '6', '_', 'Z', '7', 0,
/* 2583 */ 'b', '7', 0,
/* 2586 */ 'd', '7', 0,
/* 2589 */ 'h', '7', 0,
/* 2592 */ 'p', '7', 0,
/* 2595 */ 'q', '7', 0,
/* 2598 */ 's', '7', 0,
/* 2601 */ 'w', '7', 0,
/* 2604 */ 'x', '7', 0,
/* 2607 */ 'z', '7', 0,
/* 2610 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0,
/* 2626 */ 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', 0,
/* 2642 */ 'Z', '1', '5', '_', 'Z', '1', '6', '_', 'Z', '1', '7', '_', 'Z', '1', '8', 0,
/* 2658 */ 'b', '1', '8', 0,
/* 2662 */ 'd', '1', '8', 0,
/* 2666 */ 'h', '1', '8', 0,
/* 2670 */ 'q', '1', '8', 0,
/* 2674 */ 's', '1', '8', 0,
/* 2678 */ 'w', '1', '8', 0,
/* 2682 */ 'x', '1', '8', 0,
/* 2686 */ 'z', '1', '8', 0,
/* 2690 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0,
/* 2706 */ 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', 0,
/* 2722 */ 'Z', '2', '0', '_', 'Z', '2', '8', 0,
/* 2730 */ 'Z', '1', '6', '_', 'Z', '2', '0', '_', 'Z', '2', '4', '_', 'Z', '2', '8', 0,
/* 2746 */ 'Z', '2', '5', '_', 'Z', '2', '6', '_', 'Z', '2', '7', '_', 'Z', '2', '8', 0,
/* 2762 */ 'b', '2', '8', 0,
/* 2766 */ 'd', '2', '8', 0,
/* 2770 */ 'h', '2', '8', 0,
/* 2774 */ 'q', '2', '8', 0,
/* 2778 */ 's', '2', '8', 0,
/* 2782 */ 'w', '2', '8', 0,
/* 2786 */ 'x', '2', '8', 0,
/* 2790 */ 'z', '2', '8', 0,
/* 2794 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0,
/* 2806 */ 'P', '7', '_', 'P', '8', 0,
/* 2812 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0,
/* 2824 */ 'Z', '0', '_', 'Z', '8', 0,
/* 2830 */ 'Z', '5', '_', 'Z', '6', '_', 'Z', '7', '_', 'Z', '8', 0,
/* 2842 */ 'b', '8', 0,
/* 2845 */ 'd', '8', 0,
/* 2848 */ 'h', '8', 0,
/* 2851 */ 'p', '8', 0,
/* 2854 */ 'q', '8', 0,
/* 2857 */ 's', '8', 0,
/* 2860 */ 'w', '8', 0,
/* 2863 */ 'x', '8', 0,
/* 2866 */ 'z', '8', 0,
/* 2869 */ 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0,
/* 2885 */ 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', 0,
/* 2901 */ 'W', '1', '8', '_', 'W', '1', '9', 0,
/* 2909 */ 'X', '1', '2', '_', 'X', '1', '3', '_', 'X', '1', '4', '_', 'X', '1', '5', '_', 'X', '1', '6', '_', 'X', '1', '7', '_', 'X', '1', '8', '_', 'X', '1', '9', 0,
/* 2941 */ 'Z', '1', '6', '_', 'Z', '1', '7', '_', 'Z', '1', '8', '_', 'Z', '1', '9', 0,
/* 2957 */ 'b', '1', '9', 0,
/* 2961 */ 'd', '1', '9', 0,
/* 2965 */ 'h', '1', '9', 0,
/* 2969 */ 'q', '1', '9', 0,
/* 2973 */ 's', '1', '9', 0,
/* 2977 */ 'w', '1', '9', 0,
/* 2981 */ 'x', '1', '9', 0,
/* 2985 */ 'z', '1', '9', 0,
/* 2989 */ 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0,
/* 3005 */ 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', 0,
/* 3021 */ 'W', '2', '8', '_', 'W', '2', '9', 0,
/* 3029 */ 'Z', '2', '1', '_', 'Z', '2', '9', 0,
/* 3037 */ 'Z', '1', '7', '_', 'Z', '2', '1', '_', 'Z', '2', '5', '_', 'Z', '2', '9', 0,
/* 3053 */ 'Z', '2', '6', '_', 'Z', '2', '7', '_', 'Z', '2', '8', '_', 'Z', '2', '9', 0,
/* 3069 */ 'b', '2', '9', 0,
/* 3073 */ 'd', '2', '9', 0,
/* 3077 */ 'h', '2', '9', 0,
/* 3081 */ 'q', '2', '9', 0,
/* 3085 */ 's', '2', '9', 0,
/* 3089 */ 'w', '2', '9', 0,
/* 3093 */ 'x', '2', '9', 0,
/* 3097 */ 'z', '2', '9', 0,
/* 3101 */ 'D', '6', '_', 'D', '7', '_', 'D', '8', '_', 'D', '9', 0,
/* 3113 */ 'P', '8', '_', 'P', '9', 0,
/* 3119 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0,
/* 3131 */ 'W', '8', '_', 'W', '9', 0,
/* 3137 */ 'X', '2', '_', 'X', '3', '_', 'X', '4', '_', 'X', '5', '_', 'X', '6', '_', 'X', '7', '_', 'X', '8', '_', 'X', '9', 0,
/* 3161 */ 'Z', '1', '_', 'Z', '9', 0,
/* 3167 */ 'Z', '6', '_', 'Z', '7', '_', 'Z', '8', '_', 'Z', '9', 0,
/* 3179 */ 'b', '9', 0,
/* 3182 */ 'd', '9', 0,
/* 3185 */ 'h', '9', 0,
/* 3188 */ 'p', '9', 0,
/* 3191 */ 'q', '9', 0,
/* 3194 */ 's', '9', 0,
/* 3197 */ 'w', '9', 0,
/* 3200 */ 'x', '9', 0,
/* 3203 */ 'z', '9', 0,
/* 3206 */ 'X', '2', '2', '_', 'X', '2', '3', '_', 'X', '2', '4', '_', 'X', '2', '5', '_', 'X', '2', '6', '_', 'X', '2', '7', '_', 'X', '2', '8', '_', 'F', 'P', 0,
/* 3237 */ 'W', '3', '0', '_', 'W', 'Z', 'R', 0,
/* 3245 */ 'L', 'R', '_', 'X', 'Z', 'R', 0,
/* 3252 */ 'z', 'a', 0,
/* 3255 */ 'z', 'a', '0', '.', 'b', 0,
/* 3261 */ 'z', 'a', '0', '.', 'd', 0,
/* 3267 */ 'z', 'a', '1', '.', 'd', 0,
/* 3273 */ 'z', 'a', '2', '.', 'd', 0,
/* 3279 */ 'z', 'a', '3', '.', 'd', 0,
/* 3285 */ 'z', 'a', '4', '.', 'd', 0,
/* 3291 */ 'z', 'a', '5', '.', 'd', 0,
/* 3297 */ 'z', 'a', '6', '.', 'd', 0,
/* 3303 */ 'z', 'a', '7', '.', 'd', 0,
/* 3309 */ 'v', 'g', 0,
/* 3312 */ 'z', 'a', '0', '.', 'h', 0,
/* 3318 */ 'z', 'a', '1', '.', 'h', 0,
/* 3324 */ 'z', '1', '0', '_', 'h', 'i', 0,
/* 3331 */ 'z', '2', '0', '_', 'h', 'i', 0,
/* 3338 */ 'z', '3', '0', '_', 'h', 'i', 0,
/* 3345 */ 'z', '0', '_', 'h', 'i', 0,
/* 3351 */ 'z', '1', '1', '_', 'h', 'i', 0,
/* 3358 */ 'z', '2', '1', '_', 'h', 'i', 0,
/* 3365 */ 'z', '3', '1', '_', 'h', 'i', 0,
/* 3372 */ 'z', '1', '_', 'h', 'i', 0,
/* 3378 */ 'z', '1', '2', '_', 'h', 'i', 0,
/* 3385 */ 'z', '2', '2', '_', 'h', 'i', 0,
/* 3392 */ 'z', '2', '_', 'h', 'i', 0,
/* 3398 */ 'z', '1', '3', '_', 'h', 'i', 0,
/* 3405 */ 'z', '2', '3', '_', 'h', 'i', 0,
/* 3412 */ 'z', '3', '_', 'h', 'i', 0,
/* 3418 */ 'z', '1', '4', '_', 'h', 'i', 0,
/* 3425 */ 'z', '2', '4', '_', 'h', 'i', 0,
/* 3432 */ 'z', '4', '_', 'h', 'i', 0,
/* 3438 */ 'z', '1', '5', '_', 'h', 'i', 0,
/* 3445 */ 'z', '2', '5', '_', 'h', 'i', 0,
/* 3452 */ 'z', '5', '_', 'h', 'i', 0,
/* 3458 */ 'z', '1', '6', '_', 'h', 'i', 0,
/* 3465 */ 'z', '2', '6', '_', 'h', 'i', 0,
/* 3472 */ 'z', '6', '_', 'h', 'i', 0,
/* 3478 */ 'z', '1', '7', '_', 'h', 'i', 0,
/* 3485 */ 'z', '2', '7', '_', 'h', 'i', 0,
/* 3492 */ 'z', '7', '_', 'h', 'i', 0,
/* 3498 */ 'z', '1', '8', '_', 'h', 'i', 0,
/* 3505 */ 'z', '2', '8', '_', 'h', 'i', 0,
/* 3512 */ 'z', '8', '_', 'h', 'i', 0,
/* 3518 */ 'z', '1', '9', '_', 'h', 'i', 0,
/* 3525 */ 'z', '2', '9', '_', 'h', 'i', 0,
/* 3532 */ 'z', '9', '_', 'h', 'i', 0,
/* 3538 */ 'w', 's', 'p', 0,
/* 3542 */ 'z', 'a', '1', '0', '.', 'q', 0,
/* 3549 */ 'z', 'a', '0', '.', 'q', 0,
/* 3555 */ 'z', 'a', '1', '1', '.', 'q', 0,
/* 3562 */ 'z', 'a', '1', '.', 'q', 0,
/* 3568 */ 'z', 'a', '1', '2', '.', 'q', 0,
/* 3575 */ 'z', 'a', '2', '.', 'q', 0,
/* 3581 */ 'z', 'a', '1', '3', '.', 'q', 0,
/* 3588 */ 'z', 'a', '3', '.', 'q', 0,
/* 3594 */ 'z', 'a', '1', '4', '.', 'q', 0,
/* 3601 */ 'z', 'a', '4', '.', 'q', 0,
/* 3607 */ 'z', 'a', '1', '5', '.', 'q', 0,
/* 3614 */ 'z', 'a', '5', '.', 'q', 0,
/* 3620 */ 'z', 'a', '6', '.', 'q', 0,
/* 3626 */ 'z', 'a', '7', '.', 'q', 0,
/* 3632 */ 'z', 'a', '8', '.', 'q', 0,
/* 3638 */ 'z', 'a', '9', '.', 'q', 0,
/* 3644 */ 'f', 'p', 'c', 'r', 0,
/* 3649 */ 'f', 'f', 'r', 0,
/* 3653 */ 'w', 'z', 'r', 0,
/* 3657 */ 'x', 'z', 'r', 0,
/* 3661 */ 'z', 'a', '0', '.', 's', 0,
/* 3667 */ 'z', 'a', '1', '.', 's', 0,
/* 3673 */ 'z', 'a', '2', '.', 's', 0,
/* 3679 */ 'z', 'a', '3', '.', 's', 0,
/* 3685 */ 'n', 'z', 'c', 'v', 0,
0
};
static const uint16_t RegAsmOffsetNoRegAltName[] = {
3649, 3093, 3644, 265, 3685, 3539, 3309, 3538, 3653, 3657, 3252, 325, 759, 1020,
1369, 1639, 1999, 2236, 2583, 2842, 3179, 53, 447, 859, 1159, 1473, 1781, 2074,
2351, 2658, 2957, 137, 571, 943, 1283, 1565, 1913, 2162, 2479, 2762, 3069, 241,
675, 328, 762, 1023, 1372, 1642, 2002, 2239, 2586, 2845, 3182, 57, 451, 863,
1163, 1477, 1785, 2078, 2355, 2662, 2961, 141, 575, 947, 1287, 1569, 1917, 2166,
2483, 2766, 3073, 245, 679, 331, 765, 1026, 1375, 1645, 2005, 2242, 2589, 2848,
3185, 61, 455, 867, 1167, 1481, 1789, 2082, 2359, 2666, 2965, 145, 579, 951,
1291, 1573, 1921, 2170, 2487, 2770, 3077, 249, 683, 334, 768, 1029, 1378, 1648,
2008, 2245, 2592, 2851, 3188, 65, 459, 871, 1171, 1485, 1793, 337, 771, 1032,
1381, 1651, 2011, 2248, 2595, 2854, 3191, 69, 463, 875, 1175, 1489, 1797, 2086,
2363, 2670, 2969, 149, 583, 955, 1295, 1577, 1925, 2174, 2491, 2774, 3081, 253,
687, 340, 774, 1035, 1384, 1654, 2014, 2251, 2598, 2857, 3194, 73, 467, 879,
1179, 1493, 1801, 2090, 2367, 2674, 2973, 153, 587, 959, 1299, 1581, 1929, 2178,
2495, 2778, 3085, 257, 691, 347, 777, 1038, 1387, 1657, 2017, 2254, 2601, 2860,
3197, 77, 471, 883, 1183, 1497, 1805, 2094, 2371, 2678, 2977, 157, 591, 963,
1303, 1585, 1933, 2182, 2499, 2782, 3089, 261, 350, 780, 1041, 1390, 1660, 2020,
2257, 2604, 2863, 3200, 81, 475, 887, 1187, 1501, 1809, 2098, 2375, 2682, 2981,
161, 595, 967, 1307, 1589, 1937, 2186, 2503, 2786, 353, 783, 1044, 1393, 1663,
2023, 2260, 2607, 2866, 3203, 85, 479, 891, 1191, 1505, 1813, 2102, 2379, 2686,
2985, 165, 599, 971, 1311, 1593, 1941, 2190, 2507, 2790, 3097, 269, 695, 3255,
3261, 3267, 3273, 3279, 3285, 3291, 3297, 3303, 3312, 3318, 3549, 3562, 3575, 3588,
3601, 3614, 3620, 3626, 3632, 3638, 3542, 3555, 3568, 3581, 3594, 3607, 3661, 3667,
3673, 3679, 343, 3345, 3372, 3392, 3412, 3432, 3452, 3472, 3492, 3512, 3532, 3324,
3351, 3378, 3398, 3418, 3438, 3458, 3478, 3498, 3518, 3331, 3358, 3385, 3405, 3425,
3445, 3465, 3485, 3505, 3525, 3338, 3365, 707, 982, 1321, 1603, 1951, 2200, 2517,
2800, 3107, 6, 362, 793, 1055, 1404, 1674, 2034, 2271, 2618, 2877, 97, 491,
903, 1203, 1517, 1825, 2114, 2391, 2698, 2997, 177, 611, 281, 1315, 1597, 1945,
2194, 2511, 2794, 3101, 0, 356, 786, 1047, 1396, 1666, 2026, 2263, 2610, 2869,
89, 483, 895, 1195, 1509, 1817, 2106, 2383, 2690, 2989, 169, 603, 273, 699,
975, 979, 1318, 1600, 1948, 2197, 2514, 2797, 3104, 3, 359, 789, 1051, 1400,
1670, 2030, 2267, 2614, 2873, 93, 487, 899, 1199, 1513, 1821, 2110, 2387, 2694,
2993, 173, 607, 277, 703, 713, 988, 1327, 1609, 1957, 2206, 2523, 2806, 3113,
13, 370, 801, 1063, 1412, 1682, 288, 727, 1001, 1339, 1621, 1969, 2218, 2535,
2818, 3125, 26, 384, 816, 1079, 1428, 1698, 2050, 2287, 2634, 2893, 113, 507,
919, 1219, 1533, 1841, 2130, 2407, 2714, 3013, 193, 627, 303, 1333, 1615, 1963,
2212, 2529, 2812, 3119, 20, 378, 809, 1071, 1420, 1690, 2042, 2279, 2626, 2885,
105, 499, 911, 1211, 1525, 1833, 2122, 2399, 2706, 3005, 185, 619, 295, 719,
994, 998, 1336, 1618, 1966, 2215, 2532, 2815, 3122, 23, 381, 812, 1075, 1424,
1694, 2046, 2283, 2630, 2889, 109, 503, 915, 1215, 1529, 1837, 2126, 2403, 2710,
3009, 189, 623, 299, 723, 3206, 2547, 3137, 400, 1095, 1714, 2303, 2909, 523,
1235, 1857, 2423, 3237, 733, 1345, 1975, 2541, 3131, 392, 1087, 1706, 2295, 2901,
515, 1227, 1849, 2415, 3021, 3245, 3230, 739, 1351, 1981, 2565, 3155, 418, 1115,
1736, 2327, 2933, 547, 1259, 1881, 2447, 753, 1014, 1363, 1633, 1993, 2230, 2577,
2836, 3173, 46, 432, 831, 1131, 1458, 1766, 2066, 2343, 2650, 2949, 129, 563,
935, 1275, 1549, 1897, 2146, 2463, 2754, 3061, 233, 643, 318, 1357, 1627, 1987,
2224, 2571, 2830, 3167, 40, 426, 824, 1123, 1450, 1758, 2058, 2335, 2642, 2941,
121, 555, 927, 1267, 1541, 1889, 2138, 2455, 2746, 3053, 225, 635, 310, 745,
1007, 1011, 1360, 1630, 1990, 2227, 2574, 2833, 3170, 43, 429, 827, 1127, 1454,
1762, 2062, 2339, 2646, 2945, 125, 559, 931, 1271, 1545, 1893, 2142, 2459, 2750,
3057, 229, 639, 314, 749, 1557, 1905, 2154, 2471, 2722, 3029, 201, 651, 2824,
3161, 33, 440, 839, 1139, 1466, 1774, 2730, 3037, 209, 659, 846, 1146, 1436,
1744,
};
static const char AsmStrsvlist1[] = {
/* 0 */ 0,
0
};
static const uint8_t RegAsmOffsetvlist1[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0,
};
static const char AsmStrsvreg[] = {
/* 0 */ 'v', '1', '0', 0,
/* 4 */ 'v', '2', '0', 0,
/* 8 */ 'v', '3', '0', 0,
/* 12 */ 'v', '0', 0,
/* 15 */ 'v', '1', '1', 0,
/* 19 */ 'v', '2', '1', 0,
/* 23 */ 'v', '3', '1', 0,
/* 27 */ 'v', '1', 0,
/* 30 */ 'v', '1', '2', 0,
/* 34 */ 'v', '2', '2', 0,
/* 38 */ 'v', '2', 0,
/* 41 */ 'v', '1', '3', 0,
/* 45 */ 'v', '2', '3', 0,
/* 49 */ 'v', '3', 0,
/* 52 */ 'v', '1', '4', 0,
/* 56 */ 'v', '2', '4', 0,
/* 60 */ 'v', '4', 0,
/* 63 */ 'v', '1', '5', 0,
/* 67 */ 'v', '2', '5', 0,
/* 71 */ 'v', '5', 0,
/* 74 */ 'v', '1', '6', 0,
/* 78 */ 'v', '2', '6', 0,
/* 82 */ 'v', '6', 0,
/* 85 */ 'v', '1', '7', 0,
/* 89 */ 'v', '2', '7', 0,
/* 93 */ 'v', '7', 0,
/* 96 */ 'v', '1', '8', 0,
/* 100 */ 'v', '2', '8', 0,
/* 104 */ 'v', '8', 0,
/* 107 */ 'v', '1', '9', 0,
/* 111 */ 'v', '2', '9', 0,
/* 115 */ 'v', '9', 0,
0
};
static const uint8_t RegAsmOffsetvreg[] = {
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30,
41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78,
89, 100, 111, 8, 23, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38,
49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74,
85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8,
23, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82,
93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4,
19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38,
49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74,
85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8,
23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30,
41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78,
89, 100, 111, 8, 23, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82,
93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4,
19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38,
49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74,
85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8,
23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30,
41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78,
89, 100, 111, 8, 23, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
3,
};
switch(AltIdx) {
default: llvm_unreachable("Invalid register alt name index!");
case AArch64::NoRegAltName:
assert(*(AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[RegNo-1]) &&
"Invalid alt name index for register!");
return AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[RegNo-1];
case AArch64::vlist1:
assert(*(AsmStrsvlist1+RegAsmOffsetvlist1[RegNo-1]) &&
"Invalid alt name index for register!");
return AsmStrsvlist1+RegAsmOffsetvlist1[RegNo-1];
case AArch64::vreg:
assert(*(AsmStrsvreg+RegAsmOffsetvreg[RegNo-1]) &&
"Invalid alt name index for register!");
return AsmStrsvreg+RegAsmOffsetvreg[RegNo-1];
}
}
#ifdef PRINT_ALIAS_INSTR
#undef PRINT_ALIAS_INSTR
static bool AArch64InstPrinterValidateMCOperand(const MCOperand &MCOp,
const MCSubtargetInfo &STI,
unsigned PredicateIndex);
bool AArch64InstPrinter::printAliasInstr(const MCInst *MI, uint64_t Address, const MCSubtargetInfo &STI, raw_ostream &OS) {
static const PatternsForOpcode OpToPatterns[] = {
{AArch64::ADDSWri, 0, 1 },
{AArch64::ADDSWrs, 1, 3 },
{AArch64::ADDSWrx, 4, 3 },
{AArch64::ADDSXri, 7, 1 },
{AArch64::ADDSXrs, 8, 3 },
{AArch64::ADDSXrx, 11, 1 },
{AArch64::ADDSXrx64, 12, 3 },
{AArch64::ADDWri, 15, 2 },
{AArch64::ADDWrs, 17, 1 },
{AArch64::ADDWrx, 18, 2 },
{AArch64::ADDXri, 20, 2 },
{AArch64::ADDXrs, 22, 1 },
{AArch64::ADDXrx64, 23, 2 },
{AArch64::ANDSWri, 25, 1 },
{AArch64::ANDSWrs, 26, 3 },
{AArch64::ANDSXri, 29, 1 },
{AArch64::ANDSXrs, 30, 3 },
{AArch64::ANDS_PPzPP, 33, 1 },
{AArch64::ANDWrs, 34, 1 },
{AArch64::ANDXrs, 35, 1 },
{AArch64::AND_PPzPP, 36, 1 },
{AArch64::AND_ZI, 37, 3 },
{AArch64::AUTIA1716, 40, 1 },
{AArch64::AUTIASP, 41, 1 },
{AArch64::AUTIAZ, 42, 1 },
{AArch64::AUTIB1716, 43, 1 },
{AArch64::AUTIBSP, 44, 1 },
{AArch64::AUTIBZ, 45, 1 },
{AArch64::BICSWrs, 46, 1 },
{AArch64::BICSXrs, 47, 1 },
{AArch64::BICWrs, 48, 1 },
{AArch64::BICXrs, 49, 1 },
{AArch64::CLREX, 50, 1 },
{AArch64::CNTB_XPiI, 51, 2 },
{AArch64::CNTD_XPiI, 53, 2 },
{AArch64::CNTH_XPiI, 55, 2 },
{AArch64::CNTW_XPiI, 57, 2 },
{AArch64::CPY_ZPmI_B, 59, 1 },
{AArch64::CPY_ZPmI_D, 60, 1 },
{AArch64::CPY_ZPmI_H, 61, 1 },
{AArch64::CPY_ZPmI_S, 62, 1 },
{AArch64::CPY_ZPmR_B, 63, 1 },
{AArch64::CPY_ZPmR_D, 64, 1 },
{AArch64::CPY_ZPmR_H, 65, 1 },
{AArch64::CPY_ZPmR_S, 66, 1 },
{AArch64::CPY_ZPmV_B, 67, 1 },
{AArch64::CPY_ZPmV_D, 68, 1 },
{AArch64::CPY_ZPmV_H, 69, 1 },
{AArch64::CPY_ZPmV_S, 70, 1 },
{AArch64::CPY_ZPzI_B, 71, 1 },
{AArch64::CPY_ZPzI_D, 72, 1 },
{AArch64::CPY_ZPzI_H, 73, 1 },
{AArch64::CPY_ZPzI_S, 74, 1 },
{AArch64::CSINCWr, 75, 2 },
{AArch64::CSINCXr, 77, 2 },
{AArch64::CSINVWr, 79, 2 },
{AArch64::CSINVXr, 81, 2 },
{AArch64::CSNEGWr, 83, 1 },
{AArch64::CSNEGXr, 84, 1 },
{AArch64::DCPS1, 85, 1 },
{AArch64::DCPS2, 86, 1 },
{AArch64::DCPS3, 87, 1 },
{AArch64::DECB_XPiI, 88, 2 },
{AArch64::DECD_XPiI, 90, 2 },
{AArch64::DECD_ZPiI, 92, 2 },
{AArch64::DECH_XPiI, 94, 2 },
{AArch64::DECH_ZPiI, 96, 2 },
{AArch64::DECW_XPiI, 98, 2 },
{AArch64::DECW_ZPiI, 100, 2 },
{AArch64::DSB, 102, 3 },
{AArch64::DUPM_ZI, 105, 6 },
{AArch64::DUP_ZI_B, 111, 1 },
{AArch64::DUP_ZI_D, 112, 2 },
{AArch64::DUP_ZI_H, 114, 2 },
{AArch64::DUP_ZI_S, 116, 2 },
{AArch64::DUP_ZR_B, 118, 1 },
{AArch64::DUP_ZR_D, 119, 1 },
{AArch64::DUP_ZR_H, 120, 1 },
{AArch64::DUP_ZR_S, 121, 1 },
{AArch64::DUP_ZZI_B, 122, 2 },
{AArch64::DUP_ZZI_D, 124, 2 },
{AArch64::DUP_ZZI_H, 126, 2 },
{AArch64::DUP_ZZI_Q, 128, 2 },
{AArch64::DUP_ZZI_S, 130, 2 },
{AArch64::EONWrs, 132, 1 },
{AArch64::EONXrs, 133, 1 },
{AArch64::EORS_PPzPP, 134, 1 },
{AArch64::EORWrs, 135, 1 },
{AArch64::EORXrs, 136, 1 },
{AArch64::EOR_PPzPP, 137, 1 },
{AArch64::EOR_ZI, 138, 3 },
{AArch64::EXTRACT_ZPMXI_H_B, 141, 1 },
{AArch64::EXTRACT_ZPMXI_H_D, 142, 1 },
{AArch64::EXTRACT_ZPMXI_H_H, 143, 1 },
{AArch64::EXTRACT_ZPMXI_H_Q, 144, 1 },
{AArch64::EXTRACT_ZPMXI_H_S, 145, 1 },
{AArch64::EXTRACT_ZPMXI_V_B, 146, 1 },
{AArch64::EXTRACT_ZPMXI_V_D, 147, 1 },
{AArch64::EXTRACT_ZPMXI_V_H, 148, 1 },
{AArch64::EXTRACT_ZPMXI_V_Q, 149, 1 },
{AArch64::EXTRACT_ZPMXI_V_S, 150, 1 },
{AArch64::EXTRWrri, 151, 1 },
{AArch64::EXTRXrri, 152, 1 },
{AArch64::FCPY_ZPmI_D, 153, 1 },
{AArch64::FCPY_ZPmI_H, 154, 1 },
{AArch64::FCPY_ZPmI_S, 155, 1 },
{AArch64::FDUP_ZI_D, 156, 1 },
{AArch64::FDUP_ZI_H, 157, 1 },
{AArch64::FDUP_ZI_S, 158, 1 },
{AArch64::GLD1B_D_IMM_REAL, 159, 1 },
{AArch64::GLD1B_S_IMM_REAL, 160, 1 },
{AArch64::GLD1D_IMM_REAL, 161, 1 },
{AArch64::GLD1H_D_IMM_REAL, 162, 1 },
{AArch64::GLD1H_S_IMM_REAL, 163, 1 },
{AArch64::GLD1Q, 164, 1 },
{AArch64::GLD1SB_D_IMM_REAL, 165, 1 },
{AArch64::GLD1SB_S_IMM_REAL, 166, 1 },
{AArch64::GLD1SH_D_IMM_REAL, 167, 1 },
{AArch64::GLD1SH_S_IMM_REAL, 168, 1 },
{AArch64::GLD1SW_D_IMM_REAL, 169, 1 },
{AArch64::GLD1W_D_IMM_REAL, 170, 1 },
{AArch64::GLD1W_IMM_REAL, 171, 1 },
{AArch64::GLDFF1B_D_IMM_REAL, 172, 1 },
{AArch64::GLDFF1B_S_IMM_REAL, 173, 1 },
{AArch64::GLDFF1D_IMM_REAL, 174, 1 },
{AArch64::GLDFF1H_D_IMM_REAL, 175, 1 },
{AArch64::GLDFF1H_S_IMM_REAL, 176, 1 },
{AArch64::GLDFF1SB_D_IMM_REAL, 177, 1 },
{AArch64::GLDFF1SB_S_IMM_REAL, 178, 1 },
{AArch64::GLDFF1SH_D_IMM_REAL, 179, 1 },
{AArch64::GLDFF1SH_S_IMM_REAL, 180, 1 },
{AArch64::GLDFF1SW_D_IMM_REAL, 181, 1 },
{AArch64::GLDFF1W_D_IMM_REAL, 182, 1 },
{AArch64::GLDFF1W_IMM_REAL, 183, 1 },
{AArch64::HINT, 184, 13 },
{AArch64::INCB_XPiI, 197, 2 },
{AArch64::INCD_XPiI, 199, 2 },
{AArch64::INCD_ZPiI, 201, 2 },
{AArch64::INCH_XPiI, 203, 2 },
{AArch64::INCH_ZPiI, 205, 2 },
{AArch64::INCW_XPiI, 207, 2 },
{AArch64::INCW_ZPiI, 209, 2 },
{AArch64::INSERT_MXIPZ_H_B, 211, 1 },
{AArch64::INSERT_MXIPZ_H_D, 212, 1 },
{AArch64::INSERT_MXIPZ_H_H, 213, 1 },
{AArch64::INSERT_MXIPZ_H_Q, 214, 1 },
{AArch64::INSERT_MXIPZ_H_S, 215, 1 },
{AArch64::INSERT_MXIPZ_V_B, 216, 1 },
{AArch64::INSERT_MXIPZ_V_D, 217, 1 },
{AArch64::INSERT_MXIPZ_V_H, 218, 1 },
{AArch64::INSERT_MXIPZ_V_Q, 219, 1 },
{AArch64::INSERT_MXIPZ_V_S, 220, 1 },
{AArch64::INSvi16gpr, 221, 1 },
{AArch64::INSvi16lane, 222, 1 },
{AArch64::INSvi32gpr, 223, 1 },
{AArch64::INSvi32lane, 224, 1 },
{AArch64::INSvi64gpr, 225, 1 },
{AArch64::INSvi64lane, 226, 1 },
{AArch64::INSvi8gpr, 227, 1 },
{AArch64::INSvi8lane, 228, 1 },
{AArch64::IRG, 229, 1 },
{AArch64::ISB, 230, 1 },
{AArch64::LD1B_2Z_IMM, 231, 1 },
{AArch64::LD1B_4Z_IMM, 232, 1 },
{AArch64::LD1B_D_IMM_REAL, 233, 1 },
{AArch64::LD1B_H_IMM_REAL, 234, 1 },
{AArch64::LD1B_IMM_REAL, 235, 1 },
{AArch64::LD1B_S_IMM_REAL, 236, 1 },
{AArch64::LD1B_VG2_M2ZPXI, 237, 1 },
{AArch64::LD1B_VG4_M4ZPXI, 238, 1 },
{AArch64::LD1D_2Z_IMM, 239, 1 },
{AArch64::LD1D_4Z_IMM, 240, 1 },
{AArch64::LD1D_IMM_REAL, 241, 1 },
{AArch64::LD1D_Q_IMM, 242, 1 },
{AArch64::LD1D_VG2_M2ZPXI, 243, 1 },
{AArch64::LD1D_VG4_M4ZPXI, 244, 1 },
{AArch64::LD1Fourv16b_POST, 245, 1 },
{AArch64::LD1Fourv1d_POST, 246, 1 },
{AArch64::LD1Fourv2d_POST, 247, 1 },
{AArch64::LD1Fourv2s_POST, 248, 1 },
{AArch64::LD1Fourv4h_POST, 249, 1 },
{AArch64::LD1Fourv4s_POST, 250, 1 },
{AArch64::LD1Fourv8b_POST, 251, 1 },
{AArch64::LD1Fourv8h_POST, 252, 1 },
{AArch64::LD1H_2Z_IMM, 253, 1 },
{AArch64::LD1H_4Z_IMM, 254, 1 },
{AArch64::LD1H_D_IMM_REAL, 255, 1 },
{AArch64::LD1H_IMM_REAL, 256, 1 },
{AArch64::LD1H_S_IMM_REAL, 257, 1 },
{AArch64::LD1H_VG2_M2ZPXI, 258, 1 },
{AArch64::LD1H_VG4_M4ZPXI, 259, 1 },
{AArch64::LD1Onev16b_POST, 260, 1 },
{AArch64::LD1Onev1d_POST, 261, 1 },
{AArch64::LD1Onev2d_POST, 262, 1 },
{AArch64::LD1Onev2s_POST, 263, 1 },
{AArch64::LD1Onev4h_POST, 264, 1 },
{AArch64::LD1Onev4s_POST, 265, 1 },
{AArch64::LD1Onev8b_POST, 266, 1 },
{AArch64::LD1Onev8h_POST, 267, 1 },
{AArch64::LD1RB_D_IMM, 268, 1 },
{AArch64::LD1RB_H_IMM, 269, 1 },
{AArch64::LD1RB_IMM, 270, 1 },
{AArch64::LD1RB_S_IMM, 271, 1 },
{AArch64::LD1RD_IMM, 272, 1 },
{AArch64::LD1RH_D_IMM, 273, 1 },
{AArch64::LD1RH_IMM, 274, 1 },
{AArch64::LD1RH_S_IMM, 275, 1 },
{AArch64::LD1RO_B_IMM, 276, 1 },
{AArch64::LD1RO_D_IMM, 277, 1 },
{AArch64::LD1RO_H_IMM, 278, 1 },
{AArch64::LD1RO_W_IMM, 279, 1 },
{AArch64::LD1RQ_B_IMM, 280, 1 },
{AArch64::LD1RQ_D_IMM, 281, 1 },
{AArch64::LD1RQ_H_IMM, 282, 1 },
{AArch64::LD1RQ_W_IMM, 283, 1 },
{AArch64::LD1RSB_D_IMM, 284, 1 },
{AArch64::LD1RSB_H_IMM, 285, 1 },
{AArch64::LD1RSB_S_IMM, 286, 1 },
{AArch64::LD1RSH_D_IMM, 287, 1 },
{AArch64::LD1RSH_S_IMM, 288, 1 },
{AArch64::LD1RSW_IMM, 289, 1 },
{AArch64::LD1RW_D_IMM, 290, 1 },
{AArch64::LD1RW_IMM, 291, 1 },
{AArch64::LD1Rv16b_POST, 292, 1 },
{AArch64::LD1Rv1d_POST, 293, 1 },
{AArch64::LD1Rv2d_POST, 294, 1 },
{AArch64::LD1Rv2s_POST, 295, 1 },
{AArch64::LD1Rv4h_POST, 296, 1 },
{AArch64::LD1Rv4s_POST, 297, 1 },
{AArch64::LD1Rv8b_POST, 298, 1 },
{AArch64::LD1Rv8h_POST, 299, 1 },
{AArch64::LD1SB_D_IMM_REAL, 300, 1 },
{AArch64::LD1SB_H_IMM_REAL, 301, 1 },
{AArch64::LD1SB_S_IMM_REAL, 302, 1 },
{AArch64::LD1SH_D_IMM_REAL, 303, 1 },
{AArch64::LD1SH_S_IMM_REAL, 304, 1 },
{AArch64::LD1SW_D_IMM_REAL, 305, 1 },
{AArch64::LD1Threev16b_POST, 306, 1 },
{AArch64::LD1Threev1d_POST, 307, 1 },
{AArch64::LD1Threev2d_POST, 308, 1 },
{AArch64::LD1Threev2s_POST, 309, 1 },
{AArch64::LD1Threev4h_POST, 310, 1 },
{AArch64::LD1Threev4s_POST, 311, 1 },
{AArch64::LD1Threev8b_POST, 312, 1 },
{AArch64::LD1Threev8h_POST, 313, 1 },
{AArch64::LD1Twov16b_POST, 314, 1 },
{AArch64::LD1Twov1d_POST, 315, 1 },
{AArch64::LD1Twov2d_POST, 316, 1 },
{AArch64::LD1Twov2s_POST, 317, 1 },
{AArch64::LD1Twov4h_POST, 318, 1 },
{AArch64::LD1Twov4s_POST, 319, 1 },
{AArch64::LD1Twov8b_POST, 320, 1 },
{AArch64::LD1Twov8h_POST, 321, 1 },
{AArch64::LD1W_2Z_IMM, 322, 1 },
{AArch64::LD1W_4Z_IMM, 323, 1 },
{AArch64::LD1W_D_IMM_REAL, 324, 1 },
{AArch64::LD1W_IMM_REAL, 325, 1 },
{AArch64::LD1W_Q_IMM, 326, 1 },
{AArch64::LD1W_VG2_M2ZPXI, 327, 1 },
{AArch64::LD1W_VG4_M4ZPXI, 328, 1 },
{AArch64::LD1_MXIPXX_H_B, 329, 1 },
{AArch64::LD1_MXIPXX_H_D, 330, 1 },
{AArch64::LD1_MXIPXX_H_H, 331, 1 },
{AArch64::LD1_MXIPXX_H_Q, 332, 1 },
{AArch64::LD1_MXIPXX_H_S, 333, 1 },
{AArch64::LD1_MXIPXX_V_B, 334, 1 },
{AArch64::LD1_MXIPXX_V_D, 335, 1 },
{AArch64::LD1_MXIPXX_V_H, 336, 1 },
{AArch64::LD1_MXIPXX_V_Q, 337, 1 },
{AArch64::LD1_MXIPXX_V_S, 338, 1 },
{AArch64::LD1i16_POST, 339, 1 },
{AArch64::LD1i32_POST, 340, 1 },
{AArch64::LD1i64_POST, 341, 1 },
{AArch64::LD1i8_POST, 342, 1 },
{AArch64::LD2B_IMM, 343, 1 },
{AArch64::LD2D_IMM, 344, 1 },
{AArch64::LD2H_IMM, 345, 1 },
{AArch64::LD2Q_IMM, 346, 1 },
{AArch64::LD2Rv16b_POST, 347, 1 },
{AArch64::LD2Rv1d_POST, 348, 1 },
{AArch64::LD2Rv2d_POST, 349, 1 },
{AArch64::LD2Rv2s_POST, 350, 1 },
{AArch64::LD2Rv4h_POST, 351, 1 },
{AArch64::LD2Rv4s_POST, 352, 1 },
{AArch64::LD2Rv8b_POST, 353, 1 },
{AArch64::LD2Rv8h_POST, 354, 1 },
{AArch64::LD2Twov16b_POST, 355, 1 },
{AArch64::LD2Twov2d_POST, 356, 1 },
{AArch64::LD2Twov2s_POST, 357, 1 },
{AArch64::LD2Twov4h_POST, 358, 1 },
{AArch64::LD2Twov4s_POST, 359, 1 },
{AArch64::LD2Twov8b_POST, 360, 1 },
{AArch64::LD2Twov8h_POST, 361, 1 },
{AArch64::LD2W_IMM, 362, 1 },
{AArch64::LD2i16_POST, 363, 1 },
{AArch64::LD2i32_POST, 364, 1 },
{AArch64::LD2i64_POST, 365, 1 },
{AArch64::LD2i8_POST, 366, 1 },
{AArch64::LD3B_IMM, 367, 1 },
{AArch64::LD3D_IMM, 368, 1 },
{AArch64::LD3H_IMM, 369, 1 },
{AArch64::LD3Q_IMM, 370, 1 },
{AArch64::LD3Rv16b_POST, 371, 1 },
{AArch64::LD3Rv1d_POST, 372, 1 },
{AArch64::LD3Rv2d_POST, 373, 1 },
{AArch64::LD3Rv2s_POST, 374, 1 },
{AArch64::LD3Rv4h_POST, 375, 1 },
{AArch64::LD3Rv4s_POST, 376, 1 },
{AArch64::LD3Rv8b_POST, 377, 1 },
{AArch64::LD3Rv8h_POST, 378, 1 },
{AArch64::LD3Threev16b_POST, 379, 1 },
{AArch64::LD3Threev2d_POST, 380, 1 },
{AArch64::LD3Threev2s_POST, 381, 1 },
{AArch64::LD3Threev4h_POST, 382, 1 },
{AArch64::LD3Threev4s_POST, 383, 1 },
{AArch64::LD3Threev8b_POST, 384, 1 },
{AArch64::LD3Threev8h_POST, 385, 1 },
{AArch64::LD3W_IMM, 386, 1 },
{AArch64::LD3i16_POST, 387, 1 },
{AArch64::LD3i32_POST, 388, 1 },
{AArch64::LD3i64_POST, 389, 1 },
{AArch64::LD3i8_POST, 390, 1 },
{AArch64::LD4B_IMM, 391, 1 },
{AArch64::LD4D_IMM, 392, 1 },
{AArch64::LD4Fourv16b_POST, 393, 1 },
{AArch64::LD4Fourv2d_POST, 394, 1 },
{AArch64::LD4Fourv2s_POST, 395, 1 },
{AArch64::LD4Fourv4h_POST, 396, 1 },
{AArch64::LD4Fourv4s_POST, 397, 1 },
{AArch64::LD4Fourv8b_POST, 398, 1 },
{AArch64::LD4Fourv8h_POST, 399, 1 },
{AArch64::LD4H_IMM, 400, 1 },
{AArch64::LD4Q_IMM, 401, 1 },
{AArch64::LD4Rv16b_POST, 402, 1 },
{AArch64::LD4Rv1d_POST, 403, 1 },
{AArch64::LD4Rv2d_POST, 404, 1 },
{AArch64::LD4Rv2s_POST, 405, 1 },
{AArch64::LD4Rv4h_POST, 406, 1 },
{AArch64::LD4Rv4s_POST, 407, 1 },
{AArch64::LD4Rv8b_POST, 408, 1 },
{AArch64::LD4Rv8h_POST, 409, 1 },
{AArch64::LD4W_IMM, 410, 1 },
{AArch64::LD4i16_POST, 411, 1 },
{AArch64::LD4i32_POST, 412, 1 },
{AArch64::LD4i64_POST, 413, 1 },
{AArch64::LD4i8_POST, 414, 1 },
{AArch64::LDADDB, 415, 1 },
{AArch64::LDADDH, 416, 1 },
{AArch64::LDADDLB, 417, 1 },
{AArch64::LDADDLH, 418, 1 },
{AArch64::LDADDLW, 419, 1 },
{AArch64::LDADDLX, 420, 1 },
{AArch64::LDADDW, 421, 1 },
{AArch64::LDADDX, 422, 1 },
{AArch64::LDAPURBi, 423, 1 },
{AArch64::LDAPURHi, 424, 1 },
{AArch64::LDAPURSBWi, 425, 1 },
{AArch64::LDAPURSBXi, 426, 1 },
{AArch64::LDAPURSHWi, 427, 1 },
{AArch64::LDAPURSHXi, 428, 1 },
{AArch64::LDAPURSWi, 429, 1 },
{AArch64::LDAPURXi, 430, 1 },
{AArch64::LDAPURbi, 431, 1 },
{AArch64::LDAPURdi, 432, 1 },
{AArch64::LDAPURhi, 433, 1 },
{AArch64::LDAPURi, 434, 1 },
{AArch64::LDAPURqi, 435, 1 },
{AArch64::LDAPURsi, 436, 1 },
{AArch64::LDCLRB, 437, 1 },
{AArch64::LDCLRH, 438, 1 },
{AArch64::LDCLRLB, 439, 1 },
{AArch64::LDCLRLH, 440, 1 },
{AArch64::LDCLRLW, 441, 1 },
{AArch64::LDCLRLX, 442, 1 },
{AArch64::LDCLRW, 443, 1 },
{AArch64::LDCLRX, 444, 1 },
{AArch64::LDEORB, 445, 1 },
{AArch64::LDEORH, 446, 1 },
{AArch64::LDEORLB, 447, 1 },
{AArch64::LDEORLH, 448, 1 },
{AArch64::LDEORLW, 449, 1 },
{AArch64::LDEORLX, 450, 1 },
{AArch64::LDEORW, 451, 1 },
{AArch64::LDEORX, 452, 1 },
{AArch64::LDFF1B_D_REAL, 453, 1 },
{AArch64::LDFF1B_H_REAL, 454, 1 },
{AArch64::LDFF1B_REAL, 455, 1 },
{AArch64::LDFF1B_S_REAL, 456, 1 },
{AArch64::LDFF1D_REAL, 457, 1 },
{AArch64::LDFF1H_D_REAL, 458, 1 },
{AArch64::LDFF1H_REAL, 459, 1 },
{AArch64::LDFF1H_S_REAL, 460, 1 },
{AArch64::LDFF1SB_D_REAL, 461, 1 },
{AArch64::LDFF1SB_H_REAL, 462, 1 },
{AArch64::LDFF1SB_S_REAL, 463, 1 },
{AArch64::LDFF1SH_D_REAL, 464, 1 },
{AArch64::LDFF1SH_S_REAL, 465, 1 },
{AArch64::LDFF1SW_D_REAL, 466, 1 },
{AArch64::LDFF1W_D_REAL, 467, 1 },
{AArch64::LDFF1W_REAL, 468, 1 },
{AArch64::LDG, 469, 1 },
{AArch64::LDNF1B_D_IMM_REAL, 470, 1 },
{AArch64::LDNF1B_H_IMM_REAL, 471, 1 },
{AArch64::LDNF1B_IMM_REAL, 472, 1 },
{AArch64::LDNF1B_S_IMM_REAL, 473, 1 },
{AArch64::LDNF1D_IMM_REAL, 474, 1 },
{AArch64::LDNF1H_D_IMM_REAL, 475, 1 },
{AArch64::LDNF1H_IMM_REAL, 476, 1 },
{AArch64::LDNF1H_S_IMM_REAL, 477, 1 },
{AArch64::LDNF1SB_D_IMM_REAL, 478, 1 },
{AArch64::LDNF1SB_H_IMM_REAL, 479, 1 },
{AArch64::LDNF1SB_S_IMM_REAL, 480, 1 },
{AArch64::LDNF1SH_D_IMM_REAL, 481, 1 },
{AArch64::LDNF1SH_S_IMM_REAL, 482, 1 },
{AArch64::LDNF1SW_D_IMM_REAL, 483, 1 },
{AArch64::LDNF1W_D_IMM_REAL, 484, 1 },
{AArch64::LDNF1W_IMM_REAL, 485, 1 },
{AArch64::LDNPDi, 486, 1 },
{AArch64::LDNPQi, 487, 1 },
{AArch64::LDNPSi, 488, 1 },
{AArch64::LDNPWi, 489, 1 },
{AArch64::LDNPXi, 490, 1 },
{AArch64::LDNT1B_2Z_IMM, 491, 1 },
{AArch64::LDNT1B_4Z_IMM, 492, 1 },
{AArch64::LDNT1B_VG2_M2ZPXI, 493, 1 },
{AArch64::LDNT1B_VG4_M4ZPXI, 494, 1 },
{AArch64::LDNT1B_ZRI, 495, 1 },
{AArch64::LDNT1B_ZZR_D_REAL, 496, 1 },
{AArch64::LDNT1B_ZZR_S_REAL, 497, 1 },
{AArch64::LDNT1D_2Z_IMM, 498, 1 },
{AArch64::LDNT1D_4Z_IMM, 499, 1 },
{AArch64::LDNT1D_VG2_M2ZPXI, 500, 1 },
{AArch64::LDNT1D_VG4_M4ZPXI, 501, 1 },
{AArch64::LDNT1D_ZRI, 502, 1 },
{AArch64::LDNT1D_ZZR_D_REAL, 503, 1 },
{AArch64::LDNT1H_2Z_IMM, 504, 1 },
{AArch64::LDNT1H_4Z_IMM, 505, 1 },
{AArch64::LDNT1H_VG2_M2ZPXI, 506, 1 },
{AArch64::LDNT1H_VG4_M4ZPXI, 507, 1 },
{AArch64::LDNT1H_ZRI, 508, 1 },
{AArch64::LDNT1H_ZZR_D_REAL, 509, 1 },
{AArch64::LDNT1H_ZZR_S_REAL, 510, 1 },
{AArch64::LDNT1SB_ZZR_D_REAL, 511, 1 },
{AArch64::LDNT1SB_ZZR_S_REAL, 512, 1 },
{AArch64::LDNT1SH_ZZR_D_REAL, 513, 1 },
{AArch64::LDNT1SH_ZZR_S_REAL, 514, 1 },
{AArch64::LDNT1SW_ZZR_D_REAL, 515, 1 },
{AArch64::LDNT1W_2Z_IMM, 516, 1 },
{AArch64::LDNT1W_4Z_IMM, 517, 1 },
{AArch64::LDNT1W_VG2_M2ZPXI, 518, 1 },
{AArch64::LDNT1W_VG4_M4ZPXI, 519, 1 },
{AArch64::LDNT1W_ZRI, 520, 1 },
{AArch64::LDNT1W_ZZR_D_REAL, 521, 1 },
{AArch64::LDNT1W_ZZR_S_REAL, 522, 1 },
{AArch64::LDPDi, 523, 1 },
{AArch64::LDPQi, 524, 1 },
{AArch64::LDPSWi, 525, 1 },
{AArch64::LDPSi, 526, 1 },
{AArch64::LDPWi, 527, 1 },
{AArch64::LDPXi, 528, 1 },
{AArch64::LDRAAindexed, 529, 1 },
{AArch64::LDRABindexed, 530, 1 },
{AArch64::LDRBBroX, 531, 1 },
{AArch64::LDRBBui, 532, 1 },
{AArch64::LDRBroX, 533, 1 },
{AArch64::LDRBui, 534, 1 },
{AArch64::LDRDroX, 535, 1 },
{AArch64::LDRDui, 536, 1 },
{AArch64::LDRHHroX, 537, 1 },
{AArch64::LDRHHui, 538, 1 },
{AArch64::LDRHroX, 539, 1 },
{AArch64::LDRHui, 540, 1 },
{AArch64::LDRQroX, 541, 1 },
{AArch64::LDRQui, 542, 1 },
{AArch64::LDRSBWroX, 543, 1 },
{AArch64::LDRSBWui, 544, 1 },
{AArch64::LDRSBXroX, 545, 1 },
{AArch64::LDRSBXui, 546, 1 },
{AArch64::LDRSHWroX, 547, 1 },
{AArch64::LDRSHWui, 548, 1 },
{AArch64::LDRSHXroX, 549, 1 },
{AArch64::LDRSHXui, 550, 1 },
{AArch64::LDRSWroX, 551, 1 },
{AArch64::LDRSWui, 552, 1 },
{AArch64::LDRSroX, 553, 1 },
{AArch64::LDRSui, 554, 1 },
{AArch64::LDRWroX, 555, 1 },
{AArch64::LDRWui, 556, 1 },
{AArch64::LDRXroX, 557, 1 },
{AArch64::LDRXui, 558, 1 },
{AArch64::LDR_PXI, 559, 1 },
{AArch64::LDR_ZA, 560, 1 },
{AArch64::LDR_ZXI, 561, 1 },
{AArch64::LDSETB, 562, 1 },
{AArch64::LDSETH, 563, 1 },
{AArch64::LDSETLB, 564, 1 },
{AArch64::LDSETLH, 565, 1 },
{AArch64::LDSETLW, 566, 1 },
{AArch64::LDSETLX, 567, 1 },
{AArch64::LDSETW, 568, 1 },
{AArch64::LDSETX, 569, 1 },
{AArch64::LDSMAXB, 570, 1 },
{AArch64::LDSMAXH, 571, 1 },
{AArch64::LDSMAXLB, 572, 1 },
{AArch64::LDSMAXLH, 573, 1 },
{AArch64::LDSMAXLW, 574, 1 },
{AArch64::LDSMAXLX, 575, 1 },
{AArch64::LDSMAXW, 576, 1 },
{AArch64::LDSMAXX, 577, 1 },
{AArch64::LDSMINB, 578, 1 },
{AArch64::LDSMINH, 579, 1 },
{AArch64::LDSMINLB, 580, 1 },
{AArch64::LDSMINLH, 581, 1 },
{AArch64::LDSMINLW, 582, 1 },
{AArch64::LDSMINLX, 583, 1 },
{AArch64::LDSMINW, 584, 1 },
{AArch64::LDSMINX, 585, 1 },
{AArch64::LDTRBi, 586, 1 },
{AArch64::LDTRHi, 587, 1 },
{AArch64::LDTRSBWi, 588, 1 },
{AArch64::LDTRSBXi, 589, 1 },
{AArch64::LDTRSHWi, 590, 1 },
{AArch64::LDTRSHXi, 591, 1 },
{AArch64::LDTRSWi, 592, 1 },
{AArch64::LDTRWi, 593, 1 },
{AArch64::LDTRXi, 594, 1 },
{AArch64::LDUMAXB, 595, 1 },
{AArch64::LDUMAXH, 596, 1 },
{AArch64::LDUMAXLB, 597, 1 },
{AArch64::LDUMAXLH, 598, 1 },
{AArch64::LDUMAXLW, 599, 1 },
{AArch64::LDUMAXLX, 600, 1 },
{AArch64::LDUMAXW, 601, 1 },
{AArch64::LDUMAXX, 602, 1 },
{AArch64::LDUMINB, 603, 1 },
{AArch64::LDUMINH, 604, 1 },
{AArch64::LDUMINLB, 605, 1 },
{AArch64::LDUMINLH, 606, 1 },
{AArch64::LDUMINLW, 607, 1 },
{AArch64::LDUMINLX, 608, 1 },
{AArch64::LDUMINW, 609, 1 },
{AArch64::LDUMINX, 610, 1 },
{AArch64::LDURBBi, 611, 1 },
{AArch64::LDURBi, 612, 1 },
{AArch64::LDURDi, 613, 1 },
{AArch64::LDURHHi, 614, 1 },
{AArch64::LDURHi, 615, 1 },
{AArch64::LDURQi, 616, 1 },
{AArch64::LDURSBWi, 617, 1 },
{AArch64::LDURSBXi, 618, 1 },
{AArch64::LDURSHWi, 619, 1 },
{AArch64::LDURSHXi, 620, 1 },
{AArch64::LDURSWi, 621, 1 },
{AArch64::LDURSi, 622, 1 },
{AArch64::LDURWi, 623, 1 },
{AArch64::LDURXi, 624, 1 },
{AArch64::MADDWrrr, 625, 1 },
{AArch64::MADDXrrr, 626, 1 },
{AArch64::MOVA_2ZMXI_H_B, 627, 1 },
{AArch64::MOVA_2ZMXI_H_D, 628, 1 },
{AArch64::MOVA_2ZMXI_H_H, 629, 1 },
{AArch64::MOVA_2ZMXI_H_S, 630, 1 },
{AArch64::MOVA_2ZMXI_V_B, 631, 1 },
{AArch64::MOVA_2ZMXI_V_D, 632, 1 },
{AArch64::MOVA_2ZMXI_V_H, 633, 1 },
{AArch64::MOVA_2ZMXI_V_S, 634, 1 },
{AArch64::MOVA_4ZMXI_H_B, 635, 1 },
{AArch64::MOVA_4ZMXI_H_D, 636, 1 },
{AArch64::MOVA_4ZMXI_H_H, 637, 1 },
{AArch64::MOVA_4ZMXI_H_S, 638, 1 },
{AArch64::MOVA_4ZMXI_V_B, 639, 1 },
{AArch64::MOVA_4ZMXI_V_D, 640, 1 },
{AArch64::MOVA_4ZMXI_V_H, 641, 1 },
{AArch64::MOVA_4ZMXI_V_S, 642, 1 },
{AArch64::MOVA_MXI2Z_H_B, 643, 1 },
{AArch64::MOVA_MXI2Z_H_D, 644, 1 },
{AArch64::MOVA_MXI2Z_H_H, 645, 1 },
{AArch64::MOVA_MXI2Z_H_S, 646, 1 },
{AArch64::MOVA_MXI2Z_V_B, 647, 1 },
{AArch64::MOVA_MXI2Z_V_D, 648, 1 },
{AArch64::MOVA_MXI2Z_V_H, 649, 1 },
{AArch64::MOVA_MXI2Z_V_S, 650, 1 },
{AArch64::MOVA_MXI4Z_H_B, 651, 1 },
{AArch64::MOVA_MXI4Z_H_D, 652, 1 },
{AArch64::MOVA_MXI4Z_H_H, 653, 1 },
{AArch64::MOVA_MXI4Z_H_S, 654, 1 },
{AArch64::MOVA_MXI4Z_V_B, 655, 1 },
{AArch64::MOVA_MXI4Z_V_D, 656, 1 },
{AArch64::MOVA_MXI4Z_V_H, 657, 1 },
{AArch64::MOVA_MXI4Z_V_S, 658, 1 },
{AArch64::MOVA_VG2_2ZMXI, 659, 1 },
{AArch64::MOVA_VG2_MXI2Z, 660, 1 },
{AArch64::MOVA_VG4_4ZMXI, 661, 1 },
{AArch64::MOVA_VG4_MXI4Z, 662, 1 },
{AArch64::MSRpstatesvcrImm1, 663, 6 },
{AArch64::MSUBWrrr, 669, 1 },
{AArch64::MSUBXrrr, 670, 1 },
{AArch64::NOTv16i8, 671, 1 },
{AArch64::NOTv8i8, 672, 1 },
{AArch64::ORNWrs, 673, 3 },
{AArch64::ORNXrs, 676, 3 },
{AArch64::ORRS_PPzPP, 679, 1 },
{AArch64::ORRWrs, 680, 2 },
{AArch64::ORRXrs, 682, 2 },
{AArch64::ORR_PPzPP, 684, 1 },
{AArch64::ORR_ZI, 685, 3 },
{AArch64::ORR_ZZZ, 688, 1 },
{AArch64::ORRv16i8, 689, 1 },
{AArch64::ORRv8i8, 690, 1 },
{AArch64::PACIA1716, 691, 1 },
{AArch64::PACIASP, 692, 1 },
{AArch64::PACIAZ, 693, 1 },
{AArch64::PACIB1716, 694, 1 },
{AArch64::PACIBSP, 695, 1 },
{AArch64::PACIBZ, 696, 1 },
{AArch64::PMOV_PZI_B, 697, 1 },
{AArch64::PMOV_ZIP_B, 698, 1 },
{AArch64::PRFB_D_PZI, 699, 1 },
{AArch64::PRFB_PRI, 700, 1 },
{AArch64::PRFB_S_PZI, 701, 1 },
{AArch64::PRFD_D_PZI, 702, 1 },
{AArch64::PRFD_PRI, 703, 1 },
{AArch64::PRFD_S_PZI, 704, 1 },
{AArch64::PRFH_D_PZI, 705, 1 },
{AArch64::PRFH_PRI, 706, 1 },
{AArch64::PRFH_S_PZI, 707, 1 },
{AArch64::PRFMroX, 708, 1 },
{AArch64::PRFMui, 709, 1 },
{AArch64::PRFUMi, 710, 1 },
{AArch64::PRFW_D_PZI, 711, 1 },
{AArch64::PRFW_PRI, 712, 1 },
{AArch64::PRFW_S_PZI, 713, 1 },
{AArch64::PTRUES_B, 714, 1 },
{AArch64::PTRUES_D, 715, 1 },
{AArch64::PTRUES_H, 716, 1 },
{AArch64::PTRUES_S, 717, 1 },
{AArch64::PTRUE_B, 718, 1 },
{AArch64::PTRUE_D, 719, 1 },
{AArch64::PTRUE_H, 720, 1 },
{AArch64::PTRUE_S, 721, 1 },
{AArch64::RET, 722, 1 },
{AArch64::SBCSWr, 723, 1 },
{AArch64::SBCSXr, 724, 1 },
{AArch64::SBCWr, 725, 1 },
{AArch64::SBCXr, 726, 1 },
{AArch64::SBFMWri, 727, 3 },
{AArch64::SBFMXri, 730, 4 },
{AArch64::SEL_PPPP, 734, 1 },
{AArch64::SEL_ZPZZ_B, 735, 1 },
{AArch64::SEL_ZPZZ_D, 736, 1 },
{AArch64::SEL_ZPZZ_H, 737, 1 },
{AArch64::SEL_ZPZZ_S, 738, 1 },
{AArch64::SMADDLrrr, 739, 1 },
{AArch64::SMSUBLrrr, 740, 1 },
{AArch64::SQDECB_XPiI, 741, 2 },
{AArch64::SQDECB_XPiWdI, 743, 2 },
{AArch64::SQDECD_XPiI, 745, 2 },
{AArch64::SQDECD_XPiWdI, 747, 2 },
{AArch64::SQDECD_ZPiI, 749, 2 },
{AArch64::SQDECH_XPiI, 751, 2 },
{AArch64::SQDECH_XPiWdI, 753, 2 },
{AArch64::SQDECH_ZPiI, 755, 2 },
{AArch64::SQDECW_XPiI, 757, 2 },
{AArch64::SQDECW_XPiWdI, 759, 2 },
{AArch64::SQDECW_ZPiI, 761, 2 },
{AArch64::SQINCB_XPiI, 763, 2 },
{AArch64::SQINCB_XPiWdI, 765, 2 },
{AArch64::SQINCD_XPiI, 767, 2 },
{AArch64::SQINCD_XPiWdI, 769, 2 },
{AArch64::SQINCD_ZPiI, 771, 2 },
{AArch64::SQINCH_XPiI, 773, 2 },
{AArch64::SQINCH_XPiWdI, 775, 2 },
{AArch64::SQINCH_ZPiI, 777, 2 },
{AArch64::SQINCW_XPiI, 779, 2 },
{AArch64::SQINCW_XPiWdI, 781, 2 },
{AArch64::SQINCW_ZPiI, 783, 2 },
{AArch64::SST1B_D_IMM, 785, 1 },
{AArch64::SST1B_S_IMM, 786, 1 },
{AArch64::SST1D_IMM, 787, 1 },
{AArch64::SST1H_D_IMM, 788, 1 },
{AArch64::SST1H_S_IMM, 789, 1 },
{AArch64::SST1Q, 790, 1 },
{AArch64::SST1W_D_IMM, 791, 1 },
{AArch64::SST1W_IMM, 792, 1 },
{AArch64::ST1B_2Z_IMM, 793, 1 },
{AArch64::ST1B_4Z_IMM, 794, 1 },
{AArch64::ST1B_D_IMM, 795, 1 },
{AArch64::ST1B_H_IMM, 796, 1 },
{AArch64::ST1B_IMM, 797, 1 },
{AArch64::ST1B_S_IMM, 798, 1 },
{AArch64::ST1B_VG2_M2ZPXI, 799, 1 },
{AArch64::ST1B_VG4_M4ZPXI, 800, 1 },
{AArch64::ST1D_2Z_IMM, 801, 1 },
{AArch64::ST1D_4Z_IMM, 802, 1 },
{AArch64::ST1D_IMM, 803, 1 },
{AArch64::ST1D_Q_IMM, 804, 1 },
{AArch64::ST1D_VG2_M2ZPXI, 805, 1 },
{AArch64::ST1D_VG4_M4ZPXI, 806, 1 },
{AArch64::ST1Fourv16b_POST, 807, 1 },
{AArch64::ST1Fourv1d_POST, 808, 1 },
{AArch64::ST1Fourv2d_POST, 809, 1 },
{AArch64::ST1Fourv2s_POST, 810, 1 },
{AArch64::ST1Fourv4h_POST, 811, 1 },
{AArch64::ST1Fourv4s_POST, 812, 1 },
{AArch64::ST1Fourv8b_POST, 813, 1 },
{AArch64::ST1Fourv8h_POST, 814, 1 },
{AArch64::ST1H_2Z_IMM, 815, 1 },
{AArch64::ST1H_4Z_IMM, 816, 1 },
{AArch64::ST1H_D_IMM, 817, 1 },
{AArch64::ST1H_IMM, 818, 1 },
{AArch64::ST1H_S_IMM, 819, 1 },
{AArch64::ST1H_VG2_M2ZPXI, 820, 1 },
{AArch64::ST1H_VG4_M4ZPXI, 821, 1 },
{AArch64::ST1Onev16b_POST, 822, 1 },
{AArch64::ST1Onev1d_POST, 823, 1 },
{AArch64::ST1Onev2d_POST, 824, 1 },
{AArch64::ST1Onev2s_POST, 825, 1 },
{AArch64::ST1Onev4h_POST, 826, 1 },
{AArch64::ST1Onev4s_POST, 827, 1 },
{AArch64::ST1Onev8b_POST, 828, 1 },
{AArch64::ST1Onev8h_POST, 829, 1 },
{AArch64::ST1Threev16b_POST, 830, 1 },
{AArch64::ST1Threev1d_POST, 831, 1 },
{AArch64::ST1Threev2d_POST, 832, 1 },
{AArch64::ST1Threev2s_POST, 833, 1 },
{AArch64::ST1Threev4h_POST, 834, 1 },
{AArch64::ST1Threev4s_POST, 835, 1 },
{AArch64::ST1Threev8b_POST, 836, 1 },
{AArch64::ST1Threev8h_POST, 837, 1 },
{AArch64::ST1Twov16b_POST, 838, 1 },
{AArch64::ST1Twov1d_POST, 839, 1 },
{AArch64::ST1Twov2d_POST, 840, 1 },
{AArch64::ST1Twov2s_POST, 841, 1 },
{AArch64::ST1Twov4h_POST, 842, 1 },
{AArch64::ST1Twov4s_POST, 843, 1 },
{AArch64::ST1Twov8b_POST, 844, 1 },
{AArch64::ST1Twov8h_POST, 845, 1 },
{AArch64::ST1W_2Z_IMM, 846, 1 },
{AArch64::ST1W_4Z_IMM, 847, 1 },
{AArch64::ST1W_D_IMM, 848, 1 },
{AArch64::ST1W_IMM, 849, 1 },
{AArch64::ST1W_Q_IMM, 850, 1 },
{AArch64::ST1W_VG2_M2ZPXI, 851, 1 },
{AArch64::ST1W_VG4_M4ZPXI, 852, 1 },
{AArch64::ST1_MXIPXX_H_B, 853, 1 },
{AArch64::ST1_MXIPXX_H_D, 854, 1 },
{AArch64::ST1_MXIPXX_H_H, 855, 1 },
{AArch64::ST1_MXIPXX_H_Q, 856, 1 },
{AArch64::ST1_MXIPXX_H_S, 857, 1 },
{AArch64::ST1_MXIPXX_V_B, 858, 1 },
{AArch64::ST1_MXIPXX_V_D, 859, 1 },
{AArch64::ST1_MXIPXX_V_H, 860, 1 },
{AArch64::ST1_MXIPXX_V_Q, 861, 1 },
{AArch64::ST1_MXIPXX_V_S, 862, 1 },
{AArch64::ST1i16_POST, 863, 1 },
{AArch64::ST1i32_POST, 864, 1 },
{AArch64::ST1i64_POST, 865, 1 },
{AArch64::ST1i8_POST, 866, 1 },
{AArch64::ST2B_IMM, 867, 1 },
{AArch64::ST2D_IMM, 868, 1 },
{AArch64::ST2GOffset, 869, 1 },
{AArch64::ST2H_IMM, 870, 1 },
{AArch64::ST2Q_IMM, 871, 1 },
{AArch64::ST2Twov16b_POST, 872, 1 },
{AArch64::ST2Twov2d_POST, 873, 1 },
{AArch64::ST2Twov2s_POST, 874, 1 },
{AArch64::ST2Twov4h_POST, 875, 1 },
{AArch64::ST2Twov4s_POST, 876, 1 },
{AArch64::ST2Twov8b_POST, 877, 1 },
{AArch64::ST2Twov8h_POST, 878, 1 },
{AArch64::ST2W_IMM, 879, 1 },
{AArch64::ST2i16_POST, 880, 1 },
{AArch64::ST2i32_POST, 881, 1 },
{AArch64::ST2i64_POST, 882, 1 },
{AArch64::ST2i8_POST, 883, 1 },
{AArch64::ST3B_IMM, 884, 1 },
{AArch64::ST3D_IMM, 885, 1 },
{AArch64::ST3H_IMM, 886, 1 },
{AArch64::ST3Q_IMM, 887, 1 },
{AArch64::ST3Threev16b_POST, 888, 1 },
{AArch64::ST3Threev2d_POST, 889, 1 },
{AArch64::ST3Threev2s_POST, 890, 1 },
{AArch64::ST3Threev4h_POST, 891, 1 },
{AArch64::ST3Threev4s_POST, 892, 1 },
{AArch64::ST3Threev8b_POST, 893, 1 },
{AArch64::ST3Threev8h_POST, 894, 1 },
{AArch64::ST3W_IMM, 895, 1 },
{AArch64::ST3i16_POST, 896, 1 },
{AArch64::ST3i32_POST, 897, 1 },
{AArch64::ST3i64_POST, 898, 1 },
{AArch64::ST3i8_POST, 899, 1 },
{AArch64::ST4B_IMM, 900, 1 },
{AArch64::ST4D_IMM, 901, 1 },
{AArch64::ST4Fourv16b_POST, 902, 1 },
{AArch64::ST4Fourv2d_POST, 903, 1 },
{AArch64::ST4Fourv2s_POST, 904, 1 },
{AArch64::ST4Fourv4h_POST, 905, 1 },
{AArch64::ST4Fourv4s_POST, 906, 1 },
{AArch64::ST4Fourv8b_POST, 907, 1 },
{AArch64::ST4Fourv8h_POST, 908, 1 },
{AArch64::ST4H_IMM, 909, 1 },
{AArch64::ST4Q_IMM, 910, 1 },
{AArch64::ST4W_IMM, 911, 1 },
{AArch64::ST4i16_POST, 912, 1 },
{AArch64::ST4i32_POST, 913, 1 },
{AArch64::ST4i64_POST, 914, 1 },
{AArch64::ST4i8_POST, 915, 1 },
{AArch64::STGOffset, 916, 1 },
{AArch64::STGPi, 917, 1 },
{AArch64::STLURBi, 918, 1 },
{AArch64::STLURHi, 919, 1 },
{AArch64::STLURWi, 920, 1 },
{AArch64::STLURXi, 921, 1 },
{AArch64::STLURbi, 922, 1 },
{AArch64::STLURdi, 923, 1 },
{AArch64::STLURhi, 924, 1 },
{AArch64::STLURqi, 925, 1 },
{AArch64::STLURsi, 926, 1 },
{AArch64::STNPDi, 927, 1 },
{AArch64::STNPQi, 928, 1 },
{AArch64::STNPSi, 929, 1 },
{AArch64::STNPWi, 930, 1 },
{AArch64::STNPXi, 931, 1 },
{AArch64::STNT1B_2Z_IMM, 932, 1 },
{AArch64::STNT1B_4Z_IMM, 933, 1 },
{AArch64::STNT1B_VG2_M2ZPXI, 934, 1 },
{AArch64::STNT1B_VG4_M4ZPXI, 935, 1 },
{AArch64::STNT1B_ZRI, 936, 1 },
{AArch64::STNT1B_ZZR_D_REAL, 937, 1 },
{AArch64::STNT1B_ZZR_S_REAL, 938, 1 },
{AArch64::STNT1D_2Z_IMM, 939, 1 },
{AArch64::STNT1D_4Z_IMM, 940, 1 },
{AArch64::STNT1D_VG2_M2ZPXI, 941, 1 },
{AArch64::STNT1D_VG4_M4ZPXI, 942, 1 },
{AArch64::STNT1D_ZRI, 943, 1 },
{AArch64::STNT1D_ZZR_D_REAL, 944, 1 },
{AArch64::STNT1H_2Z_IMM, 945, 1 },
{AArch64::STNT1H_4Z_IMM, 946, 1 },
{AArch64::STNT1H_VG2_M2ZPXI, 947, 1 },
{AArch64::STNT1H_VG4_M4ZPXI, 948, 1 },
{AArch64::STNT1H_ZRI, 949, 1 },
{AArch64::STNT1H_ZZR_D_REAL, 950, 1 },
{AArch64::STNT1H_ZZR_S_REAL, 951, 1 },
{AArch64::STNT1W_2Z_IMM, 952, 1 },
{AArch64::STNT1W_4Z_IMM, 953, 1 },
{AArch64::STNT1W_VG2_M2ZPXI, 954, 1 },
{AArch64::STNT1W_VG4_M4ZPXI, 955, 1 },
{AArch64::STNT1W_ZRI, 956, 1 },
{AArch64::STNT1W_ZZR_D_REAL, 957, 1 },
{AArch64::STNT1W_ZZR_S_REAL, 958, 1 },
{AArch64::STPDi, 959, 1 },
{AArch64::STPQi, 960, 1 },
{AArch64::STPSi, 961, 1 },
{AArch64::STPWi, 962, 1 },
{AArch64::STPXi, 963, 1 },
{AArch64::STRBBroX, 964, 1 },
{AArch64::STRBBui, 965, 1 },
{AArch64::STRBroX, 966, 1 },
{AArch64::STRBui, 967, 1 },
{AArch64::STRDroX, 968, 1 },
{AArch64::STRDui, 969, 1 },
{AArch64::STRHHroX, 970, 1 },
{AArch64::STRHHui, 971, 1 },
{AArch64::STRHroX, 972, 1 },
{AArch64::STRHui, 973, 1 },
{AArch64::STRQroX, 974, 1 },
{AArch64::STRQui, 975, 1 },
{AArch64::STRSroX, 976, 1 },
{AArch64::STRSui, 977, 1 },
{AArch64::STRWroX, 978, 1 },
{AArch64::STRWui, 979, 1 },
{AArch64::STRXroX, 980, 1 },
{AArch64::STRXui, 981, 1 },
{AArch64::STR_PXI, 982, 1 },
{AArch64::STR_ZA, 983, 1 },
{AArch64::STR_ZXI, 984, 1 },
{AArch64::STTRBi, 985, 1 },
{AArch64::STTRHi, 986, 1 },
{AArch64::STTRWi, 987, 1 },
{AArch64::STTRXi, 988, 1 },
{AArch64::STURBBi, 989, 1 },
{AArch64::STURBi, 990, 1 },
{AArch64::STURDi, 991, 1 },
{AArch64::STURHHi, 992, 1 },
{AArch64::STURHi, 993, 1 },
{AArch64::STURQi, 994, 1 },
{AArch64::STURSi, 995, 1 },
{AArch64::STURWi, 996, 1 },
{AArch64::STURXi, 997, 1 },
{AArch64::STZ2GOffset, 998, 1 },
{AArch64::STZGOffset, 999, 1 },
{AArch64::SUBSWri, 1000, 1 },
{AArch64::SUBSWrs, 1001, 5 },
{AArch64::SUBSWrx, 1006, 3 },
{AArch64::SUBSXri, 1009, 1 },
{AArch64::SUBSXrs, 1010, 5 },
{AArch64::SUBSXrx, 1015, 1 },
{AArch64::SUBSXrx64, 1016, 3 },
{AArch64::SUBWrs, 1019, 3 },
{AArch64::SUBWrx, 1022, 2 },
{AArch64::SUBXrs, 1024, 3 },
{AArch64::SUBXrx64, 1027, 2 },
{AArch64::SYSPxt_XZR, 1029, 1 },
{AArch64::SYSxt, 1030, 1 },
{AArch64::UBFMWri, 1031, 3 },
{AArch64::UBFMXri, 1034, 4 },
{AArch64::UMADDLrrr, 1038, 1 },
{AArch64::UMOVvi32, 1039, 1 },
{AArch64::UMOVvi32_idx0, 1040, 1 },
{AArch64::UMOVvi64, 1041, 1 },
{AArch64::UMOVvi64_idx0, 1042, 1 },
{AArch64::UMSUBLrrr, 1043, 1 },
{AArch64::UQDECB_WPiI, 1044, 2 },
{AArch64::UQDECB_XPiI, 1046, 2 },
{AArch64::UQDECD_WPiI, 1048, 2 },
{AArch64::UQDECD_XPiI, 1050, 2 },
{AArch64::UQDECD_ZPiI, 1052, 2 },
{AArch64::UQDECH_WPiI, 1054, 2 },
{AArch64::UQDECH_XPiI, 1056, 2 },
{AArch64::UQDECH_ZPiI, 1058, 2 },
{AArch64::UQDECW_WPiI, 1060, 2 },
{AArch64::UQDECW_XPiI, 1062, 2 },
{AArch64::UQDECW_ZPiI, 1064, 2 },
{AArch64::UQINCB_WPiI, 1066, 2 },
{AArch64::UQINCB_XPiI, 1068, 2 },
{AArch64::UQINCD_WPiI, 1070, 2 },
{AArch64::UQINCD_XPiI, 1072, 2 },
{AArch64::UQINCD_ZPiI, 1074, 2 },
{AArch64::UQINCH_WPiI, 1076, 2 },
{AArch64::UQINCH_XPiI, 1078, 2 },
{AArch64::UQINCH_ZPiI, 1080, 2 },
{AArch64::UQINCW_WPiI, 1082, 2 },
{AArch64::UQINCW_XPiI, 1084, 2 },
{AArch64::UQINCW_ZPiI, 1086, 2 },
{AArch64::XPACLRI, 1088, 1 },
{AArch64::ZERO_M, 1089, 15 },
};
static const AliasPattern Patterns[] = {
// AArch64::ADDSWri - 0
{0, 0, 4, 2 },
// AArch64::ADDSWrs - 1
{13, 2, 4, 4 },
{24, 6, 4, 3 },
{39, 9, 4, 4 },
// AArch64::ADDSWrx - 4
{13, 13, 4, 4 },
{55, 17, 4, 3 },
{39, 20, 4, 4 },
// AArch64::ADDSXri - 7
{0, 24, 4, 2 },
// AArch64::ADDSXrs - 8
{13, 26, 4, 4 },
{24, 30, 4, 3 },
{39, 33, 4, 4 },
// AArch64::ADDSXrx - 11
{55, 37, 4, 3 },
// AArch64::ADDSXrx64 - 12
{13, 40, 4, 4 },
{55, 44, 4, 3 },
{39, 47, 4, 4 },
// AArch64::ADDWri - 15
{70, 51, 4, 4 },
{70, 55, 4, 4 },
// AArch64::ADDWrs - 17
{81, 59, 4, 4 },
// AArch64::ADDWrx - 18
{81, 63, 4, 4 },
{81, 67, 4, 4 },
// AArch64::ADDXri - 20
{70, 71, 4, 4 },
{70, 75, 4, 4 },
// AArch64::ADDXrs - 22
{81, 79, 4, 4 },
// AArch64::ADDXrx64 - 23
{81, 83, 4, 4 },
{81, 87, 4, 4 },
// AArch64::ANDSWri - 25
{96, 91, 3, 2 },
// AArch64::ANDSWrs - 26
{109, 93, 4, 4 },
{120, 97, 4, 3 },
{135, 100, 4, 4 },
// AArch64::ANDSXri - 29
{151, 104, 3, 2 },
// AArch64::ANDSXrs - 30
{109, 106, 4, 4 },
{120, 110, 4, 3 },
{135, 113, 4, 4 },
// AArch64::ANDS_PPzPP - 33
{164, 117, 4, 8 },
// AArch64::ANDWrs - 34
{188, 125, 4, 4 },
// AArch64::ANDXrs - 35
{188, 129, 4, 4 },
// AArch64::AND_PPzPP - 36
{203, 133, 4, 8 },
// AArch64::AND_ZI - 37
{226, 141, 3, 7 },
{247, 148, 3, 7 },
{268, 155, 3, 7 },
// AArch64::AUTIA1716 - 40
{289, 162, 0, 3 },
// AArch64::AUTIASP - 41
{299, 165, 0, 3 },
// AArch64::AUTIAZ - 42
{307, 168, 0, 3 },
// AArch64::AUTIB1716 - 43
{314, 171, 0, 3 },
// AArch64::AUTIBSP - 44
{324, 174, 0, 3 },
// AArch64::AUTIBZ - 45
{332, 177, 0, 3 },
// AArch64::BICSWrs - 46
{339, 180, 4, 4 },
// AArch64::BICSXrs - 47
{339, 184, 4, 4 },
// AArch64::BICWrs - 48
{355, 188, 4, 4 },
// AArch64::BICXrs - 49
{355, 192, 4, 4 },
// AArch64::CLREX - 50
{370, 196, 1, 1 },
// AArch64::CNTB_XPiI - 51
{376, 197, 3, 7 },
{384, 204, 3, 7 },
// AArch64::CNTD_XPiI - 53
{398, 211, 3, 7 },
{406, 218, 3, 7 },
// AArch64::CNTH_XPiI - 55
{420, 225, 3, 7 },
{428, 232, 3, 7 },
// AArch64::CNTW_XPiI - 57
{442, 239, 3, 7 },
{450, 246, 3, 7 },
// AArch64::CPY_ZPmI_B - 59
{464, 253, 5, 7 },
// AArch64::CPY_ZPmI_D - 60
{487, 260, 5, 7 },
// AArch64::CPY_ZPmI_H - 61
{510, 267, 5, 7 },
// AArch64::CPY_ZPmI_S - 62
{533, 274, 5, 7 },
// AArch64::CPY_ZPmR_B - 63
{556, 281, 4, 8 },
// AArch64::CPY_ZPmR_D - 64
{577, 289, 4, 8 },
// AArch64::CPY_ZPmR_H - 65
{598, 297, 4, 8 },
// AArch64::CPY_ZPmR_S - 66
{619, 305, 4, 8 },
// AArch64::CPY_ZPmV_B - 67
{556, 313, 4, 8 },
// AArch64::CPY_ZPmV_D - 68
{577, 321, 4, 8 },
// AArch64::CPY_ZPmV_H - 69
{598, 329, 4, 8 },
// AArch64::CPY_ZPmV_S - 70
{619, 337, 4, 8 },
// AArch64::CPY_ZPzI_B - 71
{640, 345, 4, 6 },
// AArch64::CPY_ZPzI_D - 72
{663, 351, 4, 6 },
// AArch64::CPY_ZPzI_H - 73
{686, 357, 4, 6 },
// AArch64::CPY_ZPzI_S - 74
{709, 363, 4, 6 },
// AArch64::CSINCWr - 75
{732, 369, 4, 4 },
{746, 373, 4, 4 },
// AArch64::CSINCXr - 77
{732, 377, 4, 4 },
{746, 381, 4, 4 },
// AArch64::CSINVWr - 79
{764, 385, 4, 4 },
{779, 389, 4, 4 },
// AArch64::CSINVXr - 81
{764, 393, 4, 4 },
{779, 397, 4, 4 },
// AArch64::CSNEGWr - 83
{797, 401, 4, 4 },
// AArch64::CSNEGXr - 84
{797, 405, 4, 4 },
// AArch64::DCPS1 - 85
{815, 409, 1, 1 },
// AArch64::DCPS2 - 86
{821, 410, 1, 1 },
// AArch64::DCPS3 - 87
{827, 411, 1, 4 },
// AArch64::DECB_XPiI - 88
{833, 415, 4, 8 },
{841, 423, 4, 8 },
// AArch64::DECD_XPiI - 90
{855, 431, 4, 8 },
{863, 439, 4, 8 },
// AArch64::DECD_ZPiI - 92
{877, 447, 4, 8 },
{887, 455, 4, 8 },
// AArch64::DECH_XPiI - 94
{903, 463, 4, 8 },
{911, 471, 4, 8 },
// AArch64::DECH_ZPiI - 96
{925, 479, 4, 8 },
{935, 487, 4, 8 },
// AArch64::DECW_XPiI - 98
{951, 495, 4, 8 },
{959, 503, 4, 8 },
// AArch64::DECW_ZPiI - 100
{973, 511, 4, 8 },
{983, 519, 4, 8 },
// AArch64::DSB - 102
{999, 527, 1, 1 },
{1004, 528, 1, 1 },
{1010, 529, 1, 4 },
// AArch64::DUPM_ZI - 105
{1014, 533, 2, 6 },
{1029, 539, 2, 6 },
{1044, 545, 2, 6 },
{1059, 551, 2, 6 },
{1075, 557, 2, 6 },
{1091, 563, 2, 6 },
// AArch64::DUP_ZI_B - 111
{1107, 569, 3, 5 },
// AArch64::DUP_ZI_D - 112
{1122, 574, 3, 5 },
{1137, 579, 3, 7 },
// AArch64::DUP_ZI_H - 114
{1153, 586, 3, 5 },
{1168, 591, 3, 7 },
// AArch64::DUP_ZI_S - 116
{1184, 598, 3, 5 },
{1199, 603, 3, 7 },
// AArch64::DUP_ZR_B - 118
{1215, 610, 2, 6 },
// AArch64::DUP_ZR_D - 119
{1228, 616, 2, 6 },
// AArch64::DUP_ZR_H - 120
{1241, 622, 2, 6 },
// AArch64::DUP_ZR_S - 121
{1254, 628, 2, 6 },
// AArch64::DUP_ZZI_B - 122
{1267, 634, 3, 7 },
{1282, 641, 3, 6 },
// AArch64::DUP_ZZI_D - 124
{1301, 647, 3, 7 },
{1316, 654, 3, 6 },
// AArch64::DUP_ZZI_H - 126
{1335, 660, 3, 7 },
{1350, 667, 3, 6 },
// AArch64::DUP_ZZI_Q - 128
{1369, 673, 3, 7 },
{1384, 680, 3, 6 },
// AArch64::DUP_ZZI_S - 130
{1403, 686, 3, 7 },
{1418, 693, 3, 6 },
// AArch64::EONWrs - 132
{1437, 699, 4, 4 },
// AArch64::EONXrs - 133
{1437, 703, 4, 4 },
// AArch64::EORS_PPzPP - 134
{1452, 707, 4, 8 },
// AArch64::EORWrs - 135
{1476, 715, 4, 4 },
// AArch64::EORXrs - 136
{1476, 719, 4, 4 },
// AArch64::EOR_PPzPP - 137
{1491, 723, 4, 8 },
// AArch64::EOR_ZI - 138
{1514, 731, 3, 7 },
{1535, 738, 3, 7 },
{1556, 745, 3, 7 },
// AArch64::EXTRACT_ZPMXI_H_B - 141
{1577, 752, 6, 8 },
// AArch64::EXTRACT_ZPMXI_H_D - 142
{1610, 760, 6, 8 },
// AArch64::EXTRACT_ZPMXI_H_H - 143
{1643, 768, 6, 8 },
// AArch64::EXTRACT_ZPMXI_H_Q - 144
{1676, 776, 6, 8 },
// AArch64::EXTRACT_ZPMXI_H_S - 145
{1709, 784, 6, 8 },
// AArch64::EXTRACT_ZPMXI_V_B - 146
{1742, 792, 6, 8 },
// AArch64::EXTRACT_ZPMXI_V_D - 147
{1775, 800, 6, 8 },
// AArch64::EXTRACT_ZPMXI_V_H - 148
{1808, 808, 6, 8 },
// AArch64::EXTRACT_ZPMXI_V_Q - 149
{1841, 816, 6, 8 },
// AArch64::EXTRACT_ZPMXI_V_S - 150
{1874, 824, 6, 8 },
// AArch64::EXTRWrri - 151
{1907, 832, 4, 3 },
// AArch64::EXTRXrri - 152
{1907, 835, 4, 3 },
// AArch64::FCPY_ZPmI_D - 153
{1922, 838, 4, 7 },
// AArch64::FCPY_ZPmI_H - 154
{1946, 845, 4, 7 },
// AArch64::FCPY_ZPmI_S - 155
{1970, 852, 4, 7 },
// AArch64::FDUP_ZI_D - 156
{1994, 859, 2, 5 },
// AArch64::FDUP_ZI_H - 157
{2010, 864, 2, 5 },
// AArch64::FDUP_ZI_S - 158
{2026, 869, 2, 5 },
// AArch64::GLD1B_D_IMM_REAL - 159
{2042, 874, 4, 7 },
// AArch64::GLD1B_S_IMM_REAL - 160
{2068, 881, 4, 7 },
// AArch64::GLD1D_IMM_REAL - 161
{2094, 888, 4, 7 },
// AArch64::GLD1H_D_IMM_REAL - 162
{2120, 895, 4, 7 },
// AArch64::GLD1H_S_IMM_REAL - 163
{2146, 902, 4, 7 },
// AArch64::GLD1Q - 164
{2172, 909, 4, 6 },
// AArch64::GLD1SB_D_IMM_REAL - 165
{2198, 915, 4, 7 },
// AArch64::GLD1SB_S_IMM_REAL - 166
{2225, 922, 4, 7 },
// AArch64::GLD1SH_D_IMM_REAL - 167
{2252, 929, 4, 7 },
// AArch64::GLD1SH_S_IMM_REAL - 168
{2279, 936, 4, 7 },
// AArch64::GLD1SW_D_IMM_REAL - 169
{2306, 943, 4, 7 },
// AArch64::GLD1W_D_IMM_REAL - 170
{2333, 950, 4, 7 },
// AArch64::GLD1W_IMM_REAL - 171
{2359, 957, 4, 7 },
// AArch64::GLDFF1B_D_IMM_REAL - 172
{2385, 964, 4, 7 },
// AArch64::GLDFF1B_S_IMM_REAL - 173
{2413, 971, 4, 7 },
// AArch64::GLDFF1D_IMM_REAL - 174
{2441, 978, 4, 7 },
// AArch64::GLDFF1H_D_IMM_REAL - 175
{2469, 985, 4, 7 },
// AArch64::GLDFF1H_S_IMM_REAL - 176
{2497, 992, 4, 7 },
// AArch64::GLDFF1SB_D_IMM_REAL - 177
{2525, 999, 4, 7 },
// AArch64::GLDFF1SB_S_IMM_REAL - 178
{2554, 1006, 4, 7 },
// AArch64::GLDFF1SH_D_IMM_REAL - 179
{2583, 1013, 4, 7 },
// AArch64::GLDFF1SH_S_IMM_REAL - 180
{2612, 1020, 4, 7 },
// AArch64::GLDFF1SW_D_IMM_REAL - 181
{2641, 1027, 4, 7 },
// AArch64::GLDFF1W_D_IMM_REAL - 182
{2670, 1034, 4, 7 },
// AArch64::GLDFF1W_IMM_REAL - 183
{2698, 1041, 4, 7 },
// AArch64::HINT - 184
{2726, 1048, 1, 1 },
{2730, 1049, 1, 1 },
{2736, 1050, 1, 1 },
{2740, 1051, 1, 1 },
{2744, 1052, 1, 1 },
{2748, 1053, 1, 1 },
{2753, 1054, 1, 1 },
{2757, 1055, 1, 4 },
{2761, 1059, 1, 1 },
{2766, 1060, 1, 4 },
{2770, 1064, 1, 4 },
{2779, 1068, 1, 4 },
{2788, 1072, 1, 4 },
// AArch64::INCB_XPiI - 197
{2795, 1076, 4, 8 },
{2803, 1084, 4, 8 },
// AArch64::INCD_XPiI - 199
{2817, 1092, 4, 8 },
{2825, 1100, 4, 8 },
// AArch64::INCD_ZPiI - 201
{2839, 1108, 4, 8 },
{2849, 1116, 4, 8 },
// AArch64::INCH_XPiI - 203
{2865, 1124, 4, 8 },
{2873, 1132, 4, 8 },
// AArch64::INCH_ZPiI - 205
{2887, 1140, 4, 8 },
{2897, 1148, 4, 8 },
// AArch64::INCW_XPiI - 207
{2913, 1156, 4, 8 },
{2921, 1164, 4, 8 },
// AArch64::INCW_ZPiI - 209
{2935, 1172, 4, 8 },
{2945, 1180, 4, 8 },
// AArch64::INSERT_MXIPZ_H_B - 211
{2961, 1188, 6, 9 },
// AArch64::INSERT_MXIPZ_H_D - 212
{2994, 1197, 6, 9 },
// AArch64::INSERT_MXIPZ_H_H - 213
{3027, 1206, 6, 9 },
// AArch64::INSERT_MXIPZ_H_Q - 214
{3060, 1215, 6, 9 },
// AArch64::INSERT_MXIPZ_H_S - 215
{3093, 1224, 6, 9 },
// AArch64::INSERT_MXIPZ_V_B - 216
{3126, 1233, 6, 9 },
// AArch64::INSERT_MXIPZ_V_D - 217
{3159, 1242, 6, 9 },
// AArch64::INSERT_MXIPZ_V_H - 218
{3192, 1251, 6, 9 },
// AArch64::INSERT_MXIPZ_V_Q - 219
{3225, 1260, 6, 9 },
// AArch64::INSERT_MXIPZ_V_S - 220
{3258, 1269, 6, 9 },
// AArch64::INSvi16gpr - 221
{3291, 1278, 4, 7 },
// AArch64::INSvi16lane - 222
{3310, 1285, 5, 7 },
// AArch64::INSvi32gpr - 223
{3337, 1292, 4, 7 },
// AArch64::INSvi32lane - 224
{3356, 1299, 5, 7 },
// AArch64::INSvi64gpr - 225
{3383, 1306, 4, 7 },
// AArch64::INSvi64lane - 226
{3402, 1313, 5, 7 },
// AArch64::INSvi8gpr - 227
{3429, 1320, 4, 7 },
// AArch64::INSvi8lane - 228
{3448, 1327, 5, 7 },
// AArch64::IRG - 229
{3475, 1334, 3, 6 },
// AArch64::ISB - 230
{3486, 1340, 1, 1 },
// AArch64::LD1B_2Z_IMM - 231
{3490, 1341, 4, 8 },
// AArch64::LD1B_4Z_IMM - 232
{3490, 1349, 4, 8 },
// AArch64::LD1B_D_IMM_REAL - 233
{3514, 1357, 4, 8 },
// AArch64::LD1B_H_IMM_REAL - 234
{3538, 1365, 4, 8 },
// AArch64::LD1B_IMM_REAL - 235
{3562, 1373, 4, 8 },
// AArch64::LD1B_S_IMM_REAL - 236
{3586, 1381, 4, 8 },
// AArch64::LD1B_VG2_M2ZPXI - 237
{3610, 1389, 4, 7 },
// AArch64::LD1B_VG4_M4ZPXI - 238
{3634, 1396, 4, 7 },
// AArch64::LD1D_2Z_IMM - 239
{3658, 1403, 4, 8 },
// AArch64::LD1D_4Z_IMM - 240
{3658, 1411, 4, 8 },
// AArch64::LD1D_IMM_REAL - 241
{3682, 1419, 4, 8 },
// AArch64::LD1D_Q_IMM - 242
{3706, 1427, 4, 6 },
// AArch64::LD1D_VG2_M2ZPXI - 243
{3730, 1433, 4, 7 },
// AArch64::LD1D_VG4_M4ZPXI - 244
{3730, 1440, 4, 7 },
// AArch64::LD1Fourv16b_POST - 245
{3754, 1447, 4, 7 },
// AArch64::LD1Fourv1d_POST - 246
{3774, 1454, 4, 7 },
// AArch64::LD1Fourv2d_POST - 247
{3794, 1461, 4, 7 },
// AArch64::LD1Fourv2s_POST - 248
{3814, 1468, 4, 7 },
// AArch64::LD1Fourv4h_POST - 249
{3834, 1475, 4, 7 },
// AArch64::LD1Fourv4s_POST - 250
{3854, 1482, 4, 7 },
// AArch64::LD1Fourv8b_POST - 251
{3874, 1489, 4, 7 },
// AArch64::LD1Fourv8h_POST - 252
{3894, 1496, 4, 7 },
// AArch64::LD1H_2Z_IMM - 253
{3914, 1503, 4, 8 },
// AArch64::LD1H_4Z_IMM - 254
{3914, 1511, 4, 8 },
// AArch64::LD1H_D_IMM_REAL - 255
{3938, 1519, 4, 8 },
// AArch64::LD1H_IMM_REAL - 256
{3962, 1527, 4, 8 },
// AArch64::LD1H_S_IMM_REAL - 257
{3986, 1535, 4, 8 },
// AArch64::LD1H_VG2_M2ZPXI - 258
{4010, 1543, 4, 7 },
// AArch64::LD1H_VG4_M4ZPXI - 259
{4034, 1550, 4, 7 },
// AArch64::LD1Onev16b_POST - 260
{4058, 1557, 4, 7 },
// AArch64::LD1Onev1d_POST - 261
{4078, 1564, 4, 7 },
// AArch64::LD1Onev2d_POST - 262
{4097, 1571, 4, 7 },
// AArch64::LD1Onev2s_POST - 263
{4117, 1578, 4, 7 },
// AArch64::LD1Onev4h_POST - 264
{4136, 1585, 4, 7 },
// AArch64::LD1Onev4s_POST - 265
{4155, 1592, 4, 7 },
// AArch64::LD1Onev8b_POST - 266
{4175, 1599, 4, 7 },
// AArch64::LD1Onev8h_POST - 267
{4194, 1606, 4, 7 },
// AArch64::LD1RB_D_IMM - 268
{4214, 1613, 4, 8 },
// AArch64::LD1RB_H_IMM - 269
{4239, 1621, 4, 8 },
// AArch64::LD1RB_IMM - 270
{4264, 1629, 4, 8 },
// AArch64::LD1RB_S_IMM - 271
{4289, 1637, 4, 8 },
// AArch64::LD1RD_IMM - 272
{4314, 1645, 4, 8 },
// AArch64::LD1RH_D_IMM - 273
{4339, 1653, 4, 8 },
// AArch64::LD1RH_IMM - 274
{4364, 1661, 4, 8 },
// AArch64::LD1RH_S_IMM - 275
{4389, 1669, 4, 8 },
// AArch64::LD1RO_B_IMM - 276
{4414, 1677, 4, 10 },
// AArch64::LD1RO_D_IMM - 277
{4440, 1687, 4, 10 },
// AArch64::LD1RO_H_IMM - 278
{4466, 1697, 4, 10 },
// AArch64::LD1RO_W_IMM - 279
{4492, 1707, 4, 10 },
// AArch64::LD1RQ_B_IMM - 280
{4518, 1717, 4, 8 },
// AArch64::LD1RQ_D_IMM - 281
{4544, 1725, 4, 8 },
// AArch64::LD1RQ_H_IMM - 282
{4570, 1733, 4, 8 },
// AArch64::LD1RQ_W_IMM - 283
{4596, 1741, 4, 8 },
// AArch64::LD1RSB_D_IMM - 284
{4622, 1749, 4, 8 },
// AArch64::LD1RSB_H_IMM - 285
{4648, 1757, 4, 8 },
// AArch64::LD1RSB_S_IMM - 286
{4674, 1765, 4, 8 },
// AArch64::LD1RSH_D_IMM - 287
{4700, 1773, 4, 8 },
// AArch64::LD1RSH_S_IMM - 288
{4726, 1781, 4, 8 },
// AArch64::LD1RSW_IMM - 289
{4752, 1789, 4, 8 },
// AArch64::LD1RW_D_IMM - 290
{4778, 1797, 4, 8 },
// AArch64::LD1RW_IMM - 291
{4803, 1805, 4, 8 },
// AArch64::LD1Rv16b_POST - 292
{4828, 1813, 4, 7 },
// AArch64::LD1Rv1d_POST - 293
{4848, 1820, 4, 7 },
// AArch64::LD1Rv2d_POST - 294
{4868, 1827, 4, 7 },
// AArch64::LD1Rv2s_POST - 295
{4888, 1834, 4, 7 },
// AArch64::LD1Rv4h_POST - 296
{4908, 1841, 4, 7 },
// AArch64::LD1Rv4s_POST - 297
{4928, 1848, 4, 7 },
// AArch64::LD1Rv8b_POST - 298
{4948, 1855, 4, 7 },
// AArch64::LD1Rv8h_POST - 299
{4968, 1862, 4, 7 },
// AArch64::LD1SB_D_IMM_REAL - 300
{4988, 1869, 4, 8 },
// AArch64::LD1SB_H_IMM_REAL - 301
{5013, 1877, 4, 8 },
// AArch64::LD1SB_S_IMM_REAL - 302
{5038, 1885, 4, 8 },
// AArch64::LD1SH_D_IMM_REAL - 303
{5063, 1893, 4, 8 },
// AArch64::LD1SH_S_IMM_REAL - 304
{5088, 1901, 4, 8 },
// AArch64::LD1SW_D_IMM_REAL - 305
{5113, 1909, 4, 8 },
// AArch64::LD1Threev16b_POST - 306
{5138, 1917, 4, 7 },
// AArch64::LD1Threev1d_POST - 307
{5158, 1924, 4, 7 },
// AArch64::LD1Threev2d_POST - 308
{5178, 1931, 4, 7 },
// AArch64::LD1Threev2s_POST - 309
{5198, 1938, 4, 7 },
// AArch64::LD1Threev4h_POST - 310
{5218, 1945, 4, 7 },
// AArch64::LD1Threev4s_POST - 311
{5238, 1952, 4, 7 },
// AArch64::LD1Threev8b_POST - 312
{5258, 1959, 4, 7 },
// AArch64::LD1Threev8h_POST - 313
{5278, 1966, 4, 7 },
// AArch64::LD1Twov16b_POST - 314
{5298, 1973, 4, 7 },
// AArch64::LD1Twov1d_POST - 315
{5318, 1980, 4, 7 },
// AArch64::LD1Twov2d_POST - 316
{5338, 1987, 4, 7 },
// AArch64::LD1Twov2s_POST - 317
{5358, 1994, 4, 7 },
// AArch64::LD1Twov4h_POST - 318
{5378, 2001, 4, 7 },
// AArch64::LD1Twov4s_POST - 319
{5398, 2008, 4, 7 },
// AArch64::LD1Twov8b_POST - 320
{5418, 2015, 4, 7 },
// AArch64::LD1Twov8h_POST - 321
{5438, 2022, 4, 7 },
// AArch64::LD1W_2Z_IMM - 322
{5458, 2029, 4, 8 },
// AArch64::LD1W_4Z_IMM - 323
{5458, 2037, 4, 8 },
// AArch64::LD1W_D_IMM_REAL - 324
{5482, 2045, 4, 8 },
// AArch64::LD1W_IMM_REAL - 325
{5506, 2053, 4, 8 },
// AArch64::LD1W_Q_IMM - 326
{5530, 2061, 4, 6 },
// AArch64::LD1W_VG2_M2ZPXI - 327
{5554, 2067, 4, 7 },
// AArch64::LD1W_VG4_M4ZPXI - 328
{5554, 2074, 4, 7 },
// AArch64::LD1_MXIPXX_H_B - 329
{5578, 2081, 6, 9 },
// AArch64::LD1_MXIPXX_H_D - 330
{5614, 2090, 6, 9 },
// AArch64::LD1_MXIPXX_H_H - 331
{5650, 2099, 6, 9 },
// AArch64::LD1_MXIPXX_H_Q - 332
{5686, 2108, 6, 9 },
// AArch64::LD1_MXIPXX_H_S - 333
{5722, 2117, 6, 9 },
// AArch64::LD1_MXIPXX_V_B - 334
{5758, 2126, 6, 9 },
// AArch64::LD1_MXIPXX_V_D - 335
{5794, 2135, 6, 9 },
// AArch64::LD1_MXIPXX_V_H - 336
{5830, 2144, 6, 9 },
// AArch64::LD1_MXIPXX_V_Q - 337
{5866, 2153, 6, 9 },
// AArch64::LD1_MXIPXX_V_S - 338
{5902, 2162, 6, 9 },
// AArch64::LD1i16_POST - 339
{5938, 2171, 6, 9 },
// AArch64::LD1i32_POST - 340
{5961, 2180, 6, 9 },
// AArch64::LD1i64_POST - 341
{5984, 2189, 6, 9 },
// AArch64::LD1i8_POST - 342
{6007, 2198, 6, 9 },
// AArch64::LD2B_IMM - 343
{6030, 2207, 4, 8 },
// AArch64::LD2D_IMM - 344
{6054, 2215, 4, 8 },
// AArch64::LD2H_IMM - 345
{6078, 2223, 4, 8 },
// AArch64::LD2Q_IMM - 346
{6102, 2231, 4, 8 },
// AArch64::LD2Rv16b_POST - 347
{6126, 2239, 4, 7 },
// AArch64::LD2Rv1d_POST - 348
{6146, 2246, 4, 7 },
// AArch64::LD2Rv2d_POST - 349
{6167, 2253, 4, 7 },
// AArch64::LD2Rv2s_POST - 350
{6188, 2260, 4, 7 },
// AArch64::LD2Rv4h_POST - 351
{6208, 2267, 4, 7 },
// AArch64::LD2Rv4s_POST - 352
{6228, 2274, 4, 7 },
// AArch64::LD2Rv8b_POST - 353
{6248, 2281, 4, 7 },
// AArch64::LD2Rv8h_POST - 354
{6268, 2288, 4, 7 },
// AArch64::LD2Twov16b_POST - 355
{6288, 2295, 4, 7 },
// AArch64::LD2Twov2d_POST - 356
{6308, 2302, 4, 7 },
// AArch64::LD2Twov2s_POST - 357
{6328, 2309, 4, 7 },
// AArch64::LD2Twov4h_POST - 358
{6348, 2316, 4, 7 },
// AArch64::LD2Twov4s_POST - 359
{6368, 2323, 4, 7 },
// AArch64::LD2Twov8b_POST - 360
{6388, 2330, 4, 7 },
// AArch64::LD2Twov8h_POST - 361
{6408, 2337, 4, 7 },
// AArch64::LD2W_IMM - 362
{6428, 2344, 4, 8 },
// AArch64::LD2i16_POST - 363
{6452, 2352, 6, 9 },
// AArch64::LD2i32_POST - 364
{6475, 2361, 6, 9 },
// AArch64::LD2i64_POST - 365
{6498, 2370, 6, 9 },
// AArch64::LD2i8_POST - 366
{6522, 2379, 6, 9 },
// AArch64::LD3B_IMM - 367
{6545, 2388, 4, 8 },
// AArch64::LD3D_IMM - 368
{6569, 2396, 4, 8 },
// AArch64::LD3H_IMM - 369
{6593, 2404, 4, 8 },
// AArch64::LD3Q_IMM - 370
{6617, 2412, 4, 8 },
// AArch64::LD3Rv16b_POST - 371
{6641, 2420, 4, 7 },
// AArch64::LD3Rv1d_POST - 372
{6661, 2427, 4, 7 },
// AArch64::LD3Rv2d_POST - 373
{6682, 2434, 4, 7 },
// AArch64::LD3Rv2s_POST - 374
{6703, 2441, 4, 7 },
// AArch64::LD3Rv4h_POST - 375
{6724, 2448, 4, 7 },
// AArch64::LD3Rv4s_POST - 376
{6744, 2455, 4, 7 },
// AArch64::LD3Rv8b_POST - 377
{6765, 2462, 4, 7 },
// AArch64::LD3Rv8h_POST - 378
{6785, 2469, 4, 7 },
// AArch64::LD3Threev16b_POST - 379
{6805, 2476, 4, 7 },
// AArch64::LD3Threev2d_POST - 380
{6825, 2483, 4, 7 },
// AArch64::LD3Threev2s_POST - 381
{6845, 2490, 4, 7 },
// AArch64::LD3Threev4h_POST - 382
{6865, 2497, 4, 7 },
// AArch64::LD3Threev4s_POST - 383
{6885, 2504, 4, 7 },
// AArch64::LD3Threev8b_POST - 384
{6905, 2511, 4, 7 },
// AArch64::LD3Threev8h_POST - 385
{6925, 2518, 4, 7 },
// AArch64::LD3W_IMM - 386
{6945, 2525, 4, 8 },
// AArch64::LD3i16_POST - 387
{6969, 2533, 6, 9 },
// AArch64::LD3i32_POST - 388
{6992, 2542, 6, 9 },
// AArch64::LD3i64_POST - 389
{7016, 2551, 6, 9 },
// AArch64::LD3i8_POST - 390
{7040, 2560, 6, 9 },
// AArch64::LD4B_IMM - 391
{7063, 2569, 4, 8 },
// AArch64::LD4D_IMM - 392
{7087, 2577, 4, 8 },
// AArch64::LD4Fourv16b_POST - 393
{7111, 2585, 4, 7 },
// AArch64::LD4Fourv2d_POST - 394
{7131, 2592, 4, 7 },
// AArch64::LD4Fourv2s_POST - 395
{7151, 2599, 4, 7 },
// AArch64::LD4Fourv4h_POST - 396
{7171, 2606, 4, 7 },
// AArch64::LD4Fourv4s_POST - 397
{7191, 2613, 4, 7 },
// AArch64::LD4Fourv8b_POST - 398
{7211, 2620, 4, 7 },
// AArch64::LD4Fourv8h_POST - 399
{7231, 2627, 4, 7 },
// AArch64::LD4H_IMM - 400
{7251, 2634, 4, 8 },
// AArch64::LD4Q_IMM - 401
{7275, 2642, 4, 8 },
// AArch64::LD4Rv16b_POST - 402
{7299, 2650, 4, 7 },
// AArch64::LD4Rv1d_POST - 403
{7319, 2657, 4, 7 },
// AArch64::LD4Rv2d_POST - 404
{7340, 2664, 4, 7 },
// AArch64::LD4Rv2s_POST - 405
{7361, 2671, 4, 7 },
// AArch64::LD4Rv4h_POST - 406
{7382, 2678, 4, 7 },
// AArch64::LD4Rv4s_POST - 407
{7402, 2685, 4, 7 },
// AArch64::LD4Rv8b_POST - 408
{7423, 2692, 4, 7 },
// AArch64::LD4Rv8h_POST - 409
{7443, 2699, 4, 7 },
// AArch64::LD4W_IMM - 410
{7463, 2706, 4, 8 },
// AArch64::LD4i16_POST - 411
{7487, 2714, 6, 9 },
// AArch64::LD4i32_POST - 412
{7510, 2723, 6, 9 },
// AArch64::LD4i64_POST - 413
{7534, 2732, 6, 9 },
// AArch64::LD4i8_POST - 414
{7558, 2741, 6, 9 },
// AArch64::LDADDB - 415
{7581, 2750, 3, 6 },
// AArch64::LDADDH - 416
{7597, 2756, 3, 6 },
// AArch64::LDADDLB - 417
{7613, 2762, 3, 6 },
// AArch64::LDADDLH - 418
{7630, 2768, 3, 6 },
// AArch64::LDADDLW - 419
{7647, 2774, 3, 6 },
// AArch64::LDADDLX - 420
{7647, 2780, 3, 6 },
// AArch64::LDADDW - 421
{7663, 2786, 3, 6 },
// AArch64::LDADDX - 422
{7663, 2792, 3, 6 },
// AArch64::LDAPURBi - 423
{7678, 2798, 3, 6 },
// AArch64::LDAPURHi - 424
{7695, 2804, 3, 6 },
// AArch64::LDAPURSBWi - 425
{7712, 2810, 3, 6 },
// AArch64::LDAPURSBXi - 426
{7712, 2816, 3, 6 },
// AArch64::LDAPURSHWi - 427
{7730, 2822, 3, 6 },
// AArch64::LDAPURSHXi - 428
{7730, 2828, 3, 6 },
// AArch64::LDAPURSWi - 429
{7748, 2834, 3, 6 },
// AArch64::LDAPURXi - 430
{7766, 2840, 3, 6 },
// AArch64::LDAPURbi - 431
{7766, 2846, 3, 9 },
// AArch64::LDAPURdi - 432
{7766, 2855, 3, 9 },
// AArch64::LDAPURhi - 433
{7766, 2864, 3, 9 },
// AArch64::LDAPURi - 434
{7766, 2873, 3, 6 },
// AArch64::LDAPURqi - 435
{7766, 2879, 3, 9 },
// AArch64::LDAPURsi - 436
{7766, 2888, 3, 9 },
// AArch64::LDCLRB - 437
{7782, 2897, 3, 6 },
// AArch64::LDCLRH - 438
{7798, 2903, 3, 6 },
// AArch64::LDCLRLB - 439
{7814, 2909, 3, 6 },
// AArch64::LDCLRLH - 440
{7831, 2915, 3, 6 },
// AArch64::LDCLRLW - 441
{7848, 2921, 3, 6 },
// AArch64::LDCLRLX - 442
{7848, 2927, 3, 6 },
// AArch64::LDCLRW - 443
{7864, 2933, 3, 6 },
// AArch64::LDCLRX - 444
{7864, 2939, 3, 6 },
// AArch64::LDEORB - 445
{7879, 2945, 3, 6 },
// AArch64::LDEORH - 446
{7895, 2951, 3, 6 },
// AArch64::LDEORLB - 447
{7911, 2957, 3, 6 },
// AArch64::LDEORLH - 448
{7928, 2963, 3, 6 },
// AArch64::LDEORLW - 449
{7945, 2969, 3, 6 },
// AArch64::LDEORLX - 450
{7945, 2975, 3, 6 },
// AArch64::LDEORW - 451
{7961, 2981, 3, 6 },
// AArch64::LDEORX - 452
{7961, 2987, 3, 6 },
// AArch64::LDFF1B_D_REAL - 453
{7976, 2993, 4, 7 },
// AArch64::LDFF1B_H_REAL - 454
{8002, 3000, 4, 7 },
// AArch64::LDFF1B_REAL - 455
{8028, 3007, 4, 7 },
// AArch64::LDFF1B_S_REAL - 456
{8054, 3014, 4, 7 },
// AArch64::LDFF1D_REAL - 457
{8080, 3021, 4, 7 },
// AArch64::LDFF1H_D_REAL - 458
{8106, 3028, 4, 7 },
// AArch64::LDFF1H_REAL - 459
{8132, 3035, 4, 7 },
// AArch64::LDFF1H_S_REAL - 460
{8158, 3042, 4, 7 },
// AArch64::LDFF1SB_D_REAL - 461
{8184, 3049, 4, 7 },
// AArch64::LDFF1SB_H_REAL - 462
{8211, 3056, 4, 7 },
// AArch64::LDFF1SB_S_REAL - 463
{8238, 3063, 4, 7 },
// AArch64::LDFF1SH_D_REAL - 464
{8265, 3070, 4, 7 },
// AArch64::LDFF1SH_S_REAL - 465
{8292, 3077, 4, 7 },
// AArch64::LDFF1SW_D_REAL - 466
{8319, 3084, 4, 7 },
// AArch64::LDFF1W_D_REAL - 467
{8346, 3091, 4, 7 },
// AArch64::LDFF1W_REAL - 468
{8372, 3098, 4, 7 },
// AArch64::LDG - 469
{8398, 3105, 4, 7 },
// AArch64::LDNF1B_D_IMM_REAL - 470
{8411, 3112, 4, 7 },
// AArch64::LDNF1B_H_IMM_REAL - 471
{8437, 3119, 4, 7 },
// AArch64::LDNF1B_IMM_REAL - 472
{8463, 3126, 4, 7 },
// AArch64::LDNF1B_S_IMM_REAL - 473
{8489, 3133, 4, 7 },
// AArch64::LDNF1D_IMM_REAL - 474
{8515, 3140, 4, 7 },
// AArch64::LDNF1H_D_IMM_REAL - 475
{8541, 3147, 4, 7 },
// AArch64::LDNF1H_IMM_REAL - 476
{8567, 3154, 4, 7 },
// AArch64::LDNF1H_S_IMM_REAL - 477
{8593, 3161, 4, 7 },
// AArch64::LDNF1SB_D_IMM_REAL - 478
{8619, 3168, 4, 7 },
// AArch64::LDNF1SB_H_IMM_REAL - 479
{8646, 3175, 4, 7 },
// AArch64::LDNF1SB_S_IMM_REAL - 480
{8673, 3182, 4, 7 },
// AArch64::LDNF1SH_D_IMM_REAL - 481
{8700, 3189, 4, 7 },
// AArch64::LDNF1SH_S_IMM_REAL - 482
{8727, 3196, 4, 7 },
// AArch64::LDNF1SW_D_IMM_REAL - 483
{8754, 3203, 4, 7 },
// AArch64::LDNF1W_D_IMM_REAL - 484
{8781, 3210, 4, 7 },
// AArch64::LDNF1W_IMM_REAL - 485
{8807, 3217, 4, 7 },
// AArch64::LDNPDi - 486
{8833, 3224, 4, 4 },
// AArch64::LDNPQi - 487
{8833, 3228, 4, 4 },
// AArch64::LDNPSi - 488
{8833, 3232, 4, 4 },
// AArch64::LDNPWi - 489
{8833, 3236, 4, 4 },
// AArch64::LDNPXi - 490
{8833, 3240, 4, 4 },
// AArch64::LDNT1B_2Z_IMM - 491
{8851, 3244, 4, 8 },
// AArch64::LDNT1B_4Z_IMM - 492
{8851, 3252, 4, 8 },
// AArch64::LDNT1B_VG2_M2ZPXI - 493
{8877, 3260, 4, 7 },
// AArch64::LDNT1B_VG4_M4ZPXI - 494
{8903, 3267, 4, 7 },
// AArch64::LDNT1B_ZRI - 495
{8929, 3274, 4, 8 },
// AArch64::LDNT1B_ZZR_D_REAL - 496
{8955, 3282, 4, 7 },
// AArch64::LDNT1B_ZZR_S_REAL - 497
{8983, 3289, 4, 7 },
// AArch64::LDNT1D_2Z_IMM - 498
{9011, 3296, 4, 8 },
// AArch64::LDNT1D_4Z_IMM - 499
{9011, 3304, 4, 8 },
// AArch64::LDNT1D_VG2_M2ZPXI - 500
{9037, 3312, 4, 7 },
// AArch64::LDNT1D_VG4_M4ZPXI - 501
{9037, 3319, 4, 7 },
// AArch64::LDNT1D_ZRI - 502
{9063, 3326, 4, 8 },
// AArch64::LDNT1D_ZZR_D_REAL - 503
{9089, 3334, 4, 7 },
// AArch64::LDNT1H_2Z_IMM - 504
{9117, 3341, 4, 8 },
// AArch64::LDNT1H_4Z_IMM - 505
{9117, 3349, 4, 8 },
// AArch64::LDNT1H_VG2_M2ZPXI - 506
{9143, 3357, 4, 7 },
// AArch64::LDNT1H_VG4_M4ZPXI - 507
{9169, 3364, 4, 7 },
// AArch64::LDNT1H_ZRI - 508
{9195, 3371, 4, 8 },
// AArch64::LDNT1H_ZZR_D_REAL - 509
{9221, 3379, 4, 7 },
// AArch64::LDNT1H_ZZR_S_REAL - 510
{9249, 3386, 4, 7 },
// AArch64::LDNT1SB_ZZR_D_REAL - 511
{9277, 3393, 4, 7 },
// AArch64::LDNT1SB_ZZR_S_REAL - 512
{9306, 3400, 4, 7 },
// AArch64::LDNT1SH_ZZR_D_REAL - 513
{9335, 3407, 4, 7 },
// AArch64::LDNT1SH_ZZR_S_REAL - 514
{9364, 3414, 4, 7 },
// AArch64::LDNT1SW_ZZR_D_REAL - 515
{9393, 3421, 4, 7 },
// AArch64::LDNT1W_2Z_IMM - 516
{9422, 3428, 4, 8 },
// AArch64::LDNT1W_4Z_IMM - 517
{9422, 3436, 4, 8 },
// AArch64::LDNT1W_VG2_M2ZPXI - 518
{9448, 3444, 4, 7 },
// AArch64::LDNT1W_VG4_M4ZPXI - 519
{9448, 3451, 4, 7 },
// AArch64::LDNT1W_ZRI - 520
{9474, 3458, 4, 8 },
// AArch64::LDNT1W_ZZR_D_REAL - 521
{9500, 3466, 4, 7 },
// AArch64::LDNT1W_ZZR_S_REAL - 522
{9528, 3473, 4, 7 },
// AArch64::LDPDi - 523
{9556, 3480, 4, 4 },
// AArch64::LDPQi - 524
{9556, 3484, 4, 4 },
// AArch64::LDPSWi - 525
{9573, 3488, 4, 4 },
// AArch64::LDPSi - 526
{9556, 3492, 4, 4 },
// AArch64::LDPWi - 527
{9556, 3496, 4, 4 },
// AArch64::LDPXi - 528
{9556, 3500, 4, 4 },
// AArch64::LDRAAindexed - 529
{9592, 3504, 3, 6 },
// AArch64::LDRABindexed - 530
{9607, 3510, 3, 6 },
// AArch64::LDRBBroX - 531
{9622, 3516, 5, 5 },
// AArch64::LDRBBui - 532
{9640, 3521, 3, 3 },
// AArch64::LDRBroX - 533
{9654, 3524, 5, 5 },
// AArch64::LDRBui - 534
{9671, 3529, 3, 3 },
// AArch64::LDRDroX - 535
{9654, 3532, 5, 5 },
// AArch64::LDRDui - 536
{9671, 3537, 3, 3 },
// AArch64::LDRHHroX - 537
{9684, 3540, 5, 5 },
// AArch64::LDRHHui - 538
{9702, 3545, 3, 3 },
// AArch64::LDRHroX - 539
{9654, 3548, 5, 5 },
// AArch64::LDRHui - 540
{9671, 3553, 3, 3 },
// AArch64::LDRQroX - 541
{9654, 3556, 5, 5 },
// AArch64::LDRQui - 542
{9671, 3561, 3, 3 },
// AArch64::LDRSBWroX - 543
{9716, 3564, 5, 5 },
// AArch64::LDRSBWui - 544
{9735, 3569, 3, 3 },
// AArch64::LDRSBXroX - 545
{9716, 3572, 5, 5 },
// AArch64::LDRSBXui - 546
{9735, 3577, 3, 3 },
// AArch64::LDRSHWroX - 547
{9750, 3580, 5, 5 },
// AArch64::LDRSHWui - 548
{9769, 3585, 3, 3 },
// AArch64::LDRSHXroX - 549
{9750, 3588, 5, 5 },
// AArch64::LDRSHXui - 550
{9769, 3593, 3, 3 },
// AArch64::LDRSWroX - 551
{9784, 3596, 5, 5 },
// AArch64::LDRSWui - 552
{9803, 3601, 3, 3 },
// AArch64::LDRSroX - 553
{9654, 3604, 5, 5 },
// AArch64::LDRSui - 554
{9671, 3609, 3, 3 },
// AArch64::LDRWroX - 555
{9654, 3612, 5, 5 },
// AArch64::LDRWui - 556
{9671, 3617, 3, 3 },
// AArch64::LDRXroX - 557
{9654, 3620, 5, 5 },
// AArch64::LDRXui - 558
{9671, 3625, 3, 3 },
// AArch64::LDR_PXI - 559
{9818, 3628, 3, 7 },
// AArch64::LDR_ZA - 560
{9833, 3635, 5, 8 },
// AArch64::LDR_ZXI - 561
{9818, 3643, 3, 7 },
// AArch64::LDSETB - 562
{9858, 3650, 3, 6 },
// AArch64::LDSETH - 563
{9874, 3656, 3, 6 },
// AArch64::LDSETLB - 564
{9890, 3662, 3, 6 },
// AArch64::LDSETLH - 565
{9907, 3668, 3, 6 },
// AArch64::LDSETLW - 566
{9924, 3674, 3, 6 },
// AArch64::LDSETLX - 567
{9924, 3680, 3, 6 },
// AArch64::LDSETW - 568
{9940, 3686, 3, 6 },
// AArch64::LDSETX - 569
{9940, 3692, 3, 6 },
// AArch64::LDSMAXB - 570
{9955, 3698, 3, 6 },
// AArch64::LDSMAXH - 571
{9972, 3704, 3, 6 },
// AArch64::LDSMAXLB - 572
{9989, 3710, 3, 6 },
// AArch64::LDSMAXLH - 573
{10007, 3716, 3, 6 },
// AArch64::LDSMAXLW - 574
{10025, 3722, 3, 6 },
// AArch64::LDSMAXLX - 575
{10025, 3728, 3, 6 },
// AArch64::LDSMAXW - 576
{10042, 3734, 3, 6 },
// AArch64::LDSMAXX - 577
{10042, 3740, 3, 6 },
// AArch64::LDSMINB - 578
{10058, 3746, 3, 6 },
// AArch64::LDSMINH - 579
{10075, 3752, 3, 6 },
// AArch64::LDSMINLB - 580
{10092, 3758, 3, 6 },
// AArch64::LDSMINLH - 581
{10110, 3764, 3, 6 },
// AArch64::LDSMINLW - 582
{10128, 3770, 3, 6 },
// AArch64::LDSMINLX - 583
{10128, 3776, 3, 6 },
// AArch64::LDSMINW - 584
{10145, 3782, 3, 6 },
// AArch64::LDSMINX - 585
{10145, 3788, 3, 6 },
// AArch64::LDTRBi - 586
{10161, 3794, 3, 3 },
// AArch64::LDTRHi - 587
{10176, 3797, 3, 3 },
// AArch64::LDTRSBWi - 588
{10191, 3800, 3, 3 },
// AArch64::LDTRSBXi - 589
{10191, 3803, 3, 3 },
// AArch64::LDTRSHWi - 590
{10207, 3806, 3, 3 },
// AArch64::LDTRSHXi - 591
{10207, 3809, 3, 3 },
// AArch64::LDTRSWi - 592
{10223, 3812, 3, 3 },
// AArch64::LDTRWi - 593
{10239, 3815, 3, 3 },
// AArch64::LDTRXi - 594
{10239, 3818, 3, 3 },
// AArch64::LDUMAXB - 595
{10253, 3821, 3, 6 },
// AArch64::LDUMAXH - 596
{10270, 3827, 3, 6 },
// AArch64::LDUMAXLB - 597
{10287, 3833, 3, 6 },
// AArch64::LDUMAXLH - 598
{10305, 3839, 3, 6 },
// AArch64::LDUMAXLW - 599
{10323, 3845, 3, 6 },
// AArch64::LDUMAXLX - 600
{10323, 3851, 3, 6 },
// AArch64::LDUMAXW - 601
{10340, 3857, 3, 6 },
// AArch64::LDUMAXX - 602
{10340, 3863, 3, 6 },
// AArch64::LDUMINB - 603
{10356, 3869, 3, 6 },
// AArch64::LDUMINH - 604
{10373, 3875, 3, 6 },
// AArch64::LDUMINLB - 605
{10390, 3881, 3, 6 },
// AArch64::LDUMINLH - 606
{10408, 3887, 3, 6 },
// AArch64::LDUMINLW - 607
{10426, 3893, 3, 6 },
// AArch64::LDUMINLX - 608
{10426, 3899, 3, 6 },
// AArch64::LDUMINW - 609
{10443, 3905, 3, 6 },
// AArch64::LDUMINX - 610
{10443, 3911, 3, 6 },
// AArch64::LDURBBi - 611
{10459, 3917, 3, 3 },
// AArch64::LDURBi - 612
{10474, 3920, 3, 3 },
// AArch64::LDURDi - 613
{10474, 3923, 3, 3 },
// AArch64::LDURHHi - 614
{10488, 3926, 3, 3 },
// AArch64::LDURHi - 615
{10474, 3929, 3, 3 },
// AArch64::LDURQi - 616
{10474, 3932, 3, 3 },
// AArch64::LDURSBWi - 617
{10503, 3935, 3, 3 },
// AArch64::LDURSBXi - 618
{10503, 3938, 3, 3 },
// AArch64::LDURSHWi - 619
{10519, 3941, 3, 3 },
// AArch64::LDURSHXi - 620
{10519, 3944, 3, 3 },
// AArch64::LDURSWi - 621
{10535, 3947, 3, 3 },
// AArch64::LDURSi - 622
{10474, 3950, 3, 3 },
// AArch64::LDURWi - 623
{10474, 3953, 3, 3 },
// AArch64::LDURXi - 624
{10474, 3956, 3, 3 },
// AArch64::MADDWrrr - 625
{10551, 3959, 4, 4 },
// AArch64::MADDXrrr - 626
{10551, 3963, 4, 4 },
// AArch64::MOVA_2ZMXI_H_B - 627
{10566, 3967, 4, 6 },
// AArch64::MOVA_2ZMXI_H_D - 628
{10591, 3973, 4, 6 },
// AArch64::MOVA_2ZMXI_H_H - 629
{10616, 3979, 4, 6 },
// AArch64::MOVA_2ZMXI_H_S - 630
{10641, 3985, 4, 6 },
// AArch64::MOVA_2ZMXI_V_B - 631
{10666, 3991, 4, 6 },
// AArch64::MOVA_2ZMXI_V_D - 632
{10691, 3997, 4, 6 },
// AArch64::MOVA_2ZMXI_V_H - 633
{10716, 4003, 4, 6 },
// AArch64::MOVA_2ZMXI_V_S - 634
{10741, 4009, 4, 6 },
// AArch64::MOVA_4ZMXI_H_B - 635
{10766, 4015, 4, 6 },
// AArch64::MOVA_4ZMXI_H_D - 636
{10791, 4021, 4, 6 },
// AArch64::MOVA_4ZMXI_H_H - 637
{10816, 4027, 4, 6 },
// AArch64::MOVA_4ZMXI_H_S - 638
{10841, 4033, 4, 6 },
// AArch64::MOVA_4ZMXI_V_B - 639
{10866, 4039, 4, 6 },
// AArch64::MOVA_4ZMXI_V_D - 640
{10891, 4045, 4, 6 },
// AArch64::MOVA_4ZMXI_V_H - 641
{10916, 4051, 4, 6 },
// AArch64::MOVA_4ZMXI_V_S - 642
{10941, 4057, 4, 6 },
// AArch64::MOVA_MXI2Z_H_B - 643
{10966, 4063, 5, 8 },
// AArch64::MOVA_MXI2Z_H_D - 644
{10991, 4071, 5, 8 },
// AArch64::MOVA_MXI2Z_H_H - 645
{11016, 4079, 5, 8 },
// AArch64::MOVA_MXI2Z_H_S - 646
{11041, 4087, 5, 8 },
// AArch64::MOVA_MXI2Z_V_B - 647
{11066, 4095, 5, 8 },
// AArch64::MOVA_MXI2Z_V_D - 648
{11091, 4103, 5, 8 },
// AArch64::MOVA_MXI2Z_V_H - 649
{11116, 4111, 5, 8 },
// AArch64::MOVA_MXI2Z_V_S - 650
{11141, 4119, 5, 8 },
// AArch64::MOVA_MXI4Z_H_B - 651
{11166, 4127, 5, 8 },
// AArch64::MOVA_MXI4Z_H_D - 652
{11191, 4135, 5, 8 },
// AArch64::MOVA_MXI4Z_H_H - 653
{11216, 4143, 5, 8 },
// AArch64::MOVA_MXI4Z_H_S - 654
{11241, 4151, 5, 8 },
// AArch64::MOVA_MXI4Z_V_B - 655
{11266, 4159, 5, 8 },
// AArch64::MOVA_MXI4Z_V_D - 656
{11291, 4167, 5, 8 },
// AArch64::MOVA_MXI4Z_V_H - 657
{11316, 4175, 5, 8 },
// AArch64::MOVA_MXI4Z_V_S - 658
{11341, 4183, 5, 8 },
// AArch64::MOVA_VG2_2ZMXI - 659
{11366, 4191, 4, 6 },
// AArch64::MOVA_VG2_MXI2Z - 660
{11397, 4197, 5, 8 },
// AArch64::MOVA_VG4_4ZMXI - 661
{11428, 4205, 4, 6 },
// AArch64::MOVA_VG4_MXI4Z - 662
{11459, 4211, 5, 8 },
// AArch64::MSRpstatesvcrImm1 - 663
{11490, 4219, 2, 5 },
{11498, 4224, 2, 5 },
{11509, 4229, 2, 5 },
{11520, 4234, 2, 5 },
{11527, 4239, 2, 5 },
{11537, 4244, 2, 5 },
// AArch64::MSUBWrrr - 669
{11547, 4249, 4, 4 },
// AArch64::MSUBXrrr - 670
{11547, 4253, 4, 4 },
// AArch64::NOTv16i8 - 671
{11563, 4257, 2, 2 },
// AArch64::NOTv8i8 - 672
{11586, 4259, 2, 2 },
// AArch64::ORNWrs - 673
{11607, 4261, 4, 4 },
{11618, 4265, 4, 3 },
{11633, 4268, 4, 4 },
// AArch64::ORNXrs - 676
{11607, 4272, 4, 4 },
{11618, 4276, 4, 3 },
{11633, 4279, 4, 4 },
// AArch64::ORRS_PPzPP - 679
{11648, 4283, 4, 8 },
// AArch64::ORRWrs - 680
{11664, 4291, 4, 4 },
{11675, 4295, 4, 4 },
// AArch64::ORRXrs - 682
{11664, 4299, 4, 4 },
{11675, 4303, 4, 4 },
// AArch64::ORR_PPzPP - 684
{11690, 4307, 4, 8 },
// AArch64::ORR_ZI - 685
{11705, 4315, 3, 7 },
{11726, 4322, 3, 7 },
{11747, 4329, 3, 7 },
// AArch64::ORR_ZZZ - 688
{11768, 4336, 3, 7 },
// AArch64::ORRv16i8 - 689
{11783, 4343, 3, 3 },
// AArch64::ORRv8i8 - 690
{11806, 4346, 3, 3 },
// AArch64::PACIA1716 - 691
{11827, 4349, 0, 3 },
// AArch64::PACIASP - 692
{11837, 4352, 0, 3 },
// AArch64::PACIAZ - 693
{11845, 4355, 0, 3 },
// AArch64::PACIB1716 - 694
{11852, 4358, 0, 3 },
// AArch64::PACIBSP - 695
{11862, 4361, 0, 3 },
// AArch64::PACIBZ - 696
{11870, 4364, 0, 3 },
// AArch64::PMOV_PZI_B - 697
{11877, 4367, 3, 7 },
// AArch64::PMOV_ZIP_B - 698
{11893, 4374, 4, 8 },
// AArch64::PRFB_D_PZI - 699
{11909, 4382, 4, 7 },
// AArch64::PRFB_PRI - 700
{11933, 4389, 4, 8 },
// AArch64::PRFB_S_PZI - 701
{11955, 4397, 4, 7 },
// AArch64::PRFD_D_PZI - 702
{11979, 4404, 4, 7 },
// AArch64::PRFD_PRI - 703
{12003, 4411, 4, 8 },
// AArch64::PRFD_S_PZI - 704
{12025, 4419, 4, 7 },
// AArch64::PRFH_D_PZI - 705
{12049, 4426, 4, 7 },
// AArch64::PRFH_PRI - 706
{12073, 4433, 4, 8 },
// AArch64::PRFH_S_PZI - 707
{12095, 4441, 4, 7 },
// AArch64::PRFMroX - 708
{12119, 4448, 5, 5 },
// AArch64::PRFMui - 709
{12139, 4453, 3, 3 },
// AArch64::PRFUMi - 710
{12155, 4456, 3, 3 },
// AArch64::PRFW_D_PZI - 711
{12172, 4459, 4, 7 },
// AArch64::PRFW_PRI - 712
{12196, 4466, 4, 8 },
// AArch64::PRFW_S_PZI - 713
{12218, 4474, 4, 7 },
// AArch64::PTRUES_B - 714
{12242, 4481, 2, 6 },
// AArch64::PTRUES_D - 715
{12254, 4487, 2, 6 },
// AArch64::PTRUES_H - 716
{12266, 4493, 2, 6 },
// AArch64::PTRUES_S - 717
{12278, 4499, 2, 6 },
// AArch64::PTRUE_B - 718
{12290, 4505, 2, 6 },
// AArch64::PTRUE_D - 719
{12301, 4511, 2, 6 },
// AArch64::PTRUE_H - 720
{12312, 4517, 2, 6 },
// AArch64::PTRUE_S - 721
{12323, 4523, 2, 6 },
// AArch64::RET - 722
{12334, 4529, 1, 1 },
// AArch64::SBCSWr - 723
{12338, 4530, 3, 3 },
// AArch64::SBCSXr - 724
{12338, 4533, 3, 3 },
// AArch64::SBCWr - 725
{12350, 4536, 3, 3 },
// AArch64::SBCXr - 726
{12350, 4539, 3, 3 },
// AArch64::SBFMWri - 727
{12361, 4542, 4, 4 },
{12376, 4546, 4, 4 },
{12388, 4550, 4, 4 },
// AArch64::SBFMXri - 730
{12361, 4554, 4, 4 },
{12376, 4558, 4, 4 },
{12388, 4562, 4, 4 },
{12400, 4566, 4, 4 },
// AArch64::SEL_PPPP - 734
{12412, 4570, 4, 8 },
// AArch64::SEL_ZPZZ_B - 735
{12412, 4578, 4, 8 },
// AArch64::SEL_ZPZZ_D - 736
{12435, 4586, 4, 8 },
// AArch64::SEL_ZPZZ_H - 737
{12458, 4594, 4, 8 },
// AArch64::SEL_ZPZZ_S - 738
{12481, 4602, 4, 8 },
// AArch64::SMADDLrrr - 739
{12504, 4610, 4, 4 },
// AArch64::SMSUBLrrr - 740
{12521, 4614, 4, 4 },
// AArch64::SQDECB_XPiI - 741
{12539, 4618, 4, 8 },
{12549, 4626, 4, 8 },
// AArch64::SQDECB_XPiWdI - 743
{12565, 4634, 4, 8 },
{12581, 4642, 4, 8 },
// AArch64::SQDECD_XPiI - 745
{12603, 4650, 4, 8 },
{12613, 4658, 4, 8 },
// AArch64::SQDECD_XPiWdI - 747
{12629, 4666, 4, 8 },
{12645, 4674, 4, 8 },
// AArch64::SQDECD_ZPiI - 749
{12667, 4682, 4, 8 },
{12679, 4690, 4, 8 },
// AArch64::SQDECH_XPiI - 751
{12697, 4698, 4, 8 },
{12707, 4706, 4, 8 },
// AArch64::SQDECH_XPiWdI - 753
{12723, 4714, 4, 8 },
{12739, 4722, 4, 8 },
// AArch64::SQDECH_ZPiI - 755
{12761, 4730, 4, 8 },
{12773, 4738, 4, 8 },
// AArch64::SQDECW_XPiI - 757
{12791, 4746, 4, 8 },
{12801, 4754, 4, 8 },
// AArch64::SQDECW_XPiWdI - 759
{12817, 4762, 4, 8 },
{12833, 4770, 4, 8 },
// AArch64::SQDECW_ZPiI - 761
{12855, 4778, 4, 8 },
{12867, 4786, 4, 8 },
// AArch64::SQINCB_XPiI - 763
{12885, 4794, 4, 8 },
{12895, 4802, 4, 8 },
// AArch64::SQINCB_XPiWdI - 765
{12911, 4810, 4, 8 },
{12927, 4818, 4, 8 },
// AArch64::SQINCD_XPiI - 767
{12949, 4826, 4, 8 },
{12959, 4834, 4, 8 },
// AArch64::SQINCD_XPiWdI - 769
{12975, 4842, 4, 8 },
{12991, 4850, 4, 8 },
// AArch64::SQINCD_ZPiI - 771
{13013, 4858, 4, 8 },
{13025, 4866, 4, 8 },
// AArch64::SQINCH_XPiI - 773
{13043, 4874, 4, 8 },
{13053, 4882, 4, 8 },
// AArch64::SQINCH_XPiWdI - 775
{13069, 4890, 4, 8 },
{13085, 4898, 4, 8 },
// AArch64::SQINCH_ZPiI - 777
{13107, 4906, 4, 8 },
{13119, 4914, 4, 8 },
// AArch64::SQINCW_XPiI - 779
{13137, 4922, 4, 8 },
{13147, 4930, 4, 8 },
// AArch64::SQINCW_XPiWdI - 781
{13163, 4938, 4, 8 },
{13179, 4946, 4, 8 },
// AArch64::SQINCW_ZPiI - 783
{13201, 4954, 4, 8 },
{13213, 4962, 4, 8 },
// AArch64::SST1B_D_IMM - 785
{13231, 4970, 4, 7 },
// AArch64::SST1B_S_IMM - 786
{13255, 4977, 4, 7 },
// AArch64::SST1D_IMM - 787
{13279, 4984, 4, 7 },
// AArch64::SST1H_D_IMM - 788
{13303, 4991, 4, 7 },
// AArch64::SST1H_S_IMM - 789
{13327, 4998, 4, 7 },
// AArch64::SST1Q - 790
{13351, 5005, 4, 6 },
// AArch64::SST1W_D_IMM - 791
{13375, 5011, 4, 7 },
// AArch64::SST1W_IMM - 792
{13399, 5018, 4, 7 },
// AArch64::ST1B_2Z_IMM - 793
{13423, 5025, 4, 8 },
// AArch64::ST1B_4Z_IMM - 794
{13423, 5033, 4, 8 },
// AArch64::ST1B_D_IMM - 795
{13445, 5041, 4, 8 },
// AArch64::ST1B_H_IMM - 796
{13467, 5049, 4, 8 },
// AArch64::ST1B_IMM - 797
{13489, 5057, 4, 8 },
// AArch64::ST1B_S_IMM - 798
{13511, 5065, 4, 8 },
// AArch64::ST1B_VG2_M2ZPXI - 799
{13533, 5073, 4, 7 },
// AArch64::ST1B_VG4_M4ZPXI - 800
{13555, 5080, 4, 7 },
// AArch64::ST1D_2Z_IMM - 801
{13577, 5087, 4, 8 },
// AArch64::ST1D_4Z_IMM - 802
{13577, 5095, 4, 8 },
// AArch64::ST1D_IMM - 803
{13599, 5103, 4, 8 },
// AArch64::ST1D_Q_IMM - 804
{13621, 5111, 4, 6 },
// AArch64::ST1D_VG2_M2ZPXI - 805
{13643, 5117, 4, 7 },
// AArch64::ST1D_VG4_M4ZPXI - 806
{13643, 5124, 4, 7 },
// AArch64::ST1Fourv16b_POST - 807
{13665, 5131, 4, 7 },
// AArch64::ST1Fourv1d_POST - 808
{13685, 5138, 4, 7 },
// AArch64::ST1Fourv2d_POST - 809
{13705, 5145, 4, 7 },
// AArch64::ST1Fourv2s_POST - 810
{13725, 5152, 4, 7 },
// AArch64::ST1Fourv4h_POST - 811
{13745, 5159, 4, 7 },
// AArch64::ST1Fourv4s_POST - 812
{13765, 5166, 4, 7 },
// AArch64::ST1Fourv8b_POST - 813
{13785, 5173, 4, 7 },
// AArch64::ST1Fourv8h_POST - 814
{13805, 5180, 4, 7 },
// AArch64::ST1H_2Z_IMM - 815
{13825, 5187, 4, 8 },
// AArch64::ST1H_4Z_IMM - 816
{13825, 5195, 4, 8 },
// AArch64::ST1H_D_IMM - 817
{13847, 5203, 4, 8 },
// AArch64::ST1H_IMM - 818
{13869, 5211, 4, 8 },
// AArch64::ST1H_S_IMM - 819
{13891, 5219, 4, 8 },
// AArch64::ST1H_VG2_M2ZPXI - 820
{13913, 5227, 4, 7 },
// AArch64::ST1H_VG4_M4ZPXI - 821
{13935, 5234, 4, 7 },
// AArch64::ST1Onev16b_POST - 822
{13957, 5241, 4, 7 },
// AArch64::ST1Onev1d_POST - 823
{13977, 5248, 4, 7 },
// AArch64::ST1Onev2d_POST - 824
{13996, 5255, 4, 7 },
// AArch64::ST1Onev2s_POST - 825
{14016, 5262, 4, 7 },
// AArch64::ST1Onev4h_POST - 826
{14035, 5269, 4, 7 },
// AArch64::ST1Onev4s_POST - 827
{14054, 5276, 4, 7 },
// AArch64::ST1Onev8b_POST - 828
{14074, 5283, 4, 7 },
// AArch64::ST1Onev8h_POST - 829
{14093, 5290, 4, 7 },
// AArch64::ST1Threev16b_POST - 830
{14113, 5297, 4, 7 },
// AArch64::ST1Threev1d_POST - 831
{14133, 5304, 4, 7 },
// AArch64::ST1Threev2d_POST - 832
{14153, 5311, 4, 7 },
// AArch64::ST1Threev2s_POST - 833
{14173, 5318, 4, 7 },
// AArch64::ST1Threev4h_POST - 834
{14193, 5325, 4, 7 },
// AArch64::ST1Threev4s_POST - 835
{14213, 5332, 4, 7 },
// AArch64::ST1Threev8b_POST - 836
{14233, 5339, 4, 7 },
// AArch64::ST1Threev8h_POST - 837
{14253, 5346, 4, 7 },
// AArch64::ST1Twov16b_POST - 838
{14273, 5353, 4, 7 },
// AArch64::ST1Twov1d_POST - 839
{14293, 5360, 4, 7 },
// AArch64::ST1Twov2d_POST - 840
{14313, 5367, 4, 7 },
// AArch64::ST1Twov2s_POST - 841
{14333, 5374, 4, 7 },
// AArch64::ST1Twov4h_POST - 842
{14353, 5381, 4, 7 },
// AArch64::ST1Twov4s_POST - 843
{14373, 5388, 4, 7 },
// AArch64::ST1Twov8b_POST - 844
{14393, 5395, 4, 7 },
// AArch64::ST1Twov8h_POST - 845
{14413, 5402, 4, 7 },
// AArch64::ST1W_2Z_IMM - 846
{14433, 5409, 4, 8 },
// AArch64::ST1W_4Z_IMM - 847
{14433, 5417, 4, 8 },
// AArch64::ST1W_D_IMM - 848
{14455, 5425, 4, 8 },
// AArch64::ST1W_IMM - 849
{14477, 5433, 4, 8 },
// AArch64::ST1W_Q_IMM - 850
{14499, 5441, 4, 6 },
// AArch64::ST1W_VG2_M2ZPXI - 851
{14521, 5447, 4, 7 },
// AArch64::ST1W_VG4_M4ZPXI - 852
{14521, 5454, 4, 7 },
// AArch64::ST1_MXIPXX_H_B - 853
{14543, 5461, 6, 9 },
// AArch64::ST1_MXIPXX_H_D - 854
{14577, 5470, 6, 9 },
// AArch64::ST1_MXIPXX_H_H - 855
{14611, 5479, 6, 9 },
// AArch64::ST1_MXIPXX_H_Q - 856
{14645, 5488, 6, 9 },
// AArch64::ST1_MXIPXX_H_S - 857
{14679, 5497, 6, 9 },
// AArch64::ST1_MXIPXX_V_B - 858
{14713, 5506, 6, 9 },
// AArch64::ST1_MXIPXX_V_D - 859
{14747, 5515, 6, 9 },
// AArch64::ST1_MXIPXX_V_H - 860
{14781, 5524, 6, 9 },
// AArch64::ST1_MXIPXX_V_Q - 861
{14815, 5533, 6, 9 },
// AArch64::ST1_MXIPXX_V_S - 862
{14849, 5542, 6, 9 },
// AArch64::ST1i16_POST - 863
{14883, 5551, 5, 8 },
// AArch64::ST1i32_POST - 864
{14906, 5559, 5, 8 },
// AArch64::ST1i64_POST - 865
{14929, 5567, 5, 8 },
// AArch64::ST1i8_POST - 866
{14952, 5575, 5, 8 },
// AArch64::ST2B_IMM - 867
{14975, 5583, 4, 8 },
// AArch64::ST2D_IMM - 868
{14997, 5591, 4, 8 },
// AArch64::ST2GOffset - 869
{15019, 5599, 3, 6 },
// AArch64::ST2H_IMM - 870
{15033, 5605, 4, 8 },
// AArch64::ST2Q_IMM - 871
{15055, 5613, 4, 8 },
// AArch64::ST2Twov16b_POST - 872
{15077, 5621, 4, 7 },
// AArch64::ST2Twov2d_POST - 873
{15097, 5628, 4, 7 },
// AArch64::ST2Twov2s_POST - 874
{15117, 5635, 4, 7 },
// AArch64::ST2Twov4h_POST - 875
{15137, 5642, 4, 7 },
// AArch64::ST2Twov4s_POST - 876
{15157, 5649, 4, 7 },
// AArch64::ST2Twov8b_POST - 877
{15177, 5656, 4, 7 },
// AArch64::ST2Twov8h_POST - 878
{15197, 5663, 4, 7 },
// AArch64::ST2W_IMM - 879
{15217, 5670, 4, 8 },
// AArch64::ST2i16_POST - 880
{15239, 5678, 5, 8 },
// AArch64::ST2i32_POST - 881
{15262, 5686, 5, 8 },
// AArch64::ST2i64_POST - 882
{15285, 5694, 5, 8 },
// AArch64::ST2i8_POST - 883
{15309, 5702, 5, 8 },
// AArch64::ST3B_IMM - 884
{15332, 5710, 4, 8 },
// AArch64::ST3D_IMM - 885
{15354, 5718, 4, 8 },
// AArch64::ST3H_IMM - 886
{15376, 5726, 4, 8 },
// AArch64::ST3Q_IMM - 887
{15398, 5734, 4, 8 },
// AArch64::ST3Threev16b_POST - 888
{15420, 5742, 4, 7 },
// AArch64::ST3Threev2d_POST - 889
{15440, 5749, 4, 7 },
// AArch64::ST3Threev2s_POST - 890
{15460, 5756, 4, 7 },
// AArch64::ST3Threev4h_POST - 891
{15480, 5763, 4, 7 },
// AArch64::ST3Threev4s_POST - 892
{15500, 5770, 4, 7 },
// AArch64::ST3Threev8b_POST - 893
{15520, 5777, 4, 7 },
// AArch64::ST3Threev8h_POST - 894
{15540, 5784, 4, 7 },
// AArch64::ST3W_IMM - 895
{15560, 5791, 4, 8 },
// AArch64::ST3i16_POST - 896
{15582, 5799, 5, 8 },
// AArch64::ST3i32_POST - 897
{15605, 5807, 5, 8 },
// AArch64::ST3i64_POST - 898
{15629, 5815, 5, 8 },
// AArch64::ST3i8_POST - 899
{15653, 5823, 5, 8 },
// AArch64::ST4B_IMM - 900
{15676, 5831, 4, 8 },
// AArch64::ST4D_IMM - 901
{15698, 5839, 4, 8 },
// AArch64::ST4Fourv16b_POST - 902
{15720, 5847, 4, 7 },
// AArch64::ST4Fourv2d_POST - 903
{15740, 5854, 4, 7 },
// AArch64::ST4Fourv2s_POST - 904
{15760, 5861, 4, 7 },
// AArch64::ST4Fourv4h_POST - 905
{15780, 5868, 4, 7 },
// AArch64::ST4Fourv4s_POST - 906
{15800, 5875, 4, 7 },
// AArch64::ST4Fourv8b_POST - 907
{15820, 5882, 4, 7 },
// AArch64::ST4Fourv8h_POST - 908
{15840, 5889, 4, 7 },
// AArch64::ST4H_IMM - 909
{15860, 5896, 4, 8 },
// AArch64::ST4Q_IMM - 910
{15882, 5904, 4, 8 },
// AArch64::ST4W_IMM - 911
{15904, 5912, 4, 8 },
// AArch64::ST4i16_POST - 912
{15926, 5920, 5, 8 },
// AArch64::ST4i32_POST - 913
{15949, 5928, 5, 8 },
// AArch64::ST4i64_POST - 914
{15973, 5936, 5, 8 },
// AArch64::ST4i8_POST - 915
{15997, 5944, 5, 8 },
// AArch64::STGOffset - 916
{16020, 5952, 3, 6 },
// AArch64::STGPi - 917
{16033, 5958, 4, 7 },
// AArch64::STLURBi - 918
{16051, 5965, 3, 6 },
// AArch64::STLURHi - 919
{16067, 5971, 3, 6 },
// AArch64::STLURWi - 920
{16083, 5977, 3, 6 },
// AArch64::STLURXi - 921
{16083, 5983, 3, 6 },
// AArch64::STLURbi - 922
{16083, 5989, 3, 9 },
// AArch64::STLURdi - 923
{16083, 5998, 3, 9 },
// AArch64::STLURhi - 924
{16083, 6007, 3, 9 },
// AArch64::STLURqi - 925
{16083, 6016, 3, 9 },
// AArch64::STLURsi - 926
{16083, 6025, 3, 9 },
// AArch64::STNPDi - 927
{16098, 6034, 4, 4 },
// AArch64::STNPQi - 928
{16098, 6038, 4, 4 },
// AArch64::STNPSi - 929
{16098, 6042, 4, 4 },
// AArch64::STNPWi - 930
{16098, 6046, 4, 4 },
// AArch64::STNPXi - 931
{16098, 6050, 4, 4 },
// AArch64::STNT1B_2Z_IMM - 932
{16116, 6054, 4, 8 },
// AArch64::STNT1B_4Z_IMM - 933
{16116, 6062, 4, 8 },
// AArch64::STNT1B_VG2_M2ZPXI - 934
{16140, 6070, 4, 7 },
// AArch64::STNT1B_VG4_M4ZPXI - 935
{16164, 6077, 4, 7 },
// AArch64::STNT1B_ZRI - 936
{16188, 6084, 4, 8 },
// AArch64::STNT1B_ZZR_D_REAL - 937
{16212, 6092, 4, 7 },
// AArch64::STNT1B_ZZR_S_REAL - 938
{16238, 6099, 4, 7 },
// AArch64::STNT1D_2Z_IMM - 939
{16264, 6106, 4, 8 },
// AArch64::STNT1D_4Z_IMM - 940
{16264, 6114, 4, 8 },
// AArch64::STNT1D_VG2_M2ZPXI - 941
{16288, 6122, 4, 7 },
// AArch64::STNT1D_VG4_M4ZPXI - 942
{16288, 6129, 4, 7 },
// AArch64::STNT1D_ZRI - 943
{16312, 6136, 4, 8 },
// AArch64::STNT1D_ZZR_D_REAL - 944
{16336, 6144, 4, 7 },
// AArch64::STNT1H_2Z_IMM - 945
{16362, 6151, 4, 8 },
// AArch64::STNT1H_4Z_IMM - 946
{16362, 6159, 4, 8 },
// AArch64::STNT1H_VG2_M2ZPXI - 947
{16386, 6167, 4, 7 },
// AArch64::STNT1H_VG4_M4ZPXI - 948
{16410, 6174, 4, 7 },
// AArch64::STNT1H_ZRI - 949
{16434, 6181, 4, 8 },
// AArch64::STNT1H_ZZR_D_REAL - 950
{16458, 6189, 4, 7 },
// AArch64::STNT1H_ZZR_S_REAL - 951
{16484, 6196, 4, 7 },
// AArch64::STNT1W_2Z_IMM - 952
{16510, 6203, 4, 8 },
// AArch64::STNT1W_4Z_IMM - 953
{16510, 6211, 4, 8 },
// AArch64::STNT1W_VG2_M2ZPXI - 954
{16534, 6219, 4, 7 },
// AArch64::STNT1W_VG4_M4ZPXI - 955
{16534, 6226, 4, 7 },
// AArch64::STNT1W_ZRI - 956
{16558, 6233, 4, 8 },
// AArch64::STNT1W_ZZR_D_REAL - 957
{16582, 6241, 4, 7 },
// AArch64::STNT1W_ZZR_S_REAL - 958
{16608, 6248, 4, 7 },
// AArch64::STPDi - 959
{16634, 6255, 4, 4 },
// AArch64::STPQi - 960
{16634, 6259, 4, 4 },
// AArch64::STPSi - 961
{16634, 6263, 4, 4 },
// AArch64::STPWi - 962
{16634, 6267, 4, 4 },
// AArch64::STPXi - 963
{16634, 6271, 4, 4 },
// AArch64::STRBBroX - 964
{16651, 6275, 5, 5 },
// AArch64::STRBBui - 965
{16669, 6280, 3, 3 },
// AArch64::STRBroX - 966
{16683, 6283, 5, 5 },
// AArch64::STRBui - 967
{16700, 6288, 3, 3 },
// AArch64::STRDroX - 968
{16683, 6291, 5, 5 },
// AArch64::STRDui - 969
{16700, 6296, 3, 3 },
// AArch64::STRHHroX - 970
{16713, 6299, 5, 5 },
// AArch64::STRHHui - 971
{16731, 6304, 3, 3 },
// AArch64::STRHroX - 972
{16683, 6307, 5, 5 },
// AArch64::STRHui - 973
{16700, 6312, 3, 3 },
// AArch64::STRQroX - 974
{16683, 6315, 5, 5 },
// AArch64::STRQui - 975
{16700, 6320, 3, 3 },
// AArch64::STRSroX - 976
{16683, 6323, 5, 5 },
// AArch64::STRSui - 977
{16700, 6328, 3, 3 },
// AArch64::STRWroX - 978
{16683, 6331, 5, 5 },
// AArch64::STRWui - 979
{16700, 6336, 3, 3 },
// AArch64::STRXroX - 980
{16683, 6339, 5, 5 },
// AArch64::STRXui - 981
{16700, 6344, 3, 3 },
// AArch64::STR_PXI - 982
{16745, 6347, 3, 7 },
// AArch64::STR_ZA - 983
{16760, 6354, 5, 8 },
// AArch64::STR_ZXI - 984
{16745, 6362, 3, 7 },
// AArch64::STTRBi - 985
{16785, 6369, 3, 3 },
// AArch64::STTRHi - 986
{16800, 6372, 3, 3 },
// AArch64::STTRWi - 987
{16815, 6375, 3, 3 },
// AArch64::STTRXi - 988
{16815, 6378, 3, 3 },
// AArch64::STURBBi - 989
{16829, 6381, 3, 3 },
// AArch64::STURBi - 990
{16844, 6384, 3, 3 },
// AArch64::STURDi - 991
{16844, 6387, 3, 3 },
// AArch64::STURHHi - 992
{16858, 6390, 3, 3 },
// AArch64::STURHi - 993
{16844, 6393, 3, 3 },
// AArch64::STURQi - 994
{16844, 6396, 3, 3 },
// AArch64::STURSi - 995
{16844, 6399, 3, 3 },
// AArch64::STURWi - 996
{16844, 6402, 3, 3 },
// AArch64::STURXi - 997
{16844, 6405, 3, 3 },
// AArch64::STZ2GOffset - 998
{16873, 6408, 3, 6 },
// AArch64::STZGOffset - 999
{16888, 6414, 3, 6 },
// AArch64::SUBSWri - 1000
{16902, 6420, 4, 2 },
// AArch64::SUBSWrs - 1001
{16915, 6422, 4, 4 },
{16926, 6426, 4, 3 },
{16941, 6429, 4, 4 },
{16953, 6433, 4, 3 },
{16969, 6436, 4, 4 },
// AArch64::SUBSWrx - 1006
{16915, 6440, 4, 4 },
{16985, 6444, 4, 3 },
{16969, 6447, 4, 4 },
// AArch64::SUBSXri - 1009
{16902, 6451, 4, 2 },
// AArch64::SUBSXrs - 1010
{16915, 6453, 4, 4 },
{16926, 6457, 4, 3 },
{16941, 6460, 4, 4 },
{16953, 6464, 4, 3 },
{16969, 6467, 4, 4 },
// AArch64::SUBSXrx - 1015
{16985, 6471, 4, 3 },
// AArch64::SUBSXrx64 - 1016
{16915, 6474, 4, 4 },
{16985, 6478, 4, 3 },
{16969, 6481, 4, 4 },
// AArch64::SUBWrs - 1019
{17000, 6485, 4, 4 },
{17011, 6489, 4, 3 },
{17026, 6492, 4, 4 },
// AArch64::SUBWrx - 1022
{17026, 6496, 4, 4 },
{17026, 6500, 4, 4 },
// AArch64::SUBXrs - 1024
{17000, 6504, 4, 4 },
{17011, 6508, 4, 3 },
{17026, 6511, 4, 4 },
// AArch64::SUBXrx64 - 1027
{17026, 6515, 4, 4 },
{17026, 6519, 4, 4 },
// AArch64::SYSPxt_XZR - 1029
{17041, 6523, 5, 8 },
// AArch64::SYSxt - 1030
{17065, 6531, 5, 5 },
// AArch64::UBFMWri - 1031
{17088, 6536, 4, 4 },
{17103, 6540, 4, 4 },
{17115, 6544, 4, 4 },
// AArch64::UBFMXri - 1034
{17088, 6548, 4, 4 },
{17103, 6552, 4, 4 },
{17115, 6556, 4, 4 },
{17127, 6560, 4, 4 },
// AArch64::UMADDLrrr - 1038
{17139, 6564, 4, 4 },
// AArch64::UMOVvi32 - 1039
{17156, 6568, 3, 5 },
// AArch64::UMOVvi32_idx0 - 1040
{17156, 6573, 3, 6 },
// AArch64::UMOVvi64 - 1041
{17175, 6579, 3, 5 },
// AArch64::UMOVvi64_idx0 - 1042
{17175, 6584, 3, 6 },
// AArch64::UMSUBLrrr - 1043
{17194, 6590, 4, 4 },
// AArch64::UQDECB_WPiI - 1044
{17212, 6594, 4, 8 },
{17222, 6602, 4, 8 },
// AArch64::UQDECB_XPiI - 1046
{17212, 6610, 4, 8 },
{17222, 6618, 4, 8 },
// AArch64::UQDECD_WPiI - 1048
{17238, 6626, 4, 8 },
{17248, 6634, 4, 8 },
// AArch64::UQDECD_XPiI - 1050
{17238, 6642, 4, 8 },
{17248, 6650, 4, 8 },
// AArch64::UQDECD_ZPiI - 1052
{17264, 6658, 4, 8 },
{17276, 6666, 4, 8 },
// AArch64::UQDECH_WPiI - 1054
{17294, 6674, 4, 8 },
{17304, 6682, 4, 8 },
// AArch64::UQDECH_XPiI - 1056
{17294, 6690, 4, 8 },
{17304, 6698, 4, 8 },
// AArch64::UQDECH_ZPiI - 1058
{17320, 6706, 4, 8 },
{17332, 6714, 4, 8 },
// AArch64::UQDECW_WPiI - 1060
{17350, 6722, 4, 8 },
{17360, 6730, 4, 8 },
// AArch64::UQDECW_XPiI - 1062
{17350, 6738, 4, 8 },
{17360, 6746, 4, 8 },
// AArch64::UQDECW_ZPiI - 1064
{17376, 6754, 4, 8 },
{17388, 6762, 4, 8 },
// AArch64::UQINCB_WPiI - 1066
{17406, 6770, 4, 8 },
{17416, 6778, 4, 8 },
// AArch64::UQINCB_XPiI - 1068
{17406, 6786, 4, 8 },
{17416, 6794, 4, 8 },
// AArch64::UQINCD_WPiI - 1070
{17432, 6802, 4, 8 },
{17442, 6810, 4, 8 },
// AArch64::UQINCD_XPiI - 1072
{17432, 6818, 4, 8 },
{17442, 6826, 4, 8 },
// AArch64::UQINCD_ZPiI - 1074
{17458, 6834, 4, 8 },
{17470, 6842, 4, 8 },
// AArch64::UQINCH_WPiI - 1076
{17488, 6850, 4, 8 },
{17498, 6858, 4, 8 },
// AArch64::UQINCH_XPiI - 1078
{17488, 6866, 4, 8 },
{17498, 6874, 4, 8 },
// AArch64::UQINCH_ZPiI - 1080
{17514, 6882, 4, 8 },
{17526, 6890, 4, 8 },
// AArch64::UQINCW_WPiI - 1082
{17544, 6898, 4, 8 },
{17554, 6906, 4, 8 },
// AArch64::UQINCW_XPiI - 1084
{17544, 6914, 4, 8 },
{17554, 6922, 4, 8 },
// AArch64::UQINCW_ZPiI - 1086
{17570, 6930, 4, 8 },
{17582, 6938, 4, 8 },
// AArch64::XPACLRI - 1088
{17600, 6946, 0, 3 },
// AArch64::ZERO_M - 1089
{17608, 6949, 1, 4 },
{17618, 6953, 1, 4 },
{17631, 6957, 1, 4 },
{17644, 6961, 1, 4 },
{17657, 6965, 1, 4 },
{17670, 6969, 1, 4 },
{17683, 6973, 1, 4 },
{17696, 6977, 1, 4 },
{17715, 6981, 1, 4 },
{17734, 6985, 1, 4 },
{17753, 6989, 1, 4 },
{17772, 6993, 1, 4 },
{17797, 6997, 1, 4 },
{17822, 7001, 1, 4 },
{17847, 7005, 1, 4 },
};
static const AliasPatternCond Conds[] = {
// (ADDSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 0
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
// (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 2
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 6
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 9
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 13
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 17
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (ADDSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 20
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (ADDSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 24
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
// (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 26
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 30
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (ADDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 33
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 37
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (ADDSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 40
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (ADDSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 44
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (ADDSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 47
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (ADDWri GPR32sponly:$dst, GPR32sp:$src, 0, 0) - 51
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDWri GPR32sp:$dst, GPR32sponly:$src, 0, 0) - 55
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 59
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 63
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (ADDWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 67
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (ADDXri GPR64sponly:$dst, GPR64sp:$src, 0, 0) - 71
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDXri GPR64sp:$dst, GPR64sponly:$src, 0, 0) - 75
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 79
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ADDXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 83
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (ADDXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 87
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2) - 91
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 93
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh) - 97
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (ANDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 100
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ANDSXri XZR, GPR64:$src1, logical_imm64:$src2) - 104
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 106
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, logical_shift64:$sh) - 110
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (ANDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 113
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ANDS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 117
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_TiedReg, 2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ANDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 125
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ANDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 129
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (AND_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn) - 133
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_TiedReg, 2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AND_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 141
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AND_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 148
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AND_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 155
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 3},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AUTIA1716) - 162
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AUTIASP) - 165
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AUTIAZ) - 168
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AUTIB1716) - 171
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AUTIBSP) - 174
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (AUTIBZ) - 177
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (BICSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 180
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (BICSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 184
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (BICWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 188
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (BICXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 192
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (CLREX 15) - 196
{AliasPatternCond::K_Imm, uint32_t(15)},
// (CNTB_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 197
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CNTB_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 204
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CNTD_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 211
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CNTD_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 218
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CNTH_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 225
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CNTH_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 232
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CNTW_XPiI GPR64:$Rd, { 1, 1, 1, 1, 1 }, 1) - 239
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CNTW_XPiI GPR64:$Rd, sve_pred_enum:$pattern, 1) - 246
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 253
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 260
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 267
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 274
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmR_B ZPR8:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 281
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmR_D ZPR64:$Zd, PPR3bAny:$Pg, GPR64sp:$Rn) - 289
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmR_H ZPR16:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 297
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmR_S ZPR32:$Zd, PPR3bAny:$Pg, GPR32sp:$Rn) - 305
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmV_B ZPR8:$Zd, PPR3bAny:$Pg, FPR8:$Vn) - 313
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmV_D ZPR64:$Zd, PPR3bAny:$Pg, FPR64:$Vn) - 321
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmV_H ZPR16:$Zd, PPR3bAny:$Pg, FPR16:$Vn) - 329
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPmV_S ZPR32:$Zd, PPR3bAny:$Pg, FPR32:$Vn) - 337
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPzI_B ZPR8:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i8:$imm) - 345
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPzI_D ZPR64:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i64:$imm) - 351
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPzI_H ZPR16:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i16:$imm) - 357
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CPY_ZPzI_S ZPR32:$Zd, PPRAny:$Pg, cpy_imm8_opt_lsl_i32:$imm) - 363
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 369
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_Custom, 4},
// (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 373
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_Custom, 4},
// (CSINCXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 377
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_Custom, 4},
// (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 381
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_Custom, 4},
// (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) - 385
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_Custom, 4},
// (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 389
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_Custom, 4},
// (CSINVXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) - 393
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_Custom, 4},
// (CSINVXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 397
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_Custom, 4},
// (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) - 401
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_Custom, 4},
// (CSNEGXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) - 405
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_Custom, 4},
// (DCPS1 0) - 409
{AliasPatternCond::K_Imm, uint32_t(0)},
// (DCPS2 0) - 410
{AliasPatternCond::K_Imm, uint32_t(0)},
// (DCPS3 0) - 411
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureEL3},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 415
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 423
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 431
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 439
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 447
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 455
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 463
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 471
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 479
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 487
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 495
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 503
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 511
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 519
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DSB 0) - 527
{AliasPatternCond::K_Imm, uint32_t(0)},
// (DSB 4) - 528
{AliasPatternCond::K_Imm, uint32_t(4)},
// (DSB { 1, 1, 0, 0 }) - 529
{AliasPatternCond::K_Imm, uint32_t(12)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::HasV8_0rOps},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUPM_ZI ZPR16:$Zd, sve_preferred_logical_imm16:$imm) - 533
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Custom, 5},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUPM_ZI ZPR32:$Zd, sve_preferred_logical_imm32:$imm) - 539
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Custom, 6},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUPM_ZI ZPR64:$Zd, sve_preferred_logical_imm64:$imm) - 545
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Custom, 7},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUPM_ZI ZPR8:$Zd, sve_logical_imm8:$imm) - 551
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Custom, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUPM_ZI ZPR16:$Zd, sve_logical_imm16:$imm) - 557
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Custom, 2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUPM_ZI ZPR32:$Zd, sve_logical_imm32:$imm) - 563
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Custom, 3},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZI_B ZPR8:$Zd, cpy_imm8_opt_lsl_i8:$imm) - 569
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZI_D ZPR64:$Zd, cpy_imm8_opt_lsl_i64:$imm) - 574
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZI_D ZPR64:$Zd, 0, 0) - 579
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZI_H ZPR16:$Zd, cpy_imm8_opt_lsl_i16:$imm) - 586
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZI_H ZPR16:$Zd, 0, 0) - 591
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZI_S ZPR32:$Zd, cpy_imm8_opt_lsl_i32:$imm) - 598
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZI_S ZPR32:$Zd, 0, 0) - 603
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZR_B ZPR8:$Zd, GPR32sp:$Rn) - 610
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZR_D ZPR64:$Zd, GPR64sp:$Rn) - 616
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZR_H ZPR16:$Zd, GPR32sp:$Rn) - 622
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZR_S ZPR32:$Zd, GPR32sp:$Rn) - 628
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_B ZPR8:$Zd, FPR8asZPR:$Bn, 0) - 634
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_B ZPR8:$Zd, ZPR8:$Zn, sve_elm_idx_extdup_b:$idx) - 641
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_D ZPR64:$Zd, FPR64asZPR:$Dn, 0) - 647
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_D ZPR64:$Zd, ZPR64:$Zn, sve_elm_idx_extdup_d:$idx) - 654
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_H ZPR16:$Zd, FPR16asZPR:$Hn, 0) - 660
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_H ZPR16:$Zd, ZPR16:$Zn, sve_elm_idx_extdup_h:$idx) - 667
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_Q ZPR128:$Zd, FPR128asZPR:$Qn, 0) - 673
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_Q ZPR128:$Zd, ZPR128:$Zn, sve_elm_idx_extdup_q:$idx) - 680
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_S ZPR32:$Zd, FPR32asZPR:$Sn, 0) - 686
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (DUP_ZZI_S ZPR32:$Zd, ZPR32:$Zn, sve_elm_idx_extdup_s:$idx) - 693
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EONWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 699
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (EONXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 703
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (EORS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 707
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EORWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 715
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (EORXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 719
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (EOR_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg) - 723
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EOR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 731
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EOR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 738
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EOR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 745
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 3},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_H_B ZPR8:$Zd, PPR3bAny:$Pg, TileVectorOpH8:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm) - 752
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_H_D ZPR64:$Zd, PPR3bAny:$Pg, TileVectorOpH64:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm) - 760
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_H_H ZPR16:$Zd, PPR3bAny:$Pg, TileVectorOpH16:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm) - 768
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_H_Q ZPR128:$Zd, PPR3bAny:$Pg, TileVectorOpH128:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm) - 776
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_H_S ZPR32:$Zd, PPR3bAny:$Pg, TileVectorOpH32:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm) - 784
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_V_B ZPR8:$Zd, PPR3bAny:$Pg, TileVectorOpV8:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm) - 792
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_V_D ZPR64:$Zd, PPR3bAny:$Pg, TileVectorOpV64:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm) - 800
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_V_H ZPR16:$Zd, PPR3bAny:$Pg, TileVectorOpV16:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm) - 808
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_V_Q ZPR128:$Zd, PPR3bAny:$Pg, TileVectorOpV128:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm) - 816
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRACT_ZPMXI_V_S ZPR32:$Zd, PPR3bAny:$Pg, TileVectorOpV32:$ZAn, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm) - 824
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift) - 832
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_TiedReg, 1},
// (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift) - 835
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_TiedReg, 1},
// (FCPY_ZPmI_D ZPR64:$Zd, PPRAny:$Pg, fpimm64:$imm8) - 838
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (FCPY_ZPmI_H ZPR16:$Zd, PPRAny:$Pg, fpimm16:$imm8) - 845
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (FCPY_ZPmI_S ZPR32:$Zd, PPRAny:$Pg, fpimm32:$imm8) - 852
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (FDUP_ZI_D ZPR64:$Zd, fpimm64:$imm8) - 859
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (FDUP_ZI_H ZPR16:$Zd, fpimm16:$imm8) - 864
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (FDUP_ZI_S ZPR32:$Zd, fpimm32:$imm8) - 869
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 874
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 881
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 888
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 895
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 902
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1Q Z_q:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 909
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 915
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 922
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 929
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 936
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 943
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 950
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLD1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 957
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 964
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 971
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 978
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 985
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 992
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 999
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 1006
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 1013
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 1020
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 1027
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 1034
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (GLDFF1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 1041
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (HINT { 0, 0, 0 }) - 1048
{AliasPatternCond::K_Imm, uint32_t(0)},
// (HINT { 0, 0, 1 }) - 1049
{AliasPatternCond::K_Imm, uint32_t(1)},
// (HINT { 0, 1, 0 }) - 1050
{AliasPatternCond::K_Imm, uint32_t(2)},
// (HINT { 0, 1, 1 }) - 1051
{AliasPatternCond::K_Imm, uint32_t(3)},
// (HINT { 1, 0, 0 }) - 1052
{AliasPatternCond::K_Imm, uint32_t(4)},
// (HINT { 1, 0, 1 }) - 1053
{AliasPatternCond::K_Imm, uint32_t(5)},
// (HINT { 1, 1, 0 }) - 1054
{AliasPatternCond::K_Imm, uint32_t(6)},
// (HINT { 1, 0, 0, 0, 0 }) - 1055
{AliasPatternCond::K_Imm, uint32_t(16)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRAS},
{AliasPatternCond::K_EndOrFeatures, 0},
// (HINT 20) - 1059
{AliasPatternCond::K_Imm, uint32_t(20)},
// (HINT 32) - 1060
{AliasPatternCond::K_Imm, uint32_t(32)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureBranchTargetId},
{AliasPatternCond::K_EndOrFeatures, 0},
// (HINT btihint_op:$op) - 1064
{AliasPatternCond::K_Custom, 8},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureBranchTargetId},
{AliasPatternCond::K_EndOrFeatures, 0},
// (HINT psbhint_op:$op) - 1068
{AliasPatternCond::K_Custom, 9},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSPE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (HINT 22) - 1072
{AliasPatternCond::K_Imm, uint32_t(22)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureCLRBHB},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCB_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 1076
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCB_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 1084
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCD_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 1092
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCD_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 1100
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 1108
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 1116
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCH_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 1124
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCH_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 1132
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 1140
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 1148
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCW_XPiI GPR64:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 1156
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCW_XPiI GPR64:$Rdn, sve_pred_enum:$pattern, 1) - 1164
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 1172
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 1180
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_H_B TileVectorOpH8:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, ZPR8:$Zn) - 1188
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_H_D TileVectorOpH64:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, ZPR64:$Zn) - 1197
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_H_H TileVectorOpH16:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, ZPR16:$Zn) - 1206
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_H_Q TileVectorOpH128:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, ZPR128:$Zn) - 1215
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_H_S TileVectorOpH32:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, ZPR32:$Zn) - 1224
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_V_B TileVectorOpV8:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, ZPR8:$Zn) - 1233
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_V_D TileVectorOpV64:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, ZPR64:$Zn) - 1242
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_V_H TileVectorOpV16:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, ZPR16:$Zn) - 1251
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_V_Q TileVectorOpV128:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, ZPR128:$Zn) - 1260
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSERT_MXIPZ_V_S TileVectorOpV32:$ZAd, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, ZPR32:$Zn) - 1269
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi16gpr V128:$dst, VectorIndexH:$idx, GPR32:$src) - 1278
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi16lane V128:$dst, VectorIndexH:$idx, V128:$src, VectorIndexH:$idx2) - 1285
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi32gpr V128:$dst, VectorIndexS:$idx, GPR32:$src) - 1292
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi32lane V128:$dst, VectorIndexS:$idx, V128:$src, VectorIndexS:$idx2) - 1299
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi64gpr V128:$dst, VectorIndexD:$idx, GPR64:$src) - 1306
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi64lane V128:$dst, VectorIndexD:$idx, V128:$src, VectorIndexD:$idx2) - 1313
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi8gpr V128:$dst, VectorIndexB:$idx, GPR32:$src) - 1320
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (INSvi8lane V128:$dst, VectorIndexB:$idx, V128:$src, VectorIndexB:$idx2) - 1327
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (IRG GPR64sp:$dst, GPR64sp:$src, XZR) - 1334
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMTE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ISB 15) - 1340
{AliasPatternCond::K_Imm, uint32_t(15)},
// (LD1B_2Z_IMM ZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1341
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1B_4Z_IMM ZZZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1349
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1357
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1B_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1365
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1B_IMM_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1373
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1381
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1B_VG2_M2ZPXI ZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1389
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1B_VG4_M4ZPXI ZZZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1396
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1D_2Z_IMM ZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1403
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1D_4Z_IMM ZZZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1411
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1419
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1D_Q_IMM Z_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1427
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1D_VG2_M2ZPXI ZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1433
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1D_VG4_M4ZPXI ZZZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1440
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 1447
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 1454
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 1461
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 1468
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 1475
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 1482
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 1489
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 1496
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1H_2Z_IMM ZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1503
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1H_4Z_IMM ZZZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1511
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1519
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1527
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1535
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1H_VG2_M2ZPXI ZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1543
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1H_VG4_M4ZPXI ZZZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 1550
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 1557
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 1564
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 1571
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 1578
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 1585
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 1592
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 1599
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 1606
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1613
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1621
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RB_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1629
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1637
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RD_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1645
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1653
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RH_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1661
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1669
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RO_B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1677
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMatMulFP64},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RO_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1687
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMatMulFP64},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RO_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1697
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMatMulFP64},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RO_W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1707
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMatMulFP64},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RQ_B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1717
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RQ_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1725
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RQ_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1733
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RQ_W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1741
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RSB_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1749
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RSB_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1757
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RSB_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1765
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RSH_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1773
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RSH_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1781
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RSW_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1789
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RW_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1797
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1RW_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1805
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 1813
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 1820
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 1827
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 1834
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 1841
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 1848
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 1855
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Rv8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 1862
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1869
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1SB_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1877
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1885
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1893
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1901
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 1909
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 1917
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 1924
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 1931
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 1938
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 1945
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 1952
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 1959
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 1966
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 1973
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 1980
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 1987
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 1994
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 2001
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 2008
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 2015
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 2022
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1W_2Z_IMM ZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 2029
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1W_4Z_IMM ZZZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 2037
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2045
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2053
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1W_Q_IMM Z_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2061
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1W_VG2_M2ZPXI ZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 2067
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1W_VG4_M4ZPXI ZZZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 2074
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_H_B TileVectorOpH8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2081
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_H_D TileVectorOpH64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2090
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_H_H TileVectorOpH16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2099
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_H_Q TileVectorOpH128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2108
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_H_S TileVectorOpH32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2117
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_V_B TileVectorOpV8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2126
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_V_D TileVectorOpV64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2135
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_V_H TileVectorOpV16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2144
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_V_Q TileVectorOpV128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2153
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1_MXIPXX_V_S TileVectorOpV32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2162
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 2171
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 2180
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 2189
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 2198
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2207
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2215
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2223
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Q_IMM ZZ_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2231
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 2239
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 2246
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 2253
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 2260
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 2267
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 2274
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 2281
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Rv8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 2288
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 2295
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 2302
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 2309
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 2316
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 2323
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 2330
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 2337
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2344
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 2352
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 2361
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 2370
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 2379
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2388
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2396
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2404
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Q_IMM ZZZ_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2412
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 2420
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 2427
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 2434
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 2441
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 2448
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 2455
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 2462
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Rv8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 2469
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 2476
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 2483
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 2490
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 2497
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 2504
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 2511
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 2518
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2525
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 2533
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 2542
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 2551
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 2560
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2569
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2577
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 2585
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 2592
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 2599
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 2606
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 2613
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 2620
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 2627
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2634
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Q_IMM ZZZZ_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2642
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 2650
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 2657
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 2664
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 2671
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 2678
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 2685
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 2692
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4Rv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 2699
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2706
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 2714
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 2723
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 2732
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LD4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 2741
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2750
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2756
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2762
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2768
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2774
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2780
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2786
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDADDX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2792
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 2798
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 2804
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2810
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2816
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 2822
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2828
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 2834
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 2840
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURbi FPR8:$Rt, GPR64sp:$Rn, 0) - 2846
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURdi FPR64:$Rt, GPR64sp:$Rn, 0) - 2855
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURhi FPR16:$Rt, GPR64sp:$Rn, 0) - 2864
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURi GPR32:$Rt, GPR64sp:$Rn, 0) - 2873
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURqi FPR128:$Rt, GPR64sp:$Rn, 0) - 2879
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDAPURsi FPR32:$Rt, GPR64sp:$Rn, 0) - 2888
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2897
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2903
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2909
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2915
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2921
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2927
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2933
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDCLRX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2939
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2945
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2951
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 2957
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 2963
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2969
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2975
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORW WZR, GPR32:$Rs, GPR64sp:$Rn) - 2981
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDEORX XZR, GPR64:$Rs, GPR64sp:$Rn) - 2987
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1B_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 2993
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1B_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3000
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1B_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3007
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1B_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3014
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3021
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1H_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3028
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3035
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1H_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3042
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1SB_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3049
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1SB_H_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3056
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1SB_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3063
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1SH_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3070
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1SH_S_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3077
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1SW_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3084
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1W_D_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3091
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDFF1W_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 3098
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDG GPR64:$Rt, GPR64sp:$Rn, 0) - 3105
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMTE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1B_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3112
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1B_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3119
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1B_IMM_REAL Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3126
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1B_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3133
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3140
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1H_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3147
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3154
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1H_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3161
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1SB_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3168
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1SB_H_IMM_REAL Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3175
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1SB_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3182
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1SH_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3189
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1SH_S_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3196
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1SW_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3203
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1W_D_IMM_REAL Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3210
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNF1W_IMM_REAL Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3217
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 3224
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 3228
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 3232
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 3236
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 3240
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDNT1B_2Z_IMM ZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3244
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1B_4Z_IMM ZZZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3252
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1B_VG2_M2ZPXI ZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3260
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1B_VG4_M4ZPXI ZZZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3267
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3274
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3282
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3289
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1D_2Z_IMM ZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3296
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1D_4Z_IMM ZZZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3304
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1D_VG2_M2ZPXI ZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3312
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1D_VG4_M4ZPXI ZZZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3319
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3326
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3334
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1H_2Z_IMM ZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3341
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1H_4Z_IMM ZZZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3349
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1H_VG2_M2ZPXI ZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3357
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1H_VG4_M4ZPXI ZZZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3364
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3371
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3379
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3386
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1SB_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3393
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1SB_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3400
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1SH_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3407
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1SH_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3414
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1SW_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3421
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1W_2Z_IMM ZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3428
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1W_4Z_IMM ZZZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3436
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1W_VG2_M2ZPXI ZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3444
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1W_VG4_M4ZPXI ZZZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 3451
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 3458
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 3466
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 3473
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 3480
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 3484
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDPSWi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 3488
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 3492
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 3496
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 3500
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRAAindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 3504
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDRABindexed GPR64:$Rt, GPR64sp:$Rn, 0) - 3510
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3516
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRBBui GPR32:$Rt, GPR64sp:$Rn, 0) - 3521
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3524
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 3529
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3532
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 3537
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3540
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRHHui GPR32:$Rt, GPR64sp:$Rn, 0) - 3545
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3548
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 3553
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3556
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 3561
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSBWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3564
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSBWui GPR32:$Rt, GPR64sp:$Rn, 0) - 3569
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSBXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3572
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSBXui GPR64:$Rt, GPR64sp:$Rn, 0) - 3577
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSHWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3580
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSHWui GPR32:$Rt, GPR64sp:$Rn, 0) - 3585
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSHXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3588
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSHXui GPR64:$Rt, GPR64sp:$Rn, 0) - 3593
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSWroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3596
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSWui GPR64:$Rt, GPR64sp:$Rn, 0) - 3601
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3604
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 3609
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3612
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 3617
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 3620
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 3625
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 3628
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDR_ZA MatrixOp:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm4, GPR64sp:$Rn, 0) - 3635
{AliasPatternCond::K_RegClass, AArch64::MPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 3643
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3650
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3656
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3662
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3668
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3674
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3680
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3686
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSETX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3692
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3698
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3704
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3710
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3716
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3722
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3728
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3734
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3740
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3746
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3752
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3758
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3764
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3770
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3776
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3782
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDSMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3788
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 3794
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 3797
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 3800
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 3803
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 3806
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 3809
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 3812
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 3815
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 3818
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDUMAXB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3821
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMAXH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3827
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMAXLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3833
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMAXLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3839
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMAXLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3845
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMAXLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3851
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMAXW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3857
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMAXX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3863
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3869
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3875
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINLB WZR, GPR32:$Rs, GPR64sp:$Rn) - 3881
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINLH WZR, GPR32:$Rs, GPR64sp:$Rn) - 3887
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINLW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3893
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINLX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3899
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINW WZR, GPR32:$Rs, GPR64sp:$Rn) - 3905
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDUMINX XZR, GPR64:$Rs, GPR64sp:$Rn) - 3911
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureLSE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (LDURBBi GPR32:$Rt, GPR64sp:$Rn, 0) - 3917
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 3920
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 3923
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURHHi GPR32:$Rt, GPR64sp:$Rn, 0) - 3926
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 3929
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 3932
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) - 3935
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) - 3938
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) - 3941
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) - 3944
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURSWi GPR64:$Rt, GPR64sp:$Rn, 0) - 3947
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 3950
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 3953
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (LDURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 3956
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (MADDWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 3959
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
// (MADDXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 3963
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
// (MOVA_2ZMXI_H_B ZZ_b_mul_r:$Zd, TileVectorOpH8:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm3s2range:$imm) - 3967
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_2ZMXI_H_D ZZ_d_mul_r:$Zd, TileVectorOpH64:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm0s2range:$imm) - 3973
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_2ZMXI_H_H ZZ_h_mul_r:$Zd, TileVectorOpH16:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm2s2range:$imm) - 3979
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_2ZMXI_H_S ZZ_s_mul_r:$Zd, TileVectorOpH32:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm1s2range:$imm) - 3985
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_2ZMXI_V_B ZZ_b_mul_r:$Zd, TileVectorOpV8:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm3s2range:$imm) - 3991
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_2ZMXI_V_D ZZ_d_mul_r:$Zd, TileVectorOpV64:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm0s2range:$imm) - 3997
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_2ZMXI_V_H ZZ_h_mul_r:$Zd, TileVectorOpV16:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm2s2range:$imm) - 4003
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_2ZMXI_V_S ZZ_s_mul_r:$Zd, TileVectorOpV32:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm1s2range:$imm) - 4009
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_H_B ZZZZ_b_mul_r:$Zd, TileVectorOpH8:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm2s4range:$imm) - 4015
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_H_D ZZZZ_d_mul_r:$Zd, TileVectorOpH64:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm) - 4021
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_H_H ZZZZ_h_mul_r:$Zd, TileVectorOpH16:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm1s4range:$imm) - 4027
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_H_S ZZZZ_s_mul_r:$Zd, TileVectorOpH32:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm) - 4033
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_V_B ZZZZ_b_mul_r:$Zd, TileVectorOpV8:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm2s4range:$imm) - 4039
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_V_D ZZZZ_d_mul_r:$Zd, TileVectorOpV64:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm) - 4045
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_V_H ZZZZ_h_mul_r:$Zd, TileVectorOpV16:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm1s4range:$imm) - 4051
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_4ZMXI_V_S ZZZZ_s_mul_r:$Zd, TileVectorOpV32:$ZAn, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm) - 4057
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_H_B TileVectorOpH8:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm3s2range:$imm, ZZ_b_mul_r:$Zn) - 4063
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_H_D TileVectorOpH64:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm0s2range:$imm, ZZ_d_mul_r:$Zn) - 4071
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_H_H TileVectorOpH16:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm2s2range:$imm, ZZ_h_mul_r:$Zn) - 4079
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_H_S TileVectorOpH32:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm1s2range:$imm, ZZ_s_mul_r:$Zn) - 4087
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_V_B TileVectorOpV8:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm3s2range:$imm, ZZ_b_mul_r:$Zn) - 4095
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_V_D TileVectorOpV64:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm0s2range:$imm, ZZ_d_mul_r:$Zn) - 4103
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_V_H TileVectorOpV16:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm2s2range:$imm, ZZ_h_mul_r:$Zn) - 4111
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI2Z_V_S TileVectorOpV32:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm1s2range:$imm, ZZ_s_mul_r:$Zn) - 4119
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_H_B TileVectorOpH8:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm2s4range:$imm, ZZZZ_b_mul_r:$Zn) - 4127
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_H_D TileVectorOpH64:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm, ZZZZ_d_mul_r:$Zn) - 4135
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_H_H TileVectorOpH16:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm1s4range:$imm, ZZZZ_h_mul_r:$Zn) - 4143
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_H_S TileVectorOpH32:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm, ZZZZ_s_mul_r:$Zn) - 4151
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_V_B TileVectorOpV8:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm2s4range:$imm, ZZZZ_b_mul_r:$Zn) - 4159
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_V_D TileVectorOpV64:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm, ZZZZ_d_mul_r:$Zn) - 4167
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_V_H TileVectorOpV16:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm1s4range:$imm, ZZZZ_h_mul_r:$Zn) - 4175
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_MXI4Z_V_S TileVectorOpV32:$ZAd, MatrixIndexGPR32Op12_15:$Rs, uimm0s4range:$imm, ZZZZ_s_mul_r:$Zn) - 4183
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_VG2_2ZMXI ZZ_d_mul_r:$Zd, MatrixOp64:$ZAn, MatrixIndexGPR32Op8_11:$Rs, sme_elm_idx0_7:$imm) - 4191
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_8_11RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_VG2_MXI2Z MatrixOp64:$ZAd, MatrixIndexGPR32Op8_11:$Rs, sme_elm_idx0_7:$imm, ZZ_d_mul_r:$Zn) - 4197
{AliasPatternCond::K_RegClass, AArch64::MPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_8_11RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_VG4_4ZMXI ZZZZ_d_mul_r:$Zd, MatrixOp64:$ZAn, MatrixIndexGPR32Op8_11:$Rs, sme_elm_idx0_7:$imm) - 4205
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_8_11RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MOVA_VG4_MXI4Z MatrixOp64:$ZAd, MatrixIndexGPR32Op8_11:$Rs, sme_elm_idx0_7:$imm, ZZZZ_d_mul_r:$Zn) - 4211
{AliasPatternCond::K_RegClass, AArch64::MPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_8_11RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MSRpstatesvcrImm1 { 0, 1, 1 }, { 1 }) - 4219
{AliasPatternCond::K_Imm, uint32_t(3)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MSRpstatesvcrImm1 { 0, 0, 1 }, { 1 }) - 4224
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MSRpstatesvcrImm1 { 0, 1, 0 }, { 1 }) - 4229
{AliasPatternCond::K_Imm, uint32_t(2)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MSRpstatesvcrImm1 { 0, 1, 1 }, { 0 }) - 4234
{AliasPatternCond::K_Imm, uint32_t(3)},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MSRpstatesvcrImm1 { 0, 0, 1 }, { 0 }) - 4239
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MSRpstatesvcrImm1 { 0, 1, 0 }, { 0 }) - 4244
{AliasPatternCond::K_Imm, uint32_t(2)},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (MSUBWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) - 4249
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
// (MSUBXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) - 4253
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
// (NOTv16i8 V128:$Vd, V128:$Vn) - 4257
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
// (NOTv8i8 V64:$Vd, V64:$Vn) - 4259
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
// (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0) - 4261
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh) - 4265
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (ORNWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 4268
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0) - 4272
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh) - 4276
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (ORNXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 4279
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORRS_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 4283
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0) - 4291
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORRWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 4295
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORRXrs GPR64:$dst, XZR, GPR64:$src, 0) - 4299
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORRXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 4303
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (ORR_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn) - 4307
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ORR_ZI ZPR8:$Zdn, sve_logical_imm8:$imm) - 4315
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ORR_ZI ZPR16:$Zdn, sve_logical_imm16:$imm) - 4322
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ORR_ZI ZPR32:$Zdn, sve_logical_imm32:$imm) - 4329
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Custom, 3},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ORR_ZZZ ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zn) - 4336
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_TiedReg, 1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ORRv16i8 V128:$dst, V128:$src, V128:$src) - 4343
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_TiedReg, 1},
// (ORRv8i8 V64:$dst, V64:$src, V64:$src) - 4346
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_TiedReg, 1},
// (PACIA1716) - 4349
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PACIASP) - 4352
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PACIAZ) - 4355
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PACIB1716) - 4358
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PACIBSP) - 4361
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PACIBZ) - 4364
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PMOV_PZI_B PPR8:$Pd, ZPRAny:$Zn, 0) - 4367
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PMOV_ZIP_B ZPRAny:$Zd, 0, PPR8:$Pn) - 4374
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFB_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 4382
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFB_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4389
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFB_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 4397
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFD_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 4404
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFD_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4411
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFD_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 4419
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFH_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 4426
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFH_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4433
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFH_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 4441
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 4448
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (PRFMui prfop:$Rt, GPR64sp:$Rn, 0) - 4453
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0) - 4456
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (PRFW_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 4459
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFW_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 4466
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PRFW_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 4474
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUES_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 4481
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUES_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 4487
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUES_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 4493
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUES_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 4499
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUE_B PPR8:$Pd, { 1, 1, 1, 1, 1 }) - 4505
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUE_D PPR64:$Pd, { 1, 1, 1, 1, 1 }) - 4511
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUE_H PPR16:$Pd, { 1, 1, 1, 1, 1 }) - 4517
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (PTRUE_S PPR32:$Pd, { 1, 1, 1, 1, 1 }) - 4523
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (RET LR) - 4529
{AliasPatternCond::K_Reg, AArch64::LR},
// (SBCSWr GPR32:$dst, WZR, GPR32:$src) - 4530
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (SBCSXr GPR64:$dst, XZR, GPR64:$src) - 4533
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (SBCWr GPR32:$dst, WZR, GPR32:$src) - 4536
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (SBCXr GPR64:$dst, XZR, GPR64:$src) - 4539
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 4542
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
// (SBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 4546
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(7)},
// (SBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 4550
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(15)},
// (SBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 4554
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(63)},
// (SBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 4558
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(7)},
// (SBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 4562
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(15)},
// (SBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 4566
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(31)},
// (SEL_PPPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pd) - 4570
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_TiedReg, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SEL_ZPZZ_B ZPR8:$Zd, PPRAny:$Pg, ZPR8:$Zn, ZPR8:$Zd) - 4578
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_TiedReg, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SEL_ZPZZ_D ZPR64:$Zd, PPRAny:$Pg, ZPR64:$Zn, ZPR64:$Zd) - 4586
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_TiedReg, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SEL_ZPZZ_H ZPR16:$Zd, PPRAny:$Pg, ZPR16:$Zn, ZPR16:$Zd) - 4594
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_TiedReg, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SEL_ZPZZ_S ZPR32:$Zd, PPRAny:$Pg, ZPR32:$Zn, ZPR32:$Zd) - 4602
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_TiedReg, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 4610
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
// (SMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 4614
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
// (SQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4618
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4626
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4634
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4642
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4650
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4658
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4666
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4674
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4682
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 4690
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4698
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4706
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4714
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4722
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4730
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 4738
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4746
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4754
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4762
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4770
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4778
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 4786
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4794
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4802
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4810
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCB_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4818
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4826
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4834
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4842
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCD_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4850
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4858
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 4866
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4874
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4882
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4890
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCH_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4898
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4906
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 4914
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 4922
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 4930
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, { 1, 1, 1, 1, 1 }, 1) - 4938
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCW_XPiWdI GPR64z:$Rd, GPR64as32:$Rn, sve_pred_enum:$pattern, 1) - 4946
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 4954
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 4962
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 4970
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 4977
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 4984
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 4991
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 4998
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1Q Z_q:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 5005
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 5011
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 5018
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_2Z_IMM ZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5025
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_4Z_IMM ZZZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5033
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5041
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5049
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_IMM Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5057
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5065
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_VG2_M2ZPXI ZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5073
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1B_VG4_M4ZPXI ZZZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5080
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1D_2Z_IMM ZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5087
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1D_4Z_IMM ZZZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5095
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5103
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1D_Q_IMM Z_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5111
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1D_VG2_M2ZPXI ZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5117
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1D_VG4_M4ZPXI ZZZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5124
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 5131
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) - 5138
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 5145
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 5152
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 5159
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 5166
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 5173
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 5180
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1H_2Z_IMM ZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5187
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1H_4Z_IMM ZZZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5195
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1H_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5203
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1H_IMM Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5211
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1H_S_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5219
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1H_VG2_M2ZPXI ZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5227
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1H_VG4_M4ZPXI ZZZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5234
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) - 5241
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) - 5248
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) - 5255
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) - 5262
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) - 5269
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) - 5276
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) - 5283
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) - 5290
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 5297
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) - 5304
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 5311
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 5318
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 5325
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 5332
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 5339
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 5346
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 5353
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) - 5360
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 5367
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 5374
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 5381
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 5388
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 5395
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 5402
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1W_2Z_IMM ZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5409
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1W_4Z_IMM ZZZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5417
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1W_D_IMM Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5425
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1W_IMM Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5433
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1W_Q_IMM Z_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5441
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1W_VG2_M2ZPXI ZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5447
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1W_VG4_M4ZPXI ZZZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 5454
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_H_B TileVectorOpH8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5461
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_H_D TileVectorOpH64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5470
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_H_H TileVectorOpH16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5479
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_H_Q TileVectorOpH128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5488
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_H_S TileVectorOpH32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5497
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_V_B TileVectorOpV8:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5506
{AliasPatternCond::K_RegClass, AArch64::MPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_V_D TileVectorOpV64:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_1:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5515
{AliasPatternCond::K_RegClass, AArch64::MPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_V_H TileVectorOpV16:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_7:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5524
{AliasPatternCond::K_RegClass, AArch64::MPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_V_Q TileVectorOpV128:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_0:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5533
{AliasPatternCond::K_RegClass, AArch64::MPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1_MXIPXX_V_S TileVectorOpV32:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_3:$imm, PPR3bAny:$Pg, GPR64sp:$Rn, XZR) - 5542
{AliasPatternCond::K_RegClass, AArch64::MPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) - 5551
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) - 5559
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) - 5567
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) - 5575
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2B_IMM ZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5583
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2D_IMM ZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5591
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 5599
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMTE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2H_IMM ZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5605
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Q_IMM ZZ_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5613
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) - 5621
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) - 5628
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) - 5635
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) - 5642
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) - 5649
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) - 5656
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) - 5663
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2W_IMM ZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5670
{AliasPatternCond::K_RegClass, AArch64::ZPR2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) - 5678
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) - 5686
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) - 5694
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) - 5702
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3B_IMM ZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5710
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3D_IMM ZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5718
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3H_IMM ZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5726
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Q_IMM ZZZ_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5734
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) - 5742
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) - 5749
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) - 5756
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) - 5763
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) - 5770
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) - 5777
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) - 5784
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3W_IMM ZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5791
{AliasPatternCond::K_RegClass, AArch64::ZPR3RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) - 5799
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) - 5807
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) - 5815
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) - 5823
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4B_IMM ZZZZ_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5831
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4D_IMM ZZZZ_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5839
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) - 5847
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) - 5854
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) - 5861
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) - 5868
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) - 5875
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) - 5882
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::DDDDRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) - 5889
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4H_IMM ZZZZ_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5896
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4Q_IMM ZZZZ_q:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5904
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2p1},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4W_IMM ZZZZ_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 5912
{AliasPatternCond::K_RegClass, AArch64::ZPR4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) - 5920
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) - 5928
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) - 5936
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ST4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) - 5944
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::QQQQRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 5952
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMTE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STGPi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 5958
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMTE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURBi GPR32:$Rt, GPR64sp:$Rn, 0) - 5965
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURHi GPR32:$Rt, GPR64sp:$Rn, 0) - 5971
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURWi GPR32:$Rt, GPR64sp:$Rn, 0) - 5977
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURXi GPR64:$Rt, GPR64sp:$Rn, 0) - 5983
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC_IMMO},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURbi FPR8:$Rt, GPR64sp:$Rn, 0) - 5989
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURdi FPR64:$Rt, GPR64sp:$Rn, 0) - 5998
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURhi FPR16:$Rt, GPR64sp:$Rn, 0) - 6007
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURqi FPR128:$Rt, GPR64sp:$Rn, 0) - 6016
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STLURsi FPR32:$Rt, GPR64sp:$Rn, 0) - 6025
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureRCPC3},
{AliasPatternCond::K_EndOrFeatures, 0},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 6034
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STNPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 6038
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STNPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 6042
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STNPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 6046
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STNPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 6050
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STNT1B_2Z_IMM ZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6054
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1B_4Z_IMM ZZZZ_b_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6062
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1B_VG2_M2ZPXI ZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6070
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1B_VG4_M4ZPXI ZZZZ_b_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6077
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1B_ZRI Z_b:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 6084
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1B_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 6092
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1B_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 6099
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1D_2Z_IMM ZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6106
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1D_4Z_IMM ZZZZ_d_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6114
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1D_VG2_M2ZPXI ZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6122
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1D_VG4_M4ZPXI ZZZZ_d_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6129
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1D_ZRI Z_d:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 6136
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1D_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 6144
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1H_2Z_IMM ZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6151
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1H_4Z_IMM ZZZZ_h_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6159
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1H_VG2_M2ZPXI ZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6167
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1H_VG4_M4ZPXI ZZZZ_h_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6174
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1H_ZRI Z_h:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 6181
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1H_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 6189
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1H_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 6196
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1W_2Z_IMM ZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6203
{AliasPatternCond::K_RegClass, AArch64::ZPR2Mul2RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1W_4Z_IMM ZZZZ_s_mul_r:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6211
{AliasPatternCond::K_RegClass, AArch64::ZPR4Mul4RegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2p1},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1W_VG2_M2ZPXI ZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6219
{AliasPatternCond::K_RegClass, AArch64::ZPR2StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1W_VG4_M4ZPXI ZZZZ_s_strided:$Zt, PNRAny_p8to15:$PNg, GPR64sp:$Rn, 0) - 6226
{AliasPatternCond::K_RegClass, AArch64::ZPR4StridedRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_p8to15RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1W_ZRI Z_s:$Zt, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 6233
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1W_ZZR_D_REAL Z_d:$Zt, PPR3bAny:$Pg, ZPR64:$Zn, XZR) - 6241
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STNT1W_ZZR_S_REAL Z_s:$Zt, PPR3bAny:$Pg, ZPR32:$Zn, XZR) - 6248
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::PPR_3bRegClassID},
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE2},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STPDi FPR64Op:$Rt, FPR64Op:$Rt2, GPR64sp:$Rn, 0) - 6255
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STPQi FPR128Op:$Rt, FPR128Op:$Rt2, GPR64sp:$Rn, 0) - 6259
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STPSi FPR32Op:$Rt, FPR32Op:$Rt2, GPR64sp:$Rn, 0) - 6263
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STPWi GPR32z:$Rt, GPR32z:$Rt2, GPR64sp:$Rn, 0) - 6267
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STPXi GPR64z:$Rt, GPR64z:$Rt2, GPR64sp:$Rn, 0) - 6271
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6275
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRBBui GPR32z:$Rt, GPR64sp:$Rn, 0) - 6280
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRBroX FPR8Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6283
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRBui FPR8Op:$Rt, GPR64sp:$Rn, 0) - 6288
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRDroX FPR64Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6291
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRDui FPR64Op:$Rt, GPR64sp:$Rn, 0) - 6296
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6299
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRHHui GPR32z:$Rt, GPR64sp:$Rn, 0) - 6304
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRHroX FPR16Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6307
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRHui FPR16Op:$Rt, GPR64sp:$Rn, 0) - 6312
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRQroX FPR128Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6315
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRQui FPR128Op:$Rt, GPR64sp:$Rn, 0) - 6320
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRSroX FPR32Op:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6323
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRSui FPR32Op:$Rt, GPR64sp:$Rn, 0) - 6328
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6331
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRWui GPR32z:$Rt, GPR64sp:$Rn, 0) - 6336
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 6339
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STRXui GPR64z:$Rt, GPR64sp:$Rn, 0) - 6344
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STR_PXI PPRAny:$Pt, GPR64sp:$Rn, 0) - 6347
{AliasPatternCond::K_RegClass, AArch64::PPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STR_ZA MatrixOp:$ZAt, MatrixIndexGPR32Op12_15:$Rv, sme_elm_idx0_15:$imm4, GPR64sp:$Rn, 0) - 6354
{AliasPatternCond::K_RegClass, AArch64::MPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::MatrixIndexGPR32_12_15RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STR_ZXI ZPRAny:$Zt, GPR64sp:$Rn, 0) - 6362
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STTRBi GPR32:$Rt, GPR64sp:$Rn, 0) - 6369
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STTRHi GPR32:$Rt, GPR64sp:$Rn, 0) - 6372
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STTRWi GPR32:$Rt, GPR64sp:$Rn, 0) - 6375
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STTRXi GPR64:$Rt, GPR64sp:$Rn, 0) - 6378
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURBBi GPR32z:$Rt, GPR64sp:$Rn, 0) - 6381
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURBi FPR8Op:$Rt, GPR64sp:$Rn, 0) - 6384
{AliasPatternCond::K_RegClass, AArch64::FPR8RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURDi FPR64Op:$Rt, GPR64sp:$Rn, 0) - 6387
{AliasPatternCond::K_RegClass, AArch64::FPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURHHi GPR32z:$Rt, GPR64sp:$Rn, 0) - 6390
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURHi FPR16Op:$Rt, GPR64sp:$Rn, 0) - 6393
{AliasPatternCond::K_RegClass, AArch64::FPR16RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURQi FPR128Op:$Rt, GPR64sp:$Rn, 0) - 6396
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURSi FPR32Op:$Rt, GPR64sp:$Rn, 0) - 6399
{AliasPatternCond::K_RegClass, AArch64::FPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURWi GPR32z:$Rt, GPR64sp:$Rn, 0) - 6402
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STURXi GPR64z:$Rt, GPR64sp:$Rn, 0) - 6405
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (STZ2GOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 6408
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMTE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (STZGOffset GPR64sp:$Rt, GPR64sp:$Rn, 0) - 6414
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureMTE},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SUBSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) - 6420
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
// (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, 0) - 6422
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) - 6426
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0) - 6429
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 6433
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (SUBSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 6436
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) - 6440
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (SUBSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) - 6444
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (SUBSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 6447
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (SUBSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) - 6451
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
// (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, 0) - 6453
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) - 6457
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (SUBSXrs GPR64:$dst, XZR, GPR64:$src, 0) - 6460
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBSXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 6464
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (SUBSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 6467
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) - 6471
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (SUBSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) - 6474
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (SUBSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) - 6478
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (SUBSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 6481
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0) - 6485
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) - 6489
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::WZR},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
// (SUBWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) - 6492
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) - 6496
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (SUBWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) - 6500
{AliasPatternCond::K_RegClass, AArch64::GPR32spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(16)},
// (SUBXrs GPR64:$dst, XZR, GPR64:$src, 0) - 6504
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) - 6508
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
// (SUBXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) - 6511
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
// (SUBXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) - 6515
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (SUBXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) - 6519
{AliasPatternCond::K_RegClass, AArch64::GPR64spRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64sponlyRegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(24)},
// (SYSPxt_XZR imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR) - 6523
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureD128},
{AliasPatternCond::K_EndOrFeatures, 0},
// (SYSxt imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR) - 6531
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Reg, AArch64::XZR},
// (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) - 6536
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
// (UBFMWri GPR32:$dst, GPR32:$src, 0, 7) - 6540
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(7)},
// (UBFMWri GPR32:$dst, GPR32:$src, 0, 15) - 6544
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(15)},
// (UBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) - 6548
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(63)},
// (UBFMXri GPR64:$dst, GPR64:$src, 0, 7) - 6552
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(7)},
// (UBFMXri GPR64:$dst, GPR64:$src, 0, 15) - 6556
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(15)},
// (UBFMXri GPR64:$dst, GPR64:$src, 0, 31) - 6560
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Imm, uint32_t(0)},
{AliasPatternCond::K_Imm, uint32_t(31)},
// (UMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 6564
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
// (UMOVvi32 GPR32:$dst, V128:$src, VectorIndexS:$idx) - 6568
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UMOVvi32_idx0 GPR32:$dst, V128:$src, VectorIndex0:$idx) - 6573
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UMOVvi64 GPR64:$dst, V128:$src, VectorIndexD:$idx) - 6579
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UMOVvi64_idx0 GPR64:$dst, V128:$src, VectorIndex0:$idx) - 6584
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::FPR128RegClassID},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureNEON},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) - 6590
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Reg, AArch64::XZR},
// (UQDECB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6594
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6602
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6610
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6618
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6626
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6634
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6642
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6650
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 6658
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 6666
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6674
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6682
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6690
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6698
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 6706
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 6714
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6722
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6730
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6738
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6746
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 6754
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQDECW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 6762
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCB_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6770
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCB_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6778
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCB_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6786
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCB_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6794
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCD_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6802
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCD_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6810
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCD_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6818
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCD_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6826
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCD_ZPiI ZPR64:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 6834
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCD_ZPiI ZPR64:$Zdn, sve_pred_enum:$pattern, 1) - 6842
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCH_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6850
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCH_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6858
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCH_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6866
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCH_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6874
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCH_ZPiI ZPR16:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 6882
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCH_ZPiI ZPR16:$Zdn, sve_pred_enum:$pattern, 1) - 6890
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCW_WPiI GPR32z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6898
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCW_WPiI GPR32z:$Rdn, sve_pred_enum:$pattern, 1) - 6906
{AliasPatternCond::K_RegClass, AArch64::GPR32RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCW_XPiI GPR64z:$Rdn, { 1, 1, 1, 1, 1 }, 1) - 6914
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCW_XPiI GPR64z:$Rdn, sve_pred_enum:$pattern, 1) - 6922
{AliasPatternCond::K_RegClass, AArch64::GPR64RegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCW_ZPiI ZPR32:$Zdn, { 1, 1, 1, 1, 1 }, 1) - 6930
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(31)},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (UQINCW_ZPiI ZPR32:$Zdn, sve_pred_enum:$pattern, 1) - 6938
{AliasPatternCond::K_RegClass, AArch64::ZPRRegClassID},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Ignore, 0},
{AliasPatternCond::K_Imm, uint32_t(1)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSVE},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (XPACLRI) - 6946
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeaturePAuth},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 1, 1, 1, 1, 1, 1, 1 }) - 6949
{AliasPatternCond::K_Imm, uint32_t(255)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 0, 1, 0, 1, 0, 1, 0, 1 }) - 6953
{AliasPatternCond::K_Imm, uint32_t(85)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 0, 1, 0, 1, 0, 1, 0 }) - 6957
{AliasPatternCond::K_Imm, uint32_t(170)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 0, 0, 0, 1, 0, 0, 0, 1 }) - 6961
{AliasPatternCond::K_Imm, uint32_t(17)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 0, 0, 1, 0, 0, 0, 1, 0 }) - 6965
{AliasPatternCond::K_Imm, uint32_t(34)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 0, 1, 0, 0, 0, 1, 0, 0 }) - 6969
{AliasPatternCond::K_Imm, uint32_t(68)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 0, 0, 0, 1, 0, 0, 0 }) - 6973
{AliasPatternCond::K_Imm, uint32_t(136)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 0, 0, 1, 1, 0, 0, 1, 1 }) - 6977
{AliasPatternCond::K_Imm, uint32_t(51)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 0, 0, 1, 1, 0, 0, 1 }) - 6981
{AliasPatternCond::K_Imm, uint32_t(153)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 0, 1, 1, 0, 0, 1, 1, 0 }) - 6985
{AliasPatternCond::K_Imm, uint32_t(102)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 1, 0, 0, 1, 1, 0, 0 }) - 6989
{AliasPatternCond::K_Imm, uint32_t(204)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 0, 1, 1, 1, 0, 1, 1, 1 }) - 6993
{AliasPatternCond::K_Imm, uint32_t(119)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 0, 1, 1, 1, 0, 1, 1 }) - 6997
{AliasPatternCond::K_Imm, uint32_t(187)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 1, 0, 1, 1, 1, 0, 1 }) - 7001
{AliasPatternCond::K_Imm, uint32_t(221)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
// (ZERO_M { 1, 1, 1, 0, 1, 1, 1, 0 }) - 7005
{AliasPatternCond::K_Imm, uint32_t(238)},
{AliasPatternCond::K_OrFeature, AArch64::FeatureAll},
{AliasPatternCond::K_OrFeature, AArch64::FeatureSME},
{AliasPatternCond::K_EndOrFeatures, 0},
};
static const char AsmStrings[] =
/* 0 */ "cmn $\x02, $\xFF\x03\x01\0"
/* 13 */ "cmn $\x02, $\x03\0"
/* 24 */ "cmn $\x02, $\x03$\xFF\x04\x02\0"
/* 39 */ "adds $\x01, $\x02, $\x03\0"
/* 55 */ "cmn $\x02, $\x03$\xFF\x04\x03\0"
/* 70 */ "mov $\x01, $\x02\0"
/* 81 */ "add $\x01, $\x02, $\x03\0"
/* 96 */ "tst $\x02, $\xFF\x03\x04\0"
/* 109 */ "tst $\x02, $\x03\0"
/* 120 */ "tst $\x02, $\x03$\xFF\x04\x02\0"
/* 135 */ "ands $\x01, $\x02, $\x03\0"
/* 151 */ "tst $\x02, $\xFF\x03\x05\0"
/* 164 */ "movs $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
/* 188 */ "and $\x01, $\x02, $\x03\0"
/* 203 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
/* 226 */ "and $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0"
/* 247 */ "and $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0"
/* 268 */ "and $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0"
/* 289 */ "autia1716\0"
/* 299 */ "autiasp\0"
/* 307 */ "autiaz\0"
/* 314 */ "autib1716\0"
/* 324 */ "autibsp\0"
/* 332 */ "autibz\0"
/* 339 */ "bics $\x01, $\x02, $\x03\0"
/* 355 */ "bic $\x01, $\x02, $\x03\0"
/* 370 */ "clrex\0"
/* 376 */ "cntb $\x01\0"
/* 384 */ "cntb $\x01, $\xFF\x02\x0E\0"
/* 398 */ "cntd $\x01\0"
/* 406 */ "cntd $\x01, $\xFF\x02\x0E\0"
/* 420 */ "cnth $\x01\0"
/* 428 */ "cnth $\x01, $\xFF\x02\x0E\0"
/* 442 */ "cntw $\x01\0"
/* 450 */ "cntw $\x01, $\xFF\x02\x0E\0"
/* 464 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\xFF\x04\x0F\0"
/* 487 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x11\0"
/* 510 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x12\0"
/* 533 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x13\0"
/* 556 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\x04\0"
/* 577 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\x04\0"
/* 598 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\x04\0"
/* 619 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\x04\0"
/* 640 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x0F\0"
/* 663 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/z, $\xFF\x03\x11\0"
/* 686 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/z, $\xFF\x03\x12\0"
/* 709 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/z, $\xFF\x03\x13\0"
/* 732 */ "cset $\x01, $\xFF\x04\x14\0"
/* 746 */ "cinc $\x01, $\x02, $\xFF\x04\x14\0"
/* 764 */ "csetm $\x01, $\xFF\x04\x14\0"
/* 779 */ "cinv $\x01, $\x02, $\xFF\x04\x14\0"
/* 797 */ "cneg $\x01, $\x02, $\xFF\x04\x14\0"
/* 815 */ "dcps1\0"
/* 821 */ "dcps2\0"
/* 827 */ "dcps3\0"
/* 833 */ "decb $\x01\0"
/* 841 */ "decb $\x01, $\xFF\x03\x0E\0"
/* 855 */ "decd $\x01\0"
/* 863 */ "decd $\x01, $\xFF\x03\x0E\0"
/* 877 */ "decd $\xFF\x01\x10\0"
/* 887 */ "decd $\xFF\x01\x10, $\xFF\x03\x0E\0"
/* 903 */ "dech $\x01\0"
/* 911 */ "dech $\x01, $\xFF\x03\x0E\0"
/* 925 */ "dech $\xFF\x01\x09\0"
/* 935 */ "dech $\xFF\x01\x09, $\xFF\x03\x0E\0"
/* 951 */ "decw $\x01\0"
/* 959 */ "decw $\x01, $\xFF\x03\x0E\0"
/* 973 */ "decw $\xFF\x01\x0B\0"
/* 983 */ "decw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
/* 999 */ "ssbb\0"
/* 1004 */ "pssbb\0"
/* 1010 */ "dfb\0"
/* 1014 */ "mov $\xFF\x01\x09, $\xFF\x02\x15\0"
/* 1029 */ "mov $\xFF\x01\x0B, $\xFF\x02\x16\0"
/* 1044 */ "mov $\xFF\x01\x10, $\xFF\x02\x17\0"
/* 1059 */ "dupm $\xFF\x01\x06, $\xFF\x02\x08\0"
/* 1075 */ "dupm $\xFF\x01\x09, $\xFF\x02\x0A\0"
/* 1091 */ "dupm $\xFF\x01\x0B, $\xFF\x02\x04\0"
/* 1107 */ "mov $\xFF\x01\x06, $\xFF\x02\x0F\0"
/* 1122 */ "mov $\xFF\x01\x10, $\xFF\x02\x11\0"
/* 1137 */ "fmov $\xFF\x01\x10, #0.0\0"
/* 1153 */ "mov $\xFF\x01\x09, $\xFF\x02\x12\0"
/* 1168 */ "fmov $\xFF\x01\x09, #0.0\0"
/* 1184 */ "mov $\xFF\x01\x0B, $\xFF\x02\x13\0"
/* 1199 */ "fmov $\xFF\x01\x0B, #0.0\0"
/* 1215 */ "mov $\xFF\x01\x06, $\x02\0"
/* 1228 */ "mov $\xFF\x01\x10, $\x02\0"
/* 1241 */ "mov $\xFF\x01\x09, $\x02\0"
/* 1254 */ "mov $\xFF\x01\x0B, $\x02\0"
/* 1267 */ "mov $\xFF\x01\x06, $\xFF\x02\x18\0"
/* 1282 */ "mov $\xFF\x01\x06, $\xFF\x02\x06$\xFF\x03\x19\0"
/* 1301 */ "mov $\xFF\x01\x10, $\xFF\x02\x1A\0"
/* 1316 */ "mov $\xFF\x01\x10, $\xFF\x02\x10$\xFF\x03\x19\0"
/* 1335 */ "mov $\xFF\x01\x09, $\xFF\x02\x1B\0"
/* 1350 */ "mov $\xFF\x01\x09, $\xFF\x02\x09$\xFF\x03\x19\0"
/* 1369 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1D\0"
/* 1384 */ "mov $\xFF\x01\x1C, $\xFF\x02\x1C$\xFF\x03\x19\0"
/* 1403 */ "mov $\xFF\x01\x0B, $\xFF\x02\x1E\0"
/* 1418 */ "mov $\xFF\x01\x0B, $\xFF\x02\x0B$\xFF\x03\x19\0"
/* 1437 */ "eon $\x01, $\x02, $\x03\0"
/* 1452 */ "nots $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
/* 1476 */ "eor $\x01, $\x02, $\x03\0"
/* 1491 */ "not $\xFF\x01\x06, $\xFF\x02\x07/z, $\xFF\x03\x06\0"
/* 1514 */ "eor $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0"
/* 1535 */ "eor $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0"
/* 1556 */ "eor $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0"
/* 1577 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\xFF\x04\x1F[$\x05, $\xFF\x06\x20]\0"
/* 1610 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x1F[$\x05, $\xFF\x06\x20]\0"
/* 1643 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x1F[$\x05, $\xFF\x06\x20]\0"
/* 1676 */ "mov $\xFF\x01\x1C, $\xFF\x03\x07/m, $\xFF\x04\x1F[$\x05, $\xFF\x06\x20]\0"
/* 1709 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x1F[$\x05, $\xFF\x06\x20]\0"
/* 1742 */ "mov $\xFF\x01\x06, $\xFF\x03\x07/m, $\xFF\x04\x21[$\x05, $\xFF\x06\x20]\0"
/* 1775 */ "mov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x21[$\x05, $\xFF\x06\x20]\0"
/* 1808 */ "mov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x21[$\x05, $\xFF\x06\x20]\0"
/* 1841 */ "mov $\xFF\x01\x1C, $\xFF\x03\x07/m, $\xFF\x04\x21[$\x05, $\xFF\x06\x20]\0"
/* 1874 */ "mov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x21[$\x05, $\xFF\x06\x20]\0"
/* 1907 */ "ror $\x01, $\x02, $\x04\0"
/* 1922 */ "fmov $\xFF\x01\x10, $\xFF\x03\x07/m, $\xFF\x04\x22\0"
/* 1946 */ "fmov $\xFF\x01\x09, $\xFF\x03\x07/m, $\xFF\x04\x22\0"
/* 1970 */ "fmov $\xFF\x01\x0B, $\xFF\x03\x07/m, $\xFF\x04\x22\0"
/* 1994 */ "fmov $\xFF\x01\x10, $\xFF\x02\x22\0"
/* 2010 */ "fmov $\xFF\x01\x09, $\xFF\x02\x22\0"
/* 2026 */ "fmov $\xFF\x01\x0B, $\xFF\x02\x22\0"
/* 2042 */ "ld1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2068 */ "ld1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2094 */ "ld1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2120 */ "ld1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2146 */ "ld1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2172 */ "ld1q $\xFF\x01\x25, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2198 */ "ld1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2225 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2252 */ "ld1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2279 */ "ld1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2306 */ "ld1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2333 */ "ld1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2359 */ "ld1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2385 */ "ldff1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2413 */ "ldff1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2441 */ "ldff1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2469 */ "ldff1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2497 */ "ldff1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2525 */ "ldff1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2554 */ "ldff1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2583 */ "ldff1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2612 */ "ldff1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2641 */ "ldff1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2670 */ "ldff1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 2698 */ "ldff1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 2726 */ "nop\0"
/* 2730 */ "yield\0"
/* 2736 */ "wfe\0"
/* 2740 */ "wfi\0"
/* 2744 */ "sev\0"
/* 2748 */ "sevl\0"
/* 2753 */ "dgh\0"
/* 2757 */ "esb\0"
/* 2761 */ "csdb\0"
/* 2766 */ "bti\0"
/* 2770 */ "bti $\xFF\x01\x26\0"
/* 2779 */ "psb $\xFF\x01\x27\0"
/* 2788 */ "clrbhb\0"
/* 2795 */ "incb $\x01\0"
/* 2803 */ "incb $\x01, $\xFF\x03\x0E\0"
/* 2817 */ "incd $\x01\0"
/* 2825 */ "incd $\x01, $\xFF\x03\x0E\0"
/* 2839 */ "incd $\xFF\x01\x10\0"
/* 2849 */ "incd $\xFF\x01\x10, $\xFF\x03\x0E\0"
/* 2865 */ "inch $\x01\0"
/* 2873 */ "inch $\x01, $\xFF\x03\x0E\0"
/* 2887 */ "inch $\xFF\x01\x09\0"
/* 2897 */ "inch $\xFF\x01\x09, $\xFF\x03\x0E\0"
/* 2913 */ "incw $\x01\0"
/* 2921 */ "incw $\x01, $\xFF\x03\x0E\0"
/* 2935 */ "incw $\xFF\x01\x0B\0"
/* 2945 */ "incw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
/* 2961 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x06\0"
/* 2994 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x10\0"
/* 3027 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x09\0"
/* 3060 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x1C\0"
/* 3093 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x0B\0"
/* 3126 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x06\0"
/* 3159 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x10\0"
/* 3192 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x09\0"
/* 3225 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x1C\0"
/* 3258 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x20], $\xFF\x05\x07/m, $\xFF\x06\x0B\0"
/* 3291 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\x04\0"
/* 3310 */ "mov $\xFF\x01\x0C.h$\xFF\x03\x19, $\xFF\x04\x0C.h$\xFF\x05\x19\0"
/* 3337 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\x04\0"
/* 3356 */ "mov $\xFF\x01\x0C.s$\xFF\x03\x19, $\xFF\x04\x0C.s$\xFF\x05\x19\0"
/* 3383 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\x04\0"
/* 3402 */ "mov $\xFF\x01\x0C.d$\xFF\x03\x19, $\xFF\x04\x0C.d$\xFF\x05\x19\0"
/* 3429 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\x04\0"
/* 3448 */ "mov $\xFF\x01\x0C.b$\xFF\x03\x19, $\xFF\x04\x0C.b$\xFF\x05\x19\0"
/* 3475 */ "irg $\x01, $\x02\0"
/* 3486 */ "isb\0"
/* 3490 */ "ld1b $\xFF\x01\x28, $\xFF\x02\x29/z, [$\x03]\0"
/* 3514 */ "ld1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 3538 */ "ld1b $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 3562 */ "ld1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 3586 */ "ld1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 3610 */ "ld1b $\xFF\x01\x2B, $\xFF\x02\x29/z, [$\x03]\0"
/* 3634 */ "ld1b $\xFF\x01\x28, $\xFF\x02\x29/z, [$\x03]\0"
/* 3658 */ "ld1d $\xFF\x01\x23, $\xFF\x02\x29/z, [$\x03]\0"
/* 3682 */ "ld1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 3706 */ "ld1d $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0"
/* 3730 */ "ld1d $\xFF\x01\x23, $\xFF\x02\x29/z, [$\x03]\0"
/* 3754 */ "ld1 $\xFF\x02\x2C, [$\x01], #64\0"
/* 3774 */ "ld1 $\xFF\x02\x2D, [$\x01], #32\0"
/* 3794 */ "ld1 $\xFF\x02\x2E, [$\x01], #64\0"
/* 3814 */ "ld1 $\xFF\x02\x2F, [$\x01], #32\0"
/* 3834 */ "ld1 $\xFF\x02\x30, [$\x01], #32\0"
/* 3854 */ "ld1 $\xFF\x02\x31, [$\x01], #64\0"
/* 3874 */ "ld1 $\xFF\x02\x32, [$\x01], #32\0"
/* 3894 */ "ld1 $\xFF\x02\x33, [$\x01], #64\0"
/* 3914 */ "ld1h $\xFF\x01\x2A, $\xFF\x02\x29/z, [$\x03]\0"
/* 3938 */ "ld1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 3962 */ "ld1h $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 3986 */ "ld1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4010 */ "ld1h $\xFF\x01\x34, $\xFF\x02\x29/z, [$\x03]\0"
/* 4034 */ "ld1h $\xFF\x01\x2A, $\xFF\x02\x29/z, [$\x03]\0"
/* 4058 */ "ld1 $\xFF\x02\x2C, [$\x01], #16\0"
/* 4078 */ "ld1 $\xFF\x02\x2D, [$\x01], #8\0"
/* 4097 */ "ld1 $\xFF\x02\x2E, [$\x01], #16\0"
/* 4117 */ "ld1 $\xFF\x02\x2F, [$\x01], #8\0"
/* 4136 */ "ld1 $\xFF\x02\x30, [$\x01], #8\0"
/* 4155 */ "ld1 $\xFF\x02\x31, [$\x01], #16\0"
/* 4175 */ "ld1 $\xFF\x02\x32, [$\x01], #8\0"
/* 4194 */ "ld1 $\xFF\x02\x33, [$\x01], #16\0"
/* 4214 */ "ld1rb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4239 */ "ld1rb $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 4264 */ "ld1rb $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 4289 */ "ld1rb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4314 */ "ld1rd $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4339 */ "ld1rh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4364 */ "ld1rh $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 4389 */ "ld1rh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4414 */ "ld1rob $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 4440 */ "ld1rod $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4466 */ "ld1roh $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 4492 */ "ld1row $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4518 */ "ld1rqb $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 4544 */ "ld1rqd $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4570 */ "ld1rqh $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 4596 */ "ld1rqw $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4622 */ "ld1rsb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4648 */ "ld1rsb $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 4674 */ "ld1rsb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4700 */ "ld1rsh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4726 */ "ld1rsh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4752 */ "ld1rsw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4778 */ "ld1rw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 4803 */ "ld1rw $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 4828 */ "ld1r $\xFF\x02\x2C, [$\x01], #1\0"
/* 4848 */ "ld1r $\xFF\x02\x2D, [$\x01], #8\0"
/* 4868 */ "ld1r $\xFF\x02\x2E, [$\x01], #8\0"
/* 4888 */ "ld1r $\xFF\x02\x2F, [$\x01], #4\0"
/* 4908 */ "ld1r $\xFF\x02\x30, [$\x01], #2\0"
/* 4928 */ "ld1r $\xFF\x02\x31, [$\x01], #4\0"
/* 4948 */ "ld1r $\xFF\x02\x32, [$\x01], #1\0"
/* 4968 */ "ld1r $\xFF\x02\x33, [$\x01], #2\0"
/* 4988 */ "ld1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 5013 */ "ld1sb $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 5038 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 5063 */ "ld1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 5088 */ "ld1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 5113 */ "ld1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 5138 */ "ld1 $\xFF\x02\x2C, [$\x01], #48\0"
/* 5158 */ "ld1 $\xFF\x02\x2D, [$\x01], #24\0"
/* 5178 */ "ld1 $\xFF\x02\x2E, [$\x01], #48\0"
/* 5198 */ "ld1 $\xFF\x02\x2F, [$\x01], #24\0"
/* 5218 */ "ld1 $\xFF\x02\x30, [$\x01], #24\0"
/* 5238 */ "ld1 $\xFF\x02\x31, [$\x01], #48\0"
/* 5258 */ "ld1 $\xFF\x02\x32, [$\x01], #24\0"
/* 5278 */ "ld1 $\xFF\x02\x33, [$\x01], #48\0"
/* 5298 */ "ld1 $\xFF\x02\x2C, [$\x01], #32\0"
/* 5318 */ "ld1 $\xFF\x02\x2D, [$\x01], #16\0"
/* 5338 */ "ld1 $\xFF\x02\x2E, [$\x01], #32\0"
/* 5358 */ "ld1 $\xFF\x02\x2F, [$\x01], #16\0"
/* 5378 */ "ld1 $\xFF\x02\x30, [$\x01], #16\0"
/* 5398 */ "ld1 $\xFF\x02\x31, [$\x01], #32\0"
/* 5418 */ "ld1 $\xFF\x02\x32, [$\x01], #16\0"
/* 5438 */ "ld1 $\xFF\x02\x33, [$\x01], #32\0"
/* 5458 */ "ld1w $\xFF\x01\x24, $\xFF\x02\x29/z, [$\x03]\0"
/* 5482 */ "ld1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 5506 */ "ld1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 5530 */ "ld1w $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0"
/* 5554 */ "ld1w $\xFF\x01\x24, $\xFF\x02\x29/z, [$\x03]\0"
/* 5578 */ "ld1b {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5614 */ "ld1d {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5650 */ "ld1h {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5686 */ "ld1q {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5722 */ "ld1w {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5758 */ "ld1b {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5794 */ "ld1d {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5830 */ "ld1h {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5866 */ "ld1q {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5902 */ "ld1w {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07/z, [$\x05]\0"
/* 5938 */ "ld1 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #2\0"
/* 5961 */ "ld1 $\xFF\x02\x35$\xFF\x04\x19, [$\x01], #4\0"
/* 5984 */ "ld1 $\xFF\x02\x36$\xFF\x04\x19, [$\x01], #8\0"
/* 6007 */ "ld1 $\xFF\x02\x2B$\xFF\x04\x19, [$\x01], #1\0"
/* 6030 */ "ld2b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 6054 */ "ld2d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 6078 */ "ld2h $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 6102 */ "ld2q $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0"
/* 6126 */ "ld2r $\xFF\x02\x2C, [$\x01], #2\0"
/* 6146 */ "ld2r $\xFF\x02\x2D, [$\x01], #16\0"
/* 6167 */ "ld2r $\xFF\x02\x2E, [$\x01], #16\0"
/* 6188 */ "ld2r $\xFF\x02\x2F, [$\x01], #8\0"
/* 6208 */ "ld2r $\xFF\x02\x30, [$\x01], #4\0"
/* 6228 */ "ld2r $\xFF\x02\x31, [$\x01], #8\0"
/* 6248 */ "ld2r $\xFF\x02\x32, [$\x01], #2\0"
/* 6268 */ "ld2r $\xFF\x02\x33, [$\x01], #4\0"
/* 6288 */ "ld2 $\xFF\x02\x2C, [$\x01], #32\0"
/* 6308 */ "ld2 $\xFF\x02\x2E, [$\x01], #32\0"
/* 6328 */ "ld2 $\xFF\x02\x2F, [$\x01], #16\0"
/* 6348 */ "ld2 $\xFF\x02\x30, [$\x01], #16\0"
/* 6368 */ "ld2 $\xFF\x02\x31, [$\x01], #32\0"
/* 6388 */ "ld2 $\xFF\x02\x32, [$\x01], #16\0"
/* 6408 */ "ld2 $\xFF\x02\x33, [$\x01], #32\0"
/* 6428 */ "ld2w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 6452 */ "ld2 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #4\0"
/* 6475 */ "ld2 $\xFF\x02\x35$\xFF\x04\x19, [$\x01], #8\0"
/* 6498 */ "ld2 $\xFF\x02\x36$\xFF\x04\x19, [$\x01], #16\0"
/* 6522 */ "ld2 $\xFF\x02\x2B$\xFF\x04\x19, [$\x01], #2\0"
/* 6545 */ "ld3b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 6569 */ "ld3d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 6593 */ "ld3h $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 6617 */ "ld3q $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0"
/* 6641 */ "ld3r $\xFF\x02\x2C, [$\x01], #3\0"
/* 6661 */ "ld3r $\xFF\x02\x2D, [$\x01], #24\0"
/* 6682 */ "ld3r $\xFF\x02\x2E, [$\x01], #24\0"
/* 6703 */ "ld3r $\xFF\x02\x2F, [$\x01], #12\0"
/* 6724 */ "ld3r $\xFF\x02\x30, [$\x01], #6\0"
/* 6744 */ "ld3r $\xFF\x02\x31, [$\x01], #12\0"
/* 6765 */ "ld3r $\xFF\x02\x32, [$\x01], #3\0"
/* 6785 */ "ld3r $\xFF\x02\x33, [$\x01], #6\0"
/* 6805 */ "ld3 $\xFF\x02\x2C, [$\x01], #48\0"
/* 6825 */ "ld3 $\xFF\x02\x2E, [$\x01], #48\0"
/* 6845 */ "ld3 $\xFF\x02\x2F, [$\x01], #24\0"
/* 6865 */ "ld3 $\xFF\x02\x30, [$\x01], #24\0"
/* 6885 */ "ld3 $\xFF\x02\x31, [$\x01], #48\0"
/* 6905 */ "ld3 $\xFF\x02\x32, [$\x01], #24\0"
/* 6925 */ "ld3 $\xFF\x02\x33, [$\x01], #48\0"
/* 6945 */ "ld3w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 6969 */ "ld3 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #6\0"
/* 6992 */ "ld3 $\xFF\x02\x35$\xFF\x04\x19, [$\x01], #12\0"
/* 7016 */ "ld3 $\xFF\x02\x36$\xFF\x04\x19, [$\x01], #24\0"
/* 7040 */ "ld3 $\xFF\x02\x2B$\xFF\x04\x19, [$\x01], #3\0"
/* 7063 */ "ld4b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 7087 */ "ld4d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 7111 */ "ld4 $\xFF\x02\x2C, [$\x01], #64\0"
/* 7131 */ "ld4 $\xFF\x02\x2E, [$\x01], #64\0"
/* 7151 */ "ld4 $\xFF\x02\x2F, [$\x01], #32\0"
/* 7171 */ "ld4 $\xFF\x02\x30, [$\x01], #32\0"
/* 7191 */ "ld4 $\xFF\x02\x31, [$\x01], #64\0"
/* 7211 */ "ld4 $\xFF\x02\x32, [$\x01], #32\0"
/* 7231 */ "ld4 $\xFF\x02\x33, [$\x01], #64\0"
/* 7251 */ "ld4h $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 7275 */ "ld4q $\xFF\x01\x25, $\xFF\x02\x07/z, [$\x03]\0"
/* 7299 */ "ld4r $\xFF\x02\x2C, [$\x01], #4\0"
/* 7319 */ "ld4r $\xFF\x02\x2D, [$\x01], #32\0"
/* 7340 */ "ld4r $\xFF\x02\x2E, [$\x01], #32\0"
/* 7361 */ "ld4r $\xFF\x02\x2F, [$\x01], #16\0"
/* 7382 */ "ld4r $\xFF\x02\x30, [$\x01], #8\0"
/* 7402 */ "ld4r $\xFF\x02\x31, [$\x01], #16\0"
/* 7423 */ "ld4r $\xFF\x02\x32, [$\x01], #4\0"
/* 7443 */ "ld4r $\xFF\x02\x33, [$\x01], #8\0"
/* 7463 */ "ld4w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 7487 */ "ld4 $\xFF\x02\x34$\xFF\x04\x19, [$\x01], #8\0"
/* 7510 */ "ld4 $\xFF\x02\x35$\xFF\x04\x19, [$\x01], #16\0"
/* 7534 */ "ld4 $\xFF\x02\x36$\xFF\x04\x19, [$\x01], #32\0"
/* 7558 */ "ld4 $\xFF\x02\x2B$\xFF\x04\x19, [$\x01], #4\0"
/* 7581 */ "staddb $\x02, [$\x03]\0"
/* 7597 */ "staddh $\x02, [$\x03]\0"
/* 7613 */ "staddlb $\x02, [$\x03]\0"
/* 7630 */ "staddlh $\x02, [$\x03]\0"
/* 7647 */ "staddl $\x02, [$\x03]\0"
/* 7663 */ "stadd $\x02, [$\x03]\0"
/* 7678 */ "ldapurb $\x01, [$\x02]\0"
/* 7695 */ "ldapurh $\x01, [$\x02]\0"
/* 7712 */ "ldapursb $\x01, [$\x02]\0"
/* 7730 */ "ldapursh $\x01, [$\x02]\0"
/* 7748 */ "ldapursw $\x01, [$\x02]\0"
/* 7766 */ "ldapur $\x01, [$\x02]\0"
/* 7782 */ "stclrb $\x02, [$\x03]\0"
/* 7798 */ "stclrh $\x02, [$\x03]\0"
/* 7814 */ "stclrlb $\x02, [$\x03]\0"
/* 7831 */ "stclrlh $\x02, [$\x03]\0"
/* 7848 */ "stclrl $\x02, [$\x03]\0"
/* 7864 */ "stclr $\x02, [$\x03]\0"
/* 7879 */ "steorb $\x02, [$\x03]\0"
/* 7895 */ "steorh $\x02, [$\x03]\0"
/* 7911 */ "steorlb $\x02, [$\x03]\0"
/* 7928 */ "steorlh $\x02, [$\x03]\0"
/* 7945 */ "steorl $\x02, [$\x03]\0"
/* 7961 */ "steor $\x02, [$\x03]\0"
/* 7976 */ "ldff1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8002 */ "ldff1b $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 8028 */ "ldff1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 8054 */ "ldff1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8080 */ "ldff1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8106 */ "ldff1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8132 */ "ldff1h $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 8158 */ "ldff1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8184 */ "ldff1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8211 */ "ldff1sb $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 8238 */ "ldff1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8265 */ "ldff1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8292 */ "ldff1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8319 */ "ldff1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8346 */ "ldff1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8372 */ "ldff1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8398 */ "ldg $\x01, [$\x03]\0"
/* 8411 */ "ldnf1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8437 */ "ldnf1b $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 8463 */ "ldnf1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 8489 */ "ldnf1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8515 */ "ldnf1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8541 */ "ldnf1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8567 */ "ldnf1h $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 8593 */ "ldnf1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8619 */ "ldnf1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8646 */ "ldnf1sb $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 8673 */ "ldnf1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8700 */ "ldnf1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8727 */ "ldnf1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8754 */ "ldnf1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8781 */ "ldnf1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 8807 */ "ldnf1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 8833 */ "ldnp $\x01, $\x02, [$\x03]\0"
/* 8851 */ "ldnt1b $\xFF\x01\x28, $\xFF\x02\x29/z, [$\x03]\0"
/* 8877 */ "ldnt1b $\xFF\x01\x2B, $\xFF\x02\x29/z, [$\x03]\0"
/* 8903 */ "ldnt1b $\xFF\x01\x28, $\xFF\x02\x29/z, [$\x03]\0"
/* 8929 */ "ldnt1b $\xFF\x01\x28, $\xFF\x02\x07/z, [$\x03]\0"
/* 8955 */ "ldnt1b $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 8983 */ "ldnt1b $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 9011 */ "ldnt1d $\xFF\x01\x23, $\xFF\x02\x29/z, [$\x03]\0"
/* 9037 */ "ldnt1d $\xFF\x01\x23, $\xFF\x02\x29/z, [$\x03]\0"
/* 9063 */ "ldnt1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\x03]\0"
/* 9089 */ "ldnt1d $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 9117 */ "ldnt1h $\xFF\x01\x2A, $\xFF\x02\x29/z, [$\x03]\0"
/* 9143 */ "ldnt1h $\xFF\x01\x34, $\xFF\x02\x29/z, [$\x03]\0"
/* 9169 */ "ldnt1h $\xFF\x01\x2A, $\xFF\x02\x29/z, [$\x03]\0"
/* 9195 */ "ldnt1h $\xFF\x01\x2A, $\xFF\x02\x07/z, [$\x03]\0"
/* 9221 */ "ldnt1h $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 9249 */ "ldnt1h $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 9277 */ "ldnt1sb $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 9306 */ "ldnt1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 9335 */ "ldnt1sh $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 9364 */ "ldnt1sh $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 9393 */ "ldnt1sw $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 9422 */ "ldnt1w $\xFF\x01\x24, $\xFF\x02\x29/z, [$\x03]\0"
/* 9448 */ "ldnt1w $\xFF\x01\x24, $\xFF\x02\x29/z, [$\x03]\0"
/* 9474 */ "ldnt1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
/* 9500 */ "ldnt1w $\xFF\x01\x23, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
/* 9528 */ "ldnt1w $\xFF\x01\x24, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
/* 9556 */ "ldp $\x01, $\x02, [$\x03]\0"
/* 9573 */ "ldpsw $\x01, $\x02, [$\x03]\0"
/* 9592 */ "ldraa $\x01, [$\x02]\0"
/* 9607 */ "ldrab $\x01, [$\x02]\0"
/* 9622 */ "ldrb $\x01, [$\x02, $\x03]\0"
/* 9640 */ "ldrb $\x01, [$\x02]\0"
/* 9654 */ "ldr $\x01, [$\x02, $\x03]\0"
/* 9671 */ "ldr $\x01, [$\x02]\0"
/* 9684 */ "ldrh $\x01, [$\x02, $\x03]\0"
/* 9702 */ "ldrh $\x01, [$\x02]\0"
/* 9716 */ "ldrsb $\x01, [$\x02, $\x03]\0"
/* 9735 */ "ldrsb $\x01, [$\x02]\0"
/* 9750 */ "ldrsh $\x01, [$\x02, $\x03]\0"
/* 9769 */ "ldrsh $\x01, [$\x02]\0"
/* 9784 */ "ldrsw $\x01, [$\x02, $\x03]\0"
/* 9803 */ "ldrsw $\x01, [$\x02]\0"
/* 9818 */ "ldr $\xFF\x01\x07, [$\x02]\0"
/* 9833 */ "ldr $\xFF\x01\x37[$\x02, $\xFF\x03\x20], [$\x04]\0"
/* 9858 */ "stsetb $\x02, [$\x03]\0"
/* 9874 */ "stseth $\x02, [$\x03]\0"
/* 9890 */ "stsetlb $\x02, [$\x03]\0"
/* 9907 */ "stsetlh $\x02, [$\x03]\0"
/* 9924 */ "stsetl $\x02, [$\x03]\0"
/* 9940 */ "stset $\x02, [$\x03]\0"
/* 9955 */ "stsmaxb $\x02, [$\x03]\0"
/* 9972 */ "stsmaxh $\x02, [$\x03]\0"
/* 9989 */ "stsmaxlb $\x02, [$\x03]\0"
/* 10007 */ "stsmaxlh $\x02, [$\x03]\0"
/* 10025 */ "stsmaxl $\x02, [$\x03]\0"
/* 10042 */ "stsmax $\x02, [$\x03]\0"
/* 10058 */ "stsminb $\x02, [$\x03]\0"
/* 10075 */ "stsminh $\x02, [$\x03]\0"
/* 10092 */ "stsminlb $\x02, [$\x03]\0"
/* 10110 */ "stsminlh $\x02, [$\x03]\0"
/* 10128 */ "stsminl $\x02, [$\x03]\0"
/* 10145 */ "stsmin $\x02, [$\x03]\0"
/* 10161 */ "ldtrb $\x01, [$\x02]\0"
/* 10176 */ "ldtrh $\x01, [$\x02]\0"
/* 10191 */ "ldtrsb $\x01, [$\x02]\0"
/* 10207 */ "ldtrsh $\x01, [$\x02]\0"
/* 10223 */ "ldtrsw $\x01, [$\x02]\0"
/* 10239 */ "ldtr $\x01, [$\x02]\0"
/* 10253 */ "stumaxb $\x02, [$\x03]\0"
/* 10270 */ "stumaxh $\x02, [$\x03]\0"
/* 10287 */ "stumaxlb $\x02, [$\x03]\0"
/* 10305 */ "stumaxlh $\x02, [$\x03]\0"
/* 10323 */ "stumaxl $\x02, [$\x03]\0"
/* 10340 */ "stumax $\x02, [$\x03]\0"
/* 10356 */ "stuminb $\x02, [$\x03]\0"
/* 10373 */ "stuminh $\x02, [$\x03]\0"
/* 10390 */ "stuminlb $\x02, [$\x03]\0"
/* 10408 */ "stuminlh $\x02, [$\x03]\0"
/* 10426 */ "stuminl $\x02, [$\x03]\0"
/* 10443 */ "stumin $\x02, [$\x03]\0"
/* 10459 */ "ldurb $\x01, [$\x02]\0"
/* 10474 */ "ldur $\x01, [$\x02]\0"
/* 10488 */ "ldurh $\x01, [$\x02]\0"
/* 10503 */ "ldursb $\x01, [$\x02]\0"
/* 10519 */ "ldursh $\x01, [$\x02]\0"
/* 10535 */ "ldursw $\x01, [$\x02]\0"
/* 10551 */ "mul $\x01, $\x02, $\x03\0"
/* 10566 */ "mov $\xFF\x01\x28, $\xFF\x02\x1F[$\x03, $\xFF\x04\x38]\0"
/* 10591 */ "mov $\xFF\x01\x23, $\xFF\x02\x1F[$\x03, $\xFF\x04\x38]\0"
/* 10616 */ "mov $\xFF\x01\x2A, $\xFF\x02\x1F[$\x03, $\xFF\x04\x38]\0"
/* 10641 */ "mov $\xFF\x01\x24, $\xFF\x02\x1F[$\x03, $\xFF\x04\x38]\0"
/* 10666 */ "mov $\xFF\x01\x28, $\xFF\x02\x21[$\x03, $\xFF\x04\x38]\0"
/* 10691 */ "mov $\xFF\x01\x23, $\xFF\x02\x21[$\x03, $\xFF\x04\x38]\0"
/* 10716 */ "mov $\xFF\x01\x2A, $\xFF\x02\x21[$\x03, $\xFF\x04\x38]\0"
/* 10741 */ "mov $\xFF\x01\x24, $\xFF\x02\x21[$\x03, $\xFF\x04\x38]\0"
/* 10766 */ "mov $\xFF\x01\x28, $\xFF\x02\x1F[$\x03, $\xFF\x04\x39]\0"
/* 10791 */ "mov $\xFF\x01\x23, $\xFF\x02\x1F[$\x03, $\xFF\x04\x39]\0"
/* 10816 */ "mov $\xFF\x01\x2A, $\xFF\x02\x1F[$\x03, $\xFF\x04\x39]\0"
/* 10841 */ "mov $\xFF\x01\x24, $\xFF\x02\x1F[$\x03, $\xFF\x04\x39]\0"
/* 10866 */ "mov $\xFF\x01\x28, $\xFF\x02\x21[$\x03, $\xFF\x04\x39]\0"
/* 10891 */ "mov $\xFF\x01\x23, $\xFF\x02\x21[$\x03, $\xFF\x04\x39]\0"
/* 10916 */ "mov $\xFF\x01\x2A, $\xFF\x02\x21[$\x03, $\xFF\x04\x39]\0"
/* 10941 */ "mov $\xFF\x01\x24, $\xFF\x02\x21[$\x03, $\xFF\x04\x39]\0"
/* 10966 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x38], $\xFF\x05\x28\0"
/* 10991 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x38], $\xFF\x05\x23\0"
/* 11016 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x38], $\xFF\x05\x2A\0"
/* 11041 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x38], $\xFF\x05\x24\0"
/* 11066 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x38], $\xFF\x05\x28\0"
/* 11091 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x38], $\xFF\x05\x23\0"
/* 11116 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x38], $\xFF\x05\x2A\0"
/* 11141 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x38], $\xFF\x05\x24\0"
/* 11166 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x39], $\xFF\x05\x28\0"
/* 11191 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x39], $\xFF\x05\x23\0"
/* 11216 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x39], $\xFF\x05\x2A\0"
/* 11241 */ "mov $\xFF\x01\x1F[$\x03, $\xFF\x04\x39], $\xFF\x05\x24\0"
/* 11266 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x39], $\xFF\x05\x28\0"
/* 11291 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x39], $\xFF\x05\x23\0"
/* 11316 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x39], $\xFF\x05\x2A\0"
/* 11341 */ "mov $\xFF\x01\x21[$\x03, $\xFF\x04\x39], $\xFF\x05\x24\0"
/* 11366 */ "mov $\xFF\x01\x23, $\xFF\x02\x3A[$\x03, $\xFF\x04\x20, vgx2]\0"
/* 11397 */ "mov $\xFF\x01\x3A[$\x03, $\xFF\x04\x20, vgx2], $\xFF\x05\x23\0"
/* 11428 */ "mov $\xFF\x01\x23, $\xFF\x02\x3A[$\x03, $\xFF\x04\x20, vgx4]\0"
/* 11459 */ "mov $\xFF\x01\x3A[$\x03, $\xFF\x04\x20, vgx4], $\xFF\x05\x23\0"
/* 11490 */ "smstart\0"
/* 11498 */ "smstart sm\0"
/* 11509 */ "smstart za\0"
/* 11520 */ "smstop\0"
/* 11527 */ "smstop sm\0"
/* 11537 */ "smstop za\0"
/* 11547 */ "mneg $\x01, $\x02, $\x03\0"
/* 11563 */ "mvn $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0"
/* 11586 */ "mvn $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0"
/* 11607 */ "mvn $\x01, $\x03\0"
/* 11618 */ "mvn $\x01, $\x03$\xFF\x04\x02\0"
/* 11633 */ "orn $\x01, $\x02, $\x03\0"
/* 11648 */ "movs $\xFF\x01\x06, $\xFF\x02\x06\0"
/* 11664 */ "mov $\x01, $\x03\0"
/* 11675 */ "orr $\x01, $\x02, $\x03\0"
/* 11690 */ "mov $\xFF\x01\x06, $\xFF\x02\x06\0"
/* 11705 */ "orr $\xFF\x01\x06, $\xFF\x01\x06, $\xFF\x03\x08\0"
/* 11726 */ "orr $\xFF\x01\x09, $\xFF\x01\x09, $\xFF\x03\x0A\0"
/* 11747 */ "orr $\xFF\x01\x0B, $\xFF\x01\x0B, $\xFF\x03\x04\0"
/* 11768 */ "mov $\xFF\x01\x10, $\xFF\x02\x10\0"
/* 11783 */ "mov $\xFF\x01\x0C.16b, $\xFF\x02\x0C.16b\0"
/* 11806 */ "mov $\xFF\x01\x0C.8b, $\xFF\x02\x0C.8b\0"
/* 11827 */ "pacia1716\0"
/* 11837 */ "paciasp\0"
/* 11845 */ "paciaz\0"
/* 11852 */ "pacib1716\0"
/* 11862 */ "pacibsp\0"
/* 11870 */ "pacibz\0"
/* 11877 */ "pmov $\xFF\x01\x06, $\xFF\x02\x07\0"
/* 11893 */ "pmov $\xFF\x01\x07, $\xFF\x04\x06\0"
/* 11909 */ "prfb $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 11933 */ "prfb $\xFF\x01\x3C, $\xFF\x02\x07, [$\x03]\0"
/* 11955 */ "prfb $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 11979 */ "prfd $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 12003 */ "prfd $\xFF\x01\x3C, $\xFF\x02\x07, [$\x03]\0"
/* 12025 */ "prfd $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 12049 */ "prfh $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 12073 */ "prfh $\xFF\x01\x3C, $\xFF\x02\x07, [$\x03]\0"
/* 12095 */ "prfh $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 12119 */ "prfm $\xFF\x01\x3D, [$\x02, $\x03]\0"
/* 12139 */ "prfm $\xFF\x01\x3D, [$\x02]\0"
/* 12155 */ "prfum $\xFF\x01\x3D, [$\x02]\0"
/* 12172 */ "prfw $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 12196 */ "prfw $\xFF\x01\x3C, $\xFF\x02\x07, [$\x03]\0"
/* 12218 */ "prfw $\xFF\x01\x3C, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 12242 */ "ptrues $\xFF\x01\x06\0"
/* 12254 */ "ptrues $\xFF\x01\x10\0"
/* 12266 */ "ptrues $\xFF\x01\x09\0"
/* 12278 */ "ptrues $\xFF\x01\x0B\0"
/* 12290 */ "ptrue $\xFF\x01\x06\0"
/* 12301 */ "ptrue $\xFF\x01\x10\0"
/* 12312 */ "ptrue $\xFF\x01\x09\0"
/* 12323 */ "ptrue $\xFF\x01\x0B\0"
/* 12334 */ "ret\0"
/* 12338 */ "ngcs $\x01, $\x03\0"
/* 12350 */ "ngc $\x01, $\x03\0"
/* 12361 */ "asr $\x01, $\x02, $\x03\0"
/* 12376 */ "sxtb $\x01, $\x02\0"
/* 12388 */ "sxth $\x01, $\x02\0"
/* 12400 */ "sxtw $\x01, $\x02\0"
/* 12412 */ "mov $\xFF\x01\x06, $\xFF\x02\x07/m, $\xFF\x03\x06\0"
/* 12435 */ "mov $\xFF\x01\x10, $\xFF\x02\x07/m, $\xFF\x03\x10\0"
/* 12458 */ "mov $\xFF\x01\x09, $\xFF\x02\x07/m, $\xFF\x03\x09\0"
/* 12481 */ "mov $\xFF\x01\x0B, $\xFF\x02\x07/m, $\xFF\x03\x0B\0"
/* 12504 */ "smull $\x01, $\x02, $\x03\0"
/* 12521 */ "smnegl $\x01, $\x02, $\x03\0"
/* 12539 */ "sqdecb $\x01\0"
/* 12549 */ "sqdecb $\x01, $\xFF\x03\x0E\0"
/* 12565 */ "sqdecb $\x01, $\xFF\x02\x3E\0"
/* 12581 */ "sqdecb $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 12603 */ "sqdecd $\x01\0"
/* 12613 */ "sqdecd $\x01, $\xFF\x03\x0E\0"
/* 12629 */ "sqdecd $\x01, $\xFF\x02\x3E\0"
/* 12645 */ "sqdecd $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 12667 */ "sqdecd $\xFF\x01\x10\0"
/* 12679 */ "sqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0"
/* 12697 */ "sqdech $\x01\0"
/* 12707 */ "sqdech $\x01, $\xFF\x03\x0E\0"
/* 12723 */ "sqdech $\x01, $\xFF\x02\x3E\0"
/* 12739 */ "sqdech $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 12761 */ "sqdech $\xFF\x01\x09\0"
/* 12773 */ "sqdech $\xFF\x01\x09, $\xFF\x03\x0E\0"
/* 12791 */ "sqdecw $\x01\0"
/* 12801 */ "sqdecw $\x01, $\xFF\x03\x0E\0"
/* 12817 */ "sqdecw $\x01, $\xFF\x02\x3E\0"
/* 12833 */ "sqdecw $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 12855 */ "sqdecw $\xFF\x01\x0B\0"
/* 12867 */ "sqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
/* 12885 */ "sqincb $\x01\0"
/* 12895 */ "sqincb $\x01, $\xFF\x03\x0E\0"
/* 12911 */ "sqincb $\x01, $\xFF\x02\x3E\0"
/* 12927 */ "sqincb $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 12949 */ "sqincd $\x01\0"
/* 12959 */ "sqincd $\x01, $\xFF\x03\x0E\0"
/* 12975 */ "sqincd $\x01, $\xFF\x02\x3E\0"
/* 12991 */ "sqincd $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 13013 */ "sqincd $\xFF\x01\x10\0"
/* 13025 */ "sqincd $\xFF\x01\x10, $\xFF\x03\x0E\0"
/* 13043 */ "sqinch $\x01\0"
/* 13053 */ "sqinch $\x01, $\xFF\x03\x0E\0"
/* 13069 */ "sqinch $\x01, $\xFF\x02\x3E\0"
/* 13085 */ "sqinch $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 13107 */ "sqinch $\xFF\x01\x09\0"
/* 13119 */ "sqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
/* 13137 */ "sqincw $\x01\0"
/* 13147 */ "sqincw $\x01, $\xFF\x03\x0E\0"
/* 13163 */ "sqincw $\x01, $\xFF\x02\x3E\0"
/* 13179 */ "sqincw $\x01, $\xFF\x02\x3E, $\xFF\x03\x0E\0"
/* 13201 */ "sqincw $\xFF\x01\x0B\0"
/* 13213 */ "sqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
/* 13231 */ "st1b $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 13255 */ "st1b $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 13279 */ "st1d $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 13303 */ "st1h $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 13327 */ "st1h $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 13351 */ "st1q $\xFF\x01\x25, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 13375 */ "st1w $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 13399 */ "st1w $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 13423 */ "st1b $\xFF\x01\x28, $\xFF\x02\x29, [$\x03]\0"
/* 13445 */ "st1b $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 13467 */ "st1b $\xFF\x01\x2A, $\xFF\x02\x07, [$\x03]\0"
/* 13489 */ "st1b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
/* 13511 */ "st1b $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
/* 13533 */ "st1b $\xFF\x01\x2B, $\xFF\x02\x29, [$\x03]\0"
/* 13555 */ "st1b $\xFF\x01\x28, $\xFF\x02\x29, [$\x03]\0"
/* 13577 */ "st1d $\xFF\x01\x23, $\xFF\x02\x29, [$\x03]\0"
/* 13599 */ "st1d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 13621 */ "st1d $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0"
/* 13643 */ "st1d $\xFF\x01\x23, $\xFF\x02\x29, [$\x03]\0"
/* 13665 */ "st1 $\xFF\x02\x2C, [$\x01], #64\0"
/* 13685 */ "st1 $\xFF\x02\x2D, [$\x01], #32\0"
/* 13705 */ "st1 $\xFF\x02\x2E, [$\x01], #64\0"
/* 13725 */ "st1 $\xFF\x02\x2F, [$\x01], #32\0"
/* 13745 */ "st1 $\xFF\x02\x30, [$\x01], #32\0"
/* 13765 */ "st1 $\xFF\x02\x31, [$\x01], #64\0"
/* 13785 */ "st1 $\xFF\x02\x32, [$\x01], #32\0"
/* 13805 */ "st1 $\xFF\x02\x33, [$\x01], #64\0"
/* 13825 */ "st1h $\xFF\x01\x2A, $\xFF\x02\x29, [$\x03]\0"
/* 13847 */ "st1h $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 13869 */ "st1h $\xFF\x01\x2A, $\xFF\x02\x07, [$\x03]\0"
/* 13891 */ "st1h $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
/* 13913 */ "st1h $\xFF\x01\x34, $\xFF\x02\x29, [$\x03]\0"
/* 13935 */ "st1h $\xFF\x01\x2A, $\xFF\x02\x29, [$\x03]\0"
/* 13957 */ "st1 $\xFF\x02\x2C, [$\x01], #16\0"
/* 13977 */ "st1 $\xFF\x02\x2D, [$\x01], #8\0"
/* 13996 */ "st1 $\xFF\x02\x2E, [$\x01], #16\0"
/* 14016 */ "st1 $\xFF\x02\x2F, [$\x01], #8\0"
/* 14035 */ "st1 $\xFF\x02\x30, [$\x01], #8\0"
/* 14054 */ "st1 $\xFF\x02\x31, [$\x01], #16\0"
/* 14074 */ "st1 $\xFF\x02\x32, [$\x01], #8\0"
/* 14093 */ "st1 $\xFF\x02\x33, [$\x01], #16\0"
/* 14113 */ "st1 $\xFF\x02\x2C, [$\x01], #48\0"
/* 14133 */ "st1 $\xFF\x02\x2D, [$\x01], #24\0"
/* 14153 */ "st1 $\xFF\x02\x2E, [$\x01], #48\0"
/* 14173 */ "st1 $\xFF\x02\x2F, [$\x01], #24\0"
/* 14193 */ "st1 $\xFF\x02\x30, [$\x01], #24\0"
/* 14213 */ "st1 $\xFF\x02\x31, [$\x01], #48\0"
/* 14233 */ "st1 $\xFF\x02\x32, [$\x01], #24\0"
/* 14253 */ "st1 $\xFF\x02\x33, [$\x01], #48\0"
/* 14273 */ "st1 $\xFF\x02\x2C, [$\x01], #32\0"
/* 14293 */ "st1 $\xFF\x02\x2D, [$\x01], #16\0"
/* 14313 */ "st1 $\xFF\x02\x2E, [$\x01], #32\0"
/* 14333 */ "st1 $\xFF\x02\x2F, [$\x01], #16\0"
/* 14353 */ "st1 $\xFF\x02\x30, [$\x01], #16\0"
/* 14373 */ "st1 $\xFF\x02\x31, [$\x01], #32\0"
/* 14393 */ "st1 $\xFF\x02\x32, [$\x01], #16\0"
/* 14413 */ "st1 $\xFF\x02\x33, [$\x01], #32\0"
/* 14433 */ "st1w $\xFF\x01\x24, $\xFF\x02\x29, [$\x03]\0"
/* 14455 */ "st1w $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 14477 */ "st1w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
/* 14499 */ "st1w $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0"
/* 14521 */ "st1w $\xFF\x01\x24, $\xFF\x02\x29, [$\x03]\0"
/* 14543 */ "st1b {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14577 */ "st1d {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14611 */ "st1h {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14645 */ "st1q {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14679 */ "st1w {$\xFF\x01\x1F[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14713 */ "st1b {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14747 */ "st1d {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14781 */ "st1h {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14815 */ "st1q {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14849 */ "st1w {$\xFF\x01\x21[$\x02, $\xFF\x03\x20]}, $\xFF\x04\x07, [$\x05]\0"
/* 14883 */ "st1 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #2\0"
/* 14906 */ "st1 $\xFF\x02\x35$\xFF\x03\x19, [$\x01], #4\0"
/* 14929 */ "st1 $\xFF\x02\x36$\xFF\x03\x19, [$\x01], #8\0"
/* 14952 */ "st1 $\xFF\x02\x2B$\xFF\x03\x19, [$\x01], #1\0"
/* 14975 */ "st2b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
/* 14997 */ "st2d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 15019 */ "st2g $\x01, [$\x02]\0"
/* 15033 */ "st2h $\xFF\x01\x2A, $\xFF\x02\x07, [$\x03]\0"
/* 15055 */ "st2q $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0"
/* 15077 */ "st2 $\xFF\x02\x2C, [$\x01], #32\0"
/* 15097 */ "st2 $\xFF\x02\x2E, [$\x01], #32\0"
/* 15117 */ "st2 $\xFF\x02\x2F, [$\x01], #16\0"
/* 15137 */ "st2 $\xFF\x02\x30, [$\x01], #16\0"
/* 15157 */ "st2 $\xFF\x02\x31, [$\x01], #32\0"
/* 15177 */ "st2 $\xFF\x02\x32, [$\x01], #16\0"
/* 15197 */ "st2 $\xFF\x02\x33, [$\x01], #32\0"
/* 15217 */ "st2w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
/* 15239 */ "st2 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #4\0"
/* 15262 */ "st2 $\xFF\x02\x35$\xFF\x03\x19, [$\x01], #8\0"
/* 15285 */ "st2 $\xFF\x02\x36$\xFF\x03\x19, [$\x01], #16\0"
/* 15309 */ "st2 $\xFF\x02\x2B$\xFF\x03\x19, [$\x01], #2\0"
/* 15332 */ "st3b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
/* 15354 */ "st3d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 15376 */ "st3h $\xFF\x01\x2A, $\xFF\x02\x07, [$\x03]\0"
/* 15398 */ "st3q $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0"
/* 15420 */ "st3 $\xFF\x02\x2C, [$\x01], #48\0"
/* 15440 */ "st3 $\xFF\x02\x2E, [$\x01], #48\0"
/* 15460 */ "st3 $\xFF\x02\x2F, [$\x01], #24\0"
/* 15480 */ "st3 $\xFF\x02\x30, [$\x01], #24\0"
/* 15500 */ "st3 $\xFF\x02\x31, [$\x01], #48\0"
/* 15520 */ "st3 $\xFF\x02\x32, [$\x01], #24\0"
/* 15540 */ "st3 $\xFF\x02\x33, [$\x01], #48\0"
/* 15560 */ "st3w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
/* 15582 */ "st3 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #6\0"
/* 15605 */ "st3 $\xFF\x02\x35$\xFF\x03\x19, [$\x01], #12\0"
/* 15629 */ "st3 $\xFF\x02\x36$\xFF\x03\x19, [$\x01], #24\0"
/* 15653 */ "st3 $\xFF\x02\x2B$\xFF\x03\x19, [$\x01], #3\0"
/* 15676 */ "st4b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
/* 15698 */ "st4d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 15720 */ "st4 $\xFF\x02\x2C, [$\x01], #64\0"
/* 15740 */ "st4 $\xFF\x02\x2E, [$\x01], #64\0"
/* 15760 */ "st4 $\xFF\x02\x2F, [$\x01], #32\0"
/* 15780 */ "st4 $\xFF\x02\x30, [$\x01], #32\0"
/* 15800 */ "st4 $\xFF\x02\x31, [$\x01], #64\0"
/* 15820 */ "st4 $\xFF\x02\x32, [$\x01], #32\0"
/* 15840 */ "st4 $\xFF\x02\x33, [$\x01], #64\0"
/* 15860 */ "st4h $\xFF\x01\x2A, $\xFF\x02\x07, [$\x03]\0"
/* 15882 */ "st4q $\xFF\x01\x25, $\xFF\x02\x07, [$\x03]\0"
/* 15904 */ "st4w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
/* 15926 */ "st4 $\xFF\x02\x34$\xFF\x03\x19, [$\x01], #8\0"
/* 15949 */ "st4 $\xFF\x02\x35$\xFF\x03\x19, [$\x01], #16\0"
/* 15973 */ "st4 $\xFF\x02\x36$\xFF\x03\x19, [$\x01], #32\0"
/* 15997 */ "st4 $\xFF\x02\x2B$\xFF\x03\x19, [$\x01], #4\0"
/* 16020 */ "stg $\x01, [$\x02]\0"
/* 16033 */ "stgp $\x01, $\x02, [$\x03]\0"
/* 16051 */ "stlurb $\x01, [$\x02]\0"
/* 16067 */ "stlurh $\x01, [$\x02]\0"
/* 16083 */ "stlur $\x01, [$\x02]\0"
/* 16098 */ "stnp $\x01, $\x02, [$\x03]\0"
/* 16116 */ "stnt1b $\xFF\x01\x28, $\xFF\x02\x29, [$\x03]\0"
/* 16140 */ "stnt1b $\xFF\x01\x2B, $\xFF\x02\x29, [$\x03]\0"
/* 16164 */ "stnt1b $\xFF\x01\x28, $\xFF\x02\x29, [$\x03]\0"
/* 16188 */ "stnt1b $\xFF\x01\x28, $\xFF\x02\x07, [$\x03]\0"
/* 16212 */ "stnt1b $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 16238 */ "stnt1b $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 16264 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x29, [$\x03]\0"
/* 16288 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x29, [$\x03]\0"
/* 16312 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x07, [$\x03]\0"
/* 16336 */ "stnt1d $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 16362 */ "stnt1h $\xFF\x01\x2A, $\xFF\x02\x29, [$\x03]\0"
/* 16386 */ "stnt1h $\xFF\x01\x34, $\xFF\x02\x29, [$\x03]\0"
/* 16410 */ "stnt1h $\xFF\x01\x2A, $\xFF\x02\x29, [$\x03]\0"
/* 16434 */ "stnt1h $\xFF\x01\x2A, $\xFF\x02\x07, [$\x03]\0"
/* 16458 */ "stnt1h $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 16484 */ "stnt1h $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 16510 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x29, [$\x03]\0"
/* 16534 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x29, [$\x03]\0"
/* 16558 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x07, [$\x03]\0"
/* 16582 */ "stnt1w $\xFF\x01\x23, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/* 16608 */ "stnt1w $\xFF\x01\x24, $\xFF\x02\x07, [$\xFF\x03\x0B]\0"
/* 16634 */ "stp $\x01, $\x02, [$\x03]\0"
/* 16651 */ "strb $\x01, [$\x02, $\x03]\0"
/* 16669 */ "strb $\x01, [$\x02]\0"
/* 16683 */ "str $\x01, [$\x02, $\x03]\0"
/* 16700 */ "str $\x01, [$\x02]\0"
/* 16713 */ "strh $\x01, [$\x02, $\x03]\0"
/* 16731 */ "strh $\x01, [$\x02]\0"
/* 16745 */ "str $\xFF\x01\x07, [$\x02]\0"
/* 16760 */ "str $\xFF\x01\x37[$\x02, $\xFF\x03\x20], [$\x04]\0"
/* 16785 */ "sttrb $\x01, [$\x02]\0"
/* 16800 */ "sttrh $\x01, [$\x02]\0"
/* 16815 */ "sttr $\x01, [$\x02]\0"
/* 16829 */ "sturb $\x01, [$\x02]\0"
/* 16844 */ "stur $\x01, [$\x02]\0"
/* 16858 */ "sturh $\x01, [$\x02]\0"
/* 16873 */ "stz2g $\x01, [$\x02]\0"
/* 16888 */ "stzg $\x01, [$\x02]\0"
/* 16902 */ "cmp $\x02, $\xFF\x03\x01\0"
/* 16915 */ "cmp $\x02, $\x03\0"
/* 16926 */ "cmp $\x02, $\x03$\xFF\x04\x02\0"
/* 16941 */ "negs $\x01, $\x03\0"
/* 16953 */ "negs $\x01, $\x03$\xFF\x04\x02\0"
/* 16969 */ "subs $\x01, $\x02, $\x03\0"
/* 16985 */ "cmp $\x02, $\x03$\xFF\x04\x03\0"
/* 17000 */ "neg $\x01, $\x03\0"
/* 17011 */ "neg $\x01, $\x03$\xFF\x04\x02\0"
/* 17026 */ "sub $\x01, $\x02, $\x03\0"
/* 17041 */ "sysp $\x01, $\xFF\x02\x3F, $\xFF\x03\x3F, $\x04\0"
/* 17065 */ "sys $\x01, $\xFF\x02\x3F, $\xFF\x03\x3F, $\x04\0"
/* 17088 */ "lsr $\x01, $\x02, $\x03\0"
/* 17103 */ "uxtb $\x01, $\x02\0"
/* 17115 */ "uxth $\x01, $\x02\0"
/* 17127 */ "uxtw $\x01, $\x02\0"
/* 17139 */ "umull $\x01, $\x02, $\x03\0"
/* 17156 */ "mov $\x01, $\xFF\x02\x0C.s$\xFF\x03\x19\0"
/* 17175 */ "mov $\x01, $\xFF\x02\x0C.d$\xFF\x03\x19\0"
/* 17194 */ "umnegl $\x01, $\x02, $\x03\0"
/* 17212 */ "uqdecb $\x01\0"
/* 17222 */ "uqdecb $\x01, $\xFF\x03\x0E\0"
/* 17238 */ "uqdecd $\x01\0"
/* 17248 */ "uqdecd $\x01, $\xFF\x03\x0E\0"
/* 17264 */ "uqdecd $\xFF\x01\x10\0"
/* 17276 */ "uqdecd $\xFF\x01\x10, $\xFF\x03\x0E\0"
/* 17294 */ "uqdech $\x01\0"
/* 17304 */ "uqdech $\x01, $\xFF\x03\x0E\0"
/* 17320 */ "uqdech $\xFF\x01\x09\0"
/* 17332 */ "uqdech $\xFF\x01\x09, $\xFF\x03\x0E\0"
/* 17350 */ "uqdecw $\x01\0"
/* 17360 */ "uqdecw $\x01, $\xFF\x03\x0E\0"
/* 17376 */ "uqdecw $\xFF\x01\x0B\0"
/* 17388 */ "uqdecw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
/* 17406 */ "uqincb $\x01\0"
/* 17416 */ "uqincb $\x01, $\xFF\x03\x0E\0"
/* 17432 */ "uqincd $\x01\0"
/* 17442 */ "uqincd $\x01, $\xFF\x03\x0E\0"
/* 17458 */ "uqincd $\xFF\x01\x10\0"
/* 17470 */ "uqincd $\xFF\x01\x10, $\xFF\x03\x0E\0"
/* 17488 */ "uqinch $\x01\0"
/* 17498 */ "uqinch $\x01, $\xFF\x03\x0E\0"
/* 17514 */ "uqinch $\xFF\x01\x09\0"
/* 17526 */ "uqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
/* 17544 */ "uqincw $\x01\0"
/* 17554 */ "uqincw $\x01, $\xFF\x03\x0E\0"
/* 17570 */ "uqincw $\xFF\x01\x0B\0"
/* 17582 */ "uqincw $\xFF\x01\x0B, $\xFF\x03\x0E\0"
/* 17600 */ "xpaclri\0"
/* 17608 */ "zero {za}\0"
/* 17618 */ "zero {za0.h}\0"
/* 17631 */ "zero {za1.h}\0"
/* 17644 */ "zero {za0.s}\0"
/* 17657 */ "zero {za1.s}\0"
/* 17670 */ "zero {za2.s}\0"
/* 17683 */ "zero {za3.s}\0"
/* 17696 */ "zero {za0.s,za1.s}\0"
/* 17715 */ "zero {za0.s,za3.s}\0"
/* 17734 */ "zero {za1.s,za2.s}\0"
/* 17753 */ "zero {za2.s,za3.s}\0"
/* 17772 */ "zero {za0.s,za1.s,za2.s}\0"
/* 17797 */ "zero {za0.s,za1.s,za3.s}\0"
/* 17822 */ "zero {za0.s,za2.s,za3.s}\0"
/* 17847 */ "zero {za1.s,za2.s,za3.s}\0"
;
#ifndef NDEBUG
static struct SortCheck {
SortCheck(ArrayRef<PatternsForOpcode> OpToPatterns) {
assert(std::is_sorted(
OpToPatterns.begin(), OpToPatterns.end(),
[](const PatternsForOpcode &L, const PatternsForOpcode &R) {
return L.Opcode < R.Opcode;
}) &&
"tablegen failed to sort opcode patterns");
}
} sortCheckVar(OpToPatterns);
#endif
AliasMatchingData M {
ArrayRef(OpToPatterns),
ArrayRef(Patterns),
ArrayRef(Conds),
StringRef(AsmStrings, std::size(AsmStrings)),
&AArch64InstPrinterValidateMCOperand,
};
const char *AsmString = matchAliasPatterns(MI, &STI, M);
if (!AsmString) return false;
unsigned I = 0;
while (AsmString[I] != ' ' && AsmString[I] != '\t' &&
AsmString[I] != '$' && AsmString[I] != '\0')
++I;
OS << '\t' << StringRef(AsmString, I);
if (AsmString[I] != '\0') {
if (AsmString[I] == ' ' || AsmString[I] == '\t') {
OS << '\t';
++I;
}
do {
if (AsmString[I] == '$') {
++I;
if (AsmString[I] == (char)0xff) {
++I;
int OpIdx = AsmString[I++] - 1;
int PrintMethodIdx = AsmString[I++] - 1;
printCustomAliasOperand(MI, Address, OpIdx, PrintMethodIdx, STI, OS);
} else
printOperand(MI, unsigned(AsmString[I++]) - 1, STI, OS);
} else {
OS << AsmString[I++];
}
} while (AsmString[I] != '\0');
}
return true;
}
void AArch64InstPrinter::printCustomAliasOperand(
const MCInst *MI, uint64_t Address, unsigned OpIdx,
unsigned PrintMethodIdx,
const MCSubtargetInfo &STI,
raw_ostream &OS) {
switch (PrintMethodIdx) {
default:
llvm_unreachable("Unknown PrintMethod kind");
break;
case 0:
printAddSubImm(MI, OpIdx, STI, OS);
break;
case 1:
printShifter(MI, OpIdx, STI, OS);
break;
case 2:
printArithExtend(MI, OpIdx, STI, OS);
break;
case 3:
printLogicalImm<int32_t>(MI, OpIdx, STI, OS);
break;
case 4:
printLogicalImm<int64_t>(MI, OpIdx, STI, OS);
break;
case 5:
printSVERegOp<'b'>(MI, OpIdx, STI, OS);
break;
case 6:
printSVERegOp<>(MI, OpIdx, STI, OS);
break;
case 7:
printLogicalImm<int8_t>(MI, OpIdx, STI, OS);
break;
case 8:
printSVERegOp<'h'>(MI, OpIdx, STI, OS);
break;
case 9:
printLogicalImm<int16_t>(MI, OpIdx, STI, OS);
break;
case 10:
printSVERegOp<'s'>(MI, OpIdx, STI, OS);
break;
case 11:
printVRegOperand(MI, OpIdx, STI, OS);
break;
case 12:
printImm(MI, OpIdx, STI, OS);
break;
case 13:
printSVEPattern(MI, OpIdx, STI, OS);
break;
case 14:
printImm8OptLsl<int8_t>(MI, OpIdx, STI, OS);
break;
case 15:
printSVERegOp<'d'>(MI, OpIdx, STI, OS);
break;
case 16:
printImm8OptLsl<int64_t>(MI, OpIdx, STI, OS);
break;
case 17:
printImm8OptLsl<int16_t>(MI, OpIdx, STI, OS);
break;
case 18:
printImm8OptLsl<int32_t>(MI, OpIdx, STI, OS);
break;
case 19:
printInverseCondCode(MI, OpIdx, STI, OS);
break;
case 20:
printSVELogicalImm<int16_t>(MI, OpIdx, STI, OS);
break;
case 21:
printSVELogicalImm<int32_t>(MI, OpIdx, STI, OS);
break;
case 22:
printSVELogicalImm<int64_t>(MI, OpIdx, STI, OS);
break;
case 23:
printZPRasFPR<8>(MI, OpIdx, STI, OS);
break;
case 24:
printVectorIndex(MI, OpIdx, STI, OS);
break;
case 25:
printZPRasFPR<64>(MI, OpIdx, STI, OS);
break;
case 26:
printZPRasFPR<16>(MI, OpIdx, STI, OS);
break;
case 27:
printSVERegOp<'q'>(MI, OpIdx, STI, OS);
break;
case 28:
printZPRasFPR<128>(MI, OpIdx, STI, OS);
break;
case 29:
printZPRasFPR<32>(MI, OpIdx, STI, OS);
break;
case 30:
printMatrixTileVector<0>(MI, OpIdx, STI, OS);
break;
case 31:
printMatrixIndex(MI, OpIdx, STI, OS);
break;
case 32:
printMatrixTileVector<1>(MI, OpIdx, STI, OS);
break;
case 33:
printFPImmOperand(MI, OpIdx, STI, OS);
break;
case 34:
printTypedVectorList<0,'d'>(MI, OpIdx, STI, OS);
break;
case 35:
printTypedVectorList<0,'s'>(MI, OpIdx, STI, OS);
break;
case 36:
printTypedVectorList<0,'q'>(MI, OpIdx, STI, OS);
break;
case 37:
printBTIHintOp(MI, OpIdx, STI, OS);
break;
case 38:
printPSBHintOp(MI, OpIdx, STI, OS);
break;
case 39:
printTypedVectorList<0,'b'>(MI, OpIdx, STI, OS);
break;
case 40:
printPredicateAsCounter<0>(MI, OpIdx, STI, OS);
break;
case 41:
printTypedVectorList<0,'h'>(MI, OpIdx, STI, OS);
break;
case 42:
printTypedVectorList<0, 'b'>(MI, OpIdx, STI, OS);
break;
case 43:
printTypedVectorList<16, 'b'>(MI, OpIdx, STI, OS);
break;
case 44:
printTypedVectorList<1, 'd'>(MI, OpIdx, STI, OS);
break;
case 45:
printTypedVectorList<2, 'd'>(MI, OpIdx, STI, OS);
break;
case 46:
printTypedVectorList<2, 's'>(MI, OpIdx, STI, OS);
break;
case 47:
printTypedVectorList<4, 'h'>(MI, OpIdx, STI, OS);
break;
case 48:
printTypedVectorList<4, 's'>(MI, OpIdx, STI, OS);
break;
case 49:
printTypedVectorList<8, 'b'>(MI, OpIdx, STI, OS);
break;
case 50:
printTypedVectorList<8, 'h'>(MI, OpIdx, STI, OS);
break;
case 51:
printTypedVectorList<0, 'h'>(MI, OpIdx, STI, OS);
break;
case 52:
printTypedVectorList<0, 's'>(MI, OpIdx, STI, OS);
break;
case 53:
printTypedVectorList<0, 'd'>(MI, OpIdx, STI, OS);
break;
case 54:
printMatrix<0>(MI, OpIdx, STI, OS);
break;
case 55:
printImmRangeScale<2, 1>(MI, OpIdx, STI, OS);
break;
case 56:
printImmRangeScale<4, 3>(MI, OpIdx, STI, OS);
break;
case 57:
printMatrix<64>(MI, OpIdx, STI, OS);
break;
case 58:
printImmHex(MI, OpIdx, STI, OS);
break;
case 59:
printPrefetchOp<true>(MI, OpIdx, STI, OS);
break;
case 60:
printPrefetchOp(MI, OpIdx, STI, OS);
break;
case 61:
printGPR64as32(MI, OpIdx, STI, OS);
break;
case 62:
printSysCROperand(MI, OpIdx, STI, OS);
break;
}
}
static bool AArch64InstPrinterValidateMCOperand(const MCOperand &MCOp,
const MCSubtargetInfo &STI,
unsigned PredicateIndex) {
switch (PredicateIndex) {
default:
llvm_unreachable("Unknown MCOperandPredicate kind");
break;
case 1: {
if (!MCOp.isImm())
return false;
int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
return AArch64_AM::isSVEMaskOfIdenticalElements<int8_t>(Val);
}
case 2: {
if (!MCOp.isImm())
return false;
int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
return AArch64_AM::isSVEMaskOfIdenticalElements<int16_t>(Val);
}
case 3: {
if (!MCOp.isImm())
return false;
int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
return AArch64_AM::isSVEMaskOfIdenticalElements<int32_t>(Val);
}
case 4: {
return MCOp.isImm() &&
MCOp.getImm() != AArch64CC::AL &&
MCOp.getImm() != AArch64CC::NV;
}
case 5: {
if (!MCOp.isImm())
return false;
int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
return AArch64_AM::isSVEMaskOfIdenticalElements<int16_t>(Val) &&
AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(Val);
}
case 6: {
if (!MCOp.isImm())
return false;
int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
return AArch64_AM::isSVEMaskOfIdenticalElements<int32_t>(Val) &&
AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(Val);
}
case 7: {
if (!MCOp.isImm())
return false;
int64_t Val = AArch64_AM::decodeLogicalImmediate(MCOp.getImm(), 64);
return AArch64_AM::isSVEMaskOfIdenticalElements<int64_t>(Val) &&
AArch64_AM::isSVEMoveMaskPreferredLogicalImmediate(Val);
}
case 8: {
// "bti" is an alias to "hint" only for certain values of CRm:Op2 fields.
if (!MCOp.isImm())
return false;
return AArch64BTIHint::lookupBTIByEncoding(MCOp.getImm() ^ 32) != nullptr;
}
case 9: {
// Check, if operand is valid, to fix exhaustive aliasing in disassembly.
// "psb" is an alias to "hint" only for certain values of CRm:Op2 fields.
if (!MCOp.isImm())
return false;
return AArch64PSBHint::lookupPSBByEncoding(MCOp.getImm()) != nullptr;
}
}
}
#endif // PRINT_ALIAS_INSTR