SpirvShader: Add a flag for printing SPIRV execution

The ENABLE_DBG_MSGS flag controls printing of verbose debug messages to
stdout as each SPIR-V instruction is executed. This is very handy for
performing text diffs when the thread count is reduced to 1 and execution
is deterministic.

Bug: b/140287657
Change-Id: I3b62f0f9f3017087cf7f2786e1c30497cfa05a20
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/31488
Tested-by: Ben Clayton <bclayton@google.com>
Reviewed-by: Nicolas Capens <nicolascapens@google.com>

src/Pipeline/SpirvShaderMemory.cpp

diff --git a/src/Pipeline/SpirvShaderMemory.cpp b/src/Pipeline/SpirvShaderMemory.cpp
index 8407166..cbed2de 100644
--- a/src/Pipeline/SpirvShaderMemory.cpp
+++ b/src/Pipeline/SpirvShaderMemory.cpp
@@ -13,6 +13,7 @@
 // limitations under the License.
 
 #include "SpirvShader.hpp"
+#include "SpirvShaderDebug.hpp"
 
 #include "ShaderCore.hpp"
 
@@ -63,6 +64,8 @@
 		dst.move(el.index, p.Load<SIMD::Float>(robustness, state->activeLaneMask(), atomic, memoryOrder));
 	});
 
+	SPIRV_SHADER_DBG("Load(atomic: {0}, order: {1}, ptr: {2}, val: {3}, mask: {4})", atomic, int(memoryOrder), ptr, dst, state->activeLaneMask());
+
 	return EmitResult::Continue;
 }
 
@@ -105,6 +108,8 @@
 		mask = mask & state->storesAndAtomicsMask();
 	}
 
+	SPIRV_SHADER_DBG("Store(atomic: {0}, order: {1}, ptr: {2}, val: {3}, mask: {4}", atomic, int(memoryOrder), ptr, value, mask);
+
 	VisitMemoryObject(pointerId, [&](const MemoryElement &el) {
 		auto p = ptr + el.offset;
 		if(interleavedByLane) { p = InterleaveByLane(p); }