commit fb280672c04f72dfcc19d5f449380b6601b4b681
author Ben Clayton <bclayton@google.com> Thu Apr 25 11:16:15 2019 +0100
committer Ben Clayton <bclayton@google.com> Tue Apr 30 11:08:46 2019 +0000
tree e123992d346e35c64a061117bba97e59b426831a
parent 1762c381c7fe7171cf0ccb855c8c38a6b0acf209

src/Vulkan: Fixup all printf-style messages

There were lots of dodgy casts, wrong specifiers, or missing specifiers.
Could easily cause undefined behavior.

Bug: b/127433389
Change-Id: I2859993509b897d4a7c649f87ab74d440be4590c
Reviewed-on: https://swiftshader-review.googlesource.com/c/SwiftShader/+/29930
Kokoro-Presubmit: kokoro <noreply+kokoro@google.com>
Tested-by: Ben Clayton <bclayton@google.com>
Reviewed-by: Nicolas Capens <nicolascapens@google.com>

src/Reactor/LLVMReactor.cpp

diff --git a/src/Reactor/LLVMReactor.cpp b/src/Reactor/LLVMReactor.cpp
index ccee399..520f1a0 100644
--- a/src/Reactor/LLVMReactor.cpp
+++ b/src/Reactor/LLVMReactor.cpp
@@ -453,7 +453,7 @@
 		case llvm::AtomicOrdering::AcquireRelease: return std::memory_order_acq_rel;
 		case llvm::AtomicOrdering::SequentiallyConsistent: return std::memory_order_seq_cst;
 		default:
-			UNREACHABLE("memoryOrder: %d", memoryOrder);
+			UNREACHABLE("memoryOrder: %d", int(memoryOrder));
 			return std::memory_order_acq_rel;
 		}
 	}