diff --git a/third_party/subzero/src/IceAssemblerX8632.h b/third_party/subzero/src/IceAssemblerX8632.h
index beb26c7..a61b661 100644
--- a/third_party/subzero/src/IceAssemblerX8632.h
+++ b/third_party/subzero/src/IceAssemblerX8632.h
@@ -45,8 +45,8 @@
   using Traits = TargetX8632Traits;
   using Address = typename Traits::Address;
   using ByteRegister = typename Traits::ByteRegister;
-  using BrCond = typename Traits::Cond::BrCond;
-  using CmppsCond = typename Traits::Cond::CmppsCond;
+  using BrCond = CondX86::BrCond;
+  using CmppsCond = CondX86::CmppsCond;
   using GPRRegister = typename Traits::GPRRegister;
   using Operand = typename Traits::Operand;
   using XmmRegister = typename Traits::XmmRegister;
diff --git a/third_party/subzero/src/IceAssemblerX8664.h b/third_party/subzero/src/IceAssemblerX8664.h
index ad12a72..82c2ddd 100644
--- a/third_party/subzero/src/IceAssemblerX8664.h
+++ b/third_party/subzero/src/IceAssemblerX8664.h
@@ -45,8 +45,8 @@
   using Traits = TargetX8664Traits;
   using Address = typename Traits::Address;
   using ByteRegister = typename Traits::ByteRegister;
-  using BrCond = typename Traits::Cond::BrCond;
-  using CmppsCond = typename Traits::Cond::CmppsCond;
+  using BrCond = CondX86::BrCond;
+  using CmppsCond = CondX86::CmppsCond;
   using GPRRegister = typename Traits::GPRRegister;
   using Operand = typename Traits::Operand;
   using XmmRegister = typename Traits::XmmRegister;
diff --git a/third_party/subzero/src/IceConditionCodesX8664.h b/third_party/subzero/src/IceConditionCodesX86.h
similarity index 77%
rename from third_party/subzero/src/IceConditionCodesX8664.h
rename to third_party/subzero/src/IceConditionCodesX86.h
index f0efd50..68ea572 100644
--- a/third_party/subzero/src/IceConditionCodesX8664.h
+++ b/third_party/subzero/src/IceConditionCodesX86.h
@@ -8,25 +8,25 @@
 //===----------------------------------------------------------------------===//
 ///
 /// \file
-/// \brief Declares the condition codes for x86-64.
+/// \brief Declares the condition codes for x86.
 ///
 //===----------------------------------------------------------------------===//
 
-#ifndef SUBZERO_SRC_ICECONDITIONCODESX8664_H
-#define SUBZERO_SRC_ICECONDITIONCODESX8664_H
+#ifndef SUBZERO_SRC_ICECONDITIONCODESX86_H
+#define SUBZERO_SRC_ICECONDITIONCODESX86_H
 
 #include "IceDefs.h"
-#include "IceInstX8664.def"
+#include "IceInstX86.def"
 
 namespace Ice {
 
-class CondX8664 {
+class CondX86 {
 public:
   /// An enum of condition codes used for branches and cmov. The enum value
   /// should match the value used to encode operands in binary instructions.
   enum BrCond {
 #define X(val, encode, opp, dump, emit) val = encode,
-    ICEINSTX8664BR_TABLE
+    ICEINSTX86BR_TABLE
 #undef X
         Br_None
   };
@@ -36,7 +36,7 @@
   /// instructions.
   enum CmppsCond {
 #define X(val, emit) val,
-    ICEINSTX8664CMPPS_TABLE
+    ICEINSTX86CMPPS_TABLE
 #undef X
         Cmpps_Invalid
   };
@@ -44,4 +44,4 @@
 
 } // end of namespace Ice
 
-#endif // SUBZERO_SRC_ICECONDITIONCODESX8664_H
+#endif // SUBZERO_SRC_ICECONDITIONCODESX86_H
diff --git a/third_party/subzero/src/IceConditionCodesX8632.h b/third_party/subzero/src/IceConditionCodesX8632.h
deleted file mode 100644
index 08f6838..0000000
--- a/third_party/subzero/src/IceConditionCodesX8632.h
+++ /dev/null
@@ -1,51 +0,0 @@
-//===- subzero/src/IceConditionCodesX8632.h - Condition Codes ---*- C++ -*-===//
-//
-//                        The Subzero Code Generator
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-///
-/// \file
-/// \brief Declares the condition codes for x86-32.
-///
-//===----------------------------------------------------------------------===//
-
-#ifndef SUBZERO_SRC_ICECONDITIONCODESX8632_H
-#define SUBZERO_SRC_ICECONDITIONCODESX8632_H
-
-#include "IceDefs.h"
-#include "IceInstX8632.def"
-
-namespace Ice {
-
-class CondX86 {
-  CondX86() = delete;
-  CondX86(const CondX86 &) = delete;
-  CondX86 &operator=(const CondX86 &) = delete;
-
-public:
-  /// An enum of condition codes used for branches and cmov. The enum value
-  /// should match the value used to encode operands in binary instructions.
-  enum BrCond {
-#define X(val, encode, opp, dump, emit) val = encode,
-    ICEINSTX8632BR_TABLE
-#undef X
-        Br_None
-  };
-
-  /// An enum of condition codes relevant to the CMPPS instruction. The enum
-  /// value should match the value used to encode operands in binary
-  /// instructions.
-  enum CmppsCond {
-#define X(val, emit) val,
-    ICEINSTX8632CMPPS_TABLE
-#undef X
-        Cmpps_Invalid
-  };
-};
-
-} // end of namespace Ice
-
-#endif // SUBZERO_SRC_ICECONDITIONCODESX8632_H
diff --git a/third_party/subzero/src/IceInstX86.def b/third_party/subzero/src/IceInstX86.def
new file mode 100644
index 0000000..c343d88
--- /dev/null
+++ b/third_party/subzero/src/IceInstX86.def
@@ -0,0 +1,69 @@
+//===- subzero/src/IceInstX8664.def - X-macros for x86-64 insts -*- C++ -*-===//
+//
+//                        The Subzero Code Generator
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines properties of lowered x86 instructions in the
+// form of x-macros.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SUBZERO_SRC_ICEINSTX86_DEF
+#define SUBZERO_SRC_ICEINSTX86_DEF
+
+#define ICEINSTX86BR_TABLE                                                     \
+  /* val, encode, opposite, dump, emit */                                      \
+  X(Br_o, 0, Br_no, "o", "jo")                                                 \
+  X(Br_no, 1, Br_o, "no", "jno")                                               \
+  X(Br_b, 2, Br_ae, "b", "jb")                                                 \
+  X(Br_ae, 3, Br_b, "ae", "jae")                                               \
+  X(Br_e, 4, Br_ne, "e", "je")                                                 \
+  X(Br_ne, 5, Br_e, "ne", "jne")                                               \
+  X(Br_be, 6, Br_a, "be", "jbe")                                               \
+  X(Br_a, 7, Br_be, "a", "ja")                                                 \
+  X(Br_s, 8, Br_ns, "s", "js")                                                 \
+  X(Br_ns, 9, Br_s, "ns", "jns")                                               \
+  X(Br_p, 10, Br_np, "p", "jp")                                                \
+  X(Br_np, 11, Br_p, "np", "jnp")                                              \
+  X(Br_l, 12, Br_ge, "l", "jl")                                                \
+  X(Br_ge, 13, Br_l, "ge", "jge")                                              \
+  X(Br_le, 14, Br_g, "le", "jle")                                              \
+  X(Br_g, 15, Br_le, "g", "jg")
+//#define X(val, encode, opp, dump, emit)
+
+#define ICEINSTX86CMPPS_TABLE                                                  \
+  /* val, emit */                                                              \
+  X(Cmpps_eq, "eq")                                                            \
+  X(Cmpps_lt, "lt")                                                            \
+  X(Cmpps_le, "le")                                                            \
+  X(Cmpps_unord, "unord")                                                      \
+  X(Cmpps_neq, "neq")                                                          \
+  X(Cmpps_nlt, "nlt")                                                          \
+  X(Cmpps_nle, "nle")                                                          \
+  X(Cmpps_ord, "ord")
+//#define X(val, emit)
+
+#define ICETYPEX86_TABLE                                                       \
+  /* tag,  elty, cvt,  sdss, pdps, spsd, int_, unpack, pack, width, fld */     \
+  X(void, void, "?", "", "", "", "", "", "", "", "")                           \
+  X(i1, void, "si", "", "", "", "", "", "", "b", "")                           \
+  X(i8, void, "si", "", "", "", "", "", "", "b", "")                           \
+  X(i16, void, "si", "", "", "", "", "", "", "w", "")                          \
+  X(i32, void, "si", "", "", "", "", "", "", "l", "")                          \
+  X(i64, void, "si", "", "", "", "", "", "", "q", "")                          \
+  X(f32, void, "ss", "ss", "ps", "ss", "d", "", "", "", "s")                   \
+  X(f64, void, "sd", "sd", "pd", "sd", "q", "", "", "", "l")                   \
+  X(v4i1, i32, "?", "", "", "", "d", "dq", "", "", "")                         \
+  X(v8i1, i16, "?", "", "", "", "w", "wd", "", "", "")                         \
+  X(v16i1, i8, "?", "", "", "", "b", "bw", "", "", "")                         \
+  X(v16i8, i8, "?", "", "", "", "b", "bw", "", "", "")                         \
+  X(v8i16, i16, "?", "", "", "", "w", "wd", "wb", "", "")                      \
+  X(v4i32, i32, "dq", "", "", "", "d", "dq", "dw", "", "")                     \
+  X(v4f32, f32, "ps", "", "ps", "ps", "d", "dq", "", "", "")
+//#define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)
+
+#endif // SUBZERO_SRC_ICEINSTX8664_DEF
diff --git a/third_party/subzero/src/IceInstX8632.cpp b/third_party/subzero/src/IceInstX8632.cpp
index fb284ef..87b8b0d 100644
--- a/third_party/subzero/src/IceInstX8632.cpp
+++ b/third_party/subzero/src/IceInstX8632.cpp
@@ -20,7 +20,7 @@
 #include "IceAssemblerX8632.h"
 #include "IceCfg.h"
 #include "IceCfgNode.h"
-#include "IceConditionCodesX8632.h"
+#include "IceConditionCodesX86.h"
 #include "IceInst.h"
 #include "IceOperand.h"
 #include "IceRegistersX8632.h"
@@ -32,15 +32,15 @@
 
 const TargetX8632Traits::InstBrAttributesType
     TargetX8632Traits::InstBrAttributes[] = {
-#define X(val, encode, opp, dump, emit) {X8632::Traits::Cond::opp, dump, emit},
-        ICEINSTX8632BR_TABLE
+#define X(val, encode, opp, dump, emit) {CondX86::opp, dump, emit},
+        ICEINSTX86BR_TABLE
 #undef X
 };
 
 const TargetX8632Traits::InstCmppsAttributesType
     TargetX8632Traits::InstCmppsAttributes[] = {
 #define X(val, emit) {emit},
-        ICEINSTX8632CMPPS_TABLE
+        ICEINSTX86CMPPS_TABLE
 #undef X
 };
 
@@ -48,7 +48,7 @@
     TargetX8632Traits::TypeAttributes[] = {
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   {cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld},
-        ICETYPEX8632_TABLE
+        ICETYPEX86_TABLE
 #undef X
 };
 
diff --git a/third_party/subzero/src/IceInstX8632.def b/third_party/subzero/src/IceInstX8632.def
index c71d6df..566d21d 100644
--- a/third_party/subzero/src/IceInstX8632.def
+++ b/third_party/subzero/src/IceInstX8632.def
@@ -179,55 +179,4 @@
   X(X87ST_Last, 7, "st(7)")
 //#define X(val, encode, name)
 
-#define ICEINSTX8632BR_TABLE                                                   \
-  /* val, encode, opposite, dump, emit */                                      \
-  X(Br_o,  0,  Br_no, "o",  "jo")                                              \
-  X(Br_no, 1,  Br_o,  "no", "jno")                                             \
-  X(Br_b,  2,  Br_ae, "b",  "jb")                                              \
-  X(Br_ae, 3,  Br_b,  "ae", "jae")                                             \
-  X(Br_e,  4,  Br_ne, "e",  "je")                                              \
-  X(Br_ne, 5,  Br_e,  "ne", "jne")                                             \
-  X(Br_be, 6,  Br_a,  "be", "jbe")                                             \
-  X(Br_a,  7,  Br_be, "a",  "ja")                                              \
-  X(Br_s,  8,  Br_ns, "s",  "js")                                              \
-  X(Br_ns, 9,  Br_s,  "ns", "jns")                                             \
-  X(Br_p,  10, Br_np, "p",  "jp")                                              \
-  X(Br_np, 11, Br_p,  "np", "jnp")                                             \
-  X(Br_l,  12, Br_ge, "l",  "jl")                                              \
-  X(Br_ge, 13, Br_l,  "ge", "jge")                                             \
-  X(Br_le, 14, Br_g,  "le", "jle")                                             \
-  X(Br_g,  15, Br_le, "g",  "jg")
-//#define X(val, encode, opp, dump, emit)
-
-#define ICEINSTX8632CMPPS_TABLE                                                \
-  /* val, emit */                                                              \
-  X(Cmpps_eq,    "eq")                                                         \
-  X(Cmpps_lt,    "lt")                                                         \
-  X(Cmpps_le,    "le")                                                         \
-  X(Cmpps_unord, "unord")                                                      \
-  X(Cmpps_neq,   "neq")                                                        \
-  X(Cmpps_nlt,   "nlt")                                                        \
-  X(Cmpps_nle,   "nle")                                                        \
-  X(Cmpps_ord,   "ord")
-//#define X(val, emit)
-
-#define ICETYPEX8632_TABLE                                                     \
-  /* tag,  elty, cvt,  sdss, pdps, spsd, int_, unpack, pack, width, fld */     \
-  X(void,  void, "?",  "",   "",   "",   "",   "",     "",   "",    "")        \
-  X(i1,    void, "si", "",   "",   "",   "",   "",     "",   "b",   "")        \
-  X(i8,    void, "si", "",   "",   "",   "",   "",     "",   "b",   "")        \
-  X(i16,   void, "si", "",   "",   "",   "",   "",     "",   "w",   "")        \
-  X(i32,   void, "si", "",   "",   "",   "",   "",     "",   "l",   "")        \
-  X(i64,   void, "si", "",   "",   "",   "",   "",     "",   "q",   "")        \
-  X(f32,   void, "ss", "ss", "ps", "ss", "d",  "",     "",   "",    "s")       \
-  X(f64,   void, "sd", "sd", "pd", "sd", "q",  "",     "",   "",    "l")       \
-  X(v4i1,  i32,  "?",  "",   "",   "",   "d",  "dq",   "",   "",    "")        \
-  X(v8i1,  i16,  "?",  "",   "",   "",   "w",  "wd",   "",   "",    "")        \
-  X(v16i1, i8,   "?",  "",   "",   "",   "b",  "bw",   "",   "",    "")        \
-  X(v16i8, i8,   "?",  "",   "",   "",   "b",  "bw",   "",   "",    "")        \
-  X(v8i16, i16,  "?",  "",   "",   "",   "w",  "wd",   "wb", "",    "")        \
-  X(v4i32, i32,  "dq", "",   "",   "",   "d",  "dq",   "dw", "",    "")        \
-  X(v4f32, f32,  "ps", "",   "ps", "ps", "d",  "dq",   "",   "",    "")
-//#define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)
-
 #endif // SUBZERO_SRC_ICEINSTX8632_DEF
diff --git a/third_party/subzero/src/IceInstX8632Base.h b/third_party/subzero/src/IceInstX8632Base.h
index 29c7c92..3b3c462 100644
--- a/third_party/subzero/src/IceInstX8632Base.h
+++ b/third_party/subzero/src/IceInstX8632Base.h
@@ -43,9 +43,9 @@
   using RegisterSet = typename Traits::RegisterSet;
   using XmmRegister = typename Traits::RegisterSet::XmmRegister;
 
-  using Cond = typename Traits::Cond;
-  using BrCond = typename Traits::Cond::BrCond;
-  using CmppsCond = typename Traits::Cond::CmppsCond;
+  using Cond = CondX86;
+  using BrCond = Cond::BrCond;
+  using CmppsCond = Cond::CmppsCond;
 
   template <typename SReg_t, typename DReg_t>
   using CastEmitterRegOp =
diff --git a/third_party/subzero/src/IceInstX8664.cpp b/third_party/subzero/src/IceInstX8664.cpp
index 303859d..d847ea1 100644
--- a/third_party/subzero/src/IceInstX8664.cpp
+++ b/third_party/subzero/src/IceInstX8664.cpp
@@ -21,7 +21,7 @@
 #include "IceAssemblerX8664.h"
 #include "IceCfg.h"
 #include "IceCfgNode.h"
-#include "IceConditionCodesX8664.h"
+#include "IceConditionCodesX86.h"
 #include "IceInst.h"
 #include "IceOperand.h"
 #include "IceRegistersX8664.h"
@@ -33,15 +33,15 @@
 
 const TargetX8664Traits::InstBrAttributesType
     TargetX8664Traits::InstBrAttributes[] = {
-#define X(val, encode, opp, dump, emit) {X8664::Traits::Cond::opp, dump, emit},
-        ICEINSTX8664BR_TABLE
+#define X(val, encode, opp, dump, emit) {CondX86::opp, dump, emit},
+        ICEINSTX86BR_TABLE
 #undef X
 };
 
 const TargetX8664Traits::InstCmppsAttributesType
     TargetX8664Traits::InstCmppsAttributes[] = {
 #define X(val, emit) {emit},
-        ICEINSTX8664CMPPS_TABLE
+        ICEINSTX86CMPPS_TABLE
 #undef X
 };
 
@@ -49,7 +49,7 @@
     TargetX8664Traits::TypeAttributes[] = {
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   {cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld},
-        ICETYPEX8664_TABLE
+        ICETYPEX86_TABLE
 #undef X
 };
 
diff --git a/third_party/subzero/src/IceInstX8664.def b/third_party/subzero/src/IceInstX8664.def
index e07bef6..78c3924 100644
--- a/third_party/subzero/src/IceInstX8664.def
+++ b/third_party/subzero/src/IceInstX8664.def
@@ -281,55 +281,4 @@
 //          sboxres, isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8,
 //          is16To8, isTrunc8Rcvr, isAhRcvr, aliases)
 
-#define ICEINSTX8664BR_TABLE                                                   \
-  /* val, encode, opposite, dump, emit */                                      \
-  X(Br_o,  0,  Br_no, "o",  "jo")                                              \
-  X(Br_no, 1,  Br_o,  "no", "jno")                                             \
-  X(Br_b,  2,  Br_ae, "b",  "jb")                                              \
-  X(Br_ae, 3,  Br_b,  "ae", "jae")                                             \
-  X(Br_e,  4,  Br_ne, "e",  "je")                                              \
-  X(Br_ne, 5,  Br_e,  "ne", "jne")                                             \
-  X(Br_be, 6,  Br_a,  "be", "jbe")                                             \
-  X(Br_a,  7,  Br_be, "a",  "ja")                                              \
-  X(Br_s,  8,  Br_ns, "s",  "js")                                              \
-  X(Br_ns, 9,  Br_s,  "ns", "jns")                                             \
-  X(Br_p,  10, Br_np, "p",  "jp")                                              \
-  X(Br_np, 11, Br_p,  "np", "jnp")                                             \
-  X(Br_l,  12, Br_ge, "l",  "jl")                                              \
-  X(Br_ge, 13, Br_l,  "ge", "jge")                                             \
-  X(Br_le, 14, Br_g,  "le", "jle")                                             \
-  X(Br_g,  15, Br_le, "g",  "jg")
-//#define X(val, encode, opp, dump, emit)
-
-#define ICEINSTX8664CMPPS_TABLE                                                \
-  /* val, emit */                                                              \
-  X(Cmpps_eq,    "eq")                                                         \
-  X(Cmpps_lt,    "lt")                                                         \
-  X(Cmpps_le,    "le")                                                         \
-  X(Cmpps_unord, "unord")                                                      \
-  X(Cmpps_neq,   "neq")                                                        \
-  X(Cmpps_nlt,   "nlt")                                                        \
-  X(Cmpps_nle,   "nle")                                                        \
-  X(Cmpps_ord,   "ord")
-//#define X(val, emit)
-
-#define ICETYPEX8664_TABLE                                                     \
-  /* tag,  elty, cvt,  sdss, pdps, spsd, int_, unpack, pack, width, fld */     \
-  X(void,  void, "?",  "",   "",   "",   "",   "",     "",   "",    "")        \
-  X(i1,    void, "si", "",   "",   "",   "",   "",     "",   "b",   "")        \
-  X(i8,    void, "si", "",   "",   "",   "",   "",     "",   "b",   "")        \
-  X(i16,   void, "si", "",   "",   "",   "",   "",     "",   "w",   "")        \
-  X(i32,   void, "si", "",   "",   "",   "",   "",     "",   "l",   "")        \
-  X(i64,   void, "si", "",   "",   "",   "",   "",     "",   "q",   "")        \
-  X(f32,   void, "ss", "ss", "ps", "ss", "d",  "",     "",   "",    "s")       \
-  X(f64,   void, "sd", "sd", "pd", "sd", "q",  "",     "",   "",    "l")       \
-  X(v4i1,  i32,  "?",  "",   "",   "",   "d",  "dq",   "",   "",    "")        \
-  X(v8i1,  i16,  "?",  "",   "",   "",   "w",  "wd",   "",   "",    "")        \
-  X(v16i1, i8,   "?",  "",   "",   "",   "b",  "bw",   "",   "",    "")        \
-  X(v16i8, i8,   "?",  "",   "",   "",   "b",  "bw",   "",   "",    "")        \
-  X(v8i16, i16,  "?",  "",   "",   "",   "w",  "wd",   "wb", "",    "")        \
-  X(v4i32, i32,  "dq", "",   "",   "",   "d",  "dq",   "dw", "",    "")        \
-  X(v4f32, f32,  "ps", "",   "ps", "ps", "d",  "dq",   "",   "",    "")
-//#define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)
-
 #endif // SUBZERO_SRC_ICEINSTX8664_DEF
diff --git a/third_party/subzero/src/IceInstX8664Base.h b/third_party/subzero/src/IceInstX8664Base.h
index 2d5cbe1..70d650f 100644
--- a/third_party/subzero/src/IceInstX8664Base.h
+++ b/third_party/subzero/src/IceInstX8664Base.h
@@ -43,9 +43,9 @@
   using RegisterSet = typename Traits::RegisterSet;
   using XmmRegister = typename Traits::RegisterSet::XmmRegister;
 
-  using Cond = typename Traits::Cond;
-  using BrCond = typename Traits::Cond::BrCond;
-  using CmppsCond = typename Traits::Cond::CmppsCond;
+  using Cond = CondX86;
+  using BrCond = Cond::BrCond;
+  using CmppsCond = Cond::CmppsCond;
 
   template <typename SReg_t, typename DReg_t>
   using CastEmitterRegOp =
diff --git a/third_party/subzero/src/IceTargetLoweringX8632.cpp b/third_party/subzero/src/IceTargetLoweringX8632.cpp
index 212d656..3e680eb 100644
--- a/third_party/subzero/src/IceTargetLoweringX8632.cpp
+++ b/third_party/subzero/src/IceTargetLoweringX8632.cpp
@@ -64,12 +64,7 @@
 //------------------------------------------------------------------------------
 const TargetX8632Traits::TableFcmpType TargetX8632Traits::TableFcmp[] = {
 #define X(val, dflt, swapS, C1, C2, swapV, pred)                               \
-  {dflt,                                                                       \
-   swapS,                                                                      \
-   X8632::Traits::Cond::C1,                                                    \
-   X8632::Traits::Cond::C2,                                                    \
-   swapV,                                                                      \
-   X8632::Traits::Cond::pred},
+  {dflt, swapS, CondX86::C1, CondX86::C2, swapV, CondX86::pred},
     FCMPX8632_TABLE
 #undef X
 };
@@ -77,7 +72,7 @@
 const size_t TargetX8632Traits::TableFcmpSize = llvm::array_lengthof(TableFcmp);
 
 const TargetX8632Traits::TableIcmp32Type TargetX8632Traits::TableIcmp32[] = {
-#define X(val, C_32, C1_64, C2_64, C3_64) {X8632::Traits::Cond::C_32},
+#define X(val, C_32, C1_64, C2_64, C3_64) {CondX86::C_32},
     ICMPX8632_TABLE
 #undef X
 };
@@ -87,8 +82,7 @@
 
 const TargetX8632Traits::TableIcmp64Type TargetX8632Traits::TableIcmp64[] = {
 #define X(val, C_32, C1_64, C2_64, C3_64)                                      \
-  {X8632::Traits::Cond::C1_64, X8632::Traits::Cond::C2_64,                     \
-   X8632::Traits::Cond::C3_64},
+  {CondX86::C1_64, CondX86::C2_64, CondX86::C3_64},
     ICMPX8632_TABLE
 #undef X
 };
@@ -100,7 +94,7 @@
     TargetX8632Traits::TableTypeX8632Attributes[] = {
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   {IceType_##elty},
-        ICETYPEX8632_TABLE
+        ICETYPEX86_TABLE
 #undef X
 };
 
@@ -316,13 +310,13 @@
 #undef X
 } // end of namespace dummy2
 
-// Validate the enum values in ICETYPEX8632_TABLE.
+// Validate the enum values in ICETYPEX86_TABLE.
 namespace dummy3 {
 // Define a temporary set of enum values based on low-level table entries.
 enum _tmp_enum {
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   _tmp_##tag,
-  ICETYPEX8632_TABLE
+  ICETYPEX86_TABLE
 #undef X
       _num
 };
@@ -336,14 +330,14 @@
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   static const int _table2_##tag = _tmp_##tag;                                 \
   static_assert(_table1_##tag == _table2_##tag,                                \
-                "Inconsistency between ICETYPEX8632_TABLE and ICETYPE_TABLE");
-ICETYPEX8632_TABLE
+                "Inconsistency between ICETYPEX86_TABLE and ICETYPE_TABLE");
+ICETYPEX86_TABLE
 #undef X
 // Repeat the static asserts with respect to the high-level table entries in
 // case the high-level table has extra entries.
 #define X(tag, sizeLog2, align, elts, elty, str, rcstr)                        \
   static_assert(_table1_##tag == _table2_##tag,                                \
-                "Inconsistency between ICETYPEX8632_TABLE and ICETYPE_TABLE");
+                "Inconsistency between ICETYPEX86_TABLE and ICETYPE_TABLE");
 ICETYPE_TABLE
 #undef X
 } // end of namespace dummy3
diff --git a/third_party/subzero/src/IceTargetLoweringX8632Base.h b/third_party/subzero/src/IceTargetLoweringX8632Base.h
index 9395590..b39c8e6 100644
--- a/third_party/subzero/src/IceTargetLoweringX8632Base.h
+++ b/third_party/subzero/src/IceTargetLoweringX8632Base.h
@@ -56,8 +56,8 @@
   using ConcreteTarget = typename Traits::ConcreteTarget;
   using InstructionSetEnum = typename Traits::InstructionSet;
 
-  using BrCond = typename Traits::Cond::BrCond;
-  using CmppsCond = typename Traits::Cond::CmppsCond;
+  using BrCond = CondX86::BrCond;
+  using CmppsCond = CondX86::CmppsCond;
 
   using X86Address = typename Traits::Address;
   using X86Operand = typename Traits::X86Operand;
diff --git a/third_party/subzero/src/IceTargetLoweringX8632BaseImpl.h b/third_party/subzero/src/IceTargetLoweringX8632BaseImpl.h
index 0ecf1e5..185c48b 100644
--- a/third_party/subzero/src/IceTargetLoweringX8632BaseImpl.h
+++ b/third_party/subzero/src/IceTargetLoweringX8632BaseImpl.h
@@ -193,7 +193,7 @@
     return !Traits::Is64Bit;
   case PK_Fcmp:
     return Traits::TableFcmp[llvm::cast<InstFcmp>(Instr)->getCondition()].C2 !=
-           Traits::Cond::Br_None;
+           CondX86::Br_None;
   }
 }
 
@@ -1799,7 +1799,7 @@
       _shld(T_3, T_2, T_1);
       _shl(T_2, T_1);
       _test(T_1, BitTest);
-      _br(Traits::Cond::Br_e, Label);
+      _br(CondX86::Br_e, Label);
       // T_2 and T_3 are being assigned again because of the intra-block control
       // flow, so we need to use _redefined to avoid liveness problems.
       _redefined(_mov(T_3, T_2));
@@ -1817,7 +1817,7 @@
       _shrd(T_2, T_3, T_1);
       _shr(T_3, T_1);
       _test(T_1, BitTest);
-      _br(Traits::Cond::Br_e, Label);
+      _br(CondX86::Br_e, Label);
       // T_2 and T_3 are being assigned again because of the intra-block control
       // flow, so we need to use _redefined to avoid liveness problems.
       _redefined(_mov(T_2, T_3));
@@ -1836,7 +1836,7 @@
       _shrd(T_2, T_3, T_1);
       _sar(T_3, T_1);
       _test(T_1, BitTest);
-      _br(Traits::Cond::Br_e, Label);
+      _br(CondX86::Br_e, Label);
       // T_2 and T_3 are being assigned again because of the intra-block control
       // flow, so T_2 needs to use _redefined to avoid liveness problems. T_3
       // doesn't need special treatment because it is reassigned via _sar
@@ -2531,7 +2531,7 @@
   Operand *Src0 = legalize(Cond, Legal_Reg | Legal_Mem);
   Constant *Zero = Ctx->getConstantZero(IceType_i32);
   _cmp(Src0, Zero);
-  _br(Traits::Cond::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
+  _br(CondX86::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
 }
 
 // constexprMax returns a (constexpr) max(S0, S1), and it is used for defining
@@ -3306,8 +3306,8 @@
   assert(static_cast<size_t>(Condition) < Traits::TableFcmpSize);
   if (Traits::TableFcmp[Condition].SwapScalarOperands)
     std::swap(Src0, Src1);
-  const bool HasC1 = (Traits::TableFcmp[Condition].C1 != Traits::Cond::Br_None);
-  const bool HasC2 = (Traits::TableFcmp[Condition].C2 != Traits::Cond::Br_None);
+  const bool HasC1 = (Traits::TableFcmp[Condition].C1 != CondX86::Br_None);
+  const bool HasC2 = (Traits::TableFcmp[Condition].C2 != CondX86::Br_None);
   if (HasC1) {
     Src0 = legalize(Src0);
     Operand *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem);
@@ -3405,7 +3405,7 @@
     switch (Condition) {
     default: {
       const CmppsCond Predicate = Traits::TableFcmp[Condition].Predicate;
-      assert(Predicate != Traits::Cond::Cmpps_Invalid);
+      assert(Predicate != CondX86::Cmpps_Invalid);
       T = makeReg(Src0RM->getType());
       _movp(T, Src0RM);
       _cmpps(T, Src1RM, Predicate);
@@ -3415,9 +3415,9 @@
       T = makeReg(Src0RM->getType());
       Variable *T2 = makeReg(Src0RM->getType());
       _movp(T, Src0RM);
-      _cmpps(T, Src1RM, Traits::Cond::Cmpps_neq);
+      _cmpps(T, Src1RM, CondX86::Cmpps_neq);
       _movp(T2, Src0RM);
-      _cmpps(T2, Src1RM, Traits::Cond::Cmpps_ord);
+      _cmpps(T2, Src1RM, CondX86::Cmpps_ord);
       _pand(T, T2);
     } break;
     case InstFcmp::Ueq: {
@@ -3425,9 +3425,9 @@
       T = makeReg(Src0RM->getType());
       Variable *T2 = makeReg(Src0RM->getType());
       _movp(T, Src0RM);
-      _cmpps(T, Src1RM, Traits::Cond::Cmpps_eq);
+      _cmpps(T, Src1RM, CondX86::Cmpps_eq);
       _movp(T2, Src0RM);
-      _cmpps(T2, Src1RM, Traits::Cond::Cmpps_unord);
+      _cmpps(T2, Src1RM, CondX86::Cmpps_unord);
       _por(T, T2);
     } break;
     }
@@ -3661,7 +3661,7 @@
       _mov(Temp, Src0HiRM);
       _or(Temp, Src0LoRM);
       Context.insert<InstFakeUse>(Temp);
-      setccOrConsumer(Traits::Cond::Br_e, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_e, Dest, Consumer);
       return;
     case InstIcmp::Ne:
     case InstIcmp::Ugt:
@@ -3670,7 +3670,7 @@
       _mov(Temp, Src0HiRM);
       _or(Temp, Src0LoRM);
       Context.insert<InstFakeUse>(Temp);
-      setccOrConsumer(Traits::Cond::Br_ne, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_ne, Dest, Consumer);
       return;
     case InstIcmp::Uge:
       movOrConsumer(true, Dest, Consumer);
@@ -3682,11 +3682,11 @@
       break;
     case InstIcmp::Sge:
       _test(Src0HiRM, SignMask);
-      setccOrConsumer(Traits::Cond::Br_e, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_e, Dest, Consumer);
       return;
     case InstIcmp::Slt:
       _test(Src0HiRM, SignMask);
-      setccOrConsumer(Traits::Cond::Br_ne, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_ne, Dest, Consumer);
       return;
     case InstIcmp::Sle:
       break;
@@ -3702,9 +3702,9 @@
     InstX86Label *LabelTrue = InstX86Label::create(Func, this);
     _mov(Dest, One);
     _cmp(Src0HiRM, Src1HiRI);
-    if (Traits::TableIcmp64[Condition].C1 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C1 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C1, LabelTrue);
-    if (Traits::TableIcmp64[Condition].C2 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C2 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C2, LabelFalse);
     _cmp(Src0LoRM, Src1LoRI);
     _br(Traits::TableIcmp64[Condition].C3, LabelTrue);
@@ -3715,9 +3715,9 @@
   }
   if (const auto *Br = llvm::dyn_cast<InstBr>(Consumer)) {
     _cmp(Src0HiRM, Src1HiRI);
-    if (Traits::TableIcmp64[Condition].C1 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C1 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C1, Br->getTargetTrue());
-    if (Traits::TableIcmp64[Condition].C2 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C2 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C2, Br->getTargetFalse());
     _cmp(Src0LoRM, Src1LoRI);
     _br(Traits::TableIcmp64[Condition].C3, Br->getTargetTrue(),
@@ -3732,9 +3732,9 @@
     InstX86Label *LabelTrue = InstX86Label::create(Func, this);
     lowerMove(SelectDest, SrcT, false);
     _cmp(Src0HiRM, Src1HiRI);
-    if (Traits::TableIcmp64[Condition].C1 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C1 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C1, LabelTrue);
-    if (Traits::TableIcmp64[Condition].C2 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C2 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C2, LabelFalse);
     _cmp(Src0LoRM, Src1LoRI);
     _br(Traits::TableIcmp64[Condition].C3, LabelTrue);
@@ -3782,7 +3782,7 @@
     // control flow graph changes now.  Make it do so to eliminate mov and cmp.
     _mov(Dest, Ctx->getConstantInt(Dest->getType(), (IcmpResult ? 1 : 0)));
     _cmp(Dest, Ctx->getConstantInt(Dest->getType(), 0));
-    _br(Traits::Cond::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
+    _br(CondX86::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
     return;
   }
   if (const auto *Select = llvm::dyn_cast<InstSelect>(Consumer)) {
@@ -3832,7 +3832,7 @@
   if (const auto *Br = llvm::dyn_cast<InstBr>(Consumer)) {
     Context.insert<InstFakeUse>(T);
     Context.insert<InstFakeDef>(Dest);
-    _br(Traits::Cond::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
+    _br(CondX86::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
     return;
   }
   llvm::report_fatal_error("Unexpected consumer type");
@@ -4668,8 +4668,7 @@
           lowerAssign(PhiAssign);
           Context.advanceNext();
         }
-        _br(Traits::Cond::Br_e, NextBr->getTargetTrue(),
-            NextBr->getTargetFalse());
+        _br(CondX86::Br_e, NextBr->getTargetTrue(), NextBr->getTargetFalse());
         // Skip over the old compare and branch, by deleting them.
         NextCmp->setDeleted();
         NextBr->setDeleted();
@@ -4826,7 +4825,7 @@
     }
     constexpr bool Locked = true;
     _cmpxchg8b(Addr, T_edx, T_eax, T_ecx, T_ebx, Locked);
-    _br(Traits::Cond::Br_ne, Label);
+    _br(CondX86::Br_ne, Label);
     if (!IsXchg8b) {
       // If Val is a variable, model the extended live range of Val through
       // the end of the loop, since it will be re-used by the loop.
@@ -4878,7 +4877,7 @@
   (this->*Op_Lo)(T, Val);
   constexpr bool Locked = true;
   _cmpxchg(Addr, T_eax, T, Locked);
-  _br(Traits::Cond::Br_ne, Label);
+  _br(CondX86::Br_ne, Label);
   // If Val is a variable, model the extended live range of Val through
   // the end of the loop, since it will be re-used by the loop.
   if (auto *ValVar = llvm::dyn_cast<Variable>(Val)) {
@@ -4957,7 +4956,7 @@
       _mov(T_Dest, _63);
     }
   }
-  _cmov(T_Dest, T, Traits::Cond::Br_ne);
+  _cmov(T_Dest, T, CondX86::Br_ne);
   if (!Cttz) {
     if (DestTy == IceType_i64) {
       // Even though there's a _63 available at this point, that constant might
@@ -4985,7 +4984,7 @@
     _xor(T_Dest2, _31);
   }
   _test(SecondVar, SecondVar);
-  _cmov(T_Dest2, T_Dest, Traits::Cond::Br_e);
+  _cmov(T_Dest2, T_Dest, CondX86::Br_e);
   _mov(DestLo, T_Dest2);
   _mov(DestHi, Ctx->getConstantZero(IceType_i32));
 }
@@ -5841,9 +5840,9 @@
 
   auto *Label = InstX86Label::create(Func, this);
   _cmp(Opnd, Ctx->getConstantZero(IceType_i32));
-  _br(Traits::Cond::Br_e, Label);
+  _br(CondX86::Br_e, Label);
   _cmp(Opnd, Ctx->getConstantInt32(1));
-  _br(Traits::Cond::Br_e, Label);
+  _br(CondX86::Br_e, Label);
   Context.insert(Label);
 }
 
@@ -6510,7 +6509,7 @@
   _cmp(CmpResult, Zero);
   Operand *SrcT = Select->getTrueOperand();
   Operand *SrcF = Select->getFalseOperand();
-  const BrCond Cond = Traits::Cond::Br_ne;
+  const BrCond Cond = CondX86::Br_ne;
   lowerSelectMove(Dest, Cond, SrcT, SrcF);
 }
 
@@ -6822,9 +6821,9 @@
     if (DefaultTarget == nullptr) {
       // Skip over jump table logic if comparison not in range and no default
       SkipJumpTable = InstX86Label::create(Func, this);
-      _br(Traits::Cond::Br_a, SkipJumpTable);
+      _br(CondX86::Br_a, SkipJumpTable);
     } else {
-      _br(Traits::Cond::Br_a, DefaultTarget);
+      _br(CondX86::Br_a, DefaultTarget);
     }
 
     InstJumpTable *JumpTable = Case.getJumpTable();
@@ -6878,17 +6877,17 @@
         Constant *Value = Ctx->getConstantInt32(Case.getLow());
         _cmp(Comparison, Value);
       }
-      _br(Traits::Cond::Br_e, Case.getTarget());
+      _br(CondX86::Br_e, Case.getTarget());
     } else if (DoneCmp && Case.isPairRange()) {
       // Range of two items with first item aleady compared against
-      _br(Traits::Cond::Br_e, Case.getTarget());
+      _br(CondX86::Br_e, Case.getTarget());
       Constant *Value = Ctx->getConstantInt32(Case.getHigh());
       _cmp(Comparison, Value);
-      _br(Traits::Cond::Br_e, Case.getTarget());
+      _br(CondX86::Br_e, Case.getTarget());
     } else {
       // Range
       lowerCmpRange(Comparison, Case.getLow(), Case.getHigh());
-      _br(Traits::Cond::Br_be, Case.getTarget());
+      _br(CondX86::Br_be, Case.getTarget());
     }
     if (DefaultTarget != nullptr)
       _br(DefaultTarget);
@@ -6926,9 +6925,9 @@
         Constant *ValueHi = Ctx->getConstantInt32(Instr->getValue(I) >> 32);
         InstX86Label *Label = InstX86Label::create(Func, this);
         _cmp(Src0Lo, ValueLo);
-        _br(Traits::Cond::Br_ne, Label);
+        _br(CondX86::Br_ne, Label);
         _cmp(Src0Hi, ValueHi);
-        _br(Traits::Cond::Br_e, Instr->getLabel(I));
+        _br(CondX86::Br_e, Instr->getLabel(I));
         Context.insert(Label);
       }
       _br(Instr->getLabelDefault());
@@ -6939,7 +6938,7 @@
       Src0Hi = legalize(Src0Hi, Legal_Reg | Legal_Mem);
       Constant *Zero = Ctx->getConstantInt32(0);
       _cmp(Src0Hi, Zero);
-      _br(Traits::Cond::Br_ne, DefaultTarget);
+      _br(CondX86::Br_ne, DefaultTarget);
       Src0 = Src0Lo;
     }
   }
@@ -7021,7 +7020,7 @@
       InstX86Label *Label = InstX86Label::create(Func, this);
       _cmp(Comparison, Value);
       // TODO(ascull): does it alway have to be far?
-      _br(Traits::Cond::Br_b, Label, InstX86Br::Far);
+      _br(CondX86::Br_b, Label, InstX86Br::Far);
       // Lower the left and (pivot+right) sides, falling through to the right
       SearchSpanStack.emplace(Span.Begin, Span.Size / 2, Label);
       SearchSpanStack.emplace(PivotIndex, Span.Size - (Span.Size / 2), nullptr);
diff --git a/third_party/subzero/src/IceTargetLoweringX8632Traits.h b/third_party/subzero/src/IceTargetLoweringX8632Traits.h
index c312b92..d150933 100644
--- a/third_party/subzero/src/IceTargetLoweringX8632Traits.h
+++ b/third_party/subzero/src/IceTargetLoweringX8632Traits.h
@@ -16,7 +16,7 @@
 #define SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H
 
 #include "IceAssemblerX8632.h"
-#include "IceConditionCodesX8632.h"
+#include "IceConditionCodesX86.h"
 #include "IceDefs.h"
 #include "IceInst.h"
 #include "IceInstX8632.def"
@@ -62,8 +62,6 @@
   using XmmRegister = ::Ice::RegX8632::XmmRegister;
   using X87STRegister = ::Ice::RegX8632::X87STRegister;
 
-  using Cond = ::Ice::CondX86;
-
   using RegisterSet = ::Ice::RegX8632;
   static constexpr RegisterSet::AllRegisters StackPtr = RegX8632::Reg_esp;
   static constexpr RegisterSet::AllRegisters FramePtr = RegX8632::Reg_ebp;
@@ -690,9 +688,9 @@
   static const struct TableFcmpType {
     uint32_t Default;
     bool SwapScalarOperands;
-    Cond::BrCond C1, C2;
+    CondX86::BrCond C1, C2;
     bool SwapVectorOperands;
-    Cond::CmppsCond Predicate;
+    CondX86::CmppsCond Predicate;
   } TableFcmp[];
   static const size_t TableFcmpSize;
   /// @}
@@ -701,7 +699,9 @@
   /// for i32 and narrower types. Each icmp condition has a clear mapping to an
   /// x86 conditional branch instruction.
   /// {@
-  static const struct TableIcmp32Type { Cond::BrCond Mapping; } TableIcmp32[];
+  static const struct TableIcmp32Type {
+    CondX86::BrCond Mapping;
+  } TableIcmp32[];
   static const size_t TableIcmp32Size;
   /// @}
 
@@ -711,12 +711,12 @@
   /// conditional branches are needed.
   /// {@
   static const struct TableIcmp64Type {
-    Cond::BrCond C1, C2, C3;
+    CondX86::BrCond C1, C2, C3;
   } TableIcmp64[];
   static const size_t TableIcmp64Size;
   /// @}
 
-  static Cond::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) {
+  static CondX86::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) {
     assert(static_cast<size_t>(Cond) < TableIcmp32Size);
     return TableIcmp32[Cond].Mapping;
   }
@@ -866,7 +866,7 @@
   // Note: The following data structures are defined in IceInstX8632.cpp.
 
   static const struct InstBrAttributesType {
-    Cond::BrCond Opposite;
+    CondX86::BrCond Opposite;
     const char *DisplayString;
     const char *EmitString;
   } InstBrAttributes[];
diff --git a/third_party/subzero/src/IceTargetLoweringX8664.cpp b/third_party/subzero/src/IceTargetLoweringX8664.cpp
index 54c8c8c..610bb3d 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664.cpp
+++ b/third_party/subzero/src/IceTargetLoweringX8664.cpp
@@ -64,12 +64,7 @@
 //------------------------------------------------------------------------------
 const TargetX8664Traits::TableFcmpType TargetX8664Traits::TableFcmp[] = {
 #define X(val, dflt, swapS, C1, C2, swapV, pred)                               \
-  {dflt,                                                                       \
-   swapS,                                                                      \
-   X8664::Traits::Cond::C1,                                                    \
-   X8664::Traits::Cond::C2,                                                    \
-   swapV,                                                                      \
-   X8664::Traits::Cond::pred},
+  {dflt, swapS, CondX86::C1, CondX86::C2, swapV, CondX86::pred},
     FCMPX8664_TABLE
 #undef X
 };
@@ -77,7 +72,7 @@
 const size_t TargetX8664Traits::TableFcmpSize = llvm::array_lengthof(TableFcmp);
 
 const TargetX8664Traits::TableIcmp32Type TargetX8664Traits::TableIcmp32[] = {
-#define X(val, C_32, C1_64, C2_64, C3_64) {X8664::Traits::Cond::C_32},
+#define X(val, C_32, C1_64, C2_64, C3_64) {CondX86::C_32},
     ICMPX8664_TABLE
 #undef X
 };
@@ -87,8 +82,7 @@
 
 const TargetX8664Traits::TableIcmp64Type TargetX8664Traits::TableIcmp64[] = {
 #define X(val, C_32, C1_64, C2_64, C3_64)                                      \
-  {X8664::Traits::Cond::C1_64, X8664::Traits::Cond::C2_64,                     \
-   X8664::Traits::Cond::C3_64},
+  {CondX86::C1_64, CondX86::C2_64, CondX86::C3_64},
     ICMPX8664_TABLE
 #undef X
 };
@@ -100,7 +94,7 @@
     TargetX8664Traits::TableTypeX8664Attributes[] = {
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   {IceType_##elty},
-        ICETYPEX8664_TABLE
+        ICETYPEX86_TABLE
 #undef X
 };
 
@@ -378,13 +372,13 @@
 #undef X
 } // end of namespace dummy2
 
-// Validate the enum values in ICETYPEX8664_TABLE.
+// Validate the enum values in ICETYPEX86_TABLE.
 namespace dummy3 {
 // Define a temporary set of enum values based on low-level table entries.
 enum _tmp_enum {
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   _tmp_##tag,
-  ICETYPEX8664_TABLE
+  ICETYPEX86_TABLE
 #undef X
       _num
 };
@@ -398,14 +392,14 @@
 #define X(tag, elty, cvt, sdss, pdps, spsd, int_, unpack, pack, width, fld)    \
   static const int _table2_##tag = _tmp_##tag;                                 \
   static_assert(_table1_##tag == _table2_##tag,                                \
-                "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE");
-ICETYPEX8664_TABLE
+                "Inconsistency between ICETYPEX86_TABLE and ICETYPE_TABLE");
+ICETYPEX86_TABLE
 #undef X
 // Repeat the static asserts with respect to the high-level table entries in
 // case the high-level table has extra entries.
 #define X(tag, sizeLog2, align, elts, elty, str, rcstr)                        \
   static_assert(_table1_##tag == _table2_##tag,                                \
-                "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE");
+                "Inconsistency between ICETYPEX86_TABLE and ICETYPE_TABLE");
 ICETYPE_TABLE
 #undef X
 } // end of namespace dummy3
diff --git a/third_party/subzero/src/IceTargetLoweringX8664Base.h b/third_party/subzero/src/IceTargetLoweringX8664Base.h
index c0bce54..dd7a10b 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664Base.h
+++ b/third_party/subzero/src/IceTargetLoweringX8664Base.h
@@ -56,8 +56,8 @@
   using ConcreteTarget = typename Traits::ConcreteTarget;
   using InstructionSetEnum = typename Traits::InstructionSet;
 
-  using BrCond = typename Traits::Cond::BrCond;
-  using CmppsCond = typename Traits::Cond::CmppsCond;
+  using BrCond = CondX86::BrCond;
+  using CmppsCond = CondX86::CmppsCond;
 
   using X86Address = typename Traits::Address;
   using X86Operand = typename Traits::X86Operand;
diff --git a/third_party/subzero/src/IceTargetLoweringX8664BaseImpl.h b/third_party/subzero/src/IceTargetLoweringX8664BaseImpl.h
index ffc42bb..c5eba01 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664BaseImpl.h
+++ b/third_party/subzero/src/IceTargetLoweringX8664BaseImpl.h
@@ -193,7 +193,7 @@
     return !Traits::Is64Bit;
   case PK_Fcmp:
     return Traits::TableFcmp[llvm::cast<InstFcmp>(Instr)->getCondition()].C2 !=
-           Traits::Cond::Br_None;
+           CondX86::Br_None;
   }
 }
 
@@ -1799,7 +1799,7 @@
       _shld(T_3, T_2, T_1);
       _shl(T_2, T_1);
       _test(T_1, BitTest);
-      _br(Traits::Cond::Br_e, Label);
+      _br(CondX86::Br_e, Label);
       // T_2 and T_3 are being assigned again because of the intra-block control
       // flow, so we need to use _redefined to avoid liveness problems.
       _redefined(_mov(T_3, T_2));
@@ -1817,7 +1817,7 @@
       _shrd(T_2, T_3, T_1);
       _shr(T_3, T_1);
       _test(T_1, BitTest);
-      _br(Traits::Cond::Br_e, Label);
+      _br(CondX86::Br_e, Label);
       // T_2 and T_3 are being assigned again because of the intra-block control
       // flow, so we need to use _redefined to avoid liveness problems.
       _redefined(_mov(T_2, T_3));
@@ -1836,7 +1836,7 @@
       _shrd(T_2, T_3, T_1);
       _sar(T_3, T_1);
       _test(T_1, BitTest);
-      _br(Traits::Cond::Br_e, Label);
+      _br(CondX86::Br_e, Label);
       // T_2 and T_3 are being assigned again because of the intra-block control
       // flow, so T_2 needs to use _redefined to avoid liveness problems. T_3
       // doesn't need special treatment because it is reassigned via _sar
@@ -2531,7 +2531,7 @@
   Operand *Src0 = legalize(Cond, Legal_Reg | Legal_Mem);
   Constant *Zero = Ctx->getConstantZero(IceType_i32);
   _cmp(Src0, Zero);
-  _br(Traits::Cond::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
+  _br(CondX86::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
 }
 
 // constexprMax returns a (constexpr) max(S0, S1), and it is used for defining
@@ -3298,8 +3298,8 @@
   assert(static_cast<size_t>(Condition) < Traits::TableFcmpSize);
   if (Traits::TableFcmp[Condition].SwapScalarOperands)
     std::swap(Src0, Src1);
-  const bool HasC1 = (Traits::TableFcmp[Condition].C1 != Traits::Cond::Br_None);
-  const bool HasC2 = (Traits::TableFcmp[Condition].C2 != Traits::Cond::Br_None);
+  const bool HasC1 = (Traits::TableFcmp[Condition].C1 != CondX86::Br_None);
+  const bool HasC2 = (Traits::TableFcmp[Condition].C2 != CondX86::Br_None);
   if (HasC1) {
     Src0 = legalize(Src0);
     Operand *Src1RM = legalize(Src1, Legal_Reg | Legal_Mem);
@@ -3397,7 +3397,7 @@
     switch (Condition) {
     default: {
       const CmppsCond Predicate = Traits::TableFcmp[Condition].Predicate;
-      assert(Predicate != Traits::Cond::Cmpps_Invalid);
+      assert(Predicate != CondX86::Cmpps_Invalid);
       T = makeReg(Src0RM->getType());
       _movp(T, Src0RM);
       _cmpps(T, Src1RM, Predicate);
@@ -3407,9 +3407,9 @@
       T = makeReg(Src0RM->getType());
       Variable *T2 = makeReg(Src0RM->getType());
       _movp(T, Src0RM);
-      _cmpps(T, Src1RM, Traits::Cond::Cmpps_neq);
+      _cmpps(T, Src1RM, CondX86::Cmpps_neq);
       _movp(T2, Src0RM);
-      _cmpps(T2, Src1RM, Traits::Cond::Cmpps_ord);
+      _cmpps(T2, Src1RM, CondX86::Cmpps_ord);
       _pand(T, T2);
     } break;
     case InstFcmp::Ueq: {
@@ -3417,9 +3417,9 @@
       T = makeReg(Src0RM->getType());
       Variable *T2 = makeReg(Src0RM->getType());
       _movp(T, Src0RM);
-      _cmpps(T, Src1RM, Traits::Cond::Cmpps_eq);
+      _cmpps(T, Src1RM, CondX86::Cmpps_eq);
       _movp(T2, Src0RM);
-      _cmpps(T2, Src1RM, Traits::Cond::Cmpps_unord);
+      _cmpps(T2, Src1RM, CondX86::Cmpps_unord);
       _por(T, T2);
     } break;
     }
@@ -3653,7 +3653,7 @@
       _mov(Temp, Src0HiRM);
       _or(Temp, Src0LoRM);
       Context.insert<InstFakeUse>(Temp);
-      setccOrConsumer(Traits::Cond::Br_e, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_e, Dest, Consumer);
       return;
     case InstIcmp::Ne:
     case InstIcmp::Ugt:
@@ -3662,7 +3662,7 @@
       _mov(Temp, Src0HiRM);
       _or(Temp, Src0LoRM);
       Context.insert<InstFakeUse>(Temp);
-      setccOrConsumer(Traits::Cond::Br_ne, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_ne, Dest, Consumer);
       return;
     case InstIcmp::Uge:
       movOrConsumer(true, Dest, Consumer);
@@ -3674,11 +3674,11 @@
       break;
     case InstIcmp::Sge:
       _test(Src0HiRM, SignMask);
-      setccOrConsumer(Traits::Cond::Br_e, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_e, Dest, Consumer);
       return;
     case InstIcmp::Slt:
       _test(Src0HiRM, SignMask);
-      setccOrConsumer(Traits::Cond::Br_ne, Dest, Consumer);
+      setccOrConsumer(CondX86::Br_ne, Dest, Consumer);
       return;
     case InstIcmp::Sle:
       break;
@@ -3694,9 +3694,9 @@
     InstX86Label *LabelTrue = InstX86Label::create(Func, this);
     _mov(Dest, One);
     _cmp(Src0HiRM, Src1HiRI);
-    if (Traits::TableIcmp64[Condition].C1 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C1 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C1, LabelTrue);
-    if (Traits::TableIcmp64[Condition].C2 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C2 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C2, LabelFalse);
     _cmp(Src0LoRM, Src1LoRI);
     _br(Traits::TableIcmp64[Condition].C3, LabelTrue);
@@ -3707,9 +3707,9 @@
   }
   if (const auto *Br = llvm::dyn_cast<InstBr>(Consumer)) {
     _cmp(Src0HiRM, Src1HiRI);
-    if (Traits::TableIcmp64[Condition].C1 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C1 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C1, Br->getTargetTrue());
-    if (Traits::TableIcmp64[Condition].C2 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C2 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C2, Br->getTargetFalse());
     _cmp(Src0LoRM, Src1LoRI);
     _br(Traits::TableIcmp64[Condition].C3, Br->getTargetTrue(),
@@ -3724,9 +3724,9 @@
     InstX86Label *LabelTrue = InstX86Label::create(Func, this);
     lowerMove(SelectDest, SrcT, false);
     _cmp(Src0HiRM, Src1HiRI);
-    if (Traits::TableIcmp64[Condition].C1 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C1 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C1, LabelTrue);
-    if (Traits::TableIcmp64[Condition].C2 != Traits::Cond::Br_None)
+    if (Traits::TableIcmp64[Condition].C2 != CondX86::Br_None)
       _br(Traits::TableIcmp64[Condition].C2, LabelFalse);
     _cmp(Src0LoRM, Src1LoRI);
     _br(Traits::TableIcmp64[Condition].C3, LabelTrue);
@@ -3774,7 +3774,7 @@
     // control flow graph changes now.  Make it do so to eliminate mov and cmp.
     _mov(Dest, Ctx->getConstantInt(Dest->getType(), (IcmpResult ? 1 : 0)));
     _cmp(Dest, Ctx->getConstantInt(Dest->getType(), 0));
-    _br(Traits::Cond::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
+    _br(CondX86::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
     return;
   }
   if (const auto *Select = llvm::dyn_cast<InstSelect>(Consumer)) {
@@ -3824,7 +3824,7 @@
   if (const auto *Br = llvm::dyn_cast<InstBr>(Consumer)) {
     Context.insert<InstFakeUse>(T);
     Context.insert<InstFakeDef>(Dest);
-    _br(Traits::Cond::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
+    _br(CondX86::Br_ne, Br->getTargetTrue(), Br->getTargetFalse());
     return;
   }
   llvm::report_fatal_error("Unexpected consumer type");
@@ -4660,8 +4660,7 @@
           lowerAssign(PhiAssign);
           Context.advanceNext();
         }
-        _br(Traits::Cond::Br_e, NextBr->getTargetTrue(),
-            NextBr->getTargetFalse());
+        _br(CondX86::Br_e, NextBr->getTargetTrue(), NextBr->getTargetFalse());
         // Skip over the old compare and branch, by deleting them.
         NextCmp->setDeleted();
         NextBr->setDeleted();
@@ -4818,7 +4817,7 @@
     }
     constexpr bool Locked = true;
     _cmpxchg8b(Addr, T_edx, T_eax, T_ecx, T_ebx, Locked);
-    _br(Traits::Cond::Br_ne, Label);
+    _br(CondX86::Br_ne, Label);
     if (!IsXchg8b) {
       // If Val is a variable, model the extended live range of Val through
       // the end of the loop, since it will be re-used by the loop.
@@ -4870,7 +4869,7 @@
   (this->*Op_Lo)(T, Val);
   constexpr bool Locked = true;
   _cmpxchg(Addr, T_eax, T, Locked);
-  _br(Traits::Cond::Br_ne, Label);
+  _br(CondX86::Br_ne, Label);
   // If Val is a variable, model the extended live range of Val through
   // the end of the loop, since it will be re-used by the loop.
   if (auto *ValVar = llvm::dyn_cast<Variable>(Val)) {
@@ -4949,7 +4948,7 @@
       _mov(T_Dest, _63);
     }
   }
-  _cmov(T_Dest, T, Traits::Cond::Br_ne);
+  _cmov(T_Dest, T, CondX86::Br_ne);
   if (!Cttz) {
     if (DestTy == IceType_i64) {
       // Even though there's a _63 available at this point, that constant might
@@ -4977,7 +4976,7 @@
     _xor(T_Dest2, _31);
   }
   _test(SecondVar, SecondVar);
-  _cmov(T_Dest2, T_Dest, Traits::Cond::Br_e);
+  _cmov(T_Dest2, T_Dest, CondX86::Br_e);
   _mov(DestLo, T_Dest2);
   _mov(DestHi, Ctx->getConstantZero(IceType_i32));
 }
@@ -5833,9 +5832,9 @@
 
   auto *Label = InstX86Label::create(Func, this);
   _cmp(Opnd, Ctx->getConstantZero(IceType_i32));
-  _br(Traits::Cond::Br_e, Label);
+  _br(CondX86::Br_e, Label);
   _cmp(Opnd, Ctx->getConstantInt32(1));
-  _br(Traits::Cond::Br_e, Label);
+  _br(CondX86::Br_e, Label);
   Context.insert(Label);
 }
 
@@ -6502,7 +6501,7 @@
   _cmp(CmpResult, Zero);
   Operand *SrcT = Select->getTrueOperand();
   Operand *SrcF = Select->getFalseOperand();
-  const BrCond Cond = Traits::Cond::Br_ne;
+  const BrCond Cond = CondX86::Br_ne;
   lowerSelectMove(Dest, Cond, SrcT, SrcF);
 }
 
@@ -6814,9 +6813,9 @@
     if (DefaultTarget == nullptr) {
       // Skip over jump table logic if comparison not in range and no default
       SkipJumpTable = InstX86Label::create(Func, this);
-      _br(Traits::Cond::Br_a, SkipJumpTable);
+      _br(CondX86::Br_a, SkipJumpTable);
     } else {
-      _br(Traits::Cond::Br_a, DefaultTarget);
+      _br(CondX86::Br_a, DefaultTarget);
     }
 
     InstJumpTable *JumpTable = Case.getJumpTable();
@@ -6870,17 +6869,17 @@
         Constant *Value = Ctx->getConstantInt32(Case.getLow());
         _cmp(Comparison, Value);
       }
-      _br(Traits::Cond::Br_e, Case.getTarget());
+      _br(CondX86::Br_e, Case.getTarget());
     } else if (DoneCmp && Case.isPairRange()) {
       // Range of two items with first item aleady compared against
-      _br(Traits::Cond::Br_e, Case.getTarget());
+      _br(CondX86::Br_e, Case.getTarget());
       Constant *Value = Ctx->getConstantInt32(Case.getHigh());
       _cmp(Comparison, Value);
-      _br(Traits::Cond::Br_e, Case.getTarget());
+      _br(CondX86::Br_e, Case.getTarget());
     } else {
       // Range
       lowerCmpRange(Comparison, Case.getLow(), Case.getHigh());
-      _br(Traits::Cond::Br_be, Case.getTarget());
+      _br(CondX86::Br_be, Case.getTarget());
     }
     if (DefaultTarget != nullptr)
       _br(DefaultTarget);
@@ -6918,9 +6917,9 @@
         Constant *ValueHi = Ctx->getConstantInt32(Instr->getValue(I) >> 32);
         InstX86Label *Label = InstX86Label::create(Func, this);
         _cmp(Src0Lo, ValueLo);
-        _br(Traits::Cond::Br_ne, Label);
+        _br(CondX86::Br_ne, Label);
         _cmp(Src0Hi, ValueHi);
-        _br(Traits::Cond::Br_e, Instr->getLabel(I));
+        _br(CondX86::Br_e, Instr->getLabel(I));
         Context.insert(Label);
       }
       _br(Instr->getLabelDefault());
@@ -6931,7 +6930,7 @@
       Src0Hi = legalize(Src0Hi, Legal_Reg | Legal_Mem);
       Constant *Zero = Ctx->getConstantInt32(0);
       _cmp(Src0Hi, Zero);
-      _br(Traits::Cond::Br_ne, DefaultTarget);
+      _br(CondX86::Br_ne, DefaultTarget);
       Src0 = Src0Lo;
     }
   }
@@ -7013,7 +7012,7 @@
       InstX86Label *Label = InstX86Label::create(Func, this);
       _cmp(Comparison, Value);
       // TODO(ascull): does it alway have to be far?
-      _br(Traits::Cond::Br_b, Label, InstX86Br::Far);
+      _br(CondX86::Br_b, Label, InstX86Br::Far);
       // Lower the left and (pivot+right) sides, falling through to the right
       SearchSpanStack.emplace(Span.Begin, Span.Size / 2, Label);
       SearchSpanStack.emplace(PivotIndex, Span.Size - (Span.Size / 2), nullptr);
diff --git a/third_party/subzero/src/IceTargetLoweringX8664Traits.h b/third_party/subzero/src/IceTargetLoweringX8664Traits.h
index e1f4a7e..0df0244 100644
--- a/third_party/subzero/src/IceTargetLoweringX8664Traits.h
+++ b/third_party/subzero/src/IceTargetLoweringX8664Traits.h
@@ -16,7 +16,7 @@
 #define SUBZERO_SRC_ICETARGETLOWERINGX8664TRAITS_H
 
 #include "IceAssembler.h"
-#include "IceConditionCodesX8664.h"
+#include "IceConditionCodesX86.h"
 #include "IceDefs.h"
 #include "IceInst.h"
 #include "IceInstX8664.def"
@@ -62,8 +62,6 @@
   using ByteRegister = ::Ice::RegX8664::ByteRegister;
   using XmmRegister = ::Ice::RegX8664::XmmRegister;
 
-  using Cond = ::Ice::CondX8664;
-
   using RegisterSet = ::Ice::RegX8664;
   static constexpr RegisterSet::AllRegisters StackPtr = RegX8664::Reg_rsp;
   static constexpr RegisterSet::AllRegisters FramePtr = RegX8664::Reg_rbp;
@@ -776,9 +774,9 @@
   static const struct TableFcmpType {
     uint32_t Default;
     bool SwapScalarOperands;
-    Cond::BrCond C1, C2;
+    CondX86::BrCond C1, C2;
     bool SwapVectorOperands;
-    Cond::CmppsCond Predicate;
+    CondX86::CmppsCond Predicate;
   } TableFcmp[];
   static const size_t TableFcmpSize;
   /// @}
@@ -787,7 +785,9 @@
   /// for i32 and narrower types. Each icmp condition has a clear mapping to an
   /// x86 conditional branch instruction.
   /// {@
-  static const struct TableIcmp32Type { Cond::BrCond Mapping; } TableIcmp32[];
+  static const struct TableIcmp32Type {
+    CondX86::BrCond Mapping;
+  } TableIcmp32[];
   static const size_t TableIcmp32Size;
   /// @}
 
@@ -797,12 +797,12 @@
   /// conditional branches are needed.
   /// {@
   static const struct TableIcmp64Type {
-    Cond::BrCond C1, C2, C3;
+    CondX86::BrCond C1, C2, C3;
   } TableIcmp64[];
   static const size_t TableIcmp64Size;
   /// @}
 
-  static Cond::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) {
+  static CondX86::BrCond getIcmp32Mapping(InstIcmp::ICond Cond) {
     assert(Cond < TableIcmp32Size);
     return TableIcmp32[Cond].Mapping;
   }
@@ -946,7 +946,7 @@
   // Note: The following data structures are defined in IceInstX8664.cpp.
 
   static const struct InstBrAttributesType {
-    Cond::BrCond Opposite;
+    CondX86::BrCond Opposite;
     const char *DisplayString;
     const char *EmitString;
   } InstBrAttributes[];