Subzero: Randomize register assignment.
Randomize the order that registers appear in the free list. Only
randomize fully "equivalent" registers to ensure no extra spills.
This adds the -randomize-regalloc option.
This is a continuation of https://codereview.chromium.org/456033003/ which Matt owns.
BUG= none
R=jfb@chromium.org
Review URL: https://codereview.chromium.org/807293003
diff --git a/src/IceTargetLowering.cpp b/src/IceTargetLowering.cpp
index bab46f6..be1d2e1 100644
--- a/src/IceTargetLowering.cpp
+++ b/src/IceTargetLowering.cpp
@@ -29,6 +29,7 @@
namespace {
+// TODO(stichnot): Move this machinery into llvm2ice.cpp.
namespace cl = llvm::cl;
cl::opt<bool> DoNopInsertion("nop-insertion", cl::desc("Randomly insert NOPs"),
cl::init(false));
@@ -40,6 +41,11 @@
cl::opt<int> NopProbabilityAsPercentage(
"nop-insertion-percentage",
cl::desc("Nop insertion probability as percentage"), cl::init(10));
+
+cl::opt<bool>
+CLRandomizeRegisterAllocation("randomize-regalloc",
+ cl::desc("Randomize register allocation"),
+ cl::init(false));
} // end of anonymous namespace
void LoweringContext::init(CfgNode *N) {
@@ -95,6 +101,12 @@
return NULL;
}
+TargetLowering::TargetLowering(Cfg *Func)
+ : Func(Func), Ctx(Func->getContext()),
+ RandomizeRegisterAllocation(CLRandomizeRegisterAllocation),
+ HasComputedFrame(false), CallsReturnsTwice(false), StackAdjustment(0),
+ Context() {}
+
Assembler *TargetLowering::createAssembler(TargetArch Target, Cfg *Func) {
// These statements can be #ifdef'd to specialize the assembler
// to a subset of the available targets. TODO: use CRTP.
@@ -236,7 +248,7 @@
RegExclude |= RegSet_FramePointer;
LinearScan.init(Kind);
llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude);
- LinearScan.scan(RegMask);
+ LinearScan.scan(RegMask, RandomizeRegisterAllocation);
}
TargetGlobalInitLowering *
