)]}'
{
  "commit": "e14609e302b3ff56d9f1fc98185670fb0ecb8c38",
  "tree": "59782df81a85f5accf8343f7a0d65f9ebd08dc76",
  "parents": [
    "e6c9497255c6fde8961729a85104ab0407aeeb5e",
    "e7b7d572391e039952b7cdee814170de76b98c87"
  ],
  "author": {
    "name": "Alexis Hetu",
    "email": "sugoi@google.com",
    "time": "Thu Oct 29 21:33:04 2020 -0400"
  },
  "committer": {
    "name": "Alexis Hetu",
    "email": "sugoi@google.com",
    "time": "Thu Oct 29 21:33:07 2020 -0400"
  },
  "message": "Update SPIR-V Headers to 7845730ca\n\nChanges:\n    7845730ca Bump revision to 4, for SPIR-V 1.5.\n    05836bdba Add SPV_EXT_shader_image_int64 (#170)\n    be32cb6c8 Added SPV_KHR_fragment_shading_rate (#172)\n    c43a43c7c  Register the Xenia emulator as a generator (#171)\n    d4e76fb32 Register the Messiah SPIR-V CodeGen (#169)\n    060627f0b Register the ANGLE compiler (#168)\n    03a842f95 Rebuild of latest headers, which slightly moves OpTerminateInvocation\n    3fdabd0da Reserve SPIR-V token range for upcoming Intel extensions. (#165)\n    5538bf438 Update BUILD.bazel and BUILD.gn (#166)\n    96013f32b Publish the headers for the clspv embedded reflection non-semantic extended instruction set (#164)\n    76afa6397 Update the registry in spir-v.xml to modernize and split out opcodes. (#156)\n\nCommands:\n    ./third_party/update-spirvheaders.sh\n\nBug: b/123642959\nChange-Id: I68027fa8e2770cac37af6d648fbb655b2112ee88\n",
  "tree_diff": []
}