Subzero: Initial O2 lowering
Includes the following:
1. Liveness analysis.
2. Linear-scan register allocation.
3. Address mode optimization.
4. Compare-branch fusing.
All of these depend on liveness analysis. There are three versions of liveness analysis (in order of increasing cost):
1. Lightweight. This computes last-uses for variables local to a single basic block.
2. Full. This computes last-uses for all variables based on global dataflow analysis.
3. Full live ranges. This computes all last-uses, plus calculates the live range intervals in terms of instruction numbers. (The live ranges are needed for register allocation.)
For testing the full live range computation, Cfg::validateLiveness() checks every Variable of every Inst and verifies that the current Inst is contained within the Variable's live range.
The cross tests are run with O2 in addition to Om1.
Some of the lit tests (for what good they do) are updated with O2 code sequences.
BUG= none
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/300563003
diff --git a/src/IceTargetLowering.cpp b/src/IceTargetLowering.cpp
index 0d07475..72a3e8c 100644
--- a/src/IceTargetLowering.cpp
+++ b/src/IceTargetLowering.cpp
@@ -18,6 +18,7 @@
#include "IceCfg.h" // setError()
#include "IceCfgNode.h"
#include "IceOperand.h"
+#include "IceRegAlloc.h"
#include "IceTargetLowering.h"
#include "IceTargetLoweringX8632.h"
@@ -66,6 +67,15 @@
return NULL;
}
+void TargetLowering::doAddressOpt() {
+ if (llvm::isa<InstLoad>(*Context.getCur()))
+ doAddressOptLoad();
+ else if (llvm::isa<InstStore>(*Context.getCur()))
+ doAddressOptStore();
+ Context.advanceCur();
+ Context.advanceNext();
+}
+
// Lowers a single instruction according to the information in
// Context, by checking the Context.Cur instruction kind and calling
// the appropriate lowering method. The lowering method should insert
@@ -144,4 +154,21 @@
Context.advanceNext();
}
+// Drives register allocation, allowing all physical registers (except
+// perhaps for the frame pointer) to be allocated. This set of
+// registers could potentially be parameterized if we want to restrict
+// registers e.g. for performance testing.
+void TargetLowering::regAlloc() {
+ LinearScan LinearScan(Func);
+ RegSetMask RegInclude = RegSet_None;
+ RegSetMask RegExclude = RegSet_None;
+ RegInclude |= RegSet_CallerSave;
+ RegInclude |= RegSet_CalleeSave;
+ RegExclude |= RegSet_StackPointer;
+ if (hasFramePointer())
+ RegExclude |= RegSet_FramePointer;
+ llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude);
+ LinearScan.scan(RegMask);
+}
+
} // end of namespace Ice
