Subzero: Add more kinds of RMW lowering.
Specifically: sub, and, or, xor; for all integer types.
Turns out that RMW is not possible for fadd/fsub/fmul/fdiv as well as operations on vector types, because the corresponding x86 instructions require the result to be in a physical register.
Refactors the assembler's implementations of add/or/adc/sbb/and/sub/xor/cmp to avoid repetition.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4095
R=jvoung@chromium.org
Review URL: https://codereview.chromium.org/1186713010
diff --git a/src/IceELFObjectWriter.cpp b/src/IceELFObjectWriter.cpp
index 44f4adb..e263c68 100644
--- a/src/IceELFObjectWriter.cpp
+++ b/src/IceELFObjectWriter.cpp
@@ -390,8 +390,9 @@
for (VariableDeclaration::Initializer *Init : Var->getInitializers()) {
switch (Init->getKind()) {
case VariableDeclaration::Initializer::DataInitializerKind: {
- const auto Data = llvm::cast<VariableDeclaration::DataInitializer>(
- Init)->getContents();
+ const auto Data =
+ llvm::cast<VariableDeclaration::DataInitializer>(Init)
+ ->getContents();
Section->appendData(Str, llvm::StringRef(Data.data(), Data.size()));
break;
}
