diff --git a/src/Common/CPUID.cpp b/src/Common/CPUID.cpp
index ab410ef..e2879e2 100644
--- a/src/Common/CPUID.cpp
+++ b/src/Common/CPUID.cpp
@@ -22,7 +22,6 @@
 	#include <unistd.h>
 	#include <sched.h>
 	#include <sys/types.h>
-	#include <sys/sysctl.h>
 #endif
 
 namespace sw
@@ -171,107 +170,51 @@
 
 	bool CPUID::detectMMX()
 	{
-		#if defined(__APPLE__)
-			int MMX = false;
-			size_t length = sizeof(MMX);
-			sysctlbyname("hw.optional.mmx", &MMX, &length, 0, 0);
-		#else
-			int registers[4];
-			cpuid(registers, 1);
-			return MMX = (registers[3] & 0x00800000) != 0;
-		#endif
-
-		return MMX;
+		int registers[4];
+		cpuid(registers, 1);
+		return MMX = (registers[3] & 0x00800000) != 0;
 	}
 
 	bool CPUID::detectCMOV()
 	{
-		#if defined(__APPLE__)
-			int CMOV = false;
-			size_t length = sizeof(CMOV);
-			sysctlbyname("hw.optional.floatingpoint", &CMOV, &length, 0, 0);
-		#else
-			int registers[4];
-			cpuid(registers, 1);
-			return CMOV = (registers[3] & 0x00008000) != 0;
-		#endif
-
-		return CMOV;
+		int registers[4];
+		cpuid(registers, 1);
+		return CMOV = (registers[3] & 0x00008000) != 0;
 	}
 
 	bool CPUID::detectSSE()
 	{
-		#if defined(__APPLE__)
-			int SSE = false;
-			size_t length = sizeof(SSE);
-			sysctlbyname("hw.optional.sse", &SSE, &length, 0, 0);
-		#else
-			int registers[4];
-			cpuid(registers, 1);
-			return SSE = (registers[3] & 0x02000000) != 0;
-		#endif
-
-		return SSE;
+		int registers[4];
+		cpuid(registers, 1);
+		return SSE = (registers[3] & 0x02000000) != 0;
 	}
 
 	bool CPUID::detectSSE2()
 	{
-		#if defined(__APPLE__)
-			int SSE2 = false;
-			size_t length = sizeof(SSE2);
-			sysctlbyname("hw.optional.sse2", &SSE2, &length, 0, 0);
-		#else
-			int registers[4];
-			cpuid(registers, 1);
-			return SSE2 = (registers[3] & 0x04000000) != 0;
-		#endif
-
-		return SSE2;
+		int registers[4];
+		cpuid(registers, 1);
+		return SSE2 = (registers[3] & 0x04000000) != 0;
 	}
 
 	bool CPUID::detectSSE3()
 	{
-		#if defined(__APPLE__)
-			int SSE3 = false;
-			size_t length = sizeof(SSE3);
-			sysctlbyname("hw.optional.sse3", &SSE3, &length, 0, 0);
-		#else
-			int registers[4];
-			cpuid(registers, 1);
-			return SSE3 = (registers[2] & 0x00000001) != 0;
-		#endif
-
-		return SSE3;
+		int registers[4];
+		cpuid(registers, 1);
+		return SSE3 = (registers[2] & 0x00000001) != 0;
 	}
 
 	bool CPUID::detectSSSE3()
 	{
-		#if defined(__APPLE__)
-			int SSSE3 = false;
-			size_t length = sizeof(SSSE3);
-			sysctlbyname("hw.optional.supplementalsse3", &SSSE3, &length, 0, 0);
-		#else
-			int registers[4];
-			cpuid(registers, 1);
-			return SSSE3 = (registers[2] & 0x00000200) != 0;
-		#endif
-
-		return SSSE3;
+		int registers[4];
+		cpuid(registers, 1);
+		return SSSE3 = (registers[2] & 0x00000200) != 0;
 	}
 
 	bool CPUID::detectSSE4_1()
 	{
-		#if defined(__APPLE__)
-			int SSE4_1 = false;
-			size_t length = sizeof(SSE4_1);
-			sysctlbyname("hw.optional.sse4_1", &SSE4_1, &length, 0, 0);
-		#else
-			int registers[4];
-			cpuid(registers, 1);
-			return SSE4_1 = (registers[2] & 0x00080000) != 0;
-		#endif
-
-		return SSE4_1;
+		int registers[4];
+		cpuid(registers, 1);
+		return SSE4_1 = (registers[2] & 0x00080000) != 0;
 	}
 
 	int CPUID::detectCoreCount()
@@ -293,13 +236,6 @@
 
 				systemAffinityMask >>= 1;
 			}
-		#elif defined(__APPLE__)
-			int MIB[2];
-			MIB[0] = CTL_HW;
-			MIB[1] = HW_NCPU;
-
-			size_t length = sizeof(cores);
-			sysctl(MIB, 2, &cores, &length, 0, 0);
 		#else
 			cores = sysconf(_SC_NPROCESSORS_ONLN);
 		#endif