Subzero ARM: lowerLoad and lowerStore. Thought leaving "mov" simple and not handle memory operands, but then we'd have to duplicate some of the lowerAssign code for lowerLoad =/ BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076 R=kschimpf@google.com, stichnot@chromium.org Review URL: https://codereview.chromium.org/1152703006
diff --git a/src/IceInstARM32.h b/src/IceInstARM32.h index 9e0bb65..3f5f6bd 100644 --- a/src/IceInstARM32.h +++ b/src/IceInstARM32.h
@@ -91,7 +91,7 @@ // general Constant operands like ConstantRelocatable, since a relocatable // can potentially take up too many bits. static OperandARM32Mem *create(Cfg *Func, Type Ty, Variable *Base, - ConstantInteger32 *ImmOffset = nullptr, + ConstantInteger32 *ImmOffset, AddrMode Mode = Offset) { return new (Func->allocate<OperandARM32Mem>()) OperandARM32Mem(Func, Ty, Base, ImmOffset, Mode); @@ -277,6 +277,7 @@ Push, Ret, Sbc, + Str, Sub, Umull }; @@ -763,6 +764,31 @@ ~InstARM32Ret() override {} }; +// Store instruction. It's important for liveness that there is no Dest +// operand (OperandARM32Mem instead of Dest Variable). +class InstARM32Str : public InstARM32Pred { + InstARM32Str() = delete; + InstARM32Str(const InstARM32Str &) = delete; + InstARM32Str &operator=(const InstARM32Str &) = delete; + +public: + // Value must be a register. + static InstARM32Str *create(Cfg *Func, Variable *Value, OperandARM32Mem *Mem, + CondARM32::Cond Predicate) { + return new (Func->allocate<InstARM32Str>()) + InstARM32Str(Func, Value, Mem, Predicate); + } + void emit(const Cfg *Func) const override; + void emitIAS(const Cfg *Func) const override; + void dump(const Cfg *Func) const override; + static bool classof(const Inst *Inst) { return isClassof(Inst, Str); } + +private: + InstARM32Str(Cfg *Func, Variable *Value, OperandARM32Mem *Mem, + CondARM32::Cond Predicate); + ~InstARM32Str() override {} +}; + // Unsigned Multiply Long: d.lo, d.hi := x * y class InstARM32Umull : public InstARM32Pred { InstARM32Umull() = delete;