)]}'
{
  "commit": "bbb5fa7e3808221c5580b4d410f8b5c17f095f04",
  "tree": "9b290bb5f1e6674a989bd9ff92b3c5b3f53d34c0",
  "parents": [
    "eeb9220b781cb8e17766b900a3e7575a4fe4c41a"
  ],
  "author": {
    "name": "Mohit Bhakkad",
    "email": "mohit.bhakkad@imgtec.com",
    "time": "Wed Jun 29 06:51:08 2016 -0700"
  },
  "committer": {
    "name": "Jim Stichnoth",
    "email": "stichnot@chromium.org",
    "time": "Wed Jun 29 06:51:08 2016 -0700"
  },
  "message": "Subzero: Fix Calling Convention for MIPS O32 abi\n\nWe should take care of alignment while discarding GPR registers, I have written larger explanation in a comment.\n\nR\u003dstichnot@chromium.org\n\nReview URL: https://codereview.chromium.org/2101093003 .\n\nPatch from Mohit Bhakkad \u003cmohit.bhakkad@imgtec.com\u003e.\n",
  "tree_diff": [
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "src/IceTargetLoweringMIPS32.cpp",
      "new_id": "5fd0901ffbd405b21db5da17fcc2fa7ee72ce9bd",
      "new_mode": 33188,
      "new_path": "src/IceTargetLoweringMIPS32.cpp"
    },
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}
